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3430 Commits

Author SHA1 Message Date
Tom Rini
4debc57a3d Prepare v2022.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-03 15:25:32 -04:00
Fabio Estevam
0bd7811ca9 imx8mn-ddr4-evk-u-boot: Fix broken boot
When the imx8mn.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-10-03 13:38:42 -04:00
Fabio Estevam
a2bf0373b8 imx8mn-venice-u-boot: Fix broken boot
When the imx8mn.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-10-03 13:38:22 -04:00
Tom Rini
d3ccdc0fce Merge tag 'efi-2022-10-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc6

Documentation:

* doc: improve description of autostart

UEFI:

* prefix test functions with efi_st_ in the LoadImage unit test
* avoid a warning message in efi_initrd_deregister()
2022-09-30 08:30:38 -04:00
Heinrich Schuchardt
8d805929b1 efi_loader: fix efi_initrd_deregister()
Don't try to delete a non-existent handle.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-30 02:03:23 +02:00
Heinrich Schuchardt
0dfc4c84d8 efi_selftest: prefix test functions with efi_st_
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.

Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-30 02:03:23 +02:00
Heinrich Schuchardt
0e21943b94 doc: improve description of autostart
Complete the list of commands influenced by the autostart environment
variable.

Make it clearer what values qualifies at 'yes'.

Eventually the list of environment variables is to be alphabetically
sorted. Move autostart up.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-30 02:03:23 +02:00
Tom Rini
97c0a9c570 Merge branch '2022-09-29-assorted-fixes'
- Assorted fixes we want to include before the release.
2022-09-29 16:06:19 -04:00
Pierre-Clément Tosi
76f921eb95 board_r: Relocate OF_EMBED if NEEDS_MANUAL_RELOC only
When the embedded device tree is pointed to by the __dtb_dt_*begin
symbols, it seems to be covered by the early relocation code and doesn't
need to be manually patched.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2022-09-29 10:10:39 -04:00
Pali Rohár
d21bbb98cc pci: Remove duplicate PCI_REGION_IO / "io" line
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-29 10:10:39 -04:00
Miaoqian Lin
316590db29 tools: env: Fix missing closedir in ubi_get_volnum_by_name
The function calls opendir() but missing the corresponding
closedir() before exit the function.
Add missing closedir() to fix it.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
2022-09-29 10:10:39 -04:00
Nishanth Menon
d2ab2a2baf board: ti: common: board_detect: Fix EEPROM read quirk for AM6 style data
The situation is similar to commit bf6376642f ("board: ti: common:
board_detect: Fix EEPROM read quirk"). This is seen on a variant of
eeproms seen on some BeagleBone-AI64 which now has a mix of both 1 byte
addressing and 2 byte addressing eeproms.

Unlike the am335x (ti_i2c_eeprom_am_get) and dra7
(ti_i2c_eeprom_dra7_get) which use constant data structure which allows
us to do a complete read of the data, the
am6(ti_i2c_eeprom_am6_get) eeprom parse operation is dynamic.

This removes the option of being able to read the complete eeprom data
in one single shot.

Fortunately, on the I2C bus, we do see the following behavior: In 1
byte mode, if we attempt to read the first header data yet again, the
misbehaving 2 byte addressing device acts in constant addressing mode
which results in the header not matching up and follow on attempt at 2
byte addressing scheme grabs the correct data.

This costs us an extra ~3 milliseconds, which is a minor penalty
compared to the consistent image support we need to have.

Reported-by: Jason Kridner <jkridner@beagleboard.org>
Fixes: a58147c2db ("board: ti: common: board_detect: Do 1byte address checks first.")
Signed-off-by: Nishanth Menon <nm@ti.com>
2022-09-29 10:10:39 -04:00
Andre Przywara
c47bb10a4d vexpress64: also consider DTB pointer in x1
Commit c0fce929564f("vexpress64: fvp: enable OF_CONTROL") added code to
consider a potential DTB address being passed in the x0 register, or
revert to the built-in DTB otherwise.
The former case was used when using the boot-wrapper, to which we sell
U-Boot as a Linux kernel. The latter was meant for TF-A, for which we
couldn't find an easy way to use the DTB it uses itself. We have some
quirk to filter for a valid DTB, as TF-A happens to pass a pointer to
some special devicetree blob in x0 as well.

Now the TF-A case is broken, when enabling proper emulation of secure
memory (-C bp.secure_memory=1). TF-A carves out some memory at the top
of the first DRAM bank for its own purposes, and configures the
TrustZone DRAM controller to make this region secure-only. U-Boot will
then hang when it tries to relocate itself exactly to the end of DRAM.
TF-A announces this by carving out that region of the /memory node, in
the DT it passes on to BL33 in x1, but we miss that so far.

Instead of repeating this carveout in our DT copy, let's try to look for
a DTB at the address x1 points to as well. This will let U-Boot pick up
the DTB provided by TF-A, which has the correct carveout in place,
avoiding the hang.
While we are at it, make the detection more robust: the length test (is
the DT larger than 256 bytes?) is too fragile, in fact the TF-A port for
a new FVP model already exceeds this. So we test x1 first, consider 0
an invalid address, and also require a /memory node to detect a valid DTB.

And for the records:
Some asking around revealed what is really going on with TF-A and that
ominous DTB pointer in x0: TF-A expects EDK-2 as its non-secure payload
(BL33), and there apparently was some long-standing ad-hoc boot protocol
defined just between the two: x0 would carry the MPIDR register value of
the boot CPU, and the hardware DTB address would be stored in x1.
Now the MPIDR of CPU 0 is typically 0, plus bit 31 set, which is defined
as RES1 in the ARMv7 and ARMv8 architectures. This gives 0x80000000,
which is the same value as the address of the beginning of DRAM (2GB).
And coincidentally TF-A put some DTB structure exactly there, for its
own purposes (passing it between stages). So U-Boot was trying to use
this DTB, which requires the quirk to check for its validity.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Hoyes <peter.hoyes@arm.com>
2022-09-29 10:10:39 -04:00
Pankaj Raghav
34d5feaefe fs: btrfs: remove the usage of undeclared fs_mutex variable
This line probably got in by mistake as there is no fs_mutex member in
the btrfs_fs_info struct.

Signed-off-by: Pankaj Raghav <p.raghav@samsung.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2022-09-29 10:10:39 -04:00
Michael Trimarchi
dc1c02cb59 configs: rockchip: Drop TPL_MAX_SIZE definition
The max size is defined at architectural level. On the same commit
I have checked mostly all the other architecture and look like they are

Fixes: commit ca8a329a1b ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-09-29 10:10:39 -04:00
Tom Rini
d779fc399c Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- autoboot: make sure watchdog device(s) are handled with keyed
  autoboot (Rasmus)
- gpio_wdt: use __udelay() to avoid recursion (Rasmus)
- watchdog: max6370: use __udelay() to avoid recursion (Pali)
2022-09-27 11:05:37 -04:00
Rasmus Villemoes
c11cedc876 autoboot: make sure watchdog device(s) are handled with keyed autoboot
Currently, AUTOBOOT_KEYED and its variant AUTOBOOT_ENCRYPTION are
broken when one has an external always-running watchdog device with a
timeout shorter than the configured boot delay (in my case, I have a
gpio-wdt one with a timeout of 1 second), because we fail to call
WATCHDOG_RESET() in the loops where we wait for the bootdelay to
elapse.

This is done implicitly in the !AUTOBOOT_KEYED case,
i.e. abortboot_single_key(), because that loop contains a
udelay(10000), and udelay() does a WATCHDOG_RESET().

To fix this, simply add similar udelay() calls in the other loops.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-27 12:25:51 +02:00
Pali Rohár
c5f5ee3732 watchdog: max6370: use __udelay() to avoid recursion
The udelay() function in lib/time.c contains a WATCHDOG_RESET()
call. So use __udelay() in max6370_wdt.c to prevent recursion.

Fixes: 0a095fc53b ("watchdog: Add MAX6370 watchdog timer driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-27 12:25:51 +02:00
Rasmus Villemoes
51443c9a49 watchdog: gpio_wdt: use __udelay() to avoid recursion
The udelay() function in lib/time.c contains a WATCHDOG_RESET()
call. The only reason this doesn't lead to a catastrophic infinite
recursion is due to the rate-limiting in wdt-uclass.c:

		if (time_after_eq(now, priv->next_reset)) {
			priv->next_reset = now + priv->reset_period;
			wdt_reset(dev);
		}

But this would fall apart if ->next_reset was updated after calling the
device's reset method.

This is needlessly fragile, and it's easy enough to avoid that
recursion in the first place by just using __udelay() directly.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-27 12:25:40 +02:00
Tom Rini
f117c54cc8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- gpio: turris_omnia_mcu: Fix registering gpios (Pali)
2022-09-26 08:30:17 -04:00
Tom Rini
d9993452cb Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC2 gadget EP fix, nuvoton NPCM7xx ehci/ohci driver
2022-09-26 08:29:42 -04:00
Pali Rohár
54bcd84adf gpio: turris_omnia_mcu: Fix registering gpios
Currently all GPIOs supported by CMD_EXT_CONTROL/CMD_GET_EXT_CONTROL_STATUS
commands (last 16 GPIOs) are available only when FEAT_PERIPH_MCU feature
bit is set. So do not register these GPIOs by U-Boot driver when this
feature bit is not set, so U-Boot 'gpio' command would see only GPIOs which
really exists.

Fixes: 5e4d24ccc1 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-26 10:04:37 +02:00
Alison Huffman
206af3dec0 Fix out of bound access of ep array.
When processing USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE, and
USB_REQ_GET_STATUS packets in dwc2_ep0_setup an out of bounds access
can occur. This is caused by the wIndex field of the usb control packet
being used as an index into an array whose size is DWC2_MAX_ENDPOINTS (4).

Signed-off-by: Alison Huffman <alisn@google.com>
2022-09-26 01:49:36 +02:00
Jim Liu
693765a720 usb: host: nuvoton: Add nuvoton NPCM7xx ehci/ohci driver
Add nuvoton BMC NPCM750 ehci/ohci driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-09-26 01:49:36 +02:00
Tom Rini
435596d57f Merge tag 'u-boot-imx-20220922' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220922
-------------------

Fixes for 2022.10

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13548
2022-09-22 10:29:29 -04:00
Fabio Estevam
1d8f4c85e3 kontron-sl-mx8mm: Let CONFIG_SPL_FIT_IMAGE_TINY be selected
When CONFIG_IMX_HAB is selected the 'hab_status' command reports several
error events, indicating that the BootROM failed to authenticate the SPL.

After inspecting the content of the memory location that corresponds to
the DTB load address, the content did not match with the DTB binary,
showing that some kind of memory corruption/overlap occurred.

Letting the CONFIG_SPL_FIT_IMAGE_TINY option to be selected causes the
DTB to be properly placed into RAM and no more overlap occurs.

With this change, the 'hab_status' command returns no more error events,
which indicates that the BootROM succeeded to authenticate the SPL.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-09-21 16:19:45 +02:00
Fabio Estevam
8b9d90d634 mx8m: csf.sh: Fix the calculation of fit_block_size
When running the script to sign SPL/U-Boot on a kontron-sl-mx8mm board,
the fit_block_size was calculated as 0x1000 instead of 0x1020.

Add an extra parenthesis pair to fix it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-09-21 16:19:45 +02:00
Tom Rini
179a9320c0 Merge tag 'dm-pull-21sep22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Fix futility bintool to run on newer distros
Apply a lost patch
2022-09-21 08:22:11 -04:00
Simon Glass
d64af08f19 binman: Get futility by building it
A binary download is not great, since it depends on libraries being
present in the system. Build futility from source instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-21 10:37:47 +02:00
Marek Vasut
13982ced2c cmd: fdt: Add support for reading stringlist property values
The fdt command currently handles stringlists as strings in 'fdt get value'
subcommand. Since strings in FDT stringlists are separated by '\0', only
the first value gets inserted into the environment variable passed to the
'fdt get value' command.

Example, consider the following DT snippet:

/ { compatible = "foo", "bar" };

The following command only reports the first string in stringlist:
=> fdt get value var / compatible ; print var
foo

It is not possible to assign list of null-terminated strings into U-Boot
environment variable. Add optional 'index' parameter to the subcommand
'fdt get value <var> <path> <prop> [<index>]' which lets user specify which
string within the stringlist should be assigned into the 'var' variable.
The default value of 'index' is 0 in case it is not present. This way the
'fdt' command API does not change and existing scripts are not broken.

The following command now reports the Nth string in stringlist, counting
from zero:
=> fdt get value var / compatible 1 ; print var
bar

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2022-09-21 10:37:46 +02:00
Marek Vasut
fdf6bbb260 ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
Pull this LPGPR unlock into common code, since it is used in multiple
systems already.

Signed-off-by: Marek Vasut <marex@denx.de>
2022-09-20 18:30:02 +02:00
Tim Harvey
9bf0cbf396 arm: dts: imx8mm-venice-gw7901: add dsa phy handles to u-boot dtsi
The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.

Fixes: 24a7a3c1c0 ("imx8mm: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-09-20 18:30:02 +02:00
Tim Harvey
1581f17378 arm: dts: imx8mp-venice-gw74xx: add dsa phy handles to u-boot dtsi
The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.

Fixes: e0caa84ca6 ("imx8mp: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-09-20 18:30:02 +02:00
Tom Rini
12ed6d4911 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- Fix a typo and remove an unused driver
2022-09-19 16:49:18 -04:00
Tom Rini
f76f3e3b44 Prepare v2022.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 12:17:04 -04:00
Marek Vasut
c34edb893a usb: gadget: designware-udc: Drop the driver
This driver is not used by any system and is long unmaintained, drop it.
There is a DWC2 OTG driver which is maintained, see CONFIG_USB_GADGET_DWC2_OTG .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-19 17:45:51 +02:00
Fabio Estevam
c6ab91c77e usb: Kconfig: Fix typo in SPL_DM_USB text
Change a typo in "USB host mode".

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-09-19 17:45:51 +02:00
Tom Rini
ddcd2e8fb3 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 11:22:26 -04:00
Tim Harvey
59f6141362 imx8m*_venice_defconfig: fix default bootcmd
commit 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
had an unintended side effect of resulting in a bootcmd env var change
for boards like venice that did not have CONFIG_USE_BOOTCOMMAND defined
and relied on it being defaulted in include/config_distro_bootcmd.h.
Following that patch it instead got defaulted in tools/env/fw_env_private.h

Fix this by enabling CONFIG_USE_BOOTCOMMAND for venice.

Fixes: commit 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-09-19 08:53:50 -04:00
Tom Rini
c1db6be55d Merge tag 'u-boot-imx-20220919' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220919
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13500

- Fix imx8mn-beacon-kit-u-boot
- Merged Purism
- imxrt1170 (already merged in u-boot-imx)
- Fixes in crypto FSL
- Toradex : fixes Verdin
- Serial Driver: fixes when not used as console
- DH Boards : fixes + USB
- Fix CONFIG_SYS_MALLOC_F_LEN (Kconfig)
- Add imx6ulz_smm_m2
2022-09-19 08:38:32 -04:00
Marek Behún
a0759684e0 powerpc: mpc85xx: Fix incorrect application of patch
I messed up application of patch 5a428e7510 ("mmc: fsl_esdhc_spl: Add
support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from
a work-in-progress branch where I changed usage of
  CONFIG_SDCARD to CONFIG_SD_BOOT
and refactored
  SYS_MPC85XX_NO_RESETVEC
mess.

But these changes aren't in master yet. Fix the wrong usage of these
macros.

Fixes: 5a428e7510 ("mmc: fsl_esdhc_spl: Add support for builds without
CONFIG_SYS_MMC_U_BOOT_OFFS")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-09-19 08:30:58 -04:00
Michael Trimarchi
cc74cab86a bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards
Introduce BSH SystemMaster (SMM) M2 board family, which consists of:
imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards.

Add support for imx6ulz BSH SMM M2 board:

- 128 MiB DDR3 RAM
- 256MiB Nand
- USBOTG1 peripheral - fastboot.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:18 +02:00
Marek Vasut
d072065690 ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing
Adjust the DRAM timing settings for this board per ones provided
by hardware department. The change is applied to the LPDDR4 MR11
register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes
stability issues on subset of boards. The DDR PHY PIE block has
been updated accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Marek Vasut
7b20d3d934 ARM: imx: Enable SPL GPIO hog on i.MX8M Plus DHCOM
Enable GPIO hog support in SPL to match the GPIO hog support in U-Boot proper.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Marcel Ziswiler
546dd667aa verdin-imx8mm: various config additions and improvements
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-09-18 22:56:10 +02:00
Peng Fan
19ed25b81e Kconfig: enlarge CONFIG_SYS_MALLOC_F_LEN
"alloc space exhausted" happens in very early stage, which could be seen
with DEBUG_UART options enabled and leeds to an non-functional board.

kontron_pitx_imx8m:
CONFIG_DEBUG_UART_BASE=0x30880000   # for serial3
CONFIG_DEBUG_UART_CLOCK=24000000

imx8mqevk:
CONFIG_DEBUG_UART_BASE=0x30860000      # for uart1
CONFIG_DEBUG_UART_CLOCK=24000000

It is because CONFIG_SYS_MALLOC_F_LEN is too small and still leave
CONFIG_SPL_SYS_MALLOC_F_LEN as 0x2000.

Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Johannes Schneider
c7878a0483 serial: mxc: have putc use the TXFIFO
only waiting for TXEMPTY leads to corrupted messages going over the
wire - which is fixed by making use of the FIFO

this change is following the linux kernel uart driver
(drivers/tty/serial/imx.c), which also checks UTS_TXFULL
instead of UTS_TXEMPTY

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Johannes Schneider
25b7ce3287 serial: mxc: enable the RX pipeline
on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
(as observable on a connected 'scope) to actually make it into the
RXFIFO

the reference manual is not overly clear about this, and only
mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
CR3 register reverts to its reset values after setting the baudrate,
setting this bit is done during '_mxc_serial_setbgr'

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Fabio Estevam
b7d29fd8a7 MAINTAINERS: imx: Add an entry for the serial driver
Currently, when running ./scripts/get_maintainer.pl on serial_mxc.c
no i.MX maintainer is returned.

Fix it by adding an entry for this driver.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-09-18 22:56:10 +02:00
Angus Ainslie
466a9ea2a1 board: purism: add the Purism Librem5 phone
Initial commit of Librem5 u-boot and SPL

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Co-developed-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Denys Drozdov
1f650d9ec6 verdin-imx8mp: do not save environment when it's nowhere
This code part is broken, remove it.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
2022-09-18 22:56:10 +02:00
Denys Drozdov
4aeabd9672 verdin-imx8mm: do not save environment when it's nowhere
This code part is broken, remove it.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
2022-09-18 22:56:10 +02:00
Marcel Ziswiler
cc34e9cb0c verdin-imx8mm: improve and extend boot devices
- Annotate boot devices available in spl_board_boot_device().
- Drop SD3_BOOT/MMC3_BOOT not available for boot on Verdin iMX8M Mini.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-09-18 22:56:10 +02:00
Marcel Ziswiler
1e2135356c verdin-imx8mm: prepare for optional job ring driver model
Prepare for optional job ring driver model. Sec may be initialized based
on the job ring information processed from the device tree.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-09-18 22:56:10 +02:00
Marcel Ziswiler
bbe0089d29 verdin-imx8mm: verdin-imx8mp: update env memory layout
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus:

- loadaddr=0x48280000 allows for 128.5MB area for uncompressing (ie FIT
  images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 127.5MB : allows for 127.5MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB : allows for 512KB script

Memory layout taken from commit fd5c7173ad
("imx8m{m,n}_venice: update env memory layout") but moved loadaddr by an
additional 0.5MB to avoid "Moving Image from 0x48200000 to 0x48280000"
during booti plus actually defining kernel_comp_size to make booti work.

Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
8ee4ffcd0b ARM: imx: Update DDR frequency on i.MX8M Plus DHCOM
Commit 99c7cc58e1 ("ddr: imx: Add i.MX9 DDR controller driver")
contains an inobvious side-effect which renders all systems using
DRAM controller at 3732 MT/s unbootable. The change is located in
ddrphy_init_set_dfi_clk(), where the switch case statement entry
3732 changed to entry 3733, so any board with DDR calibration data
for 3732 MT/s operations needs to be updated to 3733 MT/s to match
the change.

Since there is currently only one such board, update the board instead
of handling both 3732 and 3733 options in the driver. It is likely the
NXP MX8MP RPA update will follow and use the later value too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Marek Vasut
7e9bd84883 imx8m: ddrphy_utils: Remove unused file
The ddrphy_utils.c is now deduplicated in drivers/ddr/imx/phy/ddrphy_utils.c ,
this drivers/ddr/imx/imx8m/ddrphy_utils.c is a remnant from when the
deduplication was implemented and was not removed. Remove it as it is
unused.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
7b90229eba ARM: imx: dh-imx6: Increase SF erase area for u-boot update
Erase the entire U-Boot area during U-Boot update instead of just
a subset of it. This way, in case u-boot-with-spl.imx grows, the
sf write won't write over non-erased part of the SPI NOR.

Signed-off-by: Marek Vasut <marex@denx.de>
2022-09-18 22:56:10 +02:00
Marek Vasut
2debd004fe ARM: dts: imx: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOM
Fix copy-paste error of the I2C5 bus recovery GPIO assignment,
the I2C5 GPIOs are on gpio3 instead of gpio5.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
dd5ca87464 ARM: dts: imx: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM
The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
866a33e478 ARM: dts: imx: Rename imx8mp-dhcom{-pdk2,}-boot.dtsi
Rename imx8mp-dhcom-pdk2-u-boot.dtsi to imx8mp-dhcom-u-boot.dtsi, since
this file is shared by PDK2, PicoITX and DRC02. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
a5f29e72d3 ARM: dts: imx: Add SoM compatible to i.MX8M Plus DHCOM PDK2
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:10 +02:00
Marek Vasut
aa87db42ff ARM: dts: imx: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2
This PHY is not used on PDK2, the header was added due to copy-paste
error, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:09 +02:00
Marek Vasut
d1aebfab75 ARM: dts: imx: Add HW variant details to i.MX8M Plus DHCOM PDK2
Add information about which exact SoM variant is used on which PDK2 variant.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:09 +02:00
Marek Vasut
a44ee20c92 ARM: imx: Enable USB ethernet on i.MX8M Plus DHCOM
Enable both USB CDC ethernet and USB host ethernet on i.MX8M Plus DHCOM.
This is useful for bringing up systems without ethernet plug, but with
either USB host or gadget plug.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-09-18 22:56:09 +02:00
Tim Harvey
77f6dabc0a board: gateworks: venice: add fixup for GW73xx-C+
The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.

While we are at it, rename 'blob' to 'fdt' for clarity.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-09-18 22:56:09 +02:00
Adam Ford
a18f23f977 arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Adam Ford <aford173@gmail.com>
2022-09-18 22:56:09 +02:00
Gaurav Jain
4146078688 crypto/fsl: fsl_hash: Fix crash in flush dcache
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.

Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-09-18 22:56:09 +02:00
Marcel Ziswiler
a8e518b80a imx: romapi: fix spurious ampersand in address print
Fix spurious ampersand in address print e.g.

	Find img info 0x&480331a0, size 855

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>"
2022-09-18 20:42:56 +02:00
Marek Vasut
0c2c1c9415 doc: imx: habv4: Add Secure Boot guide for i.MX8M SPL targets
Add HABv4 documentation extension for SPL targets covering the
following topics:

- How to sign an securely boot an flash.bin container image.
- How to extend the root of trust for additional boot images.
- Add SPL and fitImage CSF examples.
- Add signature generation script example.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
f7aad713c5 ARM: imxrt1170_defconfig: Add i.MXRT1170 defconfig
Add a base defconfig for the i.MXRT1170

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
7d9c6f1781 RAM: Add changes for i.MXRT11xx series
The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
79f7632e80 clk: imx: Add initial support for i.MXRT1170 clock driver
Add clock driver support for i.MXRT1170.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
2242ac5d80 clk: imx: Add i.MXRT11xx pllv3 variant
The i.MXRT11 series has two new pll types but are variants of existing.
This patch adds the ability to read one of the pll types' frequency
as it can't be changed unlike the generic pll it also has the
division factors swapped.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
3d579c11e0 dt-bindings: imx: Add clock binding for i.MXRT1170
Add the clock binding doc for i.MXRT1170.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
505efde27a ARM: dts: imx: add i.MXRT1170-EVK support
The NXP i.MXRT1170 Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MXRT, which features NXP's implementation of the Arm
Cortex-M7 and Cortex-M4 core.

The EVK provides 64 MB SDRAM, Micro SD card socket,
USB 2.0 OTG.

This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
SD/MMC
SDRAM

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
a5b7a87673 ARM: dts: imxrt11170-pinfunc: Add pinctrl binding header
Add binding header for i.MXRT1170 pinctrl device tree.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
67e2df581c imx: imxrt1170-evk: Add support for the NXP i.MXRT1170-EVK
This commit adds board support for i.MXRT1170-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT117x processor family.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Tom Rini
0b3fe2b977 Merge branch 'mpc85xx-for-v2022.10-rc5' of https://source.denx.de/u-boot/custodians/u-boot-mpc85xx 2022-09-18 11:41:08 -04:00
Tom Rini
1977d72a69 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: turris_omnia: Fix setting switch CONFIG pins on new board
  design (Marek)
- orion-timer: Use timer_conv_64() to fix timer wrap around (Stefan)
2022-09-18 08:27:23 -04:00
Stefan Roese
5996a8a835 timer: orion-timer: Use timer_conv_64() to fix timer wrap around
While testing on some Kirkwood platforms it was noticed that the timer
did not function correctly all the time. The driver did not correctly
handle 32bit timer value wrap arounds. Using the timer_conv_64()
conversion function fixes this issue.

Fixes: e9e73d78a8 ("timer: add orion-timer support")
Suggested-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier-oss@weidmueller.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
2022-09-18 12:41:57 +02:00
Marek Behún
711b5fd232 arm: mvebu: turris_omnia: Fix setting switch CONFIG pins on new board design
It seems that waiting only 10 ms after releasing LAN switch from reset
is not enough for the strapping pins to latch the requested values.
P6_MODE[0] is latched to 0 instead of 1.

Increasing the delay to 50 ms fixes this issue.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-18 12:41:57 +02:00
Pali Rohár
5a428e7510 mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then
expects that U-Boot proper is placed immediately after SPL without any
additional padding.

This allows to generate smaller SPL+U-Boot final binary as it is not
required to specify fixed offset to U-Boot proper at SPL compile time.

In this case offset to U-Boot proper is calculated at SPL compile time in
linker script.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 18:46:14 +02:00
Pali Rohár
7696b80ec5 powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy
trims trailing zero bytes when converting ELF file to RAW binary.

This is same fix for SPL linker script as was done fix for U-Boot linker
script in commit e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE
support").

It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds
without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:45 +02:00
Pali Rohár
04e9cd7a98 mmc: fsl_esdhc_spl: Add support for loading proper U-Boot from unaligned location
This allows to concatenate SPL and proper U-Boot without extra alignment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:44 +02:00
Marek Behún
1e1d12adbc powerpc: mpc85xx: Fix check for CONFIG_SDCARD
Commit d433c74eec ("Convert CONFIG_SDCARD et al to Kconfig") converted
SYS_EXTRA_OPTIONS=SDCARD or SPIFLASH to config options CONFIG_SDCARD and
CONFIG_SPIFLASH, but left one occurance unchanged.

Fix this.

Fixes: d433c74eec ("Convert CONFIG_SDCARD et al to Kconfig")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-09-16 17:39:43 +02:00
Pali Rohár
e507be9ac6 Makefile: Unify condition for mpc85xx reset vector
Use 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && CONFIG_OF_SEPARATE' pattern
instead of 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && !CONFIG_OF_EMBED' also in
OBJCOPYFLAGS_u-boot-nodtb.bin as this pattern is used in rest of Makefile.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:42 +02:00
Pali Rohár
5af42eafd7 Makefile: Reduce usage of custom mpc85xx u-boot.bin target
Building of final u-boot.bin binary for mpc85xx via binman is needed only
when inserting DTB binary in the middle of the u-boot ELF binary (before
.bootpg and .resetvec ELF sections).

These requirements are met when CONFIG_MPC85XX_HAVE_RESET_VECTOR is enabled
(= generating .bootpg/.resetvec sections) and CONFIG_OF_SEPARATE is enabled
(= inserting DTB binary).

So in all other cases use standard build procedure instead of custom
mpc85xx u-boot.bin Makefile target via binman.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:42 +02:00
Pali Rohár
d8fa0a7668 Makefile: Build final mpc85xx non-SPL image in standard file u-boot.bin
Currently Makefile produces final mpc85xx image when SPL is not used in
custom file u-boot-with-dtb.bin. It is quite confusing name as build
process produce also intermediate file standard file u-boot-dtb.bin (which
is just intermediate and not bootable). Other platforms use u-boot.bin
(UBOOT_BIN) as standard name for final bootable raw image.

So change Makefile rules and binman to produce final bootable file for
mpc85xx also into file u-boot.bin. There is just need for mpc85xx to not
define default rule for u-boot.bin then instruct binman (via DTS file) to
store final image into u-boot.bin (instead of u-boot-with-dtb.bin) and
finally rename target u-boot-with-dtb.bin to u-boot.bin.

With this change are also removed custom Makefile hacks for mpc85xx that it
produced non-standard output file. And also updated documentation.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:41 +02:00
Pali Rohár
d6c5bdb879 Makefile: Fix dependency for u-boot-with-dtb.bin
Makefile uses binman to produce u-boot-with-dtb.bin target. As its input it
takes DTB file and u-boot binary without DTB, which is stored in file
u-boot-nodtb.bin. So fix target dependency.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
2022-09-16 17:39:39 +02:00
Tom Rini
4f2c559b9a Merge tag 'u-boot-stm32-20220915' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Fixes on STM32 I2C drivers
- Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command
  for scmi device tree
2022-09-15 12:17:49 -04:00
Jorge Ramirez-Ortiz
a22692dd81 i2c: stm32: fix usage of rise/fall device tree properties
These two device tree properties were not being applied.

Fixes: 1fd9eb68d6 ("i2c: stm32f7: move driver data of each instance in a privdata")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-15 14:59:29 +02:00
Alain Volmat
3bf699f7a8 i2c: stm32: do not set the STOP condition on error
Current function stm32_i2c_message_xfer is sending a STOP
whatever the result of the transaction is.  This can cause issues
such as making the bus busy since the controller itself is already
sending automatically a STOP when a NACK is generated.

Thanks to Jorge Ramirez-Ortiz for diagnosing and proposing a first
fix for this. [1]

[1] https://lore.kernel.org/u-boot/20220815145211.31342-2-jorge@foundries.io/

Reported-by: Jorge Ramirez-Ortiz, Foundries <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-15 14:59:22 +02:00
Alain Volmat
bcc7509265 i2c: stm32: remove unused stop parameter in start & reload handling
Functions stm32_i2c_message_start and stm32_i2c_handle_reload
both get a stop boolean indicating if the transfer should end with
a STOP or not.  However no specific handling is needed in those
functions hence remove the parameter.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-15 14:58:57 +02:00
Alain Volmat
923d80288a i2c: stm32: fix comment and remove unused AUTOEND bit
Comment within stm32_i2c_message_start is misleading, indicating
that AUTOEND bit is setted while it is actually cleared.
Moreover, the bit is actually never setted so there is no need
to clear it hence get rid of this bit clear and the bit macro
as well.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-15 14:58:52 +02:00
Jorge Ramirez-Ortiz
9ef530f196 i2c: stm32f7: fix clearing the control register
Bits should be set to 0, not 1.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-15 14:58:49 +02:00
Patrick Delaunay
da6fe6b063 configs: stm32mp15: activate DM_REGULATOR_SCMI
Activate the support of SCMI regulator to support the scmi_reg11,
scmi_reg18 and scmi_usb33 regulators present in the scmi device tree of
STMicroelectronics boards with stm32mp15-scmi.dtsi

Fixes: 6cccc8d396 ("ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-15 14:58:42 +02:00
Tom Rini
d6a03711fd Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Armada 32bit: Cache setup fixes (Pali)
- cmd: mvebu/bubt: Misc enhancements (Pali)
- kirkwood: Add CONFIG_SUPPORT_PASSING_ATAGS (Tony)
- board: turris: Misc improvements (Pali)
- tools: kwboot: Change KWBOOT_MSG_RSP_TIMEO_AXP to 10ms (Stefan)
- tools: termios_linux.h: Fix compilation on non-glibc systems (Pali)
2022-09-13 08:19:42 -04:00
Pali Rohár
5818198e6a arm: mvebu: Fix moving internal registers
Commit 5bb2c550b1 ("arm: mvebu: Move internal registers in
arch_very_early_init() function") moved code from file cpu.c to lowlevel.c,
which moves Marvell internal registers from address INTREG_BASE_ADDR_REG to
SOC_REGS_PHY_BASE.

But the steps describing how to do it correctly were documented only in
older U-Boot versions and commit cefd764222 ("arm: mvebu: Fix internal
register config on A38x") probably unintentionally removed important
details about MMU from code comments around.

Commit 5bb2c550b1 ("arm: mvebu: Move internal registers in
arch_very_early_init() function") implemented code movement according to
(now incomplete) comments which resulted in semi-broken code.

The result is that I-cache is currently disabled for all Armada 38x boards
and maybe there are some other (unreported / undetected) issues.

Reimplement it correctly. First flush all caches, then disable MMU and L2
cache and then move Marvell internal registers. There is no need to
explicitly disable I-cache.

After this change lzmadec command with lzma image of 0x7000000 bytes is
doing decompression just 5 seconds. Before this change it was 30 seconds.

To make lowlevel.S code more readable, extend asm/pl310.h header file to be
compatible with assembler and use macros from this file.

Fixes: 5bb2c550b1 ("arm: mvebu: Move internal registers in arch_very_early_init() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 09:04:22 +02:00
Pali Rohár
4f2333ba88 arm: mvebu: Enable L2 cache also on Armada 38x
For some unknown reason when L2 cache is disabled on Armada 385 then loadb,
loadx and loady commands do not work with higher baudrates than 115200
(they just abort transfer) and lzmadec command with lzma image of size
0x7000000 (maybe even smaller, we tested this one) is doing decompression
for more than 2 minutes. After enabling L2 cache decompression takes only
30s and loadb, loadx and loady are stable and working fine.

git bisect identified problematic commit 3308933d2f ("arm: mvebu: Avoid
reading MVEBU_REG_PCIE_DEVID register too many times"). Before this commit
above issues were not present.

But investigation showed that above issue was possible to reproduce also by
reverting that commit and forcing compiler to do inline optimization of
mvebu_soc_family() function. Which seems that the root of this issue is in
caches and position of instruction of segments. So currently it is unknown
what is or was broken, but code movement, code inlining or other compiler
optimization triggered it.

Commit 3e5ce7ceeb ("arm: mvebu: Enable L2 cache on Armada XP") mentioned
that enabling L2 cache on Armada XP improved performance and that Armada
38x has L2 disabled (which is default state) and if needed it has to be
enabled in separate patch. As enabling L2 cache also improve performance
on Armada 38x, enable it.

Note that Aurora cache in no outer mode is available only on Armada XP,
hence it is not touched for Armada 38x code.

Fixes: 3308933d2f ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times")
Reported-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 09:04:22 +02:00
Pali Rohár
a7199f4493 arm: mvebu: lowlevel.S: Use CR_M from asm/system.h
Replace magic constant 1 when disabling MMU by macro CR_M from include
header file asm/system.h.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 09:04:22 +02:00
Pali Rohár
2a0d9ae414 arm: mvebu: Guard non-AXP code by checking for AXP
Commit c86d53fd88 ("arm: mvebu: Don't disable cache at startup on Armada
XP at all") introduced branch for non-AXP code which was guarded by A38X
condition. Fix this issue by checking for AXP platform, not by A38X.

Fixes: c86d53fd88 ("arm: mvebu: Don't disable cache at startup on Armada XP at all")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 09:04:22 +02:00
Pali Rohár
117ef65502 arm: mvebu: Fix function enable_caches
Commit 3308933d2f ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID
register too many times") broke support for caches on all Armada SoCs.

Before that commit there was code:

    if (mvebu_soc_family() != MVEBU_SOC_A375) {
        dcache_enable();
    }

And after that commit there is code:

    if (IS_ENABLED(CONFIG_ARMADA_375)) {
        dcache_enable();
    }

Comment above this code says that d-cache should be disabled on Armada 375.
But new code inverted logic and broke Armada 375 and slowed down all other
Armada SoCs (including A38x).

Fix this issue by changing logic to:

    if (!IS_ENABLED(CONFIG_ARMADA_375)) {
        dcache_enable();
    }

Which matches behavior prior that commit.

Fixes: 3308933d2f ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 09:04:22 +02:00
Pali Rohár
b120519d76 arm: mvebu: Mark constant data with const keyword
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
cadda05a76 arm: mvebu: turris_omnia: Allow to use second serial port
Turris Omnia has two serial ports. Both are already specified in device
tree file. But U-Boot by default does not allow to use more than one serial
port unless CONFIG_SERIAL_PROBE_ALL is not enabled.

After enabling CONFIG_SERIAL_PROBE_ALL, U-Boot see also second serial port
(but is inactive by default):

    => coninfo
    List of available devices:
    serial@12000 00000007 IO stdin stdout stderr
    serial@12100 00000007 IO

To allow simultaneously to use more input / output devices it is needed to
enable CONFIG_CONSOLE_MUX option.

With CONFIG_CONSOLE_MUX it is possible to call:

    => setenv stdout 'serial@12000,serial@12100'

And U-Boot output is then visible on both serial ports.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
634aa8e586 tools: termios_linux.h: Fix compilation on non-glibc systems
TCGETS2 is defined in header file asm/ioctls.h provided by linux kernel.
On glib systems it is automatically included by some other glibc include
header file and therefore TCGETS2 is present in termios_linux.h when
linux kernel provides it.

On non-glibc systems (e.g. musl) asm/ioctls.h is not automatically included
which results in the strange error that BOTHER is supported, TCGETS2 not
defined and struct termios does not provide c_ispeed member.

    tools/kwboot.c: In function 'kwboot_tty_change_baudrate':
    tools/kwboot.c:662:6: error: 'struct termios' has no member named 'c_ospeed'
      662 |   tio.c_ospeed = tio.c_ispeed = baudrate;
          |      ^

Fix this issue by explicitly including asm/ioctls.h file which provides
TCGETS2 macro (if supported on selected architecture) to not depending on
glibc auto-include behavior and because termios_linux.h requires it.

With this change it is possible compile kwboot with musl libc.

Reported-by: Michal Vasilek <michal.vasilek@nic.cz>
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-13 06:38:08 +02:00
Pali Rohár
64c422b14f arm: mvebu: turris_mox: Add support for distroboot $fdt_addr
$fdt_addr is mandatory for systems which provides DTB in HW (e.g. ROM) and
wishes to pass that DTB to Linux.

Turris Mox contains DTB binary in SPI NOR memory at "dtb" partition which
starts at offset 0x7f0000 and is 0x10000 bytes long.

Armada 3700 CPU does not allow mapping SPI NOR memory into physical address
space like on other architectures and therefore set $fdt_addr variable to
memory range in RAM and loads this DTB binary from SPI NOR in misc_init_r()
function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
109dde0497 arm: mvebu: turris_{omnia, mox}: Reset bootdelay env for rescue
When rescue mode was activated reset also bootdelay env variable to its
default value. This will ensure that reset button works and starts rescue
mode also in the case when user changed bootdelay env variable to -1 (which
has meaning to not start autoboot).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
7bb9ea47e1 board: turris: Initialize serial# env
Store serial number from atsha cryptochip into the serial# env variable.
U-Boot automatically puts content of this variable into the root device
tree property serial-number when booting Linux kernel. Refactor turris
atsha code and from turris_atsha_otp_get_serial_number() function returns
directly string suitable for printing or storing into device tree. Because
during different boot stages is env storage read-only, it is not possible
to always store serial number into env storage. So introduce a new function
turris_atsha_otp_init_serial_number() which is called at later stage and
which ensures that serial number is correctly stored into env.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
8ac3615e8d arm: mvebu: Espressobin: When emmc is not present disable it also in OF_LIVE
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
f7b0bbca2b cmd: mvebu/bubt: Check for A38x/A37xx OTP secure bits and secure boot
For obvious reasons BootROMS rejects unsigned images when secure boot is
enabled in OTP secure bits. So check for OPT secure bits and do not allow
flashing unsigned images when secure boot is enabled. Access to OTP via
U-Boot fuse API is currently implemented only for A38x and A37xx SoCs.

Additionally Armada 3700 BootROM rejects signed trusted image when secure
boot is not enabled in OTP. So add also check for this case. On the other
hand Armada 38x BootROM acceps images with secure boot header when secure
boot is not enabled in OTP.

OTP secure bits may have burned also boot device source. Check it also and
reject flashing images to target storage which does not match OTP.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Pali Rohár
5a06534933 cmd: mvebu/bubt: Check for A38x image data checksum
Currently for A38x image is checked only header checksum.
So check also for image data checksum to prevent flashing broken image.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Stefan Roese
ca076d9689 tools: kwboot: Change KWBOOT_MSG_RSP_TIMEO_AXP to 10ms
Testing on the theadorable Armada XP platform has shown, thaz using the
current value of 1000ms as response timeout does not result in reliable
booting via kwboot. Using 10ms seems to be much better. So let's change
this value to this 10ms instead.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Pali Rohár <pali@kernel.org>
2022-09-13 06:38:08 +02:00
Tony Dinh
a8a0c55f9d arm: kirkwood: Add CONFIG_SUPPORT_PASSING_ATAGS
Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
image method of booting. Debian and OpenWrt installer use uImage
with appended DTB for these Kirkwood boards.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-13 06:38:08 +02:00
Tom Rini
0ba282e0ee Merge tag 'dm-pull-12sep22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Binman VPL support (patch was lost)
Add board_rng_seed() as a temporary solution
2022-09-12 09:47:16 -04:00
Simon Glass
6ad2452bc6 binman: Add VPL support
Add support for U-Boot's Verifying Program Loader phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-12 06:41:14 -06:00
Rasmus Villemoes
6dca1d9ad3 fdt_support: add optional board_rng_seed() hook
A recurring theme on LKML is the boot process deadlocking due to some
process blocking waiting for random numbers, while the kernel's
Cryptographic Random Number Generator (crng) is not initalized yet,
but that very blocking means no activity happens that would generate
the entropy necessary to finalize seeding the crng.

This is not a problem on boards that have a good hwrng (when the
kernel is configured to trust it), whether in the CPU or in a TPM or
elsewhere. However, that's far from all boards out there. Moreover,
there are consumers in the kernel that try to obtain random numbers
very early, before the kernel has had any chance to initialize any
hwrng or other peripherals.

Allow a board to provide a board_rng_seed() function, which is
responsible for providing a value to be put into the rng-seed property
under the /chosen node.

The board code is responsible for how to actually obtain those
bytes.

- One possibility is for the board to load a seed "file" from
  somewhere (it need not be a file in a filesystem of course), and
  then ensure that that the same seed file does not get used on
  subsequent boots.

  * One way to do that is to delete the file, or otherwise mark it as
    invalid, then rely on userspace to create a new one, and living
    with the possibility of not finding a seed file during some boots.

  * Another is to use the scheme used by systemd-boot and create a new
    seed file immediately, but in a way that the seed passed to the
    kernel and the new (i.e. next) seed cannot be deduced from each
    other, see the explanation at
    https://lore.kernel.org/lkml/20190929090512.GB13049@gardel-login/
    and the current code at
    https://github.com/systemd/systemd/blob/main/src/boot/efi/random-seed.c

- The board may have an hwrng from which some bytes can be read; while
  the kernel can also do that, doing it in U-Boot and providing a seed
  ensures that even very early users in the kernel get good random
  numbers.

- If the board has a sensor of some sort (temperature, humidity, GPS,
  RTC, whatever), mixing in a reading of that doesn't hurt.

- etc. etc.

These can of course be combined.

The rng-seed property is mixed into the pool used by the linux
kernel's CRNG very early during boot. Whether it then actually
contributes towards the kernel considering the CRNG initialized
depends on whether the kernel has been configured with
CONFIG_RANDOM_TRUST_BOOTLOADER (nowadays overridable via the
random.trust_bootloader command line option). But that's for the BSP
developer to ultimately decide.

So, if the board needs to have all that logic, why not also just have
it do the actual population of /chosen/rng-seed in ft_board_setup(),
which is not that many extra lines of code?

I considered that, but decided handling this logically belongs in
fdt_chosen(). Also, apart from saving the board code from the few
lines of boilerplate, doing it in ft_board_setup() is too late for at
least some use cases. For example, I want to allow the board logic to
decide

  ok, let's pass back this buffer and use that as seed, but also let's
  set random.trust_bootloader=n so no entropy is credited.

This requires the rng-seed handling to happen before bootargs
handling. For example, during the very first boot, the board might not
have a proper seed file, but the board could still return (a hash of)
some CPU serial# or whatnot, so that at least no two boards ever get
the same seed - the kernel always mixes in the value passed in
rng-seed, but if it is not "trusted", the kernel would still go
through the same motions as it would if no rng-seed was passed before
considering its CRNG initialized. I.e., by returning that
unique-to-this-board value and setting random.trust_bootloader=n, the
board would be no worse off than if board_rng_seed() returned nothing
at all.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-09-12 06:41:14 -06:00
Tom Rini
a5fc388ed9 Merge tag 'efi-2022-10-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc5

Documentation:

* man-page for tftpput

UEFI:

* fix driver binding protocol for block IO devices
* don't delete invalid handles
* add a unit test for the EFI Conformance Profile Table

Other:

* correct short text for tftpboot
2022-09-09 15:07:05 -04:00
Heinrich Schuchardt
8cf8ad3533 efi_driver: don't bind internal block devices
UEFI block devices can either mirror U-Boot's internal devices or be
provided by an EFI application like iPXE.

When ConnectController() is invoked for the EFI_BLOCK_IO_PROTOCOL
interface for such an application provided device we create a virtual
U-Boot block device of type "efi_blk".

Currently we do not call ConnectController() when handles for U-Boot's
internal block devices are created. If an EFI application calls
ConnectController() for a handle relating to an internal block device,
we erroneously create an extra "efi_blk" block device.

E.g. the UEFI shell has a command 'connect -r' which calls
ConnectController() for all handles with device path protocol.

In the Supported() method of our EFI_DRIVER_BINDING_PROTOCOL return
EFI_UNSUPPORTED when dealing with an U-Boot internal device.

Reported-by: Etienne Carriere <etienne.carriere@linaro.org>
Fixes: commit 05ef48a248 ("efi_driver: EFI block driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-09 16:07:54 +02:00
Etienne Carriere
7932548939 lib: efi_loader: don't delete invalid handles
Change efi_delete_handle() to not free EFI handles twice.

This change tries to resolved an issue seen since U-Boot v2022.07
in which ExitBootService() attempts to release some EFI handles twice.

The issue was seen booting a EFI shell that invokes 'connect -r' and
then boots a Linux kernel. Execution of connect command makes EFI
subsystem to bind a block device for each root block devices EFI handles.
However these EFI device handles are already bound to a driver and we
can have 2 registered devices relating to the same EFI handler. On
ExitBootService(), the loop removing the devices makes these EFI handles
to be released twice which corrupts memory.

This patch prevents the memory release operation caused by the issue but
but does not resolve the underlying problem.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

Add log message.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-09 16:07:54 +02:00
Heinrich Schuchardt
1e30e377a6 efi_selftest: unit test for EFI Conformance Profile Table
Add a new unit test to test the integrity of the
EFI Conformance Profile Table.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-09 16:07:54 +02:00
Heinrich Schuchardt
b33f246c0b efi_selftest: export efi_st_get_config_table()
We can use efi_st_get_config_table() in multiple unit tests.
Export the function.

Export system-table and boot-services.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-09 16:07:54 +02:00
Heinrich Schuchardt
afb70d1ef4 doc: man-page for tftpput
Provide a man-page for the tftpput command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-09 16:07:54 +02:00
Heinrich Schuchardt
651031ef7c cmd: correct short text for tftpboot
The command's name is a misnomer.
The command loads a file but does not run (boot) it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-09 16:07:54 +02:00
Heinrich Schuchardt
5f46c6eba5 cmd: fix tftpput command
Calling tftpput with less than 2 arguments must lead to a failure.

If tftpput is called with two arguments, these are the address and
the size of the file to be transferred.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-09 16:07:54 +02:00
Tom Rini
e9de8c8c64 Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians/u-boot-stm
- simplify the STM32MP15x package parsing code
- remove test on CONFIG_DM_REGULATOR in stm32mp1 board
  and enable CONFIG_DM_REGULATOR for stm32f769-disco
- handle ck_usbo_48m clock provided by USBPHYC to fix the command 'usb start'
  after alignment with Linux kernel v5.19 DT (clocks = <&usbphyc>)
- Fix SYS_HZ_CLOCK value for stih410-b2260 board
- Switch STMM32MP15x DHSOM to FMC2 EBI driver
- Remove hwlocks from pinctrl in STM32MP15x to avoid issue with kernel
2022-09-08 08:33:41 -04:00
Tom Rini
e3fce5e560 Merge tag 'fsl-qoriq-2022-9-7' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Pali's patch not in my patchwork, got missed.
- Sean's patch pending for sometime, I just fix conflict when apply
  Sean's patch, so pick up.
2022-09-07 08:39:12 -04:00
Tom Rini
fc2f4085d3 Merge tag 'dm-pull-7sep22' of https://source.denx.de/u-boot/custodians/u-boot-dm
binman fixes for bintool support
2022-09-07 08:38:44 -04:00
Sean Anderson
857e313a3d net: fm: Add support for FIT firmware
Fman microcode is executable code (AFAICT) loaded into a
coprocessor. As such, if verified boot is enabled, it must be verified
like other executable code. However, this is not currently done.

This commit adds verified boot functionality by encapsulating the
microcode in a FIT, which can then be signed/verified as normal. By
default we allow fallback to unencapsulated firmware, but if
CONFIG_FIT_SIGNATURE is enabled, then we make it mandatory. Because
existing Layerscape do not use this config (instead enabling
CONFIG_CHAIN_OF_TRUST), this should not break any existing boards.

An example (mildly-abbreviated) its is provided below:

/ {
    #address-cells = <1>;

    images {
        firmware {
            data = /incbin/(/path/to/firmware);
            type = "firmware";
            arch = "arm64";
            compression = "none";
	    signature {
                algo = "sha256,rsa2048";
                key-name-hint = "your key name";
            };
        };
    };

    configurations {
        default = "conf";
        conf {
            description = "Load FMAN microcode";
            fman = "firmware";
        };
    };
};

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:44:55 +08:00
Sean Anderson
f1061c5701 net: Convert fit verification to use fit_get_data_*
Several ethernet drivers load firmware from FIT images. Convert them to
use the fit_get_data helpers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:50 +08:00
Sean Anderson
7b42bde075 cmd: fpga: Convert to use fit_get_data_node
This converts the FIT loading process of the fpga command to use
fit_get_data_node.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:47 +08:00
Sean Anderson
bdbdaede67 ARMv8/sec_firmware: Convert to use fit_get_data_conf_prop
This reduces sec_firmware_get_data to a single call to
fit_get_data_conf_prop. I think sec_firmware_check_copy_loadable could also
be converted, but it does not map as straightforwardly, so I have left it
for a future cleanup.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:45 +08:00
Sean Anderson
37feaf2f72 image: fit: Add some helpers for getting data
Several different firmware users have repetitive code to extract the
firmware data from a FIT. Add some helper functions to reduce the amount
of repetition. fit_conf_get_prop_node (eventually) calls
fdt_check_node_offset_, so we can avoid an explicit if. In general, this
version avoids printing on error because the callers are typically
library functions, and because the FIT code generally has (debug)
prints of its own. One difference in these helpers is that they use
fit_image_get_data_and_size instead of fit_image_get_data, as the former
handles external data correctly.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:44 +08:00
Sean Anderson
1b0e98221d ARMv8/sec_firmware: Remove SEC_FIRMWARE_FIT_CNF_NAME
The config to use for FIT images can be better specified by enabling
CONFIG_MULTI_DTB_FIT and implementing board_fit_config_name_match.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:43 +08:00
Pali Rohár
33043b396c board: freescale: p1_p2_rdb_pc: Calculate offsets for eSDHC boot sector
Correctly calculate offsets between SPL and proper U-Boot when new config
option CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR for generating eSDHC boot sector
is enabled. Otherwise SPL would not be able to boot proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 11:47:30 +08:00
Pali Rohár
645993bdd7 board: freescale: p1_p2_rdb_pc: Delete watchdog max6370 node in load_default mode
CPLD in load_default mode ignores watchdog reset signal. It does not reset
board when watchdog triggers reset signal.

Detect load_default mode by GPIO7 - LOAD_DEFAULT_N and delete watchdog
max6370 node from device to prevent registering driver for non-working
watchdog.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 11:46:45 +08:00
Pali Rohár
61fed3155f board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot
All *boot env commands overrides default boot source location via i2c.
After board reset without power off, BootROM then starts booting U-Boot
from this specified location instead of the default one.

Add new env command defboot which reverts boot location to the default
value, which in most cases is configurable by HW DIP switches.

And add new env commands norlowerboot, norupperboot, sd2boot to boot from
other locations. norlowerboot would instruct BootROM to boot from lower NOR
bank, norupperboot from upper NOR bank and sd2boot from SD card with
alternative configuration.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 11:45:48 +08:00
Etienne Carriere
d6ff3c9f04 ARM: dts: stm32mp15: remove hwlocks from pinctrl
Removes hwlocks properties from stm32mp151 pinctrl node. These locks
could be used for other purpose, depending on board and software
configuration hence do not enforce their use to protect pinctrl
devices.

This patch is an alignment with Linux device tree with v6.0 as the
hwsem support wasn’t yet added in pincontrol in kernel. It avoids
issues when the Linux kernel is started with the U-Boot device tree.

Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-06 15:40:14 +02:00
Marek Vasut
9cccc358c4 ARM: stm32: Switch DHSOM to FMC2 EBI driver
Perform long overdue conversion of ad-hoc FMC2 EBI bus initialization
to upstream FMC2 EBI driver. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-06 15:33:07 +02:00
Tom Rini
59c51fa4ab Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-09-06 09:01:39 -04:00
Tom Rini
166d2693dd Merge tag 'fsl-qoriq-2022-9-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Reset fixes for p1_p2_rdb_pc
Fix use after free issue fix in fsl_enetc.c
Fix for fsl ddr: make bank_addr_bits reflect actual bits
sl28 board update
2022-09-06 08:59:51 -04:00
Patrice Chotard
29e03c98cf configs: stih410-b2260: Fix SYS_HZ_CLOCK value
SYS_HZ_CLOCK was wrongly set to 1GHz whereas it's set to 750MHz
by default by bootrom.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
2022-09-06 14:09:45 +02:00
Patrice Chotard
78e7cda76a configs: stm32: Enable CONFIG_DM_REGULATOR for stm32f769-disco
Since commit 5bc6f8c2a97e("video: stm32: remove test on CONFIG_DM_REGULATOR")
backlight was broken with the following message at boot:
stm32-display-dsi dsi@40016c00: Warning: cannot get phy dsi supply
stm32_display display-controller@40016800: panel panel enable backlight error -38

DM_REGULATOR flag must be enabled to fix this issue

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-06 14:09:33 +02:00
Patrice Chotard
5468dc82cb ARM: dts: stm32: Fix display-timings settings for stm32f746-disco
Since commit ef4ce6df32 "video: stm32: stm32_ltdc: fix data enable polarity"
The panel display output wasn't functional anymore.
Device tree display-timings de-active property value must be updated
to 1.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-06 14:09:05 +02:00
Patrick Delaunay
06328d1411 clk: stm32mp: handle ck_usbo_48m clock provided by USBPHYC
Handle the input clock of RCC USB_PHY_48, provided by USBPHYC
and named "ck_usbo_48m".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Patrick Delaunay
9406f9735c phy: stm32-usbphyc: usbphyc is a clock provider of ck_usbo_48m clock
ck_usbo_48m is generated by usbphyc PLL and used by OTG controller
for Full-Speed use cases with dedicated Full-Speed transceiver.

ck_usbo_48m is available as soon as the PLL is enabled.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Patrick Delaunay
3c2db62958 phy: stm32-usbphyc: add counter of PLL consumer
Add the counter of the PLL user n_pll_cons managed by the 2 functions
stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable.

This counter allow to remove the function stm32_usbphyc_is_init
and it is a preliminary step for ck_usbo_48m introduction.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Patrick Delaunay
0a1a755636 board: stm32mp1: remove test on CONFIG_DM_REGULATOR
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b4
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Patrick Delaunay
50b2184257 stm32mp: simplify the STM32MP15x package parsing code
Simplify the package parsing code for STM32MP15X as package can be
affected with get_cpu_package() result.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Pali Rohár
44366be10a board: freescale: p1_p2_rdb_pc: Turn off watchdog before reset
P1/P2 RDB boards have external max6370 watchdog connected to CPLD and this
watchdog is not deactivated on board reset. So if it is active during board
reset, it can trigger another reset when CPU is booting U-Boot. To prevent
possible infinite reset loop caused by external watchdog, turn it off
before reset.

Do it via a new board_reset_prepare() callback which is called from
do_reset() function before any reset sequence.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 14:08:35 +08:00
Pali Rohár
7e962cb132 board: freescale: p1_p2_rdb_pc: Avoid usage of CPLD's system reset register
CPLD's system reset register is buggy and requires workaround in U-Boot.
So use this kind of board reset only when there is no other reset option.

Introduce a new board_reset_last() callback which is last-stage
board-specific reset and implement CPLD's system reset in this new
board_reset_last() callback instead of board_reset() callback.

Fixes: 20fb58fc5a ("board: freescale: p1_p2_rdb_pc: Implement board_reset()")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 14:08:34 +08:00
Pali Rohár
27b2bff6eb board: freescale: p1_p2_rdb_pc: Add workaround for non-working watchdog
If watchdog timer was already set to non-disabled value then it means that
watchdog timer was already activated, has already expired and caused CPU
reset. If this happened then due to CPLD firmware bug, writing to wd_cfg
register has no effect and therefore it is not possible to reactivate
watchdog timer again. Watchdog starts working again after CPU reset via
non-watchdog method.

Implement this workaround (reset CPU when it was reset by watchdog) to make
watchdog usable again. Watchdog timer logic on these P1/P2 RDB boards is
connected to CPLD, not to SoC itself.

Note that reset does not occur immediately after calling do_reset(), but
after few ms later as real reset is done by CPLD. So it is normal that
function do_reset() returns. Therefore hangs after calling do_reset() to
prevent CPU execution of the rest U-Boot code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 14:08:33 +08:00
Pali Rohár
1f90be6f34 board: freescale: p1_p2_rdb_pc: Add workaround for board reset reboot loop
CPLD's system reset register on P1/P2 RDB boards is not autocleared after
flipping it. If this register is set to one in 100ms after reset starts
then CPLD triggers another CPU reset.

This means that trying to reset board via CPLD system reset register cause
reboot loop. To prevent this reboot loop, the only workaround is to try to
clear CPLD's system reset register as early as possible. U-Boot is already
doing it in its board_early_init_f() function, which seems to be enough as
register is cleared prior CPLD triggers another reset.

But board_early_init_f() is not called from SPL and therefore usage of SPL
can cause reboot loop.

To prevent reboot loop when using SPL, call board_early_init_f() function
in SPL too. For accessing CPLD memory space it is needed to have CPLD entry
in TLB.

With this change it is possible to trigger board reset via CPLD's system
reset register on P2020 RDB board.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 14:08:32 +08:00
Heinrich Schuchardt
4a98207b23 RISC-V: enable CONFIG_SYSRESET_SBI by default
System reset via the SRST extension in the SBI should be the default.
The driver checks if the extension is available when probing.
So there is no risk in enabling it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:58 +08:00
Heinrich Schuchardt
aa8aa48b4c cmd/sbi: format KVM version
Format the KVM implementation number in a human readable form.

With the patch output of the sbi command for Linux 5.19.1 looks like:

    => sbi
    SBI 0.3
    KVM 5.19.1
    Machine:
      Vendor ID 0
      Architecture ID 7005c
      Implementation ID 7005c
    Extensions:
      SBI Base Functionality
      Timer Extension
      IPI Extension
      RFENCE Extension
      Hart State Management Extension
      System Reset Extension

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:58 +08:00
Icenowy Zheng
ac48fc3deb riscv: dts: sifive: Synchronize FU740 and Unmatched DT
These DT files are synchronized from Linux 5.19.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:41 +08:00
Icenowy Zheng
d13cd77068 dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.

The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:15 +08:00
Siarhei Yasinski
5025224fad net: enetc: Fix use after free issue in fsl_enetc.c
If ethernet connected to SFP, like this:

&enetc_port0 {
            phy-connection-type = "sgmii";
            sfp = <&sfp0>;
            managed = "in-band-status";
            status = "okay";
};

Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed.
It's better to unregister and free mdio resources.

Signed-off-by: Siarhei Yasinski <siarhei.yasinski@sintecs.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:47 +08:00
Sean Anderson
6f6fbb334c ddr: fsl: Make bank_addr_bits reflect actual bits
In both the Freescale DDR controller and the SPD spec, bank address bits
are stored as the number of bank address bits minus 2. For example, if a
chip had 8 banks (3 total bank address bits), the value of
bank_addr_bits would be 1. This is rather surprising for users
configuring their memory manually, since they can't set bank_addr_bits
to the actual number of bank address bits. Rectify this.

There is at least one example of this kind of mistake already, in
board/freescale/t102xrdb/ddr.c. The documented MT40A512M8HX has two bank
address bits, but bank_addr_bits was set to 2, implying 4 bank address
bits. Such a value is reserved in BA_BITS_CS, but I suspect the
controller simply ignores the top bit, making this kind of mistake
harmless, if misleading.

Fixes: e8a7f1c32b ("powerpc/t1023rdb: Add T1023 RDB board support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:46 +08:00
Sean Anderson
96624d7b47 ddr: fsl: Reduce the size of interactive options
The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:45 +08:00
Michael Walle
a8713c29b5 board: sl28: remove COUNTER_FREQUENCY_REAL
The frequency of the system counter is static which is given by the
COUNTER_FREQUENCY option. Remove COUNTER_FREQUENCY_REAL.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Michael Walle
865176417a board: sl28: support dynamic prompts
Depending on the boot source, set different CLI prompts. This will help
the user to figure out in which mode the bootloader was started. There
are two special modes: failsafe and SDHC boot.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Michael Walle
9f46117123 board: sl28: add user friendly names for the boot sources
During startup the SPL will print where the u-boot proper is read from.
Instead of using the default names, provide more user friendly names.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Michael Walle
67b5dab263 board: sl28: implement additional bootsources
The board is able to boot from the following source:
 - user-updateble SPI flash
 - write-protected part of the same SPI flash
 - eMMC
 - SD card

Implement the needed function hooks to support all of these boot
sources.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Michael Walle
6622c30f2e armv8: layerscape: spl: mark OCRAM as non-secure
By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Tom Rini
51601397fc Prepare v2022.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-05 20:32:56 -04:00
Tom Rini
f243371798 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-05 20:32:14 -04:00
Jessica Clarke
b236a66ab5 riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux
This adds the onkey, RTC and watchdog children to the DA9063 PMIC node,
fixes the compatible for qspi0's flash node to match the official DT
schema (it being an is25wp256 is discoverable, hence jedec,spi-nor is
the only compatible that should be present) and exposes the card detect
GPIO.

Note that the device trees still diverge in some places (including
important things like the PCIe controller's clock name) and should be
cleaned up so that a common device tree is used in both projects rather
than having different bindings. This patch does not attempt to do that,
merely expose important functionality present in Linux's that is not in
U-Boot's so that it can be used without the OS providing its own bundled
copy.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-05 20:36:44 +08:00
Tom Rini
05f135ab3e Merge tag 'u-boot-rockchip-20220905' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- migrate to use binman for U-Boot image generate on rockchip platform;
- Some fixes for rk3399 and rk3308;
2022-09-04 22:35:40 -04:00
Michal Suchanek
f103c11266 clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000
Adding some debug prints I can see:

MMC:   mmc@fe320000: Got clock clock-controller@ff760000 76
mmc@fe310000: Got clock clock-controller@ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0

According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.

Add support for the clock to avoid the error.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
e1faa535b9 rockchip: add u-boot-rockchip-spi.bin image for booting from SPI-NOR flash
This new image is similar to u-boot-rockchip.bin except that it's
destined to be flashed on SPI-NOR flashes.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
a4bb36df49 rockchip: allow to build SPI images even without HAS_ROM option
This prepares for the creation of a u-boot-rockchip-spi.bin image
similar to u-boot-rockchip.bin to the exception it's destined for
SPI-NOR flashes instead of MMC storage medium.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
a6e569fac3 rockchip: simplify binman image dependencies addition to INPUTS
By factoring SPL check in the first condition, this makes the checks a
bit less convoluted and more readable.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
05713d5707 rockchip: generate u-boot-rockchip.bin with binman for ARM64 boards
This allows to build u-boot-rockchip.bin binary with binman for Rockchip
ARM64 boards instead of the legacy Makefile way.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
001f788cdb rockchip: generate idbloader.img content for u-boot-rockchip.bin with binman for ARM
idbloader.img content - currently created by way of Makefile - can be
created by binman directly.

So let's do that for Rockchip ARM platforms.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
32c8d1ce5c rockchip: remove binman temporary files when cleaning
Binman mkimage entry generates temporary files so let's remove them
when calling `make clean`.

Fixes: 9b312e26fc ("rockchip: Enable building a SPI ROM image on jerry")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reported-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
6cc29dc854 binman: allow user-defined filenames for mkimage entry
mkimage entry currently creates a file whose name is derived from the
section name containing said entry.

Let's allow the user to define a filename for the mkimage-generated
binary by using the 'filename' DT property.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
4d91df0548 binman: add support for skipping file concatenation for mkimage
Some image types handled by mkimage require the datafiles to be passed
independently (-d data1:data2) for specific handling of each. A
concatenation of datafiles prior to passing them to mkimage wouldn't
work.

That is the case for rkspi for example which requires page alignment
and only writing 2KB every 4KB.

This adds the ability to tell binman to pass the datafiles without
prior concatenation to mkimage, by adding the multiple-data-files
boolean property to the mkimage node.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
7a81a44caf rockchip: rk3399: sync spl_boot_devices_tbl and boot_devices node paths
While technically not a bug, let's have some consistency in paths
returned by u-boot,spl-boot-order look-up and the one saved in
u-boot,spl-boot-device by syncing spl_boot_devices_tbl and boot_devices
node paths.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
72ebe8b8cb rockchip: rk3399: fix incorrect boot-device in u-boot, spl-boot-device
On RK3399, mmc0 is eMMC and mmc1 is SD card, c.f. console:
MMC:   mmc@fe320000: 1, mmc@fe330000: 0

In arch/arm/mach-rockchip/spl-boot-order.c:board_boot_order, the
boot_device (BOOT_DEVICE_*) value is gotten from spl_node_to_boot_device
function. Said function returns BOOT_DEVICE_MMC1 for mmc0 (eMMC) and
BOOT_DEVICE_MMC2 for mmc1 (SD card).

Since the SD card controller is at mmc@fe320000, it should be associated
with BOOT_DEVICE_MMC2 and not BOOT_DEVICE_MMC1. Same applies to eMMC.

Let's fix that by swapping the two BOOT_DEVICEs.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
2022-09-04 20:00:38 +08:00
John Keeping
74f7025ea6 rockchip: rk3308: fix same-as-spl boot order
Rockchip SoCs need the boot_devices array defined in order to map the
bootloader's value to a U-Boot device.  Implement this for rk3308.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
John Keeping
9b0e344fa1 rockchip: rk3308: fix rockchip_dnl_key_pressed() on roc-cc
Commit 6aa4fe3912 ("dm: core: Rename and fix uclass_get_by_name_len()")
changed uclass_get_device_by_name() to an exact match when previously it
behaved as a prefix match.

The roc-cc code relied on this prefix match by only specifying part of
the device name.  Fix this by using the full name including the address.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Quentin Schulz
07b5d348a6 rockchip: rk3399: boot_devices: fix eMMC node name
When idbloader.img is flashed on the eMMC, the SPL still tries to load
from SPI-NOR first.

This is due to an incorrect look-up in the Device Tree. Since commit
822556a934 ("arm: dts: sync the Rockhip 3399 SoCs from Linux"), the
node name (but not label) changed from sdhci@fe330000 to mmc@fe330000
meaning U-Boot SPL is not looking for the correct node name anymore and
fails to find the "same-as-spl" node when eMMC is the medium from which
the SPL booted.

Fixes: 822556a934 ("arm: dts: sync the Rockhip 3399 SoCs from Linux")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Artem Lapkin  <email2tema@gmail.com>
Tested-by: Artem Lapkin  <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Lee Jones
337e92e79c ram: rk3399: Conduct memory training at 400MHz
Currently the default initialisation frequency is 50MHz.  Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.

Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.

Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/
Suggested-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Michal Suchánek <msuchanek@suse.de>
2022-09-04 20:00:38 +08:00
Lee Jones
daef678cff ram: rk3399: Fix faulty frequency change reports
Frequency changes to 400MHz are presently reported as:

  lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1

This is obviously wrong by 6 orders of magnitude.

Ensure frequency changes are reported accurately.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Lee Jones
7b561e2ab8 ram: rk3399: Fix .set_rate_index() error handling
Functions pointed to by this op pointer can return non-zero values
indicating an error.  Ensure any error value is propagated back up the
call-chain.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Han Pengfei
fc1526f651 drivers: ram: rockchip: Fix dram channels calculation for rk3399
Only add the dram channel when we finally setup it successfully at the
last step.

Signed-off-by: Han Pengfei <pengphei@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Johan Jonker
69820e02d2 arm: dts: rockchip: rk3288: rename mmc nodenames
The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Tom Rini
427aa3c9b7 Merge tag 'tpm-03092022' of https://source.denx.de/u-boot/custodians/u-boot-tpm
TPM fixes and state reporting
2022-09-03 14:55:37 -04:00
Tom Rini
bc5d11316b Merge https://source.denx.de/u-boot/custodians/u-boot-sh 2022-09-03 14:55:24 -04:00
Tom Rini
d4593139c5 Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-09-03 14:55:13 -04:00
Simon Glass
5208ed187c tpm: Allow committing non-volatile data
Add an option to tell the TPM to commit non-volatile data immediately it
is changed, rather than waiting until later. This is needed in some
situations, since if the device reboots it may not write the data.

Add definitions for the rest of the Cr50 commands while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
4c57ec76b7 tpm: Implement state command for Cr50
Add a vendor-specific TPM2 command for this and implement it for Cr50.
Note: This is not part of the TPM spec, but is a Cr50 extension.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
3bb4db4c38 tpm: Allow reporting the internal state
It is useful to read information about the current TPM state, where
supported, e.g. for debugging purposes when verified boot fails.

Add support for this to the TPM interface as well as Cr50. Add a simple
sandbox test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
6694c997b2 tpm: sandbox: Allow init of TPM in a different phase
At present the emulator assumes that the TPM is inited in the same phase
where it is used. But in fact SPL may init the TPM, so we don't want to
complain when U-Boot proper later uses it. Remove this check.

It might be best to save this information into the device state for the
TPM, so that we can make sure the TPM was inited at some point. For now,
this seems good enough.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:58:56 +03:00
Simon Glass
1c32eee38b tpm: Correct the define-space command in TPMv2
The message format is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:54:04 +03:00
Simon Glass
a0f3804a42 tpm: Correct the permissions command in TPMv1
The offset here is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:54:02 +03:00
Simon Glass
a557d258c6 tpm: Require a digest source when extending the PCR
This feature is used for measured boot, so we can add a log entry to the
TCPA with some information about where the digest comes from. It is not
currently supported in the TPM drivers, but add it to the API so that
code which expects it can signal its request.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:53:58 +03:00
Tom Rini
8710676635 Merge tag 'efi-2022-10-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request of efi-2022-10-rc4-2

UEFI:
* provide EFI Conformance Profile Table
* fix display of NVMe EUI-64
* fixes for Simple Text Input Ex Protocol
* fix exception unit-test on non-x86 sandbox
2022-09-03 07:44:22 -04:00
Heinrich Schuchardt
fbc04c0dab efi_loader: fix display of NVMe EUI-64
UEFI specification 2.9A requires to display the EUI-64 "in hexadecimal
format with byte 7 first (i.e., on the left) and byte 0 last".

This is in contrast to what the NVMe specification wants.
But it is what EDK II has been implementing.

Here is an example with the patch applied:

    qemu-system-aarch64 -machine virt -cpu cortex-a72 -nographic \
    -bios denx/u-boot.bin \
    -device nvme,id=nvme1,serial=9ff81223 \
    -device nvme-ns,bus=nvme1,drive=nvme1n0,eui64=0x123456789ABCDEF0 \
    -drive file=arm64.img,if=none,format=raw,id=nvme1n0

    => nvme scan
    => efidebug devices
    Device Path
    ====================
    /VenHw(…)/NVMe(0x1,f0-de-bc-9a-78-56-34-12)

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 10:49:17 +02:00
Jose Marinho
648a8dcb39 efi: ECPT add EBBRv2.0 conformance profile
Display the EBBRv2.0 conformance in the ECPT table.

The EBBRv2.0 conformance profile is set in the ECPT if
CONFIG_EFI_EBBR_2_0_CONFORMANCE=y.

Signed-off-by: Jose Marinho <jose.marinho@arm.com>

Add dependencies for CONFIG_EFI_EBBR_2_0_CONFORMANCE.
Enable the setting by default.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 10:13:26 +02:00
Jose Marinho
6b92c17352 efi: Create ECPT table
The ECPT table will be included in the UEFI specification 2.9+.
The ECPT table was introduced in UEFI following the code-first path. The
acceptance ticket can be viewed at:
	https://bugzilla.tianocore.org/show_bug.cgi?id=3591

The Conformance Profiles table is a UEFI configuration table that contains
GUID of the UEFI profiles that the UEFI implementation conforms with.

The ECPT table is created when CONFIG_EFI_ECPT=y.
The config is set by default.

Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 09:35:48 +02:00
Heinrich Schuchardt
2b7a6e013f efi_selftest: on sandbox use host specific assembly
The selftest checking the handling of exceptions in UEFI binaries is using
assembly to provide an undefined instruction. On the sandbox the correct
form of the instruction depends on the host architecture.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
e053a144ca efi_loader: support CTRL+\ - CTRL+_
In the extended text input protocol support input of control letters
0x1c - 0x1f.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
0b7b56d7d7 efi_loader: compliance Simple Text Input Ex Protocol
We cannot expect the buffers passed to the input protocols to be zero
filled. If only modifier keys are pressed, we have to return EFI_NOT_READY
but we still have to fill the key structure.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
a641e36fdb efi_loader: printing UEFI revision in helloworld.efi
We need to support multiple digits in the parts of the UEFI verision
number. E.g.

    EFI_SPECIFICATION_VERSION = (123 << 16) | 456

must be printed as

    123.45.6

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-03 08:16:09 +02:00
Tom Rini
67fe8cc001 Merge tag 'efi-2022-10-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc4

Documentation:

* add a page on sending patches
* bindings for FWU Metadata mtd storage
* fpio status output fields description

UEFI:

* ensure all block devices are probed
2022-09-02 09:09:47 -04:00
qianfan Zhao
2522bd3ea6 drivers: usb: fastboot: Fix full-speed usb descriptor
The host will report such error message if the fastboot device work in
full-speed mode: "Duplicate descriptor for config 1 interface 0
altsetting 0, skipping"

Fastboot device ack both full and high speed interface descriptors when
work in full-speed mode, that's will cause this issue.

Fix it.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: John Keeping <john@metanate.com>
2022-09-02 13:26:58 +02:00
Geert Uytterhoeven
68083b897b renesas: Fix RPC-IF compatible values
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Geert Uytterhoeven
33aca1c868 ARM: renesas: Propagate RPC-IF enablement to subsequent software
As the Renesas Reduced Pin Count Interface may be locked by TF-A, it is
disabled by default[1].  When unlocked, TF-A passes a DT fragment to
enable it, which is applied to the U-Boot DT[2].

Unlike the memory layout, the RPC-IF enablement is not propagated to
subsequent software.  Hence e.g. Linux cannot know if the RPC-IF is
locked or not, and will lock-up when trying to access the RPC-IF when
locked.

Fix this by checking if the RPC-IF is enabled in the TF-A DT fragment, and
setting the status of the RPC-IF device node in the target DT, if
present, to "okay".  Do this only when a "flash" subnode is found, to
avoid errors in subsequent software when the RPC-IF is not intended to
be used.

Note that this requires the status of the RPC-IF node to be set to
"disabled" in the target DT, just like in the U-Boot DT.

[1] commit 3d5f45c95c ("ARM: dts: rmobile: Disable RPC HF by
    default")
[2] commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware
    DT fragment into U-Boot DT on Gen3")

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Geert Uytterhoeven
e17205d067 ARM: dts: rmobile: Fix RPC-IF device node names
According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi".  Especially on R-Car Gen3 and RZ/G2, the node name matters, as
the node is enabled by passing a DT fragment from TF-A to U-Boot, and
from U-Boot to subsequent software.

Fix this by renaming the device nodes from "rpc" to "spi".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Quentin Schulz
7ac6842316 binman: bintool: bzip2: fix version function on non-Debian-based systems
Upstream bzip2 1.0.x actually is stuck when running bzip2 -V and
redirecting the output. This is fixed in Debian for about a decade
already in
https://git.launchpad.net/ubuntu/+source/bzip2/tree/debian/patches/20-legacy.patch?h=ubuntu/jammy
and in bzip2 1.1.x (no release yet, see
65179284ce
).

Fedora notably does not have such a patch.

Since bzip2 --help actually prints the version number too, let's use it
instead so that binman works fine on (hopefully) all distributions.

Fixes: 45aa279800 ("binman: Add bzip2 bintool")
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
9c96786327 binman: btool: futility: use Bintool.version
Bintool.version can now be passed the binary argument to return the
version text, so there's no need to override it in futility anymore.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
4508fb9a77 binman: btool: fiptool: use Bintool.version
Bintool.version can now be passed the binary argument to return the
version text, so there's no need to override it in fiptool anymore.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
e440843448 binman: bintool: parametrize args to pass to binary for returning version
The code to check the version is very similar between binaries, the most
likely only needed variables are the regex to find the version (already
supported) and the args to pass to the binary so that it prints this
version (e.g. --version, -V or similar).

Let's make it a parameter of Bintool so that code duplication can be
avoided for simple changes.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-09-01 11:36:36 -06:00
Quentin Schulz
65e2c14d5a binman: btool: mkimage: use Bintool.version
Bintool.version already contains everything required to get the version
out of mkimage binary so let's not override it with its own
implementation.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
f17219ad42 binman: btool: lz4: use Bintool.version
Bintool.version already contains everything required to get the version
out of lz4 binary so let's not override it with its own implementation.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
723a63eeec binman: bintool: move version check implementation into bintool class
Version checking has nothing specific to compression/decompression tools
so let's move it to the Bintool class.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Quentin Schulz
daa2da754a binman: btool: gzip: fix packer name so that binary can be found
The binary is looked on the system by the suffix of the packer class.
This means binman was looking for btool_gzip on the system and not gzip.

Therefore, let's pass "gzip" as the name so that it can be found and
used.

Fixes: 0f369d7992 ("binman: Add gzip bintool")
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 11:36:36 -06:00
Sughosh Ganu
2ac4c98ad3 dt/bindings: Add bindings for FWU Metadata mtd storage
Add bindings needed for accessing the FWU metadata regions.
These include the compatible string which point to the access
method, the actual device which stores the FWU metadata and
the offsets for both metadata regions.

The current patch adds basic bindings needed for accessing the
metadata structure on non-GPT mtd regions.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-01 07:42:28 +02:00
Tom Rini
0d8b7f9aee github: Update PR template for new "Patches" content
The old "Patches" wiki page is not available anymore. Now that the
content has been integrated with the submitting_patches document,
reference that instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 07:26:52 +02:00
Tom Rini
286ed78a2e doc: process, sending_patches: Update and correct the old "Patches" content
- Use gender-neutral language to refer to the user, consistently.
- Reference the checkpatch document.
- Move the section on commit message tags to the process document and
  reference this in sending_patches.rst.
  - Reword the custodian workflow process section to refer to this new
    section, integrate some of the wording from there in this new section.
- Update the comment about GPLv2 applying to August 2022, to be clear
  this still is correct.
- Reword the section about MAKEALL to talk about local build testing and
  link to the CI document.
- Reference the system_configuration document for the note about
  modifying existing code.
- Reword the patchwork flow section.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-01 07:26:28 +02:00
Tom Rini
6349b186d8 doc: sending_patches.rst: Incorporate the old "Patches" wiki content
Import as-is much of the old "Patches" wiki page to the current
sending_patches.rst file. This means we need to move patman to being
included in the higher level ToC and add a reference for "Custodians" in
the process document. A very minimal amount of content changing and
rewording is done here as part of the import, in order to make the
conversion easier.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 07:23:53 +02:00
Patrice Chotard
00cc81f4e4 doc: Add gpio status output fields description
Add gpio status output fields description and one output example.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Tweak the formatting.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-01 07:21:25 +02:00
Heinrich Schuchardt
d5391bf02b efi_loader: ensure all block devices are probed
Only probed block devices are available in the UEFI sub-system. Multiple
block devices may be involved in the boot process. So we have to make sure
that all block devices are probed. Another reason is that we store UEFI
variables on the ESP which may be on any block device.

On the sandbox before the patch:

=> efidebug devices
No EFI system partition
Device           Device Path
================ ====================
000000001b027c70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
000055d078bc1ae0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Uart(0,0,D,D)
000000001b22e0b0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/MAC(020011223344,1)

After the patch:

=> efidebug devices
No EFI system partition
Device           Device Path
================ ====================
000000001b027c70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
000055bdac8ddae0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Uart(0,0,D,D)
000000001b230920 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(2)/SD(0)
000000001b233ac0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)
000000001b233b80 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)/HD(1,GPT,d0a914ee-a71c-fc1e-73f0-7e302b0e6c20,0x30,0x1)
000000001b234110 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)/HD(2,GPT,9330a0ea-8aff-f67a-294c-fa05d60896c3,0x31,0x1)
000000001b22f0e0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(0)/SD(2)
000000001b238df0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/MAC(020011223344,1)

Fixes: a9bf024b29 ("efi_loader: disk: a helper function to create efi_disk objects from udevice")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-01 07:21:25 +02:00
Tom Rini
4e10c1227a Merge branch '2022-08-31-assorted-fixes'
- Assorted bugfixes including re-working the i2c command CVE and fixing
  some TI reference platforms with different EEPROMs.
2022-08-31 19:32:31 -04:00
Sean Anderson
f4b540e25c arm: smh: Fix uninitialized parameters with newer GCCs
Newer versions of GCC won't initialize parts of structures which don't
appear to be used. This results in uninitialized semihosting parameters
passed via R1. Fix this by marking the inline assembly as clobbering
memory.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-08-31 12:21:47 -04:00
Mark Kettenis
1a4af2d950 tools: mkimage: fix build with recent LibreSSL
LibreSSL 3.5.0 and later (also shipped as part of OpenBSD 7.1 and
and later) have an opaque RSA object and do provide the
RSA_get0_* functions that OpenSSL provides.

Fixes: 2ecc354b8e ("tools: mkimage: fix build with LibreSSL")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2022-08-31 12:21:47 -04:00
Pali Rohár
5acfdfbd43 bootm: Fix upper bound of FDT overlap checks
FTD blob can be put immediately after the OS image.
So use strict inequality for start address check.

Fixes: fbde7589ce ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:21:47 -04:00
Daniel Golle
88de6c5127 image-fit: don't set compression if it can't be read
fit_image_get_comp() should not set value -1 in case it can't read
the compression node. Instead, leave the value untouched in that case
as it can be absent and a default value previously defined by the
caller of fit_image_get_comp() should be used.

As a result the warning message
WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its file!
no longer shows if the compression node is actually absent.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:21:47 -04:00
Daniel Golle
0cd57f29e4 bootm: fix typo imape_comp -> image_comp
Change variable name 'imape_comp' to the supposedly intended name
'image_comp'.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:21:47 -04:00
Tom Rini
fdffe6aae2 corenet_ds.h: Remove
This was missed when removing the platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:21:47 -04:00
Marek Vasut
e4573fef77 i2c: fix stack buffer overflow vulnerability in i2c md command
This reinstates fix from commit 8f8c04bf1e ("i2c: fix stack buffer
overflow vulnerability in i2c md command") without the changes unrelated
to the actual fix. Avoid the underflow by setting only nbytes and
linebytes as unsigned integers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-08-31 12:21:47 -04:00
Marek Vasut
1aa9a04ff6 Revert "i2c: fix stack buffer overflow vulnerability in i2c md command"
This reverts commit 8f8c04bf1e.

The commit is largely wrong and breaks most of i2c command functionality.
The problem described in the aforementioned commit commit message is valid,
however the commit itself does many more changes unrelated to fixing that
one problem it describes. Those extra changes, namely the handling of i2c
device address length as unsigned instead of signed integer, breaks the
expectation that address length may be negative value. The negative value
is used by DM to indicate that address length of device does not change.

The actual bug documented in commit 8f8c04bf1e
can be fixed by extra sanitization in separate patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:21:31 -04:00
Oleksandr Suvorov
6eea9408ac spl: ahci: Fix dependency for SPL_AHCI_PCI
The option SPL_SATA_SUPPORT is renamed to SPL_SATA. Fix the option
name.

Fixes: 73059529b2 ("ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Acked-by: Pali Rohár <pali@kernel.org>
2022-08-31 12:16:01 -04:00
Roger Knecht
da223d812b fs: fix comment typo
Fix typo in include/fs.h

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Roger Knecht <rknecht@pm.me>
2022-08-31 12:16:01 -04:00
Heiko Thiery
a638bd349e kbuild: add KBUILD_HOSTLDFLAGS to cmd_host-csingle
When compiling executables from a single.c file, the linker is also
invoked. Pass the flags like the other linker commands.

cherry-pick kbuild change from Linux:

63185b46cdb3 (kbuild: use HOSTLDFLAGS for single .c executables)

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:16:01 -04:00
Matwey V. Kornilov
bf6376642f board: ti: common: board_detect: Fix EEPROM read quirk
There are three different kinds of EEPROM possibly present on boards.
  1. 1byte address. For those we should avoid 2byte address in order
     not to rewrite the data. Second byte of the address can potentially
     be interpreted as the data to write.
  2. 2byte address with defined behaviour. When we try to use 1byte
     address they just return "FF FF FF FF ... FF"
  3. 2byte address with undefined behaviour (for instance, 24LC32AI).
     When we try to use 1byte address, then their internal read
     pointer is changed to some value. Subsequential reads may be
     broken.

To gracefully handle both case #1 and case #3 we read all required
data from EEPROM at once (about 80 bytes). So either all the data is
valid or we fallback to 2byte address.

Cc: Nishanth Menon <nm@ti.com>
Fixes: a58147c2db ("board: ti: common: board_detect: Do 1byte address checks first.")
Reference: https://lore.kernel.org/all/CAJs94Ebdd4foOjhGFu9Bop0v=B1US9neDLxfhgcY23ukgLzFOQ@mail.gmail.com/
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
2022-08-31 12:16:01 -04:00
Joel Stanley
cb735173e7 gitlab-ci: Update comment about the Dockerfile
It's found in the u-boot tree now.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-08-31 12:16:01 -04:00
Rasmus Villemoes
04a20ca5dc common/console.c: prevent pre-console buffer contents from being added to itself
I do not have any non-serial output devices, so a
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL)
does nothing for me.

However, I was manually inspected the pre-console buffer using md.b,
and I noticed that the early part of it was repeated. The reason is
that the first call of print_pre_console_buffer(), from
console_init_f(), ends up invoking puts() with the contents of the
buffer at that point, and puts() at that point ends up in the else
branch of

	if (gd->flags & GD_FLG_DEVINIT) {
		/* Send to the standard output */
		fputs(stdout, s);
	} else {
		/* Send directly to the handler */
		pre_console_puts(s);
		serial_puts(s);
	}

so indeed the contents is added again.

That can be somewhat confusing (both when reading the buffer manually,
but also if it did actually come out on some device). So disable all
use of the pre-console buffer while print_pre_console_buffer() is
emitting it.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-31 12:16:01 -04:00
Tom Rini
1573b6a869 Merge tag 'dm-pull-26aug22' of https://source.denx.de/u-boot/custodians/u-boot-dm
binman/patman documentation improvements
other minor fixes
2022-08-27 08:07:09 -04:00
Tom Rini
cd3872ce7e Merge branch '2022-08-26-assorted-fixes'
- PCIe, NVMe and 2 UBIFS related fixes
2022-08-27 08:05:15 -04:00
Pali Rohár
53a9f9ef87 distroboot: ubifs: Add support for specifying UBI header offset
Some UBI partitions may use non-standard UBI header offset. For attaching
these UBI partitions it is required to pass second argument with offset to
"ubi part" command.

Therefore extend distroboot to allow specifying additional optional 6th
argument with UBI header offset. This offset is set in new distroboot
variable ${bootubioff} which may be used by distroboot script to e.g.
properly pass this value to linux kernel command line for proper mounting
of rootfs by kernel. This variable is set to empty string (cleared) when
UBI header offset is not specified into distroboot BOOT_TARGET_DEVICES
macro.

Usage of helper macro BOOTENV_DEV_UBIFS_BOOTUBIOFF in this change is there
as a type check. It ensures that in BOOT_TARGET_DEVICES macro was specified
UBIFS func with either 5 or 6 arguments. If not then cpp throws compile
error.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-26 20:45:15 -04:00
Dario Binacchi
c2ee5ee7b3 Rename disto_[pxe_]getfile to distro_[pxe_]getfile
Replace 'disto' with 'distro' since they are all functions about distro
booting.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-26 16:33:48 -06:00
Simon Glass
2d74226f2c vbe: Enable command only with BOOTSTD_FULL
Avoid enabling this command by default. This saves about 1KB of code
space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-26 16:33:48 -06:00
Stefan Herbrechtsmeier
5cb0b25666 binman: Sort tests and rework test-file numbers
Tests should be in order of the test-file numbers. Sort the tests
according to the test-file numbers and rework the test-file numbers to
eliminate duplicate numbers.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:33:48 -06:00
Simon Glass
86e54468ec binman: Document how to handle dependent images
Binman does not support this properly at present. Add documentation about
it including a work-around.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:33:48 -06:00
Simon Glass
071286021a binman: Mention split-elf in the main docs
Since we are talking about ATF, add mention of this new feature too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Simon Glass
65af8f2c60 patman: Tidy up unnecessary blank lines and numbers
Quite a few blank lines are not needed here. Drop these and use the #
mechanism to number paragraphs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Simon Glass
74eaa5c661 patman: Fix version table
One of the changes to the version table was made by mistake. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Heinrich Schuchardt
49740e0255 boot: simplify bootmeth_vbe_simple_ft_fixup()
Don't assign a value to a variable if it is not used afterwards.
Move variables to the code fragment where they are used.

Addresses-Coverity: CID 356243 ("Code maintainability issues (UNUSED_VALUE)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Heinrich Schuchardt
d81eeacd48 boot: fix vbe_find_first_device()
uclass_find_first_device() may return NULL if no device for the uclass
exists. Handle this case gracefully.

Addresses-Coverity: CID 356244 ("Null pointer dereferences (FORWARD_NULL)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Sergei Antonov
a7091f3f8c dm: core: fix a typo in help text
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Simon Glass
5e730d9cf9 doc: Build documentation in parallel
With the addition of the revision stats this now takes over a minute. Use
a parallel build to reduce it a bit (24 seconds for me).

Series-changes; 2
- Use '-j auto' instead

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-26 16:32:59 -06:00
Stefan Herbrechtsmeier
2f03a639f3 disk: part: remove dependency to ubifs for spl
The spl doesn't support ubifs and thereby doesn't provide the
ubifs_is_mounted function. Remove the dependency to ubifs for the spl.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2022-08-26 15:00:33 -04:00
Hector Martin
e9ac3a939d nvme: Do a clean NVMe shutdown
The brute-force controller disable method can end up racing controller
initialization and causing a crash when we shut down Apple ANS2 NVMe
controllers. Do a proper controlled shutdown, which does block until
things are quiesced properly. This is nicer in general for all
controllers.

Signed-off-by: Hector Martin <marcan@marcan.st>
Tested-by: Mark Kettenis <kettenis@openbsd.org> (firefly-rk3399)
2022-08-26 15:00:05 -04:00
Pali Rohár
d9f554b624 pci: Add checks to prevent config space overflow
PCIe config space has address range 0-4095. So do not allow reading from
addresses outside of this range. Lot of U-Boot drivers do not expect that
passed value is not in this range. PCI DM read function is extended to
fill read value to all ones or zeros when it fails as U-Boot callers
ignores return value.

Calling U-Boot command 'pci display.b 0.0.0 0 0x2000' now stops printing
config space at the end (before 0x1000 address).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-26 14:59:21 -04:00
Tom Rini
aea087a665 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kirkwood: pogo_v4 & nsa310s: Add distro boot (Tony)
- kirkwood: add DM timer support and use it on lsxl boards (Michael)
- kirkwood: convert the Buffalo Linkstation LS-CHLv2 and XHL boards
  to DM (Michael)
- mvebu: turris_mox/omnia: misc improments (Pali)
- mvebu: mbus: Fix mbus driver to work also after U-Boot relocation (Pali)
2022-08-23 15:44:54 -04:00
Tom Rini
1247c35c80 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-23 15:24:14 -04:00
Michael Walle
560a5c3bb3 board: lsxl: update the README
Update the board's README to reflect all the recent changes.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:34 +02:00
Michael Walle
5dbf2f0de7 board: lsxl: disable eth0
The board has only one network interface. The linux kernel will
gracefully skip a the ethernet interface if no connected PHY could be
probed. u-boot on the other hand will throw an error message. The kernel
device tree is about to be fixed. For now, just disable the ethernet
interface in our -u-boot.dtsi.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:27 +02:00
Michael Walle
d9055e8656 board: lsxl: convert to CONFIG_TIMER
Enable the orion timer driver and we are good.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:23 +02:00
Michael Walle
7e3084eda4 board: lsxl: convert to DM_SERIAL
DM_SERIAL needs early malloc. The on-chip RAM is pretty tight, it's only
2kiB, with DM_SERIAL enabled, this doesn't work anymore. Fortunately for
us, we don't need the on-chip RAM because the DRAM is already
initialized before u-boot starts. Just put the early malloc area there
and use the default early malloc size.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:16 +02:00
Michael Walle
cb75d02ab1 board: lsxl: convert to DM_ETH
Just enabling the Kconfig option for DM_ETH and DM_MDIO is enough.
Additionally, we can remove the old hardcoded config.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:11 +02:00
Michael Walle
7c9bd92eea board: lsxl: convert to DM_GPIO
Use the new mvebu GPIO driver and convert all the function calls to the
former kirkwood GPIO driver. This means that we are now using the LED
uclass and the regulator uclass. Unfortunately, the GPIO LED doesn't
offer a blinking method. Thus we are now stuck with solid on and off
states, which makes debugging a bit harder. Also, there is no GPIO fan
driver for now.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:06 +02:00
Michael Walle
aa088beac3 board: lsxl: make last resort recovery more reliable
If something is wrong with the environment, we cannot rely on a proper
u-boot operation anymore. In fact, it is possible, that we never reach
misc_init_r() with a broken environment.

Also don't enable the netconsole by environment settings. This way the
user don't have to reconfigure the environment. Instead the network
console is only enabled when the push button is pressed during boot.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:40:00 +02:00
Michael Walle
18794c192a board: lsxl: enable ATAGS support
We still need to be able to boot legacy images. Esp. the debian
installer will have a kernel with an appended DTB.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:55 +02:00
Michael Walle
f5631b2c84 board: lsxl: use proper *_r variables
Use the common kernel_addr_r, ramdisk_addr_r and fdt_addr_r variable
names.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:49 +02:00
Michael Walle
148b3aef9a board: lsxl: reorder image loading and remove ramdisk_len
We can load the ramdisk as the last step. This way we don't have to set
the intermediate variable 'ramdisk_len' and can remove it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:45 +02:00
Michael Walle
111e1e110b board: lsxl: use CONFIG_DEFAULT_FDT_FILE
Drop our own CONFIG_FDTFILE handling in favor of the generic
CONFIG_DEFAULT_FDT_FILE one.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:41 +02:00
Michael Walle
7717c2faf8 board: lsxl: automatically select CONFIG_MISC_INIT_R
The board code needs this to be set. Otherwise, the recovery mechanism
doesn't work. Therefore, select this option automatically with the
board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:36 +02:00
Michael Walle
b6a0683fe6 board: lsxl: remove unused header files
Cleanup the included header files in the board code. These are all
leftovers from earlier days.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:31 +02:00
Michael Walle
48f80e28a2 board: lsxl: remove CONFIG_ENV_OVERWRITE
This is not needed. The user can force setting the variables with
"setenv -f".

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:27 +02:00
Michael Walle
857065403a board: lsxl: remove eraseenv script
This is not needed. The user can do a "env default -f -a".

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:22 +02:00
Michael Walle
29c670b70f board: lsxl: remove unused features
Make the binary smaller by removing unused features.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:16 +02:00
Michael Walle
a39f3dc351 board: lsxl: limit size to 384kiB
The board only has a 4Mbit flash and two sectors are reserved for the
u-boot environment and the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:11 +02:00
Michael Walle
1b34339c50 button: gpio: add DM_GPIO dependency
The gpio-button driver depends on DM_GPIO, add it to Kconfig to avoid
build errors.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:06 +02:00
Michael Walle
e9e73d78a8 timer: add orion-timer support
Add timer support for Kirkwood and MVEBU devices.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:00 +02:00
Michael Walle
78c9b85df8 arm: kirkwood: make it CONFIG_TIMER aware
If we switch to CONFIG_TIMER, we don't need the legacy timer macros and
functions anymore. Add the proper guards to exclude them from compiling.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:38:54 +02:00
Pali Rohár
f395cf9cac arm: kirkwood: 88f6281: Detect CONFIG_SYS_TCLK from SAR register
Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz.
This information is undocumented in public Marvell Kirkwood Functional
Specifications [2], but is available in Linux v3.15 kirkwood code [1].

Commit 8ac303d49f ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
broke support for Marvell 88F6281 SoCs because it was expected that all
those SoCs have TCLK running at 200 MHz as specified in Marvell 88F6281
Hardware Specifications [3].

Fix broken support for 88F6281 by detecting CONFIG_SYS_TCLK from SAR
register, like it was doing Linux v3.15.

[1] - https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
[2] - https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
[3] - https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf

Update by Stefan 2022-08-23:
- Fix compilation error for ds109

Fixes: 8ac303d49f ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:38:47 +02:00
Michael Walle
616278bd2c time: move the CONFIG_SYS_TIMER_RATE handling to the compiler
CONFIG_SYS_TIMER_RATE might be a dynamic value, i.e. a function call
instead of a static value, thus it has to be evaluated at runtime. If it
is a static value, the compiler should be able to optimize the unused
branches out.

This will be needed for kirkwoods dynamic CONFIG_SYS_TCLK setting.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:38:30 +02:00
Tony Dinh
7875f8019c arm: kirkwood: nsa310s: Add Distro boot capability
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
	- Remove Gerald from maintainer list (email bounced)
	- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
	kernel method of booting (e.g. OpenWrt) with appended DTB.
	- Add CONFIG_UBIFS_SILENCE_MSG to reduce binary size.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-pali@kernel.org/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-08-23 12:35:37 +02:00
Pali Rohár
5692e5b244 arm: mvebu: mbus: Fix mbus driver to work also after U-Boot relocation
mbus driver is initialized from arch_cpu_init() callback which is called
before relocation. This driver stores lot of functions and structure
pointers into global variables, so it is data position dependent.

Therefore after relocations all pointers are invalid and driver does not
work anymore as all pointers referes to the old memory, which overlaps with
CONFIG_SYS_LOAD_ADDR and ${loadaddr}.

For example U-Boot fuse command crashes if loadaddr memory is cleared or
rewritten by some image loaded by U-Boot load command.

  mw.w ${loadaddr} 0x0 10000
  fuse read 0 1 2

Fix this issue by removing of all mbus global variables in which are stored
pointers to structures or functions which changes during relocation. And
replace it by direct function calls (not via pointers). With this change
fuse command finally works.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:35:37 +02:00
Pali Rohár
c02eff8fcf arm: mvebu: turris_mox: Set "sfp" label in eth1 DT node when only Mox SFP is detected
When Mox SFP module is connected after Topaz or Peridot module then port DT
node already contains "sfp" label. But Mox SFP module can be connected also
without Topaz or Peridot module in which case it is connected directly into
he eth1 DT node, which is without any label. So add "sfp" label into eth1
DT node in this case.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:35:37 +02:00
Pali Rohár
455f55e4a3 arm: mvebu: turris_omnia: Show MCU version
There are already more MCU firmware versions for Turris Omnia in
production, so display git commit (version) of the MCU firmware during
U-Boot startup. It will help to identify what version of MCU firmware is
Turris Omnia using.

MCU firmware for Turris Omnia is open source and available at website:
https://gitlab.nic.cz/turris/hw/omnia_hw_ctrl

It can be updated from running system via i2c bus with this tool:
https://gitlab.nic.cz/turris/omnia-mcutool

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:35:37 +02:00
Tony Dinh
5a86d67e31 arm: kirkwood: pogo_v4: Add Distro boot capability
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
	- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
	kernel method of booting (e.g. OpenWrt) with appended DTB.
	- Add CONFIG_LTO and CONFIG_UBIFS_SILENCE_MSG, and disable some
	unused configs	to reduce binary size.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-pali@kernel.org/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-08-23 10:48:59 +02:00
Pali Rohár
397626ced6 arm: mvebu: Define env_sf_get_env_addr() for all Armada boards in SPL
SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM.
Proper U-Boot removes this direct mapping. So it is available only in SPL.
This applies for all 32-bit Armada BootROMs. SPL mvebu code is used only on
32-bit Armada SoCs. So move env_sf_get_env_addr() function from Turris
Omnia board to common SPL mvebu code and add proper checks for SPI0 CS0.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 10:48:59 +02:00
Tom Rini
1d323d8306 Prepare v2022.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-22 18:54:48 -04:00
Tom Rini
850ac7ceb7 Merge tag 'dm-pull-20aug22' of https://source.denx.de/u-boot/custodians/u-boot-dm
binman fixes for various things
binman clean-up of compression and addition of utilities
2022-08-22 12:41:07 -04:00
Tom Rini
61e887fb9c Merge branch '2022-08-22-platform-removals-CI-updates'
- Remove a few more platforms, update CI to Ubuntu 22.04 and perform
  some other other minor updates to Azure.
2022-08-22 12:32:52 -04:00
Tom Rini
b6d4e0850b CI: Move to Ubuntu 2022.04 "Jammy" for CI base
- We now have a new enough sbsigntools in the distro, stop building.
- Use the 20220801 tag for Jammy.
- Move to pygit2 1.9.2 (current version) as the old one doesn't build on
 "Jammy".
- Add the working directory to the list of safe directories for git.
- Move to pytest 6.2.5 to address other issues.
- This move exposed a number of minor issues in the existing scripts we
  used within CI to perform the jobs themselves.  The most notable changes
  here involve using 'set +e / set -e' to enforce when we should or should
  not make non-zero buildman status be a fatal error.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-22 08:01:34 -04:00
Tom Rini
05f958f8a2 CI: Azure: Merge PowerPC jobs in to one
At this point given the number of PowerPC platforms we have, a single
job to build them all fits within the time limit we have in Azure.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 22:46:02 -04:00
Holger Brunck
845102cbe9 powerpc: remove support for kmtergr1 and MPC8309
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-08-20 22:45:00 -04:00
Tom Rini
c50ff4a933 arm: Remove warp board
This board is missing migration to CONFIG_DM, which had a deadline of
v2020.01, which is now more than 2 years passed due.  Remove it.

Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 22:45:00 -04:00
Tom Rini
f5abb5b110 Merge branch '2022-08-20-enforce-DM_ETH-migration'
Enforce requiring DM_ETH to be enabled for ethernet drivers, as the
migration deadline has well passed. To facilitate this, we remove some
non-migrated platforms and disable networking on a few others. Finally
we remove some of the now-useless non-DM_ETH code in some platforms as a
prerequisite for DM_ETH being set.
2022-08-20 22:39:42 -04:00
Tom Rini
94633c36f9 net: Make DM_ETH be selected by NETDEVICE
The deadline for DM_ETH migration passed 2 years ago.  Now that
platforms which cannot be migrated have been either removed or had
drivers disabled, and platforms that needed minor help to migrate have
been forcefully migrated, we can complete the migration.

This entails select'ing DM_ETH under NETDEVICES, and then removing now
extraneous depends on lines.  In a few places, we can now either remove
options or just simplify later dependencies.

Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
4b8dd4c5a2 smdkc100: Remove legacy non-DM_ETH code
Now that we are about to enable DM_ETH by default, remove legacy code.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-08-20 21:18:15 -04:00
Tom Rini
2b882f3d96 warp7: Remove legacy non-DM_ETH code
Now that we are about to enable DM_ETH by default, remove legacy code.

Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
7a83f2bac9 vinco: Remove legacy non-DM_ETH code
Now that we are about to enable DM_ETH by default, remove legacy code.

Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
6dcca22f77 ls1021aqds/ls1021aiot: Remove legacy non-DM_ETH code
Now that we are about to enable DM_ETH by default, remove legacy code.

Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
c39d789f49 am335x_sl50: Disable SPL_NET
Now that we are about to enable DM_ETH by default, disable SPL_NET as
SPL_DM is not enabled currently.

Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
cd31c5315e igep00x0: Disable networking
This platform needs to be converted to use DM_ETH as the deadline is 2
years passed due.  Disable networking support for now.

Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
a2504a1bd2 net: ks8851_mll: Remove legacy non-DM_ETH code and callers
As this driver has been converted to DM_ETH and the migration deadline
is 2 years passed, remove the legacy code and callers.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
a34f971d97 mpc8548cds: Guard old ethernet code with !DM_ETH
There is some code here for the legacy non-DM_ETH case, add a guard
around it.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
0040ed7e0c ppc: Remove corenet_ds boards
These boards have been orphaned for some time and are behind on various
DM migrations. Remove them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
cd9b71c3f6 layerscape: Disable CONFIG_FMAN_ENET on *aqds* platforms
The *aqds* platforms have not been migrated to be able to enable
CONFIG_DM_ETH with CONFIG_FMAN_ENET. Disable CONFIG_FMAN_ENET on these
platforms.

Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
adae2ed62d fsl-mc: Update dependencies for DM_ETH
When using DM_ETH, which should be the default now, we need to always
have DM_MDIO and FSL_LS_MDIO enabled, so select them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Wasim Khan <wasim.khan@nxp.com>
Cc: Udit Agarwal <udit.agarwal@nxp.com>
Cc: Ashish Kumar <Ashish.Kumar@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Manish Tomar <Manish.Tomar@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
9d7add8ac9 net: lpc32xx_eth.c ethernet driver
This driver has not been converted to DM_ETH.  The migration
deadline passed 2 years ago.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
40463b9c4a arm: Remove kzm9g board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
0fb054b3f7 arm: Remove armadillo-800eva board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
d8d5ab40d5 arm: Remove cm_t335 board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
5663b137e6 arm: Remove edminiv2 board
This board is not converted to use CONFIG_DM, well passed the migration
deadline.  Remove it.

Cc: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 21:18:15 -04:00
Fabio Estevam
30da76be5c mx28evk: Remove AUART/NAND/SPI variants
To ease maintenance, let's keep only the main mx28evk_defconfig
and remove the other variants that have not been migrated to DM.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-08-20 21:18:14 -04:00
Stefan Herbrechtsmeier
cd15b640b0 binman: Add zstd bintool
Add zstd bintool to binman to support on-the-fly compression.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
432a825520 binman: Add xz bintool
Add xz bintool to binman to support on-the-fly compression.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
7b26a4608c binman: Add lzop bintool
Add lzop bintool to binman to support on-the-fly compression.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
0f369d7992 binman: Add gzip bintool
Add gzip bintool to binman to support on-the-fly compression of Linux
kernel images and FPGA bitstreams. The SPL basic fitImage implementation
supports only gzip decompression.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename the module and support this, since gzip.py is a system module:
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
45aa279800 binman: Add bzip2 bintool
Add bzip2 bintool to binman to support on-the-fly compression.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
867eed1284 binman: Add BintoolPacker class to bintool
Add a bintools base class for packers which compression / decompression
entry contents.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped dead/untested code in version():
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
da1af35c2f binman: Add compression tests
Add common test functions to test all supported compressions.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
c3665a896e binman: Support missing compression tools
Handle missing compression tools by returning empty data and record
missing bintool.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
ec7d27d3a8 binman: Move compression bintool management into entry class
Move management of the bintool to compress and decompress data into the
entry class and add the bintool to the list of required bintools.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
edafeb8da6 binman: Select compression bintools in cbfs_util class
Select the lz4 and lzma_alone bintools in cbfs_util class to centralize
the supported compression algorithm evaluation inside the class and over
multiple classes.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
cbe2e75d00 binman: Move compression bintools creation into test setup
Move compression bintools (packer) creation into test setup to reuse
bintool objects between tests.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Put comp_util import back in, since it is still needed here:
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
4f463e3dee binman: Remove obsolete compressed data header handling
Remove the obsolete compressed data header handling from the utilities
to compress and decompress data. The header is uncommon, not supported
by U-Boot and incompatible with external compressed artifacts.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
9f74395ee5 binman: Disable compressed data header
Disable the compressed data header of the utilities to compress and
decompress data. The header is uncommon, not supported by U-Boot and
incompatible with external compressed artifacts.

The header was introduced as part of commit eb0f4a4cb4 ("binman:
Support replacing data in a cbfs") to allow device tree entries to be
larger than the compressed contents.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
6aa8000e74 binman: Add length header attribute to dtb entry
Add an optional length header attribute to the device tree blob entry
class based on the compressed data header from the utilities to compress
and decompress data.

If needed the header could be enabled with the following
attribute beside the compress attribute:
  prepend = "length";

The header was introduced as part of commit eb0f4a4cb4 ("binman:
Support replacing data in a cbfs") to allow device tree entries to be
larger than the compressed contents. Regarding the commit "this is
necessary to cope with a compressed device tree being updated in such a
way that it shrinks after the entry size is already set (an obscure
case)". This case need to be fixed without influence any compressed data
by itself.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
204a27bbb2 binman: Add DecompressData function to entry class
Add a DecompressData function to entry class to allow override in child
classes and to centralize the compress and decompress in a single class.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
fa24f5578c binman: Check only section data in multi section test
Check only section data instead of the rest of the image in multi
section test.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
917b3c37ae binman: Collect bintools before usage
Collect and thereby initialize bintools before any usage but after
generation of entries. This is needed to handle bintools for compress
and decompress like other bintools.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
a555965141 binman: Forward AddBintools calls to base class
Forward AddBintools calls to base class to collect bintools of base
class.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
9069d55c22 binman: Forward AddBintools calls to sub entries in cbfs_util
Forward AddBintools calls to sub entries in cbfs_util to collect
bintools of sub entries.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:33 -06:00
Stefan Herbrechtsmeier
facc378a86 binman: Avoid duplicates in bintool lists
Avoid duplicate entries in the list of bintools used by the image and
the list of missing bintools.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Stefan Herbrechtsmeier
6ac7a83e4d binman: Skip elf tests if python elftools is not available
Skip tests which requires python elftools if the tool is not available.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
d626e825f5 binman: Allow collection to use entries from other sections
At present the collections etype only works with entries in the same
section. This can be limiting, since in some cases the data may be inside
a subsection, e.g. if there are alignment constraints.

Add a function to find the entries in an etype and have it search
recursively. Make use of this for mkimage also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
9db9e932c7 binman: Allow passing entries using -n
Also control over what goes in the file passed with -n using a separate
imagename subnode. This can include a section or any other entry type.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
dfe1db4030 binman: Allow the image name to be the data file
Some image types use the -n parameter to pass in the data file. Add
support for this, with a new property.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
e9b5e31a12 binman: Improve mkimage documentation
Expand this a little to make things clearer. Also drop the invalid
entry arg.

Series-changes 2
- Make it clear that -d data is concatenated/collected by binman
- Fix mulitple typoe
- Reword a sentence for grammar

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
73593e499c binman: Avoid use of expected failure
The testReplaceSectionSimple() test is the only one which expects failure.
It looks odd in the output and takes time to glance at it to see that all
is in fact well. Also it does not check that the right exception is
generated.

Use the more common (in binman) approach of checking for an exception.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
1c65a54d6d binman: Adjust mkimage etype node reading
Since this is implemented as a section, it should really be split into
several functions, one to read the node and one to read the entries. Do
this so that it matches how Entry_section works.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
cdadadab7d binman: Add a way to check for missing properties
Some new entries are likely to have required properties. Support this in a
standard way, with a list of required properties which can be set up by
base classes. Check for missing properties when the entry is read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
24474dc20a binman: Fix up the entry-docs for Entry_pre_load
This has got out of sync and needs a line wrap. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
10463136fd patman: Don't buffer test output with a single test
When a single test is run we don't need to buffer the test output. This
has the unfortunate side effect of suppressing test output, in particular
the binman output directory normally printed with the -X option. This is
a huge problem since it blocks debugging of tests.

We don't actually know how many tests will be run when we set up the
suite, so as a work-around, assume that test_name being specified
indicates that there is likely only one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
8816edabbd patman: Put the coverage command-line last
Put this at the end so it is easier to copy it from the terminal.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Michal Simek
55bc22760c bootstage: Show func name for bootstage_mark/error
bootstage_mark() and bootstate_error() are not recording any name and in
report it is showing as id=<value>. That's not useful and it is better to
show function name which calls it.
That's why use macros with passing __func__ as recorded name for bootstage.

Origin report looks like this:
ZynqMP> bootstage report
Timer summary in microseconds (10 records):
       Mark    Elapsed  Stage
          0          0  reset
  2,482,383  2,482,383  board_init_f
  4,278,821  1,796,438  board_init_r
  4,825,331    546,510  id=64
  4,858,409     33,078  id=65
  4,862,382      3,973  main_loop
  4,921,713     59,331  usb_start
  9,345,345  4,423,632  id=175

When this patch is applied.
ZynqMP> bootstage report
Timer summary in microseconds (31 records):
       Mark    Elapsed  Stage
          0          0  reset
  2,465,624  2,465,624  board_init_f
  4,278,628  1,813,004  board_init_r
  4,825,139    546,511  eth_common_init
  4,858,228     33,089  eth_initialize
  4,862,201      3,973  main_loop
  4,921,530     59,329  usb_start
  8,885,334  3,963,804  cli_loop

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
76a9d96feb log: Drop log_nop() functions
These functions are not needed anymore since we now have logic which can
output to the console if logging is disabled. Drop the declarations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Simon Glass
7960a0a289 binman: Put fake files in a subdirectory
At present fake files from a previous build appear to be real files for
a subsequent build, since they sit in the output directory.

This can cause problems, since binman may need to parse the file, e.g.
with the Intel description.bin files.

Fix this by putting them in a 'binman-fake' subdirectory. Keep a track
of the fake filename so we only create it once. Subsequent builds will
still see that the file is missing and mark it as fake.

Update a few tests to check the behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:07:32 -06:00
Tom Rini
3212be5e24 Merge branch '2022-08-20-assorted-updates'
- Assorted updates including some updates to the rx_51 platform
2022-08-20 19:00:10 -04:00
Dhananjay Phadke
65523d28b9 gpio: aspeed: port Linux dt-bindings header file
Makes it easier to add readable GPIO definitions in DTS files
for Aspeed SOC based boards.

Ported with small edits to add IBM copyright statement and fix
for checkpatch warning.

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Billy Tsai <billy_tsai@aspeedtech.com>
Acked-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-08-20 18:12:51 -04:00
Pali Rohár
a871af2d5a hwconfig: Allow to use restricted env
During early boot phase GD_FLG_ENV_READY is not set but env_get() may work
when env is ready in restricted mode. Do not fail with error message
"WARNING: Calling __hwconfig without a buffer and before environment is ready"
when env is already working by checking for ENV_VALID flag.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 18:12:51 -04:00
Simon Glass
cc0b36536b arm: k3: Correct an awk warning
The k3_gen_x509_cert.sh script produced this warning on gitlab and also
on my machine, e.g. with j7200_evm_r5:

awk: cmd. line:1: warning: regexp escape sequence `\ ' is not a known
   regexp operator

There is no need to escape spaces, so drop the backslashes. Also split
the line so it is a more reasonable length.

This script should really be deleted and binman used instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:12:51 -04:00
Rasmus Villemoes
4b05301979 arm64: explicitly disable pointer authentication instructions
The Yocto project builds their aarch64 cross-compiler with the
configure knob --enable-standard-branch-protection, which means that
their gcc behaves as if -mbranch-protection=standard is passed; the
default (lacking that configure knob) is -mbranch-protection=none.

This means that when building U-Boot using the Yocto toolchain, most
functions end up containing paciasp/autiasp/bti instructions. However,
since U-Boot is not an ordinary userspace application, there's no OS
kernel which has set up the required authentication keys, so these
instructions do nothing at all (even on arm64 hardware that does have
the pointer authentication capability). They do however make the image
larger.

It is theoretically possible for U-Boot to make use of the pointer
authentication protection - cf. the linux kernel's
CONFIG_ARM64_PTR_AUTH_KERNEL - but it is far from trivial, and it's
hard to see just what threat model it would protect against in a
bootloader context. Regardless, we certainly have none of the required
infrastructure now, so explicitly pass -mbranch-protection=none to
ensure those useless instructions do not get emitted.

For a toolchain not configured with
--enable-standard-branch-protection, this changes nothing. For the
Yocto toolchain, this reduces the size of both SPL and U-Boot proper
by about 3% for my imx8mp target.

If you don't have a Yocto toolchain, the effect can easily be
reproduced by applying this patch and changing =none to =standard.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:12:37 -04:00
Matwey V. Kornilov
297c439b37 Restore pcm051_rev3_defconfig config
pcm051_rev3_defconfig config (Phytec Wega board) has been dropped in

    64efd11d ("arm: Remove pcm051 board")

due to expired migration deadlines. Here, pcm051_rev3_defconfig support is
reintroduced.

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-20 16:40:14 -04:00
Pali Rohár
9ca6c91732 Nokia RX-51: Move board required options from defconfig to Kconfig
Some of config options are board specific and should be set in into their
default values automatically. So move them from defconfig file to Kconfig
definitions to ensure that possible user custom defconfig files would have
these required options also enabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:18:40 -04:00
Pali Rohár
0ba6ce4b78 Nokia RX-51: Simplify calculation of attached kernel image address
Now when board starup code does not copy image to CONFIG_SYS_TEXT_BASE
address there is no need to calculate all addresses from base address at
runtime. The only address which needs to be calculated is attached kernel
image address which can be simplified at compile time without need to know
CONFIG_SYS_TEXT_BASE address or relocation address at the runtime.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:17:50 -04:00
Pali Rohár
04bd87c24c Nokia RX-51: Simplify copy kernel code
Expression (r + (r0 - r1)) produce same result as (r - (r1 - r0)). So it
does not matter which one is called. Always call the first option and
remove second one.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:17:50 -04:00
Pali Rohár
c5be5f6f54 Nokia RX-51: Use U-Boot generic position independent code
Switch from custom board specific fixup/copy code to U-Boot generic
position independent code provided by config option POSITION_INDEPENDENT.

This also slightly decrease size of u-boot.bin binary (by 52 bytes). Note
that option POSITION_INDEPENDENT increase size but not more than custom
board fixup/copy code which is being deleted (as it is not needed anymore).

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:17:50 -04:00
Pali Rohár
7c4ad98217 Nokia RX-51: Fix invalidating zImage kernel format
Prior starting copy of kernel image to target location, invalidate also
zImage magic header. This ensures that on target location would be image
with valid header only in the case valid header was also in the source
location and copy from source to target finished successfully. Copy is
always skipped when kernel image in source location is invalid.

Add also comment to the code which explain what is the code doing.

Fixes: cc434fccba ("Nokia RX-51: Add support for booting kernel in zImage format")
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:17:50 -04:00
Pali Rohár
012d4be439 arm: Set default MACH_TYPE in Kconfig
For boards which requires correct MACH_TYPE, set their correct default
values directly in Kconfig.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20 16:17:50 -04:00
Neil Armstrong
23dc815c50 MAINTAINERS: Update email of Neil Armstrong
My professional e-mail will change and the BayLibre one will
bounce after mid-september of 2022.

This updates the MAINTAINERS files and adds an entry in the
.mailmap file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-08-20 16:17:50 -04:00
Tom Rini
e9a4a176de Merge tag 'efi-2022-10-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc3-2

Documentation:

* improve description of device probing
* describe booting RISC-V with KVM and QEMU

UEFI

* fix Makefile for mkeficapsule
2022-08-20 13:26:17 -04:00
Heiko Thiery
2a4fb47533 tools: mkeficapsule: use pkg-config for each lib separat
Call pkg-config for each library individually.
This improves fallback handling.

Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: 31a7688cbe ("tools: mkeficapsule: use pkg-config to get -luuid and -lgnutls")
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-20 08:38:12 +02:00
AKASHI Takahiro
ab31c8a158 efi_loader: disk: remove unused field
The field, ifname, in efi_disk_obj is set but never used anywhere.
Just remove it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-20 08:38:12 +02:00
Michal Suchanek
8f666cbb75 doc: dm: clarify activation.
Explain when devices should get activated.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-20 08:38:12 +02:00
Heinrich Schuchardt
7556927fc0 doc: qemu-riscv: describe booting with QEMU and KVM
The ELF U-Boot image produced by qemu-riscv64_smode_defconfig can be
used to boot with QEMU and KVM.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-20 08:38:12 +02:00
Tom Rini
1ea6966687 Merge tag 'fsl-qoriq-2022-8-17' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Enable SPL authentication for ls1021atwr
Fdt fixups for ls1043ardb v7.0 board
2022-08-17 12:10:34 -04:00
Camelia Groza
dfea459f20 board: ls1043ardb: fdt fixups for revision v7.0 boards
The LS1043ARDB rev v7.0 board replaces the AQR105 PHY on MAC9 with an
AQR113C PHY. The address of the PHY on the MDIO bus changes from 0x1 to
0x8. Enable CONFIG_OF_BOARD_FIXUP and update both u-boot and Linux device
trees to reflect this change.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2022-08-16 17:07:33 +08:00
Gaurav Jain
47465877a5 ls1021atwr: caam: Enable Uboot validaion in SPL.
caam driver model enabled in spl for secure boot.
fsl_rsa_mod_exp driver enabled in spl for validating uboot image.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-08-16 17:07:30 +08:00
Tom Rini
20d4c6052f Merge tag 'efi-2022-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc3

Documentation:

* Add HTML documentation for patman
* Improve binman documentation
* Man-page for gpio

UEFI:

* move udevice pointer into struct efi_object
* fix efi_convert_device_path_to_text()

Other:

* fs/erofs: silence messages from  erofs_probe()
2022-08-13 07:37:48 -04:00
Michal Simek
046d7a0bb1 cmd: efidebug: Add missing \n at the end of message
Currently message is not intended that prompt end up at the end of debug
line. For example like this:

DFU alt info setting: done
DFU entities configuration failed!
(partition table does not match dfu_alt_info?)
Firmware update failed: <NULL>
Cannot handle a capsule at 10000000Zynq>

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-13 11:09:49 +02:00
Masahisa Kojima
ee57666294 efi_loader: move udevice pointer into struct efi_object
This is a preparation patch to provide the unified method
to access udevice pointer associated with the EFI handle
by adding udevice pointer into struct efi_object.
The patch also introduces a helper function efi_link_dev()
to link the udevice and EFI handle.

The EFI handles of both EFI block io driver implemented in
lib/efi_loader/efi_disk.c and EFI block io driver implemented
as EFI payload can access the udevice pointer in the struct efi_object.
We can use this udevice pointer to get the U-Boot friendly
block device name(e.g. mmc 0:1, nvme 0:1) through EFI handle.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
e7496e57a0 efi_loader: fix efi_convert_device_path_to_text()
Ensure that the string we convert to UTF-16 is NUL terminated even
if the device path only contains end nodes.

Fixes: bd3d75bb0c ("efi_loader: multi part device paths to text")
Addresses-Coverity: 350434 ("Uninitialized scalar variable")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Simon Glass
7d6fadef84 binman: Add more documentation about binman usage
This is an attempt to answer the comments provided by Xavier [1].

[1] https://lore.kernel.org/all/Yulcol7HpTHtjXTX@begut/

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Simon Glass
228c9b8629 binman: Add rST references for binman entry types
Add references in the documentation for each entry type, so we can refer
to them from other documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-13 11:09:49 +02:00
Simon Glass
37c42b7270 patman: Add documentation to doc/
Link to patman's documentation from the doc/ directory so that it appears
in the 'make htmldocs' output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Simon Glass
9f0a2e77a0 doc: Drop a reference to Travis
This was widely used by U-Boot for a long time, but is not used anymore,
with Gitlab and Azure taking over.

Drop the text.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-08-13 11:09:49 +02:00
Tom Rini
3b706f3d87 doc: develop: Add a note about importing code from other projects
We talk about importing code from other projects in two places. The
first place is in the coding style section, where we explain when to or
not to deviate in terms of white space, etc. In the process
documentation we now add a note about saying where the code was imported
from and to ensure that you do not copy Signed-off-by or other tags.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
ebfa2d2bce doc: crash_dumps.rst missing documentation link
Add link to usage/cmd/exception.rst.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
4d497c8698 doc: add more details for crash dump analysis
* describe crashs in UEFI binaries
* provide architechture specific information for the sandbox and RISC-V

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
1e120337f9 doc: man-page for gpio command
Provide a man-page for the gpio command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Paul Barker
7252f3c16a bootstd: doc: Fix typos
These typos were found while reading the docs.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
f508fad36d fs/erofs: silence erofs_probe()
fs_set_blk_dev() probes all file-systems until it finds one that matches
the volume. We do not expect any console output for non-matching
file-systems.

Convert error messages in erofs_read_superblock() to debug output.

Fixes: 830613f8f5 ("fs/erofs: add erofs filesystem support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Huang Jianan <jnhuang95@gmail.com>
2022-08-13 11:09:49 +02:00
Heinrich Schuchardt
7a7176fa3b git-mailrc: remove invalid entry 'efi'
Remove alias 'efi' with invalid data.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-13 11:09:48 +02:00
Tom Rini
8f9eee8275 Merge branch '2022-08-12-assorted-updates'
- Clean up some code with the DH electronics boards, remove a few boards
  that have had their removal ack'd, update Azure CI hosts for macOS and
  Ubuntu, and migrate a few more symbols to Kconfig.
2022-08-12 21:41:07 -04:00
Tom Rini
ecf1d2741d net: Remove smc91111 ethernet driver
This driver has not been converted to DM_ETH.  The migration deadline
passed 2 years ago.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-12 16:10:50 -04:00
Tom Rini
08f80184a9 arm: Remove snapper9260 board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12 16:10:50 -04:00
Tom Rini
7751f54f91 ppc: Remove ids8313 board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
2022-08-12 16:10:50 -04:00
Tom Rini
40ed7be4af Convert CONFIG_SYS_FDT_PAD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FDT_PAD

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12 16:10:50 -04:00
Tom Rini
ff4e87c030 Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
4143a23794 Convert CONFIG_SYS_FSL_PCIE_COMPAT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCIE_COMPAT

To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
1de46d91dd Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_NUM_CC_PLLS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
c6eec0182a Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
7ae1e6a3a3 Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
8b549c0b23 Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al
This removes the following symbols:
   CONFIG_SYS_FSL_DSPI_BE
   CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
   CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
   CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
   CONFIG_SYS_FSL_DSP_DDR_ADDR
   CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
   CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
   CONFIG_SYS_FSL_ERRATUM_A008751
   CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
   CONFIG_SYS_FSL_ESDHC_NUM
   CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
   CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
   CONFIG_SYS_FSL_ISBC_VER
   CONFIG_SYS_FSL_QSPI_LE
   CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
   CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
   CONFIG_SYS_FSL_SRDS_NUM_PLLS
   CONFIG_SYS_FSL_WDOG_BE
   CONFIG_SYS_GP1DIR
   CONFIG_SYS_GP1ODR
   CONFIG_SYS_GP2DIR
   CONFIG_SYS_GP2ODR
   CONFIG_SYS_HALT_BEFOR_RAM_JUMP
   CONFIG_SYS_HMI_BASE
   FSL_QSPI_FLASH_NUM
   FSL_QSPI_FLASH_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
83505a7e9f arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig
We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
d0748898d8 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Philip Oberfichtner
d084a6cbc9 ARM: stm32: DH: Use common MAC address functions
To reduce code duplication, let the stm32 based DH boards use the common
code for setting up their MAC addresses.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-08-12 16:10:49 -04:00
Philip Oberfichtner
4b238c2cc5 ARM: imx8: DH: Use common MAC address functions
To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their MAC addresses.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-08-12 16:10:49 -04:00
Philip Oberfichtner
e5b89b0382 ARM: imx6: DH: Use common MAC address functions
To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their MAC addresses.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-08-12 16:10:49 -04:00
Philip Oberfichtner
386f921cee board: dhelectronics: Implement common MAC address functions
This is a starting point for unifying duplicate code in the DH board
files. The functions for setting up MAC addresses are very similar for
the i.MX6, i.MX8 and stm32mp1 based boards.

All pre-existing implementations follow the same logic:

(1) Check if ethaddr is already set in the environment
(2) If not, try to get it from a board specific location (e.g. fuse)
(3) If not, try to get it from eeprom

After this commit, (1) and (3) are implemented as common functions,
ready to be used by board specific files.

Furthermore there is an implementation of (2) for imx based boards.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-08-12 16:10:49 -04:00
Tom Rini
24291741f6 CI: Azure: Move to using macOS-12 image
As per https://github.com/actions/virtual-environments/issues/5583 the
macOS-10.15 image is being deprecated.  Move us up to macOS-12.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
b0a23a60dd CI: Azure: Move to Ubuntu 22.04 image
As per https://github.com/actions/runner-images/issues/6002 the Ubuntu
18.04 image is deprecated and will be removed by December 1, 2022.
Move to the Ubuntu 22.04 image as our base for launching our containers
from.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12 16:10:32 -04:00
Tom Rini
6fc212779c Merge branch '2022-08-11-verified-boot-for-embedded-initial-support'
To quote Simon:
This adds the concept of a VBE method to U-Boot, along with an
implementation of the 'VBE simple' method, basically a simple way of
updating firmware in MMC from userspace and monitoring it from U-Boot.

VBE simple is implemented in fwupd. U-Boot's role is to set up the
device tree with the required firmware-update properties and provide the
developer with information about the current VBE state. To that end this
series includes a new 'vbe' command that allows VBE methods to be listed
and examined.

As part of this work, support for doing FDT fixups via the event interface
is provided, along with the ability to write to the device tree via the
ofnode interface.

Another (significant) change is that bootmeths now have a 'global' flag,
to allow the implementation of EFI bootmgr (and VBE) to be cleaned up.
The 'system' bootdev is no-longer needed and these bootmeths are scanned
first.

Further work is needed to pull everything together, but this is a step
along the way.
2022-08-12 12:51:14 -04:00
Simon Glass
5fe76d460d vbe: Add a new vbe command
Add a command to look at VBE methods and their status. Provide a test for
all of this as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
11361c5965 bootstd: Check building without global bootmeths
Use the sandbox_flattree build to check that everything works correctly
with BOOTMETH_GLOBAL disabled.

Update the tests as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
228fe57ad2 bootstd: Update documentation
Add some documentation updates, particularly about global bootmeths.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
0917f77393 bootstd: Add vbe bootmeth into sandbox
Update sandbox to include the VBE bootmeth. Update a few existing tests to
take account of this change, specifically that the new bootmeth now
appears when scanning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
cb47e21acb vbe: Support VBE simple
Add support for VBE simple, which permits firmware update of a single
image stored in MMC or another block device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
4c7418f3ef vbe: Add initial support for VBE
Create a new bootmeth for VBE along with a library to handle finding the
VBE methods.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
98887ab802 event: Add an event for device tree fixups
At present there is a confusing array of functions that handle the
device tree fix-ups needed for booting an OS. We should be able to switch
to using events to clean this up.

As a first step, create a new event type and call it from the standard
place.

Note that this event uses the ofnode interface only, since this can
support live tree which is more efficient when making lots of updates.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
569524741a event: Change EVENT_SPY to global
This creates static records at present, but it causes a problem with clang
and LTO: the linker list records are sometimes dropped from the image.

Fix this by making the records global.

Update to use __used while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
2ff5490d7d bootstd: Drop the system bootdev
This was a work-around for the fact that global bootmeths such as EFI
bootmgr and VBE don't use a particular bootdev, or at least select it
themselves so that we don't need to scan all bootdevs when using that
bootmeth.

Drop the system bootdev entirely.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
bd18b69de1 bootstd: Always create the EFI bootmgr bootmeth
Now that we can separate this out from the normal bootmeths, update the
code to create it always.

We cannot rely on the device tree to create this, since the EFI project
is quite opposed to having anything in the device tree that helps U-Boot
with its processing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
c627cfc14c bootstd: Allow scanning for global bootmeths separately
Typically we want to find and use global bootmeths first, since they have
the best idea of how the system should boot. We then use normal bootmeths
as a fallback.

Add the logic for this, putting global bootmeths at the end of the
ordering. We can then easily scan the global bootmeths first, then drop
them from the list for subsequent bootdev-centric scans.

This changes the ordering of global bootmeths, so update the
bootflow_system() accordingly.

Drop the comment from bootmeth_setup_iter_order() since this is an
exported function and it should be in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
ee8ab07e30 dm: core: Call dm_scan_other() when setting up for tests
At present this function is not called, so tests miss out on any devices
created by it. Add it in so that tests can rely on these extra devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
2b80bc1eee bootstd: Support bootflows with global bootmeths
Add support for handling this concept in bootflows. Update the 'bootflow'
command to allow only the normal bootmeths to be used. This alllows
skipping EFI bootmgr and VBE, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
ee47d4af05 bootstd: Tidy comments in bootflow_scan_bootdev()
Fix a few nits in this function comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
eccb25cd59 bootstd: Allow the bootdev to be optional in bootflows
With global bootmeths we want to scan without a bootdev. Update the logic
to allow this.

Change the bootflow command to show the bootdev only when valid.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
2662b54d70 bootstd: Allow EFI bootmgr to support an invalid bootflow
For most testing we don't want this bootmeth to actually do anything. For
the one test where we do, add a test hook to obtain the correct behaviour.
This will allow us to bind the device always, rather than just doing it
for this test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:10 -04:00
Simon Glass
bc06aa035d bootstd: Allow bootmeths to be marked as global
The current way of handling things like EFI bootmgr is a bit odd, since
that bootmeth handles selection of the bootdev itself. VBE needs to work
the same way, so we should support it properly.

Add a flag that indicates that the bootmeth is global, rather than being
invoked on each bootdev. Provide a helper to read a bootflow from the
bootmeth.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:10 -04:00
Simon Glass
a18686cda1 bootstd: Tidy up var naming in bootdev_setup_iter_order()
Avoid using 'count' to mean either a count or an error, since this is
confusing. In fact, the called function never return 0, since that is an
error.

Use 'ret' instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
988cacaeed bootstd: Provide a bootmeth method to obtain state info
Some bootmeths can provide information about what is available to boot.
For example, VBE simple provides access to the firmware state.

Add a new method for this, along with a sandbox test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
10d16faa43 bootstd: Detect empty bootmeth ordering
If the ordering produces no entries, this is an error. Report it, so that
the caller doesn't try to continue with a NULL bootmeth.

This fixes a crash in the bootflow_iter test when running with the sandbox
'default' device tree, instead of the required 'test' one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
f1c8cbd944 bootstd: Fix comment in bootmeth test
Correct the comment at the top of this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
f25f575acf bootstd: Drop delays in the tests
Some tests go as far as booting a distribution. In this case a menu is
presented to the user, with a two-second timeout. This adds a total of
12 seconds to the test runs at present.

Avoid this by inserting a response using the console-recording feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
e141075f1c dm: core: Support sandbox with read interface
Update the 'read' command to work correctly with sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
55f7990bfe dm: core: Add support for writing u32 with ofnode
Add a new function to write an integer to an ofnode (live tree or
flat tree).

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
39e42be12b dm: core: Allow writing to a flat tree with ofnode
In generally it is not permitted to implement an ofnode function only for
flat tree or live tree. Both must be supported. Also the code for
live tree access should be in of_access.c rather than ofnode.c which is
really just for holding the API-conversion code.

Update ofnode_write_prop() accordingly and fix the test so it can work
with flat tree too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
7b1dfc9fd7 dm: core: Prepare for updating the device tree with ofnode
Add some documentation and a new flag so that we can safely enabled using
the ofnode interface to write to the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
b7eaa4f5e5 dm: core: Tidy up ofnode-writing test
Update this test to use the livetree flag so that special check can be
avoided. Also drop a few blank lines.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
be0789a8ee dm: core: Swap parameters of ofnode_write_prop()
It is normal for the length to come after the value in libfdt. Follow this
same convention with ofnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
6571559449 dm: core: Move ofnode-writing test to ofnode
This fits better in the ofnode tests, so move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
331048471d dm: core: Introduce support for multiple trees
At present ofnode only works with a single device tree, for the most part.
This is the control FDT used by U-Boot.

When booting an OS we may obtain a different device tree and want to
modify it. Add some initial support for this into the ofnode API.

Note that we don't permit aliases in this other device tree, since the
of_access implementation maintains a list of aliases collected at
start-up. Also, we don't need aliases to do fixups in the other FDT. So
make sure that flat tree and live tree processing are consistent in this
area.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
72b338aa2c dm: core: Add a note about how livetree updates work
The unflattening algorithm results in a single block of memory being
allocated for the whole tree. When writing new properties, these are
allocated new memory outside that block. When the block is freed, the
allocated properties remain.

Document how this works and the potential memory leak, as well as
mentioning that updating the livetree is actually supported now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
5063ced278 dm: core: Split out the declaration of ofnode
This is used by a lot of files, but ofnode.h needs to include a lot of
header files. This can create dependency cycles, particularly with
global_data.h which must include various declarations.

Split the core delcarations into a separate file to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
da62e1e861 video: Rename structs and functions to avoid VBE
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
cafe8712e8 video: Renname vbe.h to vesa.h
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Verified Boot for Embedded is documented doc/develop/vbe.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
915458e148 vbe: Add some documentation
Add a few links to documents about Verified Boot for Embedded (VBE).
These will be expanded as development proceeds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Tom Rini
f5003e0791 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-08-11 22:20:01 -04:00
Tom Rini
157861e6af Merge tag 'dm-pull-9aug22-take2' of https://source.denx.de/u-boot/custodians/u-boot-dm
dtoc fixes with pylint, tests
2022-08-11 08:47:20 -04:00
Nikita Shubin
aa0eda17cf spl: opensbi: convert scratch options to config
Convert hardcoded "opensbi_info.options" to config provided value, this
allows changing options passed to OpenSBI.

SPL_OPENSBI_SCRATCH_OPTIONS is defaulted to SBI_SCRATCH_NO_BOOT_PRINTS.

Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_dynamic.md
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:46:41 +08:00
Nikita Shubin
48da0ca16e spl: opensbi: fix typo
s/obensbi_info/opensbi_info/

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:46:37 +08:00
Leo Yu-Chi Liang
f4512618ca riscv: ae350: Fix XIP config boot failure
The booting flow is SPL -> OpenSBI -> U-Boot.
The boot hart may change after OpenSBI and may not always be hart0,
so wrap the related branch instruction with M-MODE.

Current DTB setup for XIP is not valid.
There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used
in XIP mode, to be returned. Fix this.

Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:46:07 +08:00
Nikita Shubin
a5041e33e4 riscv: cpu: set gp before board_init_f_init_reserve
Restore global pointer before board_init_f_init_reserve call,
as "a0" can be set in harts_early_init call and we end up with
invalid global pointer.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:42:53 +08:00
Tom Rini
cdebee1fd9 Merge branch '2022-08-10-assorted-updates'
- An assortment of bugfixes and minor updates
2022-08-10 17:49:20 -04:00
John Keeping
be43a35bff boot: allow bootmeth-distro without CONFIG_NET
Remove the dependency on CMD_PXE from BOOTMETH_DISTRO by introducing a
new hidden kconfig symbol to control whether pxe_utils is compiled,
allowing bootstd's distro method to be compiled without needing
networking support enabled.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct build errors when CMD_BOOTM is not enabled:
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:42:56 -06:00
Joao Marcos Costa
468091a460 MAINTAINERS: Update e-mail address
Replace former professional address by my personal e-mail.

Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
2022-08-10 13:46:55 -04:00
Pali Rohár
3ff4675d73 lz4: Fix compile warning comparison of distinct pointer types
In file included from include/linux/bitops.h:22,
                 from include/log.h:15,
                 from include/linux/printk.h:4,
                 from include/common.h:20,
                 from lib/lz4_wrapper.c:6:
lib/lz4_wrapper.c: In function ‘ulz4fn’:
include/linux/kernel.h:184:17: warning: comparison of distinct pointer types lacks a cast
  (void) (&_min1 == &_min2);  \
                 ^~
lib/lz4_wrapper.c:104:18: note: in expansion of macro ‘min’
    size_t size = min((ptrdiff_t)block_size, end - out);
                  ^~~

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-10 13:46:55 -04:00
Milan P. Stanić
1bacff9ef6 scripts/config: pick config script from kernel scripts
pulled from kernel tag v5.18
2022-08-10 13:46:55 -04:00
Heinrich Schuchardt
8602d97ca2 Makefile: avoid false positive -Wmaybe-uninitialized
When compiling with -Og gcc reports false positive -Wmaybe-uninitialized as
reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394.

Silence these warnings when building with CONFIG_CC_OPTIMIZE_FOR_DEBUG.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Michal Simek
99699a7707 power: regulator: Remove i2c header from gpio regulator
i2c is not used that's why header is not needed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-08-10 13:38:30 -04:00
Heinrich Schuchardt
8b8accb8bf cmd: inconsistent return type of command_process()
The declarations in the header and in the implementation must match.

Reported-by: Sergei Antonov <saproj@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:38:30 -04:00
Simon Glass
29784d62ed test: Add some tests for kconfig.h
The macros in this file are a little confusing and we currently have no
tests to check that they work as expected.

Add some tests which check the macros in C code. Add a few tests which
check that the build errors are generated correctly too, using buildman's
-a option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:38:30 -04:00
Patrice Chotard
5e2548c1d6 lmb: Fix LMB_MEMORY_REGIONS flag usage
This patch is fixing a broken boot observed on stm32mp157c-dk2 board.

IS_ENABLED macro should be used to check if a compilation flag is set
to "y" or "m".
LMB_MEMORY_REGIONS is set to a numerical value, IS_ENABLED macro is not
suitable in this case.

Fixes: 7c1860fce4 ("lmb: Fix lmb property's defination under struct lmb")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-10 13:38:30 -04:00
Simon Glass
c252fa5cdb Makefile: Correct the rule removing old of-platdata files
This makes use of makefile variables that don't exist anymore. Fix it and
also remove the object files in that directory.

Also add FORCE as a dependency as required by the if_changed macro.

Fixes 354d232463 ("Makefile: Remove old of-platdata files before regenerating")
Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:38:29 -04:00
Marek Vasut
2349ecffec mmc: Do not send status of send_status is false
Commit 44645f87de ("mmc: Fix mmc_switch excessive timeout") introduced
a side effect where CMD13 SEND_STATUS is issued in case mmc_wait_dat0()
does not return -ENOSYS and $send_status is not set. This happens on all
hardware which does implement .mmc_wait_dat0 callback, e.g. i.MX8M .

This leads to lengthy timeout before booting OS in case of eMMC in one
of the HS200/HS400 modes, since the card cannot respond to CMD13 while
downgrading from HS200/HS400 to regular HS mode.

Fix this by adding the missing conditional.

Fixes: 44645f87de ("mmc: Fix mmc_switch excessive timeout")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-08-10 13:38:29 -04:00
Simon Glass
5d1637a40c dtoc: Correct remaining pylint problems in test_fdt
Fix various camel-case and other naming problems. Update the pylint base
file to avoid regressions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09 11:55:41 -06:00
Simon Glass
7640b16660 test_fdt: Convert to use argparse
Drop the deprecated OptionParser.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09 11:55:41 -06:00
Simon Glass
a8ad9aacd3 dtoc: Move main program into its own function
Use a function for the main program so everything there doesn't look like
a global variable to pylint.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09 11:55:41 -06:00
Simon Glass
ad744222f5 dtoc: Fix fdt test coverage
Fix a bug that the --processes option was ignored, thus resulting in no
test coverage information being generated.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 42ae363ddd ("dtoc: Update fdt tests to use test_util")
2022-08-09 11:55:41 -06:00
Simon Glass
b26dd9648c dtoc: Tidy up fdt_tests RunTests()
Pass the options args in rather than using the global variables. Use snake
case, fix up comments and use a ternary operator to make pylint happy.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09 11:55:41 -06:00
Simon Glass
25980791b1 dtoc: Tidy up fdt_tests RunTestCoverage() args
Pass the options args in rather than using the global various. Use snake
case and fix up comments to make pylint happy.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09 11:55:41 -06:00
Tom Rini
3dd4e91632 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu/turris_omina: Misc fixes and improvements (Pali & Marek)
- mvebu: spl: Always fallback to BootROM boot method (Pali)
- mvebu: Cleanup u-boot,dm-pre-reloc code (Pali)
- gpio: Remove mvgpio driver (Chris)
- SBx81LIFKW/SBx81LIFXCAT disable KIRKWOOD_GPIO (Chris)
- misc: atsha204a: Don't check for error when waking up the device (Pali)
2022-08-09 08:16:14 -04:00
Tom Rini
af7d151b8e Merge tag 'u-boot-amlogic-20220809' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- fixup error on efuse commands return
- add documentation on boot flow
2022-08-09 08:14:09 -04:00
Pali Rohár
ca514d0267 misc: atsha204a: Don't check for error when waking up the device
The device ignores any levels or transitions on the SCL pin when the device
is idle, asleep or during waking up.

Linux kernel driver for atsha204a (atmel-sha204a.ko) also ignores return
value from i2c wakeup send command, see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/crypto/atmel-i2c.c?h=v5.19#n174

And also userspace Turris libatsha204 library ignores return value from
wakeup send command, see:
https://gitlab.nic.cz/turris/libatsha204/-/blob/v29.2/src/libatsha204/layer_ni2c.c#L75-76

U-Boot driver should do same thing.

Fixes waking up ATSHA204 on Turris 1.x boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 10:01:31 +02:00
Pali Rohár
ca3756c86b pci: pci_mvebu: Add support for reset-gpios
Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
019090647c arm64: a37xx: pinctrl: Improve description for pinmux command
In more cases group name consist of function name followed by function
number. So if function name is just prefix of group name, show group name.

So in 'pinmux status -a' command output would be visible also extended
function number, which is useful for debugging.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
361cf5c7e1 arm64: a37xx: pinctrl: Remove unused macro PIN_GRP()
Macro PIN_GRP() is not used, remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
7a1c071173 arm64: a37xx: pinctrl: Fix definitions for MPP pins 20-22
All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
65b3b24eba gpio: Remove mvgpio driver
The last user of this driver was removed in commit dee08b1999 ("arm:
Remove gplugd board"). Remove the unused driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Pali Rohár <pali@kernel.org>
2022-08-09 08:58:27 +02:00
Chris Packham
0bae7bc2ee ARM: kirkwood: SBx81LIFXCAT: disable KIRKWOOD_GPIO
DM_GPIO was already enabled so the MVEBU_GPIO was already available.
Disable KIRKWOOD_GPIO as it was unnecessary.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
b95a3d29f8 ARM: kirkwood: SBx81LIFKW: enable CONFIG_NET_RANDOM_ETHADDR
When booting a fresh board having a random Ethernet address enables
using the network device to program the board.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
52b5bbcea6 ARM: kirkwood: SBx81LIFKW: disable KIRKWOOD_GPIO
DM_GPIO was already enabled so the MVEBU_GPIO was already available.
Having updated the board code to use the DM_GPIO APIs the KIRKWOOD_GPIO
driver became unnecessary. Disable it for SBx81LIFKW.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
d54d7b185d ARM: kirkwood: SBx81LIFKW: enable CMD_GPIO
For debugging it is convenient to query/access GPIOs from the command
line.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
923d0a8993 ARM: kirkwood: SBx81LIFKW: update for DM_GPIO
Update mv88e61xx_hw_reset() to use the DM_GPIO API to toggle the reset
line for the linkstreet switch.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
d1471948f3 ARM: kirkwood: SBx81LIFKW: remove direct access of GPIO registers
Replace code that accessed the GPIO registers directly with code that
makes use of the LED_GPIO driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
c8ef618ae1 arm: mvebu: armada-38x-controlcenterdc.dts: Move u-boot, dm-pre-reloc to -u-boot.dtsi
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-38x-controlcenterdc-u-boot.dtsi.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
e49a55af8b arm: mvebu: armada-xp-theadorable.dts: Move u-boot, dm-pre-reloc to -u-boot.dtsi
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-xp-theadorable-u-boot.dtsi.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
5d4d1212f7 arm: mvebu: Remove redundant u-boot, dm-pre-reloc from all 32-bit Armada SoCs
Replace it by including of mvebu-u-boot.dtsi file. When board does not use
-u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile
scripts/Makefile.lib.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
8879258ec0 arm: mvebu: Introduce mvebu-u-boot.dtsi for 32-bit Armada SoCs
Set u-boot,dm-pre-reloc for /soc/, /soc/internal-regs/ and &uart0 nodes as
it is required on every 32-bit Armada SoCs. And set also u-boot,dm-pre-reloc
for &spi0 when going to boot from SPI because otherwise SPL SPI drivers do
not load.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:26 +02:00
Pali Rohár
0e8b74addc arm: mvebu: dts: Build only arch-compatible dts files
64-bit Armada DTS files are not build correctly during compilation of
32-bit Armada boards and vice versa. So fix makefile build system to
compile only those dts files which are compatible for the current build
(64-bit Armada DTS files only for 64-bit builds and 32-bit Armada DTS files
only for 32-bit builds).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:26 +02:00
Marek Behún
46cd849851 arm: mvebu: turris_omnia: Add Winbond SPI flash support
Some new Omnia boards will come with Winbond SPI flash. Add to
defconfig.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:57:23 +02:00
Pali Rohár
dfebc1b908 arm: mvebu: spl: Always fallback to BootROM boot method
BootROM boot method should always work so always add it as fallback method
to spl_boot_list. In case U-Boot SPI driver fails it is better to try using
BootROM than hanging as by default only one boot method is specified.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:57:23 +02:00
Pali Rohár
7cd67018dd arm: mvebu: turris_omnia: Remove hardcoded spi-nor device tree path
Linux kernel DTS files renamed spi-nor@0 node to flash@0 which effectively
broke U-Boot to boot new Linux kernel versions correctly.

So remove hardcoded spi-nor device tree path from Turris Omnia board code
and replace it by searching for mtd node by compatible string.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:57:23 +02:00
Pali Rohár
c959374e84 gpio: turris_omnia_mcu: Fix usage of CMD_EXT_CONTROL
CMD_GENERAL_CONTROL takes two 8-bit arguments but CMD_EXT_CONTROL takes
two 16-bit arguments. Fix this issue and change CMD_EXT_CONTROL arguments
to 16-bit.

Fixes: 5e4d24ccc1 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:57:23 +02:00
Pali Rohár
e6c5e975b5 arm: mvebu: turris_omnia: Increase fdt size in fixup_mtd_partitions
Sometimes fixup_mtd_partitions() prints during booting kernel error
"Failed fixing SPI NOR partitions!" because it does not have enough space
for creating all paritions nodes. So increase fdt size.

Fixes: 92f36c8e74 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 08:57:23 +02:00
Pali Rohár
37af2c7b29 arm: mvebu: turris_omnia: Do not fail in fixup_mtd_partitions when partitions do not exist
All partitions are created by fixup_mtd_partitions() function, so they do
not have to exist just for their removal need.

Fixes: 92f36c8e74 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 08:57:23 +02:00
Pali Rohár
1da53ae26a arm: mvebu: turris_omnia: Add support for design with SW reset signals
New Turris Omnia HW board revision requires that software controls
peripheral reset signals, namely PERST# signals on mPCIe slots, ethernet
phy reset and lan switch reset. Those pins are connected to MCU controlled
by MCU i2c API as GPIOs. On new HW board revision those pins stay in reset
after board reset and software has to release these peripherals from reset
manually. MCU announce this requirement by FEAT_PERIPH_MCU bit in
CMD_GET_FEATURES command.

On older HW board revisions when FEAT_PERIPH_MCU is not announced, all
those reset signals are automatically released after board finish reset.

Detect FEAT_PERIPH_MCU bit in board_fix_fdt() and ft_board_setup()
functions and insert into device tree blob pcie "reset-gpios" and eth phy
"phy-reset-gpios" properties with corresponding MCU gpio definitions.
PCIe and eth PHY drivers then automatically release resets during device
initialization. Both U-Boot and Linux kernel drivers support those device
tree reset properties.

Initialization of lan switch on new HW board revision is more complicated.
Switch strapping pins are shared with switch RGMII pins. And strapping pins
must be in specific configuration after releasing switch reset. Due to pin
sharing, it is first required to switch A385 side of switch pins into GPIO
mode, set strapping configuration, release switch from reset and after that
switch A385 pins back to RGMII mode.

Because this complicated setup is not supported by switch DSA drivers and
cannot be expressed easily in device tree, implement it manually in SPL
function spl_board_init(). So in proper U-Boot and OS/kernel would be lan
switch initialized and be in same configuration like it was on old HW board
revisions (where reset sequence did those steps at hardware level).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 08:57:23 +02:00
Pali Rohár
336a27ab1d arm: mvebu: turris_omnia: Show MCU type in show_board_info()
Different Turris Omnia HW board revisions contains different MCU.
Show type in show_board_info() to easily identify which MCU is populated.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 08:57:23 +02:00
Tom Rini
aef6839747 Prepare v2022.10-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-08 20:35:53 -04:00
Tom Rini
ae0e1d68a9 Merge branch '2022-08-08-networking-updates'
After checking with Ramon, take a number of reviewed network patches.
This includes:

- A number of dwc_eth_qos updates, mpc8xx_fec DM migration, NPCM7xx EMAC
  driver.
- Other assorted minor updates
2022-08-08 15:04:56 -04:00
Patrice Chotard
5bd4f31fea net: dwc_eth_qos: Add eqos_get_enetaddr callback for stm32
Add .eqos_get_enetaddr callback defined as eqos_null_ops() to avoid
illegal access.

Fixes: a624251461 ("net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr")

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Patrice Chotard
acce23b8af net: dwc_eth_qos: Add eqos_get_enetaddr callback for tegra186
Add .eqos_get_enetaddr callback defined as eqos_null_ops() to avoid
illegal access.

Fixes: a624251461 ("net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr")

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Kunihiko Hayashi
dd8c3136aa ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins
UniPhier LD20, PXs2 and PXs3 boards have ethernet phy that has RX/TX delays
of RGMII interface using pull-ups on the RXDLY and TXDLY pins.

So should set the phy-mode to "rgmii-id" to show that RX/TX delays are
enabled.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Ramon  Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Kunihiko Hayashi
5a28aa6a7b net: ave: Add capability of rgmii-id mode
This allows you to specify the type of rgmii-id that will enable phy
internal delay in ethernet phy-mode.

This adds all RGMII cases to all of get_pinmode() except LD11, because LD11
SoC doesn't support RGMII due to the constraint of the hardware. When RGMII
phy mode is specified in the devicetree for LD11, the driver will abort
with an error.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Heinrich Schuchardt
ebb8ff61ad net: phy: possible NULL dereference in fixed_phy_create()
We check if phydev is NULL. Only but if it is non-NULL we set one
component of phydev. But even if it is NULL we set another. We should not
dereference NULL in either case.

Fixes: e24b58f5ed ("net: phy: don't require PHY interface mode during PHY creation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-08 11:37:57 -04:00
Patrick Delaunay
8a3b69d2f2 net: dwc_eth_qos: cosmetic: reorder include files
Reorder include files in the U-Boot expected order.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Ramon Fried
65f2266ed6 net: phy: Remove inline definitions from convinience functions
The convinience functions are not that small and they caused
bloated text segments because of their usage.
There was no need to inline them in the first place, as
they're not part of a fastpath.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-08-08 10:50:20 -04:00
Zev Weiss
f44bf73784 net: ftgmac100: use bus name in mdio error messages
Previously we'd been using a device name retrieved via
ftgmac100_data->phydev, but the mdio read/write functions may be
called before that member is initialized in ftgmac100_phy_init(),
leading to a NULL pointer dereference while printing the error message
issued if the mdio access fails.  We can instead use bus->name, which
is already available at that point.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Fixes: 538e75d3fc ("net: ftgmac100: add MDIO bus and phylib support")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-08-08 10:50:20 -04:00
Jim Liu
52503d8135 net: nuvoton : Add NPCM7xx EMAC driver
NPCM750 provides identical ethernet MAC controllers for WAN/LAN applications.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Christophe Leroy
81844aced3 net: mpc8xx_fec: Migrate to DM_ETH
Migrate mpc8xx_fec driver to DM_ETH.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Rasmus Villemoes
c62b74652a net: dwc_eth_qos: remove use of DWC_NET_PHYADDR
Only two boards in the tree set the macro DWC_NET_PHYADDR. Both have
CONFIG_DM_ETH_PHY=y, so should set the phy address in DT if necessary.

The imx8mp_evk does set the correct address in device tree.

The other board seems to be a copy-paste-adapt from an old
version of the imx8mp_evk config header, given the "#ifdef
CONFIG_DWC_ETH_QOS" block that has been removed from imx8mp_evk header
in commit 127fb45495. Its device tree doesn't even enable (i.e., set
'status = "okay"') the &eqos node. But the other ethernet device,
&fec, does get enabled, and does have a phy sitting at address 4 (and
it also has a corresponding legacy #define CONFIG_FEC_MXC_PHYADDR
4). So I believe it should be completely safe to remove it from there
as well.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Re-apply to top of tree, update imx93_evk.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-08 10:50:20 -04:00
Rasmus Villemoes
0c999ce98e net: dwc_eth_qos: lift parsing of max-speed DT property to common code
I have an iMX8MP with a ti,dp83867 phy in front of the eqos
interface. The phy is Gbit capable - however, the C and D differential
pairs are not physically routed to the RJ45 connector. So I need to
prevent the phy from advertising 1000Mbps.

The necessary code is almost already there in the form of a
phy_set_supported() call in eqos_start(), but the max-speed DT
property is currently only parsed in
eqos_probe_resources_stm32(). Lift that parsing to eqos_probe().

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Rasmus Villemoes
4a7c9dbf9a net: dwc_eth_qos: fix double resource leak in eqos_remove()
Not only does eqos_remove() fail to free the buffers that have been
allocated by eqos_probe_resources_core(), it repeats those allocations
and thus drops twice as much memory on the floor.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Marek Vasut
ecd8b03713 net: dm9000: Correctly handle empty FIFO
Assign packet pointer only in case the MAC reports anything in the FIFO.
In case the MAC indicates empty FIFO, return 0 to pass that information
to the network stack.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Stefan Roese
01207947d5 net: phy: marvell: Add support for 88E1240 PHY
This patch adds basic support for the Marvell 88E1240 PHY.

This will be used by the upcoming ethernet support addition for the
Marvell MIPS Octeon EBB7304 platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-08-08 10:50:20 -04:00
Stefan Roese
0ef02619ef net: phy: marvell: Support reg config via "marvell, reg-init" DT property
This patch adds support for the "marvell,reg-init" DT property, which
is used to describe board specific Marvell PHY register configurations
in the board dts file. This DT property is supported in the Linux Kernel
since a longer time. Adding it to U-Boot now, enables the boards which
describe the register settings in their DT files here as well.

I've included calling this marvell_of_reg_init() to all foo_config()
functions in this patch as well. If CONFIG_DM_ETH is not set, there is
no ofnode, or no "marvell,reg-init" property, the PHY initialization is
unchanged.

The function marvell_of_reg_init() is a port of the Linux version.
Please note that I explicitly did not add error checking and handling
to the U-Boot version, as this is basically not done for phy_read/write
in this Marvell PHY code.

This will be used by the upcoming ethernet support on the MIPS
Octeon EBB 7304 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-08-08 10:50:20 -04:00
Andre Kalb
5e6e41b3ba net: bootp: Make root path (option 17) length configurable
to adjust the root path length.
Eg to 256 from Linux Kernel

Signed-off-by: Andre Kalb <andre.kalb@sma.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Guard extern so that !CONFIG_NET platforms will build]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-08 10:49:51 -04:00
Jerome Brunet
3145e0d0ff ARM: meson: fixup error on efuse commands return
All `sm efuseread/efusewrite` commands exit with an error, even if the fuse
have actually been dealt with correctly.

This is because the smc call return the size it actually processed but this
result is checked against 0.

Return failure in do_efuse_read/write if the return value of
meson_sm_read/write_efuse() is not the requested size.

Fixes: 52195ba5f5 ("ARM: amlogic: add sm efuse write support and cmd for read/write efuse")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220804144138.33809-1-jbrunet@baylibre.com
2022-08-08 09:56:38 +02:00
Tom Rini
56edbb5eaf Merge branch '2022-08-05-buildman-integrate-boardscfg'
To quote Simon:
This series drops the need for the genboardscfg.py script, so that the
boards.cfg file is produced (and consumed) entirely within buildman. The
file is not entirely removed since it does have some uses and we need some
sort of cache for the information. The genboardscfg.py script is
effectively incorporated in buildman.

It also improves operation from an IDE with a new -I option and fixes up
some of the pylint warnings in buildman.

Finally, this series also fixes a bug which allows use to drop support for
CONFIG_SYS_EXTRA_OPTIONS which is long-standing desire. It also fixes a
minor bug that causes 'Invalid line' spam when checking for function bloat
with the -B option.
2022-08-05 13:22:44 -04:00
Simon Glass
ff75d6e03e buildman: Drop a TODO that is done
Buildman now uses worktrees when available, instead of doing a full clone.
This was done in this commit:

   76de29fc4f buildman: Use git worktrees instead of git clones when possible

Drop the TODO.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
7f275bdbb0 buildman: Drop a Python 2.7 comment
This is well out of date, but it is still reasonable to use a list. Drop
the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
f2e6775cdd buildman: Allow lines without a symbol
The 'nm' tool can produce lines without a symbol, for example:

   00000004 t

Silently skip these and anything else without three fields. Drop the
warning since there is nothing the user can do about it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
811c8e1711 Drop genboardscfg.py
Now that buildman can generate this with the -R option, drop the script.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
7ae8a5270a gitlab/azure: Use buildman instead of genboardscfg
Use the equivalent buildman functionality to check maintainer info.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
add76e7c44 buildman: Return an error if there are maintainer warnings
Detect warnings about missing maintain info and return result code 2 in
that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
5579ce747d Revert "Revert "global: Remove CONFIG_SYS_EXTRA_OPTIONS support""
This is not needed now that CONFIG_SYS_TARGET_NAME is correctly determined
when scanning Kconfig.

This reverts commit 25b8acee2e.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
256126c294 buildman: Replace the Options column with config name
This appears in boards.cfg but we want to remove it. Drop support for
generating it and reading it. Detect an old boards.cfg file that has
this field and regenerate it, to avoid problems.

Instead, add the config name in that place. This fixes a subtle bug in
the generation code, since it uses 'target' for the config name and then
overwrites the value in scan() by setting params['target'] to the name
of the defconfig. The defconfig name is not the same as the
SYS_CONFIG_NAME variable.

With this change, we still have the config name and it can be searched
by buildman, e.g. with:

   buildman -nv sun5i

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
969fd333ba buildman: Tidy up pylint problems in boards module
Fix all the pylint warnings. Also tidy up the comments so that they show
type information, as required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
a8a0141bc2 buildman: Incorporate the genboardscfg.py tool
Bring this tool into buildman, so we don't have to run it separately. The
board.cfg file is still produced as part of the build, to save time when
doing another build in the same working directory. If it is out of date
with respect to the Kconfig, it is updated.

Time to regenerate on a recent single-thread machine is 4.6s (1.3s on a
32-thread machine), so we do need some sort of cache if we want buildman
to be useful on incremental builds. We could use Python's pickle format
but:

- it seems useful to allow boards.cfg to be regenerated, at least for a
  while, in case other tools use it
- it is possible to grep the file easily, e.g. to find boards which use
  a particular SoC (similar to 'buildman -nv <soc>'

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
2022-08-05 11:47:56 -04:00
Simon Glass
c52bd22539 buildman: Split out Boards into its own file
Use a separate file for the Boards class so that its name matches the
module name.

Fix up the function names to match the pylint style and fix some other
warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
6014db68d3 buildman: Convert camel case in board.py
Convert this file to snake case and update all files which use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:56 -04:00
Simon Glass
fb5cb07abe buildman: Drop use of 'board' in board module
Use brds instead so that we can reserve 'boards' and 'board' as module
names.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
cc2c0d1800 buildman: Drop use of 'boards' in control
Use brds instead so that we can reserve 'boards' for a module name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
fd1b507e60 buildman: Fix use of 'boards' in test
We want to create a module called 'boards' so avoid use of this variable
name in this module. Change the global to be capitalised, as required by
Python style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
938fa37c81 buildman: Fix use of 'boards' in func_test
We want to create a module called 'boards' so avoid use of this variable
name in this module. Change the global to be capitalised, as required by
Python style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
f4ed4706ef buildman: Avoid using board as a variable
We have a module called 'board'. Sometimes buildman uses 'brd' as an
instance variable but sometimes it uses 'board', which is confusing and
can mess with the module handling. Update the code to use 'brd'
consistently, making it easier for tools to determine when the module
is being referenced.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
ae1a09f803 buildman: Support running from an IDE
Add a flag to allow buildman to behave properly for use from an IDE. This
shows error/warning output on stderr and drops all summary and progress
information.

This should normally only be used when building a single board.

Fix up a confusing comment for GetResultSummary() while we are here, since
we want to use the Outcome object to access the unprocessed error lines
from the build.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Simon Glass
5635c50720 buildman: Drop -I option
This has been deprecated with a notice that it will be removed after April
2021. Drop it now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-05 11:47:55 -04:00
Tom Rini
46b5c8ed01 Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm
EFI_RNG_PROTOCOL with a TPM
2022-08-05 08:01:32 -04:00
Tom Rini
ea2997ed2d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:57:36 -04:00
Tom Rini
b8e0989891 Merge branch '2022-08-04-Kconfig-migrations'
- Further migrations to Kconfig and associated dead code removal.
2022-08-04 16:54:01 -04:00
Tom Rini
78475d2572 Convert CONFIG_SYS_FSL_DDR_INTLV_256B to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_INTLV_256B

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
7da6a9e7df Convert CONFIG_SYS_FSL_CORES_PER_CLUSTER to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CORES_PER_CLUSTER

As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
612f7a61d5 Convert CONFIG_FSL_MEMAC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_MEMAC
   CONFIG_SYS_MEMAC_LITTLE_ENDIAN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
923a855509 Convert CONFIG_SYS_FSL_CCSR_GUR_BE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CCSR_GUR_BE
   CONFIG_SYS_FSL_CCSR_SCFG_BE
   CONFIG_SYS_FSL_ESDHC_BE
   CONFIG_SYS_FSL_IFC_BE
   CONFIG_SYS_FSL_PEX_LUT_BE
   CONFIG_SYS_FSL_CCSR_GUR_LE
   CONFIG_SYS_FSL_CCSR_SCFG_LE
   CONFIG_SYS_FSL_ESDHC_LE
   CONFIG_SYS_FSL_IFC_LE
   CONFIG_SYS_FSL_PEX_LUT_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
6f6b9703d0 Convert CONFIG_FSL_CORENET to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_CORENET

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
13e28f4987 configs: Remove a number of unreferenced CONFIG options.
There are a large number of options under CONFIG_SYS (but some of these
are elsewhere, spotted while cleaning CONFIG_SYS) that are never
referenced, or only used slightly later in the config file.  Remove or
restructure these.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
2d752b0d4a Convert CONFIG_SYS_FMAN_V3 to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FMAN_V3

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
1107dad820 Convert CONFIG_SYS_FLASH_QUIET_TEST to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_QUIET_TEST

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
1db251bdd5 Convert CONFIG_SYS_MAX_FLASH_SECT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MAX_FLASH_SECT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
17ead040d4 Audit <flash.h> inclusion
A large number of files include <flash.h> as it used to be how various
SPI flash related functions were found, or for other reasons entirely.
In order to migrate some further CONFIG symbols to Kconfig we need to
not include flash.h in cases where we don't have a NOR flash of some
sort enabled.  Furthermore, in cases where we are in common code and it
doesn't make sense to try and further refactor the code itself in to new
files we need to guard this inclusion.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
1d3ecdac7e Convert CONFIG_FLASH_CFI_LEGACY to Kconfig
This converts the following to Kconfig:
   CONFIG_FLASH_CFI_LEGACY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
cc1015f4a9 flash: Remove pic32_flash.c
As the only pic32 platform does not enable flash, this is dead code.
Remove it.

Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
5d68d2f41d Convert CONFIG_SYS_FLASH_ERASE_TOUT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_ERASE_TOUT
   CONFIG_SYS_FLASH_LOCK_TOUT
   CONFIG_SYS_FLASH_UNLOCK_TOUT
   CONFIG_SYS_FLASH_WRITE_TOUT

In practice, for two m68k platforms we move to hard-coding with a
comment the timeout values, rather than try and make convoluted Kconfig
logic.  We add options for the write and erase options to the pic32
flash driver, as this driver does make use of them.  Everywhere else
these are unreferenced values.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
90e9b3d335 Convert CONFIG_SYS_FLASH_CHECKSUM to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_CHECKSUM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
e2eca3e5c2 P1010RDB: Drop support for not-CONFIG_SYS_DDR_RAW_TIMING
All platforms today define CONFIG_SYS_DDR_RAW_TIMING, so drop the code
for this option being unset.

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
90df583c64 malta: Switch to using CONFIG_SYS_SDRAM_SIZE
This is the only platform defining and using CONFIG_SYS_MEM_SIZE, switch
to using CONFIG_SYS_SDRAM_SIZE for consistency.

Cc: Paul Burton <paul.burton@mips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
9a56ab96aa powerpc: Move CONFIG_SYS_DDR_SIZE to CONFIG_SYS_SDRAM_SIZE
We have a number of CONFIG_SYS_xxx_SIZE options to describe the amount
main memory available.  Rework CONFIG_SYS_DDR_SIZE, which described a
size in number of MiB to use CONFIG_SYS_SDRAM_SIZE which is most often
used as a number of bytes.  Use shifts of this option when required.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
b72713dc0b Convert CONFIG_SYS_FLASH_EMPTY_INFO to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_EMPTY_INFO

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
52938fc4f0 net: Remove CONFIG_SYS_DIRECT_FLASH_TFTP
No platforms enable the functionality to tftp directly to NOR flash, and
this is discouraged by the documentation.  Remove this code.  Further,
this highlights an oddity of the code.  Un-indent the start of this
function.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
6eaa0e4ac6 sh: Remove unused code in arch/sh/lib/bootm.c
There are no callers of the hexdump function that is guarded by
CONFIG_SYS_DEBUG, so remove the section.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
62e6418031 Merge branch '2022-08-04-assorted-fixed'
- Assorted TI, aspeed, xen updates
- Assorted return / error checking fixes in commands
- SPL MMC bugfix to get the correct device in some cases
- SPL related depends fixes
- Remove deprecated LCD command
- Some tool fixes
2022-08-04 16:02:42 -04:00
Michal Vasilek
2ecc354b8e tools: mkimage: fix build with LibreSSL
RSA_get0_* functions are not available in LibreSSL

Signed-off-by: Michal Vasilek <michal.vasilek@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-04 15:32:20 -04:00
Heiko Thiery
124b21e7bd tools: kwboot: use pkg-config to get -ltinfo
Instead of hardcoding -ltinfo as the flags needed to build
kwboot, use pkg-config when available.

We gracefully fallback on the previous behavior of hardcoding -ltinfo
if pkg-config is not available or fails with an error.

Reviewed-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-08-04 15:32:20 -04:00
Heiko Thiery
31a7688cbe tools: mkeficapsule: use pkg-config to get -luuid and -lgnutls
Instead of hardcoding -luuid -lgnutls as the flags needed to build
mkeficapsule, use pkg-config when available.

We gracefully fallback on the previous behavior of hardcoding -luuid
-lgnutls if pkg-config is not available or fails with an error.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
b661c1bc92 arm: mach-k3: security: Remove certificate if detected on GP device
If the device is a GP and we detect a signing certificate then remove it.
It would fail to authenticate otherwise as the device is GP and has no
secure authentication services in SYSFW.

This shouldn't happen often as trying to boot signed images on GP devices
doesn't make much sense, but if we run into a signed image we should at
least try to ignore the certificate and boot the image anyway. This could
help with users of GP devices who only have HS images available.

If this does happen, print a nice big warning.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
a0379c6fe3 arm: mach-k3: security: Bypass image signing at runtime for GP devices
We can skip the image authentication check at runtime if the device is GP.
This reduces the delta between GP and HS U-Boot builds. End goal is
to re-unify the two build types into one build that can run on all
device types.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
e1ef04fb3e arm: mach-k3: security: Allow signing bypass if type is HS-FS
On HS-FS devices signing boot images is optional. To ease use
we check if we are HS-FS and if no certificate is attached
to the image we skip the authentication step with a warning
that this will fail when the device is set to security enforcing.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
d1c079557f arm: mach-k3: Add support for device type detection
K3 SoCs are available in a number of device types such as
GP, HS-FS, EMU, etc. Like OMAP SoCs we can detect this at runtime
and should print this out as part of the SoC information line.
We add this as part of the common.c file as it will be used
to also modify our security state early in the device boot.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04 15:32:20 -04:00
Heinrich Schuchardt
63de2161e4 cmd: remove deprecated LCD support
No board uses lcd_clear() anymore. So we can remove support for it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-08-04 15:32:20 -04:00
Quentin Schulz
81df9ed45e vpl: fix reference in comment to non-existing SPL_SERIAL_SUPPORT
Since commit 2a73606668 ("serial: Rename SERIAL_SUPPORT to SERIAL")
SPL_SERIAL_SUPPORT is named SPL_SERIAL. So let's update the comment to
point to the correct Kconfig option in the comment of VPL_SERIAL.

Fixes: 747093dd40 ("vpl: Add Kconfig options for VPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-04 15:32:20 -04:00
Quentin Schulz
58d258c8c4 imx: imx8mp_rsb3720a1: fix incorrect ifdef check on SPL_MMC
Since commit 103c5f1806 ("mmc: Rename MMC_SUPPORT to MMC"),
SPL_MMC_SUPPORT is named SPL_MMC, so let's fix the ifdef.

Fixes: fbc6b14143 ("imx: imx8mp_rsb3720a1: convert to DM_SERIAL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-08-04 15:32:20 -04:00
Quentin Schulz
2c9cf3b644 mx7ulp_com: fix incorrect select for SPL options
SPL_GPIO_SUPPORT is named SPL_GPIO since commit 83061dbd1c ("Rename
GPIO_SUPPORT to GPIO"), SPL_MMC_SUPPORT is named SPL_MMC since commit
103c5f1806 ("mmc: Rename MMC_SUPPORT to MMC"), SPL_SERIAL_SUPPORT is
named SPL_SERIAL since commit 2a73606668 ("serial: Rename
SERIAL_SUPPORT to SERIAL") so let's select the correct Kconfig options.

Fixes: 8b71576f38 ("mx7ulp_com: add support for SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-08-04 15:32:20 -04:00
Quentin Schulz
5536a5f4ac gpio: fix incorrect depends on for SPL_GPIO_HOG
Since commit 83061dbd1c ("Rename GPIO_SUPPORT to GPIO"),
SPL_GPIO_SUPPORT has been renamed to SPL_GPIO, meaning that SPL_GPIO_HOG
can never be enabled.

Let's fix this by using the proper name for the Kconfig option.

Fixes: 1d99e673c7 ("gpio: Enable hogging support in SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-04 15:32:20 -04:00
Jim Liu
88513fe584 ARM: dts: npcm7xx: add npcm750 full function node
add npcm750 BMC full function node

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-08-04 15:32:20 -04:00
Heinrich Schuchardt
689525b12e cmd: undefined return value of do_extension_apply()
If 'extension apply all' is executed and no extension is found, the return
value of do_extension_apply() is undefined. Return CMD_RET_FAILURE in this
case.

Fixes: 2f84e9cf06 ("cmd: add support for a new "extension" command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
2022-08-04 13:59:59 -04:00
Harald Seiler
bf28d9a659 spl: mmc: Use correct MMC device when loading image
When attempting to load images from multiple MMC devices in sequence,
spl_mmc_load() chooses the wrong device from the second attempt onwards.

The reason is that MMC initialization is only done on its first call and
spl_mmc_load() will then continue using this same device for all future
calls.

Fix this by checking the devnum of the "cached" device struct against
the one which is requested.  If they match, use the cached one but if
they do not match, initialize the new device.

This fixes specifying multiple MMC devices in the SPL's boot order to
fall back when U-Boot Proper is corrupted or missing on the first
attempted MMC device.

Fixes: e1eb6ada4e ("spl: Make image loader infrastructure more universal")
Signed-off-by: Harald Seiler <hws@denx.de>
2022-08-04 13:59:59 -04:00
Dmytro Firsov
c588ca8734 drivers: xen: events: fix build issues with disabled Xen HVC
Some setups do not use Xen hypervisor console for logging, e.g. they
use emulated PL011 hardware or shared peripherals (real UART). In such
cases Xen HVC will be disabled on a build time and will cause issues in
current driver implementation.

This commit fixes build issues in Xen event channel driver, caused
by absense of console event channel, that is not available when console
config is disabled. Now console related code will be removed when
Xen HVC is turned off.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com<mailto:vicooodin@gmail.com>>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com<mailto:dmytro_firsov@epam.com>>
2022-08-04 13:59:59 -04:00
Vyacheslav Bocharov
6ac4774426 cmd: fix do_adc_single()
The source code contains an error:
- argv[2] contains <channel> arg, variable for env_set is in argv[3]
- number of args is 4

Revert 54d24d7260
  cmd: simplify do_adc_single()

Fixes 9de612ae4d
  cmd: adc: Add support for storing ADC result in env variable
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-04 13:59:59 -04:00
Billy Tsai
11d30963bc pwm: aspeed: Select SYSCON to get parent detail.
To work correctly, this driver depends on SYSCON to get the base address
from the parent dts node.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-08-04 13:59:59 -04:00
Sughosh Ganu
de70619dd3 test: rng: Add a UT testcase for the rng command
The 'rng' command dumps a number of random bytes on the console. Add a
set of tests for the 'rng' command. The test function performs basic
sanity testing of the command.

Since a unit test is being added for the command, enable it by default
in the sandbox platforms.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Sughosh Ganu
4bdbb54ee5 doc: rng: Add documentation for the rng command
Add a usage document for the 'rng' u-boot command.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Sughosh Ganu
c79e274c7c cmd: rng: Use a statically allocated array for random bytes
Use a statically allocated buffer on stack instead of using malloc for
reading the random bytes. Using a local array is faster than
allocating heap memory on every initiation of the command.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Sughosh Ganu
87ab234c1c cmd: rng: Add support for selecting RNG device
The 'rng' u-boot command is used for printing a select number of
random bytes on the console. Currently, the RNG device from which the
random bytes are read is fixed. However, a platform can have multiple
RNG devices, one example being qemu, which has a virtio RNG device and
the RNG pseudo device through the TPM chip.

Extend the 'rng' command so that the user can provide the RNG device
number from which the random bytes are to be read. This will be the
device index under the RNG uclass.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Sughosh Ganu
aedd45138e tpm: Add the RNG child device
The TPM device comes with the random number generator(RNG)
functionality which is built into the TPM device. Add logic to add the
RNG child device in the TPM uclass post probe callback.

The RNG device can then be used to pass a set of random bytes to the
linux kernel, need for address space randomisation through the
EFI_RNG_PROTOCOL interface.

No compatible string is provided because this is not available in
the binding defined by Linux. If multiple rand devices are in the
system, then some method of selecting them (other than device tree)
will need to be used, or a binding will need to be added.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Sughosh Ganu
e67ffb5aa5 tpm: rng: Add driver model interface for TPM RNG device
The TPM device has a builtin random number generator(RNG)
functionality. Expose the RNG functions of the TPM device to the
driver model so that they can be used by the EFI_RNG_PROTOCOL if the
protocol is installed.

Also change the function arguments and return type of the random
number functions to comply with the driver model api.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Ilias Apalodimas
5d98329196 efi_loader: initialize the RNG protocol after the TCC2
Due to U-Boot's lazy binding the RNG presented by the TCG is not available
until the EFI_TCG2 protocol has been initialized.  Since the TPM has a
built-in RNG device we can use for the OS randomization, move the RNG
protocol installation after the TCG.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Simon Glass
5e5937822a tpm: Export the TPM-version functions
These functions should really be available outside the TPM code, so that
other callers can find out which version the TPM is. Rename them to have
a tpm_ prefix() and add them to the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-08-02 23:50:02 +03:00
Marek Behún
707b17f64e MAINTAINERS: Change POWERPC MPC85XX maintainer to Marek Behún
After a discussion with Tom Rini, we've agreed that I am going to take
over custodianship of the MPC85XX platform, since it seems other people
do not have necessary interest or time and getting things done over
there takes too long.

Since I am only working on one MPC85XX board, Turris 1.x, and do not
have time to do thorough reviews of patches for this entire platform
(other than those concerning Turris 1.x board), for other boards I will
only run patches through CI and checkpatch, and then send them via PR
upwards to Tom.

Signed-off-by: Marek Behún <kabel@kernel.org>
Acked-by: Tom Rini <trini@konsulko.com>
2022-08-01 10:08:43 -04:00
Tom Rini
85eb5ac6ef Merge tag 'fsl-qoriq-2022-7-29' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
mpc85xx: support for generating QorIQ pre-PBL eSDHC boot sector
p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping
p1_p2_rdb_pc: Fix parsing inverted bits from boot input data
p1_p2_rdb_pc: Simplify SPL offset macros
2022-07-31 21:08:50 -04:00
Tom Rini
80e1491a03 Merge tag 'doc-2022-10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for doc-2022-10-rc2

Documentation:

* Detail how configuration signatures are calculated
* Further expand on Image locations and provide example
* Describe system configuration
2022-07-29 13:24:11 -04:00
Tom Rini
53d2ab9b5a doc: develop: Describe system configuration
Start by describing in general the best practices for how to implement
configuration of some aspect of U-Boot.  This generally means finding
the right choices for when something should be static or dynamically
configured and enabled.  Then further document when to use CONFIG or CFG
namespaces for static configuration.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-29 18:59:47 +02:00
Martin Bonner
4e5e374bf9 Provide more details of exactly how configuration signatures are calculated
Describe exactly which bytes are hashed and in what order
when signing a configuration.

Signed-off-by: Martin Bonner <martingreybeard@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-29 18:59:47 +02:00
Tom Rini
bf89358b4c doc: environment: Further expand on Image locations and provide example
Start by elaborating on what some of our constraints tend to be with
image location values, and document where these external constraints
can come from.  Provide a new subsection, an example based on the TI
ARMv7 OMAP2PLUS families of chips, that gives sample values and explains
why we use these particular values.  This is based on what is in
include/configs/ti_armv7_common.h as of fb3ad9bd92 ("TI: Add, use a
DEFAULT_LINUX_BOOT_ENV environment string") as this contains just the
values referenced in this document now and not some of the further
additions that are less generic.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-29 18:59:46 +02:00
Tom Rini
12fc2c3898 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Add Armada 38x pin muxing support (Pali)
- a37xx: pinctrl: Fix requesting GPIOs and pinmux command (Pali)
- mvebu: pinctrl: apply SDHCI PHY config for A7K (Kosta)
- gpio: Add Turris Omnia MCU driver (Pali)
- cmd: mvebu/bubt: Improvements for image verification (Pali)
- mvebu: turris_omnia: Fix mpp26 pin name and comment (Marek)
2022-07-29 08:08:33 -04:00
Marek Behún
b2d7619e46 arm: mvebu: turris_omnia: Fix mpp26 pin name and comment
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.

Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.

Signed-off-by: Marek Behún <kabel@kernel.org>
2022-07-29 13:55:52 +02:00
Pali Rohár
162311637d arm: mvebu: Synchronize armada-385-turris-omnia with Linux v5.20
* Add SPDX-License-Identifier
* Add SFP and LED nodes
* Fix PHY nad NOR nodes
* Remove duplicates from u-boot.dtsi file

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
48223161b5 arm: mvebu: Synchronize armada-385.dtsi with Linux v5.20
* Define PCIe interrupts

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
30bbb02a5c arm: mvebu: Synchronize armada-38x.dtsi with Linux v5.20
* Replace skeleton.dtsi by explicit #address-cells / #size-cells
* Add sdramc@1400 and phy@18300 nodes
* Remove (unused) timeout-ms i2c properties
* Fix compatible string for UARTs
* Add interrupts properties for watchdog

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
204b8707cd arm: mvebu: Fix compatible string for nand controller
Linux kernel uses compatible string "marvell,armada370-nand-controller" for
nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of
"marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand".

So unify it and use just Linux kernel compatible string.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:35 +02:00
Pali Rohár
3982e761dc board: freescale: p1_p2_rdb_pc: Simplify SPL offset macros
Now when CONFIG_SYS_TEXT_BASE has sane value, use it for calculation of
other SPL offset values: CONFIG_SPL_MAX_SIZE, CONFIG_SYS_MMC_U_BOOT_* and
CONFIG_SYS_SPI_FLASH_U_BOOT_* macros.

No functional change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-29 19:49:13 +08:00
Pali Rohár
78aa3fb15e board: freescale: p1_p2_rdb_pc: Fix parsing inverted bits from boot input data
On some boards upper 4 bits of i2c boot input data (register 0) are
inverted. Information which bits are inverted is stored in register 2.

So invert read input data back according to register 2 prior processing
them. This fixes printing "rom_loc: value" line during booting.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-29 19:49:13 +08:00
Pali Rohár
3480879a55 board: freescale: p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping
U-Boot for initial L2 SRAM uses L2 memory-mapping mode and not L2 with
locked lines. P2020 reference manual about L2 memory-mapping mode says:

  Accesses to memory-mapped SRAM are cacheable only in the corresponding
  e500 L1 caches.

So there is no need to set Caching-Inhibit I-bit for second part of initial
L2 SRAM mapping in TLB entry. Remove it. First part of initial L2 SRAM
mapping already does not have I-bit set.

For more details see also:
https://lore.kernel.org/u-boot/20220508150844.qqxg452rs4wtf5bs@pali/

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-29 19:49:13 +08:00
Pali Rohár
786d9f1a82 powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector
QorIQ U-Boot binary for SD card booting compiled during build process
(either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by
QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed
by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot

BootROM requires that image on SD card must contain special boot sector.
Implement support for generating this special boot sector directly in
U-Boot start code. Boot sector needs to be at the beginning of the image,
so when compiling only proper U-Boot without SPL then it needs to be in
proper U-Boot. When compiling SPL with proper U-Boot then it needs to be
only in SPL.

Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR.
Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and
FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot
image could be stored on the SD card.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-29 19:49:13 +08:00
Pali Rohár
09b0e20d73 cmd: mvebu/bubt: Fix cmd main return value on error
Negative return value from cmd main function cause U-Boot to print criplic
error message: exit not allowed from main input shell.

Set return value on error to 1.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
93c1358bcd cmd: mvebu/bubt: Add support for sha512 checksum validation for Armada 3700
Armada 3700 BootROM supports also images with sha512 checksums and
mox-imager tool [1] generates such bootable images. Without sha512 support
U-Boot bubt command just prints error message:

  Error: Unsupported hash_algorithm_id = 64
  Error: Image header verification failed

This patch adds support for sha512 checksum validation for Armada 3700
images. With it bubt prints:

  Image checksum...OK!

[1] - https://gitlab.nic.cz/turris/mox-boot-builder.git

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
4b9521f242 cmd: mvebu/bubt: Correctly propagate failure during tftp transport
net_loop() returns signed int type and negative value represents error.
tftp_read_file() returns unsigned size_t type and zero value represents
error. Casting signed negative value to unsigned size_t type cause losing
information about error and bubt thinks that no error happened, and
continue erasing SPI-NOR which cause malfunction device.

Fix this issue by correctly propagating failure during tftp transport.

With this change when there is no eth link, bubt does not erase SPI-NOR
anymore.

  => bubt
  Burning U-Boot image "flash-image.bin" from "tftp" to "spi"
  ethernet@30000 Waiting for PHY auto negotiation to complete......... TIMEOUT !
  ethernet@30000: No link.
  Error: Failed to read file flash-image.bin from tftp

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
5d2f7d306c cmd: mvebu/bubt: Verify image type for all 32-bit Aramda SoCs and Armada 3700
Current image type verification code is specific to 32-bit Armada SoCs but
used only for Armada 38x. Implement image type verification for Armada 3700
and enable Armada 38x image verification for all 32-bit Armada SoCs.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
8327389748 arm: mvebu: turris_omnia: Add mcu node with gpio-controller
This allows U-Boot to register new Turris Omnia MCU driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
5e4d24ccc1 gpio: Add Turris Omnia MCU driver
This driver registers GPIO controller and allows U-Boot to control GPIO
pins on MCU which is connected to Turris Omnia via i2c.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Konstantin Porotchkin
ef6fcab85f mvebu: pinctrl: apply SDHCI PHY config for A7K
Current pin control driver applies SDHCI PHY MUX selection
when board DT calls for eMMC function on MPP wires.
However, for CP side eMMC, only the "armada-8k-cpm-pinctrl"
compatibility string is taken into account, which causes
CP-SDHCI on Armada-7K boards to fail.
This patch adds "armada-7k-pinctrl" compatibility string
handling for the CP-SDHCI PHY configuration case.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
e34d8afd72 arm64: a37xx: pinctrl: Implement get_pins_count, get_pin_name and get_pin_muxing functions
These functions are required for 'pinmux status -a' command to print
current configuration of each MPP pin.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
140ebcdb9a arm64: a37xx: pinctrl: Implement gpio_request_enable for gpio functionality
To automatically enable GPIO functionality of some MPP pin, it is required
to implement .gpio_request_enable and .gpio_disable_free callbacks in
pinctrl driver and set .request and .rfree callbacks in GPIO driver to
pinctrl_gpio_request / pinctrl_gpio_free functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
3d98071dbb arm64: a37xx: pinctrl: Add missing pinmuxes into the list
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
ffab049520 arm64: a37xx: pinctrl: Mark all functions and structures as static
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
33893e5278 arm64: a37xx: pinctrl: Remove duplicate info->groups and info->ngroups fields
They are available in pin_data structure.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
bd913a7233 arm64: a37xx: pinctrl: Remove unused grp->pins fields
grp->pins is just filled and never used. Remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
cab406edab arm: mvebu: turris_omnia: Enable a38x pinctrl and gpio support
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
da76996a1a gpio: mvebu_gpio: Set bank name to mvebu%d
Currently bank name is just one alphabetical letter.
Change it to mvebu and number.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 15:17:46 +02:00
Pali Rohár
dc986c600f gpio: mvebu_gpio: Read number of gpios from DT
Device tree property "ngpios" contains number of gpios.
Use it when available.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 15:17:46 +02:00
Pali Rohár
7d8bb89d56 gpio: mvebu_gpio: Add .request and .rfree methods for Armada 38x
To use particular pin GPIO, it needs to be first switched to GPIO by
pinctrl. Use pinctrl_gpio_request() and pinctrl_gpio_free() for this
purpose.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 15:17:45 +02:00
Pali Rohár
a1de1035b2 pinctrl: Add third argument label for pinctrl_gpio_request() function
This change allows to use pinctrl_gpio_request() function as a direct
pointer for dm_gpio_ops's .request callback.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 15:17:45 +02:00
Pali Rohár
319b62880c arm: mvebu: Add gpio-ranges into Armada 38x device tree file
This allows U-Boot mvebu-gpio.c driver to switch particular MPP pin into
GPIO mode and enable GPIO support.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 08:41:45 +02:00
Pali Rohár
35c50a709e mvebu: pinctrl: Add Armada 38x driver
This new Armada 38x driver is based on Linux kernel driver. It can set any
pin to any valid function specified in DT like Linux kernel, it provides
support for 'pinmux status -a' command and also for pinctrl_gpio_request().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 08:41:44 +02:00
Pali Rohár
92c4a95ec7 pinctrl: Add new function pinctrl_generic_set_state_prefix()
This new function pinctrl_generic_set_state_prefix() behaves like
pinctrl_generic_set_state() but it takes third string argument which is
used as the prefix for each device tree string property.

This is needed for Marvell pinctrl drivers, becase Linux device tree files
have pinmux properties prefixed by "marvell," string.

This change allows to use generic U-Boot pinctrl functions for Armada 38x
pinctrl driver without need to copy+paste of the majority U-Boot pinctrl
code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 08:41:44 +02:00
Tom Rini
87069c79e8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mmc 2022-07-27 07:00:54 -04:00
Tom Rini
8005908e8f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-pmic 2022-07-27 07:00:24 -04:00
Tom Rini
7277c4bddc Merge tag 'dm-pull-26jul22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git
minor dm- and fdt-related fixes
start of test for fdt command
2022-07-27 06:59:55 -04:00
Heinrich Schuchardt
2785fc4868 mmc: pci_mmc.c should build with ACPIGEN=n
sandbox_defconfig builds the PCI MMC driver. It should be possible to
build the sandbox without ACPI support.

ACPI support in the PCI MMC driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.

Fixes: dba7ee419d ("acpi: mmc: Generate ACPI info for the PCI SD Card")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-27 15:19:42 +09:00
Ying-Chun Liu (PaulLiu)
233662411d cmd: mmc: allow to write protect single boot partition
add arguments for mmc wp to assign which boot partition to protect.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-27 15:19:09 +09:00
Ying-Chun Liu (PaulLiu)
19a29ff362 drivers: mmc: write protect single boot area
Add features to write protect single boot area rather than all boot
areas.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-27 15:19:09 +09:00
Jim Liu
3363a73ddf mmc: nuvoton: Add NPCM7xx mmc driver
Add Nuvoton BMC NPCM750 mmc control driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-27 15:19:09 +09:00
Pali Rohár
6dcf1c28dd mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
fixed amount of time like it was before commit 6f883e501b ("mmc:
fsl_esdhc: Add emmc hs200 support").

This change fixes error 'Internal clock never stabilised.' which is printed
on P2020 board at every access to SD card.

Fixes: 6f883e501b ("mmc: fsl_esdhc: Add emmc hs200 support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-27 15:19:08 +09:00
Heiko Thiery
67b5663d77 pmic: pca9450: permit config on all bucks and LDOs
In order to have the possibility to configure the regulators at system
startup through DM support, all LDOs and bucks must be able to be
changeable. Currently there is a limitation to change the values when
the output is enabled. Since the driver is based on the ROHM BD71837 and a
comment that describes a limitation about switching while the output is
enabled can also be found there, the limitation probably comes from this type.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-27 13:04:34 +09:00
Andre Przywara
81e712a917 ARM: relocate: Fix Thumb code by using proper label type
The generic ARM relocate_code function was using its own function entry
point as a relocation base, and it was obtaining that address by using
the "adr" instruction on that entry point label.
However that label is not just an ordinary label, instead we explicitly
mark it as a function start address. Normally that doesn't change much
(other than for debugging), but when assembled in Thumb mode, newer
versions of the GNU assembler prepare everything for this address being
used as the argument to a "bx" call, so make sure bit 0 is set in there
to mark this function as Thumb code. Of course this doesn't end up very
well when we use this address for the ensuing memcpy operation.

To avoid this problem, and to solve it in a robust way, add an extra
label, which is not marked as a function entry, and use that for the adr
instruction. This lets all assemblers generate the right immediate offset
in the "adr" instruction.

This fixes in particular ARMv7-M ports when using GNU binutils v2.37 or
newer (commit d3e52e120b68 seems to trigger the change in behaviour).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jesse Taube <mr.bossman075@gmail.com>
2022-07-26 17:53:43 -04:00
Tom Rini
86feeab3dc Merge tag 'u-boot-imx-20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220726
-------------------

i.MX for 2022.10

- Added i.MX93 architecture

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
2022-07-26 10:26:00 -04:00
Tom Rini
e5f6fecda4 Merge tag 'xilinx-for-v2022.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.10-rc2

fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading

spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations

xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal

zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro

versal:
- Add xlnx-versal-resets.h header

mmc:
- zynq_sdhci: Fix macro for MMC HS

relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types

misc:
- Get rid of guard macros from ARM and RISC-V

lmb:
- Add support for disabling LMB

serial:
- zynq: Fix baudrate calculation

tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
2022-07-26 08:32:37 -04:00
Peng Fan
e29303993b imx: imx8mm-icore: migrate to use BINMAN
Use BINMAN instead of imx specific packing method.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-07-26 11:29:02 +02:00
Peng Fan
c065a6c6f6 arm: dts: imx8m: shrink ddr firmware size to actual file size
After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-07-26 11:29:02 +02:00
Peng Fan
23387416da ddr: imx8m: helper: load ddr firmware according to binman symbols
By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.

And that could save binary size for many KBs.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-07-26 11:29:02 +02:00
Peng Fan
25daa2cdda arm: dts: imx8m: update binman ddr firmware node name
We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.

Also add `type = "blob-ext";`, since the new names are not valid binman
types.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-07-26 11:29:02 +02:00
Peng Fan
6ec65c8558 tools: image: support i.MX93
Support build i.MX93 container image with mkimage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:02 +02:00
Peng Fan
481f96068e board: freescale: imx93_evk: support ethernet
Add ethernet support

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
a624251461 net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr
i.MX has specific hook to get MAC address, so introduce a hook and move
i.MX code to its own driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
a6acf95508 net: eqos: add function to get phy node and address
Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
5fc783b5d9 net: dwc_eth_qos: move i.MX code out
Move i.MX code to a standalone file to make it easy for adding new
platform support

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
149e80f74b net: dwc_eth_qos: public some functions
Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
00fcfa81cb net: dwc_eth_qos: fix build break when CLK not enabled
When CONFIG_CLK is not enabled, there will be buil break:
"error: ‘eqos’ undeclared (first use in this function)"

Take eqos definition out the CONFIG_CLK ifdef.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
09de565f76 net: fec_mxc: support i.MX93
Support i.MX93 in fec_mxc driver

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
feaf8e0cf0 imx: imx93_evk: Set ARM clock to 1.7Ghz
Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
86a179703c imx: imx93_evk: Add basic board support
Add basic board codes and defconfig for i.MX93 11x11 EVK board.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
0da3d96e10 arm: dts: Add i.MX93 SoC DTSi file
Add the DTSi file and DT header files for i.MX93 SoC

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
5f77e669df ddr: imx9: enable Performance monitor counter
Add Kconfig for enabling reference events counter in DDRC performance
monitor by default

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
99c7cc58e1 ddr: imx: Add i.MX9 DDR controller driver
Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.

The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
e631185a20 imx: imx9: clock: Add DDR clock support
Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
87650716ea imx: imx9: Support multiple env storages at runtime
Select env storages according to boot device at runtime

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
c383379f25 imx: imx9: Support booting m33 from Acore
Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e0000 0"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
a8753afed7 imx: imx9: Add M33 release prepare function
To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.

The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
0256577a83 imx: imx9: Add MIX power init
Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.

SPL should call the power init in its boot sequence before accessing
above three MIX and USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
12f2322736 imx: imx9: Add gpio registers structure
Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Alice Guo
5e2612f1dc misc: fuse: update the code for accessing fuse of i.MX93
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Alice Guo
31b3ca5527 misc: fuse: support to access fuse on i.MX93
i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Alice Guo
5d78ff733d misc: imx8ulp: move fuse.c from imx8ulp to sentinel
The i.MX93 platform wants to reuse drivers/misc/imx8ulp/fuse.c. Moving
fuse.c from the folder imx8ulp to sentinel makes it can be used by other
platforms.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
1a55a633e0 misc: S400_API: Rename imx8ulp_s400_msg to sentinel_msg
Use more generic name for S40x msg structure

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
989f73934d imx: imx9: Get the chip revision through S400 API
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
fd94c2367b imx: imx9: Add AHAB boot support
Add AHAB driver for iMX9 to do authentication by calling sentinel API

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
5fda95fb94 imx: imx9: Add TRDC driver for TRDC init
Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
   permission to the memory where SPL image runs. Sentinel will set
   the memory to RX only after ROM authentication for the OEM
   closed part.
2. Init phase will configure TRDC to allow non-secure master to
   access DDR. So the peripherals can work in u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
2727245638 misc: s400_api: introduce ahab_release_m33_trout
Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
625473d6ce misc: S400_API: New API for FW status and chip info
Add new API to get sentinel FW status and SoC chip info

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
e5fcf91348 misc: S400_API: Update release RDC API
To support more RDC instances on i.MX93, update API to latest
definition.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
45fed324b5 misc: s4mu: Support iMX93 with Sentinel MU
Support iMX93 communicate with Sentinel

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
03fcf96651 misc: imx: S400_API: Move S400 MU and API to a common place
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
636c95f82b imx: imx9: support romapi
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.

Also include mmc env functions that use ROM API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
2c5f5457bc imx: imx9: disable watchdog
Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Jian Li
53cf550d23 imx: imx9: Add function to initialize timer
Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.

Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
65c56bcaec spl: Use SPL_FIT_IMAGE_TINY for iMX9
Select SPL_FIT_IMAGE_TINY for i.MX9

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
c8671d274c mmc: fsl_esdhc_imx: Support i.MX9
Support i.MX9 for fsl_esdhc_imx driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
f79c162668 imx: imx9: Add CCM and clock API support
Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
07110c6f53 imx: pinctrl: add pinctrl and pinfunc file for i.MX93
Add the pinctrl driver and pinfunc header file to support iMX93

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
636afd1bea gpio: pca953x: support pcal6524
Support pcal6524 IO expander driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
4eb2cbdd45 fsl_lpuart: add i.MX9 support
i.MX9 shares same register layout as i.MX7ULP, so
add the i.MX9 define here.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
881df6ed84 imx: add basic i.MX9 support
Add i.MX9 Kconfig and basic files for the new SoC

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
787f04bb6a imx: add USB2_BOOT type
Add USB2_BOOT type for i.MX8ULP and i.MX9

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
b0a284a7c9 imx: move get_boot_device to common file
i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.

Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
1859b8b60d imx: move get_boot_device to common header
Most i.MX implements get_boot_device, move it to common header to
simplify code

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
793b760fb0 imx: simplify dependency with SPL_BOOTROM_SUPPORT
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.

And drop the guard with structure definition, there is no need.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
bf43907f6e imx: spl: Allow iMX7/8/8M to overwrite spl_board_boot_device
Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Ye Li
9270cc8f3b imx: Change USB boot device type
The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
2f5ee7f812 arm: makefile: cleanup mach-imx usage
All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Peng Fan
658ff9d035 spl: imx8mm: enlarge SPL_MAX_SIZE
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.

The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-26 11:28:59 +02:00
Martyn Welch
bb19f85168 MAINTAINERS: Update file list for ARM Freescale IMX
The MAINTAINERS file currently lists files in
arch/arm/include/asm/arch-imx/ being part of the IMX maintainers
purview, however the arch/arm/include/asm/ directory also contains the
directories arch-imx8, arch-imx8m, arch-imx8ulp and arch-imxrt which
would also appear to be relevant to the team. Tweak the entry to cover
these directories so that tools like get_maintainers.pl will suggest
relevant maintainers when making changes just in these directories.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2022-07-26 11:28:43 +02:00
Jun Nie
651478777b imx: syscounter: support timer_get_boot_us
With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().

CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-26 11:28:43 +02:00
Douglas Anderson
dce4322c0e patman: By default don't pass "--no-tree" to checkpatch for linux
When you pass "--no-tree" to checkpatch it disables some extra checks
that are important for Linux. Specifically I want checks like:

  warning: DT compatible string "boogie,woogie" appears un-documented
  check ./Documentation/devicetree/bindings/

Let's make the default for Linux to _not_ pass --no-tree. We'll have a
config option and command line flag to override.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Oleksandr Suvorov
76656bca9e dm: fix mis-word in SPL_DM description
Replace logically correct word in the description.

Fixes: 91a91ff804 ("dm: Add Kconfig options for driver model SPL support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Simon Glass
006e56b1ae doc: Make a start on docs for fdt command
Add some information about the 'fdt addr' subcommand, to get things
started.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Simon Glass
747244840b fdt: Start a test for the fdt command
Add a basic test of the 'fdt addr' command, to kick things off.

This includes a new convenience function to run a command from a printf()
string.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Simon Glass
281996110c addrmap: Support on sandbox
Update this feature so that it works on sandbox, using a basic identity
mapping. This allows us to run the 'ut addrmap' test.

Also fix up the test to use the correct macros to access the linker
list, so that the 'ut addrmap' command actually works.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Marek Vasut
109dbdf042 binman: Increase default fitImage data section resize step from 1k to 64k
Currently the fitImage data area is resized in 1 kiB steps. This works
when bundling smaller images below some 1 MiB, but when bundling large
images into the fitImage, this make binman spend extreme amount of time
and CPU just spinning in pylibfdt FdtSw.check_space() until the size
grows enough for the large image to fit into the data area. Increase
the default step to 64 kiB, which is a reasonable compromise -- the
U-Boot blobs are somewhere in the 64kiB...1MiB range, DT blob are just
short of 64 kiB, and so are the other blobs. This reduces binman runtime
with 32 MiB blob from 2.3 minutes to 5 seconds.

The following can be used to trigger the problem if rand.bin is some 32 MiB.
"
/ {
  itb {
    fit {
      images {
        test {
          compression = "none";
          description = "none";
          type = "flat_dt";

          blob {
            filename = "rand.bin";
            type = "blob-ext";
          };
        };
      };
    };
  };

  configurations {
    binman_configuration: config {
      loadables = "test";
    };
  };
};
"

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Patrick Delaunay
54e89a8beb log: force DEBUG when LOG_DEBUG is activated
When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and
DEBUG is not defined the trace with debug() macro are not displayed,
because the parameter cond : _DEBUG = 0 is checked in debug_cond().

With this patch the define DEBUG, used to force the trace generated by
debug() macro, is linked with the define LOG_DEBUG, used to force the
trace generated by other macros (log_debug, dev_dbg, pr_debug).

We only need to define LOG_DEBUG in a file to activate all the
traces generated by any U-Boot debug macro, as it is described in
/doc/develop/logging.rst

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-26 02:30:56 -06:00
Heinrich Schuchardt
de84a4f0ee dm: fix logic of lists_bind_fdt()
If parameter drv of lists_bind_fdt() is specified, we shall bind only to
this very driver and to no other.

If the driver drv has an of_match property, we shall only bind to the
driver if it matches the compatible string of the device.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Heinrich Schuchardt
9396116d2d configs: sandbox_defconfig: CONFIG_LOG_MAX_LEVEL=9
Without setting CONFIG_LOG_MAX_LEVEL to a value above 6 we will not detect
NULL dereferences and other errors in log_debug() calls.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Heinrich Schuchardt
7a6f5a4ea1 dm: avoid NULL dereference in lists_bind_fdt()
If parameter drv of lists_bind_fdt() is specified, we want to bind to this
specific driver even if its field of_match is NULL.

If entry->of_match is NULL, we should not dereference it in a debug
statement.

Fixes: d3e773613b ("dm: core: Use U-Boot logging instead of pr_debug()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Heinrich Schuchardt
59ec024e56 test: fix log tests
Consider CONFIG_LOG_MAX_LEVEL and gd->default_log_level in

* do_log_test_helpers()
* log_test_dropped()
* log_test_level_deny()

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Heinrich Schuchardt
53fbaa4a4a dm: avoid NULL dereference in add_item()
acpi_add_other_item() passes dev = NULL. Instead of dev->name write the
string "other" to the debug log:

    ACPI: Writing ACPI tables at 1fd3000
    0base: writing table '<NULL>'
    * other: Added type 3, 0000000011fd4000, size 240
    1facs: writing table 'FACS'
    * other: Added type 3, 0000000011fd4240, size 40
    5csrt: writing table 'CSRT'
    * other: Added type 3, 0000000011fd4280, size 30

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-26 02:30:56 -06:00
Ashok Reddy Soma
2a75bc1303 spi: zynq_qspi: Fix programming qspi speed
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Ashok Reddy Soma
bc4795850b spi: zynq_qspi: Add support for zynq_qspi_mem_exec_op
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-4-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
T Karthik Reddy
e097847286 spi: zynq_qspi: Use dummy buswidth in dummy byte calculation
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Siva Durga Prasad Paladugu
1acb70393f spi: zynq_qspi: Add child pre probe function
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
T Karthik Reddy
557832bd88 spi: xilinx_spi: Add support ops to axi qspi driver
Add support_ops function to check controller supported operations by
spi-mem framework. Current default support ops function does not allow
dummy buswidth no more than 1, unless we are using buswidth is 4 for TX.
In order to support dummy buswidth > 1 by spi-nor framework we are adding
explicit support_ops to check controller supported operations.

Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
T Karthik Reddy
f2dd6599df spi: xilinx_spi: Add support for spi memory operations
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.

Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.

Simplified existing startup_block implementation.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Adrian Fiergolski
b524f8fb1e fpga: zynqmp: support loading encrypted bitfiles
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
a3a1afb747 fpga: zynqmp: support loading authenticated images
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io>

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
5ab6a84634 fpga: zynqmp: add bitstream compatible checking
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-12-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
fcd91cb782 fpga: zynqmp: reduce zynqmppl_load() code
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
3e78481de9 fpga: xilinx: pass compatible flags to load() callback
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
71f1a5392a spl: fit: pass real compatible flags to fpga_load()
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-9-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
2c60514d9a fpga: add fpga_compatible2flag
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-8-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
282eed50ec fpga: pass compatible flags to fpga_load()
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-7-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
7a9a0df89b fpga: xilinx: pass compatible flags to xilinx_load()
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
24307b06b7 fpga: zynqmp: add str2flags call
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
d7fcbfc19b fpga: xilinx: add bitstream flags to driver desc
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Oleksandr Suvorov
f18adf1065 fpga: xilinx: add missed identifier names
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00
Ying-Chun Liu (PaulLiu)
085d041b57 configs: imx8mm-cl-iot-gate: enable extension command
For imx8mm-cl-iot-gate we can use extension command to scan
extension boards attached on the mainboard. We enable the
extension command by default for users to detect the extension
boards.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
2022-07-26 09:09:59 +02:00
Tim Harvey
a4a130651d configs: imx8mp_venice: remove unnecessary FEC_QUIRK_ENET_MAC
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-07-26 08:58:25 +02:00
Oleksandr Suvorov
fb2b88567d fpga: add option for loading FPGA secure bitstreams
It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:42:16 +02:00
Alexander Dahl
8c09cb6f4d fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig
This converts the following to Kconfig: SYS_FPGA_PROG_FEEDBACK

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-3-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:39:43 +02:00
Alexander Dahl
e8ffc1dfcb fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
After commit 8cca60a2cb ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:39:43 +02:00
Ashok Reddy Soma
5f53e534ac arm64: versal: Enable power domain driver and its dependencies
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.

This driver depends on mailbox and IPI driver, hence enable them as well.
Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for
Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:25 +02:00
Ashok Reddy Soma
cce3351501 mailbox: zynqmp: Move struct zynqmp_ipi_msg from sys_proto.h
Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-5-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:20 +02:00
Ashok Reddy Soma
7b4e365e49 arm64: zynqmp: Enable power domain driver
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-4-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:15 +02:00
Ashok Reddy Soma
2e40ab1f21 firmware: zynqmp: Load config overlay for core0 to pmufw
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-3-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:10 +02:00
Ashok Reddy Soma
c9f12ed9bc firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:02 +02:00
Ashok Reddy Soma
9dac63b6f4 arm64: zynqmp: Enable reset driver
Enable reset driver for ZynqMP platforms. This will enable us to reset
the IP's using generic reset_assert and reset_deassert calls.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:28:32 +02:00
Michal Simek
c0ce59aaac arm64: versal: Enable reset driver for versal
Add CONFIG_DM_RESET and CONFIG_RESET_ZYNQMP configs in versal default
configuration to enable support for reset driver for versal
platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-3-ashok.reddy.soma@xilinx.com
2022-07-26 08:28:32 +02:00
T Karthik Reddy
9df5081740 reset: zynqmp: Add reset driver support for versal
Add support for versal platform by adding "xlnx,versal-reset"
compatible string in zynqmp-reset driver. Reset numbering schema
for versal is not same as zynqmp, so nr_reset and reset_id are
set to zero. In case of assert/dessert, required device reset id
is sent from respective driver through struct reset_ctl.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:27:15 +02:00
Michal Simek
4a1bfcd7aa xilinx: common: Use strlcpy instead of strncpy
It is recommendation done by checkpatch to all the time have \0 terminated
strings.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com
2022-07-26 08:25:16 +02:00
Michal Simek
ee5a4b87a1 xilinx: Wire uuid reading from FRU
UUID is already recorded when FRU is parsed but it is not copied to local
structures and exported to variable that's why simply add it.
Data is saved in binary format but there must be conversion to string for
exporting it to variable and string should be in uuid format too.

One way how to use it directly is to setup pxeuuid based on it. For
example via preboot with "setenv pxeuuid ${board_uuid}"

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com
2022-07-26 08:25:16 +02:00
Kunihiko Hayashi
c6bceb4e36 serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider value
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:23:55 +02:00
Michal Simek
65fc1697db tools: relocate-rela: Define all macros for e_machine and reloc types
With some old toolchain not all values should be available that's why
better to define all of them to avoid compilation issues.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e2a66854c5506100eb82b5b33cec7f0b5fca1008.1657260903.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Michal Simek
bb7468b4c9 tools: relocate-rela: Remove guard around R_AARCH64_RELATIVE
In code you can find out this fragment:
 19 #ifndef R_AARCH64_RELATIVE
 20 #define R_AARCH64_RELATIVE      1027
 21 #endif

which means that R_AARCH64_RELATIVE is defined all the time that's why
ifdef is not needed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0d40a09ab6edcd88ba3059f7a0b63a819b71256a.1657260903.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Michal Simek
165694b125 dt-bindings: versal: Add versal reset IDs
The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Michal Simek
7e9c2cd4e4 xilinx: Remove duplicate PMIO_NODE_ID_BASE macro
PMIO_NODE_ID_BASE is defined twice that's why remove one instance.

Fixes: 248fe9f302 ("spi: cadence_qspi: Enable apb linear mode for apb read & write operations")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce9a601bb99418aa20272d046c74678829d942cc.1657191974.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Michal Simek
34b01c22cc test/py: Run simple dm commands without checking
Just to make sure that dm commands can operate.
This was the problem on Microblaze in past without fixing manual
relocation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/e6c4b8b44445c16cee84436627642ccc9886f507.1657191580.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Michal Simek
2075215dd9 py: tests: Bind should run only on sandbox
Disable test to run on any other platform than sandbox.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/786bfdfda7dee4494e39c3fff699970ecd623116.1657191142.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Michal Simek
a5bd1fe863 arm64: zynqmp: Disable LMB for mini configurations
There is no need to have LMB enabled that's why save some space by
disabling it.

   aarch64: (for 8/8 boards) all -1168.5 rodata -105.5 text -1063.0
            xilinx_zynqmp_mini: all -2013 rodata -185 text -1828
            xilinx_zynqmp_mini_qspi: all -2013 rodata -185 text -1828
            xilinx_zynqmp_mini_emmc0: all -2661 rodata -237 text -2424
            xilinx_zynqmp_mini_emmc1: all -2661 rodata -237 text -2424

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f735d7691f4e7a7958d985b22c40aeb26e37a404.1657183534.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Ashok Reddy Soma
65168910ad zynqmp: Run board_get_usable_ram_top() only on main U-Boot
With commit ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.

Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Ashok Reddy Soma
7c1860fce4 lmb: Fix lmb property's defination under struct lmb
Under struct lmb {} the lmb property's should be defined only if
CONFIG_LMB_MEMORY_REGIONS is defined.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c24a2b1d6f5db4eb65393f6a77fae129b30b6233.1657183534.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Michal Simek
b09e462482 arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
do it once that's why remove additional ifdefs from arm and risc-v code.

Fixes: 0c303f9a66 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/f8e3ff9124195cbd957874de9a65ef79760ef5e7.1657183634.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Michal Simek
e3521e9c69 arm64: zynqmp: Enable SLG gpo driver by default
This device is used on SOM CCs that's why enable it by default.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ebbfc0c883ca7d4f70c75d8d3655aaa6a81d77be.1656943737.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Stefan Herbrechtsmeier
fcbc43bd50 xilinx: zynqmp: Do not use 0 as spl bss start address
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220714134733.7487-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:23:54 +02:00
Samuel Holland
5e0e1a86d3 tools: relocate-rela: Fix ELF decoding on big-endian hosts
The new ELF decoding logic assumed that the target binary has the same
endianness as the host, which broke building ARM64 firmware binaries on
big-endian machines.

This commit fixes the ELF64 decoding to be host-endianness-neutral, and
applies the same changes to the ELF32 decoding. It does not fix the
microblaze-specific dynamic symbol decoding.

It also corrects the functions used for byte swapping in rela_elf64()
and rela_elf32(). The result is the same, but semantically the code is
converting bytes read from a foreign-endianness file to host byte order.

Fixes: 4c9e2d6434 ("tools: relocate-rela: Read rela start/end directly from ELF")
Fixes: a1405d9cfe ("tools: relocate-rela: Check that relocation works only for EM_AARCH64")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220715064026.54551-1-samuel@sholland.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:23:54 +02:00
Ashok Reddy Soma
71f0773148 mmc: zynq_sdhci: Fix timing macros for MMC High speed
Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:23:54 +02:00
Michal Simek
156cb2af92 arm64: zynqmp: Used fixed-partitions for QSPI in k26
Using fixed partitions is recommended way how to describe QSPI. Also add
label for qspi flash memory to be able to reference it in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a84f7ce8d6472fce66539ba29d31fbaae511d94b.1655732762.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Ayan Kumar Halder
41d7f67448 xilinx: Remove the legacy property "#stream-id-cells"
"#stream-id-cells" was being used with "mmu-masters" for Xen specific
device trees.
With Xen commit 2278d2cbb0b7c1b48b298c6c4c6a7de2271ac928 (Link below)
Xen is able to support smmu bindings in both formats ie :
1. Using iommus (linux format)
2. Using mmu-masters (legacy format).

Thus, "#stream-id-cells" which was used for the legacy format, can be
removed as Xen can use smmu bindings in linux format.

Link: https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg101649.html
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1e062acb233dee47cd7dd2429cb482132617cbc8.1655886415.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Tom Rini
6e15cda270 Prepare v2022.10-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25 20:31:12 -04:00
Tom Rini
0fc5c499db configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25 17:19:18 -04:00
Tom Rini
af18c32973 Merge branch '2022-07-25-assorted-platform-updates'
- Assorted TI, Apple, Snapdragon and Xen updates.
2022-07-25 16:40:43 -04:00
Dmytro Firsov
0001a964b8 drivers: xen: unmap Enlighten page before jumping to Linux
This commit fixes issue with usage of Xen hypervisor shared info page.
Previously U-boot did not unmap it at the end of OS boot process. Xen
did not prevent guest from this. So, it worked, but caused wierd
issues - one memory page, that was returned by memalign in U-boot
for Enlighten mapping was not unmaped by Xen (shared_info values was
not removed from there) and returned to allocator. During the Linux
boot, it uses shared_info page as regular RAM page, which leads to
hypervisor shared info corruption.

So, to fix this issue, as discussed on the xen-devel mailing list, the
code should:
   1) Unmap the page
   2) Populate the area with memory using XENMEM_populate_physmap

This patch adds page unmapping via XENMEM_remove_from_physmap, fills
hole in address space where page was mapped via XENMEM_populate_physmap
and return this address to memory allocator for freeing.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com>
2022-07-25 14:57:27 -04:00
Tom Rini
032c9b045c arm: Remove unused references to CONFIG_SOC_DM*
There are no references to CONFIG_SOC_DM355 / CONFIG_SOC_DM365 /
CONFIG_SOC_DM644X / CONFIG_SOC_DM646X and the files these Makefile lines
reference have already been dropped.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25 14:57:27 -04:00
Andrew Davis
a9ec2f6509 spl: Use SPL_TEXT_BASE instead of ISW_ENTRY_ADDR
The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of
SPL_TEXT_BASE. Keystone2 HS devices were not using it right either.
Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 14:57:27 -04:00
Andrew Davis
121596a98f arm: k3: config.mk: Read software revision information from file on HS
Read the swrv.txt file from the TI Security Development Tools when
TI_SECURE_DEVICE is enabled. This allows us to set our software
revision in one place and have it used by all the tools that create
TI x509 boot certificates.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25 14:57:27 -04:00
Yogesh Siraswar
0019427251 k3_gen_x509_cert: Make SWRV configurable for anti-rollback protection
The x509 certificate SWRV is currently hard-coded to 0. This need to be
updated to 1 for j721e 1.1, j7200 and am64x. It is don't care for other
k3 devices.

Added new config K3_X509_SWRV to k3. Default is set to 1.

Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
2022-07-25 14:57:27 -04:00
Andrew Davis
080fe39b8c arm: mach-k3: Remove ROM firewalls on GP devices
This isn't strictly needed as these firewalls should all be disabled on
GP, but it also doesn't hurt, so do this unconditionally to remove this
use of CONFIG_TI_SECURE_DEVICE.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 14:57:27 -04:00
Andrew Davis
f673b4670d defconfigs: j721e_hs_evm: Sync HS and non-HS defconfigs
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25 14:57:27 -04:00
Andrew Davis
6787862499 defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigs
Sync new additions to non-HS defconfig with HS defconfig.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25 13:02:04 -04:00
Andrew Davis
86c4e533b0 defconfigs: Add a config for AM43xx HS EVM with QSPI Boot support
On AM43xx HS devices, QSPI boot is XIP and we use a single stage
bootloader. Add a defconfig for this.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25 13:02:04 -04:00
Andrew Davis
80b93bb71c arm: mach-k3: Rename SOC_K3_AM6 to SOC_K3_AM654
The first AM6x device was the AM654x, but being the first we named it
just AM6, since more devices have come out with this same prefix we
should switch it to the normal convention of using the full name of the
first compatibility device the series. This makes what device we are
talking about more clear and matches all the K3 devices added since.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:04 -04:00
Andrew Davis
46da163b72 arm: mach-k3: Only build init files for SPL
The content of these files are only used in SPL builds. The contents are
already ifdef for the same, remove that and only include the whole file
in the build when building for SPL.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:04 -04:00
Stephan Gerhold
afc13335a5 arm: dts: db410c/db820c: Fix SPMI addresses
The Qualcomm device trees in U-Boot are currently not consistent with
the upstream DTs used in the Linux kernel. While some bindings are
similar to the official specification in the Linux kernel, several
nodes have subtle differences, e.g. the "compatible"s or the exact
specification of memory registers.

This means that some of the Qualcomm-related U-Boot drivers are not
compatible with the Linux DT (and vice versa).

The SPMI node is one such example: the "core" region starts at
0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at
0x0200f800. The end result is normally the same, since the Linux SPMI
driver simply adds the 0x800 internally.

However, commit f5a2d6b4b0 ("spmi: msm: add arbiter version 5
support") imported this behavior into the U-Boot driver, without
adjusting the DB410c/DB820c device trees. This means that the 0x800
offset is now added twice, breaking all SPMI read/write operations:

  Failed to find PMIC pon node. Check device tree
  Failed to find pm8916_gpios@c000 node.
  USB init failed: -6
  starting USB...
  Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node.
  probe failed, error -6
  No working controllers found

While the mistake is strictly speaking in the spmi-msm driver, fix the
issue by making the SPMI nodes in the DB410c/DB820c consistent with the
upstream Linux DT instead.

Ideally we should even go a step further by fixing the remaining uses
of custom bindings in the U-Boot drivers and moving to using the Linux
DTs as-is. This would likely avoid such mistakes in the future and
would also make the porting process much easier.

Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Fixes: f5a2d6b4b0 ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25 13:02:04 -04:00
Andrew Davis
3289c806d3 board: ti: am65x: Do not disable SA2UL in DT
This is no longer needed as the SA2UL can now be shared with Linux.
Leave the SA2UL DT node enabled.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:04 -04:00
Matt Ranostay
cab8510821 armv8: mach-k3: correct define checking for AM625/AM642 memory maps
Using CONFIG_IS_ENABLED breaks accessing memory map structure when
doing a A53 SPL build for AM625 and AM642 platforms. This is due to
'abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y''
in which there is no CONFIG_SPL_SOC_K3_AM625/CONFIG_SPL_SOC_K3_AM642
defined in the configuration.

For the A53 SPL builds on these platform to access the memory mapping
which it will need for enabling the mmu/cache it must use #if defined(X)
checks and not CONFIG_IS_ENABLED.

Cc: Suman Anna <s-anna@ti.com>
Cc: Neha Francis <n-francis@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:04 -04:00
Weijie Gao
a3ba6adb70 arm: dts: mt7622: remove default pinctrl of uart0
Currently u-boot running on mt7622 will print an warning log at beginning:
> serial_mtk serial@11002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19

It turns out that the pinctrl uclass can't work properly in board_f stage.

Since the uart0 is the default UART device used by bootrom, and will be
initialized in both bootrom and tf-a bl2. It's ok not to setup pinctrl for
uart0 in u-boot.

This patch removes the default pinctrl of uart0 to suppress the unwanted
warning.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-25 13:02:04 -04:00
Anand Gadiyar
997d7a2b4b arm: dts: k3-am64-ddr fix typo causing DDR4 register corruption
The entry for DDRSS_PI_321_DATA was accidentally repeated leading to the
last few PI registers being incorrectly programmed.

Fix this.

Reported-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
bf95d17809 board: qualcomm: Add support for QCS404 EVB
Add support for Qualcomm QCS404 SoC based evaluation board.

Features:
- Qualcomm Snapdragon QCS404 SoC
- 1GiB RAM
- 8GiB eMMC, uSD slot

U-boot is chain loaded by ABL in 64-bit mode as part of boot.img.
For detailed build and boot instructions, refer to
doc/board/qualcomm/qcs404.rst.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25 13:02:04 -04:00
Sumit Garg
a4a9d9e874 clocks: qcom: Add clock driver for QCS404 SoC
Currently this clock driver initializes clocks for UART and eMMC. Along
with this import "qcom,gcc-qcs404.h" header from Linux mainline to
support DT bindings.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25 13:02:04 -04:00
Sumit Garg
a8effc2ee4 pinctrl: qcom: Add pinctrl driver for QCS404 SoC
Currently this pinctrl driver only supports BLSP UART2 specific pin
configuration.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
364c22a84a mmc: msm_sdhci: Add SDCC version 5.0.0 support
For SDCC version 5.0.0, MCI registers are removed from SDCC interface
and some registers are moved to HC. So add support to use the new
compatible string "qcom,sdhci-msm-v5". Based on this new msm variant,
pick the relevant variant data and use it to detect MCI presence thereby
configuring register read/write to msm specific registers.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
d35b211374 board: qualcomm: Add support for dragonboard845c
Add support for 96Boards Dragonboard 845C aka Robotics RB3 development
platform. This board complies with 96Boards Open Platform Specifications.

Features:
- Qualcomm Snapdragon SDA845 SoC
- 4GiB RAM
- 64GiB UFS drive

U-boot is chain loaded by ABL in 64-bit mode as part of boot.img.
For detailed build and boot instructions, refer to
doc/board/qualcomm/sdm845.rst, board: dragonboard845c.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
f5ed6c9ccf uart: sdm845: Fix debug UART pinmux
Configure debug UART pins as function: "qup9" rather than being regular
gpios. It fixes a hang seen during pinmux setting.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
ffa7928719 clocks: sdm845: Import qcom,gcc-sdm845.h
Rather than using magic numbers as clock ids for peripherals import
qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids.
So start using corresponding clk-id macro for debug UART.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Sumit Garg
866985b7e6 arm64: dts: sdm845: Remove redundant u-boot DT properties
According to u-boot DT recomendation, u-boot specific DT properties belong
to *-uboot.dtsi. Also for starqltechn board (which is the only current
consumer of sdm845.dtsi), the properties are already included in
starqltechn-uboot.dtsi, so remove corresponding redundant properties.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:03 -04:00
Sumit Garg
c551c8fe5f board: starqltechn: Align DT node overrides with sdm845.dtsi
Currently there is a mismatch among DT node overrides in starqltechn
board DTS file and the actual DT nodes in the sdm845.dtsi. So fix that
to align with DT nodes in sdm845.dtsi.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:03 -04:00
Pali Rohár
45a121885f Nokia RX-51: Remove CONFIG_PREBOOT from defconfig
CONFIG_PREBOOT just cause putting "preboot=CONFIG_PREBOOT" into env list.
Value CONFIG_PREBOOT="run preboot" in defconfig is just nonsense and does
not do anything useful (it is infinite recursion). Config file for this
board already contains default preboot= env variable with correct value,
which has higher priority than CONFIG_PREBOOT and this is reason why
nonsense CONFIG_PREBOOT is ignored.

Remove nonsense and unused CONFIG_PREBOOT from nokia_rx51_defconfig file.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-25 13:02:03 -04:00
Paul Barker
390d9e2c8c board: ti: am335x: Use correct dtbs for SanCloud boards
We have different dtbs for the Lite and Extended WiFi variants of the
SanCloud BBE.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:03 -04:00
Paul Barker
21acb843db board: ti: am335x: Enable spi0 bus on SanCloud BBE Lite
The SanCloud BBE Lite has a Micron Authenta flash device connected to
the spi0 bus.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25 13:02:03 -04:00
Ramin Zaghi
98889c9dba cmd: ti: ddr3: correct minor spelling mistake in Ti DDR3
Just a spelling mistake.

Signed-off-by: Ramin Zaghi <rzaghi@visualSilicon.com>
2022-07-25 13:01:48 -04:00
Marcel Ziswiler
24a7a3c1c0 imx8mm: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
87c4601c57 board: toradex: apalis-imx8: fix file names in maintainers
Fix device tree file names in MAINTAINERS file.

Fixes: 3d60366500 ("board: toradex: add apalis imx8qm 4gb wb it v1.0b module support")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
181d1684ca imx8mq: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
e6ad8070a7 verdin-imx8mp: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Verdin Development (carrier) board (e.g.
imx8mp-verdin-wifi-dev.dtb rather than the previous imx8mp-verdin.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
84c5cd9b84 imx8mp-rsb3720-a1: fix pwms property warnings
Fix the following build-time pwms property warnings:

w+arch/arm/dts/imx8mp-rsb3720-a1.dtb: Warning (pwms_property):
 /lvds_backlight@0:pwms: property size (12) too small for cell size 3
w+arch/arm/dts/imx8mp-rsb3720-a1.dtb: Warning (pwms_property):
 /lvds_backlight@1:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
e0caa84ca6 imx8mp: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
4e5114daf9 imx8mn: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
a68bad0a37 imx8mm-mx8menlo/verdin-imx8mm: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Verdin Development (carrier) board (e.g.
imx8mm-verdin-wifi-dev.dtb rather than the previous imx8mm-verdin.dtb).

Please further note that the PMIC node name got changed from a pmic
label to pmic@25 which required adjustment in resp. board SPL file
board/toradex/verdin-imx8mm/spl.c.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
35c819ed4e imx8mm-kontron-n801x-s-lvds: fix pwms property warnings
Fix the following build-time pwms property warnings:

w+arch/arm/dts/imx8mm-kontron-n801x-s-lvds.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
b96a9683e5 imx8mm-venice-gw700x: prepare to synchronise device trees with linux
As a preparatory step remove the pinctrl_pmic reference which does not
exist in the Linux upistream device tree.

This avoids the following error once synchronised:

+Error: arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi:26.1-14 Label or
 path pinctrl_pmic not found

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
b4052d55ad colibri_vf: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
e8a9521e64 vf500/vf610: synchronise device trees with linux
Synchronise device trees with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
fed2e400ff ARM: DTS: bk4r1/pcm052: prepare to synchronise device trees with linux
As a preparatory step rename the included SoC dtsi from vf.dtsi to
vf610.dtsi as this is how it is named in Linux upstream.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
25ab97986c colibri-imx7d/-emmc: synchronise device tree with linux
Synchronise device tree with linux-next next-20220708.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx7d-colibri-eval-v3.dtb rather than the previous
imx7-colibri-rawnand.dtb and imx7d-colibri-emmc-eval-v3.dtb rather than
the previous imx7-colibri-emmc.dtb).

Please further note that the PMIC node name got changed from rn5t567@33
to pmic@33 which required adjustment in resp. board file
board/toradex/colibri_imx7/colibri_imx7.c.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
2f96d4dd95 imx7s/d: synchronise device trees with linux
Synchronise device tree with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
868b5cb74e imx: imx7d-sdb: prepare to synchronise device trees with linux
As a preparatory step remove the epdc reference which does not exist in
the Linux upstream device tree and rename the qspi1 reference to qspi as
this is how it is named in the Linux upstream device tree.

This avoids the following error once synchronised:

+Error: arch/arm/dts/.imx7d-sdb-qspi.dtb.pre.tmp:10.1-6 Label or path
 epdc not found
+Error: arch/arm/dts/.imx7d-sdb-qspi.dtb.pre.tmp:29.1-7 Label or path
 qspi1 not found
+Error: arch/arm/dts/imx7d-sdb-qspi-u-boot.dtsi:6.1-7 Label or path
 qspi1 not found

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
7b4a934d73 imx: imx7-cm: prepare to synchronise device trees with linux
As a preparatory step rename the qspi1 reference to qspi as this is how
it is named in the Linux upstream device tree.

This avoids the following error once synchronised:

+Error: arch/arm/dts/.imx7-cm.dtb.pre.tmp:96.1-7 Label or path qspi1 not
 found

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
c21b61bff1 colibri-imx6ull/-emmc: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx6ull-colibri-eval-v3.dtb rather than the previous imx6ull-colibri.dtb
and imx6ull-colibri-emmc-eval-v3.dtb rather than the previous
imx6ull-colibri-emmc.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
5d7a95f499 imx6ul/imx6ull: synchronise device trees with linux
Synchronise device trees with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
091a03f8f3 imx: mx6ul_14x14_evk: prepare to synchronise device trees with linux
As a preparatory step remove the qspi node with its flash0 label as this
is already in the Linux upstream device tree.

This avoids the following error once synchronised:

+arch/arm/dts/imx6ul-14x14-evk.dtb: ERROR (duplicate_label):
 /soc/bus@2100000/spi@21e0000/n25q256a@0: Duplicate label 'flash0' on
 /soc/bus@2100000/spi@21e0000/n25q256a@0 and
 /soc/bus@2100000/spi@21e0000/flash@0

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
bd483b7a9f colibri_imx6: synchronise device tree with linux
Synchronise device tree with linux-next next-20220708.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
imx6dl-colibri-eval-v3.dtb rather than the previous imx6-colibri.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
50ba171e2d apalis_imx6: synchronise device tree with linux
Synchronise device tree with linux-next 20220706.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Apalis Evaluation (carrier) board (e.g.
imx6q-apalis-eval.dtb rather than the previous imx6-apalis.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
d0399a46e7 imx6dl/imx6qdl: synchronise device trees with linux
Synchronise device trees with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
50b229523b tbs2910: prepare to synchronise device trees with linux
As a preparatory step make sure to refer to absolute node paths where
labels were removed in Linux upstream.

This avoids the following error once synchronised:

+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:3.1-7 Label or path aips1
 not found
+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:11.1-5 Label or path soc
 not found

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
6f7db3a968 imx6: aristainetos: fix pwms property warnings
Fix the following build-time pwms property warnings:

w+arch/arm/dts/imx6dl-aristainetos2c_7.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3
w+arch/arm/dts/imx6dl-aristainetos2c_cslb_7.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
398ae1dca1 board/BuR/brppt2: fix pwms property warning
Fix the following build-time pwms property warning:

w+arch/arm/dts/imx6dl-brppt2.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
abe52f58bc toradex: common: Improve product/serial print during boot
Add product id print in show_board_info(), with an increasing number of
Toradex SKUs available with small differences it makes sense to print it.

Move serial number print to a dedicated line, this prevents the previous
line with the product name to overflow the 80 columns with any
reasonable product name length.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
4f0c33c46d toradex: tdx-cfg-block: Use official SKU names
Up to now in the code we named Toradex SKUs in a slightly different way
compared to the official product name, start using the official names
from now on to avoid misunderstanding.

This has also the nice benefit of the string being shorter, allowing
to fit nicely in 80 columns even adding the product ID when printing
the hardware information.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
9762fbeea4 toradex: common: Remove #ifdef usage for 2nd ethaddr
Fix checkpatch warn, use `IS_ENABLED(CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR)`
instead of `#ifdef CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR`.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
0d4b692c80 toradex: common: Remove stale function declaration
Remove stale show_boot_logo() declaration, not used anywhere.

Fixes: e6fd30dd9e ("toradex: drop legacy show_boot_logo function and use splashscreen")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
8b6dc5d394 toradex: tdx-cfg-block: Cleanup interactive cfg block creation
Simplify interactive config block creation code, instead of having a
a long list of questions and a complex tree of preprocessor directive to
guess the exact SKU, just ask the user to select it from a list.

The modules list is filtered out to include only SKUs that are supported
by the specific u-boot binary in execution.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
cdc39c6aae toradex: common: Use ARRAY_SIZE macro
Use generally available ARRAY_SIZE macro, instead of hand-coding it
every time is needed.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Francesco Dolcini
ea1dc32f31 toradex: common: Remove stale comments about modules availability
Remove comment "not currently on sale" on specific SKUs, this
information does not belong to the code and will never be accurate.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Philippe Schenker
a2da29a4e2 toradex: tdx-cfg-block: add 0068 i.mx 8m mini sku
Add new i.MX 8M Mini SKU to ConfigBlock handling.

0068: Verdin iMX8M Mini Quad 2GB WB IT No CAN

This SKU is identical to 0055 but without CAN. Mention this in the name
so those modules can be distinguished.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-07-25 16:12:00 +02:00
Fabio Estevam
05996f350d imx8mm: Sync device tree with linux-next 20220711
Sync imx8mm.dtsi device tree with linux-next 20220711.

The main motivation for doing this sync is the sha256 regression
reported by Andrey Zhizhikin [1].

The linux-next kernel has the following commit, which disables
the job ring 0 and fixes the problem:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c

[1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-25 16:12:00 +02:00
Mamta Shukla
4ae1fa338b doc: board: nxp: Add instructions to boot from QSPI
Add instructions to build and boot from  QSPI Flash

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-25 16:11:49 +02:00
Matt Ranostay
ea3e163f21 phy: ti: j721e-wiz: use OF data for device specific data
Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.

Based on: https://lore.kernel.org/linux-phy/20220526064121.27625-1-rogerq@kernel.org/T/#u

Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
2022-07-25 09:38:47 -04:00
Julien Panis
25c7b65d17 configs: am62x_evm_r5: Add support for ESM
Enable ESM driver for AM62x in R5 SPL/u-boot build.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2022-07-25 09:38:47 -04:00
Julien Panis
169582025a arm64: mach-k3: am625_init: Probe ESM nodes
On AM62x devices, main ESM error event outputs can be routed to
MCU ESM as inputs. So, two ESM device nodes are expected in the
device tree : one for main ESM and another one for MCU ESM.
MCU ESM error output can trigger the reset logic to reset
the device when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is
set to '0'.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2022-07-25 09:38:47 -04:00
Julien Panis
3128c890f2 arm64: dts: k3-am625-r5: Add support for ESM devices
Add main ESM and MCU ESM nodes to AM625-R5 device tree.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2022-07-25 09:38:47 -04:00
Janne Grunau
e53237aa53 arm: apple: Add initial Apple M2 support
Apple's M2 SoC very similar to the M1 and can use the same memory map.
The keyboard/trackpad on the MacBook Pro (13-inch, M2, 2022) uses
"dockchannel" as transport instead of SPI and needs a new driver.
USB, NVMe, uart, framebuffer and watchdog are working with the existing
drivers.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-07-25 09:38:47 -04:00
Janne Grunau
6e0793f485 iommu: Add M2 support to Apple DART driver
"apple,t8112-dart" uses an incompatible register interface but still
offers the same functionality. This DART is found on the M2 and M1
Pro/Max/Ultra SoCs.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-07-25 09:38:47 -04:00
Mamta Shukla
eca5e000d3 board: freescale: Add entry for imx8mm_evk_fspi_defconfig
Add entry for imx8mm_evk_fspi_defconfig in
board/freescale/imx8mm_evk/MAINTAINERS

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-25 15:35:35 +02:00
Mamta Shukla
1c3a8e7753 configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.

For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.

Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin  <andrey.zhizhikin@leica-geosystems.com>
2022-07-25 15:35:35 +02:00
Mamta Shukla
99a6ff5911 board: freescale: Add QSPI Boot support in spl for i.MX8m
Add QSPI Boot option in u-boot-spl for i.MX8m EVK.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-25 15:35:35 +02:00
Mamta Shukla
3c7ad8c40e configs: Add config for enabling FSPI boot option for i.MX8m
Add imx8mm_evk_fspi_defconfig to build QSPI boot image.
This config is based on imx8mm_evk_defconfig with addtional config options to
define FSPI Header parameters required to generate QSPI Header.
Update SPL offset to include header size  and overwrite IMX_CONFIG to use
lpddr.cfg for FSPI.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin  <andrey.zhizhikin@leica-geosystems.com>
2022-07-25 15:35:35 +02:00
Mamta Shukla
de99721c35 dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman
Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-25 15:35:34 +02:00
Mamta Shukla
5fe1d4b5c4 tools: mkimage: Add support to generate FlexSPI Header for i.MX8m
Add struct with Flex SPI Configuration Block and enable generating
fspi header using mkimage.

Refer i.MX 8M Mini Application Processor Reference Manual for
detailed information about parameters for FlexSPI Configuration block.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2022-07-25 15:35:34 +02:00
Marek Vasut
4f1851d059 tools: imx8mimage: Keep IVT reserved1 field zero always
Since fe8acf556c ("imx: HAB: Validate IVT before authenticating image")
the U-Boot HAB implementation is checking whether reserved1 field in IVT
is zero or not. In case the field is not zero, IVT validation fails. Stop
setting IVT reserved1 field to non-zero in mkimage imx8m plugin, otherwise
the validation cannot ever work.

Note that this only affects legacy boards which do not use binman.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
5809d764a9 imx8ulp: soc.c: use rom_api_query_boot_infor() wrapper
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
f963622f28 imx8m: soc.c: use rom_api_query_boot_infor() wrapper
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
f8001fdd2c imx8: use ROM API wrappers in spl_imx_romapi.c
Simplify the use of the ROM API by using the wrappers that take care
of saving/restoring gd and computing the xor value. This makes the
generated code smaller and the C code easier to read.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
748da8abb0 imx8: add rom api wrappers
The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.

Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.

[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
de20c5d405 imx8: sys_proto.h: change guard logic around ROM API
This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
8e290150e3 imx8: add hidden IMX8_ROMAPI Kconfig symbol
In order not to repeat the IMX8MN || IMX8MP || IMX8ULP logic in
multiple places where we need to know if the SOC exposes the ROM API,
add a "def_bool y" Kconfig symbol.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Josua Mayer
6cf1cc987f mx6cuboxi: fix board detection while patching device-tree phy nodes
ft_board_setup relies on the board_type() function to optimize which phy
nodes need to be enabled for Linux.
Add calls to setup and release the board-detect GPIOs.

Also fix the switch-case statement to only enable phy address 4 for
Cubox and unknown devices.

Fixes: 741ce308 ("mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS")
Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-07-25 15:08:23 +02:00
Tim Harvey
408349acbf arm: dts: imx8mm-venice-gw700x: add support for GPY111 phy
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
 - increase post-reset time to 300ms per datasheet
 - leave tx-delay/rx-delay undefined in dt defaulting to 2.0ns

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-07-25 15:08:23 +02:00
Fabio Estevam
96e85ba0c2 usb: ehci-mx6: Remove MX6Q_ARM2 related ifdefery
The imx6q arm2 board support has been removed from U-Boot
as it did not get converted to DM.

Remove the MX6Q_ARM2 related ifdefery in the driver.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-25 15:08:23 +02:00
Tom Rini
538f6643b0 Merge commit '90ba25b7cb78bd85c6af0b6429226c6616dedefa' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
In preparation of re-sync of mtd stack, we opt to move the current stack
slowly in order to have a more easy sync and test. We would like to
prepare uboot to support no-jedec and no-onfi compliant nand so we need
to clean up a bit the code we have now and upstream some of the support.
In this series we expect no functional change

Tested on:
 - imx6ull Micron   MT29F2G08ABAGAH4
 - imx8mn  Macronix MX30LF4G18AC
2022-07-24 07:46:55 -04:00
Tom Rini
03662dc506 Merge tag 'efi-2022-10-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc1-2

Documentation:

* doc: add package uuid-dev to build dependencies

UEFI:

* remove support for CONFIG_LCD
* fix authenticated capsules tests

Others:

* pxe: simplify label_boot()
* cli: support bracketed paste
2022-07-22 20:48:51 -04:00
Tom Rini
fd41c8f7a3 Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- octeontx_wdt: Add MIPS Octeon support (Stefan)
- watchdog: add amlogic watchdog support (Philippe)
- watchdog: add pulse support to gpio watchdog driver (Paul)
2022-07-22 20:48:28 -04:00
Michael Trimarchi
90ba25b7cb mtd: decommission the NAND museum
Upstream linux commit f7025a43a9da26.

The MTD subsystem has its own small museum of ancient NANDs in a form of
the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains
stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512
bytes per page and up to 8MiB page size.

It is with great sorrow that I inform you that the museum is being
decommissioned. The MTD subsystem is out of budget for Kconfig options and
already has too many of them, and there is a general kernel trend to
simplify the configuration menu.

We remove the stone age exhibits along with closing the museum

REMARK Don't apply this part from upstream:

Some of the iron age ones are transferred to the regular NAND depot.
Namely, only those which have unique device IDs are transferred, and the
ones which have conflicting device IDs are removed.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
bf438dbc6d mtd: nand: toshiba: Retrieve ECC requirements from extended ID
Upstream linux commit fb3bff5b407e58.

This patch enables support to read the ECC strength and size from the
NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is
based on the information of the 6th ID byte of the Toshiba Memory SLC
NAND.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
c7f7cce5c7 mtd: nand: Move Macronix specific initialization in nand_macronix.c
Upstream linux commit 3b5206f4be9b65.

Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
bd6adff22f mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
Upstream linux commit 229204da53b31d.

Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
c596e01f18 mtd: nand: Move Micron specific init logic in nand_micron.c
Upstream linux commit 10d4e75c36f6c1.

Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
3de2cdb71e mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c
Upstream linux commit 9b2d61f80b060c.

Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
2811ed2fb0 mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
Upstream linux commit 01389b6bd2f4f7.

Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
a1286a1fc4 mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c
Upstream linux commit c51d0ac59f2420.

Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
bded7d819f mtd: nand: Export symbol nand_decode_ext_id
In preparation of moving specific nand support that are not jedec
or onfi

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
1fde14683c mtd: nand: Fix MediaTek MT7621 SoC build
nand_get_flash_type was reworked in commit 1ca6f9483e. This change
break the Mediatek MT721. Fix it adjust the function call parameters

+include/linux/mtd/rawnand.h:32:62: note: expected 'struct nand_chip *' but argument is of type 'struct mtd_info *'
+   32 | struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip,
+      |                                            ~~~~~~~~~~~~~~~~~~^~~~
+drivers/mtd/nand/raw/mt7621_nand.c:1189:48: error: passing argument 2 of 'nand_get_flash_type' from incompatible pointer type [-Werror=incompatible-pointer-types]
+      |                                                ^~~~
+      |                                                |
+      |                                                struct nand_chip *
+include/linux/mtd/rawnand.h:33:49: note: expected 'int *' but argument is of type 'struct nand_chip *'
+   33 |                                            int *maf_id, int *dev_id,

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
9d1806fadc mtd: nand: Get rid of mtd variable in function calls
chip points to mtd. Passing chip is enough to have a reference
to mtd when is necessary

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Michael Trimarchi
b8cd2df519 mtd: nand: Add manufacturer specific initialization/detection steps
Upstream linux commit abbe26d144ec22.

A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.

Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Michael Trimarchi
bd87603d5a mtd: nand: Store nand ID in struct nand_chip
Upstream linux commit 7f501f0a72036d.

Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Michael Trimarchi
1ca6f9483e mtd: nand: Get rid of busw parameter
Upstream linux commit 29a198a1592d83.

Auto-detection functions are passed a busw parameter to retrieve the actual
NAND bus width and eventually set the correct value in chip->options.
Rework the nand_get_flash_type() function to get rid of this extra
parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 08:30:16 +02:00
Tom Rini
2996b6405e Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- turris: Misc updates (Pali)
- mvebu: handle non-zero base address for RAM (Chris)
- mvebu: add support for Methode eDPU (Robert)
- mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals
  (Pali)
- tlv_eeprom: Add missing CRC32 dependency (Pali)
- treewide: Fix Marek's name and change my e-mail address (Marek)
- mvebu: eDPU/uDPU: Misc updates (Robert)
- mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times
  (Pali)
2022-07-21 09:16:59 -04:00
Pali Rohár
ca85b5a146 arm: mvebu: turris_omnia: Set ETHPRIME to DT alias
CONFIG_ETHPRIME can be set to DT node name or alias which refers to DT
node. Define ethernet aliases and set ETHPRIME to eth2 which refers to WAN
ethernet port. This removes hardcoded DT node name from U-Boot
configuration file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
3308933d2f arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times
Change detection of platform/cpu from runtime to compile time via config
define. This completely eliminates compiling code which is not going to run
on selected platform. Code which parses and prints device / revision id
still reads device id from MVEBU_REG_PCIE_DEVID register, but only once.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
569b8b8dd8 mvebu: uDPU: disable non-present peripherals
uDPU like eDPU does not expose SCSI based peripherals like SATA nor PCI
and for sure it does not have the Intel E1000 PCI card.

So, like for eDPU remove those from the defconfig.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
ed0be7efed mvebu: eDPU: disable SCSI support
eDPU does not use SCSI nor it has SATA exposed, and commit
arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals
now allows compiling U-boot wihout all of the BOOT_TARGET_DEVICES since
not all boards have all of the listed peripherals exposed.

So, disable SCSI support in defconfig for eDPU.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Marek Behún
61143f741e treewide: Fix Marek's name and change my e-mail address
Fix diacritics in some instances of my name and change my e-mail address
to kabel@kernel.org.

Add corresponding .mailmap entries.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Marek Behún
8a7880f0c1 board: turris: Fix MAINTAINERS and add Pali
Fix MAINTAINERS files for Turris devices, add missing files and add Pali
as maintainer.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
56e3d6ef5d tlv_eeprom: Add missing CRC32 dependency
tlv_eeprom uses crc32() function, so add dependency into Kconfig.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
35ed176af2 arch: mvebu: Disable by default unused peripherals in SPL
SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and
therefore support for other binary formats is not required to be present in
SPL. Boot source of proper U-Boot is defined by compile time options and
therefore it is not required to enable all possible and unused peripherals
in SPL by default.

This change decrease size of SPL binaries.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
daa8857d53 arm: mvebu: a3720: Add NVMe to BOOT_TARGET_DEVICES list
Enable NVMe booting on boards which have enabled NVMe drivers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
3a57ad0957 arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals
This allows to compile U-Boot without some boot option for some A3720 board
which does not have that peripheral.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
040978ae4f MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself
as the maintainer for them.

Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
b4108f3fd3 arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.

They feature the same CPU, RAM, and storage as well as the form factor.

However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.

In order to reduce duplication, split the uDPU DTS into a common one.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Paul Doelle
1fc45d6483 watchdog: add pulse support to gpio watchdog driver
A common external watchdog circuit is kept alive by triggering a short
pulse on the reset pin. This patch adds support for this use case, while
making the algorithm configurable in the devicetree.

The "linux,wdt-gpio" driver being modified is based off the equivalent
driver in the Linux kernel, which provides support for this algorithm.
This patch brings parity to this driver, and is kept aligned with
the functionality and devicetree configuration in the kernel.

It should be noted that this adds a required property named 'hw_algo'
to the devicetree binding, following suit with the kernel. I'm happy to
make this backward-compatible if preferred.

Signed-off-by: Paul Doelle <paaull.git@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 08:09:06 +02:00
Philippe Boos
818055fd4e watchdog: add amlogic watchdog support
Add support for hardware watchdog timer for Amlogic SoCs.
This driver has been heavily inspired by his Linux equivalent
(meson_gxbb_wdt.c).

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

Signed-off-by: Philippe Boos <pboos@baylibre.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 08:09:06 +02:00
Stefan Roese
eff6f3d37c mips: octeon: octeon_ebb7304_defconfig: Enable watchdog support
This patch enables the recently added watchdog support on the MIPS
Octeon EBB7304 eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2022-07-21 08:09:06 +02:00
Stefan Roese
1aa2b85810 watchdog: octeontx_wdt: Add MIPS Octeon support
This patch adds support for the Marvell Octeon watchdog driver, which
currently only support the ARM64 Octeon TX & TX2 platforms. Since the
IP is pretty similar, it makes sense to extend this driver to also
support the MIPS Octeon SoC.

A follow-up patch will enable this watchdog support on the EBB7304
eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2022-07-21 08:09:06 +02:00
Robert Marko
58b39652bb arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].

[1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.marko@sartura.hr/
[2] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.marko@sartura.hr/
[3] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.marko@sartura.hr/
[4] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.marko@sartura.hr/

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Chris Packham
8fd3cf2940 arm64: mvebu: handle non-zero base address for RAM
board_get_usable_ram_top() conflated the RAM size with the top address
of RAM. On systems where RAM starts at address 0 these numbers are the
same so it went unnoticed. Update board_get_usable_ram_top() to take
CONFIG_SYS_SDRAM_BASE into account when determining the top address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Pali Rohár
e33879a45e board: turris: Find atsha device by atsha driver
It does not matter what is DT node name of atsha device. So find it via
atsha driver and not by DT node name.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Tom Rini
88d931a710 Merge tag 'for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-ubi
ubifs changes for 2022.10

UBIFS fixes from Pali Rohar:

- ubifs: Fix ubifs_assert_cmt_locked
- ubifs: Use U-Boot assert() from <log.h>
2022-07-20 07:38:49 -04:00
Pali Rohár
e2e6caa01b ubifs: Use U-Boot assert() from <log.h> in UBI/UBIFS code
U-Boot already provides assert function, so it use also in ubi and ubifs code.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-20 05:50:13 +02:00
Pali Rohár
b4f210563e ubifs: Fix ubifs_assert_cmt_locked()
U-Boot does not implement down_write_trylock() and its stub always returns
true that lock was acquired. Therefore ubifs_assert_cmt_locked() assert
currently always fails.

Fix this issue by redefining ubifs_assert_cmt_locked() to just empty stub
as there is nothing to assert.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-20 05:49:57 +02:00
Tom Rini
319d309b58 Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-07-19 15:54:57 -04:00
Tom Rini
5eefa9344b Merge tag 'for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 2022.10

- new driver nuvoton, NPCM7xx from Jim Liu

Fixes:

- ast_i2c: Remove SCL direct drive mode
  from Eddie James

- avoid dynamic stack use in dm_i2c_write

    bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1}
    add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144)
    Function                                     old     new   delta
    dm_i2c_write                                 552     408    -144
    Total: Before=3828, After=3684, chg -3.76%

  patch from Rasmus Villemoes
2022-07-19 15:54:41 -04:00
Tom Rini
fc97ff2695 Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
To quote Andre:

One prominent feature is the restructering of the clock driver, which
allows to end up with one actual driver for all variants, although we
still only compile in support for one SoC.
Also contained are some initial SPI fixes, which should fix some
problems, and enable SPI flash support for the F1C100s SoC. Those
patches revealed more problems, I will queue fixes later on, but for
now it should at least still work.
Apart from some smaller fixes (for instance for NAND operation), there
is also preparation for the upcoming Allwinner D1 support, in form of
the USB PHY driver. There are more driver support patches to come.

The gitlab CI completed successfully, including the build test for all
160 sunxi boards. I also boot tested on a few boards, but didn't have
time for more elaborate tests this time.
2022-07-19 10:52:15 -04:00
Rasmus Villemoes
49f3a42edf i2c: avoid dynamic stack use in dm_i2c_write
The size of the dynamic stack allocation here is bounded by the if()
statement. However, just allocating the maximum size up-front and
doing malloc() if necessary avoids code duplication (the
i2c_setup_offset() until the invocation of ->xfer), and generates much
better (smaller) code:

bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1}
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144)
Function                                     old     new   delta
dm_i2c_write                                 552     408    -144
Total: Before=3828, After=3684, chg -3.76%

It also makes static analysis of maximum stack usage (using the .su
files that are automatically generated during build) easier if there
are no lines saying "dynamic".

[This is not entirely equivalent to the existing code; this now uses
the stack for len <= 64 rather than len <= 63, but that seems like a
more natural limit.]

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19 13:46:28 +02:00
Jim Liu
2b77eea7f3 i2c: nuvoton: Add NPCM7xx i2c driver
Add Nuvoton BMC NPCM750 i2c driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19 13:46:28 +02:00
Eddie James
6ac25538d8 i2c: ast_i2c: Remove SCL direct drive mode
SCL direct drive mode prevents communication with devices that
do clock stretching, so disable. The Linux driver doesn't use
this mode, and the engine can handle clock stretching.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: ryan_chen <ryan_chen@aspeedtech.com>
2022-07-19 13:46:28 +02:00
Samuel Holland
25ba5be1c2 phy: sun4i-usb: Add D1 variant
D1 has a register layout like A100 and H616, with the moved SIDDQ bit.
Unlike H616 it does not have any dependencies between PHY instances.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 23:48:37 +01:00
Andre Przywara
b33ee49ac1 phy: sun4i-usb: Rework HCI PHY (aka "pmu_unk1") handling
As Icenowy pointed out, newer manuals (starting with H6) actually
document the register block at offset 0x800 as "HCI controller and PHY
interface", also describe the bits in our "PMU_UNK1" register.
Let's put proper names to those "unknown" variables and symbols.

While we are at it, generalise the existing code by allowing a bitmap
of bits to clear and set, to cover newer SoCs: The A100 and H616 use a
different bit for the SIDDQ control.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 23:48:30 +01:00
Samuel Holland
64331352cb phy: sun4i-usb: Drop use of arch-specific headers
Since commit 089ffd0aed ("phy: sun4i-usb: Use CLK and RESET support")
neither of these headers is used. Dropping them allows the driver to be
architecture-independent.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 23:48:19 +01:00
Samuel Holland
a35628ec33 sunxi: Move INITIAL_USB_SCAN_DELAY to driver Kconfig
This option is used only by the phy-sun4i-usb driver, which does not
inherently depend on the ARM architecture.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 23:48:09 +01:00
Tom Rini
905e779b9e Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
- add Macronix Octal flash (JaimeLiao)
2022-07-18 15:37:38 -04:00
Vincent Stehlé
052e8ca421 efi: test/py: repair authenticated capsules tests
The UEFI console initialisation has been modified by commit 68edbed454
("efi_loader: initialize console size late"). A corresponding workaround is
now necessary for the automated tests, as added to some of the tests
already by commit e05bd68ed5 ("test: work around for EFI terminal size
probing").

Add the same workaround to the UEFI authenticated capsules tests to repair
them.

This can be tested with sandbox_defconfig, sandbox64_defconfig or
sandbox_flattree_defconfig, plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-18 17:21:49 +02:00
Heinrich Schuchardt
2eb328ea61 efi_loader: remove support for CONFIG_LCD
There is no board left using CONFIG_LCD without CONFIG_DM_VIDEO.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-18 17:21:49 +02:00
Heinrich Schuchardt
8f4c7ad7a0 doc: typo 'formatted' in codingstyle.rst
%s/formatted/format/

Fixes: 4211fb2ef6 ("doc: Migrate CodingStyle wiki page to Sphinx")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-18 17:21:49 +02:00
Heinrich Schuchardt
9968398704 doc: add package uuid-dev to build dependencies
Building mkeficapsule requires include uuid/uuid.h

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-18 17:21:49 +02:00
Heinrich Schuchardt
00fa8256b5 cli: support bracketed paste
Some consoles use CSI 200~ and CSI 201~ to bracket inserts. This leads
U-Boot to misinterpret the inserted string. Ignore these escape sequences.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-18 17:21:49 +02:00
Heinrich Schuchardt
085cbdafca pxe: simplify label_boot()
Coverity CID 131256 indicates a possible buffer overflow in label_boot().
This would only occur if the size of the downloaded file would exceed 4
GiB. But anyway we can simplify the code by using snprintf() and checking
the return value.

Addresses-Coverity-ID: 131256 ("Security best practices violations (STRING_OVERFLOW)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
2022-07-18 17:21:49 +02:00
Jae Hyun Yoo
47ed8b22fd mtd: spi-nor-ids: add winbond w25q512nw family support
Add Winbond w25q512nwq/n and w25q512nwm support.

datasheet:
https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf

Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
4290ed7835 mtd: spi-nor-core: Add support for Macronix Octal flash
Adding Macronix Octal flash for Octal DTR support.

The octaflash series can be divided into the following types:

MX25 series : Serial NOR Flash.
MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb)
LM/UM series : Up to 250MHz clock frequency with both DTR/STR operation.
LW/UW series : Support simultaneous Read-while-Write operation in multiple
               bank architecture. Read-while-write feature which means read
               data one bank while another bank is programing or erasing.

MX25LM : 3.0V Octal I/O
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf

MX25UM : 1.8V Octal I/O
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7525/MX25UM51245G%20Extreme%20Speed,%201.8V,%20512Mb,%20v1.0.pdf

MX66LM : 3.0V Octal I/O with stacked die
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7929/MX66LM1G45G,%203V,%201Gb,%20v1.1.pdf

MX66UM : 1.8V Octal I/O with stacked die
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7721/MX66UM1G45G,%201.8V,%201Gb,%20v1.1.pdf

MX25LW : 3.0V Octal I/O with Read-while-Write
MX25UW : 1.8V Octal I/O with Read-while-Write
MX66LW : 3.0V Octal I/O with Read-while-Write and stack die
MX66UW : 1.8V Octal I/O with Read-while-Write and stack die

About LW/UW series, please contact us freely if you have any
questions. For adding Octal NOR Flash IDs, we have validated
each Flash on plateform zynq-picozed.

As below are the SFDP table dump.

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2943c
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx66uw2g345gx0
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345gx0
zynq> hexdump mx66uw2g345gx0
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 001f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2853b
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx66lm1g45g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66lm1g45g
zynq> hexdump mx66lm1g45g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 6987 0001 1282 e200 02cc 3867
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 6666
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000
0000130 3514 001c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2853a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25lm51245g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm51245g
zynq> hexdump mx25lm51245g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7989 0001 128d e200 02cc 4467
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 6666
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000
0000130 3514 001c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2863a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25lw51245g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lw51245g
zynq> hexdump mx25lw51245g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 0000 0000 0000 0000
0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 6666
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000
0000130 3514 001c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28539
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25lm25645g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm25645g
zynq> hexdump mx25lm25645g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 6666
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000
0000130 3514 001c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2843c
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx66uw2g345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345g
zynq> hexdump mx66uw2g345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 001f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2803b
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx66um1g45g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66um1g45g
zynq> hexdump mx66um1g45g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7989 0001 128d e200 02cc 4467
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 3514 809c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2813b
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx66uw1g45g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw1g45g
zynq> hexdump mx66uw1g45g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2813a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw51245g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51245g
zynq> hexdump mx25uw51245g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 7777
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2843a
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw51345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51345g
zynq> hexdump mx25uw51345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f e200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28039
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25um25645g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25645g
zynq> random: fast init done
zynq> hexdump mx25um25645g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7987 0001 1284 d200 02cc 3867
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 3514 809c 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28139
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw25645g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25645g
zynq> hexdump mx25uw25645g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7989 0001 128d d200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28339
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25um25345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25345g
zynq> hexdump mx25um25345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0904 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28439
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw25345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25345g
zynq> hexdump mx25uw25345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7987 0001 1284 d200 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28138
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw12845g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12845g
zynq> hexdump mx25uw12845g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 0000 0000 0000 0000
0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f c900 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28438
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw12345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12345g
zynq> hexdump mx25uw12345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f c900 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28137
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw6445g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6445g
zynq> hexdump mx25uw6445g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 7989 0001 128d c400 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 a37c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c28437
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
mx25uw6345g
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6345g
zynq> hexdump mx25uw6345g
0000000 4653 5044 0108 fd04 0700 1401 0040 ff00
0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00
0000020 0005 0501 0120 ff00 0084 0201 0134 ff00
0000030 0000 0000 0000 0000 ffff ffff ffff ffff
0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00
0000050 ffee ffff ffff ff00 ffff ff00 200c d810
0000060 ff00 ff00 798b 0001 128f c400 04cc 4667
0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000
0000080 0000 0000 0000 237c 0048 0000 0000 8888
0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff
00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600
00000b0 7172 b803 7172 b803 0000 0000 a390 8218
00000c0 c000 9669 0000 0000 0000 0000 7172 9800
00000d0 7172 b800 7172 9900 0000 0000 7172 9800
00000e0 7172 f800 7172 9900 7172 f900 0000 0000
00000f0 0000 0000 1501 d001 7172 d806 0000 5086
0000100 0000 0106 0000 0000 0002 0301 0200 0000
0000110 0000 0106 0000 0000 0000 0672 0200 0000
0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000
0000130 4514 8098 0643 000f dc21 ffff ffff ffff
0000140 ffff ffff ffff ffff ffff ffff ffff ffff

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
Jan Kiszka
f3a56dda88 sf: Query write-protection status before operating the flash
Do not suggest successful operation if a flash area to be changed is
actually locked, thus will not execute the request. Rather report an
error and bail out. That's way more user-friendly than asking them to
manually check for this case.

Derived from original patch by Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
Jan Kiszka
513c6071ce mtd: spi: Convert is_locked callback to is_unlocked
There was no user of this callback after 5b66fdb29d anymore, and its
semantic as now inconsistent between stm and sst26. What we need for the
upcoming new usecase is a "completely unlocked" semantic. So consolidate
over this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
Vaishnav Achath
cd2f9031e4 spl: spl_spi: add spi_nor_remove() to soft reset flash
On probe, the SPI NOR core will put a flash in 8D mode if it
supports it. But Linux as of now expects to get the flash in
1S mode. Handing the flash to Linux in Octal DTR mode means
the kernel will fail to detect the flash.

This commit adds an option to soft reset the flash after
spl_spi_load_image() so that the flash can be reset to 1S mode
and subsequent spi-nor probe in Linux does not fail, since
spl_spi_load_image() performs spi_flash_probe() the remove is
added after completion loading images in spi_flash_probe() itself.

Tested on J721E EVM with 5.10 Linux kernel.

Linux spi-nor probe without the fix:
root@j7-evm:~# dmesg | grep spi-nor
[    4.928023] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[    4.934938] spi-nor: probe of spi0.0 failed with error -2

Linux spi-nor probe with the fix:
root@j7-evm:~# dmesg | grep spi-nor
[    4.904484] spi-nor spi0.0: mt35xu512aba (65536 Kbytes)

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
bebdc23750 mtd: spi-nor: Parse SFDP SCCR Map
Parse SCCR 22nd dword and check DTR Octal Mode Enable
Volatile bit for Octal DTR enable

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
68ad73b70c mtd: spi-nor-core: Adding different type of command extension in Soft Reset
Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 8D-8D-8D
in the begging of probe.

Command extension type is not standardized across flash vendors in DTR mode.

For suiting different vendor flash devices, adding a flag to seperate types for
soft reset on boot.

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
df3d5f9e41 mtd: spi-nor: add support for Macronix Octal flash
Follow patch <f6adec1af4b2f5d3012480c6cdce7743b74a6156> (Allow using Micron mt35xu512aba
in Octal DTR mode).
Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency for adding Macronix flash in Octal DTR mode.
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
Markus Hoffrogge
5fd30ed785 sunxi-nand: fix the PIO instead of DMA implementation
The sunxi nand SPL loader was broken at least for SUN4I,
SUN5I and SUN7I SOCs since the implementation change
from DMA to PIO usage - commit 6ddbb1e.

Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD
being set by method nand_apply_config.

This flag controls the bus being used for the NFCs internal RAM access.
It must be set for the DMA use case only.
See A33_Nand_Flash_Controller_Specification.pdf page 12.

This fix is tested by myself on a Cubietruck A20 board.
Others should test it on new generation SOCs as well.

Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Michal Suchanek
4a9f37df1d configs: sunxi: OrangePi Zero: enable Macronix flash support
The boards that come with a flash memory pre-soldered have a Macronix
flash chip.

Fixes: 280294c5df ("sunxi: boards: Enable SPI flash support in U-Boot proper")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Michal Suchanek
e038c7a201 sunxi: lcd: Move range from kconfig description to definition.
KConfig has range option, use it instead of notice in the option
descrition.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Andre Przywara
642e65749d sunxi: licheepi_nano: enable SPI flash
Many LicheePi Nano boards come with SPI flash soldered, which already
works for booting the SPL and loading U-Boot proper.
With the updated DTB, we can now also use the SPI flash from U-Boot
proper, so enable the bits in the defconfig, to allow loading binaries
from SPI flash.
There seem to be board revisions with a Winbond SPI chip, but also
others with an XTX chip, so include support for both: the actual chip
used will be autodetected.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Andre Przywara
8649995c76 spi: sunxi: Add support for F1C100s SPI controller
The SPI controllers in the Allwinner F1Cx00 series of SoCs are
compatible to the H3 IP. The only difference in the integration is
the missing mod clock in the F1C100, instead the SPI clock is directly
derived from the AHB clock.
We *should* be able to model this through the DT, but the addition of
get_rate() requires quite some refactoring, so it's not really worth in
this simple case: We programmed both the PLL_PERIPH to 600 MHz and the
PLL/AHB divider to 3 in the SPL, so we know the SPI base clock is 200
MHz. Since we used a hard coded fixed clock rate of 24 MHz for all the
other SoCs so far, we can as well do the same for the F1C100.

Define the SPI input clock and maximum frequency differently when
compiling for the F1C100 SoC.
Also adjust the power-of-2 divider programming, because that uses a
"minus one" encoding, compared to the other SoCs.

This allows to enable SPI flash support for the F1C100 boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:22 +01:00
Andre Przywara
fcd6d936aa spi: sunxi: improve SPI clock calculation
The current SPI clock divider calculation has two problems:
- We use a normal round-down division, which results in a divider
  typically being too small, resulting in a too high frequency on the bus.
- The calculaction for the power-of-two divider is very inaccurate, and
  again rounds down, which might lead to wild bus frequencies.

This wasn't a real problem so far, since most chips can handle slightly
higher bus frequencies just fine. Also the actual speed was mostly lost
anyway, due to release_bus() reseting the device. And the power-of-2
calculation was probably never used, because it only applies to
frequencies below 47 KHz.
However this will become a problem for the F1C100s support, due to its
much higher base frequency.

Calculate a safe divider correctly (using round-up), and re-use that
value when calculating the power-of-2 value. We also separate the
maximum frequency and the input clock on the way, since they will be
different for the F1C100s.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:27:59 +01:00
Andre Przywara
239dfd1176 spi: sunxi: refactor SPI speed/mode programming
As George rightfully pointed out [1], the spi-sunxi driver programs the
speed and mode settings only when the respective functions are called,
but this gets lost over a call to release_bus(). That asserts the
reset line, thus forces each SPI register back to its default value.
Adding to that, trying to program SPI_CCR and SPI_TCR might be pointless
in the first place, when the reset line is still asserted (before
claim_bus()), so those setting won't apply most of the time. In reality
I see two nested claim_bus() calls for the first use, so settings between
the two would work (for instance for the initial "sf probe"). However
later on the speed setting is not programmed into the hardware anymore.

So far we get away with that default frequency, because that is a rather
tame 24 MHz, which most SPI flash chips can handle just fine.

Move the actual register programming into a separate function, and use
.set_speed and .set_mode just to set the variables in our priv structure.
Then we only call this new function in claim_bus(), when we are sure
that register accesses actually work and are preserved.

[1] https://lore.kernel.org/u-boot/20210725231636.879913-17-me@yifangu.com/

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: George Hilliard <thirtythreeforty@gmail.com>
2022-07-18 11:27:58 +01:00
Icenowy Zheng
56e497eba1 spi: sunxi: use XCH status to detect in-progress transfer
The current detection of RX FIFO depth seems to be not reliable, and
XCH will self-clear when a transfer is done.

Check XCH bit when polling for transfer finish.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:27:58 +01:00
Samuel Holland
68655e6ce1 net: sun8i-emac: Drop use of arch-specific header
This header is not used since commit abdbefba2a ("net: sun8i_emac: Use
consistent clock bitfield definitions"). Dropping it allows the driver
to be architecture-independent.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:27:29 +01:00
Samuel Holland
62ee043325 net: sun8i-emac: Downgrade printf during probe to debug
This just prints the PHY mode taken from the devicetree. It does not
need to be printed during every boot, and also avoids an unwanted
line break for the "net: " reporting line.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:25:40 +01:00
Andre Przywara
9311843824 sunxi: configs: streamline include/configs/sun*.h wrappers
For mostly historic reasons we had configuration headers for each
Allwinner CPU "family". These days they are mostly just including one
common header, with the rest being somewhat empty.
There were attempts to remove them, and to just use the one common header
to begin with, but this has implications to the build system, which me
might not be ready for, yet.

To document this behaviour, and to avoid something sneaking in over
time, make those files all the same (minus the CPU family name and
the copyrights), and add a comment explaining that.
This makes it easier to just remove those files later on, when needed
and possible.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-18 11:25:09 +01:00
Samuel Holland
66391263f8 reset: sunxi: Reuse the platform data from the clock driver
The clock and reset drivers use the exact same platform data. Simplify
them by sharing the object. This is safe because the parent device
(the clock device) always gets its driver model callbacks run first.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:50 +01:00
Samuel Holland
3fb1988aad reset: sunxi: Convert driver private data to platform data
The reason here is the same as the reason for changing the clock driver:
platform data can be provided when binding the driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:50 +01:00
Samuel Holland
5af97b6ff7 clk: sunxi: Convert driver private data to platform data
All of the driver private data should really be platform data since it
is determined statically (selected by the compatible string or extracted
from the devicetree). Move everything to platform data, so it can be
provided when binding the driver. This is useful for SPL, or for
instantiating the driver as part of an MFD.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:50 +01:00
Samuel Holland
46fa23f9ee clk: sunxi: Use a single driver for all variants
Now that all of the variants use the same bind/probe functions and ops,
there is no need to have a separate driver for each variant. Since most
SoCs contain two variants (the main CCU and PRCM CCU), this saves a bit
of firmware size and RAM.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:49 +01:00
Samuel Holland
d39088ad9c reset: sunxi: Get the reset count from the CCU descriptor
This allows all of the clock drivers to use a common bind function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:49 +01:00
Samuel Holland
6827aba348 clk: sunxi: Prevent out-of-bounds gate array access
Because the gate arrays are not given explicit sizes, the arrays are
only as large as the highest-numbered gate described in the driver.
However, only a subset of the CCU clocks are needed by U-Boot. So there
are valid clock specifiers with indexes greater than the size of the
arrays. Referencing any of these clocks causes out-of-bounds access.
Fix this by checking the identifier against the size of the array.

Fixes: 0d47bc7056 ("clk: Add Allwinner A64 CLK driver")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:49 +01:00
Samuel Holland
49b2b0a2b6 clk: sunxi: Store the array sizes in the CCU descriptor
The reset array size is currently used for bounds checking in the reset
driver. The same bounds check should really be done in the clock driver.

Currently, the array size is provided to the reset driver separately
from the CCU descriptor, which is a bit strange. Let's do this the usual
way, with the array sizes next to the arrays themselves.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 09:37:49 +01:00
Samuel Holland
9674c09b74 musb: sunxi: Allow host-side USB with external VBUS
Now that the PHY driver will not try to drive VBUS if it is already
driven by an external supply, there is no need to check the VBUS voltage
before powering on the PHY.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-07-15 14:10:39 +02:00
Angus Ainslie
280f45d239 configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC
Adding the SPL_USB_DWC3_GENERIC symbol broke some ti builds. This
should fix the builds but untested on HW.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-07-15 14:10:39 +02:00
Angus Ainslie
582ce23c78 usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
Suppress warnings when building the SPL without USB_DWC3_GENERIC

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-07-15 14:10:39 +02:00
Tom Rini
26f6f7fb5c Merge branch '2022-07-14-migrate-wiki-to-sphinx'
- Merge the majority of the relevant wiki content to doc/process/ and
  convert to Sphinx.  Begin cleaning up and modernizing the content as
  well to match current process.  There is still more work to be done in
  this regard.
2022-07-14 18:43:51 -04:00
Tom Rini
9bf08a637c doc: Add in the historical release statistics found on the wiki
The wiki had gitdm-generated release statistics starting with v1.3.0.
Re-generate this information as Sphinx.  This aims to be as historically
accurate as possible and so some company renames were kept to their old
rather than current name until we had made the switch previously.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:14:47 -04:00
Tom Rini
105bccb3b9 doc: process: Correct and expand slightly on the Merge Window concept
For quite a long time we've been using a 3 week, rather than 2 week,
merge window as it was only 2 weeks during the timeframe where we did 2
month rather than 3 month releases.  This corrects the places that still
had 2 weeks and tries to make things a bit clearer overall.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:14:29 -04:00
Tom Rini
6b484ba69f doc: Add doc/develop/release_cycle.rst
Migrate the RelaseCycle wiki page to Sphinx.  In terms of visible
changes, we stop having a dynamic countdown to when the release is.  And
we drop the year-based statistics, that were not being kept up to date.
For the moment, we only link to statistics for v2022.07 but will add
back the historical data in a subsequent patch.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:14:27 -04:00
Tom Rini
61550734b2 process.rst: Modernize the "Workflow of a Custodian" section
The "Workflow of a Custodian" section on the wiki had not been changed
in quite some time to reflect how the process has been functioning for
some time.  First, update some links to point to modern and current
sources of information.

Second, and more overarching, reword much of the section.  This expands
on the expectations of both custodians and developers when it comes to
rebasing patches.  Rework the final points to be clearer that Custodians
are expected to do their best to test the changes and ask for help when
needed, as well as that pull requests are expected in a timely manner.

Cc: Claudius Heine <ch@denx.de>
Cc: Martin Bonner <martingreybeard@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:14:25 -04:00
Tom Rini
50a7adcad7 process.rst: Perform minor cleanups
- Use gender-neutral language to refer to the user, consistently.
- Reword a few places so that they read more naturally.
- Make the long standing practice around "Twilight Time" more clear,
  hopefully.
- Replace a reference to MAKEALL with a reference to CI testing as
  that's the current requirement.

Cc: Claudius Heine <ch@denx.de>
Cc: Martin Bonner <martingreybeard@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:52 -04:00
Tom Rini
2180aec5b5 designprinciples.rst: Perform minor cleanups
- Remove some missed wiki markup, and escape a "\n" correctly.
- Use gender-neutral language to refer to the user, consistently.

Cc: Claudius Heine <ch@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:50 -04:00
Tom Rini
dc1ad4766e doc: Migrate Process wiki page to Sphinx
Move the current Process wiki page to doc/develop/process.rst.  The
changes here are for formatting or slight rewording so that it reads
well when linking to other Sphinx documents.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:48 -04:00
Tom Rini
a09d85677e doc: codingstyle: Remove comment about '//' style comments
For some time now we've allowed for '//' style comments, which mirrors
the Linux kernel.  So drop this point here.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:46 -04:00
Tom Rini
528581e32b doc: Migrate DesignPrinciples wiki page to Sphinx
Move the current DesignPrinciples wiki page to
doc/develop/designprinciples.rst.  The changes here are for formatting
or slight rewording so that it reads well when linking to other Sphinx
documents.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:44 -04:00
Tom Rini
4211fb2ef6 doc: Migrate CodingStyle wiki page to Sphinx
Move the current CodingStyle wiki page to doc/develop/codingstyle.rst.
The changes here are for formatting or slight rewording so that it reads
well when linking to other Sphinx documents.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-14 14:13:41 -04:00
Tom Rini
54f683dbfb Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-07-14 11:10:49 -04:00
Fabio Estevam
16aabfe2f2 spl: sdp: Pass the USB index to board_usb_init()
board_usb_init() should receive the controller_index as its
first parameter instead of having it hardcoded as 0.

All in-tree users have CONFIG_SPL_SDP_USB_DEV as 0, so this error
should not affect any board.

Fix it by passing controller_index as the parameter of board_usb_init().

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-07-14 16:13:11 +02:00
Tom Rini
58f3dc5c4e Merge tag 'mips-pull-2022-07-13' of https://source.denx.de/u-boot/custodians/u-boot-mips
- MIPS: add drivers and board support for Mediatek MT7621 SoC
2022-07-14 07:18:33 -04:00
Tom Rini
854d6de610 Merge tag 'efi-2022-10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc1

Documentation:

* rework the mkimage.1 man-page
* add a statistics page for v2022.07
* update environment description

UEFI:

* add Ilias Apalodimas as co-maintainer
* fix a memory leak in efi_set_bootdev()
* suppress a build warning
2022-07-13 21:31:46 -04:00
Weijie Gao
dd6bf539e8 MAINTAINERS: update maintainer for MediaTek MIPS platform
Update maintainer for MediaTek MIPS platform

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
c561d14c38 tools: mtk_image: add support for MT7621 NAND images
The BootROM of MT7621 requires a image header for SPL to record its size
and load address when booting from NAND.

To create such an image, one can use the following command line:
mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1"
-d u-boot-spl-ddr.bin u-boot-spl-ddr.img

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4620e8aabc spl: nand: support loading legacy image with payload compressed
Add support to load legacy image with payload compressed. This redirects
the boot flow for all legacy images. If the payload is not compressed, the
actual behavior will remain unchanged.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
fdc03bf4e9 spl: spl_legacy: fix the use of SPL_COPY_PAYLOAD_ONLY
If the payload is compressed, SPL_COPY_PAYLOAD_ONLY should always be set
since the payload will not be directly read to its load address. The
payload will first be read to a temporary buffer, and then be decompressed
to its load address, without image header.

If the payload is not compressed, and SPL_COPY_PAYLOAD_ONLY is set, image
header should be skipped on loading. Otherwise image header should also be
read to its load address.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4c4bf046a5 spl: allow using nand base without standard nand driver
This patch removes the dependency to SPL_NAND_DRIVERS for SPL_NAND_BASE to
allow minimal spl nand driver to use nand base for probing NAND chips.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
3ab8beaadc nand: raw: add support for MediaTek MT7621 SoC
This patch adds NAND flash controller driver for MediaTek MT7621 SoC.
The NAND flash controller of MT7621 supports only SLC NAND flashes.
It supports 4~12 bits correction with maximum 4KB page size.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
ad80d48979 net: mediatek: add support for MediaTek MT7621 SoC
This patch adds GMAC support for MediaTek MT7621 SoC.
MT7621 has the same GMAC/Switch configuration as MT7623.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
86062e7a5d net: mediatek: use regmap api to modify ethsys registers
The address returned by regmap_get_range() is not remapped. Directly r/w
to this address is ok for ARM platforms since it's idential to the virtual
address.

But for MIPS platform only virtual address should be used for access.
To solve this issue, the regmap api regmap_read/regmap_write should be used
since they will remap address before accessing.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
528e483a09 net: mediatek: remap iobase address
The iobase address from dts node is actually physical address. It's
identical to the virtual address in ARM platform. This is ok because this
driver was used only by ARM platforms (mt7622/mt7623 ...).

But now this driver will be used by mt7621 which is a MIPS SoC. For MIPS
platform the physical address space is mapped to KSEG0 and KSEG1 and this
makes the virtual address apparently not idential to its physical address.

To solve this issue, this patch replaces dev_read_addr with dev_remap_addr
to get the remapped iobase address.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
163db41d2f mmc: mediatek: add support for MediaTek MT7621 SoC
This patch adds SDXC support for MediaTek MT7621 SoC

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
fe3d57a443 watchdog: add support for MediaTek MT7621 SoC
This patch makes mt7621_wdt driver available for MediaTek MT7621 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
40862e49f2 gpio: add support for MediaTek MT7621 SoC
This patch makes mt7621_gpio driver available for MediaTek MT7621 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
d2002fa7e2 spi: add support for MediaTek MT7621 SoC
This patch makes mt7621_spi driver available for MediaTek MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
be3dc92098 phy: mtk-tphy: add support for MediaTek MT7621 SoC
This patch makes mtk-tphy driver available for MediaTek MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
5ac88d1b01 usb: xhci-mtk: add support for MediaTek MT7621 SoC
This patch makes xhci-mtk driver available for MediaTek MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4d30111cea pinctrl: mtmips: add support for MediaTek MT7621 SoC
This patch adds pinctrl support for MediaTek MT7621 SoC.
The MT7621 SoC supports pinconf, but it is not the same as mt7628.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
daf4ce6b5e reset: mtmips: add reset controller support for MediaTek MT7621 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
e75cc00982 clk: mtmips: add clock driver for MediaTek MT7621 SoC
This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
46c7e9ed03 doc: mediatek: add documentation for mt7621 reference boards
The MT7621 requires external binary blob being executed during u-boot's
boot-up flow. It's necessary to provide a guide here for users to correctly
build the u-boot.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
0eaee027f7 mips: mtmips: add two reference boards for mt7621
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
4bc0104c97 mips: mtmips: add support for MediaTek MT7621 SoC
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.

The default build target is u-boot-mt7621.bin.

The specification of this chip:
https://www.mediatek.com/products/homenetworking/mt7621

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
2948d9cf86 mips: add support for noncached_alloc()
This patch adds support for noncached_alloc() which was only supported by
ARM platform.

Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of ARM platform, with only two differences:
1. MMU is untouched in noncached_set_region()
2. Address returned by noncached_alloc() is converted using KSEG1ADDR()

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
9a3bbb0eba mips: add __image_copy_len for SPL linker script
This patch adds __image_copy_len needed by TPL of MT7621 SoC.
The __image_copy_len represents the binary blob size of both SPL/TPL
binaries. To achieve this, __text_start/end are added for calculation.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
3a6cf2ded7 mips: add more definitions for asm/cm.h
This patch add more definitions needed for MT7621 initialization.
MT7621 needs to initialize GIC/CPC and other related parts.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
1cca8ba9ec mips: add asm/mipsmtregs.h for MIPS multi-threading
To be compatible with old u-boot used by lots of MT7621 devices, the u-boot
needs to boot-up MT7621's all cores, and all VPES of each core.

This patch adds asm/mipsmtregs.h from linux kernel which is need for
boot-up VPEs.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Heinrich Schuchardt
a093d72e62 MAINTAINERS: add Ilias Apalodimas to EFI PAYLOAD as co-maintainer
Ilias has since long been reviewing UEFI patches.
Now he has volunteered to assist me in maintaining the sub-system.

Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-07-13 20:11:10 +02:00
Heinrich Schuchardt
a8d52f9a9b efi_loader: suppress executable stack warning
When linking EFI binaries the linker emits:

    ld.bfd: warning: lib/efi_loader/efi_crt0.o:
    missing .note.GNU-stack section implies executable stack

Suppress the warning.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-13 20:07:07 +02:00
Heinrich Schuchardt
868353daa3 efi_loader: memory leak in efi_set_bootdev()
efi_dp_str() allocates memory which should be released after use.

Use %pD printf code. Adjust message wording.

Fixes: d837cb1e3b ("efi: Add debugging to efi_set_bootdev()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-13 20:07:07 +02:00
Masahisa Kojima
9897350c52 efi_loader: expose END device path node
This commit exposes the END device path node.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-13 20:07:07 +02:00
Tom Rini
34a026a891 doc: Add statistics page for v2022.07
Our statistics pages have always been generated by gitdm.  After
patching gitdm to generate an acceptable Sphinx output for tables,
include that and some other basic formatting here.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-13 20:07:07 +02:00
Tom Rini
556af511d4 doc: environment: Expand on fdt_addr, initrd_addr and loadaddr
- Explain why fdt_addr and initrd_addr should not be set to disable
  relocation normally.
- Provide some advice on the typical loadaddr default value.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:07:07 +02:00
Tom Rini
dc6b683035 doc: environment: Drop u-boot_addr_r
This variable is never set nor explained why it would be set, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-13 20:07:07 +02:00
Sean Anderson
e297f874a1 doc: Add man page for dumpimage
This tool seems a bit underloved. Unfortunately, it seems to be missing
support for FIT images. Alas...

Add a man page documenting it. The example is taken from commit a804b5ce2d
("Add dumpimage, a tool to extract data from U-Boot images").

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
b42168c125 doc: mkimage: Further document -o and -R
Despite the original description of these options, they are not always
image names, or even files. Some image types use these options to convey
configuration directly. Re-document these options as configuration options.

Additionally, add a new section documenting the format of the configuration
for each image type which uses it. In general, if configuration is used
directly (without a separate file) I have added documentation for it. If
the configuration points to a separate file, I have referenced that file's
documentation. Where there is no such documentation, I have added it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
dc3a923ed6 mkimage: Add long options
The mkimage command has had many options added over the years.
Unfortunately, we are starting to run out of short options. Recent options
don't have any obvious relation to their meaning (e.g. -o/-g). Fortunately,
long options exist. Add long options for each current short option.

For the curious, the remaining short options are HIkLmMPQSuUwWXyYzZ.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
785a051ee5 doc: mkimage: Remove AUTHORS section
Per man-pages(7), "use of an AUTHORS section is strongly discouraged."
Remove it, and instead add some copyright notices and an SPDX. The default
license for U-Boot is GPL2, so that's what I put. The copyright dates are
based on the commit dates.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
84bd5cd4db doc: mkimage: Add SEE ALSO section
This adds a SEE ALSO section to link to similar man pages, as well as to
the U-Boot documentation.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
d048718a44 doc: mkimage: Add BUGS section
In leiu of a non-standard HOMEPAGE section, add a BUGS section with a link
to the issue tracker.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
9cc4000cf2 doc: mkimage: Edit options for style and consistency
This makes a variety of changes for the options to make them
typographically consistent, clarify their meaning, and fix grammatical (or
other) errors. Many of the changes here are stylistic, though there are a
few fixes. The main changes I made across the board were:

- All options are bolded and parameters italicised
- All single quotes are properly matched (instead of using apostrophes)
- Minor background info has been added to clarify many underdocumented
  options
- Default values for options are documented

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
e9927c2664 doc: mkimage: Use correct capitalization for NAME
The description in NAME should not be capitalized. Fix a grammatical error
as well.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
a5e2b67544 doc: mkimage: Rearrange/remove some options
This moves some options which work in any mode to the general options
section. -p is moved to after -E/-B since those options are related. This
also adds documentation for -h and -V.

The -F, -l, and -G options are documented twice. Remove the second
documentation in each case. The synopsis for -l also suggests an implied
second uimage-file-name parameter. E.g.

	mkimage [-l uimage-file-name] uimage-file-name

This is misleading, so remove it. Wrap a few lines to 80 characters as
well.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
a4d0c74eed doc: mkimage: Use subsection macro
The options are divided up into several subsections. Use the appropriate
macro. While we're at it, rename the headings to better reflect the
contents of their sections.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
1bdf48623c doc: mkimage: Regularize option documentation
Square brackets are commonly used to denote optional parts of a command.
However, all option arguments are mandatory. Remove these brackets. This
also removes some unnecessary quotation marks, and uses hyphens to connect
words in option arguments. This is intended to just clean up the
formatting, leaving content corrections to later patches.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
3dc1ff026f doc: mkimage: Reformat examples
This puts each example in a new paragraph and uses a hanging indent for
continued lines to increase clarity. We use tabs instead of .in or .RS for
the indent because it renders properly in both man and mandoc (which is
what many common HTML man pages use). The only nit is that the tab stops in
man default to something like 2", so reduce that to 1". We also escape
every "minus" as recommended by man-pages(7).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
7ec625f180 doc: mkimage: Use empty request instead of blank lines
Blank lines do not have well-defined semantics in fill mode (the default).
Instead, use empty requests (.) where vertical space is necessary for
readability. There are a few places where we use a paragraph instead.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Sean Anderson
a568554ee0 doc: mkimage: Use standard style for synopsis
The synopsis section is a bit messy. As an example, "uimage file name" is
printed in italics, bold, and roman (depending on the line). This cleans
things up and converts the synopsis section to use standard style. The
.SY/.YS macros set up appropriate formatting for command synopsis sections
(such as disabling hyphenation and setting a hanging indent). All parts of
the synopsis now use the following style:

- Bold for parts of the command which should be typed in by the user (such
  as the program name and flags)
- Italic for parts which should be replaced (such as uimage-file-name)
- Roman for parts which should not be typed at all (such as brackets)

Multi-word variables now use hyphens to connect their words instead of
spaces. This makes it clearer that all the words are part of the same
variable. Additionally, "option ..." is used to denote where other options
may be specified, as this appears to be standard style.

In addition to the above style changes, this also makes some changes to
content. The use of the term "legacy" has been removed, since this simply
refers to any non-FIT image type. Additionally, wording like "uimage file
name" has been replaced with "image-file-name" to better reflect that
images may or may not be uImages. Lastly, the "auto" value for -f is
documented in the synopsis.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-13 20:05:49 +02:00
Tom Rini
357fa8bb4d Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
2022-07-13 08:09:20 -04:00
Patrick Delaunay
48b1cff947 usb: hub: introduce HUB_DEBOUNCE_TIMEOUT
Introduce define for connection timeout, named HUB_DEBOUNCE_TIMEOUT
as in linux kernel drivers/usb/core/hub.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-12 21:59:54 +02:00
Kory Maincent
98ac7857f9 usb: kbd: allow probing even if usbkbd not in stdin
For now the driver does not probe if usbkbd was not present in stdin.
This presents two issues, we can not probe the driver before setting stdin
and we can not use this driver in other manner than stdin console.

This patch fixes this by adding an else statement. It simply probes the
driver without console management in the case "usbkbd" is not in stdin.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2022-07-12 21:59:54 +02:00
Rui Miguel Silva
018cdfc3d0 corstone1000: enable isp1763 usb controller and mmc
MPS3 board have a ISP1763 usb controller, enable it to be used
for mass storage access for example. Enable the usb command
also and for the FVP support for mass storage enable the mmc
command.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2022-07-12 21:59:54 +02:00
Rui Miguel Silva
88861a2c2c usb: add isp1760 family driver
ISP1760/61/63 are a family of usb controllers, here the main
goal is to support the ISP1763 hcd part found in the MPS3 FPGA
board form Arm. This is based on the kernel driver and ported
to u-boot.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2022-07-12 21:59:54 +02:00
Rui Miguel Silva
b2d2b78722 usb: common: move urb code to common
Move urb code from musb only use to a more common scope, so other
drivers in the future can use the handling of urb in usb.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2022-07-12 21:59:54 +02:00
T Karthik Reddy
b252d79b09 usb: dwc3: Add support to reset usb ULPI phy
When usb PHY initialization is done, the PHY need to be reset.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-12 21:59:54 +02:00
Michal Simek
f36479e302 ti: keystone: Don't select GPIO_EXTRA_HEADER
keystone doesn't have custom gpio.h that's why don't select
GPIO_EXTRA_HEADER which points to it.

Logic in arch/arm/include/asm/gpio.h is very clear

 #ifdef CONFIG_GPIO_EXTRA_HEADER
 #include <asm/arch/gpio.h>
 #endif
 #include <asm-generic/gpio.h>

Where it is visible that there is no gpio.h in platform headers:
$ ls arch/arm/mach-keystone/include/mach/
clock_defs.h  clock-k2e.h  clock-k2hk.h  ddr3.h      hardware-k2e.h
hardware-k2hk.h  i2c_defs.h      mon.h   mux-k2g.h   xhci-keystone.h
clock.h       clock-k2g.h  clock-k2l.h   hardware.h  hardware-k2g.h
hardware-k2l.h   mmc_host_def.h  msmc.h  psc_defs.h

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-12 21:59:54 +02:00
Johann Neuhauser
48d9eaf682 arm: dts: stm32mp1: Drop fastboot and stm32prog trigger gpios on DHCOM
PA13 and PA14 are used for USB power control and can't be used
to enforce fastboot or stm32prog mode by pressing a button.

Defining CONFIG_FASTBOOT/CONFIG_CMD_STM32PROG without this patch applied
results in fastboot/stm32prog always starting, because PA13/PA14 are always
low during boot. So drop the wrong trigger gpios definitions.

Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
257d001cb5 configs: stm32mp13: activate some command
Activate useful commands in STM32MP13x config, already activated in
stm32mp15_defconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
33129f6130 configs: stm32mp13: activate I2C support
Activate the I2C driver in STM32MP13x config.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
420f37a91f configs: stm32mp13: activate RTC support
Activate the RTC driver in STM32MP13x config.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
72d7a302f6 configs: stm32mp13: activate RNG support
Activate the RNG driver provided by OP-TEE.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
eb67e63da4 configs: stm32mp13: Add support for baudrates higher than 115200
On STM32MP13x STMicroelectronics boards, the UART can reliably go up to
4000000 bauds when connected to the external ST-LINKV3.

This patch adds the support of higher baudrates on STMicroelectronics
STM32MP13x boards with ST-LINKV3.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
6d647676ea ARM: dts: stm32mp13: activate led on STM32MP13F-DK
Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
12d5a0626c ARM: dts: stm32mp13: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1 with:
- ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
- ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
- ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
- ARM: dts: stm32: enable RTC support on stm32mp135f-dk
- ARM: dts: stm32: add RTC node on stm32mp131
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:09 +02:00
Patrick Delaunay
50b371fd68 stm32mp: add support of STM32MP13x Rev.Y
Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:47:34 +02:00
Lionel Debieve
12e11aae2d rng: stm32mp1_rng: add conditional reset feature for STM32MP13x
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:47:34 +02:00
Patrick Delaunay
d4d01d0e99 i2c: stm32: add support for the st,stm32mp13 SOC
The stm32mp13 soc differs from the stm32mp15 in terms of
clear register offset for controlling the FMP (Fast Mode Plus).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:47:34 +02:00
Patrick Delaunay
6cccc8d396 ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.

Only boards provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1

The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
and the associated SCMI services, reset and clock.

These device trees are only supported with stm32mp15_defconfig,
with OP-TEE, SCMI and without SPL support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:32 +02:00
Patrick Delaunay
7f4de655c0 configs: stm32mp15: increase malloc size for pre-reloc
With support of SCMI in OP-TEE, the early malloc usage
increase, the associated defined CONFIG_SYS_MALLOC_F_LEN
need to be increased.

For example, for stm32mp15_defconfig and
stm32mp157c-dk2-scmi.dtsi, we have:

Early malloc usage: 14098 / 80000

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:32 +02:00
Patrick Delaunay
43872790d8 clk: stm32: add support compatible st, stm32mp1-rcc-secure
Add support for new compatible st,stm32mp1-rcc-secure used when the
RCC resource is managed by secured world (RCC_TZCR.TZEN=1)
iand when SCMI is used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:32 +02:00
Patrick Delaunay
69ef98b209 ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1

- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
  on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15

+ patch from stm32-dt-for-v5.19-fixes-2

- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Patrick Delaunay
cb8edb996b mmc: stm32_sdmmc2: introduce of_to_plat ops
Add the uclass ops of_to_plat to parse the device tree properties
to respect the expected sequence by the driver model.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Patrick Delaunay
efd77dbca3 mmc: stm32_sdmmc2: remove privdata
All the elements of privdata are static and build from device tree,
they are moved in platdata to prepare the support of ops
of_to_plat.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Patrick Delaunay
5f1e6b639b mmc: stm32_sdmmc2: cosmetic: rename stm32_sdmmc_bind
Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all other functions
in SDMMCv2 driver

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ic51acdfbbba6e971809c1029dd2227038bfe879d
2022-07-12 11:46:31 +02:00
Patrick Delaunay
44db098ae1 ARM: dts: stm32mp13: add SCMI nodes
Add the node for SCMI firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:30 +02:00
Patrick Delaunay
0b69ce6a81 ARM: dts: stm32mp13: add OP-TEE nodes
Add the node for OP-TEE firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:18 +02:00
Patrick Delaunay
6500c5760c configs: stm32m15: support STM32MP_BOARD_EXTRA_ENV for st boards
Correctly handle STM32MP_BOARD_EXTRA_ENV define in stm32mp15_st_common.h;
the STM32MP_BOARD_EXTRA_ENV is added in CONFIG_EXTRA_ENV_SETTINGS
definition, as it is done "stm32mp15_st_common.h"

Without this patch, the content of STM32MP_BOARD_EXTRA_ENV is not used in
the default environment for STMicroelectronics boards.

Fixes: 806c4dd315 ("configs: stm32mp1: set the console variable for extlinux.conf")
Reported-by: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-12 11:19:18 +02:00
Tom Rini
36b661dc91 Merge branch 'next' 2022-07-11 14:58:57 -04:00
Tom Rini
e092e32502 Prepare v2022.07
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-11 09:42:58 -04:00
Tom Rini
05a4859637 Merge branch '2022-07-08-Kconfig-migrations' into next
- Another small round of CONFIG migrations to Kconfig
2022-07-08 18:03:08 -04:00
Tom Rini
07ef80cd9d powerpc: Use the poison value of 0xdeadbeef directly in DDR init
On p1_p2_rdb_pc platforms, we set ddr_data_init to the "poison" value of
0xdeadbeef rather than a real calculated / derived value.  Do this
directly and comment rather than via CONFIG.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
cb42c1f9b1 i2c: Remove non-DM_I2C support from davinci_i2c.c
As the migration deadline has passed, and all platforms have been
migrated, remove the non-DM code here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
ba39d90728 legoev3: Migrate to DM_I2C
Perform a basic migration of the calls in setup_serial_number() to DM so
that we can switch to using DM_I2C on this platform.

Cc: David Lechner <david@lechnology.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: David Lechner <david@lechnology.com>
2022-07-08 17:57:34 -04:00
Tom Rini
edcbd6e388 omap3: emif4: More clearly hard-code cs0 size
We have a single platform that is both in the OMAP3 family of parts, but
has an EMIF4 memory controller.  Currently we hard-code the size of
chip select 0.  Make this more clear by putting the value in the
function rather than a CONFIG option.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
95cc3efcc1 arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
38d091ac1d Convert CONFIG_SYS_CACHE_STASHING to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CACHE_STASHING

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
b960d654cb requirements: Move to atomicwrites==1.4.1
As explained upstream:
https://github.com/untitaker/python-atomicwrites/issues/61 there is no
longer a 1.3.0 version but the API is unchanged.  Move to 1.4.1.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 15:43:23 -04:00
Tom Rini
52686b8739 requirements: Move to atomicwrites==1.4.1
As explained upstream:
https://github.com/untitaker/python-atomicwrites/issues/61 there is no
longer a 1.3.0 version but the API is unchanged.  Move to 1.4.1.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 15:23:05 -04:00
Tom Rini
9ff4ce8abc Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
2022-07-08 14:39:07 -04:00
Fabio Estevam
c519b82e7c imx8mq_phanbell: Remove custom CONFIG_SYS_MALLOC_F_LEN
Currently, the imx8mq_phanbell board fails to boot.

Remove the custom CONFIG_SYS_MALLOC_F_LEN setting in favor of the
generic one done via the main Kconfig.

Since commit b598957206 ("Kconfig: Fix SYS_MALLOC_F_LEN for i.MX8MQ")
the default SYS_MALLOC_F_LEN value for i.MX8MQ is 0x2000.

With such default value, the board boots again.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-08 13:27:23 -04:00
Tom Rini
7bc0be96f7 Merge branch '2022-07-08-assorted-updates' into next
- Assorted bugfixes and improvements
2022-07-08 12:38:03 -04:00
Marek Vasut
5004901efb board_init: Do not reserve MALLOC_F area on stack if non-zero MALLOC_F_ADDR
In case the MALLOC_F_ADDR is set to non-zero value, the early malloc area is
not going to be placed just below stack top, but elsewhere. Do not reserve
MALLOC_F bytes in this case, as that wastes stack space and may even cause
insufficient stack space in SPL.

This functionality is particularly useful on i.MX8M, where the insufficient
stack space can be triggered.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Tom Rini <trini@konsulko.com>
2022-07-08 12:20:28 -04:00
Ralph Siemsen
cc5dfdee6b regmap: fix some comments
Correct spelling and copy/paste errors in comments.

Fixes 1c4db59d9b ("regmap: Add support for regmap fields")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-08 12:20:28 -04:00
Pali Rohár
5e998b4de3 serial: ns16550: Wait in debug_uart_init until tx buffer is empty
Commit d293759d55 ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.

But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.

Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).

Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 12:20:04 -04:00
Stefan Herbrechtsmeier
e3812b5b08 led: pwm: Use NOP uclass driver for top-level node
The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit 0107469780
("led: gpio: Use NOP uclass driver for top-level node").

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2022-07-08 10:56:45 -04:00
Kory Maincent
7886c45d42 mtd: rawnand: Add support to dedicated function to set timings
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.

Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-07-08 10:56:45 -04:00
Rafał Miłecki
8142c4554f fw_env: add fallback to Linux's NVMEM based access
A new DT binding for describing environment data block has been added in
Linux's commit 5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment
variables binding"). Once we get a proper Linux NVMEM driver it'll be
possible to use Linux's binary interface for user-space as documented
in the:
https://www.kernel.org/doc/html/latest/driver-api/nvmem.html

This commits makes fw_env fallback to looking for a compatible NVMEM
device in case config file isn't present. In a long term this may make
config files redundant and avoid code (info) duplication.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2022-07-08 09:06:57 -04:00
Heinrich Schuchardt
9b78c9297b Makefile: respect CONFIG_CC_OPTIMIZE_FOR_DEBUG for host tools
If CONFIG_CC_OPTIMIZE_FOR_DEBUG=y, the host tools should be built with
debug symbols and with reduced optimization.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-08 09:06:57 -04:00
Heinrich Schuchardt
d1a03e6bbc sound: enable building DA7219 driver with ACPIGEN=n
sandbox_defconfig builds the DA7219 driver. It should be possible to
build the sandbox without ACPI support.

ACPI support in the DA7219 driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.

Fixes: 0324b7123e ("sound: Add an ACPI driver for Dialog Semicondutor da7219")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-08 09:05:47 -04:00
Heinrich Schuchardt
3ca32c806b snd: enable building max98357a driver with ACPIGEN=n
sandbox_defconfig builds the max98357a driver. It should be possible to
build the sandbox without ACPI support.

ACPI support in the max98357a driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.

Fixes: 54bcca2973 ("sound: Add an ACPI driver for Maxim MAX98357ac")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-08 09:05:47 -04:00
Heinrich Schuchardt
ebaa3d053e test: fix CONFIG_ACPIGEN dependencies
Some tests cannot be built with CONFIG_ACPIGEN=n. Consider this in the
Makefile.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-07-08 09:05:47 -04:00
Pali Rohár
e6ca148104 distroboot: Fix ubifs
Fix multiple issues in ubifs distroboot code:

U-Boot supports attaching only one MTD device as UBI at the time. So
always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume
${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part'
command attach MTD device always as UBI device ubi0.

Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command.
Distroboot scripts require ${bootfstype} variable to be properly set and it
is already set for all other boot types.

Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI
device does not have partitions, but has volumes. Distroboot scripts
require something to be set in ${distro_bootpart} variable, so set it to
the UBI volume which is currently mounted by ubifs.

Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code
differs from the other partition code that it requires "ubi" prefix before
number.

Explicitly unmount ubifs volume after loading all data from it. This allows
to detach UBI device from MTD device.

Move definition of MTD device with UBI and UBI volume with ubifs filesystem
from global env variables ${bootubipart} and ${bootubivol} into the
distroboot "func" macro, defined in board include config files. UBIFS
distroboot macros then set ${bootubipart} and ${bootubivol} local variables
for compatibility with existing distroboot scripts.

This last change allows to define more UBIFS target devices and make it
clear what is boot MTD/UBI device.

All board include config files are adjusted to use this new scheme of
specifying boot MTD/UBI device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-07-08 09:05:47 -04:00
Pali Rohár
69ca709d0f ubifs: Fix reference count leak in ubifsumount
Original ubifs code was designed that after ubifs_umount() call it is
required to also call ubi_close_volume() which closes underlying UBI
volume. But U-Boot ubifs modification have not implemented it properly
which caused that ubifsumount command contains resource leak. It can be
observed by calling simple sequence of commands:

  => ubi part mtd2
  ubi0: attaching mtd2
  ...
  => ubifsmount ubi0
  => ubifsumount
  Unmounting UBIFS volume rootfs!
  => ubi detach
  ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway
  ubi0: detaching mtd2
  ubi0: mtd2 is detached

Fix this issue by calling ubi_close_volume() and mutex_unlock() in
directly in ubifs_umount() function before freeing U-Boot's global
ubifs_sb. And remove duplicate calls of these two functions in remaining
places. Note that when ubifs_umount() is not called then during error
handling is still needed to call ubi_close_volume() and mutex_unlock.

With this change ubifsumount command does not throw that error anymore:

  => ubi part rootfs
  ubi0: attaching mtd2
  ...
  => ubifsmount ubi0
  => ubifsumount
  Unmounting UBIFS volume rootfs!
  => ubi detach
  ubi0: detaching mtd2
  ubi0: mtd2 is detached

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-08 09:05:47 -04:00
Rogier Stam
54ee5ae841 Add SCSI scan for ENV in EXT4 or FAT
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.

Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-07-08 09:05:47 -04:00
Tom Rini
ea92f95d63 Merge branch '2022-07-07-Kconfig-migrations-dead-code-removal' into next
- Migrate more CONFIG options to Kconfig and remove some unused code
  while we're at it.
2022-07-07 14:29:37 -04:00
Tom Rini
c45568cc4e Convert CONFIG_SYS_BOOTM_LEN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTM_LEN

As part of this, rework error handling in boot/bootm.c so that we pass
the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not
be available to host tools but we do know the size that we passed to
malloc().

Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
64a2a7b04b Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTCOUNT_LE
   CONFIG_SYS_BOOTCOUNT_BE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
d9c4d66aef kmcoge5ne: Move BFTIC3 CONFIG references to their usage
We only reference CONFIG_SYS_BFTIC3_BASE in one location.  Move the
comment to where we reference it, and use the value directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-07 14:01:09 -04:00
Tom Rini
56fc54ad06 mx*sabresd: Reference CONFIG_SYS_AUXCORE_BOOTDATA value directly
As this is used in the environment, reference it directly rather than as
a CONFIG value.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
bb20a105e9 Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOT_RAMDISK_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
f6c1f91761 Convert CONFIG_SYS_FSL_CPC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CPC
   CONFIG_SYS_CPC_REINIT_F

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
5a4461867c Convert CONFIG_SYS_RAMBOOT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_RAMBOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:08 -04:00
Tom Rini
3dab405b45 Convert CONFIG_SYS_BOOK3E_HV to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOK3E_HV

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:56 -04:00
Tom Rini
a457ebd786 arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-07 09:29:08 -04:00
Tom Rini
fcf4fa71ab Convert CONFIG_SYS_83XX_DDR_USES_CS0 to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_83XX_DDR_USES_CS0

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
d9d4978143 thunerx_88xx: Clean up config slightly.
We don't use CONFIG_SYS_64BIT anywhere and can use
CONFIG_TARGET_THUNDERX_88XX to build the device trees.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
afe3378701 Convert CONFIG_PALMAS_POWER to Kconfig
This converts the following to Kconfig:
   CONFIG_PALMAS_POWER

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
2bb9d7c65a Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
   CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
   CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
0d121ad6de Convert CONFIG_SYS_DISCOVER_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DISCOVER_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
7675a526e0 Convert CONFIG_SYS_UNIFY_CACHE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_UNIFY_CACHE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
f1c6dfa426 layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so
remove them.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
ac8b36938a usb: Remove some unused CONFIG settings
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set
CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME.  Drop
these from platforms that we can.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
dea25842ab usb: ohci-hcd: Remove some unused legacy code
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage.  No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
cd6a45a41f Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
    CONFIG_SYS_OHCI_SWAP_REG_ACCESS
    CONFIG_SYS_USB_OHCI_CPU_INIT
    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
    CONFIG_SYS_USB_OHCI_SLOT_NAME
    CONFIG_USB_ATMEL
    CONFIG_USB_ATMEL_CLK_SEL_PLLB
    CONFIG_USB_ATMEL_CLK_SEL_UPLL
    CONFIG_USB_OHCI_LPC32XX
    CONFIG_USB_OHCI_NEW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
abba59f115 Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_XHCI_EXYNOS
   CONFIG_USB_EHCI_EXYNOS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Neil Armstrong
647ba68841 doc: board: amlogic: add documentation on boot flow
This is a preliminary documentation introducing different
boot sequences, and notably the recovery mode.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220706093649.3261229-1-narmstrong@baylibre.com
2022-07-07 10:09:40 +02:00
Tom Rini
cb9843bda3 Merge branch '2022-07-06-platform-updates' into next
- Assorted updates for Toradex, TI, Aspeed and Nuvoton platforms
2022-07-06 18:54:29 -04:00
Jim Liu
847505a3ee misc: nuvoton: Add host interface configuration driver
add nuvoton BMC npcm750 host configuration driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-07-06 18:34:16 -04:00
Joel Stanley
b24087ae64 CI: Add Aspeed AST2600
The AST2600 has a Qemu model that allows testing. Create a SPI NOR image
containing the combined SPL and u-boot FIT image.

Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
3045d61c1c aspeed/spl: Remove OVERLAY from linker script
The generic arm linker script contains this section:

   .bss __rel_dyn_start (OVERLAY) : {
       ...
   }

The (OVERLAY) syntax in the description causes the .bss section to be
included in the NOR area of the image:

 $ objdump -t -j .bss spl/u-boot-spl
  SYMBOL TABLE:
  0000c61c l    d  .bss	00000000 .bss
  0000c640 l     O .bss	00000040 __value.0
  0000c68c g     O .bss	00000000 __bss_end
  0000c61c g     O .bss	00000000 __bss_start
  0000c680 g     O .bss	0000000c stdio_devices

This is what the custom linker script tries to avoid, as the NOR area is
read-only.

Remove the OVERLAY syntax to fix the BSS location:

 $ objdump -t -j .bss spl/u-boot-spl
  SYMBOL TABLE:
  83000000 l    d  .bss	00000000 .bss
  83000000 l     O .bss	00000040 __value.0
  0000c61c g     O .bss	00000000 __image_copy_end
  8300004c g     O .bss	00000000 __bss_end
  83000000 g     O .bss	00000000 __bss_start
  83000040 g     O .bss	0000000c stdio_devices

This restores the state of the linker script before the patch that fixed
the linker lists issue.

Fixes: f6810b749f ("aspeed/ast2600: Fix SPL linker script")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
154cffa16a ast2600: Configure u-boot-with-spl.bin target
The normal way of loading u-boot is as a FIT, so configure u-boot.img as
the SPL playload.

The u-boot-with-spl.bin target will add padding according to
CONFIG_SPL_MAX_SIZE which defaults to 64KB on the AST2600.

With this the following simple steps can be used to build and boot a
system:

  make u-boot-with-spl.bin
  truncate -s 64M u-boot-with-spl.bin
  qemu-system-arm -nographic -M ast2600-evb \
    -drive file=u-boot-with-spl.bin,if=mtd,format=raw

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
a16175350c spl: Set SPL_MAX_SIZE default for AST2600
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
f78a1f2117 config/ast2600: Disable hash hardware accel
The HACE driver lacks support for all the hash types, causing boot to
fail with the default FIT configuration which uses CRC32.

Additionally the Qemu model or the u-boot driver is unable to correctly
compute the SHA256 hash used in a FIT.

Disable HACE by default while the above issues are worked out to enable
boot testing in Qemu.

Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
c24129e8b2 config/ast2600: Make position independent
Allows loading one u-boot from another. Useful for testing on hardware.

Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
82010a704e config/ast2600: Enable CRC32
Useful for testing images with the default hash type.

Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
dc96a8241d config/ast2600: Enable eMMC related boot options
Allow booting zImage from ext4 devices with DOS or UEFI partition
layouts.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:32:00 -04:00
Joel Stanley
a7d606ff61 mmc/aspeed: Enable controller clocks
Request and enable the controller level clocks.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
66900bc254 mmc/aspeed: Probe from controller
The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.

Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:

    ofnode node;

    dev_for_each_subnode(node, parent) {
    	struct udevice *dev;
    	int ret;

    	ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
    					 ofnode_get_name(node),
    					 node, &dev);
    	if (ret)
    		return ret;
    }

However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.

Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.

Select MISC as the controller driver is implemented as a misc device.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
f49a7a160d mmc/aspeed: Add debuging for clock probe failures
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
50204533dc clk/ast2500: Add SD clock
In order to use the clock from the sdhci driver, add the SD clock.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
85bb3a4eee clk/ast2600: Adjust eMMC clock names
Adjust clock to stay compatible with those used by the Linux kernel
device tree.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
67e20f9d65 clk/aspeed: Add debug message when clock fails
A common message across platforms that prints the clock number.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
0b2a749bc6 ARM: dts: ast2500: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
dedf8e3186 ARM: dts: ast2600: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
f760403f83 config/aspeed: Enable EEPROM options
To allow testing of the I2C driver, enable the eprom command and the
misc driver.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:31:29 -04:00
Joel Stanley
93330f2823 config/ast2600: Enable I2C driver
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Joel Stanley
50b23b1c5b i2c/aspeed: Add AST2600 compatible
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
453fe1eece i2c/aspeed: Fix reset control
The reset control was written for the ast2500 and directly programs the
clocking register.

So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
0a8bd97f88 reset/aspeed: Implement status callback
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
b45768ebfe ARM: dts: ast2600-evb: Add I2C devices
The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7,
and a LM75 temp sensor on bus 8.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Joel Stanley
5ff466fade ARM: dts: ast2500-evb: Add I2C devices
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
3ad1d85d3c ARM: dts: ast2600-evb: Remove redundant pinctrl
Now that these are in the dtsi we don't need them in the EVB device
tree.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Joel Stanley
fc28e02404 ARM: dts: ast2600: Disable I2C nodes by default
Allow boards to enable the buses they use.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Joel Stanley
a87273bc40 ARM: dts: ast2600: Add I2C reset properties
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06 14:30:51 -04:00
Eddie James
8c3019216e ARM: dts: ast2600: Add I2C pinctrl
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-07-06 14:30:51 -04:00
Bryan Brattlof
10c8bafbc3 soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.

Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.

Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-07-06 14:30:51 -04:00
Jim Liu
fdd08f896b phy: nuvoton: add NPCM7xx phy control driver
add BMC NPCM750 phy control driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-07-06 14:30:51 -04:00
Philippe Schenker
1cf4e79f57 toradex: tdx-cfg-block: add new toradex oui range
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:

For serial-numbers 00000000-16777215 OUI 00:14:2d is taken
For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken

Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:51 -04:00
Nishanth Menon
a58147c2db board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.

While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.

Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Nishanth Menon
bc1de48371 board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.

These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.

Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Nishanth Menon
8b5218e7cb board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Vignesh Raghavendra
e4b4501ede firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.

Drop J7200 EVM specific settings as its same as J721e

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
6ea5bcc4a6 configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
4c092bb306 board: ti: am62x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
249e9f3d19 board: ti: am62x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
362b0d2e6e arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Georgi Vlaev
a04bbb83b4 arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
7e27ce16c5 toradex: tdx-cfg-block: extend assembly version
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.

Examples:

If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z

New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
494ef10c3b toradex: tdx-cfg-block: use defines for string length
With those defines the length can be reused and is in one place
extendable.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Philippe Schenker
39ff0624bc toradex: tdx-cfg-block: use only snprintf
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-06 14:30:08 -04:00
Aswath Govindraju
e0392596e9 board: ti: j721e: Return if there is an error while configuring SerDes
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-07-06 14:30:08 -04:00
Vaishnav Achath
c16b4f14a3 arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2022-07-06 14:30:08 -04:00
Vaishnav Achath
6dd18a6568 common: spl: spl_spi: add support for dynamic override of sf bus
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.

This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-06 14:30:08 -04:00
Tom Rini
2d2c61ff04 Merge tag 'efi-2022-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2022-07-rc7

UEFI:

* correct verification of signed UEFI binaries
2022-07-06 09:17:08 -04:00
Tom Rini
4b7d0b24c7 Merge branch '2022-07-05-more-Kconfig-migrations' into next
- Migrate more CONFIG symbols to Kconfig, remove some dead code and
  clean-up arch/Kconfig.nxp slightly more.
2022-07-06 09:15:36 -04:00
Tom Rini
432243cee1 Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KIRKWOOD_EGIGA_INIT
   CONFIG_KIRKWOOD_PCIE_INIT
   CONFIG_KIRKWOOD_RGMII_PAD_1V8
   CONFIG_KM_DISABLE_PCIE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
604c62f511 qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code
These CONFIG options are only used on this board, in the board file
itself.  Remove these from the CONFIG namespace and define in the board
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
6bb74fe19b Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCI_VER_3_X

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
363397ae1a Convert CONFIG_PCI_MSC01 to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_MSC01

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
1bc8ef4d70 socrates: Rework CONFIG_PCI_CLK_FREQ
The symbol CONFIG_PCI_CLK_FREQ is local to this board.  Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
31a8f5545e Convert CONFIG_SH7751_PCI to Kconfig
This converts the following to Kconfig:
   CONFIG_SH7751_PCI

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
9ee06d286a MPC837XERDB: Remove unused PCI defines
These defines aren't referenced in code today, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:05:00 -04:00
Tom Rini
c55094f14d m68k: Remove unused PCI code
The only mcf5445x platform does not enable PCI, drop this code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
e58eebb514 Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_CONFIG_HOST_BRIDGE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
bf2c48fa1a Convert CONFIG_PCI_GT64120 to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_GT64120

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
f27bca4c27 Convert CONFIG_PCI_SCAN_SHOW to Kconfig
This converts the following to Kconfig:
   CONFIG_PCI_SCAN_SHOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
4e7860288c pci: Remove pci_sh4 and related defines.
This driver is not enabled anywhere, remove it.  Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
4547a1bc92 Convert CONFIG_PCIE_IMX to Kconfig
This converts the following to Kconfig:
   CONFIG_PCIE_IMX

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
3dc2987f5c Convert CONFIG_PCIE1 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_PCIE1
   CONFIG_PCIE2
   CONFIG_PCIE3
   CONFIG_PCIE4
   CONFIG_PCI1

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:59 -04:00
Tom Rini
a552ffc9d2 Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig
This converts the following to Kconfig:
   CONFIG_LAYERSCAPE_NS_ACCESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:53 -04:00
Tom Rini
5d7f601480 lcd: Remove legacy CONFIG_FB_ADDR code
No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop
this legacy code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:40 -04:00
Tom Rini
d8e8461709 Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_FIXED_MMC_LOCATION
   CONFIG_ESDHC_HC_BLK_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:40 -04:00
Tom Rini
f4cd75e96a powerpc: Clean up CHAIN_OF_TRUST related options
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST.  From the board header files,
remove a number of never-set options.  Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well.  Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD.  Migrate all of the configurable addresses
to Kconfig.

If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:15 -04:00
Tom Rini
52aaa1840d nxp: config_fsl_chain_trust.h: Clean up and remove unused portions
The way that secure boot is implemented today on NXP ARM platforms does
not reuse the elements found in include/config_fsl_chain_trust.h to
construct CONFIG_SECBOOT but instead board header files have their
environment setup as needed and then fsl_setenv_chain_of_trust() will
set secureboot in the environment.  Remove a large number of unused
defines here.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
5aad0a14ba fsl_validate: Migrate SPL_UBOOT_KEY_HASH to Kconfig
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig.  As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
540b73a7be arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig.  Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
601483ffd5 Convert CONFIG_SYS_FSL_SFP_BE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KEY_REVOCATION
   CONFIG_SYS_FSL_SFP_BE
   CONFIG_SYS_FSL_SFP_LE
   CONFIG_SYS_FSL_SFP_VER_3_0
   CONFIG_SYS_FSL_SFP_VER_3_2
   CONFIG_SYS_FSL_SFP_VER_3_4
   CONFIG_SYS_FSL_SRK_LE

This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:00 -04:00
Tom Rini
c9f85187e2 Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_SEC_MON
   CONFIG_SYS_FSL_SEC_MON_BE
   CONFIG_SYS_FSL_SEC_MON_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:00 -04:00
Tom Rini
7e7d04aecb Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig
This converts the following to Kconfig:
   CONFIG_ESDHC_DETECT_QUIRK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:46 -04:00
Tom Rini
2b2817b5c8 Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ESBC_HDR_LS
   CONFIG_ESBC_ADDR_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
d622b08923 nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp
Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
93145335fb nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig
The way that we use this file currently means that we have to guard it
in every platform Kconfig.  But it is also required in all NXP
platforms, including non-reference platforms.  Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
1e7750f1bc Convert CONFIG_HETROGENOUS_CLUSTERS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_HETROGENOUS_CLUSTERS
   CONFIG_SYS_MAPLE
   CONFIG_SYS_CPRI
   CONFIG_PPC_CLUSTER_START
   CONFIG_DSP_CLUSTER_START
   CONFIG_SYS_CPRI_CLK
   CONFIG_SYS_ULB_CLK
   CONFIG_SYS_ETVPE_CLK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
f96096d0dc Convert CONFIG_EXTRA_CLOCK to Kconfig
This converts the following to Kconfig:
   CONFIG_EXTRA_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
c24e8e2bb3 Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DDR_RAW_TIMING

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
bca4509d57 Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_SPD_BUS_NUM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
1f7e2fc324 Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig:
   CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
b68ba0e0eb Convert CONFIG_USB_GADGET_DWC2_OTG_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_GADGET_DWC2_OTG_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
dd4bf24445 Convert CONFIG_USE_ONENAND_BOARD_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_USE_ONENAND_BOARD_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
ddd39d0cc1 Convert CONFIG_SAMSUNG_ONENAND to Kconfig
This converts the following to Kconfig:
   CONFIG_SAMSUNG_ONENAND

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-05 17:03:01 -04:00
Tom Rini
de0a732915 Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig.  Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-05 17:03:01 -04:00
Tom Rini
d398b29aa0 smdkc100: Remove some unused options
There are a few options we test and set and then never reference, remove
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
140f0aa0de nxp: Cleanup some emulator related options.
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h
- Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in
  drivers/ddr/fsl/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
0285455d90 watchdog: designware: Make this depend on WDT
As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.

Cc: Chee Tien Fong <tien.fong.chee@intel.com>
Cc: Chin-Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinh.nguyen@intel.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Stefan Roese <sr@denx.de>
Cc: hee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-05 17:03:01 -04:00
Tom Rini
fbc3621fb5 Convert CONFIG_ENABLE_36BIT_PHYS to Kconfig
This converts the following to Kconfig:
   CONFIG_ENABLE_36BIT_PHYS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
69a2bb6321 net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL
This value is always used at the default, rename it for now.  This
likely should come from the device tree if non-default, moving forward.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
89d888ed6d Convert CONFIG_DW_ALTDESCRIPTOR to Kconfig
This converts the following to Kconfig:
   CONFIG_DW_ALTDESCRIPTOR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
AKASHI Takahiro
8fb9dbdea7 test/py: efi_secboot: add a test for a forged signed image
In this test case, a image binary, helloworld.efi.signed, is willfully
modified to print a corrupted message while the signature itself is
unchanged.

This binary must be rejected under secure boot mode.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-07-05 14:37:16 +02:00
AKASHI Takahiro
634f6b2fb1 efi_loader: image_loader: add a missing digest verification for signed PE image
At the last step of PE image authentication, an image's hash value must be
compared with a message digest stored as the content (of SpcPeImageData type)
of pkcs7's contentInfo.

Fixes: commit 4540dabdca ("efi_loader: image_loader: support image authentication")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-07-05 14:37:16 +02:00
AKASHI Takahiro
b72d09fa7d efi_loader: image_loader: replace EFI_PRINT with log macros
Now We are migrating from EFI_PRINT() to log macro's.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-07-05 14:37:16 +02:00
AKASHI Takahiro
b330140659 efi_loader: signature: export efi_hash_regions()
This function is used to calculate a message digest as part of
authentication process in a later patch.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-07-05 14:37:16 +02:00
AKASHI Takahiro
b124efc09f lib: crypto: add mscode_parser
In MS authenticode, pkcs7 should have data in its contentInfo field.
This data is tagged with SpcIndirectData type and, for a signed PE image,
provides a image's message digest as SpcPeImageData.

This parser is used in image authentication to parse the field and
retrieve a message digest.

Imported from linux v5.19-rc, crypto/asymmetric_keys/mscode*.
Checkpatch.pl generates tones of warnings, but those are not fixed
for the sake of maintainability (importing from another source).

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-07-05 14:37:16 +02:00
Tom Rini
e1d3e637c7 Merge tag 'fsl-qoriq-2022-7-3' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Several patches from Pali
 - fsl_elbc detection fix
 - sort p2020 dts node, drop duplicated node
 - p1_p2_rdb_pc board cleanup
 - simplify mpc85xx _start_cont jumping code
2022-07-04 21:30:23 -04:00
Tom Rini
0cc846dafc Prepare v2022.07-rc6
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 08:18:33 -04:00
Tom Rini
d98a6a95bd configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 08:15:34 -04:00
Andre Przywara
9125b4b021 usb: host: ehci-generic: Fix error check
Commit 81755b8c20 ("usb: host: ehci-generic: Make resets and clocks
optional") improved the error check to cover the reset property being
optional. However this was using the wrong error variable for the
check, so would now never fail.

Use the correct error variable for checking the result of
reset_get_bulk(), to actually report genuine errors.

Fixes: 81755b8c20 ("usb: host: ehci-generic: Make resets and clocks optional")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-04 08:00:36 -04:00
Pali Rohár
9167a1c28c powerpc: mpc85xx: Simplify jump to _start_cont in flash code
After more patches code for jumping to _start_cont symbol in flash memory
involved to code with useless mathematical operations. Currently it does:

  r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE
  jump to r3

Which is equivalent of just:

  r3 := ABS(_start_cont)
  jump to r3

The purpose of that code is just to jump to _start_code symbol,
independently of program counter. So branch must be done to absolute
address. Trying to write:

  ba _start_cont

just cause linker error:

    LD      u-boot
  powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as':
  (.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o
  make: *** [Makefile:1801: u-boot] Error 1

Probably by the fact that absolute address cannot be expressed by 24-bits.
So write the code via mtlr+blr pattern as it was before and load general
purpose register with absolute address of the symbol:

  lis     r3,_start_cont@h
  ori     r3,r3,_start_cont@l
  mtlr    r3
  blr

Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like
number@h and number@l without any problem. And disassembling of compiler
u-boot binary proved that lis+ori instructions are called with numbers
which represent halves of absolute address of _start_cont symbol.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
6b74cfdcee board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.

So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.

Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe ("board/freescale: Remove P1021RDB board
support") and d521cece5a ("board/freescale: Remove P1025RDB board
support").

So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
2c0073aadd board: freescale: p1_p2_rdb_pc: Allow to compile without __SW_BOOT_SD macro
Add #ifdef guard for __SW_BOOT_SD macro like there are guards for all other
__SW_BOOT_* macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
f7b4db358c board: freescale: p1_p2_rdb_pc: Allow to compile without BOARD_NAME
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
67ddd56251 powerpc: dts: p2020: Remove duplicate pic@40000 node
DT node pic@40000 is defined explicitly in p2020-post.dtsi file and also
transitionally via include file pq3-mpic.dtsi. Remove duplicate definition
from p2020-post.dtsi.

No change in final DTB file.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
a8436a01a8 powerpc: dts: p2020: Sort DT nodes by their addresses
No functional change.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Pali Rohár
712a172499 mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.

Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.

This change fixes usage of none ecc mode if it is specified in DTS file.

Fixes: c9ea9019c5 ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-03 15:13:51 +08:00
Tom Rini
730fc474b1 Merge tag 'efi-2022-07-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc6

UEFI:

* Fix EFI_IO_BLOCK_PROTOCOL: read correct blocks on partitions

Other:

* Honor CONFIG_SYS_64BIT_LBA in the disk uclass
2022-07-02 09:55:26 -04:00
Tom Rini
6cae9aeeab Merge branch '2022-07-01-additional-critical-fixes-and-updates'
- Update some MAINTAINERS entries, fix a regression on FIT images
2022-07-02 09:54:46 -04:00
Paul Barbieri
7a85f32413 EFI: Fix ReadBlocks API reading incorrect sector for UCLASS_PARTITION devices
The requsted partition disk sector incorrectly has the parition start
sector added in twice for UCLASS_PARTITION devices. The efi_disk_rw_blocks()
routine adds the diskobj->offset to the requested lba. When the device
is a UCLASS_PARTITION, the dev_read() or dev_write() routine is called
which adds part-gpt_part_info.start. This causes I/O to the wrong sector.

Takahiro Akashi suggested removing the offset field from the efi_disk_obj
structure since disk-uclass.c handles the partition start biasing. Device
types other than UCLASS_PARTITION set the diskobj->offset field to zero
which makes the field unnecessary. This change removes the offset field
from the structure and removes all references from the code which is
isolated to the lib/efi_loader/efi_disk.c module.

This change also adds a test for the EFI ReadBlocks() API in the EFI
selftest code. There is already a test for reading a FAT file. The new
test uses ReadBlocks() to read the same "disk" block and compare it to
the data read from the file system API.

Signed-Off-by: Paul Barbieri <plb365@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-02 14:19:12 +02:00
Heinrich Schuchardt
054de212ce disk: honor CONFIG_SYS_64BIT_LBA
Without the patch for qemu-x86_defconfig:

* sizeof(lbaint_t) = 4 in dev_read()
* sizeof(lbaint_t) = 8 in blkcache_read()

CONFIG_SYS_64BIT_LBA is defined in common.h via
include/configs/x86-common.h:22.

We have to include common.h before including blk.h.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-07-02 14:19:09 +02:00
Joel Stanley
c5e2442033 image: fit: Use stack allocation macro
The documentation above the DEFINE_ALIGN_BUFFER says it's for use
outside functions, but we're inside one.

Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also
includes the cache alignment.

Fixes: b583348ca8 ("image: fit: Align hash output buffers")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-07-01 16:01:25 -04:00
Michael Trimarchi
975918f6a1 MAINTAINERS: Add Dario and Michael as NAND maintainers
Both of us are working on NAND subsystem on several architectures and
we have boards and projects to improve the subsystem in uboot. The idea
is to guarantee quick feedback on patches sent on mailing list and most
of the time the possibilities to test them.

Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
2022-07-01 16:00:54 -04:00
Hannes Schmelzer
04b26c9896 board/BuR/*: replace maintainer of BuR boards
Since I'm leaving the company with end of June, the maintainership will
be transferred to Wolfgang Wallner.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2022-07-01 16:00:36 -04:00
Tom Rini
936d468b7b chameleonv3: Add MAINTAINERS file
This file was missing, add.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-01 15:55:54 -04:00
Tom Rini
9fcc2fb3fe Merge commit 'ef5ba2cef4a08b68caaa9215fcac142d3025bbf7' of https://github.com/tienfong/uboot_mainline 2022-07-01 09:14:32 -04:00
Tom Rini
085fea0b65 Merge tag 'u-boot-amlogic-20220701' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- search dtb for meson-axg-usb-ctrl on board axg
2022-07-01 09:13:58 -04:00
Teik Heng Chong
ef5ba2cef4 drivers: clk: Update license for Intel N5X device
All the source code of clk-mem-n5x.c and clk-n5x.c are from Intel,
update the license to use both GPL2.0 and BSD-3 Clause because this
copy of code may used for open source and internal project.

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-07-01 15:00:39 +08:00
Paweł Anikiel
e26ecebc68 socfpga: arria10: Allow dcache_enable before relocation
Before relocating to SDRAM, the ECC is initialized by clearing the
whole SDRAM. In order to speed this up, dcache_enable is used (see
sdram_init_ecc_bits).

Since commit 503eea4519 ("arm: cp15: update DACR value to activate
access control"), this no longer works, because running code in OCRAM
with the XN bit set causes a page fault. Override dram_bank_mmu_setup
to disable XN in the OCRAM and setup DRAM dcache before relocation.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:15 +08:00
Paweł Anikiel
5c53d9c0d9 socfpga: arria10: Wait for fifo empty after writing bitstream
For some reason, on the Mercury+ AA1 module, calling
fpgamgr_wait_early_user_mode immediately after writing the peripheral
bitstream leaves the fpga in a broken state (ddr calibration hangs).
Adding a delay before the first sync word is written seems to fix this.
Inspecting the fpgamgr registers before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
8b1eee3730 socfpga: arria10: Improve bitstream loading speed
Apply some optimizations to speed up bitstream loading
(both for full and split periph/core bitstreams):

 * Change the size of the first fs read, so that all the subsequent
   reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE).
   This value was chosen so that in subsequent reads the fat fs driver
   doesn't have to allocate a temporary buffer in get_contents
   (assuming 8KiB clusters).

 * Change the buffer size to a larger value when reading to ddr
   (but not too large, because large transfers cause a stack overflow
   in the dwmmc driver).

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
aea0e80a9f socfpga: arria10: Replace delays with busy waiting in cm_full_cfg
Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
9ebca7095b sysreset: socfpga: Use parent device for reading base address
This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
73d88cf971 misc: atsha204a: Increase wake delay by tWHI
From the ATSHA204A datasheet (document DS40002025A):

Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.

tWHI value can be found in table 7-2.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
61298270c5 config: Add Chameleonv3 config
Add defconfig and Kconfig files for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
813c800107 board: Add Chameleonv3 board dir
Add board directory for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
8566b3682f arm: dts: Add Chameleonv3 devicetrees
Add devicetrees for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
882c00edeb arm: dts: Add Chameleonv3 handoff headers
Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:14 +08:00
Paweł Anikiel
e21b8ac3f1 arm: dts: Add Mercury+ AA1 devicetrees
Devicetree headers for Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-01 14:57:13 +08:00
Tom Rini
33938636f0 Merge tag 'u-boot-rockchip-20220630' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for rk3328 nonopi-r2s boot env;
- Fix for rk8xx pmic boot on power plug-in;
- Fix for tee.bin support in fit image;
- rk3288 board dts update or fix;
- Some rk3399 board fix;
2022-06-30 22:36:41 -04:00
Tom Rini
284c1a9b4b Merge tag 'u-boot-at91-2022.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:

This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
2022-06-30 15:21:52 -04:00
Tom Rini
c5e7003aa8 Merge tag 'versal-qspi-for-v2022.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Versal QSPI/OSPI changes for v2022.10

- Add new flash types
- Add cadence ospi driver for Xilinx Versal
2022-06-30 09:32:15 -04:00
Mihai Sain
c1cadac793 gpio: atmel_pio4: add support for PIO_PORTE
Add support for gpio PORT E, which is available on e.g. sama7g5 SoC.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-06-30 15:49:00 +03:00
Tom Rini
5c873269fc Merge branch '2022-06-28-Kconfig-migrations' into next
- Convert a large number of CONFIG symbols to Kconfig.  Of note is a
  large chunk of USB symbols (and dead code removal), ensuring all
  SPL/TPL/VPL symbols have an appropriate dependency, largely (but not
  entirely) removing the testing of CONFIG_SPL_BUILD in board headers,
  and allowing CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS to
  co-exist as this facilities migration of many platforms.
2022-06-29 10:11:21 -04:00
T Karthik Reddy
2c27fdc070 spi: cadence-qspi: Fix programming ospi flash speed
When the requested flash speed is 0, the baudrate division for the
requested speed causing drop in the performance. So set the ospi flash
to operate at max frequency when requested speed is zero.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-6-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 16:00:31 +02:00
T Karthik Reddy
248fe9f302 spi: cadence_qspi: Enable apb linear mode for apb read & write operations
On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 16:00:31 +02:00
T Karthik Reddy
bf8dae5fcf spi: cadence-qspi: reset qspi flash for versal platform
When flash operated at non default mode like DDR, flash need to be reset
to operate in SDR mode to read flash ids by spi-nor framework. Reset the
flash to the default state before using the flash. This reset is handled
by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we
do raw read and write access by the registers.
Versal platform utilizes spi calibration for read delay programming, so
incase by default read delay property is set in DT. We make sure not to
use read delay from DT by overwriting read_delay with -1.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 16:00:31 +02:00
T Karthik Reddy
cf553bf20e arm64: versal: Add versal specific cadence ospi driver
Add support for cadence ospi driver for Versal platform. This driver
provides support for DMA read operation which utilizes cadence qspi
driver.
If "cdns,is-dma" DT property is specified use dma for read operation
from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in
cadence_ospi_versal driver add a weak function defination in
cadence_qspi driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 15:58:48 +02:00
T Karthik Reddy
1e2b8139d9 spi: cadence-qspi: move cadence qspi macros to header file
Move all the cadence macros from cadence_qspi_apb.c to cadence_qspi.h
file.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 15:58:48 +02:00
Ashok Reddy Soma
baef13ec9d mtd: spi-nor-ids: Add support for flashes tested by xilinx
Add support for various flashes from below manufacturers which are tested
by xilinx for years.

EON:
	en25q128b
GIGA:
	gd25lx256e
ISSI:
	is25lp008
	is25lp016
	is25lp01g
	is25wp008
	is25wp016
	is25wp01g
	is25wx256
MACRONIX:
	mx25u51245f
	mx66u1g45g
	mx66l2g45g
MICRON:
	mt35xl512aba
	mt35xu01g
SPANSION:
	s70fs01gs_256k
SST:
	sst26wf016b
WINBOND:
	w25q16dw
	w25q16jv
	w25q512jv
	w25q32bv
	w25h02jv

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1653455832-14763-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 15:32:48 +02:00
Andrea Scian
05dcb5be50 mtd: mxs_nand_spl: fix nand_command protocol violation
mxs_nand_command() implementation assume that it's working with a
LP NAND, which is a common case nowadays and thus uses two bytes
for column address.

However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
expects only one byte of column address, even for LP NANDs.
This leads to ONFI detection problem with some NAND manufacturer (like
Winbond) but not with others (like Samsung and Spansion)

We fix this with a simple workaround to avoid the 2nd byte column address
for those two commands.

Also align the code with nand_base to support 16 bit devices.

Tested on an iMX6SX device with:
* Winbond W29N04GVSIAA
* Spansion S34ML04G100TF100
* Samsung K9F4G08U00

Tested on imx8mn device with:
* Windbond W29N04GV

Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
CC: Stefano Babic <sbabic@denx.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-29 09:26:44 -04:00
Peter Robinson
fce1e9bba2 rockchip: pinebook-pro: sync PBP dtb to 5.18
Sync the pinebook pro to upstream 5.18, in particular this brings
brings in a fix so the DP is disabled so Linux will actually boot.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:43:05 +08:00
Peter Robinson
1ed1827fb3 rockchip: rockpro64: enable leds
The Rockpro64 has some GPIO leds so let's enable them so the
user gets some output in early boot.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:42:54 +08:00
Peter Robinson
26f7842bd4 rockchip: pinebook-pro: minor SPI flash fixes
Set a default offset for environment so it doesn't write it to
unexpected locations, drop unneeded mtd config option.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:42:44 +08:00
Chris Morgan
30975fb73d rockchip: Add option to prevent booting on power plug-in
For Rockchip boards with the all rk8xx series PMICs (excluding the
rk808), it is sometimes desirable to not boot whenever the device is
plugged in. An example would be for the Odroid Go Advance.

This provides a configurable option to check the PMIC says it was
powered because of a plug-in event. If the value is 1 and this option
is selected, the device shuts down shortly after printing a message
to console stating the reason why it's shutting down. Powering up the
board with the power button is not affected.

This patch parallels the work done in the following patch series:
https://lore.kernel.org/u-boot/20220121133732.2397273-1-andre.przywara@arm.com/

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-29 11:42:10 +08:00
Chris Morgan
ad607512f5 power: pmic: rk8xx: Support sysreset shutdown method
Add support for sysreset shutdown for this PMIC. The values were pulled
from the various datasheets, but for now it has only been tested on
the rk817 (for an Odroid Go Advance).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:42:10 +08:00
Jerome Forissier
348310233d mach-rockchip: make_fit_atf.py: support OP-TEE tee.bin v1 format
This commit adds support for the OP-TEE 'tee.bin' v1 format for Rockchip
platforms.

Since OP-TEE 3.8.0, tee.bin contains meta-data in a proprietary format
in addition to the ELF data. They are essential information for proper
initialization of the TEE core, such as the size of the memory region
covered by the TEE or a compact representation of runtime relocation
data when ASLR is enabled.

With OP-TEE 3.8.0 onwards, 'tee.elf' MUST NOT be used and 'tee.bin'
MUST be used instead. Ignoring this recommendation can lead to crashes
as described in [3].

Link: [1] 5dd1570ac5
Link: [2] https://github.com/OP-TEE/optee_os/blob/3.17.0/scripts/gen_tee_bin.py#L275-L302
Link: [3] https://github.com/OP-TEE/optee_os/issues/4542
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-29 11:32:35 +08:00
Emmanuel Vadot
743ce226bd rockchip: rk3328: nanopi-r2s: Use the sdcard for the env
The NanoPi-R2S doesn't have eMMC so use the sdcard as the device
to save the environment variables

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:30:15 +08:00
Johan Jonker
6f0037f305 arm: dts: rockchip: rk3288: move dma-controller nodes
In order to better compare the Linux rk3288.dtsi version
with the u-boot version move the dma-controller nodes
to the DT root.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:29:52 +08:00
Johan Jonker
e0bf010ab9 arm: dts: rockchip: rk3288: sort mipi hdmi lvds and dp nodes
In order to better compare the Linux rk3288.dtsi version
with the u-boot version sort the mipi,hdmi,lvds and dp nodes.

Changed:
  Rename mipi_dsi label.
  Rename dp nodename.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:29:03 +08:00
Johan Jonker
170447466c arm: dts: rockchip: rk3288: bulk convert gpios to their constant counterparts
Bulk convert rk3288 DT gpios to their constant counterparts.

Partial Linux sync for the rk3288.dtsi file.

ARM: dts: rockchip: bulk convert gpios to their constant counterparts
https://lore.kernel.org/all/20190402121852.14442-1-heiko@sntech.de/

sed -i -f script.sed rk3288.dtsi

================================

/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:28:38 +08:00
Johan Jonker
196e0c6223 arm: dts: rockchip: remove usb-phy fallback string for rk3188
With the conversion of rockchip-usb-phy.yaml a long time used fallback
string for rk3066a/rk3188 was added. The linux driver doesn't do much with
the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c
does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example
don't match. Remove the usb-phy fallback string for rk3188
to prevent possible strange side effects.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:28:16 +08:00
Johan Jonker
e0479b71ed rockchip: board: change condition board_usb_init() in function
Change define condition in board_usb_init() function
to allow rk3066/rk3188 to use the USB PHY driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:28:16 +08:00
Johan Jonker
42a2f7a46d rockchip: usb: phy: add rk3066/rk3188 support
Add rk3066a/rk3188 support to rockchip_usb2_phy.c
They don't have completely identical usb phy registers,
so separate comapatible strings and data.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:28:15 +08:00
Paweł Jarosz
8fb5595525 rockchip: usb: gadget: add rk3066 product id
Product id of rk3066 usb otg is 0x300a.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:28:15 +08:00
Johan Jonker
43c084ccbc rockchip: include: configs: remove unused configs for tag and size
The configs ROCKCHIP_CHIP_TAG and ROCKCHIP_MAX_INIT_SIZE were
originally added with rksd.c, rkspi.c and rkcommon.c in mind,
but are no longer in use and replaced by struct spl_info,
so remove unused configs for tag and size.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:27:56 +08:00
Simon Glass
cd92fff72e phycore-rk3288: Avoid enabling partition support in SPL
This is not needed or used, and adds code size. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29 11:27:28 +08:00
Tom Rini
613c326581 gw_ventana: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over
to plain text in board/gateworks/gw_ventana/gw_ventana.env.  This lets
us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a
single environment file now.

Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-06-28 17:11:49 -04:00
Tom Rini
a331017c23 Complete migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT, include in environment
- Ensure that everyone setting mtdids= and mtdparts= is doing so via the
  CONFIG options.
- If the CONFIG options are set, ensure that the default environment
  sets mtdparts / mtdids.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:49 -04:00
Tom Rini
bf904ea418 Rename CONFIG_SYS_AUTOLAOD to CONFIG_SYS_DISABLE_AUTOLOAD
The "autoload" environment variable is always checked with env_get_yesno
as it can be set to any form of no.  The default behavior of
env_get_yesno is to return -1 on variables that are not set, which acts
as true in general (we test for non-zero return).  To convert
CONFIG_SYS_AUTOLOAD to Kconfig, given that it was almost always used to
set autoload to no, first rename to CONFIG_SYS_DISABLE_AUTOLOAD for
consistency sake.  Then, make it so that if enabled we set autoload=0 in
the default environment.  Migrate all platforms which set
CONFIG_SYS_AUTOLOAD to non-true or that set autoload to false in their
default environment to using CONFIG_SYS_DISABLE_AUTOLOAD

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:49 -04:00
Tom Rini
d8564e919d opos6uldev: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to
plain text in board/armadeus/opos6uldev/opos6uldev.env.  This lets us
manage env_version without a CONFIG variable.

Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
5d7dea1400 Convert CONFIG_ENV_RANGE to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_RANGE

Now that this is in Kconfig we can enforce a minimum size and so remove
the check in C code to ensure range is larger than size.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
5c3f6a3206 dragonboard410c: Migrate to using CONFIG_EXTRA_ENV_TEXT
With the exception of distro_boot support, we can move all of the rest
of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in
turn remove CONFIG_ENV_REFLASH.

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
07b9642841 env: Remove include/generated/env.* under "make clean"
When running "make clean" we want to remove env.in and well as env.txt.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
5cf6a06ae8 env: Do not make CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS conflict
Largely, the use of CONFIG_EXTRA_ENV_SETTINGS can be migrated directly
to come from CONFIG_EXTRA_ENV_TEXT.  The biggest case that cannot easily
be migrated is distro_bootcmd support.  Rather than block migration on
this, remove the #error here so that we can being moving forward.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
5dbf320bef Convert CONFIG_SYS_USB_FAT_BOOT_PARTITION to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_USB_FAT_BOOT_PARTITION

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
3371eddaa1 Convert CONFIG_USB_MAX_CONTROLLER_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_MAX_CONTROLLER_COUNT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
525fbfabf1 common: usb: Update logic for usb.o, usb_hub.o and usb_storage.o
Now that we have consistently named symbols to enable USB host or gadget
controller support in SPL or full U-Boot, we do not need to
unconditionally build USB files nor depend on non-SPL symbols to know
when to build these common files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
78196169fd mx6memcal: Remove SPL_USB_HOST
As this particular platform is intended to be loaded and run a specific
set of routines in SPL, we do not need the ability to further use the
USB as a host device in SPL.  Disable this support.

Cc: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Eric Nelson <eric@nelint.com>
2022-06-28 17:11:48 -04:00
Tom Rini
a89a4538a1 usb: Remove non-DM code in ehci-fsl and xhci
The DM_USB migration deadline has passed and this is not used in SPL.
Remove this now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
6e52cb259b Convert CONFIG_FPGA_STRATIX_V to Kconfig
This converts the following to Kconfig:
   CONFIG_FPGA_STRATIX_V

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
60d45642fe fpga: Remove CONFIG_FPGA_COUNT
This define is only currently used in a single board, and always set to
one.  Define this within the board code and remove other references.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
82e0b51ccb Convert CONFIG_ENV_MIN_ENTRIES et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_MIN_ENTRIES
   CONFIG_ENV_MAX_ENTRIES

Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
910feb50d4 Globally remove most CONFIG_SPL_BUILD tests from config headers
With the exception of how PowerPC handles SPL and TPL (which has its own
issues), we cannot safely hide options under CONFIG_SPL_BUILD.  Largely
remove the places that have this test today.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
de47ff5363 Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MPC85XX_NO_RESETVEC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Tom Rini
5e5744cb2c Remove CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE and CONFIG_SPL_ABORT_ON_RAW_IMAGE
These symbols do not exist in mainline, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:05:52 -04:00
Tom Rini
3a21d45d33 siemens: Move CONFIG_FACTORYSET to Kconfig
Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to
start with.  Use select for this on the boards that need it.

Cc: Anatolij Gustschin <agust@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:04:38 -04:00
Tom Rini
4d2cab33d4 video: Migrate exynos display options to Kconfig
Following how it's done for the majority of drivers, add a new
VIDEO_EXYNOS option and Kconfig file under drivers/video/exynos and list
the current options there.

Cc: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-06-28 17:04:38 -04:00
Tom Rini
24ec3dea4b arm: samsung: Migrate a number of symbols to Kconfig
- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than
  CONFIG_EXYNOS[45]
- In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX
- Migrate specific SoC CONFIG values to Kconfig
- Use CONFIG_TARGET_x rather than CONFIG_x
- Migrate other CONFIG_EXYNOS_x symbols to Kconfig
- Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE
- Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest
  of U-Boot usage.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:04:37 -04:00
Tom Rini
1e03e03d03 arm: exynos: Remove old pwm backlight driver
Remove the unused older exynos pwm backlight driver.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-06-28 17:03:32 -04:00
Tom Rini
dc2d27ae72 arm: samsung: Remove dead LCD code
Since bb5930d5c9 ("exynos: video: Convert several boards to driver
model for video") there have been no callers of any of the exynos_lcd_*
family of functions.  Remove these from the boards, and then remove
unused logo and related code as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-06-28 17:03:32 -04:00
Tom Rini
713a8cbb94 block: ide: Remove ide_preinit function
The only platform currently that defines an ide_preinit function has an
empty one that immediately returns.  Remove this hook.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:32 -04:00
Tom Rini
9836c43309 ata: sata_sil: Remove useless BLK guard in sata_sil.h
Now that the driver only supports CONFIG_BLK, remove the useless guard
in sata_sil.h.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:32 -04:00
Tom Rini
aca1f6789a Convert CONFIG_LBA48 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_LBA48
   CONFIG_SYS_64BIT_LBA

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:32 -04:00
Tom Rini
0a816d92d5 Convert CONFIG_FSL_SATA_V2 to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_SATA_V2

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
21af94f882 ata: fsl_sata: Remove legacy non-BLK code
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
7b976f7a0b ata: dwc_ahsata: Remove legacy non-CONFIG_AHCI code
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
d64d338fcc xtensa: Switch to using CONFIG_XTENSA for building device trees
The only use of CONFIG_XTFPGA was to build all of the in-tree device
trees.  Switch to using CONFIG_XTENSA instead of a non-Kconfig symbol.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
13ce351b9a vpl: Ensure all VPL symbols in Kconfig have some VPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a VPL
specific option has at least a direct dependency on VPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
8bea4bf7d3 tpl: Ensure all TPL symbols in Kconfig have some TPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a TPL
specific option has at least a direct dependency on TPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
5858b90f50 spl: Move SPL_LDSCRIPT defaults to one place
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
49958813e2 usb: ehci-mx5: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated.  Remove now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
13750af038 usb: ehci-mxc: Remove
There are no platforms enabling this driver, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
0a4fcb2abc PowerPC: Remove some unused USB code
These particular code paths aren't used anymore, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
7ef53a3dc6 Convert CONFIG_TEGRA_GPU to Kconfig
This converts the following to Kconfig:
   CONFIG_TEGRA_GPU

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
cbee8c1ac2 usb: xhci-fsl: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated.  Remove now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
d4ae15260b Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_EHCI_TXFIFO_THRESH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
093044735f usb: ehci-fsl: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated.  Remove now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
5cc1d9214a Convert CONFIG_HAS_FSL_DR_USB to Kconfig
This converts the following to Kconfig:
   CONFIG_HAS_FSL_DR_USB

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
e78e880da9 Convert CONFIG_EHCI_HCD_INIT_AFTER_RESET to Kconfig
This converts the following to Kconfig:
   CONFIG_EHCI_HCD_INIT_AFTER_RESET

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
879b0b16de Convert CONFIG_EHCI_DESC_BIG_ENDIAN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_EHCI_DESC_BIG_ENDIAN
   CONFIG_EHCI_MMIO_BIG_ENDIAN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Tom Rini
90bb5c08c8 ehci-mxs: Remove non-DM code
This code is not enabled anywhere, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:30 -04:00
Tom Rini
d6e9efa6b2 Convert CONFIG_EFLASH_PROTSECTORS to Kconfig
This converts the following to Kconfig:
   CONFIG_EFLASH_PROTSECTORS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:30 -04:00
Tom Rini
5c511ea936 Convert CONFIG_E1000_NO_NVM to Kconfig
This converts the following to Kconfig:
   CONFIG_E1000_NO_NVM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:30 -04:00
Tom Rini
a063429c17 Merge branch '2022-06-28-assorted-fixes'
- Fix a squashfs security issue, an i2c access security issue and fix
  NAND booting on imx8mn_bsh_smm_s2
2022-06-28 17:02:25 -04:00
Dario Binacchi
0c4db621e2 configs: imx8mn_bsh_smm_s2: add mtdparts to bootargs
Passing the mtdparts environment variable to the Linux kernel is
required to properly mount the UBI rootfs.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-06-28 15:51:56 -04:00
Dario Binacchi
bede82f750 configs: imx8mn_bsh_smm_s2: remove console from bootargs
The Linux kernel device tree already specifies the device to be used for
boot console output with a stdout-path property under /chosen.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-06-28 15:51:56 -04:00
Dario Binacchi
592e04cde5 configs: imx8mn_bsh_smm_s2: add UBI commands
imx8mn_bsh_smm_s2 uses ubifs rootfs, UBI commands are required to flash
it.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-06-28 15:51:56 -04:00
Dario Binacchi
93899d0746 configs: imx8mn_bsh_smm_s2: add NAND driver
It allows to boot from NAND.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-06-28 15:51:56 -04:00
Miquel Raynal
7f7fb9937c fs/squashfs: Use kcalloc when relevant
A crafted squashfs image could embed a huge number of empty metadata
blocks in order to make the amount of malloc()'d memory overflow and be
much smaller than expected. Because of this flaw, any random code
positioned at the right location in the squashfs image could be memcpy'd
from the squashfs structures into U-Boot code location while trying to
access the rearmost blocks, before being executed.

In order to prevent this vulnerability from being exploited in eg. a
secure boot environment, let's add a check over the amount of data
that is going to be allocated. Such a check could look like:

if (!elem_size || n > SIZE_MAX / elem_size)
	return NULL;

The right way to do it would be to enhance the calloc() implementation
but this is quite an impacting change for such a small fix. Another
solution would be to add the check before the malloc call in the
squashfs implementation, but this does not look right. So for now, let's
use the kcalloc() compatibility function from Linux, which has this
check.

Fixes: c510061303 ("fs/squashfs: new filesystem")
Reported-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
2022-06-28 15:51:56 -04:00
Nicolas Iooss
8f8c04bf1e i2c: fix stack buffer overflow vulnerability in i2c md command
When running "i2c md 0 0 80000100", the function do_i2c_md parses the
length into an unsigned int variable named length. The value is then
moved to a signed variable:

    int nbytes = length;
    #define DISP_LINE_LEN 16
    int linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
    ret = dm_i2c_read(dev, addr, linebuf, linebytes);

On systems where integers are 32 bits wide, 0x80000100 is a negative
value to "nbytes > DISP_LINE_LEN" is false and linebytes gets assigned
0x80000100 instead of 16.

The consequence is that the function which reads from the i2c device
(dm_i2c_read or i2c_read) is called with a 16-byte stack buffer to fill
but with a size parameter which is too large. In some cases, this could
trigger a crash. But with some i2c drivers, such as drivers/i2c/nx_i2c.c
(used with "nexell,s5pxx18-i2c" bus), the size is actually truncated to
a 16-bit integer. This is because function i2c_transfer expects an
unsigned short length. In such a case, an attacker who can control the
response of an i2c device can overwrite the return address of a function
and execute arbitrary code through Return-Oriented Programming.

Fix this issue by using unsigned integers types in do_i2c_md. While at
it, make also alen unsigned, as signed sizes can cause vulnerabilities
when people forgot to check that they can be negative.

Signed-off-by: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-06-28 15:51:56 -04:00
Tom Rini
b75fd37037 Merge tag 'u-boot-imx-20220628' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2022.07

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12541
2022-06-28 11:10:23 -04:00
Tom Rini
d61c11b8c8 Merge branch '2022-06-28-mpc85xx-and-aspeed-fixes' into next
- Merge a PowerPC MPC85xx cleanup / fix, and aspeed linker fix
2022-06-28 10:52:00 -04:00
Joel Stanley
f6810b749f aspeed/ast2600: Fix SPL linker script
The commit 99e2fbcb69 ("linker_lists: Rename sections to remove .
prefix") changed the name of the linker list sections. As the Aspeed SPL
linker wasn't in the tree yet, it missed the change.

This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which
Aspeed was copied from.

Fixes: 442a69c143 ("configs: ast2600: Move SPL bss section to DRAM space")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-06-28 09:40:03 -04:00
Pali Rohár
c0f4756216 powerpc: mpc85xx: Set TEXT_BASE addresses to real base values
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).

Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.

After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.

Tested on P2020 board with SPL and proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-28 09:40:02 -04:00
Fabio Estevam
b5023254b8 kontron-sl-mx8mm: Add CAAM support
Add CAAM support, which is required when enabling HAB secure boot.

Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-28 15:24:31 +02:00
Francesco Dolcini
66af2c3e95 board: apalis_imx6: DDR init using mx6_dram_cfg()
Do DDR initialization using the procedural mx6_dram_cfg() instead of
programming the MMDC using a raw list of register/value pairs, this
solves some rare boot failures on specific "bad" modules.

Calibration values, DDR geometry are unchanged, memory timings are
updated according to the relevant memory datasheet, no changes on
the power consumption.

For IT temperature range SKUs CL is decreased from 8 to 7 and tFAW
value is increased, for commercial temperature range SKUs some
changes on ODT parameters.

This change was validated over a range of different apalis-imx6 SoM, on
the whole working temperature range with weeks of continuous testing.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-28 15:24:31 +02:00
Frieder Schrempf
1af2d4697a imx: kontron-sl-mx8mm: Enable PCA9450 regulator driver and fix SD card access
Currently accessing the SD card on USDHC2 fails with:

=> mmc dev 1
Card did not respond to voltage select! : -110

This is due to the fact that UHS modes are enabled in the defconfig
and the devicetree, but the referenced LDO5 regulator (reg_nvcc_sd)
is not available to switch the data lines from 3.3V to 1.8V mode.

By enabling the regulator driver the vqmmc-supply is now available
and the SD card works also in high speed modes:

=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device

Please note that the board has a GPIO connected to the SD_VSEL signal
of the PMIC. As the driver uses the LDO5CTRL_H register to set the
voltage, we need to make sure that this GPIO (GPIO01_IO4) is set to
a high level.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Frieder Schrempf
2add051175 pmic: pca9450: Add optional SD_VSEL GPIO for LDO5
LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for specifying an optional GPIO and setting it to high at probe time.

In the future we might also want to add support for boards that have
SD_VSEL set to a fixed low level. In this case we need to change the
driver to be able to use the LDO5CTRL_L register.

This is a port of the same change in the Linux kernel:
8c67a11bae88 ("regulator: pca9450: Add SD_VSEL GPIO for LDO5")

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Francesco Dolcini
6b5ecb8293 mx6: ddr: Fix disabling on-die termination
In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0).
No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is
already handled correctly.

No board is currently affected by this change (rtt_nom != 0 on all i.MX6
ddr3 boards), this will be used by a follow-up change.

Fixes: fe0f7f7842 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-28 15:24:31 +02:00
Francesco Dolcini
d4cd19ded8 toradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output
Set CLK01 and CLK02 to 24MHz and enable it in CCM_CCOSR register.

This clock is used by both the audio codec (CLKO1) and by the CSI camera
(CLKO2) and is expected to be 24MHz.

Despite the wrong 16.5MHz there was no real issue because of the wrong
frequency since Linux reconfigures the clocks afterward, however this
was triggering an issue with noise coming from the SGTL5000 audio codec.

The problem is that the SGTL5000 does not have a reset pin and after it
is configured if the input MCLK clock is disabled it produces a constant
noise on its output, this was happening on software reboot.

Forcing the clock to be enabled in U-Boot prevent the problem by making
sure that the clock is always available, without this change as soon as
Linux was changing the clock tree (setting clk_out_sel=1 without setting
clko2_en=1) the noise would start till the actual clock was enabled
(clko2_en=1) during the SGTL5000 driver probe.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Marek Vasut
b70c34224e ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Andrejs Cainikovs
0543a1ed27 imx8m: fixup thermal trips
Fixup thermal trips in Linux device tree according to SoC thermal
grade.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Adam Ford <aford173@gmail.com>
2022-06-28 13:35:09 +02:00
Eugen Hristev
3820020299 board: atmel: remove calls to debug_uart_init
Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S

It's no longer required to call it from the board file.

With the current code, the banned <debug_uart> is printed twice:

<debug_uart>

<debug_uart>

U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)

Remove all calls from board_early_init_f .

Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-06-28 10:10:06 +03:00
Eugen Hristev
5ae89b3cfe ARM: dts: at91: sam9x60ek: fix eeprom compatible
The memory on this board is microchip 24aa025e48 which is compatible with
at24c02 with a page size of 16.
Fix the compatible accordingly.

Reported-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-06-28 10:09:45 +03:00
Eugen Hristev
73a9616c21 misc: i2c_eeprom: remove 24aa02e48
This compatible does not exist in the bindings.
All occurences in DT have been replaced by at24c02 which is equivalent.

Fixes: 7264066707 ("misc: i2c_eeprom: Add compatible for 24AA02E48")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-06-28 10:09:45 +03:00
Eugen Hristev
0d60a93053 ARM: dts: at91: replace microchip, 24aa02e48 with atmel, at24c02
microchip,24aa025e48 does not exist in the bindings of this driver.
It can be replaced with atmel,at24c02 which is a standard compatible
and the memory is compatible with this one, depending on the page size.
microchip 24aa02e48 has a page size of 8, while 24aa025e48 has a page
size of 16 bytes.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-06-28 10:09:45 +03:00
Eugen Hristev
d4d3c33393 ARM: dts: at91: sama7g5/sama7g5ek: sync with kernel at91 5.19
Sync with at91 maintainer tree for-5.19 branch.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-06-28 10:09:45 +03:00
Eugen Hristev
1535f1d19c dt-bindings: sound: add microchip,pdmc.h
Include microchip,pdmc.h from Linux.

This file includes required defines for DT successful build.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-06-28 10:09:45 +03:00
Sergiu Moga
92099e69a2 configs: at91: sama5d2_icp: enable QSPI and SF command
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-06-28 10:09:45 +03:00
Sergiu Moga
76873c6f6d configs: at91: sam9x60ek: enable QSPI and SF command
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-06-28 10:09:45 +03:00
Sergiu Moga
474130944d ARM: dts: sam9x60: fix compatible for qspi child node
Change the compatible of the qspi child node to
`jedec,spi-nor` so that it can be properly found
when probing the bus.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-06-28 10:09:45 +03:00
Peng Fan
e87da5704f armv8: u-boot-spl.lds: mark __image_copy_start as symbol
In arch/arm/lib/sections.c there is below code:
char __image_copy_start[0] __section(".__image_copy_start");
But actually 'objdump -t spl/u-boot-spl' not able to find out
symbol '__image_copy_start' for binman update image-pos/size.

So update link file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
6516c9b349 spl: binman: Disable u_boot_any symbols for i.MX8M boards
The i.MX8M boards use partially specified binman images which have an
SPL entry without a U-Boot entry. This would normally cause an error due
to the 'u_boot_any' binman symbols declared by BINMAN_UBOOT_SYMBOLS
requiring a U-Boot-like entry in the same image as the SPL.

However, a problem in the ARMv8 __image_copy_start symbol definition
effectively disables binman from attempting to write any symbols at all,
so everything appears to work fine until runtime. A future patch fixes
the issue in the linker scripts, which lets binman fill in the symbols,
which would result in the build error described above.

Explicitly disable the 'u_boot_any' symbols for i.MX8M boards. They are
already effectively unusable, and they are incompatible with the boards'
current binman image descriptions.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
367ecbf2d3 spl: binman: Check at runtime if binman symbols were filled in
Binman lets us declare symbols in SPL/TPL that refer to other entries in
the same binman image as them. These symbols are filled in with the
correct values while binman assembles the images, but this is done
in-memory only. Symbols marked as optional can be filled with
BINMAN_SYM_MISSING as an error value if their referred entry is missing.

However, the unmodified SPL/TPL binaries are still available on disk,
and can be used by people. For these files, nothing ensures that the
symbols are set to this error value, and they will be considered valid
when they are not.

Empirically, all symbols show up as zero in a sandbox_vpl build when we
run e.g. tpl/u-boot-tpl directly. On the other hand, zero is a perfectly
fine value for a binman-written symbol, so we cannot say the symbols
have wrong values based on that.

Declare a magic symbol that binman always fills in with a fixed value.
Check this value as an indicator that symbols were filled in correctly.
Return the error value for all symbols when this magic symbol has the
wrong value.

For binman tests, we need to make room for the new symbol in the mocked
SPL/TPL data by extending them by four bytes. This messes up some test
image layouts. Fix the affected values, and check the magic symbol
wherever it makes sense.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
3a7d327876 spl: binman: Add config options for binman symbols in VPL
The SPL code declares binman symbols for U-Boot phases depending on
CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS). This config exists for SPL and
TPL, also add a version for VPL.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
d8830cf840 spl: binman: Split binman symbols support from enabling binman
Enabling CONFIG_BINMAN makes binman run after a build to package any
images specified in the device-tree. It also enables a mechanism for
SPL/TPL to declare and use special linker symbols that refer to other
entries in the same binman image. A similar feature that gets this info
from the device-tree exists for U-Boot proper, but it is gated behind a
CONFIG_BINMAN_FDT unlike the symbols.

Confusingly, CONFIG_SPL/TPL_BINMAN_SYMBOLS also exist. These configs
don't actually enable/disable the symbols mechanism as one would expect,
but declare some symbols for U-Boot using this mechanism.

Reuse the BINMAN_SYMBOLS configs to make them toggle the symbols
mechanism, and declare symbols for the U-Boot phases in a dependent
BINMAN_UBOOT_SYMBOLS config. Extend it to cover symbols of all phases.
Update the config prompt and help message to make it clearer about this.
Fix binman test binaries to work with CONFIG_IS_ENABLED(BINMAN_SYMBOLS).

Co-developed-by: Peng Fan <peng.fan@nxp.com>
[Alper: New config for phase symbols, update Kconfigs, commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
5204823c81 spl: binman: Declare extern symbols for VPL as well
The binman extern symbol declarations in spl.h are missing the VPL
symbols recently added to spl.c, add them like the others.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
e09a8b9f1b spl: binman: Make TPL_BINMAN_SYMBOLS depend on TPL_FRAMEWORK
TPL_BINMAN_SYMBOLS depends on SPL_FRAMEWORK. The code this enables is
compiled by checking CONFIG_$(SPL_TPL_)FRAMEWORK, so it should depend on
TPL_FRAMEWORK instead (which in turn depends on SPL_FRAMEWORK). This was
most likely a typo due to copy-pasting the config's SPL version, fix it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Alper Nebi Yasak
d7f0717252 spl: binman: Fix use of undeclared u_boot_any symbols
Some SPL functions directly use the binman 'u_boot_any' symbols to get
U-Boot's binman image position. These symbols are declared by the
SPL/TPL_BINMAN_SYMBOLS configs, but they are accessed by macros defined
by just CONFIG_BINMAN. So when BINMAN is enabled and BINMAN_SYMBOLS is
disabled, the code tries to use undeclared symbols and we get an error.

Therefore, any use of 'u_boot_any' symbols in the code is an implicit
dependency on SPL/TPL_BINMAN_SYMBOLS. However, in the current uses
they are meant to be the next phase's values, where that happens to be
U-Boot. In the meantime, helper funcions spl_get_image_pos/size() were
introduced to get these values.

Convert all uses of u_boot_any symbols to these functions, so we only
access these symbols at one place. Make sure they will not use these
symbols when the BINMAN_SYMBOLS configs are disabled, by returning early
in those cases.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Heinrich Schuchardt
d4462ba044 sandbox: cast to pointer from integer of different size
Building sandbox_defconfig on ARMv7 with HOST_32BIT=y results in:

drivers/misc/qfw_sandbox.c:51:25: warning:
cast to pointer from integer of different size [-Wint-to-pointer-cast]
   51 |         void *address = (void *)be64_to_cpu(dma->address);

Add the missing type conversion.

Fixes: 69512551aa ("test: qemu: add qfw sandbox driver, dm tests, qemu tests")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-06-28 03:09:52 +01:00
Simon Glass
4f6500aa1a dm: spl: Allow SPL to show memory usage
Add an option to tell SPL to show memory usage for driver model just
before it boots into the next phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
2cb4ddb91e dm: core: Add a command to show driver model statistics
This command shows the memory used by driver model along with various
hints as to what it might be if some 'core' tags were moved to use the
tag list instead of a core (i.e. always-there) pointer.

This may help with future work to reduce memory usage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
0dfda34ca5 dm: core: Add a way to collect memory usage
Add a function for collecting the amount of memory used by driver model,
including devices, uclasses and attached data and tags.

This information can provide insights into how to reduce the memory
required by driver model. Future work may look at execution speed also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
930a3ddade dm: core: Support accessing core tags
At present tag numbers are only allocated for non-core data, meaning that
the 'core' data, like priv and plat, are accessed through dedicated
functions.

For debugging and consistency it is convenient to use tags for this 'core'
data too. Add support for this, with new tag numbers and functions to
access the pointer and size for each.

Update one of the test drivers so that the uclass-private data can be
tested here.

There is some code duplication with functions like device_alloc_priv() but
this is not addressed for now. At some point, some rationalisation may
help to reduce code size, but more thought it needed on that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
53c20bebb2 dm: core: Switch the testbus driver to use a new struct
At present this driver uses 'priv' struct to hold 'plat' data, which is
confusing. The contents of the strct don't matter, since only dtoc is
using it. Create a new struct with the correct name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
d32f62f49d dm: core: Add documentation for the dm command
Add a description and examples for the dm subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
c625666ea1 dm: core: Fix addresses in the dm static command
This command converts pointers to addresses, but the pointers being
converted are in the image's rodata region. For sandbox this means it
is not in DRAM so it does not make sense to do this conversion.

Fix this by showing a simple pointer instead. Drop the unnecessary
@ and hex prefixes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
dee2f5ae5c dm: core: Sort dm subcommands
Put these in alphabetic order, both in the help and in the implementation,
as there are quite a few subcommands now. Tweak the help for 'dm tree' to
better explain what it does.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Simon Glass
1452870404 dm: core: Rename dm_dump_all()
This is not a good name anymore as it does not dump everything. Rename it
to dm_dump_tree() to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:52 +01:00
Heinrich Schuchardt
06d590844f test: fix some pylint errors in test_bind.py
* Use spaces not tabs
* Limit lines to 100 spaces
* Remove an unused import
* Sort imports correctly
* Add a module description

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-28 03:09:51 +01:00
Heinrich Schuchardt
2be964d29f sandbox: raise SANDBOX_RAM_SIZE_MB default to 256
The UEFI Self Certification Test (SCT) cannot run on 128 MiB.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-28 03:09:51 +01:00
Sean Anderson
4780f7d8a6 patman: Fix defaults not propagating to subparsers
On python 3.8.10 (and 3.10), subparsers are not updated with defaults. I
suspect this is related to [1]. Fix this by explicitly updating
subparsers with settings.

[1] https://github.com/python/cpython/issues/89398

Fixes: 3145b63513 ("patman: Update defaults in subparsers")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:51 +01:00
Heinrich Schuchardt
d3eb1bf7cf dm: fix formatting of uclass dump
Insert an empty line after each uclass independent of whether it has
devices or not.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-28 03:09:51 +01:00
Heinrich Schuchardt
66995164dd sandbox: show error if the device-tree cannot be loaded
U-Boot's printf() used before setting up U-Boot's serial driver does not
create any output. Use os_printf() for error messages related to loading
the device-tree.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-28 03:09:51 +01:00
Heinrich Schuchardt
7750ee45a6 sandbox: add function os_printf()
Before setting up the devices U-Boot's printf() function cannot be used
for console output. Provide function os_printf() to print to stderr.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-28 03:09:51 +01:00
Alper Nebi Yasak
ebcaafcded patman: test_util: Print test stdout/stderr within test summaries
While running tests for a python tool, the tests' outputs get printed in
whatever order they happen to run, without any indication as to which
output belongs to which test. Unittest supports capturing these outputs
and printing them as part of the test summaries, but when a failure or
error occurs it switches back to printing as the tests run. Testtools
and subunit tests can do the same as their parts inherit from unittest,
but they don't outright expose this functionality.

On the unittest side, enable output buffering for the custom test result
class. Try to avoid ugly outputs by not printing stdout/stderr before
the test summary for low verbosity levels and for successful tests.

On the subunit side, implement a custom TestProtocolClient that enables
the same underlying functionality and injects the captured streams as
additional test details. This causes them to be merged into their test's
error traceback message, which is later rebuilt into an exception and
passed to our unittest report class.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Alper Nebi Yasak
dd6b92b0b9 patman: test_util: Customize unittest test results for more info
By default, unittest test summaries only print extended info about tests
that failed or couldn't run due to an error. Use a custom text result
class to print info about more cases: skipped tests, expected failures
and unexpected successes.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:51 +01:00
Alper Nebi Yasak
d8318feba1 patman: test_util: Use unittest text runner to print test results
The python tools' test utilities handle printing test results, but the
output is quite bare compared to an ordinary unittest run. Delegate
printing the results to a unittest text runner, which gives us niceties
like clear separation between each test's result and how long it took to
run the test suite.

Unfortunately it does not print info for skipped tests by default, but
this can be handled later by a custom test result subclass. It also does
not print the tool name; manually print a heading that includes the
toolname so that the outputs of each tool's tests are distinguishable in
the CI output.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Alper Nebi Yasak
ce12c47b92 patman: test_util: Handle nonexistent tests while loading tests
It's possible to request a specific test to run when trying to run a
python tool's tests. If we request a nonexistent test, the unittest
loaders generate a fake test that reports this as an error. However, we
get these fake tests even when the test exists, because test_util can
load tests from multiple places one by one and the test we want only
exists in one.

The test_util helpers currently remove these fake tests when printing
test results, but that's more of a workaround than a proper solution.
Instead, don't even try to load the missing tests.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Alper Nebi Yasak
6474aaa1d1 patman: test_util: Fix printing results for failed tests
When printing a python tool's test results, the entire list of failed
tests and their tracebacks are reprinted for every failed test. This
makes the test output quite unreadable. Fix the loop to print failures
and tracebacks one at a time.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Sean Anderson
501a9a7ed8 dm: core: Use device_foreach_child where possible
We have some nice macros for iterating over devices in device.h, but they
are not used by the driver core. Convert all the users I could find.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-06-28 03:09:51 +01:00
Sean Anderson
8b52f237f0 dm: core: Provide fallbacks for ofnode_conf_read_...
Because fdt_get_config_str et al. were moved/renamed to
ofnode_conf_read_str, they now depend on CONFIG_DM as well as
CONFIG_OF_CONTROL. Add some fallback implementations, preventing a
linker error when CONFIG_SPL_OF_CONTROL and CONFIG_SPL_ENV_IS_IN_MMC are
enabled and CONFIG_SPL_DM is disabled.

Fixes: 7de8bd03c3 ("treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-28 03:09:51 +01:00
Sean Anderson
24057fe0a8 sandbox: usb: Fix out-of-bounds read when fd=-1
sandbox_flash_bulk uses priv->read_len to determine if priv->buff contains
the response data (such as from SCSI_INQUIRY). However, if priv->fd=-1 in
handle_read, then priv->read_len is not set even though we are going to
PHASE_DATA. This causes sandbox_flash_bulk to try and read len bytes from
priv->buff, which likely goes past the end of the buffer. Fix this by always
setting priv->read_len even if we aren't going to read anything.

Fixes: f4f715360c ("dm: usb: sandbox: Add an emulator for USB flash devices")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Simon Glass
42ae363ddd dtoc: Update fdt tests to use test_util
Use the common functions to run tests and report results. Ensure that the
result code indicates success or failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:51 +01:00
Simon Glass
68ff6d3655 bloblist: Describe the design goals
Add a comment explaining the design goals of bloblist, to make it easier
for people to understand and comment on the structure.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-28 03:09:51 +01:00
Tom Rini
ea82ed8c2e Merge branch '2022-06-27-add-armv8-sha1-sha256-support' into next
To quote the author:

This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm
for CPUs that have support of the ARM v8 Crypto Extensions. It Improves
speed of integrity & signature checking procedures.
2022-06-27 13:39:19 -04:00
Tom Rini
ba0d0e8c74 qemu_arm64: Enable CONFIG_ARMV8_CRYPTO support
Now that we can make use of CPU features for sha1/sha256, enable in QEMU
so that we get some test coverage.

Cc: Loic Poulain <loic.poulain@linaro.org>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-27 13:36:28 -04:00
Loic Poulain
0fcc1c76d1 armv8 SHA-256 using ARMv8 Crypto Extensions
This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.

It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
Loic Poulain
915047048f lib: sha256: Add support for hardware specific sha256_process
Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
Loic Poulain
084d8e6bf9 armv8 SHA-1 using ARMv8 Crypto Extensions:
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.

It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
Loic Poulain
4e883522ba sha1: Fix digest state size/type
sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
Loic Poulain
8201b8066a lib: sha1: Add support for hardware specific sha1_process
Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:27 -04:00
Tom Rini
c316ee674f Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
2022-06-27 10:15:50 -04:00
Michal Simek
728a86edb6 timer: Add SPL_REGMAP dependency for Xilinx timer
Add SPL_REGMAP dependency when SPL is enabled. This can avoid compilation
issues if timer is selected but SPL_REGMAP not.

Reported-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8f6c187e04cb3127bf5148ae2dbbdf55b25ea544.1655982509.git.michal.simek@amd.com
2022-06-27 09:03:54 +02:00
Michal Simek
b5b8bad2db xilinx: Enable support for SquashFS
Enable SquashFS for all xilinx platforms.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dbe85afda8cd90ebfc537979d382808ff9bec160.1655982259.git.michal.simek@amd.com
2022-06-27 09:03:07 +02:00
Tom Rini
bfa9306e14 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The main attraction are two regressions, plus a fix
for a long standing bug:
- Fix USB support on boards with a switched VBUS regulator.
- Fix failing boot due to env loading on boards without MMC (CHIP).
- Fix PSCI CPU_OFF operation on R40 boards.
The rest are smaller fixes, and the forgotten DT sync for sun4i boards.
2022-06-26 21:06:08 -04:00
qianfan Zhao
47ca7b574f sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online

The reason is that the R40 version of sunxi_cpu_set_power always passes
0 for the CPU number, so we turn off CPU0, regardless of what CPU the
CPU_OFF request came for.

Fix this by passing the proper CPU number, as there are proper power
clamp registers for every of the four cores.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:54 +01:00
Samuel Holland
e008e5132f sunxi: fix initial environment loading without MMC
Commit e42dad4168 ("sunxi: use boot source for determining environment
location") changed our implementation of env_get_location() and enabled
it for every board, even those without MMC support (like the C.H.I.P.
boards). However the default fallback location of ENVL_FAT requires MMC
support compiled in, so the board hangs when trying to initially load
the environment.

Change the algorithm to only return configured environment locations,
and improve the fallback algorithm on the way.

The env_init() routine calling this function here does not behave well
if the return value is ENVL_UNKNOWN on the very first call: it will make
U-Boot proper silently hang very early.
Work around this issue by making sure we return some configured (dummy)
environment location when prio is 0. This for instance happens when
booting via FEL.

This fixes U-Boot loading on the C.H.I.P. boards.

Fixes: e42dad4168 ("sunxi: use boot source for determining environment location")
Reported-by: Chris Morgan <macroalpha82@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix FEL boot case by not returning ENVL_UNKNOWN when prio==0]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:54 +01:00
Samuel Holland
33112ae021 clk: sunxi: Add additional RTC compatible strings
Compatible strings for some new RTC hardware variants were added to
the binding. Add them to the driver in preparation for supporting
those new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:53 +01:00
Samuel Holland
957a3b9820 gpio: sunxi: Fix build with CONFIG_SPL_SERIAL=n
This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit
88ca8e2695 ("disk: Add an option for partitions in SPL"), SPL_STRTO
was always selected indirectly. Now it is not, so select it here.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:53 +01:00
Samuel Holland
006ef34bd4 ARM: dts: sun4i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

The previous version of this change was only partially applied.

Fixes: 4746694cba ("ARM: dts: sun4i: Sync from Linux v5.18-rc1")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:53 +01:00
Andre Przywara
3c0b9adb89 sunxi: usb: convert PHY GPIO functions to DM
The Allwinner USB PHY driver is still using the legacy GPIO interface,
which is now implemented by the DM_GPIO compat functions.
Those seem to have some design flaws, as setting the direction, then
later setting the value will not work, if the DM_GPIO driver is
implementing set_flags.

Fix this by using the dm_ version of the direct GPIO interface, which
uses struct gpio_desc structs to handle requested GPIOs, and actually
keeps the flags we set earlier.

This fixes USB operation on boards which need to toggle the VBUS supply
via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-06-26 11:22:53 +01:00
Tom Rini
7596797085 Merge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix building sandbox with NO_SDL=1
 - fix stb TrueType to check return value of STBTT_malloc()
 - remove not required DM_REGULATOR test in stm32 dsi driver
2022-06-25 08:38:00 -04:00
Patrick Delaunay
5bc6f8c2a9 video: stm32: remove test on CONFIG_DM_REGULATOR
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b4
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-25 08:18:42 +02:00
Bin Meng
5f71b2f105 driver: video: Check allocated pointers
The codes that call STBTT_malloc() / stbtt__new_active() do not check
the return value at present which may cause segfault.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2022-06-25 08:10:21 +02:00
Andrew Scull
c527e3f52d sandbox: sdl: Add stub sandbox_sdl_remove_display()
Building the sandbox with NO_SDL=1 resulted in an undefined reference to
'sandbox_sdl_remove_display'. Resolve this by adding a stub
implementation to match the stubs of the other similar functions.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-25 07:54:20 +02:00
Stefan Herbrechtsmeier
036ef47b32 arm64: zynqmp: Move helper functions below header includes
Move helper functions in psu_init files below header includes to avoid
forward declarations.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-15-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
d2162549fe tools: zynqmp_psu_init_minimize: Move helper functions below header includes
Move helper functions below header includes to avoid forward
declarations.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-14-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
4d8f2bb151 tools: zynqmp_psu_init_minimize: Use CR instead of LF
Use carriage return instead of line feed to support mangling across
lines.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-13-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
2f799b4fbc tools: zynqmp_psu_init_minimize: Remove low level uart settings
There is no reason to do serial initialization. Uart driver does it
already based on DT. Good effect is that it is clear which interface is
console.
The resulting change was done in past by commit 84d2bbf082 ("arm64:
zynqmp: Remove low level UART setting").

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-12-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
f93c1c8f3f xilinx: zynqmp: make spi flash support optional
The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
86ceedd84e xilinx: common: Separate display cpu info function
Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own
source file to support reuse by other board vendors.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
381ede9e38 xilinx: cpuinfo: Print soc machine
Print the soc machine in the print_cpuinfo function.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
a1e618a1b9 soc: xilinx: zynqmp: Add machine identification support
Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
18fcb49db5 soc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_read
Remove the redundant SPL and CurrentEL checks for the zynqmp_mmio_read
function call because the function itself runs the same checks.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-7-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
d43d78ef03 xilinx: zynqmp: Merge device lists
Merge the svd / xck devices into to the common zynqmp device list.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
71278c0e59 xilinx: zynqmp: Reuse shift macros to define masks
Reuse the shift macros to define the masks.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
9bc5a24dea xilinx: zynqmp: Add macro for device type mask
Add a macro for the device type mask of the id code.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
bcf6f71bd7 xilinx: zynqmp: Replace strncat with strlcat
Replace strncat with strlcat to always produce a valid null-terminated
string.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
f851be15f4 firmware: zynqmp: Probe driver before use
Probe the driver before use to ensure that the driver is always
available and the global data are valid. Initialize the global data
with zero and probe the driver if the global data are still zero. This
allows a usage of the firmware functions from other drivers with
arbitrary order between the drivers.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
fe7090c702 firmware: zynqmp: Check if rx channel dev pointer is valid
Check if rx channel dev pointer is valid and not if the address of the
pointer is valid.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Amit Kumar Mahapatra
a13e0821da ARM: zynq: Fix size-cells for pl353 driver
"size-cells" of the nand controller node should be 0 as the "reg"
property of the nand device node contains the chip select number and not
address information.
The patch fixes the below compilation warning
arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format):
/axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property
has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com
2022-06-24 14:18:02 +02:00
Ashok Reddy Soma
b8745e7eb4 arm64: zynqmp: Fix usb node drive strength and slew rate
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb gorup pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
2022-06-24 14:17:18 +02:00
Michal Simek
aec051d813 microblaze: Remove interrupt handler
The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
2022-06-24 14:16:32 +02:00
Michal Simek
a36d86720f microblaze: Convert axi timer to DM driver
Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
2022-06-24 14:16:32 +02:00
Ovidiu Panait
816226d27e cpu: add CPU driver for microblaze
Add a basic CPU driver that retrieves information about the microblaze CPU
core. cpu_ops handlers are implemented so that the "cpu" command can work
properly:

U-Boot-mONStR> cpu list
  0: cpu@0      MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
U-Boot-mONStR> cpu detail
  0: cpu@0      MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
        ID = 0, freq = 50 MHz: L1 cache, MMU

Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from
linux.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
9df16c5937 microblaze: add support for handling PVR data
Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
064057fdbe microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option
Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
10f6508c07 microblaze: cache: introduce flush_dcache_range()
Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
95b7a8fd12 microblaze: cache: introduce cpuinfo structure
Introduce a minimal cpuinfo structure to hold cache related info. The
instruction/data cache size and cache line size are initialized early in
the boot to default Kconfig values. They will be overwritten with data
from PVR/dtb if the microblaze UCLASS_CPU driver is enabled.

The cpuinfo struct was placed in global_data to allow the microblaze
UCLASS_CPU driver to also run before relocation (initialized global data
should be read-only before relocation).

gd_cpuinfo() helper macro was added to avoid volatile
"-Wdiscarded-qualifiers" warnings when using the pointer directly.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/)
2022-06-24 14:16:00 +02:00
Ovidiu Panait
b195134984 microblaze: cache: introduce flush_cache_all()
All flush_cache() calls in microblaze code are supposed to flush the
entire instruction and data caches, so introduce flush_cache_all()
helper to handle this.

Also, provide implementations for flush_dcache_all() and
invalidate_icache_all() so that icache and dcache u-boot commands can
work.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
84488fc693 microblaze: cache: introduce Kconfig options for icache/dcache sizes
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for
instruction and data caches sizes, respectively:
CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE
CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE

Also, get rid of the hardcoded value in icache_disable().

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
2022-06-24 14:16:00 +02:00
Ovidiu Panait
73b8ee62a0 microblaze: cache: split flush_cache() function
Factor out icache/dcache components from flush_cache() function. Call the
newly added __flush_icache()/__flush_dcache() functions inside
icache_disable() and dcache_disable(), respectively. There is no need to
flush both caches when disabling a particular cache type.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-7-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
8daf89678e microblaze: cache: improve icache Kconfig options
Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
ef0a592ae8 microblaze: cache: improve dcache Kconfig options
Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.

Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
0ad71dc53a microblaze: cache: replace XILINX_USE_DCACHE -> CONFIG_DCACHE
XILINX_USE_DCACHE macro was removed in 7556fa09e0 ("microblaze: Simplify
cache handling"), but it was still used in a couple of places.

Replace those occurences with CONFIG_DCACHE.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-4-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
130fae2dec microblaze: start.S: remove unused code
in16/out16 routines seem to not be used anywhere in microblaze code, so
remove them.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
b391b915bb cpu-uclass: relocate ops pointers for CONFIG_NEEDS_MANUAL_RELOC
Relocate cpu_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled.

The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done
logic works for drivers that use DM_FLAG_PRE_RELOC.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
15c924a743 cmd: cpu: migrate cpu command to U_BOOT_CMD_WITH_SUBCMDS()
Migrate cpu command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to
reduce duplicated code. This also fixes the cpu command on boards that
enable CONFIG_NEEDS_MANUAL_RELOC.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Michal Simek
d58c007498 microblaze: Add support for run time relocation
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.

By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.

The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
  sections are empty. relocate-rela will fill them and output file is
  u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
  address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections

Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:01 +02:00
Michal Simek
034944b33b tools: relocate-rela: Add support for 32bit Microblaze relocation
Microblaze is 32bit that's why it is using elf32 format. Relocation code
requires to get information about rela and dynsym senctions and also text
base which was used for compilation.
Code build with -fPIC and linked with -pic generates 4 relocation types.
R_MICROBLAZE_NONE is the easiest one which doesn't require any action.
R_MICROBLAZE_REL only requires write addend to r_offset address.
R_MICROBLAZE_32/R_MICROBLAZE_GLOB_DAT are the most complicated. There is a
need to find out symbol value with adding symbol value and write it to
address pointed by r_offset. Calculation with addend is also added but
only 0 addend values are generated now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9912c3d76933bdf75e1ebb6aab43726cd32cafb5.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
30fb8d29cd tools: relocate-rela: Add support for elf32 decoding
Add support for 32bit ELF format which is used by Microblaze. Also check
that code runs only for Microblaze.

Function finds information about rela.dyn and dynsym which will be used
later for relocation.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7491cc72fe04cbd48db014f1492ce463e91dfb42.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
a1405d9cfe tools: relocate-rela: Check that relocation works only for EM_AARCH64
Relocation support is only for EM_AARCH64 that's why check machine type to
make sure that the code will never run on any unsupported one.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/36f26c8752335239344b265e5ddedad10e9cac8b.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
582ffb5cb3 tools: relocate-rela: Extract elf64 reloc to special function
Adding support for new type requires to change code layout that's why move
elf64 code to own function for easier maintenance.

It also solves the problem with not calling fclose in case of error.
Return value from rela_elf64 is saved to variable that's why fclose() is
called all the time.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/21763b80527521c85ca7d4ac64ad6ff4885409c8.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
07c052be51 microblaze: Create SYM_ADDR macro to deal with symbols
Symbol handling depends on compilation flags. Right now manual relocation
is used that's why symbols can be referenced just by name and there is no
need to find them out. But when position independent code (PIC) is used
symbols need to be described differently. That's why having one macro
change is easier than changing the whole code.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
81169ae648 microblaze: Add comment about reset location
Better to add comment to explain why reset vector points all the time to
origin U-Boot location.
If reset happens U-Boot should start from it's origin location.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5ca6341b7487708247fe2948d7e496ea6f7c2e02.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
b6fe10afe9 microblaze: Remove _start symbol handling at U-Boot start
Right now U-Boot runs all the time from the same address where it is loaded
but going to full relocation code starting address doesn't need to be fixed
and can be simply discovered from reading PC register. That's why use r20
to get PC address and subtract offset from the beginning to get starting
address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
986727ca11 microblaze: Remove code around r20 in relocate_code()
r20 is not used that's why remove logic around it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1b32bab5c050d099b2f6d49bc4896322ed03d788.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
3041b512eb microblaze: Optimize register usage in relocate_code
There are additional operations which can be done simpler that's why
improve logic around relocation address r7 handling and _start symbol.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
532ad5f841 microblaze: Change stack protection address to new stack address
SLR low address is still setup to 0 that's why only high limit should be
updated. STACK_SIZE macro is present and could be possible used for
low address alignment but it is not done by this patch.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
1918c4166e microblaze: Separate code end substraction
Follow up patch will convert symbol handling that's why it is necessary to
separate logic around symbols to special instruction. It adds 4B for new
instruction but it is worth to do it to have code ready for for full
relocation.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com
2022-06-24 14:15:00 +02:00
Michal Simek
10fd6d64c7 microblaze: Enable REMAKE_ELF
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.

Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
 -O elf32-microblazeel u-boot.bin u-boot-elf.o

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
89e81e6c32 mips: Move endianness selection to arch/Kconfig
This option will be used by Microblaze that's why move it to generic
location to be able to use it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
d896e790cb microblaze: Fix typo in exception.c
Trivial fix.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
65a4da947e microblaze: Remove CONFIG_TEXT_BASE from code
Use symbol instead macro to find where U-Boot starts.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
aa0799eb67 microblaze: Fix early stack allocation
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN
but there is no reason to do it now because board_init_f_alloc_reserve()
returns exact location where stack should be. That's why stack location is
calculated at run time and there is no need to hardcode it via macro. This
change will help with placing U-Boot to any address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
16a18471bb microblaze: Fix stack protection behavior
When U-Boot starts stack protection can be already enabled that's why setup
the lowest possible SLR value which is address 0. And the highest possible
stack in front of U-Boot. That's why you should never load U-Boot to the
beginning of DDR. There must be some space reserved. Code is using this
location for early malloc space, early global data and stack.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
7cf236cf1f microblaze: Switch absolute branches to relative
There is no reason to use absolute branches and use just relative. This
change helps with moving binary to different location and start it from
there.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
4c9e2d6434 tools: relocate-rela: Read rela start/end directly from ELF
There is no need to pass section information via parameters.
Let's read text base and rela start/end directly from elf.
It will help with reading other information from ELF for others
architecture. Input to relocate-rela is u-boot binary and u-boot ELF.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
d8b0444b56 tools: relocate-rela: Use global variables
Declare rela_start/end and text_base as global variables. It will help with
using these variables for ELF decoding.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7485b163e92f8f3f754c35f7c88c3314f2212efd.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
b956637b68 Makefile: Fix description for relocate-rela parameters
Numbers in comment are shifter which is visible from command which calls
them. Also relocate-rela usage is describing them.
"Usage: %s <bin file> <text base> <rela start> <rela end>"

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bb0287b9071eb33eea0cf914a7128c2603684377.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
fe9d049e13 tools: relocate-rela: Open binary u-boot file later
There is no value to open u-boot binary file so early. Better to check all
values first and then open binary file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9c2b4ebadbe83497db28af02f6af2623793ffdb6.1655299267.git.michal.simek@amd.com
2022-06-24 14:14:59 +02:00
Michal Simek
686c2bbb44 arm64: zynqmp: Fix tps544/u3007 node description
u3007 is removed in zynqmp-m-a2197-02-revA board and on
zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:34 +02:00
Michal Simek
5f5979f430 arm64: zynqmp: Update tps53681 i2c address
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address
is 7bit where c0h is 1100000 which is 0x60.

This will fix issues reported by make dtbs that 0xc0 is above 7bit regular
i2c address range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:33 +02:00
Michal Simek
0b0d433b6c arm64: zynqmp: Fix i2c addresses for vck190 SC
si570 is normally at 0x5d address and address is not aligned with address
in node.
8T49N240 can't be at 0xd8 that's why it is shifter by one bit.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com
2022-06-24 14:14:33 +02:00
Ashok Reddy Soma
123462e5e5 pinctrl: zynqmp: Add support for output-enable and bias-high-impedance
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations. DT property output-enable brings out the pins from
tri-state, whereas bias-high-impedance changes the pins state to
tri-state.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com
2022-06-24 14:14:29 +02:00
Michal Simek
b611f7faf9 arm64: zynqmp: Enable DP for kv260-revA board
DP is enabled for revB and should be enabled for kv260-revA too. Changes in
other boards were done by commit 8b82a3a7fe ("arm64: zynqmp: Enable DP
driver for SOMs").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4e273bce3a8acf4495b67b702b1704acec8d9ccb.1654779436.git.michal.simek@amd.com
2022-06-24 14:14:25 +02:00
Stefan Herbrechtsmeier
ff5d9065ed xilinx: zynqmp: Do not use 0 as spl bss start address
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220607074314.27125-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:11:06 +02:00
Michal Simek
baba22addd arm64: zynqmp: Add support for kr260 revA/B boards
Board is using kv260 design for couple of parts defined by spec like i2c
eeproms, ina260, uart, etc.

Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO)
and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one
have separate EMIO lines via PL.

Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should
have separate reset line. The first usb0 hub also has USB-SD controller
(usb2244) connected to port 0.

To test compatibility with k26 you can run:
fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \
arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo

Also add support for kr260-revB board. Based on FRU it is revision B
but schematics can be label as revA03.
Changes in revB are:
- SFP light
- GEM2/3 TX_CLK fixes
- PMOD/RPI connector fixes
- Replace si5332 with oscilators

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Michal Simek
ad55d99e3c serial: Setup serial base and freq for zynq/zynqmp
Setup default values for debug console, base address and frequency.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Michal Simek
254f0c766d arm64: zynqmp: Add debug messages to bl2_plat_get_bl31_params()
It is useful to get information about BL type and entry address that's why
add some debug messages.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Ashok Reddy Soma
2eeceb4842 arm64: versal: Add support to load an app at EL1
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:11:05 +02:00
T Karthik Reddy
a110caa206 xilinx: Add CONFIG_DM_ETH_PHY config
Enable CONFIG_DM_ETH_PHY to utilize shared MDIO bus support on all xilinx
platforms.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/965981eb324d13a98aad8bd88eb8b50bc5147a7e.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
T Karthik Reddy
8faeb023e9 net: xilinx: axi_emaclite: Use shared MDIO bus support for axi emaclite driver
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
T Karthik Reddy
935e3625ce net: xilinx: axi_emac: Use shared MDIO bus support for axi emac driver
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00
Tom Rini
31016a5a85 Merge branch '2022-06-23-scmi-optee-and-smccc-updates' into next
This consists of two slightly related series.  For the first, to quote
the author:
This series implements 2 features in driver/firmware/scmi.

First, a single change adds support for SCMI OP-TEE transport to
use OP-TEE native shared memory. See the 1st patch in this series:
"firmware: scmi: optee: use TEE shared memory for SCMI messages".

Then come changes for supporting multi-channel in the SCMI drivers.
I've split the implementation in 11 several small incremental changes
in the hope it helps the review. Few minor fixup commits are also
inserted in the series.

And the second series implements some smccc improvements.
2022-06-23 14:30:27 -04:00
Tom Rini
3e00721b3b Merge branch '2022-06-23-fuzzing-and-asan-for-sandbox' into next
To quote the author:
This series introduces ASAN and a basic fuzzing infrastructure that
works with sandbox. The example fuzz test towards the end of the series
will find something pretty quickly. That something is fixed by the
series "virtio: Harden and test vring" that needs to be applied for the
final patch in this series.

There is some refactoring to stop using '.' prefixed sections. ELF
defines sections with names that contain anything that isn't
alphanumeric or an underscore as being for system use which means
clang's ASAN instrumentation happily add redzones between the contained
objects. That's not what we want for things like linker lists where the
linker script has carefully placed the sections contiguously. By
renaming the sections, clang sees them as user sections and doesn't add
instrumentation.

ASAN is left disabled by default as there are still some tests that it
triggers on and will need some more investigation to fix. It can be
enabled with CONFIG_ASAN or passing `-a ASAN` to buildman.
2022-06-23 14:24:24 -04:00
Etienne Carriere
53355bb86c drivers: rng: add smccc trng driver
Adds random number generator driver using Arm SMCCC TRNG interface to
get entropy bytes from secure monitor. The driver registers as an
Arm SMCCC feature driver to allow PSCI driver to bind a device for
when secure monitor exposes RNG support from Arm SMCCC TRNG interface.

Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
2fbe47b7e7 firmware: psci: bind arm smccc features when discovered
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor
and if so, bind drivers for the SMCCC features that monitor supports.

Drivers willing to be bound from Arm SMCCC features discovery can use
macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery,
providing target driver name and a callback function that returns
whether or not the SMCCC feature is supported by the system.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
b1ff399c6e firmware: psci: reorder header files inclusion
Fixes ordering of header files inclusion in PSCI firmware driver.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
f7f1240015 smccc: define generic IDs for feature discovery
Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature
support, applicable from Arm SMCCC v1.1 specification.

Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier
for when a SMCCC feature is not supported.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
c08decd29e firmware: scmi: use multi channel in mailbox, optee and smccc agents
Updates .process_msg operators of the SCMI transport drivers that
supports multi-channel to use it now that drivers do provide
the reference through channel argument. These are the mailbox
agent, the optee agent and the smccc agent.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
db59fef0f8 power: regulator: scmi: simplify scmi_voltd_set_enable()
Simplify scmi_voltd_set_enable() exit sequence.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-23 13:12:56 -04:00
Etienne Carriere
ff33ed32b6 power: regulator: scmi: support SCMI multi-channel
Update SCMI regulator controller driver to get its assigned SCMI channel
during initialization. This change allows SCMI voltage domain protocol
to use a dedicated channel when defined in the DT. The reference is
saved in SCMI regulator controller driver private data.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-23 13:12:55 -04:00
Etienne Carriere
f487a88c64 reset: scmi: support SCMI multi-channel
Update SCMI reset controller driver to get its assigned SCMI channel
during initialization. This change allows SCMI reset domain protocol
to use a dedicated channel when defined in the DT. The reference is
saved in SCMI reset controller driver private data.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
38a905ecf9 clk: scmi: support SCMI multi-channel
Update SCMI clock driver to get its assigned SCMI channel during
initialization. This change allows SCMI clock protocol to use a
dedicated channel when defined in the DT. The reference is saved
in SCMI clock driver private data.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
965d606d60 firmware: scmi: optee transport: implement multi-channel
Implements multi SCMI channel support in OP-TEE SCMI transport. An
SCMI protocol may use a dedicated channel, specified by the DT.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
57b812fc8f firmware: scmi: smccc transport: implement multi-channel
Updates SCMI SMCCC transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
b5d32ea42b firmware: scmi: mailbox transport: implement multi-channel
Updates SCMI mailbox transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
8e96801aa6 firmware: scmi: add multi-channel support
Adds resources for SCMI protocols to possibly use a dedicated SCMI
channel instead of the default channel allocated by the SCMI agent
during initialization. As per DT binding documentation, some SCMI
transports can define a specific SCMI communication channel for
given SCMI protocols. It allows SCMI protocols to pass messages
concurrently each other.

This change introduces new scmi agent uclass API function
devm_scmi_of_get_channel() for SCMI drivers probe sequences to get
a reference to the SCMI channel assigned to its related SCMI protocol.
The function queries the channel reference to its SCMI transport driver
through new scmi agent uclass operator .of_get_channel that uses Device
Tree information from related SCMI agent node.

Operator .of_get_channel returns a reference to the SCMI channel
assigned to SCMI protocol used by the caller device. SCMI transport
drivers that do not support multi-channel are not mandated to register
this operator. When so, API function devm_scmi_of_get_channel() returns
NULL and SCMI transport driver are expected to retrieve by their own
means the reference to the unique SCMI channel, for example using
platform data as these drivers currently do in U-Boot source tree.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
5a11df381a firmware: scmi: factorize scmi transport look up
Defines local helper function find_scmi_transport_device() with the
instructions to find the SCMI transport device from a SCMI protocol
device.

Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
85dc582892 firmware: scmi: prepare uclass to pass channel reference
Changes SCMI transport operator ::process_msg to pass the SCMI channel
reference provided by caller SCMI protocol device.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
8bcb1b4898 firmware: scmi: prepare scmi uclass API to multi-channel
Changes SCMI driver API function devm_scmi_process_msg() to add
an SCMI channel reference argument for when SCMI agent supports
SCMI protocol specific channels. First argument of devm_scmi_process_msg()
is also change to point to the caller SCMI protocol device rather
than its parent device (the SCMI agent device).

The argument is a pointer to opaque struct scmi_channel known from
the SCMI transport drivers. It is currently unused and caller a pass
NULL value. A later change will enable such support once SCMI protocol
drivers have means to get the channel reference during initialization.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
5d8eb4ce33 firmware: scmi: optee: fix inline description of PTA_SCMI_CMD_GET_CHANNEL
Removes inaccurate inline description of OP-TEE SCMI PTA command
PTA_SCMI_CMD_GET_CHANNEL.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
593eac9805 firmware: scmi: optee: use TEE shared memory for SCMI messages
Changes implementation when using TEE dynamically allocated shared
memory to synchronize with the Linux implementation where the legacy
SMT protocol cannot be used with such memory since it is expected from
device mapped memory whereas OP-TEE shared memory is cached and
hence should not be accessed using memcpy_toio()/memcpy_fromio().

This change implements the MSG shared memory protocol introduced
in Linux [1]. The protocol uses a simplified SMT header of 32bit
named MSG_SMT to carry SCMI protocol information and uses side channel
means to carry exchanged buffer size information, as TEE invocation API
parameters when used in the SCMI OP-TEE transport.

Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Andrew Scull
a73f3ba91f fuzz: virtio: Add fuzzer for vring
Add a fuzzer to test the vring handling code against unexpected
mutations from the virtio device.

After building the sandbox with CONFIG_FUZZ=y, the fuzzer can be invoked
with by:

   UBOOT_SB_FUZZ_TEST=fuzz_vring ./u-boot

This fuzzer finds unvalidated inputs in the vring driver that allow a
buggy or malicious device to make the driver chase wild pointers.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:19 -04:00
Andrew Scull
0518e7a28f sandbox: Implement fuzzing engine driver
Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:19 -04:00
Andrew Scull
d9962b12f2 sandbox: Add libfuzzer integration
Add an implementation of LLVMFuzzerTestOneInput() that starts the
sandbox on a secondary thread and exposes a function to synchronize the
generation of fuzzing inputs with their consumption by the sandbox.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
001c39a196 sandbox: Decouple program entry from sandbox init
Move the program's entry point to os.c, in preparation for a separate
fuzzing entry point to be added.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
36f641c54e test: fuzz: Add framework for fuzzing
Add the basic infrastructure for declaring fuzz tests and a command to
invoke them.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
3f807c6b81 fuzzing_engine: Add fuzzing engine uclass
This new class of device will provide fuzzing inputs from a fuzzing
engine.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
eabc4e2980 CI: Azure: Build with ASAN enabled
In order to prevent build regressions with ASAN, add the builds to CI.
The longer term objective will be to enabled test targets with ASAN
enabled, but there are too many at the moment.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:18 -04:00
Andrew Scull
791de336b6 test/py: test_stackprotector: Disable for ASAN
The stack protector test intentionally overflows a buffer in order to
corrupt the stack canary so that it can test that the corruption is
detected as expected. However, this is incompatible with ASAN, which
detects the buffer overflow and interrupts the test, so disable the test
for such configurations.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:18 -04:00
Andrew Scull
1e578ed20c sandbox: Add support for Address Sanitizer
Add CONFIG_ASAN to build with the Address Sanitizer. This only works
with the sandbox so the config is likewise dependent. The resulting
executable will have ASAN instrumentation, including the leak detector
that can be disabled with the ASAN_OPTIONS environment variable:

   ASAN_OPTIONS=detect_leaks=0 ./u-boot

Since u-boot uses its own dlmalloc, dynamic allocations aren't
automatically instrumented, but stack variables and globals are.

Instrumentation could be added to dlmalloc to poison and unpoison memory
as it is allocated and deallocated, and to introduce redzones between
allocations. Alternatively, the sandbox may be able to play games with
the system allocator and somehow still keep the required memory
abstraction. No effort to address dynamic allocation is made by this
patch.

The config is not yet enabled for any targets by default.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
99e2fbcb69 linker_lists: Rename sections to remove . prefix
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.

Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Andrew Scull
0648b13269 sandbox: Rename getopt sections
Rename the sections used for defining sandbox command line options so
that they don't start with a '.'. ELF says that sections starting with a
'.' are reserved for system use, but the sandbox runs as a normal user
process so should be using user sections instead.

Clang's ASAN adds redzones to non-user sections and the extra padding
meant that the list of options was being corrupted. Naming the sections
as user sections avoids this issue as clang handles them as we intended.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:18 -04:00
Andrew Scull
aac53d3d96 sandbox: Rename EFI runtime sections
Rename the sections used for placing the EFI runtime so that they don't
start with a '.'. ELF says that sections starting with a '.' are
reserved for system use, but the sandbox runs as a normal user process
so should be using user sections instead.

Clang's ASAN adds redzones to non-user sections and the extra padding
meant that the list of options was being corrupted. Naming the sections
as user sections avoids this issue as clang handles them as we intended.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-23 12:58:18 -04:00
Andrew Scull
337b26e468 serial: sandbox: Fix buffer underflow in puts
Fix the buffer underflow that would occur if puts is called with length
of zero.

Fixes: efa51f2bd6 ("serial: sandbox: Implement puts")
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-06-23 12:58:18 -04:00
Tom Rini
625756083e Merge branch '2022-06-23-important-fixes'
- Apple NVMe updates to support macOS 13 changes, kontron-sl-mx8mm dts
  changes to fix some problems.
2022-06-23 11:27:04 -04:00
Frieder Schrempf
c0b71a1731 imx: kontron-sl-mx8mm: Remove deprecated phy-mode property
This was previously needed, but U-Boot is now capable of parsing
the new "phy-connection-type" property that is already used in
the main devicetree.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-23 08:25:02 -04:00
Frieder Schrempf
fecfe77c48 imx: kontron-sl-mx8mm: Sync dts files and fix ethernet
This syncs the devicetree files with the latest Linux kernel (5.19-rc2).
This also fixes the currently broken ethernet support:

Before:

  Net:   Could not get PHY for FEC0: addr 0

After:

  Net:   eth0: ethernet@30be0000

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-23 08:24:49 -04:00
Janne Grunau
942b54b4ee arm: apple: Increase RTKit timeouts
Timeouts are not expected to happen and are handled as fatal errors.
Increase all timeouts to 1 second as defensive measure to avoid relying
on the timing behaviour of certain firmware versions or configurations.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-23 08:24:49 -04:00
Janne Grunau
a30f60ca0b MAINTAINERS: Add nvme_apple to Apple SoC section
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-23 08:24:49 -04:00
Janne Grunau
e44d59c6ad arm: apple: nvme: Add SART support and RTKit buffer management
The NVMe firmware in the macOS 13 beta blocks or crashes with u-boot's
current minimal RTKit implementation. It does not provide buffers for
the firmware's buffer requests. The ANS2 firmware included in macOS 11
and 12 tolerates this. The firmware included in the first macOS 13 beta
requires buffers for the crashlog and ioreport endpoints to function.

In the case of the NVMe the buffers are physical memory. Access to
physical memory is guarded by what Apple calls SART.
Import m1n1's SART driver (exclusively used for the NVMe controller).
Implement buffer management helpers for RTKit. These are generic since
other devices (none in u-boot so far) require different handling.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-23 08:24:49 -04:00
Tom Rini
9121478ee6 Merge branch '2022-06-22-platform-updates-and-additions' into next
- Add hpe gxp architecture and platform, Arm corstone1000 platform.
- ast2600, devkit8000, NPCM7xx improvements
2022-06-23 08:16:21 -04:00
Tom Rini
929e581a62 corstone1000: Convert to text file environment
Convert this platform to using the text file environment rather than
defining CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22 21:30:05 -04:00
Tom Rini
781a144a7a gxp: Convert to text file environment
Convert this platform to using the text file environment rather than
defining CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22 21:30:05 -04:00
Jim Liu
0ae1c77199 misc: nuvoton: Add NPCM7xx otp controller driver
Add Nuvoton BMC npcm750 otp driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-22 21:30:05 -04:00
Jim Liu
2eeb4ee97e crypto: nuvoton: Add NPCM7xx SHA driver
add nuvoton BMC npcm750 SHA driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-22 21:30:05 -04:00
Jim Liu
9e03b48dfa crypto: nuvoton: Add NPCM7xx AES driver
add nuvoton BMC npcm750 AES driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-22 21:30:05 -04:00
Chia-Wei Wang
12770d0df0 ast2600: spl: Add boot mode detection
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-06-22 21:30:05 -04:00
Chia-Wei Wang
442a69c143 configs: ast2600: Move SPL bss section to DRAM space
The commit b583348ca8 ("image: fit: Align hash output buffers") places
the hash output buffer at the .bss section. However, AST2600 by default
executes SPL in the NOR flash XIP way. This results in the hash output
cannot be written to the buffer as it is located at the R/X only region.

We need to move the .bss section out of the SPL body to the DRAM space,
where hash output can be written to. This patch includes:
 - Define the .bss section base and size
 - A new SPL linker script is added with a separate .bss region specified
 - Enable CONFIG_SPL_SEPARATE_BSS kconfig option

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
478c00718d MAINTAINERS: Introduce HPE GXP Architecture
Create a section in MAINTAINERS for the GXP HPE architecture

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
3736faee5b configs: gxp: add gxp_defconfig
This is the initial very basic config that enables the U-Boot console on
the hpe gxp soc.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
79c6c38102 configs: gxp: add core support
Add the include file for the gxp soc.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
2b7a89bc94 ARM: dts: Add device tree files for hpe gxp soc
The HPE SoC is new to linux. A basic device tree layout with minimum
required for linux to boot including a timer and watchdog support has
been created.

The dts file is empty at this point but will be updated in subsequent
updates as board specific features are enabled.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
63ff9d9134 dt-bindings: spi: Add hpe gxp spi
Add support for the HPE GXP SPI Controller.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
e7ea0a2ba3 board: hpe: gxp: add HPE GXP soc support
Add basic support for the HPE GXP SoC. Reset the EHCI controller at
boot.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
4f689b3d86 spi: gxp_spi: Add GXP SPI controller driver
The GXP supports 3 separate SPI interfaces to accommodate the system
flash, core flash, and other functions. The SPI engine supports variable
clock frequency, selectable 3-byte or 4-byte addressing and a
configurable x1, x2, and x4 command/address/data modes. The memory
buffer for reading and writing ranges between 256 bytes and 8KB. This
driver supports access to the core flash.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
b25913b40e timer: gxp: Add HPE GXP timer support
Add support for the HPE GXP SOC timer. The GXP supports several different
kinds of timers but for the purpose of this driver there is only support
for the General Timer. The timer has a 1us resolution and is 56 bits.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:04 -04:00
Nick Hawkins
4276c9b2aa ARM: hpe: gxp: add core support
The GXP is the HPE BMC SoC that is used in the majority
of current generation HPE servers. Traditionally the asic will
last multiple generations of server before being replaced.

Info about SoC:

HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC
features at HPE. It supports ARMv7 architecture based on the Cortex A9
core. It is capable of using an AXI bus to whicha memory controller is
attached. It has multiple SPI interfaces to connect boot flash and BIOS
flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple
i2c engines to drive connectivity with a host infrastructure. There
currently are no public specifications but this process is being worked.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:04 -04:00
Tom Rini
c4645fc87e cmd/misc: Stop using a function pointer
Currently, enabling CMD_MISC gives:
cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int,  void *, int)' from incompatible pointer type 'int (*)(struct udevice *, int,  const void *, int)' [-Wincompatible-pointer-types]

Because 'misc_read' takes a void * and 'misc_write' takes a const void
*, both of which make sense for their operation.  Given there's one
place we make use of the function pointer, just call read or write
directly for the operation we're called with.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22 21:29:47 -04:00
Rui Miguel Silva
f98457d70a arm: add support to corstone1000 platform
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].

This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
FPGA MPS3 board implementation of this platform. [2]

0: https://developer.arm.com/documentation/102360/0000
1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
2: https://developer.arm.com/documentation/dai0550/c/

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-22 12:35:15 -04:00
Rui Miguel Silva
bfef72e4dd cmd: load: add load command for memory mapped
cp.b is used a lot as a way to load binaries to memory and execute
them, however we may need to integrate this with the efi subsystem to
set it up as a bootdev.

So, introduce a loadm command that will be consistent with the other
loadX commands and will call the efi API's.

ex: loadm $kernel_addr $kernel_addr_r $kernel_size

with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
then subsequently booted with bootefi command.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-22 11:35:47 -04:00
Anthoine Bourgeois
a47ce34403 ARM: dts: omap3-devkit8000: Fix CONFIG_DM_ETH warning
Add the missing ethernet node in u-boot dts.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
2022-06-22 10:58:26 -04:00
Anthoine Bourgeois
8d09c7b774 ARM: dts: omap3-devkit8000: Fix CONFIG_DM_I2C warning
Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower
the speed to the default value 100Khz.

v2: fix i2c1 frequency in the root omap3-u-boot.dtsi include.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
2022-06-22 10:58:26 -04:00
Anthoine Bourgeois
49df685d32 ARM: dts: omap3-devkit8000: Add support for Devkit8000
This commit adds OMAP3 BeagleBoard devicetree files from Linux
v5.16.0.
This commit fixes CONFIG_DM_MMC warning.

v3: patch clean-up

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
2022-06-22 10:58:26 -04:00
Tom Rini
52af0101be Merge branch 'master' into next
Merge in v2022.07-rc5.
2022-06-20 14:40:59 -04:00
Tom Rini
568a226f87 Prepare v2022.07-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-20 14:30:36 -04:00
Tom Rini
78533a1ce8 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-20 08:13:12 -04:00
Tom Rini
2f7821a927 Merge tag 'u-boot-stm32-20220620' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
2022-06-20 08:09:24 -04:00
Tom Rini
a9e90d357b Merge tag 'fsl-qoriq-2022-6-20-v2' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Layerscape:
 add sfp driver
 Kconfig cleanup
 sl28 board update
 support hdp firmware loading
powerpc:
 dts update for p2020
 p1_p2_rdb_pc board update
 fsl_esdhc fallback to 1-bit mode support
2022-06-20 08:08:29 -04:00
Michael Walle
7bc683afda board: sl28: rename include guard macro
Avoid name clashes with an include file on board level.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
1029249b00 board: sl28: support 8 GiB memory
The board supports up to 8 GiB memory. The memory is soldered on the
board but the configuration is equivalent to a dual chip select, dual
rank DIMM module.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
7fd5ca1501 board: sl28: remove unneeded ddr config parameter
config_2 doesn't need to be set to zero because that is already the
default value.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
6bdda4b200 board: sl28: set CPO value
With a 8GiB memory board, it seems that the "very unlikely event" of a
DDR initialization with non-optimal values are not really that unlikely.
It happens in about every other reboot. As described in erratum
A-009942, preset the DEBUG_28 register with an optimal value. The value
iself depends on the memory configuration of the board, but the used
value seems to work well for all variants.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
2a9cf320af armv8: layerscape: add missing RCW source defines
A board might need to get the source of the RCW word, which is also the
boot source in most cases.

These defines are taken from the LS1028A and I expect they are the same
across the SoCs with the same chassis, after all, there was already a
reset source for NOR flash.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Pali Rohár
66b2dd9ac3 powerpc: bootm: Fix sizes in memory adjusting warning
Old size is stored in size variable and new size is in bootm_size variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 15:52:45 +08:00
Pali Rohár
676f682bad board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h
Code for changing boot source is platform generic and can be used by any
P1* and P2* compatible RDB board. Not only by boards which use config
header file p1_p2_rdb_pc.h.

So move this code from p1_p2_rdb_pc.h to p1_p2_bootsrc.h and cleanup macros
for generating boot source env variables in CONFIG_EXTRA_ENV_SETTINGS.

This allows to use code for resetting board and rebooting to other boot
source also by other boards in future.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 15:52:45 +08:00
Pali Rohár
3acf0be4e6 powerpc: dts: p2020: Define PMC node
Copy definition of PMC node from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 15:52:45 +08:00
Pali Rohár
8f3f8ba945 mmc: fsl_esdhc: Add new config option for default fallback mode
Currently default fallback SDHC mode is 1-bit. Add new config option
CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
mode. This is useful e.g. for SPL builds which loads other parts from SD
card during boot process.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-20 15:52:45 +08:00
Pali Rohár
a29eb319a3 mmc: fsl_esdhc: Set fallback mode to 1-bit
8-bit mode is not supported by SD cards and on P2020 are four SDHC pins
shared with SPI (so if P2020 board have also SPI then only 4-bit SDHC mode
is provided). So 8-bit SDHC mode is really bad default.

When max bus width is not provided then set mode to 1-bit. This mode is
supported by all cards, so it is the best option for fallback mode.

Also P2020 bootrom sets mode to 1-bit when booting from SD/MMC card.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-20 15:52:44 +08:00
Alison Wang
d494806376 ls1028a: hdp: Add config support for HDP firmware loading
This patch adds config support for HDP firmware loading on LS1028A.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2022-06-20 09:18:26 +08:00
Pali Rohár
39f42fe20a powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs
This reduce usage of per-board custom settings.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
26153d0b05 mtd: rawnand: fsl_elbc: Fix DM support in DTS code path
For proper DM support it is required to fill also mtd->dev member.
Otherwise DM would not see nand device at all.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
6b6c377feb powerpc: mmu: Fix FSL_BOOKE_MAS2() macro
Effective page number mask for MAS2 register is stored in macro MAS2_EPN.

Fixes: 2146cf5682 ("Reworked FSL Book-E TLB macros to be more readable")
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
02c8fbdb8d powerpc: fsl_law: Add definition for first PCIe target interface
Header file asm/fsl_law.h already provides correct definition for second
and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But
is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1).

Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3
are slightly complicated, but are really correct for P2020 platform.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
20fb58fc5a board: freescale: p1_p2_rdb_pc: Implement board_reset()
Do board reset via CPLD's system reset register.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
ae0e7ee886 board: freescale: p1_p2_rdb_pc: Enable TDM function only for P1010
TDM function is supported only on P1010. P2020 does not have PMUXCR_TDM_ENA
register, so do not enable it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
549bb6b237 powerpc: mpc85xx: Fix compilation with CONFIG_WDT
When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to
conflicting functions like watchdog_reset(). So disable compilation of
mpc85xx watchdog_reset() function when CONFIG_WDT is enabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
26f6f7188b powerpc: dts: p2020: Define ecm, memory and guts nodes
Copy definition of these nodes from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
f0bb612d5b powerpc: dts: p2020: Define DMA nodes
Copy definition of DMA nodes from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
99f17774b7 powerpc: dts: p2020: Define crypto node
Copy definition of crypto node from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
1cb0f98f91 powerpc: dts: p2020: Define MPIC nodes
Copy definition of MPIC nodes from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Sean Anderson
bcb3dae325 ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB
These frequency calculations depend on the RCW format, which is not
dependent on any particular board. Switch to using ARCH symbols instead
of TARGET.

This whole function could probably use less ifdefs, but for now just do
a minimal conversion.

Fixes: 24cb6f2295 ("fsl-layerscape: Add fsl_esdhc peripheral clock support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:26 +08:00
Sean Anderson
7041601141 arch: layerscape: Add SFP binding
This adds an SFP binding for the processors it is present on. I have
only tested this for the LS1046A.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:26 +08:00
Sean Anderson
f99068a8b1 ARM: dts: ls1021a: update the clockgen node
QorIQ platforms now use different clock bindings. Although we don't use
the device tree for clocks on this platform, it is helpful to sync it
because then the bindings will more closely match Linux. Additionally,
it allows for using more clock fractions (such as platform/4).

This corresponds to Linux commit b6f5e7019391 ("ARM: dts: ls1021a:
update the clockgen node").

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:26 +08:00
Sean Anderson
2645bc0e12 arm: layerscape: Add sfp driver
This adds a driver for the Security Fuse Processor (SFP) present on
LS1012A, LS1021A, LS1043A, and LS1046A processors. It holds the
Super-Root Key (SRK), One-Time-Programmable Master Key (OTPMK), and
other "security" related fuses. Similar devices (sharing the same name)
are present on other processors, but for the moment this just supports
the LS2 variants.

The mirror registers are loaded during power-on reset. All mirror
registers must be programmed or read at once. Because of this, `fuse
prog` will program all fuses, even though only one might be specified.
To prevent accidentally burning through all your fuse programming cycles
with something like `fuse prog 0 0 A B C D`, we limit ourselves to one
programming cycle per reset. Fuses are numbered based on their address.
The fuse at 0x1e80200 is 0, the fuse at 0x1e80204 is 1, etc.

The TA_PROG_SFP supply must be enabled when programming fuses, but must
be disabled when reading them. Typically this supply is enabled by
inserting a jumper or by setting a register in the board's FPGA. I've
also added support for using a regulator. This could be helpful for
automatically issuing the FPGA write, or for toggling a GPIO controlling
the supply.

I suggest using the following procedure for programming:

1. Override the fuses you wish to program
   => fuse override 0 2 A B C D
2. Inspect the values and ensure that they are what you expect
   => fuse sense 0 2 4
3. Enable TA_PROG_SFP
4. Issue a program command using OSPR0 as a dummy. Since it contains the
   write-protect bit you will usually want to write it last anyway.
   => fuse prog 0 0 0
5. Disable TA_PROG_SFP
6. Read back the fuses and ensure they are correct
   => fuse read 0 2 4

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:25 +08:00
Tom Rini
700cff2328 Merge tag 'efi-2022-07-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2020-07-rc5-2

Documentation:

* man-pages for booti and printenv

UEFI

* correct return value for printenv -e command
* initialize console size late
2022-06-19 11:30:29 -04:00
Heinrich Schuchardt
68edbed454 efi_loader: initialize console size late
If CONFIG_VIDEO_DM=n we query the display size from the serial console.
Especially when using a remote console the response can be so late that
it interferes with autoboot.

Only query the console size when running an EFI binary.

Add debug output showing the determined console size.

Reported-by: Fabio Estevam <festevam@gmail.com>
Fixes: a57ad20d07 ("efi_loader: split efi_init_obj_list() into two stages")
Fixes: a9bf024b29 ("efi_loader: disk: a helper function to create efi_disk objects from udevice")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Fabio Estevam <festevam@denx.de>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-06-19 15:53:09 +02:00
Heinrich Schuchardt
e05bd68ed5 test: work around for EFI terminal size probing
When the UEFI sub-system is initialized it sends an escape sequence to the
serial console to determine the terminal size. This stops the
run_command_list() function of the console emulation from recognizing the
U-Boot command line prompt.

Add a 'print -e' command as first command in the command list to work
around this issue.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-19 15:53:09 +02:00
Heinrich Schuchardt
a872b18a0f cmd: correct return value for printenv -e
If printenv -e is executed and the specified variable is not found, the
return value $? of the command should be 1 (false).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-19 15:53:09 +02:00
Heinrich Schuchardt
eaa268589e doc: man-page for the printenv command
Privide a man-page for the printenv command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-19 15:53:09 +02:00
Heinrich Schuchardt
a8a349d743 doc: man-page for bootz command
Provide a man-page for the bootz command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-19 15:53:09 +02:00
Tom Rini
aad77c215c Merge tag 'u-boot-stm32-20220617' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Fix the stm32prog command for stm32mp platform
- Add stm32mp15x DHCOR based DRC Compact board
2022-06-17 09:41:11 -04:00
Tom Rini
f0843e0c0a Merge commit '32e0379143b433e29d76404f5f4c279067e48853' of https://github.com/tienfong/uboot_mainline 2022-06-17 09:35:28 -04:00
Tom Rini
ee4b80a6e2 Merge branch '2022-06-16-assorted-bugfixes'
- A wide array of regression fixes and minor updates
2022-06-17 09:13:50 -04:00
Patrick Delaunay
eae488b779 stm32mp1: fix reference for STMicroelectronics
Replace reference to the correct name STMicroelectronics

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
5c9ea94da9 configs: stm32mp: cleanup the stm32mp15 file
Remove STM32_SYSRAM_END and clean the comments in stm32mp15_common.h file
after moving some CONFIG to Kconfig: CONFIG_SYS_CBSIZE,
CONFIG_SPL_MAX_FOOTPRINT, CONFIG_SYS_SPL_MALLOC_START and
CONFIG_SYS_SPL_MALLOC_SIZE.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
7171d99296 stm32mp: stpmic1: remove the debug unit request by debugger
Depending on backup register value, U-Boot SPL maintains the debug unit
powered-on for debugging purpose; only BUCK1 is required for powering
the debug unit, so revert the setting for all the other power lanes,
except BUCK3 that has to be always on.

To be functional this patch requires a modification in the debugger
,openocd for example, to update the STM32MP15 backup register when it is
required to debug SPL after reset. After deeper analysis this behavior
will be never supported in tools so the associated code, will be never
used and the associated code can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
89c30ae963 ARM: stm32: activate OF_LIVE for DHSOM
Activate the live DT with CONFIG_OF_LIVE to reduce the DT parsing
time.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
5a605b7c86 board: dhelectronics: stm32mp1: convert to livetree
Replace call to fdt_*() functions and access to gd->fdt_blob
with call to ofnode_*() functions to support a live tree.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
655100d706 board: engicam: stm32mp1: convert to livetree
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
6350633ed9 board: stm32mp1: convert to livetree
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:26 +02:00
Patrick Delaunay
f8a0f4a830 misc: stm32mp13: introduce STM32MP13 RCC driver
Add the MISC RCC driver for STM32MP13, and bind it to the RCC reset
driver, required for initial support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Change-Id: Ida11c15462caf140f87b1e3239efa2b8a689acb9
2022-06-17 14:12:19 +02:00
Patrick Delaunay
b99293338e clk: Add directory for STM32 clock drivers
Add a directory in drivers/clk to regroup the clock drivers for all
STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
CONFIG_ARCH_STM32MP (MPUs with cortex A).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Acked-by: Sean Anderson <seanga2@gmail.com>
Change-Id: I955af307963f732167396f0157a30cf2fc91f150
2022-06-17 14:11:43 +02:00
Patrick Delaunay
df68a30979 stm32mp: fdt: update etzpc for STM32MP13x
Add support of STM32MP13x the ETZPC part of fdt.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: If2777fbf66b8525a2a447056780aaa04e6b0a9a0
2022-06-17 10:41:17 +02:00
Patrick Delaunay
ca9c9e7e92 stm32mp: fdt: update etzpc for STM32MP15x
Introduce STM32MP15 function and defines to prepare the
STM32MP13 introduction.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I909b205e73dcf207e0216aae5905c3c52472020e
2022-06-17 10:41:16 +02:00
Patrick Delaunay
b94b275b0a doc: st: stm32mp1: add STM32MP13x support
Add in U-Boot documentation the quick instruction to
setup the STMicroelectronics STM32MP13x boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
11517ccc8c configs: add stm32mp13 defconfig
Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk
device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
44abcf6060 arm: dts: stm32mp: add stm32mp13 device tree for U-Boot
Compile the device tree of STM32MP13x boards and add the needed
U-Boot add-on.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
79bdcd882e mmc: stm32_sdmmc2: make reset property optional
Although not recommended, the reset property could be made optional.
This way the driver will probe even if no reset property is provided
in an sdmmc node in DT. This reset is already optional in Linux.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
a46dce2817 ram: stm32mp1: add support of STM32MP13x
Add support for new compatible "st,stm32mp13-ddr" to manage the
DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)

The STM32MP15x SOC have 2 AXI ports and 32 bits support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
ae3e2c2bf7 board: stm32pm1: add stm32mp13 board support
Add stm32mp15x prefix to all STM32MP15x board specific functions,
this patch is a preliminary step for STM32MP13x support.

This patch also adds the RCC probe to avoid circular access with
usbphyc probe as clk provider.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Dinesh Maniyam
32e0379143 ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17 16:27:05 +08:00
Dinesh Maniyam
d192adafeb drivers: cache: ncore: Disable snoop filter
There is hardware bug in NCORE CCU IP and it is causing an issue in the
coherent directory tracking of outstanding cache lines.
The workaround is disabling snoop filter.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17 16:27:05 +08:00
Dinesh Maniyam
5474fb894c arm: dts: socfpga: stratix10: Add freeze controller node
The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17 16:27:05 +08:00
Dinesh Maniyam
7f85330782 arm: dts: socfpga: agilex: Add freeze controller node
The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17 16:27:04 +08:00
Dinesh Maniyam
373c1428a0 arch: arm: socfpga: timer_s10: Override udelay for secure section
Override __udelay() as 'always inlined' function so that PSCI code
run in '__secure' section can call this delay function as well.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17 16:26:52 +08:00
Patrick Delaunay
cf1d0fd4c1 pinctrl: stm32: add support of STM32MP135
Add support for "st,stm32mp135-pinctrl" for STM32MP13x

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
46f9eb5dcc arm: stm32mp: support 2 MAC address for STM32MP13
Add support of several MAC address in OTP (3 32bits OTP word for
2 MAC address) for SOCs in  STM32MP13x family: STM32MP133 and STM32MP135.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
960debbe3c arm: stm32mp: add support of STM32MP13x
Introduce the code in mach-stm32mp and the configuration file
stm32mp13_defconfig for the new STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
741090c510 arm: stm32mp: add CONFIG_STM32MP15_PWR
Add config CONFIG_STM32MP15_PWR to handle the
access to regulators managed by the PWR driver defined in
pwr_regulator.c

This driver is only used in U-Boot by STM32MP15x family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
d8b78fd632 arm: stm32mp: add sub config Kconfig.15x
Add sub Kconfig for each SOC in the STM32 CPU family.

It is a preliminary step to introduce a new SOC in the STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
647d319cc9 arm: stm32mp: add choice for STM32MP SOC family
Add mandatory choice for SOC support in ARCH_STM32MP.

This patch is a preliminary step for new SOC introduction
in STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
6df271a70f arm: stm32mp: move code for STM32MP15x
Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c
when low level init without TFABOOT is supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
3865a7ec95 arm: stm32mp: move the get_otp helper function in bsec
As the get_otp() helper function in bsec are common for all STM32MP family,
move this function in bsec driver

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
2ff0866b45 configs: stm32mp1: move SUPPORT_SPL in STM32MP15x
The SPL is only supported by STM32MP15x not by all the
SOC with STM32MP arch.
Only TFABOOT is supported in next products.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
a82abb15a8 ARM: dts: stm32: add STM32MP13 SoCs support
Add initial support of STM32MP13 family based on v5.18-rc2

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Marek Vasut
4f71c80b0d ARM: dts: stm32: Add DHCOR based DRC Compact board
Add DT for DH DRC Compact unit, which is a universal controller device.
The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD
card slot, eMMC and SDIO Wi-Fi.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:19 +02:00
Marek Vasut
cb6d857db2 ARM: dts: stm32: Add alternate pinmux for SPI2 pins
Add another mux option for SPI2 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:19 +02:00
Marek Vasut
3577cc0632 ARM: dts: stm32: Add alternate pinmux for CAN1 pins
Add another mux option for CAN1 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:19 +02:00
Marek Vasut
9b87f12953 ARM: dts: stm32: Add alternate pinmux for UART5 pins
Add another mux option for UART5 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:18 +02:00
Marek Vasut
fb6284b5af ARM: dts: stm32: Add alternate pinmux for UART4 pins
Add another mux option for UART4 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:18 +02:00
Marek Vasut
40beedb052 ARM: dts: stm32: Add alternate pinmux for UART3 pins
Add another mux option for UART3 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:18 +02:00
Patrick Delaunay
8b91f28bc8 stm32mp: stm32prog: fix the last character of dfu_alt_add third parameter
The third parameter of dfu_alt_add(), the string description of alternate,
is build in stm32prog_alt_add() with a unnecessary character ';' at the
end of the string.

This separator was required in the first implementation of
dfu_alt_add() but is no more needed in the current implementation;
this separator is managed only in dfu_config_interfaces() which call
dfu_alt_add() for this parameter without this separator.

And since the commit 53b406369e ("DFU: Check the number of arguments
and argument string strictly"), this added character cause an error when
the stm32prog command is executed because the third parameter of
dfu_alt_add() must be a string with a numerical value; 's' must be NULL
in the result of call in dfu_fill_entity_mmc():
  third_arg = simple_strtoul(argv[2], &s, 0);

Fixes: 53b406369e ("DFU: Check the number of arguments and argument string strictly")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:30:19 +02:00
Marek Vasut
3c07d639ed net: Fix discuss discard typo
Replace discuss with discard, that is what happens with packet with
incorrect checksum. Fix the typo.

Fixes: 4b37fd146b ("Convert CONFIG_UDP_CHECKSUM to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2022-06-16 18:51:07 -04:00
Peng Fan
7e41abad9b tools: binman: install btool
btool is needed after install binman to system.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-16 15:22:55 -04:00
Corentin LABBE
2f51f946e3 board: ti: am335x: eth_cpsw should depend on CONFIG_NET
The origin of this patch is the breaking of am335x-hs boot
due to commit e41651fffd ("dm: Support parent devices with of-platdata")
HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit.
This commit added 10 driver binding pass and am335x boot only if one pass is done.
SPL try to do more than one pass due to eth_cpsw failing.
Since HS SPL does not need network (and NET is already disabled in config),
the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled.

Signed-off-by: Corentin LABBE <clabbe@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew Davis <afd@ti.com>
2022-06-16 15:22:55 -04:00
Andre Przywara
ce9c579e2b armv8: always use current exception level for TCR_ELx access
Currently get_tcr() takes an "el" parameter, to select the proper
version of the TCR_ELx system register.
This is problematic in case of the Apple M1, since it runs with
HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout,
and we get the wrong version.

For U-Boot's purposes the only sensible choice here is the current
exception level, and indeed most callers treat it like that, so let's
remove that parameter and read the current EL inside the function.
This allows us to check for the E2H bit, and pretend it's EL1 in this
case.

There are two callers which don't care about the EL, and they pass 0,
which looks wrong, but is irrelevant in these two cases, since we don't
use the return value there. So the change cannot affect those two.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-16 15:22:55 -04:00
Heiko Thiery
b11b5afa6a arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocks
With the move to use DM_CLK the boards uart stops working. The used
properties are not supported by the imx8mq clock driver. Thus
the correct baudrate cannot be selected. Remove this properties here and
the board can start with working uart. Keep it in the main dts because
linux handles these porperties fine.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-06-16 15:22:55 -04:00
Andre Przywara
81755b8c20 usb: host: ehci-generic: Make resets and clocks optional
The generic EHCI binding does not *require* resets and clocks
properties, and indeed for instance the Allwinner A20 SoCs does not
need or define any resets in its DT.

Don't easily give up if clk_get_bulk() or reset_get_bulk() return an
error, but check if that is due to the DT simply having no entries for
either of them.

This fixes USB operation on all boards with an Allwinner A10 or A20 SoC,
which were reporting an error after commit ba96176ab7:
=======================
Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2)
probe failed, error -2
=======================

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-16 15:22:55 -04:00
Miquel Raynal
2ac0baab4a fs/squashfs: sqfs_read: Prevent arbitrary code execution
Following Jincheng's report, an out-of-band write leading to arbitrary
code execution is possible because on one side the squashfs logic
accepts directory names up to 65535 bytes (u16), while U-Boot fs logic
accepts directory names up to 255 bytes long.

Prevent such an exploit from happening by capping directory name sizes
to 255. Use a define for this purpose so that developers can link the
limitation to its source and eventually kill it some day by dynamically
allocating this array (if ever desired).

Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com
Reported-by: Jincheng Wang <jc.w4ng@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Jincheng Wang <jc.w4ng@gmail.com>
2022-06-16 15:22:55 -04:00
Tom Rini
e744bf3a4b odroid_xu3: Fix board environment variable
When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed
what "board" evaluated to in the environment.  This in turn meant that
we would no longer try and find the correct fdtfile via the normal
distro boot logic.  Fix this by overriding board in the default
environment, as done on other platforms where CONFIG_SYS_BOARD is not
what we want to be in the board environment variable.

Fixes: f76750d111 ("Convert CONFIG_CONS_INDEX et al to Kconfig")
Reported-by: Gabriel Hojda <ghojda@yo2urs.ro>
Tested-by: Gabriel Hojda <ghojda@yo2urs.ro>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-16 15:22:55 -04:00
Andrey Zhizhikin
101a0f71e4 .gitignore: add files produced by b4
b4 utility [1] is introduced by Linux Kernel developers and used to
fetch patches and patch series from lore.kernel.org and is proven
to be useful for U-Boot development. Detailed usage of the tool can be
read under post from the original author [2].

This tool fetches files from the list and populates the source folder
with additional files (*.cover and *.mbx) which are not ignored by git
and shown as newly added files.

Add those file patterns into .gitignore file, so they can be safely
skipped during changes attestation.

Link: [1]: https://pypi.org/project/b4/
Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-16 15:22:55 -04:00
Christian Gmeiner
761157d310 arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlock
Without this register unlock it is not possible to configure the
pinmux used for mcu spi0.

Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2022-06-16 15:22:54 -04:00
Christophe Leroy
48f44de8b4 Update email address and company name
This patch updates my email address and company name.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2022-06-16 15:22:54 -04:00
Stefan Roese
41b2182af7 crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()
While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:

   Using 'conf-freescale_lx2160a.dtb' configuration
   Trying 'kernel-1' kernel subimage
   Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!

Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gaurav Jain <gaurav.jain@nxp.com>
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-06-16 15:22:54 -04:00
Tom Rini
98c4828740 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next 2022-06-16 09:27:43 -04:00
Tom Rini
9abfbef57f Merge tag 'u-boot-imx-20220616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220616
-------------------

Fixes for 2022.07 + Toradex apalis-imx8 (missed in last PR)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12322
2022-06-16 08:38:46 -04:00
Marek Vasut
163863d572 arm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load script
Clean up in ubiload script. Unmount UBIFS from which kernel image was
loaded and detach UBI on which the UBIFS is located, otherwise message
similar to the following is printed just before booting kernel:

Removing MTD device #7 (rootfs) with use count 1
Error when deleting partition "rootfs" (-16)

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tien Fong Chee  <tien.fong.chee@intel.com>
2022-06-16 16:11:06 +08:00
Tien Fong Chee
39bbcc341b ddr: altera: Stratix10: Use phys_size_t for memory size
Replace with phys_size_t for all memory size variables declaration
for the sake of scalability. phys_size_t is defined in
/arch/arm/include/asm/types.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16 16:10:58 +08:00
Tien Fong Chee
ee06c5390f ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS
Bit[7-4] for both register seq2core and core2seq handshake in HPS are not
required for triggering DDR re-calibration or resetting EMIF. So, ignoring
these bits just for playing it safe.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16 16:10:44 +08:00
Yau Wai Gan
f70e00fa7d arm: dts: socfpga: stratix10: Update MMC smplsel value
This new MMC sample select value is obtained from running
tests on multiple Stratix 10 boards and proven working.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16 16:02:26 +08:00
Tom Rini
fd27812e52 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-pmic 2022-06-15 23:11:30 -04:00
Tom Rini
488d30a1e9 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-mmc 2022-06-15 23:10:17 -04:00
Tien Fong Chee
166e5b82a3 intel: n5x: ddr: update license
All the source code of sdram_n5x.c are from Intel, update the license to
use both GPL2.0 and BSD-3 Clause because this copy of code may used for
open source and internal project.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-15 17:48:22 +08:00
Marek Vasut
1a558fafbb spi: nxp_fspi: Fix clock imbalance
The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(),
where the IP clock are initially disabled. Drop the second disabling of
clock to prevent clock enable/disable imbalance reported by clock core:

"
clk qspi_root_clk already disabled
"

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-06-15 11:34:38 +02:00
Loic Poulain
12a29d3b85 mmc: fsl_esdhc_imx: Implement wait_dat0 mmc ops
Implement wait_dat0 mmc ops callbac, allowing to reduce SPL boot time.

Before (using grabserial):
[0.000001 0.000001] U-Boot SPL 2021.04-xxxx
[0.028257 0.028257] DDRINFO: start DRAM init
[0.028500 0.000243] DDRINFO: DRAM rate 3000MTS
[0.304627 0.276127] DDRINFO:ddrphy calibration done
[0.305647 0.001020] DDRINFO: ddrmix config done
[0.352584 0.046937] SEC0:  RNG instantiated
[0.374299 0.021715] Normal Boot
[0.374675 0.000376] Trying to boot from MMC2
[1.250580 0.875905] NOTICE:  BL31: v2.4(release):lf-5.10.72-2.2.0-0-g5782363f9
[1.251985 0.001405] NOTICE:  BL31: Built : 08:02:40, Apr 12 2022
[1.522560 0.270575]
[1.522734 0.000174]
[1.522788 0.000054] U-Boot 2021.04-xxxx

After:
[0.000001 0.000001] U-Boot SPL 2021.04-xxxx
[0.001614 0.001614] DDRINFO: start DRAM init
[0.002377 0.000763] DDRINFO: DRAM rate 3000MTS
[0.278494 0.276117] DDRINFO:ddrphy calibration done
[0.279266 0.000772] DDRINFO: ddrmix config done
[0.338432 0.059166] SEC0:  RNG instantiated
[0.339051 0.000619] Normal Boot
[0.339431 0.000380] Trying to boot from MMC2
[0.412587 0.073156] NOTICE:  BL31: v2.4(release):lf-5.15.5-1.0.0-0-g05f788b
[0.414191 0.001604] NOTICE:  BL31: Built : 10:35:26, Apr  6 2022
[0.700685 0.286494]
[0.700793 0.000108]
[0.700845 0.000052] U-Boot 2021.04-xxxx

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-15 15:39:59 +09:00
Loic Poulain
d6ad5a0af9 mmc: Add support for wait_dat0 callback
There is no wait_dat0 mmc ops, causing operations waiting for data
line state change (e.g mmc_switch_voltage) to fallback to a 250ms
active delay. mmc_ops still used when DM_MMC is not enabled, which
is often the case for SPL. The result can be unexpectly long SPL
boot time.

This change adds support for wait_dat0() mmc operation.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-15 15:39:56 +09:00
Patrick Delaunay
d72267049b env: mmc : align erase address and size on erase_grp_size
On eMMC device, the erase_grp_size > 1 so the address and size for the
erase block command in env/mmc.c can be unaligned on erase group size and
some strange trace occurs and the result is not guarantee by MMC devices.

The SD-Card behavior doesn't change as erase_grp_size = 1 for SD-Card.

For example, on eMMC present on STM32MP15C-EV1 and before the patch:

  STM32MP> env erase

  Erasing Environment on MMC...

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x27ff

  16 blocks erased: OK

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x23ff

  16 blocks erased: OK
  OK

After this patch:
  STM32MP> env erase
  Erasing Environment on MMC...
  1024 blocks erased at 0x2000: OK
  1024 blocks erased at 0x2000: OK
  OK

Here the 2 copies of U-Boot environment are in the same devices Erase
group: it is erased twice.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-15 15:34:18 +09:00
Patrick Delaunay
212875e707 mmc: fix error message for unaligned erase request
Fix the end address in the message for unaligned erase request in
mmc_berase() when start + blkcnt is aligned to erase_grp_size.

for example:
  - start = 0x2000 - 26
  - count = 26
  - erase_grp_size = 0x400

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x27ff

But no issue when the end address is not aligned, for example
  - start = 0x2000 - 2 * 26
  - count = 26
  - erase_grp_size = 0x400

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x23ff

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-15 15:34:18 +09:00
Peng Fan
e8780d2380 imx: phycore_imx8mm/p: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
2022-06-14 21:33:14 +02:00
Peng Fan
4152ea24f2 imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14 21:33:14 +02:00
Peng Fan
722e2b9a2b imx: imx8mp_rsb7320a1: enable wdog driver model in SPL
Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
ae75489c48 imx: imx8mn_var_som: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-06-14 21:33:14 +02:00
Peng Fan
cbda080ae9 imx: imx8mn-beacon: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
6692cd967d imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
333a6fa12f imx: engicam-imx8mm: drop unused macro
Drop unused WDOG macro

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-06-14 21:33:14 +02:00
Peng Fan
2d7f40cad5 imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
ee106eda7e imx: imx8mm_beacon: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:13 +02:00
Peng Fan
ca3369df71 configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE
CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace
CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop
CONFIG_SPL_ABORT_ON_RAW_IMAGE.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:13 +02:00
Peng Fan
0a16da8079 imx: kontron-sl-mx8mm: enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14 21:33:13 +02:00
Peng Fan
bb9e14cfd0 imx: imx8mn_var_som: enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
64d118b27f imx: imx8m[m/p]_phycore: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
4ebb9a5898 imx: imx8mm_icore: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
37750505b9 imx: imx8mm-cl-iot-gate: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
d35130fef8 imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mn_beacon
2022-06-14 21:33:13 +02:00
Peng Fan
0e1b54247d imx: drop CONFIG_MXC_UART_BASE
Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL,
the legacy macro no need to be defined.

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Soeren Moch <smoch@web.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-06-14 21:33:13 +02:00
Gaurav Jain
66e54716cf secure boot: enable ARCH_MISC_INIT config.
add ARCH_MISC_INIT to initilaize caam jr driver.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:25:26 +02:00
Andrey Zhizhikin
65d5931d02 clk: imx8mp: use usb_core_ref for usb_root_clk
Upstream commit 7a2c3be95a ("clk: imx8mp: Fill in DWC3 USB, USB PHY,
HSIOMIX clock") added usb_core_ref for USB Controller but never set it
to be used as a clock source, using rather "osc_32k" instead.

This produces following boot log message:
"clk_register: failed to get osc_32k device (parent of usb_root_clk)"

Fix the USB controller clock source by using usb_core_ref instead of
osc_32k.

Fixes: 7a2c3be95a ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:25:26 +02:00
Andrey Zhizhikin
698c0411cf clk: imx8mp: fix root clock names for ecspi
Root clock name contained underscore, which does not match to the actual
clock name.

Correct the name to match what is present in the FDT.

Fixes: 87f958810f ("clk: imx8mp: Add ECSPI clocks")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:25:26 +02:00
Philippe Schenker
a3f2dcf8f4 verdin-imx8mm, verdin-imx8mp: Fix default systemd console output
systemd prints its messages on the last console= statement that it finds
in the kernel arguments. The current ordering sends the systemd messages
to tty1, by default this is the display.

Ensure that systemd sends its messages to the default UART, reorder the
console= statements accordingly.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14 21:25:26 +02:00
Josua Mayer
815216187e mx6cuboxi: enable driver for adin1300 phy
Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300.
Enable the driver so that the new SoMs have functional networking.

Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Josua Mayer
741ce3084e mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS
SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300
at address 1. Because early SoMs had a hardware flaw, the ar8035 can
also appear at address 4 - making it a total of 3 phy nodes in the DTB.

To avoid confusing Linux with probe errors, fixup the dtb to only enable
the phy node that is detected at runtime.

Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Josua Mayer
17baba4682 ARM: dts: imx6qdl-sr-som: add support for alternate phy addresses
The Cubox has an unstable phy address - which can appear at either
address 0 (intended) or 4 (unintended).

SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which
will always appear at address 1.

Change the reg property of the phy node to the magic value 0xffffffff,
which indicates to the generic phy driver that all addresses should be
probed. That allows the same node (which is pinned by phy-handle) to match
either the AR8035 PHY at both possible addresses, as well as the new one
at address 1.
Also add the new adi,phy-output-clock property for enabling the 125MHz
clock used by the fec ethernet controller, as submitted to Linux [1].

Linux solves this problem differently:
For the ar8035 phy it will probe both phy nodes in device-tree in order,
and use the one that succeeds. For the new adin1300 it expects U-Boot to
patch the status field in the DTB before booting

While at it also sync the reset-delay with the upstream Linux dtb.

[1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/

Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Josua Mayer
54337abb14 phy: adin: add support for clock output
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.

Add support for selecting the clock via device-tree properties.

This patch is based on the Linux implementation for this feature,
which has been added to netdev/net-next.git [1].

[2] https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-josua@solid-run.com/

Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Nate Drude
4cc25cd5ce phy: adin: fix broken support for adi, phy-mode-override
Currently, the adin driver fails to compile.

The original patch introducing the adin driver used the function
phy_get_interface_by_name to support the adi,phy-mode-override
property. Unfortunately, a few days before the adin patch
was accepted, another patch removed support for phy_get_interface_by_name:

123ca114e0

This patch refactors adin_get_phy_mode_override, implementing the logic in
the new function, ofnode_read_phy_mode, from the patch above.

Signed-off-by: Nate Drude <nate.d@variscite.com>
Tested-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Fabio Estevam
827ded0e82 imx8mn_evk: Add Ethernet support to the LPDDR4 variant
The imx8mn-ddr4-evk board has Ethernet support already, but the
lpddr4 board does not.

Add Ethernet support for the LPDDR4 variant too.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:25:26 +02:00
Philippe Schenker
0da8dde634 board: apalis-imx8: add new 8gb product variant
Add the new Apalis iMX8 product variant

0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT

the only difference to the product

0037 Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT

is the 8gb of RAM. Toradex strategy to choose the correct RAM timing in
SCFW is by fuses in the user area telling which RAM timing to load.

This commit makes use of this information to set the correct size of
the RAM and therefore distinguish between the new 0067 and 0037 product

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14 21:25:26 +02:00
Philippe Schenker
4941035143 toradex: tdx-cfg-block: add new 8gb apalis-imx8
0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT

This module is identical to its 4GB counterpart
0037: Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT
except for the RAM size.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14 21:25:26 +02:00
Fabio Estevam
e104a9f8eb imx8mn_evk: Add the missing spl.bin entry
The generated flash.bin does not boot the imx8mn evk LPDDR4 variant
as it misses the spl.bin description in binman.

Add its entry to fix the boot on the imx8mn evk LPDDR4 variant.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Arti Zirk <art@zirk.me>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-14 21:25:26 +02:00
Tom Rini
c18e5fb055 dtoc: Update test_src_scan.py for new tegra compatibles
This test was written to match up with the list of compatibles in
drivers/i2c/tegra_i2c.c so adding another one requires the test to be
updated to match.

Fixes: 0d2105ae5e ("arm: tegra: Update some DT compatibles")
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-14 13:59:23 -04:00
Tom Rini
c1d9020cc7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-14 12:59:12 -04:00
Rasmus Villemoes
752bea3ca4 pmic: pca9450: add DM_I2C dependencies in Kconfig
The pca9450 driver uses dm_i2c_{read,write}, which
are (unsurprisingly) only available with DM_I2C. Make sure one can't
create an unbuildable .config by adding proper dependencies.

While here, append "in SPL" to the prompt for the SPL_ variant so it
doesn't read the same as the one for the non-SPL_ variant.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-14 11:20:50 +09:00
Marcel Ziswiler
8f27bf114e board: apalis_t30/tk1/colibri_t20/t30: integrate mac address via dt
Use device tree to set MAC address of the Ethernet chip.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:15 -07:00
Peter Robinson
0d2105ae5e arm: tegra: Update some DT compatibles
Some of the DT compatibles have changed upstream so add new DT compatibles
to ensure things continue to keep working if the device trees are
updated.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:10 -07:00
Peter Robinson
b5cf255f73 pci: tegra: Update error prints with new lines
Add new lines to make errorr messages easier to read.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:00 -07:00
Peter Robinson
5b060e465e ARM: tegra: XUSB padctl: Add new lines for errors
Add new lines for error messages to make them easier to read.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:00 -07:00
Tom Rini
92a8bc6b41 Merge tag 'efi-2022-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc5

UEFI:

* Ignore OsIndications if CONFIG_EFI_IGNORE_OSINDICATIONS=y
* Correct UEFI default binary name
* Let efidebug create boot options without file path
* Support booting with a boot option with shortened device only device path
2022-06-13 09:33:37 -04:00
Heinrich Schuchardt
72fa9cd59e efi_loader: create boot options without file path
Allow the efidebug command to create boot options without file path, e.g.

    efidebug boot add -b 0001 'short dev only' host 0:1 ''
    efidebug boot add -B 0002 'long dev only' host 0:1 ''

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-12 13:02:34 +02:00
Heinrich Schuchardt
178667b34b efi_loader: allow booting from short dev only DP
Allow booting from a short form device-path without file path, e.g.

    /HD(1,GPT,5ef79931-a1aa-4c70-9d67-611e8f69eafd,0x800,0x1000)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-12 09:17:54 +02:00
Heinrich Schuchardt
3a0654ecd0 efi_loader: correctly identify binary name
Only on the sandbox the default EFI binary name (e.g. BOOTX64.EFI) must
match the host architecture.

In all other cases we must use the target architecture.

Use #elif where appropriate.

Reported-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Sughosh Ganu
556a12654a EFI: FMP: Use a common GetImageInfo function for FIT and raw images
The GetImageInfo function definitions for the FIT images and raw
images are the same. Use a common function for the both the Firmware
Management Protocol(FMP) instances for raw and FIT images.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Sughosh Ganu
119fafdefb EFI: Do not consider OsIndications variable if CONFIG_EFI_IGNORE_OSINDICATIONS is enabled
The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
mechanism to have capsule updates work even on platforms where the
SetVariable runtime service was not supported. The current logic
requires the OsIndications variable to have been set to a 64 bit value
even when the EFI_IGNORE_OSINDICATIONS config is enabled. Return an
error code on not being able to read the variable only when
EFI_IGNORE_OSINDICATIONS is not enabled.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-12 09:17:54 +02:00
Tom Rini
a87a6fcd20 Merge branch '2022-06-10-assorted-platform-updates' into next
- TI J721E hyperflash support, TI OMAP3 updates, TI AM654 updates,
  TI AM62 initial support, Broadcom bcmbca 47622 SoC support, NPCM7xx
  pinctrl and rng drivers, Synquacer updates
2022-06-10 16:02:42 -04:00
Vignesh Raghavendra
e16aac3b73 doc: ti: Add readme for AM62x SK
Add info of boot flow and build steps for AM62x SK.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2022-06-10 13:37:33 -04:00
Vignesh Raghavendra
2d257d9279 configs: Add configs for AM62x SK
Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for
A53 SPL and U-Boot support.

To keep the changes to minimum. Only UART And SD boot related configs
are included. This should serve as good starting point for new board
bringup with AM62x.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[trini: Migrate a number of CONFIG symbols, have re-tested]
Tested-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:33 -04:00
Nishanth Menon
3e48d37f48 arm: dts: Add support for AM62-SK
AM62 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM625 SoC. It supports the following interfaces:
* 2 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 HDMI Port with audio + x1 OLDI/LVDS Display interface for Dual Display
* x1 Headphone Jack
* x1 USB2.0 Hub with two Type A host and x1 USB Type-C DRP Port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x4 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 20-pin header for Programmable Realtime Unit (PRU) IO pins
* 15-pin CSI header

Add basic support for AM62-SK.

To keep the changes to minimum. Only UART And SD are supported at the
moment. This should serve as good example for adding new board support
based on AM62x SoC

Schematics: https://www.ti.com/lit/zip/sprr448

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:33 -04:00
Suman Anna
900349b7dd board: ti: Introduce the basic files to support AM62 SK board
Add basic support for AM62 SK. This has 2GB DDR.
Note that stack for R5 SPL is in OCRAM @ 0x7000ffff so that is away from
BSS and does not step on BSS section

Add only the bare minimum required to support UART and SD.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:33 -04:00
Suman Anna
1b2f4697c0 arm: dts: Introduce base AM62 SoC dtsi files
Introduce the basic AM62 SoC description dtsi files describing most
peripherals as per kernel dts.

Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:33 -04:00
Vignesh Raghavendra
7e9e386773 firmware: ti_sci_static_data: add static DMA chan data
Add range of DMA channels available for R5 SPL usage before DM firmware
is loaded.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
Vignesh Raghavendra
720d37ff27 dma: ti: Add PSIL data for AM62x DMASS
Add PSIL data for AM62x SoC.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
Suman Anna
4b8903a999 arm: mach-k3: am62: Introduce autogenerated SoC data
Introduce autogenerated SoC data support clk and device data for the
AM62. Hook it upto to power-domain and clk frameworks of U-Boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
Suman Anna
d98e860051 arm: mach-k3: Introduce the basic files to support AM62
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC
architecture platform, providing ultra-low-power modes, dual display,
multi-sensor edge compute, security and other BOM-saving integration.
The AM62 SoC targets broad market to enable applications such as
Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building
Automation, Appliances and more.

Some highlights of this SoC are:

* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
  Pin-to-pin compatible options for single and quad core are available.
* Cortex-M4F for general-purpose or safety usage.
* Dual display support, providing 24-bit RBG parallel interface and
  OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
  resolution.
* Selectable GPUsupport, up to 8GFLOPS, providing better user experience
  in 3D graphic display case and Android.
* PRU(Programmable Realtime Unit) support for customized programmable
  interfaces/IOs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
  external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
  1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized System Controller for Security, Power, and
  Resource Management.
* Multiple low power modes support, ex: Deep sleep,Standby, MCU-only,
  enabling battery powered system design.

AM625 is the first device of the family. Add DT bindings for the same.

More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:32 -04:00
Suman Anna
4298ee7e40 soc: ti: k3-socinfo: Add entry for AM62X SoC family
Add support for AM62x SoC identification.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:32 -04:00
Suman Anna
8a6d273343 dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62
Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
 done for other similar platforms.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
Aswath Govindraju
ed6d781469 drivers: mmc: am654_sdhci: Add new compatible for AM62 SoC
The phy used in the 8 bit instance has been changed to the phy used in 4
bit instance on AM62 SoC. This implies the phy configuration required for
both the instances of mmc are similar. Therefore, add a new compatible
for AM62 SoC using the driver data of am64 4 bit instance.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-10 13:37:32 -04:00
Jim Liu
866eab1d28 rng: nuvoton: Add NPCM7xx rng driver
Add Nuvoton BMC NPCM750 rng driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-10 13:37:32 -04:00
Aswath Govindraju
b5d3625f27 configs: am65_evm_r5_usb*_defconfig: Sync the checks for size of image and stack from generic r5 defconfig
Sync the configs required for enabling checks for size of image and stack
from generic r5 defconfig file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10 13:37:32 -04:00
Aswath Govindraju
36dafd8045 arm: mach-k3: am6_init: Fix the path and value's length in the fixup performed for usb boot
The node name of the bus in the device tree has changed. Also, the length
argument to be passed should be the length of new value. Therefore, fix the
path to usb device tree node as well as the length argument passed.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10 13:37:32 -04:00
Aswath Govindraju
750d8470cb arm: dts: k3-am654-r5-base-board: Fix the dt properties in usb0 instance
For dfu boot mode, the clocks property needs to be deleted and dr_mode
needs to be set to peripheral. Therefore, add the required fixes for the
same.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10 13:37:32 -04:00
Masahisa Kojima
f81aaa0b33 spi: synquacer: simplify tx completion checking
There is a TX-FIFO and Shift Register empty(TFES) status
bit in spi controller. This commit checks the TFES bit
to wait the TX transfer completes.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10 13:37:32 -04:00
Masahisa Kojima
de9f2c9c2e spi: synquacer: DMSTART bit must not be set while transferring
DMSTART bit must not be set while there is active transfer.
This commit sets the DMSTART bit only when the transfer begins.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10 13:37:32 -04:00
Masahisa Kojima
88d50ed8a1 spi: synquacer: wait until slave is deselected
synquacer_cs_set() function does not wait the chip select
is deasserted when the driver sets the DMSTOP to deselect
the slave.
This commit checks the Slave Select Released(SRS) bit to wait
until the slave is deselected.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10 13:37:32 -04:00
Masahisa Kojima
29d382b94e spi: synquacer: busy variable must be initialized before use
"busy" variable is ORed without being initialized,
must be zeroed before use.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10 13:37:32 -04:00
Jim Liu
f49d616bea pinctrl: nuvoton: Add NPCM7xx pinctrl driver
Add Nuvoton BMC NPCM750 Pinmux and Pinconf support.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-10 13:37:32 -04:00
Derald D. Woods
d7116ca1d0 ARM: omap3: evm: Fix 'fitImage' booting
This commit sets two additional variables in the default BOOTCOMMAND.
Adding 'boot=mmc' and 'addr_fit=0x8b000000' removes the need for a
special 'uEnv.txt' to be created. The 'addr_fit' variable is the key
piece here. It is normally defined as 0x90000000, in the macro
DEFAULT_FIT_TI_ARGS. For this OMAP34XX board, 0x8b000000 works without
touching other varibles. This was tested with a 'fitImage' created
using the following FIT source:

----------------------------------------------------------------------
/dts-v1/;

/ {
	description = "Simple image with single Linux kernel and FDT blob";
	#address-cells = <1>;

	images {
		kernel {
			description = "Linux kernel: omap2plus";
			data = /incbin/("./zImage");
			type = "kernel";
			arch = "arm";
			os = "linux";
			compression = "none";
			load = <0x80008000>;
			entry = <0x80008000>;
			hash-1 {
				algo = "sha256";
			};
		};
		fdt-omap3-evm.dtb {
			description = "FDT: omap3-evm.dtb";
			data = /incbin/("./omap3-evm.dtb");
			type = "flat_dt";
			arch = "arm";
			compression = "none";
			load = <0x8ff00000>;
			hash-1 {
				algo = "sha256";
			};
		};
	};

	configurations {
		default = "conf-omap3-evm.dtb";
		conf-omap3-evm.dtb {
			description = "Boot Linux kernel with FDT blob";
			kernel = "kernel";
			fdt = "fdt-omap3-evm.dtb";
		};
	};
};
----------------------------------------------------------------------

Additionally, the default environment is now stored in "uboot.env" on
the FAT partition of MMC '0'.

Fixes: 11e2ab3f0b ("ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS")
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10 13:37:32 -04:00
Derald D. Woods
25d629b603 ARM: omap3: evm: Complete DM_I2C migration
This commits enables DM_I2C and sets the default bus to 0.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10 13:37:32 -04:00
Derald D. Woods
161535444b ARM: omap3: evm: Power on MMC when setting up PMIC
This commit copies the related code changes from the BeagleBoard.

Reference:
- 848cfe098f

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10 13:37:32 -04:00
William Zhang
f8209d3051 arm: bcmbca: introduce the bcmbca architecture and 47622 SOC
This is the initial support for Broadcom's ARM-based 47622 SOC.

In this change, our first SOC is an armv7 platform called 47622. The
initial support includes a bare-bone implementation and dts with ARM
PL011 uart.

The SOC-specific code resides in arch/arm/mach-bcmbca/<soc> and board
related code is in board/broadcom/bcmba.

The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-06-10 13:37:32 -04:00
Vaishnav Achath
d7ef2ef7c8 configs: j721e_evm_defconfig: Add HBMC related configs
Enable HBMC and HyperFlash in R5SPL, A72 SPL and A72 U-Boot

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[trini: Update j721e_hs_evm_a72 as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:36:58 -04:00
Vaishnav Achath
66a33f41e9 ti: j721e: enable hyperflash spl fixup for j721e
On j721e, its not possible to use OSPI0 and HBMC simultaneously as they
are muxed within the Flash Subsystem hence disable HBMC by default and
keep OSPI enabled. Bootloader will fixup DT when it detects HyperFlash
mux selection instead of OSPI.

Also updated detect_enable_hyperflash to use correct GPIO when checking
hypermux selection state:
* J7200 - hypermux sel connected to WKUP_GPIO0_6
* J721E - hypermux·sel·connected·to·WKUP_GPIO0_8

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
d45ccab483 configs: j721e_evm.h: define CONFIG_SYS_FLASH_BASE
Define CONFIG_SYS_FLASH_BASE to indicate start address of
Flash memory

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
09d14d7f10 arm: k3: sysfw-loader: add hyperflash support
add support for loading system firmware from hyperflash.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
8fceb0edf4 arm: dts: k3-j721e-common-proc-board: enable hyperflash mux sel GPIO
Add wkup_gpio pinmux setting which will be used for performing the
DT fixup for hbmc node according to mux selection state, on J721E
EVM, hypermux sel is tied to ·WKUP_GPIO0_8.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
fa4f5aabae arm: dts: k3-j721e-common-proc-board-u-boot: enable HyperFlash in SPL
add u-boot,dm-spl pre-relocation property to enable hbmc in SPL.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
30426492d3 arm: dts: k3-j721e-r5-common-proc-board: Add HyperFlash node
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node
for the same.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
cbd7790a69 arm: dts: k3-j721e-som-p0: Add HyperFlash node
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node
for the same.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Vaishnav Achath
297daac43a arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node
Add DT node for HyperBus Memory Controller and hbmc-mux in the
FSS. hbmc-am654 driver uses syscon_get_regmap() call which fails
with current compatible setting.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Tom Rini
e5028bb227 Merge branch '2022-06-09-add-support-for-nvmem-api' into next
To quote the author:
This adds support for the nvmem-cells properties cropping up in manyb
device trees. This is an easy way to load configuration, version
information, or calibration data from a non-volatile memory source. For
more information, refer to patch 6 ("misc: Add support for nvmem
cells").

For the moment I have only added some integration tests using the
ethernet addresses. This hits the main code paths (looking up nvmem
cells) but doesn't test writing. I can add a few stand-alone tests if
desired.
2022-06-09 15:20:11 -04:00
Sean Anderson
3f51ba926b test: Load mac address using misc device
This loads a mac address using a misc device using the nvmem interface.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 14:00:22 -04:00
Sean Anderson
d3f7287849 test: Load mac address using RTC
This uses the nvmem API to load a mac address from an RTC.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 14:00:22 -04:00
Sean Anderson
472caa69e3 test: Load mac address with i2c eeprom
This uses an i2c eeprom to load a mac address using the nvmem interface.
Enable I2C_EEPROM for sandbox SPL since it is the only sandbox config
which doesn't enable it eeprom.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 14:00:22 -04:00
Sean Anderson
97d0f9bfdd net: Add support for reading mac addresses from nvmem cells
This adds support for reading mac addresses from the "mac-address" nvmem
cell. If there is no (local-)mac-address property, then we will try
reading from an nvmem cell.

For some existing examples of this property, refer to imx8mn.dtsi and
imx8mp.dtsi. Unfortunately, fuse drivers have not yet been converted
to DM.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 14:00:22 -04:00
Sean Anderson
185d3db7be sandbox: Enable NVMEM
This enables NVMEM for all sandbox defconfigs, enabling it to be used in
unit tests in the next few commits.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 14:00:22 -04:00
Sean Anderson
c8ce7ba87d misc: Add support for nvmem cells
This adds support for "nvmem cells" as seen in Linux. The nvmem device
class in Linux is used for various assorted ROMs and EEPROMs. In this
sense, it is similar to UCLASS_MISC, but also includes
UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding
to a Linux-style nvmem device should be implemented as one of the
previously-mentioned uclasses. The nvmem API acts as a compatibility
layer to adapt the (slightly different) APIs of these uclasses. It also
handles the lookup of nvmem cells.

While nvmem devices can be accessed directly, they are most often used
by reading/writing contiguous values called "cells". Cells typically
hold information like calibration, versions, or configuration (such as
mac addresses).

nvmem devices can specify "cells" in their device tree:

	qfprom: eeprom@700000 {
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x00700000 0x100000>;

		/* ... */

		tsens_calibration: calib@404 {
			reg = <0x404 0x10>;
		};
	};

which can then be referenced like:

	tsens {
		/* ... */
		nvmem-cells = <&tsens_calibration>;
		nvmem-cell-names = "calibration";
	};

The tsens driver could then read the calibration value like:

	struct nvmem_cell cal_cell;
	u8 cal[16];
	nvmem_cell_get_by_name(dev, "calibration", &cal_cell);
	nvmem_cell_read(&cal_cell, cal, sizeof(cal));

Because nvmem devices are not all of the same uclass, supported uclasses
must register a nvmem_interface struct. This allows CONFIG_NVMEM to be
enabled without depending on specific uclasses. At the moment,
nvmem_interface is very bare-bones, and assumes that no initialization
is necessary. However, this could be amended in the future.

Although I2C_EEPROM and MISC are quite similar (and could likely be
unified), they present different read/write function signatures. To
abstract over this, NVMEM uses the same read/write signature as Linux.
In particular, short read/writes are not allowed, which is allowed by
MISC.

The functionality implemented by nvmem cells is very similar to that
provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does
not seem to have made its way into Linux or into any device tree other
than sandbox. It is possible that with the introduction of this API it
would be possible to remove it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 14:00:22 -04:00
Sean Anderson
42f477f0ab misc: i2c_eeprom: Add fallbacks
Add some fallback functions for when i2c_eeprom is disabled. This allows
code to reference i2c_eeprom_* functions without needing to check
whether support has been compiled in.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 13:59:53 -04:00
Sean Anderson
dda3b38920 misc: i2c_eeprom: Make i2c_eeprom_write use a const buf
i2c_eeprom_ops->write uses a const buf, so use one for the wrapper
function as well.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:53 -04:00
Sean Anderson
2a5af4049c net: dsa: Fix segmentation fault if master fails to probe
If the DSA master fails to probe for whatever reason, then DSA devices
will continue on as if nothing is wrong. This can cause incorrect
behavior. In particular, on sandbox, dsa_sandbox_probe attempts to
access the master's private data. This is only safe to do if the master
has been probed first. Fix this by probing the master after we look it
up, and bailing out if we get an error.

Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-06-08 13:59:53 -04:00
Sean Anderson
e844e5d908 sandbox: Move some mac addresses to device tree
This prevents some conflicts when running sandbox with -D, since the
"rom" mac address will be random and won't match the environment. We
still need to keep addresses for eth1 and eth6 in the environment,
because dm_test_eth_rotate expects to be able to disable them by
removing their envaddr variables. This can likely be fixed in a future
series by adding a function to cause sandbox eth_opts callback for a
particular mac to fail immediately.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:52 -04:00
Sean Anderson
29186884f8 sandbox: Remove eth2addr from environment
DSA interfaces use the same mac address for each interface, unless
instructed otherwise. Just set eth4addr and let eth2addr and eth7addr be
set automatically.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:52 -04:00
Sean Anderson
416e09b906 sandbox: net: Remove fake-host-hwaddr
Instead of reading a pseudo-rom mac address from the device tree, just use
whatever we get from write_hwaddr. This has the effect of using the mac
address from the environment (or from the device tree, if it is
specified).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-06-08 13:59:52 -04:00
Sean Anderson
df33fd2889 test: eth: Add test for ethernet addresses
This adds a test to make sure that all the ethernet interfaces have
their addresses read properly. At the moment everything is read from the
environment, but the next few commits will add additional sources.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:52 -04:00
Sean Anderson
469a968ac7 sandbox: net: Add mac address for eth8 to environment
The phy_eth0 interface introduced in commit f3dd213e15 ("net: introduce
helpers to get PHY ofnode from MAC") uses a globally-administered
address. Switch to using a locally-administered address, and add it to
the sandbox environment, like the others.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 13:59:52 -04:00
Sean Anderson
bedb182e32 sandbox: net: Add aliases for ethernet devices
Commit f3dd213e15 ("net: introduce helpers to get PHY ofnode from MAC")
changed the ethernet sequence assignment from

uclass 36: ethernet
0   * eth@10002000 @ 05813460, seq 0
1   * eth@10003000 @ 05813550, seq 5
2   * sbe5 @ 05813640, seq 3
3   * eth@10004000 @ 05813730, seq 6
4   * dsa-test-eth @ 05813820, seq 4
5   * lan0 @ 05813a30, seq 2
6   * lan1 @ 05813b50, seq 7

to

uclass 36: ethernet
0   * eth@10002000 @ 03813630, seq 0
1   * eth@10003000 @ 03813720, seq 5
2   * sbe5 @ 03813810, seq 3
3   * eth@10004000 @ 03813900, seq 6
4     phy-test-eth @ 038139f0, seq 7
5   * dsa-test-eth @ 03813ae0, seq 4
6   * lan0 @ 03813cf0, seq 2
7   * lan1 @ 03813e10, seq 8

This caused the mac address assignment to switch around. Avoid this in
the future by assigning aliases for all ethernet devices. This reverts
the sequence to what it was before the aformentioned commit (with
phy-test-eth as seq 8). There is no ethernet1 for whatever reason.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 13:59:52 -04:00
Tom Rini
c0e63bf468 Merge branch '2022-06-08-virtio-harden-and-test-vring' into next
To quote the author:
Make the virtio ring code resilient against corruption of the buffers
shared with the device.

It follows the example of Linux by keeping a private copy of the
descriptors and metadata for state tracking and only ever writing to the
descriptors that are shared with the device. I was able to test these
hardening steps in the sandbox by simulating device writes to the
queues.
2022-06-08 11:15:28 -04:00
Andrew Scull
d036104a02 test: dm: virtio_rng: Test virtio-rng with faked device
Add a regression test for virtio-rng reading beyond the end of its
buffer if the virtio device provides an invalid length.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:04 -04:00
Andrew Scull
43937a4f5e virtio: rng: Check length before copying
Check the length of data written by the device is consistent with the
size of the buffers to avoid out-of-bounds memory accesses in case
values aren't consistent.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:04 -04:00
Andrew Scull
420b3e51f4 test: dm: virtio: Test virtio device driver probing
Once the virtio-rng driver has been bound, probe it to trigger the pre
and post child probe hooks of the virtio uclass driver. Check the status
of the virtio device to confirm it reached the expected state.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:04 -04:00
Andrew Scull
acd3b27a65 virtio: sandbox: Bind RNG rather than block device
The virtio-rng driver is extremely simple, making it suitable for
testing more of the virtio uclass logic. Have the sandbox driver bind
the virtio-rng driver rather than the virtio-blk driver so it can be
used in tests.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:04 -04:00
Andrew Scull
8df508ff3d test: dm: virtio: Split out virtio device tests
Virtio tests that find a child device require the virtio device driver
to be included in the build so it can probe. The sandbox virtio
transport driver currently reports a virtio-blk device so make sure the
corresponding driver is built before running tests that need it.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-06-08 09:24:04 -04:00
Andrew Scull
82c8610a44 test: dm: virtio: Test notify before del_vqs
The virtqueue is passed to virtio_notify() so move the virtqueue
deletion to the end of the test when it's no longer needed. This wasn't
causing any problems because the sandbox virtio transport driver doesn't
do anything for notifications, but it could cause problems if things
change and it was a bad example.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:04 -04:00
Andrew Scull
1674b6c4d8 virtio: sandbox: Fix device features bitfield
The virtio sandbox transport was setting the device features value to
the bit index rather than shifting a bit to the right index. Fix this
using the bit manipulation macros.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:03 -04:00
Andrew Scull
b1fe820b63 dm: test: virtio: Test the virtio ring
The virtio ring is the basis of virtio communication. Test its basic
functionality and its resilience against corruption from the device.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:03 -04:00
Andrew Scull
fbef3f53d4 virtio_ring: Check used descriptors are chain heads
When the device returns used buffers, it should refer to the descriptor
that is the head of the descriptor chain for that buffer. Confirm this
to be the case by tracking the head of descriptor chains that have been
made available to the device.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:03 -04:00
Andrew Scull
10a1453636 virtio_ring: Maintain a shadow copy of descriptors
The shared descriptors should only be written by the guest driver,
however, the device is still able to overwrite and corrupt them.
Maintain a private shadow copy of the descriptors for the driver to
use for state tracking, removing the need to read from the shared
descriptors.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:03 -04:00
Andrew Scull
b0952977c9 virtio_ring: Add helper to attach vring descriptor
Move the logic for attaching a descriptor to its own function.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 09:24:03 -04:00
Andrew Scull
68f8bf21c7 virtio_ring: Merge identical variables
The variables `total_sg` and `descs_used` have the same value. Replace
the few uses of `total_sg` with `descs_used` to simplify the situation.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-06-08 09:24:03 -04:00
Tom Rini
57bd363de7 Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- MediaTek XHCI bugfix, add  USB251xB/xBi driver
2022-06-08 08:25:30 -04:00
Tom Rini
ed1cbbe2af Merge branch '2022-06-07-assorted-improvements' into next
- A wide ranging set of minor clean-ups and improvements
2022-06-07 12:21:57 -04:00
Marek Vasut
02544db9a7 misc: Port USB251xB/xBi Hi-Speed Hub Controller Driver from Linux
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.

This is ported from Linux as of Linux kernel commit
5c2b9c61ae5d8 ("usb: usb251xb: add boost-up property support")

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
2022-06-07 16:14:20 +02:00
Tom Rini
6530de23e9 Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- Fix SPL build with watchdog disabled in asm files (Pali)
2022-06-07 08:17:24 -04:00
Tom Rini
d9ad48464c Merge tag 'xilinx-for-v2022.07-rc4-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc4-v2

- Fix revision name (remove spaces)
2022-06-07 08:17:08 -04:00
Chunfeng Yun
fe8e8af36c usb: xhci-mtk: disable all ports when disable host controller
This is used to avoid the ports status of IPPC being brought in kernel
stage, it may cause ports error especially when the xhci controller is
a component of dual-role controller.

Reported-by: Yun-Chien Yu <yun-chien.yu@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2022-06-07 09:55:57 +02:00
Pali Rohár
06ceff70bf watchdog: Fix SPL build with watchdog disabled in asm files
Allow to compile assembler files in SPL build which calls WATCHDOG_RESET
function when watchdog is disabled in SPL and enabled in U-Boot proper.

This issue was fixed in past by commit 7fbd42f5af ("watchdog: Handle SPL
build with watchdog disabled") for C source files, but not for assembler
source files.

Currently the only assembler source file which calls WATCHDOG_RESET is
arch/powerpc/lib/ticks.S, so this patch affects and fixes powerpc SPL
builds.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-07 08:45:35 +02:00
Pali Rohár
b62450cf22 serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE)
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.

For ns16550 driver this support is there since commit d293759d55
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-06 18:01:21 -04:00
Pierre-Clément Tosi
24272ffd50 qfw: Don't fail if setup data size is 0
Skip missing setup data (which is valid) rather than failing with an
error.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Andrew Walbran <qwandor@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2022-06-06 18:01:21 -04:00
Pali Rohár
b257c4e906 ubifs: Add missing dependency on GZIP
GZIP option can be manually de-selected when UBIFS is enabled. This cause
following compile error because ubifs calls gzip functions.

  /tmp/ccxVrh2c.ltrans1.ltrans.o: in function `gzip_decompress.lto_priv.566':
  <artificial>:(.text+0x768): undefined reference to `zunzip'
  collect2: error: ld returned 1 exit status
  make: *** [Makefile:1813: u-boot] Error 1

So add missing dependency on GZIP.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-06 18:01:21 -04:00
Michael Trimarchi
98303ce73d include/configs: Remove rootwait=1 to all the affected boards
rootwait=1 is not a valid kernel boot parameters. According
to the documenation is only rootwait

rootwait	[KNL]	Wait (indefinitely) for root device to show up.
			Useful for devices that are detected asynchronously
			(e.g. USB and MMC devices).

Fix:
Unknown kernel command line parameters "rootwait=1", will be passed to user space.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-06-06 18:01:21 -04:00
Rasmus Villemoes
e5e04eaa2f common/board_r.c: drop legacy and unused bi_enetaddr
The bi_enetaddr field in struct bd_info is write-only; nothing ever
reads back the value.

Moreover, the value we write is more or less random, and certainly not
something one can rely on: If the board has a writable environment and
the mac address has been stored there, we fetch that value. But if the
board doesn't, this code runs before initr_net() -> eth_initialize(),
and thus before the code in eth-uclass which fetches MAC addresses
from eeprom, fuses or whatnot and populates the (run-time) environment
with those values.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-06 18:01:21 -04:00
Sean Anderson
ba9aa40bb3 bootm: Fix Linux silent console on newer kernels
Linux determines its console based on several sources:

1. the console command line parameter
2. device tree (e.g. /chosen/stdout-path)
3. various other board- and arch-specific sources

If the console parameter specifies a real console (e.g. ttyS0) then that is
used as /dev/console. However, if it does not specify a real console (e.g.
ttyDoesntExist) then *nothing* will be used as /dev/console.
Reading/writing it will return ENODEV. Additionally, no other source will
be used as a console source.

Linux commit ab4af56ae250 ("printk/console: Allow to disable console output
by using console="" or console=null") recently changed the semantics of the
parameter. Previously, specifying console="" would be treated like
specifying some other bad console. This commit changed things so that it
added /dev/ttynull as a console (if available).  However, it also allows
for other console sources. If the device tree specifies a console (such as
if U-Boot and Linux share a device tree), then it will be used in addition
to /dev/ttynull. This can result in a non-silent console.

To avoid this, explicitly set ttynull as the console. This will disable
other console sources. If CONFIG_NULL_TTY is disabled, then this will have
the same behavior as in the past (no output, and writing /dev/console
returns ENODEV).

[1] and [2] have additional background on this kernel change.

[1] https://lore.kernel.org/all/20201006025935.GA597@jagdpanzerIV.localdomain/
[2] https://lore.kernel.org/all/20201111135450.11214-1-pmladek@suse.com/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 18:01:21 -04:00
Pierre-Clément Tosi
f2ebaaa9f3 pci: Handle failed calloc in decode_regions()
Add a check for calloc() failing to allocate the requested memory.

Make decode_regions() return an error code.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-06 18:01:21 -04:00
Rasmus Villemoes
26f981f295 fdtdec: drop needlessly convoluted CONFIG_PHANDLE_CHECK_SEQ
Asking if the alias we found actually points at the device tree node
we passed in (in the guise of its offset from blob) can be done simply
by asking if the fdt_path_offset() of the alias' path is identical to
offset.

In fact, the current method suffers from the possibility of false
negatives: dtc does not necessarily emit a phandle property for a node
just because it is referenced in /aliases; it only emits a phandle
property for a node if it is referenced in <angle brackets>
somewhere. So if both the node we passed in and the alias node we're
considering don't have phandles, fdt_get_phandle() returns 0 for both.

Since the proper check is so simple, there's no reason to hide that
behind a config option (and if one really wanted that, it should be
called something else because there's no need to involve phandle in
the check).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-06 18:01:21 -04:00
Judy Wang
05947cb1d8 drivers:optee:rpmb: initialize drivers of mmc devices in UCLASS_BLK for rpmb access
CONFIG_MMC only initializes drivers for devices in UCLASS_MMC, we need
to initialize drivers for devices of type IF_TYPE_MMC in UCLASS_BLK as
well because they are the child devices of devices in UCLASS_MMC.  This
is required for feature RPMB since it will access eMMC in optee-os.

Signed-off-by: Judy Wang <wangjudy@microsoft.com>
[trini: Add my SoB line and adjust Judy's name in git, having emailed
off-list]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 18:01:21 -04:00
Sean Anderson
fb84517d52 serial: smh: Fake tstc
ARM semihosting provides no provisions for determining if there is
pending input. The only way to determine if there is console input is to
do a read (and block until the user types something). For this reason,
we always return true for tstc (since you will always get input if you
try). However, this behavior can cause problems for code which expects
tstc to eventually be empty. In query_console_serial, there is the
following construct:

	/* empty input buffer */
	while (tstc())
		getchar();

with the current implementation, this effectively turns into an infinite
loop. To avoid this, fake tstc by returning false half of the time. This
is generally OK because the other common construct looks like

	do {
		if (tstc())
			process(getchar());
	} while (!timeout());

so it's fine if we only read a new character every other loop. This will
break things like CYGACC_COMM_IF_GETC_TIMEOUT, but that could be
reworked to test on the timeout instead of calling tstc again (and
ymodem over semihosted serial is not that useful in the first place).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 18:01:21 -04:00
Patrick Delaunay
bc8e09811e dm: core: convert of_machine_is_compatible to livetree
Replace in the function of_machine_is_compatible(), the used API
fdt_node_check_compatible() by ofnode_device_is_compatible()
to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-06 18:01:21 -04:00
Sean Anderson
87b0af9317 mkimage: Support signing 'auto' FITs
This adds support for signing images in auto-generated FITs. To do this,
we need to add a signature node. The algorithm name property already has
its own option, but we need one for the key name hint. We could have
gone the -G route and added an explicit name for the public key (like
what is done for the private key). However, many places assume the
public key can be constructed from the key dir and hint, and I don't
want to do the refactoring necessary.

As a consequence of this, it is now easier to add public keys to an
existing image without signing something. This could be done all along,
but now you don't have to create an its just to do it. Ideally, we
wouldn't create a FIT at the end. This could be done by calling
fit_image_setup_sig/info.crypto->add_verify_data directly.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 18:01:20 -04:00
Sean Anderson
5920e5c838 mkimage: Document more misc options
Document -G and the secondary image types which can be used with -R.
Also reword the documentation of -s for clarity.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 18:01:20 -04:00
Ovidiu Panait
cebc816170 event: fix static events for CONFIG_NEEDS_MANUAL_RELOC
Static events do not currently work post-relocation for boards that enable
CONFIG_NEEDS_MANUAL_RELOC. Relocate event handler pointers for all event
spies to fix this.

Tested on Microblaze.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
2022-06-06 18:01:20 -04:00
Ovidiu Panait
12c90955a7 event: remove CONFIG_EVENT_DYNAMIC check in event_register()
The whole event_register() function is wrapped in EVENT_DYNAMIC #ifdef
checks, so the inner check is not needed:

 #if CONFIG_IS_ENABLED(EVENT_DYNAMIC)
 ...
 int event_register(...)
 {
     ...
     if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC))
         return -ENOSYS;
 }
 #endif

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
2022-06-06 17:47:17 -04:00
Pali Rohár
b4d3b338df mtd: mtdpart: Change size type from fdt_addr_t to fdt_size_t
Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
function. It expects fdt_size_t * and not fdt_addr_t *.

When these two types do not have same size then U-Boot throw compile
warning:

    drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’:
    drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types]
       offset = ofnode_get_addr_size_index_notrans(child, 0, &size);
                                                             ^~~~~
    In file included from include/dm/device.h:13,
                     from include/linux/mtd/mtd.h:26,
                     from include/ubi_uboot.h:28,
                     from drivers/mtd/mtdpart.c:27:
    include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’}
                 fdt_size_t *size);
                 ~~~~~~~~~~~~^~~~

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-06-06 17:47:17 -04:00
Pierre-Clément Tosi
b6c2b25f64 scripts: Introduce {quiet_,}cmd_bin2c
Add a make command to compile binary files as C data through bin2c with

    $(call,bin2c,<data_name_prefix>)

Note that this requires BUILD_BIN2C=y.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2022-06-06 17:47:17 -04:00
Heinrich Schuchardt
84378d5c86 fs/squashfs: fix sqfs_read_sblk()
Setting sblk = NULL has no effect on the caller.
We want to set *sblk = NULL if an error occurrs to avoid usage after free.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-06 17:47:17 -04:00
Heinrich Schuchardt
89ab1e2817 btrfs: simplify lookup_data_extent()
After returning if ret <= 0 we know that ret > 0. No need to check it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Anand Jain <anand.jain>
2022-06-06 17:47:17 -04:00
Tom Rini
2e2e784de0 zlib: Port fix for CVE-2018-25032 to U-Boot
While our copy of zlib is missing upstream commit 263b1a05b04e ("Allow
deflatePrime() to insert bits in the middle of a stream.") we do have
Z_FIXED support, and so the majority of the code changes in 5c44459c3b28
("Fix a bug that can crash deflate on some input when using Z_FIXED.")
apply here directly and cleanly.  As this has been assigned a CVE, lets
go and apply these changes.

Link: 5c44459c3b
Reported-by: "Gan, Yau Wai" <yau.wai.gan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 17:47:17 -04:00
Tom Rini
8a1ab5e811 misc: Correct Kconfig dependencies for a number of options
We have many cases of SPL (or TPL or VPL) drivers that don't depend on
SPL_MISC (and so on) but rather just MISC.

Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 17:47:17 -04:00
Chris Packham
92c1df98b3 doc: regulator: Add regulator-force-boot-off binding
The actual support was added in commit fec8c900c8 ("power: regulator:
Add support for regulator-force-boot-off"), update the docs to include
this.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2022-06-06 17:47:16 -04:00
Ovidiu Panait
7f0836a110 cmd: dm: migrate dm command to use U_BOOT_CMD_WITH_SUBCMDS()
Migrate dm command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to reduce
duplicated code. We can also drop the CONFIG_NEEDS_MANUAL_RELOC exception,
as the command list is updated post relocation in board_r.c initcall
initr_manual_reloc_cmdtable().

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
2022-06-06 17:47:16 -04:00
Heinrich Schuchardt
c5ef202557 dm: fix DM_EVENT dependencies
CONFIG_DM_EVENT without CONFIG_EVENT is non-functional.
Let CONFIG_DM_EVENT depend on CONFIG_EVENT.

Remove superfluous stub in include/event.h.

Fixes: 5b896ed585 ("event: Add events for device probe/remove")
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-06 17:47:16 -04:00
Peng Fan
3800b318c5 boot: image-pre-load: drop unused CONFIG_SYS_BOOTM_LEN
CONFIG_SYS_BOOTM_LEN is not used in this file, drop it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-06 17:47:16 -04:00
Tom Rini
41e47b420d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:13:29 -04:00
Tom Rini
8bbbd63373 Merge branch '2022-06-06-finish-SPL-Kconfig-migration' into next
- Bring in a number of series of patches that migrate all remaining
  CONFIG_SPL symbols to Kconfig, remove some dead code that this
  uncovered and then start to tighten the dependencies in Kconfig now
  that everything is migrated and these relationships can be clearly
  expressed.
2022-06-06 12:09:41 -04:00
Tom Rini
4151f4f822 spl: Rework and tighten some dependencies
- In a few places, add missing "depends on" that can be implied from the
  option name (i.e. SPL_DM_xxx depends on SPL_DM).
- Make less use of "if SPL_xxx ... endif" clauses as most of the time
  this reads better as depends on.  In the case of UBI however, move it
  all to a sub-menu.
- Rework SPL_NO_CPU_SUPPORT as it's very specific to the
  non-SPL_FRAMEWORK implementation used on those platforms, and a
  tangent to how CONFIG_SPL_START_S_PATH was used.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
ab0c5f1a59 spl: Rework Kconfig to be more menu driven
Make it so that all of SPL, TPL and VPL are proper menus hidden behind a
gating question.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
ba787bb458 spl: Move all VPL, TPL and PowerPC specific CONFIG options to separate files
- Move all PowerPC (and some shared with Layerscape) options to
  common/spl/Kconfig.nxp
- Move all other TPL related options to common/spl/Kconfig.tpl
- Move all VPL related options to common/spl/Kconfig.vpl

This makes the whole of common/spl/Kconfig slightly more readable.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Chris Packham
3ff2aa6d04 arm: mvebu: Remove CONFIG_SPL_BOOT_DEVICE
CONFIG_SPL_BOOT_DEVICE was made obsolete by
CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC,SATA,UART}.
CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI is the default so existing users of
CONFIG_SPL_BOOT_DEVICE can simply have the option removed.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-06 12:09:29 -04:00
Chris Packham
b19512f1cf Convert CONFIG_FIXED_SDHCI_ALIGNED_BUFFER to Kconfig
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is needed on some Marvell SoCs when
booting from MMC. All existing usages of this have the same value so
make this the default and have the Kconfig option depend on SPL &&
MVEBU_SPL_BOOT_DEVICE_MMC.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-06 12:09:29 -04:00
Chris Packham
bfbd62f691 arm: mvebu: Use MVEBU_SPL_BOOT_DEVICE instead of SPL_BOOT_DEVICE
Update the way KWB_CFG_SEC_BOOT_DEV is determined to use
CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC} instead of
CONFIG_SPL_BOOT_DEVICE.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-06 12:09:29 -04:00
Tom Rini
c31811848e riotboard, syzygy_hub: Disable SPL_FALCON_BOOT_MMCSD
Looking at the git history and values used for the raw kernel/args
location, it's clear these platforms only ever did Falcon Mode via
filesystem images and not raw MMC/SD locations.  Disable
CONFIG_SPL_FALCON_BOOT_MMCSD.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
103d1aecb0 Convert CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
   CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
5fc1d58176 Convert CONFIG_SYS_NAND_SPL_KERNEL_OFFS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_SPL_KERNEL_OFFS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
dc22afb975 spl: Remove CONFIG_SPL_START_S_PATH and rework the logic behind it
In some cases, when we don't use CONFIG_SPL_FRAMEWORK nor are we on
PowerPC using their specific SPL/TPL framework, we need to specify the
start.S file to use for these typically very constrained systems.  Do
this within the Makefile logic, rather than introducing a string-based
CONFIG option, as this would get slightly complex to do in Kconfig for a
very limited number of users.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
c8836dbb01 Drop CONFIG_SPL_SIZE
We do not reference CONFIG_SPL_SIZE in the code, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
14b4817513 ax25-ae350: Move CONFIG_SYS_FDT_BASE to Kconfig
The address where the device tree will be passed in to U-Boot at is now
moved to the Kconfig file.  If this is user configurable, it needs to be
exposed rather than hidden, and should probably be renamed as well.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
b4b9a00ed5 Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_SPL_ARGS_ADDR

In doing so, we also consistently use this variable for SPL_OS_BOOT and
not CONFIG_SYS_FDT_BASE in some cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
a62b7f0c24 Convert CONFIG_SPL_TARGET to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_TARGET

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
cad7f4bab8 Remove CONFIG_SPL_STACK_SIZE
This is not used anywhere, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
0bf940c235 Drop CONFIG_SPL_SPI_FLASH_MINIMAL
There are no users of CONFIG_SPL_SPI_FLASH_MINIMAL only platforms
defining it, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
7f2c91e5d8 Convert CONFIG_SPL_GD_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_GD_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
cfb5dd3585 etamin: Remove CONFIG_SPL_CMT defines
These are presumably private to non-upstream code, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
c4b8bc48b6 Remove CONFIG_SYS_SPL_LEN largely
This is mostly unused.  In the case where it is currently used, it means
the same as CONFIG_SPL_PAD_TO, which is already set for the platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
10f6e4dc3a Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_SPL_MALLOC_SIZE
   CONFIG_SYS_SPL_MALLOC_START

We introduce a default value here as well, and CONFIG_SYS_SPL_MALLOC to
control if we have a malloc pool or not.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
6600b355c7 Convert CONFIG_SPL_BSS_START_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_START_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
55cf860ba7 Convert CONFIG_SPL_RELOC_TEXT_BASE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_RELOC_TEXT_BASE
   CONFIG_SPL_RELOC_STACK
   CONFIG_SPL_RELOC_MALLOC_ADDR
   CONFIG_SPL_RELOC_MALLOC_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
90e1fd0910 Convert CONFIG_TPL_NAND_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_TPL_NAND_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
8b83b53a8d imx7: Update CONFIG_SPL_STACK defaults in Kconfig
Update the Kconfig entry to have the correct defaults for i.MX7
platforms, and move the existing large comment from imx7_spl.h to
doc/imx/common/imx7.txt so that it's not lost.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
23780398b5 imx6: Update CONFIG_SPL_STACK defaults in Kconfig
Update the Kconfig entry to have the correct defaults for i.MX6
platforms, and move the existing large comment from imx6_spl.h to
doc/imx/common/imx6.txt so that it's not lost.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
f113d7d303 Convert CONFIG_SPL_STACK to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_STACK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:27 -04:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Tom Rini
42c6141d37 Introduce include/system-constants.h
We have a number of CONFIG symbols today that are of the form:
SYM1 = CONST1 + CONST2
or other static math operations (shifts, etc).  The issue is that by
moving these to Kconfig we no longer have the ability to calculate these
values, so they become less flexible and useful.  It's also the case
that sometimes a platform will just define SYM1 directly or perform a
slightly different set of calculations.  We introduce this header now to
have a place to start to handle these cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:13 -04:00
Tom Rini
be131adb8d stih410-b2260: Switch to using GENERATED_GBL_DATA_SIZE
We have GENERATED_GBL_DATA_SIZE to tell us how large the generated
global data is, so do not use a hard-coded value of 1024 for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:13 -04:00
Tom Rini
4c97c8cd42 powerpc: Switch to using CONFIG_SYS_INIT_SP_OFFSET from CONFIG_SYS_GBL_DATA_OFFSET
In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it
does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET).  And
it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other
architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures
define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_SP_OFFSET) typically.  Rename things within PowerPC for
consistency with other architectures.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
931bad1c72 mpc85xx: Switch to setting the initial stack pointer more clearly
Currently, since we know that in the combination of
CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET all of the "high"
bits are in CONFIG_SYS_INIT_RAM_ADDR and "low" bits are in
CONFIG_SYS_GBL_DATA_OFFSET we reference this separately in start.S, but
added together everywhere else.  For clarity consistency, reference the
combined value here instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
06ddcfc95a m68k: Stop using CONFIG_SYS_GBL_DATA_OFFSET
This value is only referenced by PowerPC code in a way other than
directly as CONFIG_SYS_INIT_SP_ADDR.  Switch to CONFIG_SYS_INIT_SP_ADDR
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
68eed5bb1c arm: Stop using CONFIG_SYS_GBL_DATA_OFFSET
This value is only referenced by PowerPC code in a way other than
directly as CONFIG_SYS_INIT_SP_ADDR.  Switch to CONFIG_SYS_INIT_SP_ADDR
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
85758d8aa1 arm: Use CONFIG_SPL_STACK or CONFIG_SYS_INIT_SP_ADDR directly.
In some cases, we define CONFIG_SYS_INIT_SP_ADDR differently for SPL or
full U-Boot.  This case should be making use of CONFIG_SPL_STACK, as
that's what that variable is for.  In a few other cases we define
CONFIG_SPL_STACK directly to CONFIG_SYS_INIT_SP_ADDR, but do not need to
as the code handles this correctly, normally.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
3b2979eefa mvebu: Use CONFIG_SPL_STACK + 4 directly for bootparam location
The definition of CONFIG_SPL_BOOTROM_SAVE is always a fixed
CONFIG_SPL_STACK + 4, while CONFIG_SPL_STACK is not constant.  This
change will make it clear where the location is still, once
CONFIG_SPL_STACK moves to Kconfig.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
3135ba642f arm: pxa: Remove CONFIG_CPU_PXA25X
There are no platforms that set this, remove the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
1cb7d77812 m68k: Remove dead code
There are no mcf5227x platforms, remove the CPU code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
90f0819a31 Convert CONFIG_SPL_COMMON_INIT_DDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_COMMON_INIT_DDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
6074a536d5 ppc / layerscape: Clean up CONFIG_SYS_CCSR_DO_NOT_RELOCATE usage
A number of PowerPC platforms define this, for SPL.  To move this to
Kconfig, it needs to be CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE, so use
CONFIG_IS_ENABLED() to check for usage.  A number of layerscape
platforms bring this logic from PowerPC, but only need a small part of
it, for the fman driver.  Remove their unused portion at least.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
66bda092cf Convert CONFIG_SPL_SYS_MALLOC_SIMPLE to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_SYS_MALLOC_SIMPLE

The problem here is that a few platforms have been doing:
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif

instead of defining CONFIG_SPL_SYS_MALLOC_SIMPLE directly.  Correct this
and update the documentation in a few places to match usage.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
9b5f9aeb3b Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_MAX_SIZE
   CONFIG_SPL_MAX_FOOTPRINT

Note that the da850evm platforms were violating the "only use one" rule
here, and so now hard-code their BSS limit.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:10 -04:00
Tom Rini
ca8a329a1b Convert CONFIG_SPL_PAD_TO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_PAD_TO
   CONFIG_SPL_MAX_SIZE
   CONFIG_TPL_PAD_TO
   CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:06 -04:00
Tom Rini
4a11e34bc9 Convert CONFIG_SPL_FS_LOAD_PAYLOAD_NAME et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_FS_LOAD_ARGS_NAME
   CONFIG_SPL_FS_LOAD_KERNEL_NAME
   CONFIG_SPL_FS_LOAD_PAYLOAD_NAME

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
bab1b35c61 Convert CONFIG_SPL_NAND_RAW_ONLY et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NAND_RAW_ONLY
   CONFIG_SPL_NAND_SOFTECC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
b35316fb67 Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_INIT_MINIMAL
   CONFIG_SPL_FLUSH_IMAGE
   CONFIG_SPL_SKIP_RELOCATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
e2475141bd Convert CONFIG_SYS_CFI_FLASH_STATUS_POLL to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CFI_FLASH_STATUS_POLL

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
2f57139c21 Convert CONFIG_SYS_FLASH_CFI_WIDTH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FLASH_CFI_WIDTH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
d498c67054 spl: Remove CONFIG_SPL_SATA_BOOT_DEVICE
This is only referenced in non-SPL_DM cases, of which there are
currently none.  Remove this option and slightly re-organize the code is
there is now never an if/else at the start of spl_sata_load_image()

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
aa473e70ac fsl-layerscape: Remove CONFIG_SPL_PBL_PAD
This option is not referenced in code, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
2179dc085d P1010RDB: Remove CONFIG_SPL_NAND_MINIMAL
This symbol is not used anywhere, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
a581eba01d spl: Remove CONFIG_SPL_BOARD_LOAD_IMAGE
This symbol has been unused in code for some time now, remove
the final references.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
12f613cf0e arm: omap2plus: Move CONFIG_SYS_PTV out of CONFIG namespace
This is always defined to 2, and referenced in two places.  Move the
define to <asm/omap_common.h> and make sure the code that uses this
includes that file.  Make <asm/arch-omap*/clock.h> not include that
file, as we don't need to be doing so.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
167f699ba1 Convert CONFIG_SYS_BOOTPARAMS_LEN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTPARAMS_LEN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
b7fbdc55c7 Convert CONFIG_HUSH_INIT_VAR to Kconfig
This converts the following to Kconfig:
   CONFIG_HUSH_INIT_VAR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
6889412ad5 Convert CONFIG_SYS_BARGSIZE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BARGSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
d31466b382 Convert CONFIG_SYS_CBSIZE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CBSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
d0ee7f295d Convert CONFIG_SYS_PBSIZE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_PBSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
cf493582f8 Convert CONFIG_SYS_MAXARGS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MAXARGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:08:58 -04:00
Tom Rini
8f527342db Prepare v2022.07-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 10:25:13 -04:00
Camelia Groza
380e32b171 configs: fsl: add missing SYS_FMAN_FW_ADDR defines
Two defconfigs were missed when transitioning the SYS_FMAN_FW_ADDR
symbol to Kconfig. CONFIG_SYS_FMAN_FW_ADDR is currently initialized to
0 by default on these builds, which prevents the firmware from loading.

Add the correct symbols to these defconfigs.

Fixes: a97a071d10 ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
2022-06-06 10:20:09 -04:00
Patrick Delaunay
660d74278f doc: update mail author for st-dt.rst
Update author email address with the one dedicated to
upstream activities.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-06 10:20:04 -04:00
Michal Simek
93216276f5 xilinx: fru: Replace spaces with \0 in detected revision
Also fix board revision field where spaces are used instead of \0.
The same change was done for board name by commit 530560b6f8 ("xilinx:
fru: Replace spaces with \0 in detected name").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com
2022-06-06 09:32:26 +02:00
Tom Rini
0f259fe79d Merge tag 'efi-2022-07-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc4-4

UEFI:

* Fix the implementation of the firmware management protocol
* Fix the unit tests for signed update capsules
2022-06-04 09:38:56 -04:00
Vincent Stehlé
8645aefc8b efi: test/py: authenticate fit capsules
Add support for the authentication of UEFI capsules containing FIT images.

The authentication code is moved out of the function handling raw images
into a new function efi_firmware_capsule_authenticate(). The special case
for the FMP header coming from edk2 tools is preserved. There is no
functional change for capsules containing raw images.

The python test for signed capsules with raw images is renamed with no
functional change and a new test is added for signed capsules containing
FIT images.

This can be tested with sandbox64_defconfig or sandbox_flattree_defconfig,
plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-04 08:43:55 +02:00
Vincent Stehlé
82b3f4cb46 test/py: efi_capsule: repair image authentication test
Repair the python tests for authenticated EFI capsules, which can be run
with sandbox_defconfig plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.

- Account for the reset changes done by commit 3e6f810006 ("efi_loader:
  test/py: Reset system after capsule update on disk").
- Fix the capsule GUID typo introduced by commit 2e9c3c6965 ("test:
  capsule: Modify the capsule tests to use GUID values for sandbox").

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-06-04 08:43:55 +02:00
Sughosh Ganu
aad7f1ad60 EFI: Update the documentation to reflect the correct value of OsIndications
The OsIndications is a 64 bit variable, and the current code expects
the value of the variable to be 64 bit. Update the documentation to
reflect this fact.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-04 08:43:55 +02:00
Sughosh Ganu
6a463bc1c9 EFI: Populate descriptor_count value only when image_info_size is not zero
The GetImageInfo function of the Firmware Mangement Protocol(FMP) gets
called initially to query the size of the image descriptor array that
would have to be allocated. During this call, the rest of the function
arguments, specifically pointers might be passed as NULL. Do not
populate the descriptor_count value before it is known that the call
to GetImageInfo has been made with the allocated buffer for the image
descriptors.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-04 08:43:55 +02:00
Chris Packham
f1533c41a7 doc: environment: Fix typo
"valu" should be "value".

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-06-04 08:43:55 +02:00
Tom Rini
90189ecd59 Merge branch '2022-06-03-assorted-fixes'
- armv8 TCR write bugfix, ubifs bugfix, imx8mq clk bugfixes, two network
  fixes, Add U-Boot version to chosen node, update TI AM64x board
  maintainers
2022-06-03 15:42:13 -04:00
Dave Gerlach
c30f6d62f0 board: ti: am64x: Update MAINTAINERS
Move maintainership of TI AM64x boards to Vignesh.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-06-03 15:42:05 -04:00
Pali Rohár
9320db0926 squashfs: Fix compilation on big endian systems
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-06-03 11:15:24 -04:00
Peng Fan
ad9f3771f6 imx: imx8mq: select CONFIG_CMD_CLK
select CONFIG_CMD_CLK to enable dump clk in uboot shell

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-03 11:15:24 -04:00
Peng Fan
4230d68aa8 imx: imx8mq: default select CLK_IMX8MQ
Since the power domain driver default select CONFIG_CLK, so we will
meet lots failures without CLK_IMX8MQ, so default select it.

Fixes: commit 4eb82c2e56 ("imx: power-domain: Get rid of SMCCC dependency")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-03 11:15:24 -04:00
Francesco Dolcini
622ecee93a fdt: Add U-Boot version to chosen node
Add a new device tree property "u-boot,version" in the chosen node to
pass the U-Boot version to the operating system.
This can be useful to implement a firmware upgrade procedure from the
operating system.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-03 11:15:24 -04:00
Fabio Estevam
b85d130ea0 net: Check for the minimum IP fragmented datagram size
Nicolas Bidron and Nicolas Guigo reported the two bugs below:

"
----------BUG 1----------

In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) higher than `IP_HDR_SIZE`
and strictly lower than `IP_HDR_SIZE+8` will lead to a value for `len`
comprised between `0` and `7`. This will ultimately result in a
truncated division by `8` resulting value of `0` forcing the hole
metadata and fragment to point to the same location. The subsequent
memcopy will overwrite the hole metadata with the fragment data. Through
a second fragment, this can be exploited to write to an arbitrary offset
controlled by that overwritten hole metadata value.

This bug is only exploitable locally as it requires crafting two packets
the first of which would most likely be dropped through routing due to
its unexpectedly low Total Length. However, this bug can potentially be
exploited to root linux based embedded devices locally.

```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
     static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
     static u16 first_hole, total_len;
     struct hole *payload, *thisfrag, *h, *newh;
     struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
     uchar *indata = (uchar *)ip;
     int offset8, start, len, done = 0;
     u16 ip_off = ntohs(ip->ip_off);

     /* payload starts after IP header, this fragment is in there */
     payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
     offset8 =  (ip_off & IP_OFFS);
     thisfrag = payload + offset8;
     start = offset8 * 8;
     len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```

The last line of the previous excerpt from `u-boot/net/net.c` shows how
the attacker can control the value of `len` to be strictly lower than
`8` by issuing a packet with `ip_len` between `21` and `27`
(`IP_HDR_SIZE` has a value of `20`).

Also note that `offset8` here is `0` which leads to `thisfrag = payload`.

```C
     } else if (h >= thisfrag) {
         /* overlaps with initial part of the hole: move this hole */
         newh = thisfrag + (len / 8);
         *newh = *h;
         h = newh;
         if (h->next_hole)
             payload[h->next_hole].prev_hole = (h - payload);
         if (h->prev_hole)
             payload[h->prev_hole].next_hole = (h - payload);
         else
             first_hole = (h - payload);

     } else {
```

Lower down the same function, execution reaches the above code path.
Here, `len / 8` evaluates to `0` leading to `newh = thisfrag`. Also note
that `first_hole` here is `0` since `h` and `payload` point to the same
location.

```C
     /* finally copy this fragment and possibly return whole packet */
     memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```

Finally, in the above excerpt the `memcpy` overwrites the hole metadata
since `thisfrag` and `h` both point to the same location. The hole
metadata is effectively overwritten with arbitrary data from the
fragmented IP packet data. If `len` was crafted to be `6`, `last_byte`,
`next_hole`, and `prev_hole` of the `first_hole` can be controlled by
the attacker.

Finally the arbitrary offset write occurs through a second fragment that
only needs to be crafted to write data in the hole pointed to by the
previously controlled hole metadata (`next_hole`) from the first packet.

 ### Recommendation

Handle cases where `len` is strictly lower than 8 by preventing the
overwrite of the hole metadata during the memcpy of the fragment. This
could be achieved by either:
* Moving the location where the hole metadata is stored when `len` is
lower than `8`.
* Or outright rejecting fragmented IP datagram with a Total Length
(`ip_len`) lower than 28 bytes which is the minimum valid fragmented IP
datagram size (as defined as the minimum fragment of 8 octets in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 25).

----------BUG 2----------

In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) lower than `IP_HDR_SIZE`
will lead to a negative value for `len` which will ultimately result in
a buffer overflow during the subsequent `memcpy` that uses `len` as it's
`count` parameter.

This bug is only exploitable on local ethernet as it requires crafting
an invalid packet to include an unexpected `ip_len` value in the IP UDP
header that's lower than the minimum accepted Total Length of a packet
(21 as defined in the IP Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791)). Such packet
would in all likelihood be dropped while being routed to its final
destination through most routing equipment and as such requires the
attacker to be in a local position in order to be exploited.

```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
     static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
     static u16 first_hole, total_len;
     struct hole *payload, *thisfrag, *h, *newh;
     struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
     uchar *indata = (uchar *)ip;
     int offset8, start, len, done = 0;
     u16 ip_off = ntohs(ip->ip_off);

     /* payload starts after IP header, this fragment is in there */
     payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
     offset8 =  (ip_off & IP_OFFS);
     thisfrag = payload + offset8;
     start = offset8 * 8;
     len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```

The last line of the previous excerpt from `u-boot/net/net.c` shows
where the underflow to a negative `len` value occurs if `ip_len` is set
to a value strictly lower than 20 (`IP_HDR_SIZE` being 20). Also note
that in the above excerpt the `pkt_buff` buffer has a size of
`CONFIG_NET_MAXDEFRAG` which defaults to 16 KB but can range from 1KB to
64 KB depending on configurations.

```C
     /* finally copy this fragment and possibly return whole packet */
     memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```

In the above excerpt the `memcpy` overflows the destination by
attempting to make a copy of nearly 4 gigabytes in a buffer that's
designed to hold `CONFIG_NET_MAXDEFRAG` bytes at most which leads to a DoS.

 ### Recommendation

Stop processing of the packet if `ip_len` is lower than 21 (as defined
by the minimum length of a data carrying datagram in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 34)."

Add a check for ip_len lesser than 28 and stop processing the packet
in this case.

Such a check covers the two reported bugs.

Reported-by: Nicolas Bidron <nicolas.bidron@nccgroup.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-06-03 11:15:24 -04:00
Andre Przywara
2b641211c5 armv8: Fix TCR 64-bit writes
The AArch64 TCR_ELx register is a 64-bit register, and many newer
architecture features use bits in the upper half. So far U-Boot was
igorant of those bits, trying to leave them alone.
However, in an effort to set bit 31 to 1, it failed doing so, because
the compiler sign-extended "1 << 31", so that all bits[63:31] got set.

Older ARMv8.0 cores don't define anything dangerous up there, but newer
architecture revisions do, and setting all those bits will end badly:
=================
$ qemu-system-aarch64 -cpu max ....
U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100)

DRAM:  1.5 GiB
=================  (hangs here)

Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all
upper bits stay at a safe 0 value. This means no more surprises when
U-Boot runs on a more capable CPU core.

Reported-by: Balaji Anandapadmanaban <Balaji.Anandapadmanaban@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Peter Collingbourne <pcc@google.com>
2022-06-03 11:15:24 -04:00
Michael Walle
7704b7fd67 net: enetc: unregister mdiobus
If the device fails to probe - for example, when there is no
ethaddr set - then the private data is automatically freed
but the mdiobus remains registered.

Fixes: 1e354cb393 ("drivers: net: fsl_enetc: register internal MDIO bus")
Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-03 11:15:24 -04:00
Pali Rohár
339f652992 ubifs: Fix lockup/crash when reading files
Commit b1a14f8a1c ("UBIFS: Change ubifsload to not read beyond the
requested size") added optimization to do not read more bytes than it is
really needed. But this commit introduced incorrect handling of the hole at
the end of file. This logic cause U-Boot to crash or lockup when trying to
read from the ubifs filesystem.

When read_block() call returns -ENOENT error (not an error, but the hole)
then dn-> structure is not filled and contain garbage. So using of dn->size
for memcpy() argument cause that U-Boot tries to copy unspecified amount of
bytes from possible unmapped memory. Which randomly cause lockup of P2020
CPU.

Fix this issue by copying UBIFS_BLOCK_SIZE bytes from read buffer when
dn->size is not available. UBIFS_BLOCK_SIZE is the size of the buffer
itself and read_block() fills buffer by zeros when it returns -ENOENT.

This patch fixes ubifsload on P2020.

Fixes: b1a14f8a1c ("UBIFS: Change ubifsload to not read beyond the requested size")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-06-03 10:23:22 -04:00
Tom Rini
3053b78146 Merge tag 'efi-2022-07-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc4-3

UEFI:

* fix a problem in loading an image from a short-path
* fix building the bootmenu command for CONFIG_EFI_LOADER=n
* correct the bootefi command syntax
* add firmware management protocol to the documentation

Others:

* bootmenu: fix bootmenu title handling

Tested-by: Pali Rohár <pali@kernel.org> [n900, for bootmenu working as before]
2022-05-31 13:05:53 -04:00
Masahisa Kojima
e85727ddb6 bootmenu: use utf-8 for menu title
The commit a3d0aa87ac ("bootmenu: update bootmenu_entry structure")
changes the bootmenu title type from char to u16(UTF16 string)
to support EFI based system. If EFI_LOADER is not enabled,
printf("%ls") is not supported, so bootmenu does not appear
correctly.

This commit changes the type of menu title from u16(UTF16) to
utf-8 string and EFI strings is conveted into utf-8.

Fixes: a3d0aa87ac ("bootmenu: update bootmenu_entry structure")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-31 07:57:02 +02:00
Vincent Stehlé
2ee9550a7d doc/efi: add firmware management protocol to the documentation
The firmware management protocol can be used to manage device firmware.
U-Boot can be configured to provide an implementation.

Document the related functions in the API section.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Vincent Stehlé
7751d2ef86 efi: fix documentation warnings
This fixes the following warnings:

  ./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version' not described in 'efi_firmware_fit_get_image_info'
  ./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_fit_get_image_info'
  ./lib/efi_loader/efi_firmware.c:369: warning: bad line: firmware image
  ./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version' not described in 'efi_firmware_raw_get_image_info'
  ./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_raw_get_image_info'

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Masahisa Kojima
afbeedc868 lib/charset: fix compile warnings
This commit fixes the following compile warnings
for the documentation.

./include/charset.h:276: warning: Function parameter or member 'size' not described in 'u16_strlcat'
./include/charset.h:276: warning: Excess function parameter 'count' description in 'u16_strlcat'

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
AKASHI Takahiro
57ad624103 efi_loader: bootmgr: fix a problem in loading an image from a short-path
Booting from a short-form device path which starts with the first element
being a File Path Media Device Path failed because it doesn't contain
any valid device with simple file system protocol and efi_dp_find_obj()
in efi_load_image_from_path() will return NULL.
For instance,
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Scsi(0,0)/\helloworld.efi
-> shortened version: /\helloworld.efi

With this patch applied, all the media devices with simple file system
protocol are enumerated and the boot manager attempts to boot temporarily
generated device paths one-by-one.

This new implementation is still a bit incompatible with the UEFI
specification in terms of:
* not creating real boot options
* not try
  "If a device does not support the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, but
  supports the EFI_BLOCK_IO_PROTOCOL protocol, then the EFI Boot Service
  ConnectController must be called for this device with DriverImageHandle
  and RemainingDevicePath set to NULL and the Recursive flag is set to TRUE."
(See section 3.1.2 "Load Option Processing".)

But it still gives us a closer and better solution than the current.

Fixes: commit 9cdf470274 ("efi_loader: support booting via short-form device-path")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
AKASHI Takahiro
05f391e2fc efi_loader: disk: add efi_disk_is_removable()
This helper function will be used to determine if the device is
removable media, initially for handling a short-path loading.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
8131c85a77 cmd/bootefi: correct command syntax
For indicating the address and size of a memory region other commands use a
<addr>[:<size>] syntax. Do the same for bootefi.

Fixes: 2058983689 ("cmd: bootefi: restore ability to boot arbitrary blob")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
b96de9cb0c test: don't change console timeout in EFI selftest.
Changing the console timeout to 500 ms without restoring the original value
leads to failures in other tests. As the console timeout change is not
necessary for the text input protocol tests remove it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
b9bf9c587f test: fix pylint warnings in test_efi_selftest.py
* change format of parameter documentation
* avoid superfluous assignments

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Masahisa Kojima
83f73632c9 bootmenu: U-Boot console is enabled as default
The commit 2158b0da22 ("bootmenu: add Kconfig option
not to enter U-Boot console") disables to enter U-Boot
console from bootmenu as default, this change affects the
existing bootmenu users.

This commit reverts the default behavior, the bootmenu can
enter U-Boot console same as before.
CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is renamed
BOOTMENU_DISABLE_UBOOT_CONSOLE and depends on
AUTOBOOT_MENU_SHOW.

Fixes: 2158b0da22 ("bootmenu: add Kconfig option not to enter U-Boot console")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Sean Anderson
a24b20ea67 doc: sandbox: Add additional valgrind documentation
This documents some additional options which can be used with valgrind, as
well as directions for future work. It also fixes up inline literals to
actually be inline literals (and not italics). The content of this
documentation is primarily adapted from [1].

[1] https://lore.kernel.org/u-boot/57cb4b49-fa30-1194-9ac3-faa53e8033bd@gmail.com/

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
42356472bf doc/build/gcc: add more required packages
The following Python packages are used by U-Boot, too:

* python3-asteval
* python3-subunit
* python3-testtools

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Bin Meng
783f2c879d doc: sandbox: Add a note of disabling LTO when using gdb
Image created by LTO is not friendly to debugger, let's document this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Mention CONFIG_CC_OPTIMIZE_FOR_DEBUG and LLDB.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-05-28 10:59:27 +02:00
Bin Meng
27267c61b1 doc: sandbox: Correct the memory size config option
It should be CONFIG_SANDBOX_RAM_SIZE_MB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Sean Anderson
1e5514fd68 valgrind: Disable on Risc-V
There are no defined instruction sequences in include/valgrind.h for
Risc-V, so CONFIG_VALGRIND will do nothing on this arch (and possibly won't
compile?). Update Kconfig accordingly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
018b993bba test: restore timeout after bootmenu unit test
In the bootmenu unit test the console timeout is set to 500 ms.
Other tests rely on the original timeout. Ensure that the original value
is restored.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Heinrich Schuchardt
1291c2d446 disk: incorrect message in is_gpt_valid()
alloc_read_gpt_entries() writes differentiated error messages.
The caller is_gpt_valid() should not write an extra possibly wrong message.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-28 10:59:27 +02:00
Tom Rini
4fe629d2e8 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-05-27 08:50:42 -04:00
Tom Rini
0fdc468b06 Merge branch '2022-05-26-assorted-fixes'
- Fixes for pytest timeout in CI, missing dependency on PCI for the
  e1000 driver, fix for CVE-2022-30767 (NFS), TI K3 AM642 DTS bugfix,
  MAINTAINERS updates, mksquashfs version check fix.
2022-05-27 08:48:47 -04:00
Sean Anderson
d64ac8549d net: e1000: Depend on CONFIG_PCI
This driver depends on PCI. Update the Kconfig accordingly.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-05-26 10:32:27 -04:00
Heinrich Schuchardt
d051a91c8d test: fix parsing the mksquashfs version number
Testing with mksquasshfs 4.5.1 results in an error

    ValueError: could not convert string to float: '4.5.1'

Version 4.10 would be considered to be lower than 4.4.

Fixes: 04c9813e95 ("test/py: rewrite common tools for SquashFS tests")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-26 10:32:27 -04:00
Wasim Khan
d9402bd49b board: freescale: Update MAINTAINERS List
Update MAINTAINERS List for LS2088ARDB and LS2088AQDS
platforms

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
2022-05-26 10:32:26 -04:00
Georgi Vlaev
e7356f08e9 arm: dts: k3-am642-*: Mark the memory node with u-boot, dm-spl
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
for ram and bank init") ddr_init() and dram_bank_init() have
switched to fdtdec for getting the memory configuration from
the am64xx dts files instead of using hardcoded values. This
requires an accessible memory node in SPL as we already have
in k3-am642-r5-evm.dts.

Make the memory node accessible in A53 SPL for both am642-sk
and am642-evm and in am642-sk R5 SPL.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-26 10:32:26 -04:00
Joel Stanley
24c8d1aba1 MAINTAINERS: aspeed: Add more files and myself as a reviewer
Add the rest of the ASPEED drivers that are in tree. Most are obvious,
except for ftgmac100 which matches the register layout used in the
ASPEED SoC.

I am the Linux maintainer for the ASPEED kernel port, and help maintain
the fork of u-boot used for OpenBMC, so add myself as a reviewer so I
can stay informed about u-boot changes.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-05-26 10:32:26 -04:00
Andrea zi0Black Cappa
bdbf7a05e2 net: nfs: Fix CVE-2022-30767 (old CVE-2019-14196)
This patch mitigates the vulnerability identified via CVE-2019-14196.

The previous patch was bypassed/ineffective, and now the vulnerability
is identified via CVE-2022-30767. The patch removes the sanity check
introduced to mitigate CVE-2019-14196 since it's ineffective.
filefh3_length is changed to unsigned type integer, preventing negative
numbers from being used during comparison with positive values during
size sanity checks.

Signed-off-by: Andrea zi0Black Cappa <zi0Black@protonmail.com>
2022-05-26 10:32:06 -04:00
Bin Meng
9e892ac276 test/py: test_part: Correct the test case name
Use test_part_types as the name instead of dm_compact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26 10:27:14 -04:00
Bin Meng
7eb2e88ae9 test/py: test_fs: Correct the test case name
Use test_fstypes as the name instead of test_dm_compact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26 10:27:14 -04:00
Bin Meng
7bb683513c test/py: Reset the console timeout value
Reset the console timeout value as some tests may change its default
value during the execution.

This fixes the random case timeout issue seen in the U-Boot CI.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26 10:27:14 -04:00
Bin Meng
c544b281cd riscv: qemu: Set kernel_comp_addr_r for compressed kernel
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:42:34 +08:00
Bin Meng
ce78c4cd6e riscv: sifive: unleashed: Set kernel_comp_addr_r for compressed kernel
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.

Update unleashed.rst to remove the manual environment configuration
for compressed kernel boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:42:34 +08:00
Bin Meng
b84d24c3c5 riscv: sifive: unmatched: Adjust for big ramdisk image
Move kernel_comp_addr_r to an address that comes before the ramdisk
image, since the decompressed kernel size is known to us. This way
we can allow big ramdisk image to be loaded.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:42:33 +08:00
Leo Yu-Chi Liang
d5af15bf51 riscv: Clean up asm/io.h
Clean up asm/io.h by
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa, mem_pci)

This massively improves the readability of the file.

Suggested by commits:
7ab2e47d27 ("arm: Clean up asm/io.h")
909d0399a5 ("ARM: asm/io.h: kill off confusing #ifdef __mem_pci block")

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26 18:41:21 +08:00
Michal Simek
8ac37b461c riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.h
Commit ba1ed5b022 ("Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig") clearly
defined that this option is available for SANDBOX (was also for already
removed NDS32). That's why there is no way how this code can be enabled
with current Kconfig layout for riscv.
Based on this removing this code.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26 18:38:02 +08:00
Heinrich Schuchardt
73872eb05a cmd/sbi: add implementation ID 6 - Coffer
The sbi command displays the ID of the implementation of the RISC-V
Supervisor Binary Interface Specification. A new ID for Coffer has recently
been added.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:37:55 +08:00
Rick Chen
9da5ced5c5 riscv: ae350: Fix OF_BOARD boot failure
Disable BINMAN_FDT for ae350 boards which don't actually use it.

Fixes: 836eac7c6f ("fdt: Make OF_BOARD a bool option")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:37:51 +08:00
Rick Chen
b277a95c6e riscv: ae350: Fix OF_BOARD boot failure
Enable OF_HAS_PRIOR_STAGE for ae350 boards with OF_BOARD

Fixes: 239d22c795 ("fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:37:51 +08:00
Tom Rini
661f540075 Merge tag 'xilinx-for-v2022.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc4

zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image

xilinx:
- Handle board_get_usable_ram_top(0) properly

phy:
- Extend psgtr timeout

mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
2022-05-25 09:50:08 -04:00
Tom Rini
7e0edcadb0 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The bulk of it is (finally!) some DT sync from the kernel. We refrained
from syncing one incompatible change, as this would spoil booting Linux
kernels before v5.13 with U-Boot's DT (via UEFI, for instance).
I test booted Linux v5.18 and v5.4 with that new DT on some boards, and
the headless peripherals (MMC, USB, Ethernet) seemed to work.
The rest are fixes:
- silencing missing clock warnings due to the new pinctrl driver
- fixing "UART0 on PortF", allowing UART access through the SD card pins
- add an F1C100s clock driver, to enable MMC support (SPI comes later)
- some cleanups for CONS_INDEX_n in Kconfig

Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and
OrangePi-Zero.
2022-05-24 23:29:00 -04:00
Tom Rini
1b04a961c6 Merge tag 'tpm-24052022' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Add support for i2c devices
2022-05-24 09:03:34 -04:00
Michal Simek
594f692f49 xilinx: zynqmp: Wire tee for Multi DTB use cases
Fix TEE wiring when MULTI_DTB is selected.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8523a89d910ae6b8a9971b4e7b3bda89be3dc27.1652874088.git.michal.simek@amd.com
2022-05-24 08:44:24 +02:00
Tom Rini
bfb550db16 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga
- Add the terasic de10-standard board
2022-05-23 22:56:35 -04:00
Samuel Holland
7495051219 serial: Remove obsolete CONS_INDEX_n Kconfig options
These were only ever implied by sunxi platforms, and that usage has
been removed. Current practice is to specify CONFIG_CONS_INDEX in each
board's defconfig.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:46:06 +01:00
Samuel Holland
821fdfbba3 sunxi: Remove obsolete Kconfig selections
ARCH_SUNXI selects DM_SERIAL, so the condition can never be satisfied.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:46:06 +01:00
Andre Przywara
e26ece267e sunxi: board: Fix UART PortF pinmux setup
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
(usually used for the SD card) as UART0. Some SoCs use the mux value of
3 for this, while others use 4.

The combination of Kconfig symbols we currently use was not quite right:
we mis-configure the A31, A64, H6 and H616.

Going through the list in the pinctrl driver, there are only a few older
SoCs that use a value of 4, so revert the #ifdef clause, and name those
explicitly, instead of the other way around.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-24 01:45:47 +01:00
Andre Przywara
d6cb09d89d clk: sunxi: add and use dummy gate clocks
Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=========
sunxi_set_gate: (CLK#3) unhandled
=========

Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.

Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-24 01:16:15 +01:00
Andre Przywara
444ab3569b clk: sunxi: add PIO bus gate clocks
The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========

Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-24 01:15:09 +01:00
Samuel Holland
596247e54b clk: sunxi: h6_r: Correct the driver name
H6 is from the sun50i family, not sun6i.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:15:01 +01:00
Samuel Holland
818e1636ac mmc: sunxi: Remove unnecessary pinmux option dependency
Now that the pinmux conflict is handled in the board code (by skipping
setup for the one conflicting MMC controller), the driver does not need
to be entirely disabled based on the UART pinmux.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:14:51 +01:00
Samuel Holland
3ba0a25c44 sunxi: Skip MMC0 init when its pinmux conflicts with UART0
Currently, selecting UART0_PORT_F entirely disables MMC support on sunxi
platforms. But this is a bigger hammer then needed. Muxing UART0 to the
pins on port F only causes a conflict with MMC0, so minimize the impact
by specifically skipping MMC0 init. We can continue to use MMC1/2 if
those are enabled.

Let's also remove the preprocessor check while refacting this function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:14:35 +01:00
Tom Rini
b6d46d951f Prepare v2022.07-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-23 15:40:41 -04:00
Humberto Naves
1b05136a6c arm: socfpga: Add the terasic de10-standard board
Use the de10-nano files as templates for the de10-standard board.
The files in qts directory are generated by quartus from the GHRD
design.

Signed-off-by: Humberto Naves <hsnaves@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-23 21:28:07 +02:00
Tom Rini
c0a1409d21 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-23 13:56:21 -04:00
Tom Rini
c04a418d52 Merge branch '2022-05-23-regression-fixes'
- Fix PowerPC NOR booting, important SPI uclass fixes/updates, gic_v2
  fix when CPU is not in EL3, fsl_esdhc_spl fix, and squashfs fix for
  linking on some architectures, and fix phy_string_for_interface
2022-05-23 13:52:53 -04:00
Tim Harvey
faa6ce6061 net: fix phy_string_for_interface
commit ffb0f6f488 ("treewide: Rename PHY_INTERFACE_MODE_NONE to
PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function.
Fix it.

Fixes ffb0f6f488 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-05-23 13:52:02 -04:00
Eddie James
9f971dac93 tpm: add support for TPMv2.x I2C chips
Add the tpm2_tis_i2c driver that should support any TPMv2 compliant
I2C chips, such as the NPCT75X chip.

[Ilias rename priv_auto_alloc_size to priv_auto]
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-05-23 16:33:58 +03:00
Pali Rohár
c1abf7659c mmc: fsl_esdhc_spl: Fix checking for number of read sectors
Commit 0980cbba7b ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
support") changed number of sectors which are read but did not adjusted
error check.

Fix it and check for if correct number of sectors were read.

Fixes: 0980cbba7b ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-05-23 09:33:10 -04:00
Sai Pavan Boddu
2d25f63cc0 arm: gic_v2: Skip gic_init_secure when cpu is not in el3
This would prevent configuring non-secure regs in case gic security
extensions are not emulated in Qemu.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-23 09:33:10 -04:00
Patrice Chotard
012afa83ae test: dm: spi: Replace _spi_get_bus_and_cs() by spi_get_bus_and_cs() in some case
In case _spi_get_bus_and_cs()'s parameters drv_name and dev_name are
respectively set to NULL and 0, use spi_get_bus_and_cs() instead.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Patrice Chotard
3feea0ba19 spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.

To sum-up:
 - Previous call tree was:
    spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()

 - Current call tree is:
    spi_flash_probe() -> _spi_get_bus_and_cs()
    spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()

This patch impacts the following :
  - cmd/sf.c: if spi mode and/or speed is passed in argument of
    do_spi_flash_probe(), call spi_flash_probe() otherwise call
    spi_flash_probe_bus_cs().

  - drivers/net/fm/fm.c: as by default spi speed and mode was set to
    0 and a comment indicates that speed and mode are read from DT,
    use spi_flash_probe_bus_cs().

  - drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
    from DT by all platforms using this driver, so keep legacy and replace
    spi_flash_probe_bus_cs() by spi_flash_probe();

  - drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
    so replace spi_flash_probe_bus_cs() by spi_flash_probe().

  - drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
    usage of this driver, nevertheless, keep legacy and replace
    spi_get_bus_and_cs() by _spi_get_bus_and_cs().

  - env/sf.c: a comment indicates that speed and mode are read
    from DT. So use spi_flash_probe_bus_cs().

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Patrice Chotard
61708bb0a2 spi: spi-uclass: Add new spi_get_bus_and_cs() implementation
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().

Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.

Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Pali Rohár
827a232623 powerpc: mpc85xx: Fix CONFIG_OF_EMBED support for NOR booting
mpc85xx NOR binary contains also reset vector and therefore option
CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined.

When build system uses binman, it takes care of constructing final image
which consist of u-boot-without-reset-vector, DTB and reset-vector.

CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile
produce directly final u-boot.bin binary.

So in this case mpc85xx reset vector must not be stripped from the final
u-boot.bin binary. Fix it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-23 09:33:10 -04:00
Pali Rohár
b898f6a6db powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting
Commit e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.

Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.

This change fixes building of U-Boot for NOR booting on P2020 board.

Fixes: e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-23 09:33:10 -04:00
Sean Nyekjaer
92080c6ef6 fs/squashfs: use lldiv function for math
When compling for x86:
ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4'
ld.bfd: u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4'

Signed-off-by: Sean Nyekjaer <sean.nyekjaer.ext@siemensgamesa.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-05-23 09:33:10 -04:00
Eddie James
8d7199da3f tpm: core: Set timeouts before requesting locality
Requesting the locality uses the timeout values, so they need
to be set beforehand.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-05-23 16:32:55 +03:00
Tom Rini
004d30c786 Merge tag 'u-boot-imx-20220523' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220523
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087

Additionally to u-boot-imx20200520:

- DH MX8MP
- i.MX GPIO: reading GPIO when direction is output
- Menlo i.MX53: switch to DM

And from u-boot-imx20200520:

- fix Verdin hang
- add pca9450 regulator
- conversion to DM_SERIAL
- NAND block handling
- fix crypto
- enable cache on some boards
- add ACC board (MX6)
2022-05-23 09:25:39 -04:00
Marek Vasut
4d573d5c98 ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-23 11:37:58 +02:00
Christoph Fritz
0539d16d22 gpio: rgpio2p: Enhance reading of GPIO pin value
Add support for reading GPIO pin value when function is output.
With this patch applied, gpio toggle command is working.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-23 11:37:58 +02:00
Marek Vasut
9d371e5fea ARM: imx: mx5: Convert MX53 Menlo board to DM I2C and DM RTC
Convert the board to DM I2C and DM RTC. This leads to removal of board
side iomuxc configuration, which is now done using pin control driver,
and conversion of board side legacy I2C accessors to DM ones.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-23 11:37:58 +02:00
Sergei Antonov
fdc55a6ba8 meson: axg: search dtb for meson-axg-usb-ctrl on board axg
USB controller for AXG is described as meson-axg-usb-ctrl,
see arch/arm/dts/meson-axg.dtsi
Look for that name instead of meson-gxl-usb-ctrl.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220509113618.2891126-1-saproj@gmail.com
2022-05-23 10:40:01 +02:00
Andre Przywara
92373de041 Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality"
The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
used the wrong compatible string for the watchdog timer, so the Allwinner
DM reset driver was not working properly. We worked around this by
disabling the SYSRESET driver, so the hardcoded SPL reset driver took
over.
Now the issue was fixed in the DTs in mainline Linux, and we synced the
fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
proper reset infrastructure.

This reverts commit cfcf1952c1.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23 00:37:52 +01:00
Andre Przywara
d037e79f3a sunxi: F1C100s: update DT files from Linux
The initial U-Boot F1C100s port was based on the mainline kernel DT
files, which were quite basic and were missing the essential MMC and
SPI peripherals. While we could work around this in the SPL by
hardcoding the required information, this left U-Boot proper without SD
card or SPI flash support, so actual loading would require FEL boot.

Now the missing DT bits have been submitted and accepted in the kernel
tree, so lets sync back those files into U-Boot to enable MMC and
SPI, plus benefit from some fixes.

This is a verbatim copy of the .dts and .dtsi file from
linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a
while as well.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19

Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23 00:37:51 +01:00
George Hilliard
89dd650f20 clk: sunxi: implement clock driver for suniv f1c100s
The f1c100s has a clock tree similar to those of other sunxi parts.
Add support for it.

Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
Signed-off-by: Yifan Gu <me@yifangu.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
[Andre: add PIO and I2C]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23 00:37:51 +01:00
Samuel Holland
ce00370b87 ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1
Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This commit also adds the following new board devicetrees:
 - sun50i-h6-pine-h64-model-b.dts
 - sun50i-h6-tanix-tx6-mini.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
7710282334 ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1
Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
7024755bd7 ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.

This commit adds the following new board devicetrees:
 - sun8i-r40-oka40i-c.dts
 - sun8i-t3-cqa3t-bv3.dts

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
94539ab840 ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun8i-s3-elimo-initium.dts
 - sun8i-v3-sl631-imx179.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
2c597855aa ARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing
boards from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit also adds the following new board devicetree:
 - sun8i-h3-nanopi-r1.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
2d648e6982 ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1
Copy the devicetree source for the A83T SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

As with the other SoCs, updates of note include adding detection GPIO
properties in the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
6f97e028ef ARM: dts: sun9i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A80 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
70f24fa02b ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.

These changes are combined into one commit due to interdependencies:
 - The unit addresses were removed from bitbanged I2C buses, which
   drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
   and sun6i-a31-colombus.dts.
 - The pinctrl nodes were renamed, including some used by the shared
   header sunxi-reference-design-tablet.dtsi.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.

This commit also adds the following new board devicetrees:
 - sun5i-a13-licheepi-one.dts
 - sun5i-a13-pocketbook-touch-lux-3.dts
 - sun5i-gr8-evb.dts
 - sun8i-a23-ippo-q8h-v1.2.dts
 - sun8i-a23-ippo-q8h-v5.dts
 - sun8i-a33-et-q8-v1.6.dts
 - sun8i-a33-ippo-q8h-v1.2.dts
 - sun8i-r16-nintendo-super-nes-classic.dts

As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
4746694cba ARM: dts: sun4i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetree:
 - sun4i-a10-topwise-a721.dts

While this update should not impact any existing U-Boot functionality,
the changes to the USB PHY detection GPIO properties are needed to
convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00
Samuel Holland
0605ac405c ARM: dts: sun7i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun7i-a20-haoyu-marsboard.dts
 - sun7i-a20-linutronix-testbox-v2.dts
 - sun7i-a20-olinuxino-lime-emmc.dts

This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23 00:37:50 +01:00
Samuel Holland
91407bbd41 ARM: dts: sunxi: Remove unused devicetree headers
These files are not included anywhere and do not exist in the Linux
devicetree source.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:50 +01:00
Samuel Holland
9a50489c60 dt-bindings: sunxi: Update clock/reset binding headers
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:50 +01:00
Tom Rini
6f00b97d7e Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-05-20 22:07:56 -04:00
Jan Kiszka
868d58f69c usb: dwc3: Fix non-usb3 configurations
Missing nodes may also be signaled via -ENODATA. We need to check for
that to prevent failing in non-usb3 setups.

Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found.

Fixes: 142d50fbce ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-05-20 23:30:36 +02:00
Tom Rini
658d38e193 Merge tag 'u-boot-stm32-20220520' of https://source.denx.de/u-boot/custodians/u-boot-stm
- spi: fix busy bit check in stm32_qspi driver
- stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board
2022-05-20 13:50:11 -04:00
Philip Oberfichtner
bd8df1f7dd ARM: imx6: Adapt device tree selection in DH board file
Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.

It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:49 +02:00
Philip Oberfichtner
c5a46943a2 ARM: dts: imx: Configure FEC for iMX6QDL DRC02
Add a u-boot dtsi for configuring the FEC node of the DH DRC02.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:49 +02:00
Philip Oberfichtner
84d9ce5607 ARM: dts: imx: Configure FEC for iMX6QDL picoITX
Add a u-boot dtsi for configuring the FEC node of the DH picoITX.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:49 +02:00
Philip Oberfichtner
dcb59a1306 ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards
Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.

Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:49 +02:00
Philip Oberfichtner
6ecd1d66a9 ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header
Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from
board header. This is required, because the DH picoITX and DRC02 boards
require different settings than PDK2. The corresponding 'phy-handle'
device tree properties are already there.

I tested this change on picoITX and DRC02, but on PDK2 it is untested.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:48 +02:00
Philip Oberfichtner
874c76867a ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:48 +02:00
Philip Oberfichtner
45964cbf3c ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:48 +02:00
Philip Oberfichtner
e1e0d9ab9f ARM: imx6: Fix broken DT path in DH board file
In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.

The label has been newly created for all iMX6QDL DHCOM boards.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:48 +02:00
Marek Vasut
326337fb00 pmic: pca9450: Add regulator driver
Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-20 12:36:48 +02:00
Marek Vasut
1d51e779e3 pmic: pca9450: Add upstream regulators subnode match
The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-20 12:36:48 +02:00
Peng Fan
fbc6b14143 imx: imx8mp_rsb3720a1: convert to DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 12:36:48 +02:00
Marcel Ziswiler
c898b53755 ARM: imx8mm: verdin-imx8mm: fix board hang in spl
Move the preloader_console_init() call after spl_early_init() to avoid
board hang in SPL.

While at it remove explicit in-code console/debug UART pinmuxing (uart1
and its pinmuxing are already marked as u-boot,dm-spl via device tree).

Fixes: 4551e18987 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm serial")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-05-20 12:36:48 +02:00
Fabio Estevam
886e423a21 imx8mp_rsb3720a1: Enable cache in SPL
There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-05-20 12:36:48 +02:00
Fabio Estevam
a3f0d49408 cgtqmx8: Enable cache in SPL
There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-05-20 12:36:48 +02:00
Fabio Estevam
ec7eb75fcf imx8mm-cl-iot-gate: Enable cache in SPL
There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:48 +02:00
Philip Oberfichtner
55d1537c5b bosch: Add initial board support for ACC
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.

The device tree is copied from Linux, see [1]. The only difference
compared to the Linux DT is the removal of usbphynop properties. They are
defined in the Linux version of imx6qdl.dtsi, but not in the u-boot
version.

[1] Commit 6192cf8ac082 from
    git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:48 +02:00
Michael Trimarchi
35461fe94e imx: imx8mn_smm_s2/s2pro: Enable TrustZone
When the board was added, enabling tzc380 was left off by
mistake. The optee was tested with the following configuration
in s2pro

+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 6MiB */
+		optee_core@5f800000 {
+			reg = <0x00 0x5f800000 0x00 0x600000>;
+		};
+
+		/* 2MiB */
+		optee_shm@5fe00000 {
+			reg = <0x00 0x5fe00000 0x00 0x200000>;
+		};
+	};
+

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:48 +02:00
Michael Trimarchi
cc980143c0 spl: spl_nand: Fix bad block handling in fitImage
If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.

Cc: Fabio Estevam <festevam@gmail.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:48 +02:00
Michael Trimarchi
37a7c374a6 arm: mach-imx: cmd_nandbcb fix bad block handling
The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.

Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:48 +02:00
Michael Trimarchi
a222c14792 mtd: nand: mxs_nand_spl: Fix bad block skipping
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.

The problematic part of old code was in this part:

while (is_badblock(mtd, offs, 1)) {
           page = page + nand_page_per_block;
          /* Check i we've reached the end of flash. */
          if (page >= mtd->size >> chip->page_shift) {
                      free(page_buf);
                      return -ENOMEM;
         }
}

Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:47 +02:00
Michael Trimarchi
78bf8e802c nand: raw: mxs_nand: Fix specific hook registration
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.

With this fix markbad is working again. Before this change:

nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20 12:36:47 +02:00
Gaurav Jain
1919f58a8f crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-20 12:36:47 +02:00
Gaurav Jain
cad77280c3 i.MX8ULP: add display_ele_fw_version api
implement get f/w version api.
print ele f/w version in spl.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2022-05-20 12:36:47 +02:00
Ye Li
cda8f87349 caam: Fix crash in case caam_jr_probe failed
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-20 12:36:47 +02:00
Fabio Estevam
5ed4c33f36 kontron-sl-mx8mm: Select the CONFIG_CMD_UNZIP option
Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-05-20 12:36:47 +02:00
Mark Kettenis
6a6468f479 usb: xhci-dwc3: Support role switch default role
When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.

This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-05-20 09:41:33 +02:00
Peng Fan
8494fe077c imx: toradex/verdin-imx8mm/p: cleanup board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
a6924c95d1 imx: verdin-imx8mm/p: cleanup board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
09bf8270cf imx: imx8mn_smm_s2: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-05-20 09:30:29 +02:00
Peng Fan
0726bdd460 imx: imx8mm-mx8menlo: drop unneeded watchdog settings
pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-20 09:30:29 +02:00
Peng Fan
a38ed61643 imx: imx8mp_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
ba06ea8991 imx: imx8mm_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
6d5cc90670 imx: imx8mn_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
597514e738 imx: imx8mq-phanbell: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:29 +02:00
Peng Fan
1d8c0c2d7b imx: imx8mq-pico: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:29 +02:00
Peng Fan
23df340f32 imx: imx8mq-cm: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:29 +02:00
Peng Fan
56f3888b43 imx: dts: move common changes to imx8mq-u-boot.dtsi
Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:29 +02:00
Peng Fan
6ea118ef9a imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:28 +02:00
Peng Fan
2232d5f5b7 imx: imx8mm_mx8menlo: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:28 +02:00
Tim Harvey
d003d89372 board: gateworks: gw_ventana: remove obsolete file
commit 61cf225053 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Tim Harvey
0cba71c1eb board: gateworks: gw_ventana: add support for GPY111 PHY
The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Tim Harvey
6fc639461b board: gateworks: venice: enable SPL_DM_SERIAL
The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.

Remove the manual config of the UART pinmux now that it is no longer
needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Tim Harvey
8e3cc42a3f configs: remove FEC_QUIRK_ENET_MAC from imx8m configs
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Tim Harvey
110998f3c6 configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.

Fixes: commit 2395625209 ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Tim Harvey
400eebf10d configs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDR
The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.

There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20 09:30:28 +02:00
Peng Fan
a1d675ac77 imx: imx8m: drop uneeded check
All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2022-05-20 09:30:28 +02:00
Peng Fan
5dd9db8f7d imx: imx8m: add rproc_att
With rpoc_att, bootaux able to kick elf file for M core

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:28 +02:00
Peng Fan
40153df63a imx: bootaux: get stack from elf file
To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:28 +02:00
Peng Fan
fd60a87e75 imx: bootaux: add missing newline
Add missing newline

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:28 +02:00
Peng Fan
56c2dbdaba imx: bootaux: cleanup code
Use if (CONFIG_IS_ENABLED()) to make code cleaner
Enable elf support for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:28 +02:00
Rasmus Villemoes
290ffe5788 imx8m: fix reading of DDR4 MR registers
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me

 tmp = 0x00ffff00
 tmp = 0x00070700
 tmp = 0x00000000
 tmp = 0x00101000

and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.

So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.

This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:28 +02:00
Marek Vasut
c329f9349b ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-20 09:03:01 +02:00
Marek Vasut
be23774ed1 ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-20 09:03:01 +02:00
Marek Vasut
52b6b480db ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-20 09:03:01 +02:00
Fabio Estevam
16ee0f2afd mx6sllevk: Remove duplicated "mmc dev" command
The "mmc dev ${mmcdev}" command is done twice.

Remove one ocurrence to avoid the duplication.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-05-19 21:39:36 +02:00
Fabio Estevam
3df5f19836 mx6slevk: Remove duplicated "mmc dev" command
The "mmc dev ${mmcdev}" command is done twice.

Remove one ocurrence to avoid the duplication.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-05-19 21:39:36 +02:00
Gaurav Jain
db74ced5df i.MX8 crypto/fsl: Enable fsl CAAM rng driver
rng driver enabled to read random number using caam.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-19 21:39:36 +02:00
Marek Vasut
ff04a0944d ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-19 21:39:36 +02:00
Fabio Estevam
d175982c20 imx8mn/8mp: Allow booting via USB
When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.

Specify the environment location when booting from USB.

Tested on a imx8mn-evk.

Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
2022-05-19 21:39:36 +02:00
Fabio Estevam
7038156447 imx8mn_ddr4_evk: Add USB Mass Storage support
Add USB Mass Storage support, which is a convenient way to flash
the eMMC card, for example.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-05-19 21:39:36 +02:00
Gaurav Jain
0c45c77b8a i.MX6SX: crypto/fsl: fix entropy delay value
RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-19 21:39:36 +02:00
Ye Li
9fd406de52 mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
2022-05-19 21:39:36 +02:00
Patrice Chotard
b6a469360a spi: stm32_qspi: Remove SR_BUSY bit check before sending command
Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-19 18:54:18 +02:00
Patrice Chotard
a6d7eeb66d spi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.

SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-19 18:54:18 +02:00
Marek Vasut
0adf10a87b ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96
The Avenger96 board comes in multiple regulator configurations.
 - rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
   boot and contains extra Enpirion EP53A8LQI DCDC converter which
   supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
 - rev.200L have Buck3 preconfigured to 1V8 operation and have no
   Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.

Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-19 18:48:50 +02:00
Tom Rini
f83bd23e2a Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Misc Kconfig cleanups (Chris & Pali)
- turris_omnia: Fix hangup in debug UART (this introduces
  TPL/SPL_DEBUG_UART_BASE) Pali
- mvebu: uDPU: include fixed-phy support (Robert)
- pinctrl: probe pinctrl drivers during post-bind (Robert)
2022-05-18 08:41:13 -04:00
Michal Simek
11ed38f5dc arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106
Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/db66a4bb501183ffbd033da4dd263afdb214f8ec.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
d5b9b22f7b arm64: zynqmp: Add linux,code for fwuen button
BTN_MISC looks like the most reasonable option for this button.
Button is used by firmware to indicate (after reset, power up) that user
wants to do firmware upgrade via firmware update utility.
For bootloader or OS is this just user button which is worth to have it
mapped.
Also button can be used as a wakeup source and pressing it for more time
can generate more chars that's why also adding wakeup-source and autorepeat
properties.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
e4f1d2881e arm64: zynqmp: Add PHY description for SGMII on vck190 SC
SGMII requires phy to be configured. The support for this has been added to
Linux and U-Boot already that's why also describe the phy via DT. Clock is
coming from si5332 chip (output 1) 125MHz which is only one GT line use on
this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8ad8d0c2fc9690cc90f95feddf87b0e94a685a43.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
T Karthik Reddy
725badc5a2 Revert "arm64: zynqmp: Add zynqmp firmware specific DT nodes"
This reverts commit 50a6bd000f.

As zynqmp mini emmc does not rely on firmware, remove firmware related
device tree modes from zynqmp mini emmc dts files.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e69b30d82b0307c563fe72630d9172e53964aeda.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
dda356db64 arm64: zynqmp: Add dmas, gpu, rtc, watchdogs and opp nodes for SOM
There are couple of IPs which are enabled in origin HW design which are
missing in SOM dt. Add them to match default setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/901401beacbea5931fc18cde20c157e5978a7023.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Vishal Patel
07f8e78af0 arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property
Add pwm-fan node to control fan through hwmon and change
pwm-cells property to 3 to allow fancontrol utility to
function correctly.

Signed-off-by: Vishal Patel <vishal.patel@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/21b4dfce3e45136a468974ea3dedca03320e27b8.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
d59fac2f3f arm64: zynqmp: Add power domain description for PL
PL has own power domain which is not described in DT. That's why add it
there by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b38e2ea95dab434bc007f9ed6c438c68149744bf.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
234f8be568 arm64: zynqmp: Fix opp-table-cpu
OPP table name now should start with "opp-table" and OPP entries
shouldn't contain commas and @ signs in accordance to the new schema
requirement.

The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra:
Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a
("ARM: dts: sunxi: Fix OPPs node name") or commit b7072cc5704d ("arm64:
dts: qcom: qcs404: Rename CPU and CPR OPP tables").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a1176349448df35127dbac15c1eeb2229505bae7.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Michal Simek
e7b390024c arm64: zynqmp: Add gpio labels for modepin
Using labels helps with better identifications of chips.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15b0f68077fb3c86d438caf8562de87367361c60.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Piyush Mehta
a4180c3696 arm64: zynqmp: Add mode-pin GPIO controller DT node
Add mode-pin GPIO controller DT node in zynqmp.dtsi and also setup default
reset-gpios property for usb which is default Xilinx setup.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f2a1f6f541c41075ea36062857031bfc28d6d303.1652262769.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Neal Frager
6be41ea4e6 arm64: zynqmp: zynqmp-sm-k26-revA: Fix DP PLL configuration
This patch fixes the DP audio and video PLL configurations for the zynqmp-sm-k26-revA som.

The Linux DP driver expects the DP to be using the following PLL config:
  - DP video PLL should use the VPLL (0x0)
  - DP audio PLL should use the RPLL (0x3)
  - DP system time clock PLL should use RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Register 0xFD1A007C configures the DP system time clock PLL.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa7e9abc419c9d7648405d1c62367dbe701d09b8.1652709736.git.michal.simek@amd.com
2022-05-18 13:17:54 +02:00
Ashok Reddy Soma
e9869f474c phy: zynqmp: Increase timeout value to 10ms
Observing psgtr pll timeouts with some usb hubs and devices behind it.
Increase timeout to 10ms to take care of it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220510131234.2650-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-18 13:17:54 +02:00
Amit Kumar Mahapatra
6e38e2ea79 arm64: zynqmp: Set qspi tx-buswidth to 4
In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due
to this the framework only issues 1-1-1 write commands to the GQSPI driver.
But the GQSPI controller is capable of handling 1-4-4 write commands, so
updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable
the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This
will increase the tx data transfer rate, as now the tx data will be
transferred on four lines instead on single line.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Michal Simek
10c29fa1cc xilinx: zynqmp: Do not guard SPL_FS_LOAD_PAYLOAD_NAME by SDHCI driver
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME is used by set_dfu_alt_info() for string
generation. It doesn't depend on SDHCI because the same file can be stored
to other non volatile memories like qspi.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/97434e122c6f8f042330b60d3e8de4c31f3e3f93.1652192580.git.michal.simek@amd.com
Link: https://lore.kernel.org/r/718de136c68c9a76fc7b4e536a727f401b05bfb9.1652702625.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Neal Frager
67bdaa0165 arm64: zynqmp: Fix split mode reset functionality
This patch fixes two issues in the set_r5_reset function.

1. When in split mode, the lpd_amba_rst bit should only be set when
both r5 cpu cores are in reset. Otherwise, if one r5 core is still
running, setting the lpd_amba_rst bit will cause an error for the
running core. The set_r5_reset function has been modified to check
if the other r5 core is still running before setting the lpd_amba_rst
bit.

2. The cpu_disable function was always assuming that the r5 cores
are in split mode when resetting either core 4 or 5. This is
incorrect for lockstep functionality. This patch adds a function
check_r5_mode to handle the cpu_disable function correctly for
the r5 cores by checking the mode and handling the reset appropriately.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d99cbd7f2394ac055ef27457298f554ff0747ba7.1651648344.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Neal Frager
2946c551f1 arm64: zynqmp: zynqmp-zcu102-revA: Fix DP PLL configuration
This patch fixes the DP audio and video PLL configurations for the
zynqmp-zcu102-revA evaluation board.

The Linux DP driver expects the DP to be using the following PLL config:
  - DP video PLL should use the VPLL (0x0)
  - DP audio PLL should use the RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b2eb87758e0cd4844e1754da8c58fce58d9cf683.1651740949.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Neal Frager
a3659640e0 arm64: zynqmp: zynqmp-zcu106-revA: Fix DP PLL configuration
This patch fixes the DP audio and video PLL configurations
for the zynqmp-zcu106-revA evaluation board.

The Linux DP driver expects the DP to be using the following PLL config:
  - DP video PLL should use the VPLL (0x0)
  - DP audio PLL should use the RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/62538b4a04dee28a6fc8ac5b85f8c845a5a76aa4.1651740988.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Neal Frager
80b8bbbf98 arm64: zynqmp: zynqmp-zcu106-rev1.0: Fix DP PLL configuration
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-rev1.0 evaluation board.

The Linux DP driver expects the DP to be using the following PLL config:
  - DP video PLL should use the VPLL (0x0)
  - DP audio PLL should use the RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ae42ad6185418713a473660c8d15903299af7764.1652192319.git.michal.simek@amd.com
2022-05-18 13:17:18 +02:00
Robert Marko
f9ec791b5e pinctrl: probe pinctrl drivers during post-bind
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.

So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.

This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.

So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Robert Marko
c7111e6ffd mvebu: uDPU: include fixed-phy support
uDPU relies on using fixed-phy for the SFP support, and since the
fixed-phy parsing was moved to the generic driver instead of mvneta
networking stopped working on uDPU with:
uDPU>> dhcp
dm_eth_phy_connect failed

This is due to the conversion commit not enabling fixed-phy support
in defconfig like it did for other boards.

Fixes: 77fcf3cf12 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
29dd6e475a arm: mvebu: turris_{omnia,mox}: Enable CONFIG_NETCONSOLE
This allows to use U-Boot console on Turris devices via network.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
5be172819f arm: mvebu: Fix DEBUG_UART_BASE for all 32-bit boards
UART base address is located in internal registers.

Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000
and in proper U-Boot at address 0xf1000000.

Fix DEBUG_UART_BASE option for all 32-bit mvebu boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
2418c1f56f arm: mvebu: turris_omnia: Fix DEBUG_UART_BASE
Internal registers in SPL are at address 0xd0000000 and in proper U-Boot at
address 0xf1000000. UART base address is located in internal registers.

Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot.

This change fixes hangup of proper U-Boot when it is trying to print
something via debug UART.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
d293759d55 serial: ns16550: Add support for SPL_DEBUG_UART_BASE
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
958789f026 serial: Add new config option TPL_DEBUG_UART_BASE
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-17 06:44:06 +02:00
Pali Rohár
9f971ff714 serial: Add new config option SPL_DEBUG_UART_BASE
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.

In some cases base address of UART is different in SPL and proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:34 +02:00
Pali Rohár
5bb2c550b1 arm: mvebu: Move internal registers in arch_very_early_init() function
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE
needs to be done very early, prior calling any function which may touch
internal registers, like debug_uart_init().

So do it earlier in arch_very_early_init() instead of arch_cpu_init().

Movement is done in proper U-Boot, not in SPL. SPL may return to bootrom
and bootrom requires internal registers at (old) expected location.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:34 +02:00
Pali Rohár
948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:33 +02:00
Chris Packham
1001a0ab46 arm: mvebu: Remove unused ARMADA_64BIT
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64
directly. Remove the unused config item.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:33 +02:00
Pali Rohár
008468fa35 cmd: mvebu: Hide bubt specific options when bubt is disabled
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and
CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not
enabled. So hide them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:33 +02:00
T Karthik Reddy
155353234e mmc: zynq_sdhci: Add weak function prototype
zynqmp_pm_is_function_supported() which checks feature support on som,
which is implemented in firmware_zynqmp.c driver. As mini configuration
does not use firmware driver, so create a weak function to avoid
compilation error on zynqmp mini configuration.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c60655a509956b8fc3a81671a7dc51157f3973db.1651048030.git.michal.simek@xilinx.com
2022-05-13 09:10:02 +02:00
T Karthik Reddy
1720336d3c Revert "arm64: xilinx: Set CONFIG_ZYNQMP_FIRMWARE config for mini emmc"
This reverts commit 122ca834f2.

Disable CONFIG_ZYNQMP_FIRMWARE config from zynqmp & versal mini emmc
defconfig files, as mini emmc does not use any firmware.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f73a50980d3af894f1e86cfc98742dbdec573760.1651048242.git.michal.simek@xilinx.com
2022-05-13 09:10:02 +02:00
Michal Simek
9c563e916c xilinx: Handle board_get_usable_ram_top(0) properly
board_get_usable_ram_top() was designed for getting the top most location
for U-Boot allocation that's why function itself supports via total_size
parameter to find out where the right location for U-Boot is.
But function itself is also reused by different (EFI) which is passing
total_size as 0 to find out where the usable ram top is. For this case
doesn't make sense (a waste time) to call any lmb functions.
That's why simply return gd->ram_top.

And gd->ram_top is filled already based on previous call for U-Boot iself.
The same solution is also used by stm32mp by commit 92b611e8b0 ("stm32mp:
correctly handle board_get_usable_ram_top(0)") and commit c8510e397f
("stm32mp: Fix board_get_usable_ram_top()").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/44470619e74f3e480b70deac24578e3e0d5c907e.1651225945.git.michal.simek@amd.com
2022-05-13 09:10:02 +02:00
Michal Simek
303198e26d soc: xilinx: zynqmp: fix out of bounds array access
The call to xilinx_pm_request requires an array of a larger size.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5f1409de285d7454af171a54e5f115da9d82c44e.1650440343.git.michal.simek@xilinx.com
2022-05-13 09:10:02 +02:00
Jorge Ramirez-Ortiz
9b31e109b2 soc: xilinx: versal: fix out of bounds array access
The call to xilinx_pm_request requires an array of a larger size.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20220416181530.2311155-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-05-13 09:10:02 +02:00
Tom Rini
c387e62614 Merge branch '2022-05-11-Kconfig-cleanups-etc'
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in
  more places, rename SPL_LEGACY_IMAGE_SUPPORT to
  SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI
  platforms.
2022-05-11 13:27:44 -04:00
Ralph Siemsen
db26c507c9 Makefile: update warning about CONFIG_OF_EMBED
Update the diagnostic message with revised location of document, which
changed in 3e9fddfc4f ("doc: Move devicetree control doc to rST")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
2022-05-11 09:22:24 -04:00
Ovidiu Panait
13ae36cc8d board_r: use IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) in board_init_r()
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
initcall pointers.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2022-05-11 09:22:24 -04:00
Chris Packham
54a54a6313 Convert CONFIG_MTD_CONCAT to Kconfig
This converts the following to Kconfig:
  CONFIG_MTD_CONCAT

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-11 09:22:24 -04:00
Rasmus Villemoes
cff2963693 common/console.c: use CONFIG_VAL() with PRE_CON_BUF_* variables
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if
and when that gets implemented, one would almost certainly want to use
a different address and/or size for the buffer (e.g., U-Boot proper
might specify an address in DRAM and a generous buffer, while SPL
would be much more constrained).

So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the
code use SPL_-specific values. No functional change.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-05-11 09:22:24 -04:00
Andrew Davis
042e87e835 boot: Kconfig: Enable FIT processing by default on TI secure devices
TI secure devices chain-of-trust depends on FIT image processing,
enable it by default on these devices. This also reduces the delta
between the secure and non-secure defconfig files.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11 09:22:24 -04:00
Andrew Davis
52dc3343fd boot: Kconfig: Disable non-FIT loading for TI secure devices
Non-FIT image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot checks.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11 09:22:24 -04:00
Andrew Davis
11f32da79f spl: Force disable non-FIT loading for TI secure devices
Booting of non-FIT images bypass our chain-of-trust boot flow,
these options should not be allowed when high security is set.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11 09:22:24 -04:00
Andrew Davis
6665ab1795 spl: Rename Kconfig SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMAT
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11 09:22:24 -04:00
Tom Rini
21e25992c8 Merge tag 'u-boot-stm32-20220510' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add new STM32 MCU boards and Documentation
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
2022-05-10 15:28:02 -04:00
Tom Rini
b4eb577663 Merge tag 'i2c-2022-07' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 2022.07

- i2c: ihs: intel: Fix typo in comments
  Patch from Michal

- misc: atsha204a: Add support for atsha204 chip
  from Pali
2022-05-10 09:52:00 -04:00
Sean Anderson
381277410d misc: Fix always compiling MISC even for SPL/TPL
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.

Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-10 09:51:50 -04:00
Patrice Chotard
e198d4fe7c doc: Add documentation for STM32 MCUs
Add documentation for STM32 MCUs (F4, F7 and H7 series).

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
eda7b6a632 configs: stm32746g-eval: Add stm32746g-eval_spl_defconfig
Add stm32746g-eval_spl_defconfig for stm32746g evaluation board to
build SPL.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
e9881a1e75 configs: stm32746g-eval: Add stm32746g-eval_defconfig
Add stm32746g-eval_defconfig for stm32746g evaluation board to
build U-Boot proper.

Full board description can be found here :
https://www.st.com/en/evaluation-tools/stm32746g-eval.html

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
7aa4b4523f configs: stm32f746-disco: use CONFIG_DEFAULT_DEVICE_TREE as fdtfile
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar
except their respective device tree file. These 3 boards uses the same
TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h
and same board file board/st/stm32f746-disco/stm32f746-disco.c)

To be able to compile these 3 boards, replace the hard-coded device-tree
name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE
which is set in each board defconfig file with the correct value.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
16613edbc1 board: stm32f746-disco: Fix dram_init() in none SPL config
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow
dram_init() execution when using none SPL defconfig
(stm32f746-disco_defconfig).

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
35a15bc12e configs: stm32f746-disco: Migrate SPL flags to defconfig
Migrate SPL flags to stm32f746-disco_spl_defconfig

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:12 +02:00
Patrice Chotard
5ff7f0490d configs: stm32f769-disco: Migrate SPL flags to defconfig
Migrate SPL flags to stm32f769-disco_spl_defconfig

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
bad1b79028 configs: stm32f769-disco: Add stm32f769-disco_defconfig
Add stm32f769-disco_defconfig for stm32f769 discovery board to
build U-Boot proper.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
969bc0aece configs: stm32f769-disco: Rename stm32f769-disco_defconfig to stm32f769-disco_spl_defconfig
The current stm32f769-disco_defconfig file supports SPL, rename it to
stm32f769-disco_spl_defconfig to reflect the supported configuration.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
50f48340f0 configs: stm32f746-disco: Add stm32f746-disco_defconfig
Add stm32f746-disco_defconfig for stm32f746 discovery board to
build U-Boot proper.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
0d4ef527da configs: stm32f746-disco: Rename stm32f746-disco_defconfig to stm32f746-disco_spl_defconfig
The current stm32f746-disco_defconfig file supports SPL, rename it to
stm32f746-disco_spl_defconfig to reflect the supported configuration.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
480995b76b configs: stm32f746-disco: Concatenate spl and u-boot binaries
This allows to concatenate spl and u-boot binaries together.
Previously, both binaries has to be flashed separately at the correct
offset (spl at offset 0 and u-boot at offset 0x8000).
With this patch, only one binary is generated (u-boot-with-spl.bin)
and has to be copied in flash at offset 0 using openocd for example
or simply copied in exported mass storage.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Marek Vasut
05a3a028c1 clk: stm32mp1: Add missing newline
Add missing newline to this debug message, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
67899c2201 board: st: stm32mp1: Consider USB cable connected when boot device is USB
Always consider USB cable is connected when USB boot device is detected.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:11 +02:00
Patrice Chotard
da6473c0d4 phy: stm32-usbphyc: stm32-usbphyc: Add DT phy tuning support
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:56:07 +02:00
Patrice Chotard
427f452cb9 gpio: stm32_gpio: Rework GPIO hole management
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
  If GPIO bank have 16 GPIO pins [0-15].
  In particular SoC's package case, some GPIO bank can have less GPIO pins:
    - [0-10] => 11 pins;
    - [2-7] => 6 pins.

Commit dbf928dd26 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.

To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.

stm32_offset_to_index() is no more needed and removed.

This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:

Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0          : unknown
GPIOI1          : unknown
GPIOI2          : analog
GPIOI3          : analog
GPIOI4          : alt function 0 push-pull pull-down
GPIOI5          : alt function 0 push-pull pull-down
GPIOI6          : alt function 0 push-pull pull-down
GPIOI7          : analog
GPIOI8          : unknown
GPIOI9          : unknown
GPIOI10         : unknown
GPIOI11         : unknown
GPIOI12         : unknown
GPIOI13         : unknown
GPIOI14         : unknown
GPIOI15         : unknown

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:54:48 +02:00
Patrice Chotard
234b03f3a9 pinctrl: pinctrl_stm32: Use GPIOF_UNKNOWN to indicate not mapped pins
GPIOF_UNKNOWN becomes a valid pin muxing information to indicate
that a pin is not mapped.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:54:48 +02:00
Patrice Chotard
4382e55c42 pinctrl: pinctrl_stm32: Update pinmux_mode definition
pinmux_mode[] is linked to gpio_function[] defined in gpio-uclass.c
So reuse the same gpio_func_t enum value

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10 13:54:48 +02:00
Patrick Delaunay
8202c958cf ARM: stm32: Use CONFIG_TFTP_TSIZE on STMicroelectronics boards
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:48 +02:00
Marek Vasut
6d4619f68c ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.

The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Marek Vasut
473c7d72e4 ARM: stm32: Use CONFIG_TFTP_TSIZE on DHSOM
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Marek Vasut
9da04c17a3 ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
The DHCOM does ship with KS8851 with 1.5 kiB packet buffer. The DHSOM
may be extended with other MAC options connected to FMC2 bus, like the
DM9000, wih similar limitations. Use default CONFIG_TFTP_BLOCKSIZE of
1468 Bytes instead of 1536 Bytes, which always avoids overflowing the
packet buffers of such limited MACs, which leads to e.g. TFTP timeouts.
This also avoids receiving a short packet fragment at the end of each
TFTP block, which led to reduced performance.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Marek Vasut
d6ae183965 stm32mp: psci: Retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
The SoC seems to lose the values of MCUDIVR, PLL3CR, PLL4CR, RCC_MSSCKSELR
during suspend/resume cycle, cache them and reinstate their values on resume.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Marek Vasut
221869efc3 ram: stm32mp1: Conditionally enable ASR
Enable DRAM ASR, auto self-refresh, conditionally, based on DT PWRCTL
register bits. While ASR does save considerable amount of power at
runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be enabled on portable and battery operated devices.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Patrick Delaunay
189ec2fee6 arm: dts: stm32mp15: alignment with v5.18
Device tree alignment with Linux kernel v5.18-rc2:
- ARM: dts: stm32: Add support for the emtrion emSBC-Argon
  (only the pincontrol part)
- ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node
- ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
- ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
- ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on
  stm32mp157
- ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151
- ARM: dts: stm32: keep uart4 behavior on *
- ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 13:54:47 +02:00
Patrick Delaunay
655af9aa9c ARM: stm32mp: correctly handle Silicon revision
Handle correctly the silicon revision = REV_ID[15:0] of Device Version
and the associated device marking, A to Z on STMicroelectronics STM32MP
SOCs.

This patch prepare the introduction of next STM32MP family,
with STM32MP13x Rev.Z for REV_ID = 1.1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
6a69eaf6f4 ARM: stm32mp: skip ft_system_setup when the soc node is absent
The function ft_system_setup shouldn't return an error when the
/soc node is absent in the provided device tree but just skip the
updates.

This patch solves an issue when the U-Boot pytest is executed on board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
5367b67be4 configs: stm32mp1: Add support for baudrates higher than 115200 for st-link
On STMicroelectronics boards, the UART can reliably go up to
2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15

Unfortunately U-Boot will fall back to 115200 unless higher rates are
declared via CONFIG_SYS_BAUDRATE_TABLE.

This patch add the support of higher baudrates on STMicroelectronics
boards with ST-LINK.

Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
806c4dd315 configs: stm32mp1: set the console variable for extlinux.conf
Set the environment variable "console", used in extlinux.conf file when it
is generated by YOCTO distribution with:

UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}"

With these 2 variables, U-Boot give dynamically the used console and
baudrate in the Linux kernel bootargs.

For the STMicroelectronics boards, the used console is ttySTM0.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
1494e37586 board: st: common: fix the error messages in stboard command
Add missing \n at the end of the error trace

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Yannick Fertre
13dc7562b6 video: stm32: stm32_ltdc: support several hardware versions
Register mapping & pixel formats depend on version of ltdc
display controller.

Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Yannick FERTRE
ef4ce6df32 video: stm32: stm32_ltdc: fix data enable polarity
Wrong DISPLAY_FLAGS used to set the data enable polarity.

Signed-off-by: Yannick FERTRE <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
a9fed5aac5 stm32mp: stm32prog: handle flashlayout without STM32 image header
Accept flashlayout without header in alternate 0, to simplify
the support of stm32prog command with dfu-util.

By default the flashlayout file size is the size of the received binary,
provided with the offset in the DFU alternate.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
152576a598 stm32mp: stm32prog: handle U-Boot script in flashlayout alternate
Update the stm32prog command to allow the reception of U-Boot script in
the FlashLayout alternate during the first USB enumeration.

This patch is aligned with the last TF-A behavior: the Flashlayout
is now loaded by U-Boot; it is no more present at STM32_DDR_BASE when
the stm32prog is launched after a serial boot, on UART or on USB.

The received script must be a U-Boot legacy image, no more need to add
a stm32image header.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
7f1121a85a stm32mp: stm32prog: handle interruption during the first enumeration
When an interruption is received during the first USB enumeration
used to received the FlashLayout, with handle ctrl-c, the second
enumeration is not needed and the result for stm32prog_usb_loop
is false (reset is not needed).

This patch avoids the need of a second ctrl to interrupt the command
stm32prog.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
2a4fe0ee48 stm32mp: stm32prog: add support of UUID for FIP partition
Add support of UUID for FIP parttion, required by Firmware update
support in TF-A:
- UUID TYPE for FIP partition: 19d5df83-11b0-457b-be2c-7559c13142a5
- "fip-a" partition UUID: 4fd84c93-54ef-463f-a7ef-ae25ff887087
- "fip-b" partition UUID: 09c54952-d5bf-45af-acee-335303766fb3

This check is done with a new partition type "FIP" associated
at the FIP UUID.

The A/B partition UUID is detected by the partition name:
"fip-a", "fip-b".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
49d0ecb123 stm32mp: stm32prog: add support of STM32IMAGE version 2
Add support of new header for the STM32IMAGE version V2
in command stm32prog command for STM32MP13x family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
e82ab4c890 stm32mp: stm32prog: add TEE support in stm32prog command
When OP-TEE is used, the SMC for BSEC management are not
available and the PTA provisioning for OTP must be used.

U-Boot opens the session to this PTA and use it for OTP
access.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
72450b4b35 stm32mp: stm32prog: add CONFIG_CMD_STM32PROG_OTP
Add a configuration flag CONFIG_CMD_STM32PROG_OTP to enable the support of
OTP update in stm32prog command.

This new configuration allows to deactivate this feature for security reason
and it is a preliminary step for support of OPT update with the OP-TEE
provisioning TA.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Patrick Delaunay
d983e503c4 stm32mp: stm32prog: fix comment
Fix "partition" in comment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10 10:56:39 +02:00
Pali Rohár
89eabd2f35 misc: atsha204a: Add support for atsha204 chip
atsha204 chip is predecessor of atsha204a chip. Current U-Boot driver
atsha204a-i2c.c can use both atsha204 and atsha204a chips because it does
not call specific functions to just one of these chips.

So just add compatible string for atsha204.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-05-10 06:48:05 +02:00
Pali Rohár
25965e8613 doc: Add device-tree-bindings for atsha204 and atsha204a
Document trivial bindings for atsha204 and atsha204a.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-05-10 06:47:38 +02:00
Michal Simek
a6cc0b082f i2c: ihs: intel: Fix typo in comments (actual)
s/actucal/actual/g

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-05-10 06:47:13 +02:00
Tom Rini
f6973cce6a Merge branch '2022-05-09-TI-platform-updates'
- Assorted minor TI platform updates
2022-05-09 13:40:35 -04:00
Neil Armstrong
28a4c31134 ARM: dts: k3-am642-sk-u-boot: add PMIC node
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this adds the PMIC node with the required regulators voltages.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2022-05-09 13:40:24 -04:00
Neil Armstrong
75388a8e21 config: enable TPS65219 for am64x_evm_a53 boards
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this enables the necessary options to load and control the
PMIC regulators.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2022-05-09 13:40:24 -04:00
Neil Armstrong
411502ccb8 regulator: add driver for the TPS65219 BUCK & LDO regulators
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.

This adds the driver for the Buck converters & linear regulators.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2022-05-09 13:40:24 -04:00
Neil Armstrong
b5cfa0c7ca power: add driver for the TPS65219 PMIC
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.

This adds the PMIC driver, loading the regulator sub-nodes.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2022-05-09 13:40:24 -04:00
Pali Rohár
c7484ce091 Nokia RX-51: Convert to CONFIG_DM_SERIAL
For CONFIG_DM_SERIAL it is required to increase CONFIG_SYS_MALLOC_F_LEN as
default value is not enough for memory hungry CONFIG_DM_SERIAL code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
2022-05-09 13:40:24 -04:00
Pali Rohár
f017c817a8 Nokia RX-51: Enable CONFIG_SUPPORT_RAW_INITRD
This enable booting of Debian systems which use raw initrd image (instead
of uInitrd created by mkimage). This change increase size of u-boot.bin
binary by just 64 bytes.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-09 13:40:24 -04:00
Gireesh Hiremath
655a93f079 am335x, guardian: Drop non DM_I2C code
On this platform DM_I2C and SPL_DM_I2C enabled.
Remove legacy code.

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-09 13:40:24 -04:00
Gireesh Hiremath
75878e9f13 configs: am335x_guardian: Enable DM_I2C
Move from I2C legacy to the DM I2C version

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-09 13:40:23 -04:00
Gireesh Hiremath
e61374b7af ARM: dts: am335x: guardian: switch to AM33XX_PADCONF
switch the pin definitions from AM33XX_IOPAD to AM33XX_PADCONF macro

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-09 13:40:23 -04:00
Tom Rini
f08ed34371 Prepare v2022.07-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-09 12:49:31 -04:00
Tom Rini
20cd58479f Merge tag 'efi-2022-07-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc3-2

UEFI:
* Fix build errors due to
  - using sed with non-standard extension for regular expression
  - target architecture not recognized for CROSS_COMPILE=armv7a-*
  - CONFIG_EVENT not selected
* add sha384/512 on certificate revocation

Others:
* factor out the user input handling in bootmenu command
2022-05-08 11:31:48 -04:00
Tom Rini
258a57907d Merge branch '2022-05-06-assorted-updates'
- Drop "linux,phandle" setting code, it's very long obsolete.
- Add ability to fix broken GPT via backup GPT.
2022-05-08 11:29:50 -04:00
Ilias Apalodimas
4b49477057 test/py: Add more test cases for rejecting an EFI image
The previous patch adds support for rejecting images when the sha384/512
of an x.509 certificate is present in dbx.  Update the sandbox selftests

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-05-07 23:17:26 +02:00
Ilias Apalodimas
b436cc6a57 efi_loader: add sha384/512 on certificate revocation
Currently we don't support sha384/512 for the X.509 certificate
in dbx.  Moreover if we come across such a hash we skip the check
and approve the image,  although the image might needs to be rejected.

Rework the code a bit and fix it by adding an array of structs with the
supported GUIDs, len and literal used in the U-Boot crypto APIs instead
of hardcoding the GUID types.

It's worth noting here that efi_hash_regions() can now be reused from
efi_signature_lookup_digest() and add sha348/512 support there as well

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-05-07 23:17:26 +02:00
Masahisa Kojima
3ae6cf5400 bootmenu: factor out the user input handling
This commit moves the user input handling from cmd/bootmenu.c
to common/menu.c to reuse it from other modules.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-07 23:17:26 +02:00
Jan Kiszka
6ae494831d efi_loader: Select EVENT as well
Fixes

WARNING: unmet direct dependencies detected for EVENT_DYNAMIC
  Depends on [n]: EVENT [=n]
  Selected by [y]:
  - EFI_LOADER [=y] && OF_LIBFDT [=y] && ...

and the succeeding build breakage.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-07 23:17:26 +02:00
Heinrich Schuchardt
e927e21c07 tools: mkimage: set OPENSSL_API_COMPAT
Building with OpenSSL 3.0 produces warnings like:

../tools/sunxi_toc0.c:846:17: warning: ‘RSA_get0_d’ is deprecated:
Since OpenSSL 3.0 [-Wdeprecated-declarations]
  846 |                 if (root_key && RSA_get0_d(root_key)) {
      |                 ^~

As OpenSSL 3.0 is not available in elder Linux distributions
just silence the warning.

Add missing #include <openssl/bn.h>.

Fixes: e9e87ec47c ("tools: mkimage: Add Allwinner TOC0 support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
2022-05-07 23:17:25 +02:00
Sean Anderson
deb2638aa0 mkimage: Document misc options
Over the years, several options have not made it into the help message.
Document them. Do the same for the man page.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-05-07 23:17:25 +02:00
Heinrich Schuchardt
ecd4e5cf18 Makefile: support CROSS_COMPILE=armv7a-*
Gentoo uses armv7a-hardfloat-linux-gnueabi- as cross compiler prefix.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-07 23:17:25 +02:00
Mark Kettenis
1a16e66e65 Makefile: Avoid non-portable GNU sed extension
Use [:space:] instead of \s and \S in regular expression that
determines the sandbox target architecture.  Fixes the build
failure on OpenBSD introduced with commit 4e65ca00f3
("efi_loader: bootmgr: add booting from removable media").

Fixes: f7691a6d73 ("sandbox: allow cross-compiling sandbox")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-05-07 23:17:25 +02:00
John Keeping
9ac4c2bfe9 fdt: don't set linux,phandle
This has been deprecated for over 10 years and everything now uses the
plain "phandle" property in preference.  There's no need to set
linux,phandle when creating phandles for nodes that do not have one.

dtc changed the default to creating just phandle in version 1.4.5
released in September 2017 with the justification that the new style had
already been supported for 7 years by that point (see dtc commit 0016f8c
("dtc: change default phandles to ePAPR style instead of both")).

Signed-off-by: John Keeping <john@metanate.com>
2022-05-06 16:34:07 -04:00
Philippe Reynes
b6b6a90646 test: py: tests: test_gpt.py: add a simple test for the command gpt repair
Adds a simple test for the command gpt repair.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-05-06 14:39:15 -04:00
Philippe Reynes
26f404c766 cmd: gpt: add subcommand repair
Adds a sub-command repair to the command gpt
that allow to repair a corrupted gpt table. If
the both gpt table (primary and backup) are
valid, then the command does nothing.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-05-06 14:39:15 -04:00
Philippe Reynes
5c783b54d6 disk: part_efi: add support to repair gpt table
If a gpt table is corrupted (after a power cut
for example), then the gpt table should repaired.
The function gpt_repair_headers check if at least
one gpt table is valid, and then only write the
corrupted gpt table.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-05-06 14:39:15 -04:00
Tom Rini
145921bdbd Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-05-06 08:57:15 -04:00
Tom Rini
0a6bf9f1ea Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- Add MAX6370 watchdog timer driver (Pali)
2022-05-06 08:57:03 -04:00
Patrice Chotard
6aa8bde878 usb: host: ehci-generic: Remove DM_REGULATOR flag
Since commit 16cc5ad0b4 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-06 10:38:39 +02:00
Patrice Chotard
ba96176ab7 usb: host: ehci-generic: Make usage of clock/reset bulk() API
Make usage of clock and reset bulk API in order to simplify the code

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-06 10:38:39 +02:00
Pali Rohár
0a095fc53b watchdog: Add MAX6370 watchdog timer driver
MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-06 07:06:51 +02:00
Tom Rini
03b873b4f4 Merge branch '2022-05-05-assorted-cleanups-and-fixes'
- Assorted minor code cleanups.
- Clean-up the reset uclass code slightly and fix some issues with a
  lack of handlers for a case in the driver.
- Y2038 RTC fix
2022-05-05 19:37:22 -04:00
Pali Rohár
aa5ea20c71 misc: fs_loader: Fix compile warnings when CONFIG_CMD_UBIFS is enabled
drivers/misc/fs_loader.c: In function ‘mount_ubifs’:
drivers/misc/fs_loader.c:46:12: warning: implicit declaration of function ‘ubi_part’ [-Wimplicit-function-declaration]
  int ret = ubi_part(mtdpart, NULL);
            ^~~~~~~~
drivers/misc/fs_loader.c:53:9: warning: implicit declaration of function ‘cmd_ubifs_mount’ [-Wimplicit-function-declaration]
  return cmd_ubifs_mount(ubivol);
         ^~~~~~~~~~~~~~~
drivers/misc/fs_loader.c: In function ‘umount_ubifs’:
drivers/misc/fs_loader.c:58:9: warning: implicit declaration of function ‘cmd_ubifs_umount’ [-Wimplicit-function-declaration]
  return cmd_ubifs_umount();
         ^~~~~~~~~~~~~~~~

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-05 19:37:11 -04:00
Marek Vasut
0be4b0b651 reset: Return 0 if ops unimplemented and remove empty functions
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each reset driver. Drop all those empty functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2022-05-05 19:37:11 -04:00
Heinrich Schuchardt
d657766819 clk: scmi: fix scmi_clk_get_attibute()
Local variable out.name lives on the stack and therefore cannot
be returned directly. Move the strdup() call into the function.
(Coverity 352460)

Fixes: 7c33f78983 ("clk: scmi: register scmi clocks with CCF")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-05-05 19:37:11 -04:00
Mark Kettenis
616571804a tools: mkimage: Avoid ENODATA in host tools
ENODATA isn't part of POSIX.  Use EINVAL instead.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-05 19:37:11 -04:00
Oliver Graute
8b42439ad1 rtc: rv8803: fix off-by-one in month counting
tm_mon has a range from 0..11, but the RTC expects 1..12. So we adapt
the month accordingly. This was determined when comparing the driver
with the corresponding linux kernel driver.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-05-05 15:06:02 -04:00
Heinrich Schuchardt
2743470306 cmd: mmc: don't assign unused values
Don't assign a value to variable speedmode which is never used.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-05 15:06:02 -04:00
Heinrich Schuchardt
6d81319728 cmd: onenand: fix printf codes
For printing size_t use %zu or %zx.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-05 15:06:02 -04:00
Heinrich Schuchardt
54d24d7260 cmd: simplify do_adc_single()
If argc is not < 3, it must be >= 3.

If argc >= 3, argv[2] cannot be NULL.

Fixes: 9de612ae4d ("cmd: adc: Add support for storing ADC result in env variable")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-05 15:06:02 -04:00
Heinrich Schuchardt
e4269636be cmd: fix long text for fdt command
We don't have an option -cq but two distinct options -c and -q.

Fixes: e9496ec374 ("fdt: Add -q option to fdt addr for distro_bootcmd")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-05 15:06:02 -04:00
Jan Kiszka
90c52423be lib/date: Make rtc_mktime and mktime64 Y2038-ready
We currently overflow due to wrong types used internally in rtc_mktime,
on all platforms, and we return a too small type on 32-bit.

One consumer that directly benefits from this is mktime64. Many others
may still store the result in a wrong type.

While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
714209832d).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-05-05 15:06:02 -04:00
Sean Anderson
bfae2744dd serial: smh: Check return value of strndup
strndup can fail. Check for it.

Fixes: 4855b39be ("serial: smh: Implement puts for DM")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-05-05 15:06:02 -04:00
Nicolas Heemeryck
30705cd892 tools/imagetool: Fix segfault when tparams->verify_header is NULL
On some image types like i.MX8 and i.MX8M, the verify_header function
is not implemented.

Before this commit, no check on tparams->verify_header was done causing
a segfault if NULL. Now, a proper error message is printed.

Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@gmail.com>
2022-05-05 15:06:02 -04:00
Tom Rini
5d834bfa5f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-05 14:47:31 -04:00
Tom Rini
ae242b2ea6 Merge branch '2022-05-05-platform-updates'
- Nuvoton NPCM750 board support and some related drivers
- MediaTek pinctrl updates
- Bugfixes for sandbox, ls10xxx, and 64bit TI platforms
2022-05-05 14:42:02 -04:00
Stanley Chu
344e86c61e gpio: npcm: Add support for Nuvoton NPCM SoCs
Add Nuvoton BMC NPCM7xx/NPCM8xx gpio driver

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2022-05-05 09:29:58 -04:00
Aswath Govindraju
56717a1388 include: configs: am**x/j721e/j721s2_evm.h: Move the stack pointer init address in arm64
Currently, in case of arm64 bootloader and U-Boot the stack pointer is
initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text
base address. After jumping to arm64, execution is done out of DDR.
Therefore, having an offset corresponding to the size of MSRAM does not
have any significance.

Instead, initialize the stack pointer after an offset of 4MB from the SPL
text base address. This helps in allocating larger memory for stack.

  ┌────────────────────┐0x80080000
  │                    │
  │   arm64 SPL        │
  ├────────────────────┤
  │        ▲           │
  │        │           │
  │      STACK         │
  ├────────────────────┤0x80480000
  │ Memory for Load    │
  │ Buffer Allocation  │
  ├────────────────────┤0x80800000
  │                    │
  │    U-Boot Image    │
  │                    │
  └────────────────────┘

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-05-05 09:29:58 -04:00
Sam Shih
1a80ef5520 pinctrl: mediatek: add support for different types of IO pins
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2022-05-05 09:29:58 -04:00
Sam Shih
10334e0bc8 pinctrl: mediatek: introduce multiple memory bases support
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.

This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.

When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2022-05-05 09:29:58 -04:00
Sam Shih
dafe0fbfb0 pinctrl: mediatek: rewrite mtk_pinconf_set and related functions
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.

This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2022-05-05 09:29:57 -04:00
Simon Glass
ccf24a9d77 sandbox: Avoid binman error when run without device tree
With sandbox, U-Boot can be run without a device tree (i.e. no -d or -T
parameter). In this case an empty device tree is created for convenience.
With a recent change this causes an error due to the missing '/binman'
node.

Add this node to avoid the problem, as well as a test that U-Boot can
be run without a device tree.

Fixes: 059df5624b ("arch: Kconfig: imply BINMAN for SANDBOX")
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/11
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-05 09:29:57 -04:00
Simon Glass
ee93f6129d test/py: Add a way to start sandbox without a device tree
This is useful sometimes when running a specific test. Add support for it
in the existing restart_uboot_with_flags() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-05 09:28:48 -04:00
Masami Hiramatsu
55a8bb94f9 board: synquacer: developerbox: Remove Masami from MAINTAINERS
Remove Masami Hiramatsu from MAINTAINERS since he will leave
Linaro and his email will be not available anymore.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-05-05 09:28:48 -04:00
Sean Anderson
3166e6fd45 ls10xxx: Use a sane SPL_SYS_MALLOC_F_LEN default
SPL_SYS_MALLOC_F_LEN defaults to SYS_MALLOC_F_LEN. 0x10000 is 64 KiB, or
around half of the total OCRAM size. Revert to the default of 0x2000. This
fixes SPL boot.

Fixes: 545eceb520 ("imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-05 09:28:47 -04:00
Jim Liu
b789e4f215 timer: npcm: Add NPCM timer support
Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2022-05-05 09:28:47 -04:00
Jim Liu
6f6a0b74d6 serial: npcm: Add support for Nuvoton NPCM SoCs
Add Nuvoton BMC NPCM7xx/NPCM8xx uart driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2022-05-05 09:28:47 -04:00
Jim Liu
c7554574ff clk: nuvoton: Add support for NPCM750
Add clock controller driver for NPCM750

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-05-05 09:28:47 -04:00
Jim Liu
84335544ea arm: nuvoton: Add support for Nuvoton NPCM750 BMC
Add basic support for the Nuvoton NPCM750 EVB (Poleg).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-05 09:28:47 -04:00
Tom Rini
1739a6db54 Merge tag 'efi-2022-07-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc2-2

* Test
  Unit test for 'bootmenu' command

* UEFI
  Preparatory patches for implementing a UEFI boot options based menu
2022-05-04 12:08:40 -04:00
Tom Rini
c3d451d5e6 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mips: octeon: Add ethernet support (Aaron & Stefan)
- Misc mvneta changes, cleanups, fixes (Marek)
2022-05-04 09:05:03 -04:00
Tom Rini
4209f74445 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
- NPCM7xx FIU SPI driver (Jim Liu)
- AT45DB641E dataflash (Luca Ellero)
2022-05-04 09:04:43 -04:00
Marek Behún
95a3a6ee08 net: mvneta: Drop unneeded macro
Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
bdbda1e826 net: mvneta: Disable fixed PHY code if PHY_FIXED is not compiled in
Guard the code handling the fixed PHY case by
CONFIG_IS_ENABLED(PHY_FIXED).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
38332211e3 net: mvneta: Drop fixed_link member from private struct
Since this member is checked only at two places drop it and inline it's
usage.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
e06c7f34d2 net: mvneta: Write PHY address just before enabling HW polling
Write PHY address just before enabling HW polling of the PHY.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
77fcf3cf12 net: mvneta: Convert to use PHY_FIXED for fixed-link
Stop parsing fixed-link in the MAC driver. Instead support only PHY mode
and let the fixed PHY driver handle the fixed-link case.

Enable CONFIG_PHY_FIXED for mvneta boards that need it: Turris Omnia and
ESPRESSObin.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
31f4ccca0a net: mvneta: Rename CONFIG_NR_CPUS to MVNETA_NR_CPUS
The CONFIG_* macros are reserved for Kconfig. This was probably done
when this driver was being imported from Linux. Rename the macro.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
730dad9919 net: mvneta: Don't check for CONFIG_PHYLIB
Drop checking for CONFIG_PHYLIB in mvneta, this is already done in
Kconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
824f2f9cd9 net: mvneta: Drop unnecessary space
Drop unnecessary space in mvneta_adjust_link().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
3b38fad182 net: mvneta: Use bool instead of int for boolean variable
Use the bool type instead of int for status_change variable.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
ca4730a466 net: mvneta: Drop one indentation level in mvneta_adjust_link()
Drop one indentation level in the mvneta_adjust_link() function.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
7ec50404ae net: mvneta: Fix unused variable warning if DM_GPIO is disabled
The `ret` variable in mvneta_probe() is unused if DM_GPIO is disabled.

Since the variable is used only once after assigning value, we can
inline the usage and drop the variable.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
1d87904c15 net: mvneta: Don't register MDIO bus
This MDIO bus is now handled by a proper mvmdio DM driver. Remove it
from mvneta.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
0ce0feb046 arm: mvebu: turris_mox: Use DM registered MDIO
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, start using the DM registered one in Turris MOX board
code.

This also allows us to drop the hack introduced in MOX' -u-boot.dtsi
file.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
00b1bad961 net: mdio-uclass: add dm_phy_find_by_ofnode() helper
Add helper to resolve PHY node from it's ofnode via DM MDIO subsystem.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
a2b2542992 arm: mvebu: Espressobin: Use DM registered MDIO to configure switch
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, we need to stop using board_network_enable() and instead
use the DM registered MDIO device to configure switch in
last_stage_init().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
4d47ea2279 net: mvneta: Remember fixed link instead of PHY address in priv data
We don't need to remember PHY address anymore, because since using DM
MDIO for connecting PHY, the address is parsed by mdio-uclass from
the ofnode.

But the driver uses a special value of the address to signal fixed link
usage.

Drop phyaddr add fixed_link in driver private structure. This simplifies
code a little.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
da84e409df net: mvneta: Use DM MDIO API for connecting PHY
Use the modern DM MDIO API for connecting PHY in the mvneta driver.

This requires enabling MVMDIO driver in several config files.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
47f0e8e21a net: mvneta: Fix 10Mbps speed
In mvneta_adjust_link() we need to set MII_SPEED bit only if PHY reports
the speed at 100Mbps.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Marek Behún
443cf35674 net: mvneta: Get rid of platdata
Drop .of_to_plat() from the mvneta driver and parse the two properties
in .probe().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Stefan Roese
1770808199 mips: octeon: nic23: Enable ethernet support
This patch enables the Kconfig symbols needed for full ethernet support
on the NIC23. Additionally board specific setup is done, mostly GPIOs
related to SFP / GPIO configuration. With this, ethernet can be used on
this board. Here an example of a tftp load:

=> tftp ffffffff81000000 big
Using ethernet-mac-nexus@11800e2000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.247
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ##################################################  10 MiB
         9.7 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Stefan Roese
78c01757f0 mips: octeon: ebb7304: Enable ethernet support
This patch enables the Kconfig symbols needed for full ethernet support
on the EBB7304. Also the PHY autonegotiation timeout is increased, as
the default 5 seconds are sometime a bit short. With this, ethernet can
be used on this board. Here an example of a tftp load:

=> tftp ffffffff81000000 big
ethernet-mac-nexus@11800e0000000 Waiting for PHY auto negotiation to complete....... done
Using ethernet-mac-nexus@11800e0000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.243
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ##################################################  10 MiB
         13.2 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 07:05:51 +02:00
Stefan Roese
8e0f8efe2a net: Add ethernet support for MIPS Octeon
This patchs adds the ethernet & MDIO driver for the MIPS Octeon II / III
SoC platform. Please note that these drivers are based on the 2013
U-Boot version from Marvell and make use of the platform supported
helper functions for the ethernet functionality, including stuff like
SFP handling.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2022-05-04 03:38:21 +02:00
Stefan Roese
f858bcccf4 mips: octeon: mrvl, octeon-nic23.dts: Add ethernet DT support
Add the Octeon ethernet (BGX) and SFP DT nodes to the NIC23 dts file to
enable ethernet support on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
03b5f836b6 mips: octeon: mrvl, octeon-ebb7304.dts: Add ethernet DT support
Add the Octeon ethernet (BGX), SMI and PHY DT nodes to the EBB7304 dts
file to enable ethernet support on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
6a9e294749 mips: octeon: mrvl, cn73xx.dtsi: Add ethernet (BGX) and SMI DT nodes
Add the Octeon ethernet (BGX) and SMI DT node to the dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
11424633a1 mips: octeon: octeon_common.h: Move init SP because of increased image size
This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that
it does not interfere with larger U-Boot images. This was noticed, while
adding network support to the EBB7304 board.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
322e5f3637 mips: octeon: cpu.c: Implement configure_lmtdma_window()
Import configure_lmtdma_window from Marvell 2013 U-Boot as it's needed
for network functionality.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
787e0d7d12 mips: octeon: cpu.c: Move bootmem init to arch_early_init_r()
Call octeon_bootmem_init() earlier in the boot process, so that this
bootmemory infrastructure is already initialized when e.g. the
networking support gets probed.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
6c71b10729 mips: octeon: Makefile: Enable building of the newly added C files
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Stefan Roese
1fb7e27a04 mips: octeon: Misc changes to existing C files for upcoming eth support
This patch includes misc changes to already present Octeon MIPS C files
files, which are necessary for the upcoming ethernet support.

The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking of the code

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
bec3f378e5 mips: octeon: Add cvmx-range.c
Import cvmx-range.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
5c444e0d78 mips: octeon: Add cvmx-qlm-tables.c
Import cvmx-qlm-tables.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
604a5f837e mips: octeon: Add cvmx-pko-internal-ports-range.c
Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
7e085d5c04 mips: octeon: Add cvmx-pko3-resources.c
Import cvmx-pko3-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
53a422cc50 mips: octeon: Add cvmx-pko3-compat.c
Import cvmx-pko3-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
e5ad79099c mips: octeon: Add cvmx-pko3-queue.c
Import cvmx-pko3-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
0f64057b4f mips: octeon: Add cvmx-pko3.c
Import cvmx-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
2b1c0db2fc mips: octeon: Add cvmx-pko.c
Import cvmx-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
902596c5d4 mips: octeon: Add cvmx-pki-resources.c
Import cvmx-pki-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
37bfe52fea mips: octeon: Add cvmx-pki.c
Import cvmx-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
2f573fdb22 mips: octeon: Add cvmx-ipd.c
Import cvmx-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
78b9c0caa9 mips: octeon: Add cvmx-ilk.c
Import cvmx-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
0136c6a986 mips: octeon: Add cvmx-global-resource.c
Import cvmx-global-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
e36125d9c2 mips: octeon: Add cvmx-fpa-resource.c
Import cvmx-fpa-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
047d7bb712 mips: octeon: Add cvmx-fpa.c
Import cvmx-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
2aab1c2370 mips: octeon: Add cvmx-fau-compat.c
Import cvmx-fau-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
16c50d61ee mips: octeon: Add cvmx-cmd-queue.c
Import cvmx-cmd-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
f1ee39438d mips: octeon: Add cvmx-agl.c
Import cvmx-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
6fd320cd5c mips: octeon: Add cvmx-helper-xaui.c
Import cvmx-helper-xaui.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
2e86b6ca4e mips: octeon: Add cvmx-helper-sfp.c
Import cvmx-helper-sfp.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
3a019d0457 mips: octeon: Add cvmx-helper-sgmii.c
Import cvmx-helper-sgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
7f0f8430f5 mips: octeon: Add cvmx-helper-rgmii.c
Import cvmx-helper-rgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
bfa83aa3e1 mips: octeon: Add cvmx-helper-pko3.c
Import cvmx-helper-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
bdb0f0888d mips: octeon: Add cvmx-helper-pko.c
Import cvmx-helper-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
755a6ea953 mips: octeon: Add cvmx-helper-pki.c
Import cvmx-helper-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
046922ea78 mips: octeon: Add cvmx-helper-npi.c
Import cvmx-helper-npi.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
323207343d mips: octeon: Add cvmx-helper-loop.c
Import cvmx-helper-loop.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
bb256ec723 mips: octeon: Add cvmx-helper-ipd.c
Import cvmx-helper-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
3bb644dbab mips: octeon: Add cvmx-helper-ilk.c
Import cvmx-helper-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
f9c554f06a mips: octeon: Add cvmx-helper-fpa.c
Import cvmx-helper-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
c006675f95 mips: octeon: Add cvmx-helper-board.c
Import cvmx-helper-board.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:21 +02:00
Aaron Williams
1d10bda508 mips: octeon: Add cvmx-helper-bgx.c
Import cvmx-helper-bgx.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
bbdae2ec26 mips: octeon: Add cvmx-helper-agl.c
Import cvmx-helper-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Stefan Roese
98036b0d70 mips: octeon: Misc changes to existing headers for upcoming eth support
This patch includes misc changes to already present Octeon MIPS header
files, which are necessary for the upcoming ethernet support.

The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking the headers

Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
03efa5686a mips: octeon: Add cvmx-xcv-defs.h header file
Import cvmx-xcv-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
d91f12b62c mips: octeon: Add cvmx-pcsxx-defs.h header file
Import cvmx-pcsxxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
5ee9ece0bc mips: octeon: Add cvmx-npei-defs.h header file
Import cvmx-npei-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
e6ecc18cc3 mips: octeon: Add cvmx-lbk-defs.h header file
Import cvmx-lbk-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
49d7c72f3b mips: octeon: Add cvmx-iob-defs.h header file
Import cvmx-iob-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
bb466a8022 mips: octeon: Add cvmx-ilk-defs.h header file
Import cvmx-igl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Aaron Williams
ba5eb2327b mips: octeon: Add misc cvmx-* header files
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04 03:38:20 +02:00
Tom Rini
46eb29201c Merge branch '2022-05-03-virtio-pci-add-and-fix-consistency-checks'
To quote the author:
The virtio PCI drivers forgo a number of consistency checks,
particularly around pointer validation and bounds checking. This series
focuses on the modern driver to add those checks.

The start of the series adds and fixes some basic bounds checks. Later
patches ensure PCI addresses fall within the expected regions rather
than any arbitrary address. This is acheived by introducing range
parameters to a few of the dm_pci_* functions that allow the ranges to
be checked.

The series also adds a few new configs to allow parts of virtio and PCI
to be disabled where the features may be unused and the current
implementations don't have the needed consistencty checks.
2022-05-03 18:33:46 -04:00
Andrew Scull
3b92018675 pci: Add config for Enhanced Allocation
Add a config to control whether Enhanced Allocation is supported by the
driver.

Signed-off-by: Andrew Scull <ascull@google.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
0699a78c0c virtio: pci: Make use of dm_pci_map_bar()
The virtio PCI capabilities describe regions of memory that should be
mapped. Map those with dm_pci_map_bar() which will ensure they are valid
PCI regions.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
c763e1e023 virtio: pci: Check virtio configs are mapped
Prepare for calls to `virtio_pci_map_capability()` failing by returning
NULL on error. If this happens, later accesses to the pointers would be
unsafe so cause the probe to fail if such an error occurs.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
2635e3b50f pci: Add mask parameter to dm_pci_map_bar()
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
a822d1dee4 pci: Update dm_pci_bus_to_virt() parameters
Add mask parameter and reorder length parameter to match the other PCI
address conversion functions. Using PCI_REGION_TYPE as the mask gives
the old behaviour.

It's converted from a macro to an inline function as the length
parameter is now used twice, but should only be calculated once.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
7739d93d82 pci: Match region flags using a mask
When converting addresses, apply a mask to the region flags during
lookup. This allows the caller to specify which flags are important and
which are not, for example to exclude system memory regions.

The behaviour of the function is changed such that they don't
preferentially search for a non-system memory region. However, system
memory regions are added after other regions in decode_regions() leading
to a similar outcome.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:26 -04:00
Andrew Scull
12507a2d22 pci: Map bars with offset and length
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.

Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Andrew Scull
55e6adbd78 test: pci: Test PCI address conversion functions
Add tests for the functions dm_pci_bus_to_phys() and
dm_pci_phys_to_bus() which convert between PCI bus addresses and
physical addresses based on the ranges declared for the PCI controller.

The ranges of bus#1 are used for the tests, adding a translation to one
of the ranges to cover more cases.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Andrew Scull
398dc367c5 pci: Range check address conversions
When converting between PCI bus and physical addresses, include a length
parameter that can be used to check that the entire range fits within
one of the PCI regions. This prevents an address being returned that
might be only partially valid for the range it is going to be used for.

Where the range check is not wanted, passing a length of 0 will have the
same behaviour as before this change.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
ec8eba8c2d pci: Check region ranges are addressable
When parsing the `ranges` DT node, check that both extremes of the
regions are addressable without overflow. This assumption can then be
safely made when processing the regions.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
60f4142aa2 pci: Fix use of flags in dm_pci_map_bar()
The flags parameter of dm_pci_map_bar() is used for PCI region flags
rather than memory mapping flags. Fix the type to match that of the
region flags and stop using the regions flags as memory mapping flags.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
e7870c2cdc virtio: pci: Read entire capability into memory
Read the virtio PCI capability out of the device configuration space to
a struct rather than accessing fields directly from the configuration
space as they are needed. This both makes access to the fields easier
and avoids re-reading fields.

Re-reading fields could result in time-of-check to time-of-use problems,
should the value in the configuration space change. The range check of
the `bar` field and the later call to `dm_pci_read_bar32()` is an
example of where this could happen.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
6a8cb878a2 virtio: pci: Check virtio capability is in bounds
Ensure the virtio PCI capabilities are contained within the bounds of
the device's configuration space. The expected size of the capability is
passed when searching for the capability to enforce this check.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
f2c1ef1b6d virtio: pci: Check virtio common config size
Check that the common config is at least as large as the struct it is
expected to contain. Only then is it safe to cast the pointer and be
safe from out-of-bounds accesses.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
c690f64f4c virtio: pci: Bounds check notification writes
Make sure virtio notifications are written within their allocated
buffer.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
94b28b9158 virtio: pci: Bounds check device config access
The device config is optional, so check it was present and mapped before
trying to use the pointer. Bounds violations are an error, not just a
warning, so bail if the checks fail.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
da03cdfa7a virtio: pci: Fix discovery of device config length
The length of the device config was erroneously being taken from the
notify capability. Correct this by finding the length in the device
capability.

Fixes: 550435edf8 ("virtio: pci: Support non-legacy PCI transport device")
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Andrew Scull
30471d5351 virtio: pci: Allow exclusion of legacy driver
Add a new config to control whether the driver for legacy virtio PCI
devices is included in the build. VIRTIO_PCI_LEGACY is included by
default when VIRTIO_PCI is selected, but it can also be independently
toggled.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:45 -04:00
Masahisa Kojima
2158b0da22 bootmenu: add Kconfig option not to enter U-Boot console
This commit adds the Kconfig option to disable to enter
the U-Boot console from bootmenu.

If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is enabled, "U-Boot console"
entry is appeared as the last entry in the bootmenu, then user can
enter U-Boot console.

If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is disabled, "Quit" entry
is appeared as the last entry instead of "U-Boot console".
When user chooses "Quit" from bootmenu, the following default
commands are invoked.

 - "bootefi bootmgr" (if efi bootmgr is enabled)
 - "run bootcmd"

If the both commands are executed and returns to the bootmenu,
the bootmenu will appears again.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
c606c0059f bootmenu: add UEFI boot entry into bootmenu
This commit adds the UEFI related menu entries
into the bootmenu.

User can select which UEFI "Boot####" option to execute
from bootmenu, then bootmenu sets the "BootNext" UEFI
variable and invoke efi bootmgr. The efi bootmgr
will handle the "BootNext" UEFI variable.

If the "BootNext" UEFI variable is preset and efi bootmgr is enabled,
bootmenu invokes efi bootmgr to handle "BootNext" as first priority.

The UEFI boot entry has the "UEFI BOOTXXXX" prefix as below.

  *** U-Boot Boot Menu ***

     UEFI BOOT0000 : debian
     UEFI BOOT0001 : ubuntu

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
a3d0aa87ac bootmenu: update bootmenu_entry structure
This is a preparation for succeeding addition of uefi boot
and distro boot menu entries into bootmenu.
The bootmenu_entry title is updated to u16 string because
uefi use u16 string. This commit also factors out the function
to prepare the entries generated by "bootmenu_x" U-Boot environment
variable.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
AKASHI Takahiro
4e65ca00f3 efi_loader: bootmgr: add booting from removable media
Under the current implementation, booting from removable media using
a architecture-specific default image name, say BOOTAA64.EFI, is
supported only in distro_bootcmd script. See the commit 74522c898b
("efi_loader: Add distro boot script for removable media").

This is, however, half-baked implementation because
1) UEFI specification requires this feature to be implemented as part
   of Boot Manager's responsibility:

  3 - Boot Manager
  3.5.1 Boot via the Simple File Protocol
  When booting via the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, the FilePath will
  start with a device path that points to the device that implements the
  EFI_SIMPLE_FILE_SYSTEM_PROTOCOL or the EFI_BLOCK_IO_PROTOCOL. The next
  part of the FilePath may point to the file name, including
  subdirectories, which contain the bootable image. If the file name is
  a null device path, the file name must be generated from the rules
  defined below.
  ...
  3.5.1.1 Removable Media Boot Behavior
  To generate a file name when none is present in the FilePath, the
  firmware must append a default file name in the form
  \EFI\BOOT\BOOT{machine type short-name}.EFI ...

2) So (1) entails the hehavior that the user's preference of boot media
   order should be determined by Boot#### and BootOrder variables.

With this patch, the semantics mentioned above is fully implemented.
For example, if you want to boot the system from USB and SCSI in this
order,
* define Boot0001 which contains only a device path to the USB device
  (without any file path/name)
* define Boot0002 which contains only a device path to the SCSI device,
and
* set BootOrder to Boot0001:Boot0002

To avoid build error for sandbox, default file name "BOOTSANDBOX.efi"
is defined even if it is out of scope of UEFI specification.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
On sandbox use binary name corresponding to host architecture.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
AKASHI Takahiro
d8465ffc01 efi_loader: export efi_locate_device_handle()
This function will be used in the next commit where some behavior
of EFI boot manager will be expanded.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
7f67525f99 menu: menu_get_choice() return -ENOENT if menu item is empty
menu_get_choice() needs to handle the case that menu item
is empty. In this case, menu_get_choice() returns -ENOENT.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
c23bb03465 menu: always show the menu regardless of the number of entry
To make user aware of the menu entry selection, menu always
appears regardless of the number of entry.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Adjust test/py/tests/test_bootmenu.py
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
b8cd1e7fc2 test: unit test for u16_strlcat()
Provide a unit test for function u16_strlcat().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Masahisa Kojima
eca08ce94c lib/charset: add u16_strlcat() function
Provide u16 string version of strlcat().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
d30924f16b lib: fix selection of CONFIG_CHARSET
lib/charset.c is not optional for
EFI_APP || EFI_LOADER || UFS || UT_UNICODE.
These must select CONFIG_CHARSET.

Fixes: 726cd9836d ("efi: Make unicode printf available to the app")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
c900a42eb0 efi_selftest: error handling in efi_selftest_tcg2
If memory allocation fails, write an error message.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
0db8221f32 efi_selftest: clean up unaligned unit test
* fix typo %s/give/given/
* don't use void * in pointer arithmetic

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
1b2c3e543c efi_selftest: buildefi_selftest_unaligned.c
The unit test has not been built since CPU_V7 was rename CPU_V7A.

Fixes: acf1500138 ("arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
1979404263 test: fix some pylint problems in test_capsule_firmware_raw.py
* improve doc-string formatting
* remove unused imports

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
5c1037d578 efi_loader: reset colors before clearing screen
When resetting the text console the colors have to be set before clearing
the screen. Otherwise the background color may be wrong.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
100de5e37d doc: fix typos in bootmenu.rst
%s/cammand/command/
%s/sequencies/sequences/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
d1d7ed7b1e cmd: simplify bootmenu
* correct output for timeout > 99 s
* don't use spaces to advance to the output column

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
f2c534d354 test: unit test for bootmenu
Provide a unit test for the bootmenu command

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Heinrich Schuchardt
29a02185cd sandbox: enable bootmenu command
Provide the bootmenu command on the sandbox for testing.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-03 21:39:22 +02:00
Tom Rini
f8e7670f8b CI: Azure: Rework how we update MSYS2
Based on reading https://www.msys2.org/docs/ci/ and "Other Systems"
rework how we update MSYS2 to the current version.  We run it once, to
perform nothing other than being the first run, then we run pacman
twice.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-03 08:32:50 -04:00
Luca Ellero
c62f93a620 sf: dataflash: add support for AT45DB641E
NOTE: this chip uses "extened device information"

Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:57:19 +05:30
Luca Ellero
1c1c581d56 sf: dataflash: add support for "extended ID"
Take as reference Linux kernel code:
	drivers/mtd/devices/mtd_dataflash.c
	commit 1da8869a428317a6d3cd8d47184cf87feb34a98b
	Author: Andrey Smirnov <andrew.smirnov@gmail.com>

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:56:16 +05:30
Jim Liu
aaf2dbc82b spi: npcm-fiu: add NPCM7xx FIU controller driver
Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI master
controller driver using SPI-MEM interface.

The FIU supports single, dual or quad communication interface.
The FIU controller driver provides flash access in UMA(User
Mode Access) mode by using an indirect address/data mechanism.

the dts node is followed upstream kernel dts name.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Jagan: fixed the Kconfig, Makefile order]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:49:48 +05:30
Tien Fong Chee
f9b9641348 mtd: spi-nor-ids: add Macronix mx25u51245g flash entry
Add Macronix mx25u51245g flash entry, so this can be used on
SoCFPGA devices.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
[Jagan: updated commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:37:39 +05:30
Marek Vasut
1aa60f0cea mtd: spi-nor-ids: Add Winbond W25Q128JW ID
Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
Tested on W25Q128JWPIM part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-05-03 17:35:17 +05:30
Tom Rini
edb6982b58 Merge branch '2022-05-02-add-verifying-program-loader'
To quote the author:

U-Boot provides a verified-boot feature based around FIT, but there is
no standard way of implementing it for a board. At present the various
required pieces must be built up separately, to produce a working
implementation. In particular, there is no built-in support for selecting
A/B boot or recovery mode.

This series introduces VPL, a verified program loader phase for U-Boot.
Its purpose is to run the verified-boot process and decide which SPL
binary should be run. It is critical that this decision happens before
SPL runs, since SPL sets up SDRAM and we need to be able to update the
SDRAM-init code in the field.

Adding VPL into the boot flow provides a standard place to implement
verified boot. This series includes the phase itself, some useful Kconfig
options and a sandbox_vpl build for sandbox. No verfied-boot support is
provided in this series.

Most of the patches in this series are fixes and improvements to docs and
various Kconfig conditions for SPL.
2022-05-02 19:02:44 -04:00
Tom Rini
2406a91734 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Misc turris_omnia/mox related Fixes and impovements (Pali)
- Turris Omnia: Add support for configuring mSATA and WWAN slots
  via env variables (Pali)
- net: mvgbe: Set PHY page 0 before phy_connect (Tony)
- kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver (Tony)
- mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names (Pali)
- mvebu: clearfog_defconfig: enable setexpr command (Josef)
- mvebu: x530: set MPP55 to gpio (Chris)
2022-05-02 19:00:42 -04:00
Simon Glass
a31eff3015 CI: Run VPL tests
Add tests for VPL into the mix. For now this just runs the help test and
a few SPL ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 10:01:52 -04:00
Simon Glass
5f195140a9 vpl: Test that VPL runs correctly through to U-Boot proper
Check the TPL -> VPL -> SPL -> U-Boot path by running the 'help' command
in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 10:01:51 -04:00
Simon Glass
313438c971 vpl: Support running vpl tests
Add support for these to the pytest system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
9ae25b9ac9 sandbox: Add a build for VPL
Add an initial VPL build for sandbox. This includes the flow:

   TPL (with of-platdata) -> VPL -> SPL -> U-Boot

To run it:

   ./tpl/u-boot-tpl -D

The -D is needed to get the default device tree, which includes the serial
console info.

Add a Makefile check for OF_HOSTFILE which is the option that enables
devicetree control on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
747093dd40 vpl: Add Kconfig options for VPL
Add VPL versions of commonly used Kconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
f86ca5ad8f Introduce Verifying Program Loader (VPL)
Add support for VPL, a new phase of U-Boot. This runs after TPL. It is
responsible for selecting which SPL binary to run, based on a
verified-boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
d3eba95a7e Makefile: Tidy up the TPL build rules
These should follow the same pattern as SPL, for consistency. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
70bed2f659 Makefile: Simplify devicetree rules for SPL/TPL
The current logic checks several options to decide whether SPL/TPL need
the U-Boot devicetree to be built. In fact we can check OF_CONTROL, which
is enabled in all cases that matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
743ebe6b79 avb: Don't build in SPL
This feature is not used in SPL at present. Update the Makefile to avoid
it being built.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
3c0d5ea0a5 bloblist: Correct Kconfig dependencies
This feature is not available in SPL unless common/ and lib/ are built.
Update the Kconfig to avoid build errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
b550853b7d test: Tidy up test building with SPL
We can in principle add tests to any SPL build, e.g. TPL or VPL. Update
the build rules to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
a36d251b50 doc: Expand SPL docs to explain the phase and config
Add a bit more information about how to use SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Simon Glass
d411359d91 doc: Convert SPL documentation to ReST
Move this documentation over to .rst format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Chris Packham
08dc62c152 ARM: mvebu: x530: set MPP55 to gpio
MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Josef Schlehofer
af767e9a3d arm: mvebu: clearfog_defconfig: enable setexpr command
This command is useful in U-boot scripts and it is being used by
OpenWrt bootscript for this board [1]. Otherwise shell scripting
commands are enabled by default in cmd/Kconfig.

[1] 852126680e/target/linux/mvebu/image/clearfog.bootscript (L7)

[2] e95afa5675/cmd/Kconfig (L1504)

Fixes: 0299c90f39 ("arm: mvebu: Add
SolidRun ClearFog Armada 38x initial support")

Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Pali Rohár
363d9f2c2f arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names
This is A385 register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-02 07:47:26 +02:00
Tony Dinh
dbd2a382c1 arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.

- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-05-02 07:47:26 +02:00
Tony Dinh
f0f98758ed net: marvell: mvgbe: Set PHY page 0 before phy_connect
For most Kirkwood boards, the PHY page is already set to page 0
(in register 22) before phy_connect is invoked. But some board like
the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page
is not set to page 0. There seems to be some bad data remained in
register 22 when the uclass MVGBE about to invoke phy_connect().

This patch enables the uclass MVGBE to always set the PHY page to 0
before phy_connect.

For reference, please see this discussion:
[RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe
and PHY driver for DM Ethernet.
https://lists.denx.de/pipermail/u-boot/2022-April/480946.html

This patch has been tested with the following Kirkwood boards:

NSA310S (88F6702, network chip MV88E1318S)
Sheevaplug (88F6281, network chip MV88E1318)
Pogo V4 (88F6192, network chip 88E1116R)
GF Home(88F6281, network chip 88E1116R)
Dreamplug (88F6281, network chip MV88E1318)
Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-05-02 07:47:26 +02:00
Pali Rohár
b8b91a0f08 arm: mvebu: turris_mox: Add NVMe and SCSI to boot targets
U-Boot for Turris Mox has already enabled NVMe and SCSI support. So add
NVMe and SCSI to boot targets.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
0ddc1e5aa3 arm: mvebu: turris_omnia: Add NVMe to boot targets
U-Boot for Turris Omnia has already enabled NVMe support. So add NVMe to
boot targets.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
9efc5b7a4b arm: mvebu: turris_omnia: Always enable MMC, SCSI and USB boot targets
U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support,
so always enable macros for booting from these devices.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:47:26 +02:00
Pali Rohár
31f88018d9 arm: mvebu: turris_omnia: Define CONFIG_ETHPRIME instead of ethact= ENV
CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact
stores currently active ethernet device.

So there is no point to set ethact= in default environment. Instead set
CONFIG_ETHPRIME properly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:47:26 +02:00
Pali Rohár
1ae8a5fb6a arm: mvebu: turris_omnia: Fix RESET button message
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:29:55 +02:00
Pali Rohár
73c7db73e8 arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe slot
PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards.
USB3.0 and PCIe share same pins and only one function can be active at the
same time. PCIe Mini CEM 2.1 spec says that determining function is
platform specific and spec does not define any dedicated pin which could
say if card is USB3.0-based or PCIe-based.

Implement this platform specific decision (USB3.0 vs PCIe) for WWAN
MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot",
similarly like is implemented forced mode for MiniPCIe/mSATA slot via
"omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would
mean to set USB3.0 mode and value "pcie" original PCIe mode.

A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to
MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality,
so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just
configuring SerDes to USB 3.0 mode.

Other twos MiniPCIe slots on Turris Omnia do not have this new
functionality as their SerDes lines cannot be switched to USB3.0
functionality.

Note that A385 SoC does not have too many USB3.0 blocks, so activating
USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose
USB3.0 functionality and would be downgraded just to USB2.0.

By default this MiniPCIe WWAN slot is in PCIe mode, like before.

To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands:

  => setenv omnia_wwan_slot usb3
  => saveenv
  => reset

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
72a9dd264c arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode
Show error message when DT file does not contain sata or pcie node which
should be explicitly disabled. This can happen when U-Boot code for finding
those nodes is incomplete or when those DT nodes are in different
unexpected location. In any case it is needed to know if DT not was not
explicitly disabled as it could mean that combo slots where setup
incorrectly.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
d80276870d arm: mvebu: turris_omnia: Extract code for disabling sata/pcie
Move code for disabling sata and pcie DT nodes to own functions, so this
code can be called from other places in follow up patches.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
1da19dcf3b arm: mvebu: turris_omnia: Allow to configure mSATA slot via env variable
Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43
which is required by PCIe mini CEM specs. Such broken cards are incorrectly
detected as mSATA cards because SATA specs requires that PIN 43 on mSATA
cards has to be disconnected.

PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by
software in U-Boot SPL. Allow to override that U-Boot SPL detection by a
new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken
MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too.

As configuration of PCIe vs SATA functionality is done in U-Boot SPL,
it is required to change env variable in permanent storage and reset the
board to take effect.

To force PCIe mode for broken MiniPCIe cards, call U-Boot commands:

  => setenv omnia_msata_slot pcie
  => saveenv
  => reset

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
8ead243ecc arm: mvebu: turris_omnia: Define only one serdes map variable
By default use primary serdes map with PCIe function in combined
miniPCIe/mSATA slot. When SATA is detected change serdes map variable at
runtime.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
f9c5cf8a88 arm: mvebu: turris_omnia: Enable ENV support in SPL
Allow to read ENV variables also in SPL on Turris Omnia.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Pali Rohár
d6ba5c4f92 arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function
BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is
active also when BootROM is executing binary kwbimage headers, which
includes also U-Boot SPL.

Therefore no initialization code is required to access SPI Flags from
U-Boot SPL. In proper U-Boot it is remapped to other location.

So in mvebu implementation of env_sf_get_env_addr() function returns
0xD4000000 when running in SPL and NULL when in proper U-Boot.

This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not
possible to read ENV because it is too big and U-Boot SPL does not have
such big malloc() pool to real all ENV variables.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-05-02 07:28:25 +02:00
Pali Rohár
f4bf81b013 env: sf: Allow to use env_sf_init_addr() at any stage
In some cases it makes sense to use env_sf_init_addr() also in SPL mode.
Allow it for boards by providing custom implementation of weak function
env_sf_get_env_addr(). When this function returns NULL it signals that
address is invalid, like config option CONFIG_ENV_ADDR.

There is no change in default behavior or in config options.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-02 07:28:25 +02:00
Tom Rini
c70c0102af Merge tag 'efi-2022-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc2

UEFI:

* fix UEFI booting after integration of UEFI sub-system with driver model
* avoid random return values from devpath_is_partition()
* minor code clean ups
2022-04-29 14:04:08 -04:00
Tom Rini
f7bd9e4936 Merge branch '2022-04-29-fuzzing-and-asan-fixes'
To quote the author:

I've been experimenting with ASAN on sandbox and turned up a few issues
that are fixed in this series.

Basic ASAN was easy to turn on, but integrating with dlmalloc was
messier and fairly intrusive. Even when I had it working, there was only
a small redzone between allocations which limits the usefulness.

I saw another series on the list by Sean Anderson to enable valgrind
which was finding a different set of issues, though there was one
overlap that Sean is fixing with
"[PATCH] IOMUX: Fix access past end of console_devices".

With these issues fixed, I was able to run the dm tests without any ASAN
issues. There are a couple of leaks reported at the end, but that's for
another day.
2022-04-29 11:25:06 -04:00
Andrew Scull
d69616e529 test: dm: devres: Remove use-after-free
Use-after-free shouldn't be used, even in tests. It's bad practice and
makes the test brittle.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
7f58feae3f test: Fix pointer overrun in dm_test_devm_regmap()
This tests calls regmap_read() which takes a uint pointer as an output
parameter. The test was passing a pointer to a u16 which resulted in an
overflow when the output was written. Fix this by following the
regmap_read() API and passing a uint pointer instead.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
49209da54f sound: Fix buffer overflow in square wave generation
Data is written for each channel but is only tracked as having one
channel written. This resulted in a buffer overflow and corruption of
the allocator's metadata which caused further problems when the buffer
was later freed. This could be observed with sandbox unit tests.

Resolve the overflow by tracking the writes for each channel.

Fixes: f987177db9 ("dm: sound: Use the correct number of channels for sound")
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
beb341ae7f usb: sandbox: Bounds check read from buffer
The buffer is 512 bytes but read requests can be 800 bytes. Limit the
request to the size of the buffer.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
62120155b6 usb: sandbox: Check for string end in copy_to_unicode()
When copying the string in copy_to_unicode(), check for the null
terminator in each position, not just at the start, to avoid reading
beyond the end of the string.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
9c2f5ecd43 x86: sandbox: Add missing PCI bar to barinfo
There are expecte to be bars 0 through 5, but the last of these was
missing leading to an read beyond the buffer. Add the missing element
with zero values.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
3849ca7b2f acpi: Fix buffer overflow in do_acpi_dump()
When do_acpi_dump() converts the table name to upper case, pass the
actual size of the output buffer so that the null terminator doesn't get
written beyond the end of the buffer.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Andrew Scull
53cb97c093 doc: Correct position of gdb '--args' parameter
The '--args' parameter to gdb comes before the binary that the debugger
will be attached to rather than after the binary and before the
arguments. Fix that in the docs.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-29 11:11:36 -04:00
Heinrich Schuchardt
5e847f7729 efi_loader: call efi_init_early() earlier
efi_init_early() creates an event hook for block device probing.
It has to be called before any block device is probed.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-29 14:25:40 +02:00
AKASHI Takahiro
6c640422ba efi_loader: disk: allow blk devices even without UCLASS_PARTITION
While GPT partition is mandated in UEFI specification, CONFIG_PARTITION is
seen optional under the current implementation.
So modify efi_disk_rw_blocks() to allow accepting UCLASS_BLK devices.

Fixes: commit d97e98c887 ("efi_loader: disk: use udevice instead of blk_desc")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-04-29 14:25:40 +02:00
Heinrich Schuchardt
8da26f5156 efi_loader: simplify efi_add_conventional_memory_map()
Remove redundant constraint.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-29 14:25:39 +02:00
Heinrich Schuchardt
4f419960bf efi_loader: simplify try_load_entry()
Use function efi_create_indexed_name() to create the BootXXXX variable
name.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-29 14:25:39 +02:00
Heinrich Schuchardt
dd1086ac6b efi: fix devpath_is_partition()
If the path consists only of an end node, it does not refer to a partition.
Avoid returning a random value from the stack in this case.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-29 14:25:39 +02:00
Heinrich Schuchardt
7ea79e511d efi_loader: don't call log with __func__ as parameter
The log functions print file name, line number, and function name if
selected via the log command or customizing. Don't print the function
name twice.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-29 14:23:30 +02:00
Tom Rini
e95afa5675 Merge branch '2022-04-28-led-updates'
- DM GPIO bugfix
- LED related code clean-ups
- Fix some of the DM/LED tests
- Update the LED dt binding doc
2022-04-28 13:46:31 -04:00
Pali Rohár
53ee48b673 dt-bindings: leds: import common led bindings from linux 5.17
This allows usage of LED_COLOR_ID_RGB macro in DTS files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-28 09:26:44 -04:00
Marek Vasut
891ec35a7a test: dm: pinmux: Get LED2 udevice in the pinmux test
The UT reinitializes the pin controller state, get LED2 udevice
to trigger its probe and configure the pin controller pin state
as it is expected by the test.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-28 09:26:44 -04:00
Marek Vasut
876276f5de test: dm: led: Fix LED enumeration
The GPIO LED driver no longer considers the top level node an LED,
because it is not an LED. With this bug fixed, the LED enumeration
has changed. Update the test accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-28 09:26:44 -04:00
Marek Vasut
69245e406e led: Drop led_default_state()
This function is empty, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-28 09:26:44 -04:00
Marek Vasut
0107469780 led: gpio: Use NOP uclass driver for top-level node
The top level DT node of gpio-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This simplifies the probe() implementation
and fixes the bogus top-level not-an-LED in 'led list' command output:

```
=> led list
led             Error -121 <--- This is removed/fixed by this patch
green:user0     off
```

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-28 09:26:43 -04:00
Marek Vasut
e3aa76644c led: gpio: Check device compatible string to determine the top level node
Since 2d1deaf88e ("led: gpio: Drop duplicate OF "label" property parsing"),
all LED nodes have some sort of label. Use device_is_compatible(..."leds-gpio")
to determine whether this is a top-level node, since it is only the top
level node which is compatible with "leds-gpio", the GPIO LEDs subnodes
are not.

Fixes: 2d1deaf88e ("led: gpio: Drop duplicate OF "label" property parsing")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-28 09:26:43 -04:00
Marek Vasut
c438866b16 led: Mark device instance with DM_FLAG_PROBE_AFTER_BIND
Calling device_probe() from uclass .post_bind() callback has all kinds
of odd side-effects, e.g. device instances not being available just yet.
Make use of the DM_FLAG_PROBE_AFTER_BIND instead, mark device instances
which need to be probe()d in order to configure the LED default state
with this flag and let the DM core do the device_probe() at the right
time instead.

Fixes: 72675b063b ("led: Configure LED default-state on boot")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-28 09:26:43 -04:00
Marek Vasut
9cc32bfa49 dm: core: Add DM_FLAG_PROBE_AFTER_BIND flag
Introduce DM_FLAG_PROBE_AFTER_BIND flag, which can be set by driver or
uclass in .bind(), to indicate such driver instance should be probe()d
once binding of all devices is complete.

This is useful in case the driver determines that hardware initialization
is mandatory on boot, and such initialization happens only in probe().
This also solves the inability to call device_probe() from .bind().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-28 09:26:43 -04:00
Tom Rini
8b2b125e95 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
fsl-qoriq: Fixes and updates on fsl-layerscape
mpc85xx: fixes and code cleanup
2022-04-27 09:19:41 -04:00
Tom Rini
24df831cd4 Merge tag 'u-boot-amlogic-20220427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- Add AXG support for SARADC, including minimal ao-clk driver
- Update Amlogic documentation for Matrix & Jethub D1
2022-04-27 09:19:17 -04:00
Vyacheslav Bocharov
5a9e5922ce doc: boards: amlogic: update jethub d1 specifications
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: removed trailing whitespaces and fixed sphinx build error]
Link: https://lore.kernel.org/r/20220426052633.3027932-2-adeep@lexina.in
2022-04-26 14:35:27 +02:00
Tom Rini
3970f7728d Merge tag 'u-boot-at91-2022.07-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.07 cycle:

This feature set includes the new driver for the AT91 reset controller,
a new board called sam9x60 curiosity, and several other fixes and
clean-ups (sama7g5ek qspi clock, impedance; remove unused code,
introduce Kconfig symbols for SPL timers)
2022-04-26 07:54:12 -04:00
Michal Simek
182d45ddff cpu: 83xx: Add missing dependency on CPU_MPC83XX
It looks quite weird that for non PPC platforms cpu driver for MPC83xx can
be selected. That's why define proper dependency.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Sean Anderson
7026c1ee70 board: ls1046afrwy: Remove Manish Tomar's email
Manish Tomar's email bounces. Remove it, and reassign the config he was
maintaining to the primary maintainer for the board.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
95f8dfe8fb pci: fsl: Change compatible string for mpc8548 to "fsl, mpc8548-pcie"
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
e8c9148bc9 powerpc: dts: p2020: Set dfsrr property for i2c nodes
Linux kernel dts files pq3-i2c-*.dtsi also sets this dfsrr property for i2c
nodes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
fd3dc72945 powerpc: dts: p2020: Define L2 cache node
Copy definition of L2 cache node from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
787d2c024b powerpc: dts: p2020: Make usb@22000 node compatible for Linux kernel driver
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and
needs more DT properties. Copy P2020 usb@22000 properties from upstream
Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
7b074129ad powerpc: dts: p2020: Add missing interrupts property to spi@7000 node
interrupts property for spi@7000 node is needed for compatibility with
Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
15d086ded9 powerpc: dts: p2020: Do not automatically disable spi@7000 node in p2020-post.dtsi
Device tree include file p2020-post.dtsi should be included after the board
device tree file and overrides settings of the board. So it should not
disable some node as board cannot enable it via normal way (it has to
enable it after inclusion of p2020-post.dtsi file).

Fix it by removal of explicit disable in p2020-post.dtsi file and then
remove explicit post-post enable in all P2020 board device tree files.
Currently no P2020 board has spi@7000 node disabled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
d1721ea6d9 powerpc: dts: p2020: Add Linux compatible string and property for eSDHC
Linux kernel eSDHC driver for P2020 requires additional compatible string
fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file
to make U-Boot board DTS files compatible for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0e33f68b23 powerpc: dts: p2020: Add ptp_clock@24e00 node via pq3-etsec1-timer-0.dtsi
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux
kernel for P2020. This allows U-Boot to use P2020 device tree files from
upstream Linux kernel which reference ptp_clock@24e00 device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1a0800ac40 powerpc: dts: p2020: Make PCIe nodes compatible for Linux kernel driver
Linux P2020 PCIe kernel driver uses compatible string fsl,mpc8548-pcie and
needs more DT properties. Copy P2020 PCIe nodes and definitions from
upstream Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ec52b55b93 powerpc: dts: p2020: Add gpio-controller@fc00 node via pq3-gpio-0.dtsi
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference gpio-controller@fc00 device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
c7d0295c25 board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banks
Replace hardcoded i2c hex values for NOR banks by named SW macros in
map_lowernorbank/map_uppernorbank env commands.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
6496a89a57 board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address
Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.

Same macros are used in U-Boot board code when reading information from
boot i2c data.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ac56055c41 board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr
Do not stringify env $vscfw_addr two times (once implicitly via string
operator "" and second time explicitly via __stringify() macro) and allow
to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not
defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
71dcf8128c board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place
Whole section about USB/eLBC configuration seems to be P1020 specific. So
add ifdefs to not compile it on other platforms (e.g. P2020).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0b30cb3de7 board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded
attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and
also allow speculative loading (by not setting Guarded attribute).

Also enable Memory Coherency attribute for second 1G SDRAM map. In commit
316f0d0f8f ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was
enabled for all SDRAM maps on all other boards, just missed this one case.

As a last thing, first 1G SDRAM map has wrong comment, so adjust it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0992c2be77 board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.

In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.

So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for
SDHC_WP functionality.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
4aceaec585 board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations
As written in comment, P2020 has two possible SD switch configurations.
Extend code to detect both of them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ccad59dc5c board: freescale: p1_p2_rdb_pc: Do not hang in checkboard()
Like in all other checks in checkboard() function, do not hang on error.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1245c6e258 powerpc: mpc85xx: Define linker sections in ascending order
It is too confusing if sections are defined in non-ascending order.

Also linker has to go backward and then again forward when generating final
binary.

To make future changes easier, define all linker sections in ascending
order.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
1b780b654f powerpc: mpc85xx: Put bss after image when not including reset vector
Linker knows exact size of the image, so there is no need to use
CONFIG_SYS_MONITOR_LEN macro (which should be upper limit).

Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
c45f000f29 powerpc: mpc85xx: Remove useless SIZEOF_HEADERS and .interp from ld script
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.

There is no change in generated u-boot.bin binary.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ab37df9d22 powerpc: mpc85xx: Remove duplicate u-boot-nand.lds
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0038f2362a powerpc: mpc85xx: Remove u-boot-nand_spl.lds
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since
Jun 2014 commit 0234446fd1 ("nand_spl: remove MPC8536DS support").

Remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
e8c0e0064c powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.

When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:

  No valid device tree binary found at 110dc300
  initcall sequence 110d3560 failed at call 1109535c (err=-1)
  ### ERROR ### Please RESET the board ###

Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.

Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.

Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
74b7d69e61 powerpc: dts: p1020/p2020: Fix esdhc node name
For compatibility with Linux kernel DTS files and also with other U-Boot
powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi
and p2020-post.dtsi include files.

Linux kernel DTS files which include these dtsi files, expect that esdhc
node has name sdhc@2e000 and do not work with other node names.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
7d1d31db91 powerpc: dts: p2020: Add localbus node
This node is required for NAND and NOR support. Node is taken from the
upstream Linux kernel DTS file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0980cbba7b mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support
QorIQ pre-PBL BootROM scans first 24 SD card sectors (each with fixed 512
bytes length) for boot signature. Implement same redundancy behavior in
fsl_esdhc_spl driver to allow loading proper U-Boot when boot sector is not
the first one.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
44564e79eb mmc: fsl_esdhc: Define macro ESDHCCTL_SNOOP for Snoop attribute
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
06ef911447 mtd: nand: raw: Add support for DT property nand-ecc-algo=bch
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
c9ea9019c5 mtd: rawnand: fsl_elbc: Use ECC configuration from device tree
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.

Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
da98ddaf73 mtd: rawnand: fsl_elbc: Add device tree support
This allows boards to specify NAND settings via standard DT properties.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
974f66a470 mtd: rawnand: fsl_elbc: Implement RNDOUT command
This is needed for SW ECC.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
cfbf84330f powerpc: dts: p2020: Add serial0 and serial1 via pq3-duart-0.dtsi
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference serial0 or serial1 devices.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
77b0c4a6c6 powerpc: dts: p2020: Add fsl/p2020si-pre.dtsi and fsl/p2020si-post.dtsi symlinks
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and
fsl/p2020si-post.dtsi include device tree files.

Add symlinks for these include device tree files into U-Boot powerpc
directory and points them to U-Boot inline device tree files p2020.dtsi and
p2020-post.dtsi.

This allows to use P2020 DTS files from upstream Linux kernel in U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
03edf23376 board: freescale: p1_p2_rdb_pc: Allow to compile it without env support
When env support is disabled then usage of env_init() or env_relocate()
generates linker errors. So do not compile env_init() or env_relocate()
in SPL code when env support is disabled in SPL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
78cdaf4053 ddr: fsl: Allow to compile it without env support
When env support is disabled then usage of env_get_f() generates linker
errors. So do not compile env_get_f() when env support is disabled (for
example when disabled only in SPL).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
d64a8fd0a9 hwconfig: Allow to compile it without env support
When env support is disabled then usage of env_get() generates linker
errors. So do not compile env_get() when env support is disabled (for
example when disabled only in SPL).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
48467e4769 mmc: mmc_mode_name() is used also when LOGLEVEL >= LOGL_DEBUG
When CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher then linker throws
error about undefined symbol mmc_mode_name(). So compile mmc_mode_name()
also when CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
57d527e753 mmc: fsl_esdhc_spl: Call mmc_init() before booting from SD card
If env is stored on SD card then U-Boot SPL automatically calls mmc_init()
before it is going to load proper U-Boot from SD card.

If env is not stored on SD card then U-Boot SPL fails to read proper U-Boot
from SD card due to missing mmc_init() call.

So add missing mmc_init() call into fsl_esdhc_spl's mmc_boot() function.
It fixes booting from SD card on P2020 boards without env support in SPL.

mmc_init() returns early if card was already initialized, so there is no
issue with calling this function more times.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
a91998d8af mmc: fsl_esdhc_spl: pre-PBL: fix determining U-Boot size
In pre-PBL header is stored size of code which BootROM copies from SD card
to L2/SRAM. This size has upper limit of L2 cache size. In most cases this
is size of U-Boot SPL or size of L2 cache.

Therefore this size in pre-PBL header cannot be used for determining size
of proper U-Boot.

So always use CONFIG_SYS_MMC_U_BOOT_SIZE for determining size of proper
U-Boot which stored on SD card.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0f58f033d4 mmc: fsl_esdhc_spl: pre-PBL: check for BOOT signature instead of MBR/DBR
Pre-PBL BootROMs (MPC8536E, MPC8569E, P2020, P1011, P1012, P1013, P1020,
P1021, P1022) require custom BOOT signature on sector 0 and MBR/DBR
signature is not required at all.

So add check for BOOT signature and remove check for MBR/DBR.

This allows U-Boot SPL to load proper U-Boot on pre-PBL BootROMs platforms
also from SD cards which do not have MBR/DBR signature on sector 0.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
efd9914ffa powerpc: mpc85xx: Show e500 core version
Distinguish between e500v1 and e500v2.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
de14a5a95c powerpc: mpc85xx: Rename _start_e500 symbol to _start
The real entry point is _start_e500. There is no _start symbol at all. So
rename _start_e500 to _start for convension that _start symbol is used as
entry point.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
2dcf776ebc powerpc: mpc85xx: Drop _start symbol
_start symbol contains only 32-bit data number 0x27051956 despite it is
marked as text section. This magic number is IH_MAGIC which is used for
marking uboot image header.

mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC
number in _start symbol is useless there.

Moreover this _start symbol is not used at all. Entry point is at symbol
_start_e500.

So because this _start symbol is not used for anything, completely remove
it with IH_MAGIC number. After _start symbol was _start_cont symbol, so
replace all relative address calculations by _start_cont.

Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:33 +05:30
Stephen Carlson
3b06577ab4 armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUs
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Yuantian Tang
aaaa1be8f0 armv8: layerscape: fix the function mismatch issue
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
20759b2973 board: sl28: add basic PSCI implementation
For now, this only provides reset and poweroff functions.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
49bb245f1d armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig option
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.

Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
de58ac49a5 armv8: psci: skip setup code if we are not EL3
If we are running in EL2 skip PSCI implementation setup. This avoids an
exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
cb14cc8867 armv8: layerscape: get rid of smc_call()
There are two different implementations to do a secure monitor call:
smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and
seems to be an ad-hoc implementation. The latter is imported from linux.

smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined.
This makes it impossible to have both PSCI calls and PSCI implementation
in one u-boot build. The layerscape SoC code decide at runtime via
check_psci() if there is a PSCI support. Therefore, this is a
prerequisite patch to add PSCI implementation support for the layerscape
SoCs.

Note, for the TFA part, this is only compile time tested with
(ls1028ardb_tfa_defconfig).

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
eb217200ef armv8: include psci_update_dt() unconditionally
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is,
if u-boot is the PSCI provider.
Guard the check which is intended to call into the PSCI implementation
in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI.

Mark the function as weak because - unfortunately - there is already
a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c
which does not the same as the common one.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Sean Anderson
881284b36a arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A
This erratum is reported to cause problems on these processors [1-3].
The problem is usually with the clocking, which is supposed to be
configured by the RCW [4]. However, if it is not set, or if the default
clocking is not correct, then this erratum will cause an SError.
However, according to Ran Wang in [1]:
" ... this erratum is used to pass USB compliance test only, you could
 disable this workaround on your board if you don't any USB issue on
 normal use case, I think it's fine."

So just disable this erratum by default for these processors.

[1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/
[2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993
[3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412
[4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:12:32 +05:30
Vyacheslav Bocharov
39a40a90c8 doc: boards: amlogic: update documentation for ADC support for AXG
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220426052633.3027932-1-adeep@lexina.in
2022-04-26 09:29:14 +02:00
Tudor Ambarus
1b0eec3c9f ARM: dts: at91: sama7g5ek: Align the impedance of the QSPI0's HSIO and PCB lines
The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
Align the output impedance of the QSPI0 HSIOs by setting a medium drive
strength which corresponds to an impedance of 56 Ohms when VDD is in the
3.0V - 3.6V range. The high drive strength setting corresponds to an
output impedance of 42 Ohms on the QSPI0 HSIOs.
This is just a fine tunning. The memory that we have populated on sama7g5ek
works fine even with high drive strength, but it's better to adjust it and
use medium instead, in case some other flashes with higher frequencies are
tested.

Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-26 09:54:41 +03:00
Tudor Ambarus
51ca6a2583 ARM: dts: at91: sama7g5: Fix QSPI1 clock
QSPI1 used the clock of QSPI0, fix it.

Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-26 09:54:41 +03:00
Tudor Ambarus
20ced4b22a spi: atmel-quadspi: Fix the buswidth adjustment between spi-mem and controller
Use the spi_mem_default_supports_op() core helper in order to take into
account the buswidth specified by the user in device tree.

Fixes: 24c8ff4684 ("spi: Add Atmel QuadSPI driver")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-26 09:54:41 +03:00
Eugen Hristev
6669291700 include: configs: at91/sam: remove stray #ifdef/#else
With the commit that moves the BOOTCOMMAND to Kconfig:

970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")

some stray ifdefs have been left in the header files which
are now useless.
Clean up the include files to remove these lines.

Fixes: 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-04-26 09:54:41 +03:00
Durai Manickam KR
3fbdd485fd ARM: dts: sam9x60: Add pit64b node
Add DT node for pit64b support.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
2022-04-26 09:54:41 +03:00
Eugen Hristev
632422d4b3 timers: atmel_pit: introduce CONFIG_SPL_ATMEL_PIT_TIMER
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-04-26 09:54:41 +03:00
Eugen Hristev
e135d2c2f3 timers: atmel_tcb: introduce CONFIG_SPL_ATMEL_TCB
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-04-26 09:53:49 +03:00
Sergiu Moga
0fbc893cfe ARM: mach-at91: armv7: Remove default reset driver
This commit removes the default reset driver for armv7, since
it is no longer needed due to the presence of the SYSRESET driver.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26 09:53:18 +03:00
Sergiu Moga
34a28bdd61 ARM: mach-at91: arm926ejs: Add SYSRESET conditional
This commit adds a condition to the Makefile so that whenever the SYSRESET
option is chosen in the configuration, the default reset driver is ignored.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26 09:52:26 +03:00
Sergiu Moga
085f7378e3 configs: at91: Enable SYSRESET for Atmel/Microchip's platforms
This commit enables SYSRESET in the defconfigs for the
Atmel/Microchip platforms.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26 09:52:25 +03:00
Sergiu Moga
71d4393f84 sysreset: Add Atmel/Microchip sysreset driver
This patch adds a sysreset driver for Atmel/Microchip platforms.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-04-26 09:51:46 +03:00
Sergiu Moga
2016585c3a ARM: dts: at91: Add RSTC node
Add node for RSTC.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26 09:51:46 +03:00
Durai Manickam KR
c8532d3f9e configs: Add sam9x60_curiosity_mmc_defconfig
Add boot from SDMMC (sdcard) support for sam9x60_curiosity.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
2022-04-26 09:50:24 +03:00
Durai Manickam KR
03eaa705a9 ARM: dts: Add device tree files for sam9x60_curiosity
Add dts and dtsi files.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
2022-04-26 09:50:24 +03:00
Durai Manickam KR
b07a022964 board: Add sam9x60_curiosity support
Add board files, Kconfig, Makefile and MAINTAINERS.

Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
2022-04-26 09:50:24 +03:00
Tom Rini
eb3393310b Prepare v2022.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-25 19:26:07 -04:00
Tom Rini
0ad9378284 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-25 18:53:54 -04:00
Tom Rini
11232139e3 nds32: Remove the architecture
As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-04-25 16:04:05 -04:00
Tom Rini
8cfac237b9 Merge branch '2022-04-25-initial-implementation-of-stdboot'
To quote the author:
The bootflow feature provide a built-in way for U-Boot to automatically
boot an Operating System without custom scripting and other customisation.
This is called 'standard boot' since it provides a standard way for
U-Boot to boot a distro, without scripting.

It introduces the following concepts:

   - bootdev - a device which can hold a distro
   - bootmeth - a method to scan a bootdev to find bootflows (owned by
                U-Boot)
   - bootflow - a description of how to boot (owned by the distro)

This series provides an implementation of these, enabled to scan for
bootflows from MMC, USB and Ethernet. It supports the existing distro
boot as well as the EFI loader flow (bootefi/bootmgr). It works
similiarly to the existing script-based approach, but is native to
U-Boot.

With this we can boot on a Raspberry Pi 3 with just one command:

   bootflow scan -lb

which means to scan, listing (-l) each bootflow and trying to boot each
one (-b). The final patch shows this.

With a standard way to identify boot devices, booting become easier. It
also should be possible to support U-Boot scripts, for backwards
compatibility only.

...

The design is described in these two documents:

https://drive.google.com/file/d/1ggW0KJpUOR__vBkj3l61L2dav4ZkNC12/view?usp=sharing

https://drive.google.com/file/d/1kTrflO9vvGlKp-ZH_jlgb9TY3WYG6FF9/view?usp=sharing
2022-04-25 16:02:27 -04:00
Tom Rini
bc9da9fb50 Merge branch '2022-04-23-binman-updates'
- Assorted binman updates, and add Alper as a maintainer, after talking
  with Simon.
2022-04-25 16:02:03 -04:00
Heinrich Schuchardt
dd2e8ed415 binman: don't import deprecated distutils package
'make tests' fails on Ubuntu 22.04 with:

binman: ./tools/binman/binman:12: DeprecationWarning:
The distutils package is deprecated and slated for removal in Python 3.12.
Use setuptools or check PEP 632 for potential alternatives
  from distutils.sysconfig import get_python_lib
./tools/binman/binman:12: DeprecationWarning:
The distutils.sysconfig module is deprecated, use sysconfig instead
  from distutils.sysconfig import get_python_lib
<unittest.result.TestResult run=428 errors=0 failures=4>
AssertionError: 0 != 468

As we don't use Ubuntu 16.04 for our CI anymore drop the import.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
06c73e37b3 MAINTAINERS: Add Alper as a binman maintainer
I ended up learning most of binman internals while trying to add a few
features to it, and I recently started reviewing binman series that
would not affect me personally. I'll keep working on it and try to do
more reviews.

Add myself as a maintainer for binman.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Tom Rini <trini@konsulko.com>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
82337bb6b6 binman: Refuse to replace sections for now
Binman interfaces allow attempts to replace any entry in the image with
arbitrary data. When trying to replace sections, the changes in the
section entry's data are not propagated to its child entries. This,
combined with how sections rebuild their contents from its children,
eventually causes the replaced contents to be silently overwritten by
rebuilt contents equivalent to the original data.

Add a simple test for replacing a section that is currently failing due
to this behaviour, and mark it as an expected failure. Also, raise an
error when replacing a section instead of silently pretending it was
replaced.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
99283e5389 binman: Test replacing non-section entries in FIT subsections
A previous patch fixes binman to correctly extract FIT subentries. This
makes it easier to test replacing these entries as we can write tests
using an existing helper function that relies on extracting the replaced
entry.

Add tests that replace leaf entries in FIT subsections with data of
various sizes. Replacing the subsections or the whole FIT section does
not work yet due to the section contents being re-built from unreplaced
subentries' data.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
74d3b2311d binman: Create FIT subentries in the FIT section, not its parent
When reading images from a file, each entry's data is read from its
parent section as specified in the Entry.Create() call that created it.
The FIT entry type has been creating its subentries under its parent
(their grandparent), as creating them under the FIT entry resulted in an
error until FIT was converted into a proper section.

FIT subentries have their offsets relative to the FIT section, and
reading those offsets in the parent section results in wrong data. The
subentries rightfully belong under the FIT entries, so create them
there. Add tests checking that we can extract the correct data for a FIT
entry and its subentries.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
e736878b08 binman: Remove '/images/' fragment from FIT subentry paths
Binman FIT entry nodes describe their subentries in an 'images' subnode,
same as how they would be written for the mkimage executable. The entry
type initially manually managed its subentries keyed by their node paths
relative to its base node. It was later converted to a proper section
while still keeping the same keys for subentries.

These subentry keys of sections are used as path fragments, so they must
not contain the path separator character '/'. Otherwise, they won't be
addressable by binman extract/replace commands. Change these keys from
the '/images/foo' forms to the subentry node names. Extend the simple
FIT tests to check for this.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
e2ce4fb986 binman: Don't reset offset/size if image doesn't allow repacking
When an image has the 'allow-repack' property, binman includes the
original offset and size properties from the image description in the
fdtmap. These are later used as the packing constraints when replacing
entries in an image, so other unconstrained entries can be freely
positioned.

Replacing an entry in an image without 'allow-repack' (and therefore the
original offsets) follows the same logic and results in entries being
merely concatenated. Instead, skip resetting the calculated offsets and
sizes to the missing originals for these images so that every entry is
constrained to its existing offset/size.

Add tests that replace an entry with smaller or equal-sized data, in an
image that doesn't allow repacking. Attempting to do so with bigger-size
data is already an error that is already being tested.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
8ee4ec9bf5 binman: Collect bintools for images when replacing entries
Binman entries can use other executables to compute their data, usually
in their ObtainContents() methods. Subclasses of Entry_section would use
bintools in their BuildSectionData() method instead, which is called
from several places including their Pack().

These binary tools are resolved correctly while building an image from a
device-tree description so that they can be used from these methods.
However, this is not being done when replacing entries in an image,
which can result in an error as the Pack() methods attempt to use them.

Collect and resolve entries' bintools also when replacing entries to fix
Pack() errors. Add a way to mock bintool usage in the testing entry type
and tests that check bintools are being resolved for such an entry.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:11:05 -04:00
Alper Nebi Yasak
67bf2c8ded binman: Fix unique names having '/.' for images read from files
Binman can embed a copy of the image description into the images it
builds as a fdtmap entry, but it omits the /binman/<image-name> prefix
from the node paths while doing so. When reading an already-built image
file, entries are reconstructed using this fdtmap and their associated
nodes still lack that prefix.

Some entries like fit and vblock create intermediate files whose names
are based on an entry unique name. This name is constructed from their
node's path by concatenating the parents with dots up to the binman
node, e.g. /binman/image/foo/bar becomes 'image.foo.bar'.

However, we don't have this /binman/image prefix when replacing entries
in such an image. The /foo/bar entry we read when doing so erroneously
has the unique name of '/.foo.bar', causing permission errors when the
entry attempts to create files based on that.

Fix the unique-name generation by stopping at the '/' node like how it
stops at the binman node. As the unique names are used as filenames, add
tests that check if they're safe to use as filenames.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:10:41 -04:00
Simon Glass
e7b2ce191e bootstd: doc: Add documentation
Add documentation for this feature, including the commands and full
devicetree bindings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
a91492b6e9 bootstd: Provide a default command
We would like to use bootstd by default when EFI boot manager is not
enabled. But so far bootstd does not support all the of distro-boot
fetures. So for now, add an option to select this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
fca20a5a62 bootstd: Add setup for the bootflow tests
We need to create a disk image with a partition table and a DOS-format
filesystem containing a few files. Provide a fallback binary for CI since
it does not seem able to detect the loopback partitions.

Add this to a dm_init test so that it happens when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
fb1451bec2 bootstd: Add tests for bootstd including all uclasses
Add a set of combined tests for the bootdev, bootflow and bootmeth
commands, along with associated functionality.

Expand the sandbox console-recording limit so that these can work.

These tests rely on a filesystem script which is not yet added to the
Python tests. It is included here as a shell script.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
0ccb0ac5d8 bootstd: usb: Add a bootdev driver
Add a bootdev driver for USB host. It can use the distro boot mechanism to
locate a file, or any other available bootmeth.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
d9409244b3 bootstd: Add an implementation of script boot
Add a bootmeth driver which handles distro boot from a disk via a U-Boot
script, so we can boot a bootflow using this commonly used mechanism. This
is required by Armbian, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
7d0478d241 bootstd: sandbox: Add a hostfs bootdev
It is helpful to be able to try out bootstd on sandbox, using host files.
This is easier than using a block device, which must have a filesystem,
partition table, etc.

Add a new driver which provides this feature. For now it is not used in
tests, but it is likely to be useful.

Add notes in the devicetree also, but don't disturb the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
126947b773 bootstd: Add a sandbox bootmeth driver
Add a bootmeth driver for sandbox, used for testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
0b41525e8f bootstd: Add an implementation of EFI bootmgr
Add a bootmeth driver which handles EFI boot manager, using EFI_LOADER.

In effect, this provides the same functionality as the 'bootefi bootmgr'
command and shares the same code. But the interface into it is via a
bootmeth, so it does not require any special scripts, etc.

For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
a080b98981 bootstd: Add a system bootdev for strange boot methods
Some boot methods don't act on a single bootdev but instead do their own
thing. An example is EFI bootmgr which scan various devices using its own
logic. Add a bootdev to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
acfa9bdfa7 bootstd: Add an implementation of EFI boot
Add a bootmeth driver which handles EFI boot, using EFI_LOADER.

In effect, this provides the same functionality as the 'bootefi' command
and shares the same code. But the interface into it is via a bootmeth,
so it does not require any special scripts, etc.

For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.

There was much discussion about whether this is needed, but it seems
that it is, at least for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
dab2c2859b bootstd: Add an implementation of distro PXE boot
Add a bootmeth driver which handles distro boot from a network device, so
we can boot a bootflow using this commonly used mechanism.

In effect, this provides the same functionality as the 'pxe' command
and shares the same code. But the interface into it is via a bootmeth.

For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
4fd8d077cb bootstd: ethernet: Add a bootdev driver
Add a bootdev driver for Ethernet. It can use the PXE boot mechanism to
locate a file, added later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
b8aa463e9b bootstd: mmc: Add a bootdev driver
Add a bootdev driver for MMC. It mostly just calls the bootdev helper
function.

Add a function to obtain the block device for an MMC controller.

Fix up the comment for mmc_get_blk_desc() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
31aefaf89a bootstd: Add an implementation of distro boot
Add a bootmeth driver which handles distro boot from a disk, so we can
boot a bootflow using this commonly used mechanism.

In effect, this provides the same functionality as the 'sysboot' command
and shares the same code. But the interface into it is via a bootmeth.

For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
7fca71d0d6 bootstd: Add a bootmeth command
Add a 'bootmeth' command to handle listing and ordering of boot methods.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
2d653f686b bootstd: Add a bootflow command
Add a 'bootflow' command to handle listing and selection of bootflow.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
5d053cca38 bootstd: Add a bootdev command
Add a 'bootdev' command to handle listing and selection of bootdevs.

Disable standard boot for a few boards which otherwise run out of space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
a8f5be178d bootstd: Add support for bootflows
Add support for bootflows, including maintaining a list of them and
iterating to find them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
a950d31abe bootstd: Add the bootmeth uclass and helpers
A bootmeth is a method of locating an operating system. For now, just
add the uclass itself. Drivers for particular bootmeths are added later.

If no bootmeths devices are included in the devicetree, create them
automatically. This avoids the need for boilerplate in the devicetree
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
201417d700 bootstd: Add the bootdev uclass
A 'bootdev' is a device which can be used to boot an operating system.
It is a child of the media device (e.g. MMC) which handles reading files
from that device, such as a bootflow file.

Add a uclass for bootdev and the various helpers needed to make it
work. Also add a binding file, empty for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
ef5e3891f5 bootstd: Add the bootstd uclass and core implementation
The 'bootstd' device provides the central information about U-Boot
standard boot.

Add a uclass for bootstd and the various helpers needed to make it
work. Also add a binding file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
9d260253e8 bootstd: Add the concept of a bootflow
A bootflow encapsulates the process used to boot an operating system.
It typically has a control file (such as extlinux.conf) and information
about which 'bootdev' it came from.

Add the header file for this first, since it is needed by all other
files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:04 -04:00
Simon Glass
c24e58f599 fs: Add a function to set the filesystem type
When sandbox is used with hostfs we won't have a block device, but still
must set up the filesystem type before any filesystem operation, such as
loading a file. Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
87571b7f20 dm: blk: Add a function to return the device type
Use the uclass name to get the device type for a block device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
026e2136f8 test: dm: Restart USB before assuming it is stopped
Update the blk test to stop USB first, in case another test has started
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
9bd2f62d12 test: fastboot: Avoid using mmc1
The bootflow tests need to use an MMC with an associated backing file
containing a filesystem. Update the fastboot tests to cope with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
4e0710a2d0 dm: core: Allow finding a uclass device by partial name
In some cases two devices are related and the only way to tell is to
check that the names partially patch. Add a way to check this without
needing to create a new string for the comparison.

Fix the comment for device_find_child_by_namelen() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
6aa4fe3912 dm: core: Rename and fix uclass_get_by_name_len()
It seems that namelen is more common in U-Boot. Rename this function to
fit in better. Also fix a bug where it breaks the operation of
uclass_get_by_name() and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reported-by: Tim Harvey <tharvey@gateworks.com>
2022-04-25 10:00:03 -04:00
Simon Glass
8565efd509 lib: Add a way to find the postiion of a trailing number
At present it is not possible to find out which part of the string is the
number part and which is before it. Add a new variant which provides this
feature, so we can separate the two in the caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
d667a0d8f4 lib: Fix a few bugs in trailing_strtoln()
At present this has a minor bug in that it reads the byte before the
start of the string, if it is empty. Also it doesn't handle a
non-numeric prefix which is only one character long.

Fix these bugs with a reworked implementation. Add a test for the second
case. The first one is hard to test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
4e64cae0a0 lib: Correct comment formatting to avoid sphinx problems
Tweak a few comments to kep sphinx happy, in case we want to include this
file one day.

Also fix the 'exxamine' typo.

Patch-notes:
This uses:

   sed -i 's/@param \(\S*\)\s*/@\1: /' include/vsprintf.h

to convert the @param to the new format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
18436c74dc test: Add tests for trailing_strtol()
This function currently has no tests. Add some.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Simon Glass
2fa4756d03 lib: Move string tests to the string module
A few string tests were added to the print module by mistake. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-25 10:00:03 -04:00
Vyacheslav Bocharov
a718f5524d board: amlogic: jethub j100: enable saradc in config
Enable ADC in board config file

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-7-adeep@lexina.in
2022-04-25 09:25:00 +02:00
Vyacheslav Bocharov
ee8094f696 board: amlogic: jethub j100: enable saradc in dts
Prepare to use ADC channel 1 to check the hardware revision of the board:
- add u-boot dts include with saradc node

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-6-adeep@lexina.in
2022-04-25 09:25:00 +02:00
Vyacheslav Bocharov
8a4a73f466 adc: meson-saradc: add AXG variant
Add support for the SARADC variant found on the AXG SoCs family.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-5-adeep@lexina.in
2022-04-25 09:25:00 +02:00
Vyacheslav Bocharov
66a657b7c6 clk: meson: update driver for g12a-ao clocks
Update g12a-ao clk driver:
- move clk->id check to .request function
- remove unnecessary check (gate->reg == 0)

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-4-adeep@lexina.in
2022-04-25 09:25:00 +02:00
Vyacheslav Bocharov
4da0986562 clk: meson: fix driver name for g12a-ao clocks
Update the clk-g12a-ao driver from "axg" to "g12a"

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-3-adeep@lexina.in
2022-04-25 09:25:00 +02:00
Vyacheslav Bocharov
dcccf73004 clk: meson: add minimal driver for axg-ao clocks
Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
are supported.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-2-adeep@lexina.in
2022-04-25 09:24:59 +02:00
Sean Anderson
9c18c695f8 armv8: fsl-layerscape: Respect Kconfig for erratum A009007
There is a Kconfig for this erratum, but it is ignored for armv8.
Respect it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-25 12:50:39 +05:30
Hou Zhiqiang
b416df33c9 configs: Layerscape: Remove the 'fdt_addr' env
On Layerscape platforms, the DTB is loaded from boot filesystem,
per the fdt_addr description in doc/README.distro, it must be
removed.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-25 12:50:39 +05:30
AKASHI Takahiro
64efbd125d cmd: part: add explicit dependency on PARTITIONS
This is a follow-up patch for my "disk: don't compile in partition
support for spl/tpl if not really necessary".

"part" command is useful only if, at least, one of partition table types
is selected. So it should have a dependency on PARTITIONS which is now
automatically selected if one of partition table types is enabled.

With this change, *_defconfig which explicitly selects CMD_PART but
has no partition table types enabled should also be fixed.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-04-24 15:17:31 -04:00
Tom Rini
46a06ed82a Merge tag 'efi-2022-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc1-3

Documentation:

* Document image size parameter of bootefi command

UEFI:

* avoid building partition support in SPL/TPL where not required
* improve integration of EFI subsystem and driver model
* restore ability to boot arbitrary blob
2022-04-23 18:42:00 -04:00
AKASHI Takahiro
d97e98c887 efi_loader: disk: use udevice instead of blk_desc
In most of all cases, we can avoid using blk_desc which is expected
to be private to udevice(UCLASS_BLK), that is, the data should not
be manipulated outside the device driver unless really needed.

Now efi_disk's internally use dev_read/write() interfaces
if CONFIG_PARTITIONS is enabled.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
59da9d4782 dm: disk: add read/write interfaces with udevice
In include/blk.h, Simon suggested:
===>
/*
 * These functions should take struct udevice instead of struct blk_desc,
 * but this is convenient for migration to driver model. Add a 'd' prefix
 * to the function operations, so that blk_read(), etc. can be reserved for
 * functions with the correct arguments.
 */
unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
                        lbaint_t blkcnt, void *buffer);
unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
                         lbaint_t blkcnt, const void *buffer);
unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,
                         lbaint_t blkcnt);
<===

So new interfaces are provided with this patch.

They are expected to be used everywhere in U-Boot at the end.
The exceptions are block device drivers, partition drivers and efi_disk
which should know details of blk_desc structure.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
a3cb34e9b7 efi_loader: disk: not delete BLK device for BLK(IF_TYPE_EFI_LOADER) devices
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.

So we should avoid recursively invoke further processing in the callback
function.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
b406eb04c3 efi_loader: disk: a helper function to delete efi_disk objects
This function is expected to be called, in particular from dm's pre_remove
hook, when associated block devices no longer exist.

Add efi_disk_remove() function.
This function removes an efi_disk object for a raw disk device (UCLASS_BLK)
and related objects for its partitions (UCLASS_PARTITION).

So this function is expected to be called through driver model's "remove"
interface every time a raw disk device is to be disconnected.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
3c809dfed7 efi_loader: disk: not create BLK device for BLK(IF_TYPE_EFI_LOADER) devices
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.

So we should avoid recursively invoke further processing in the callback
function.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
a9bf024b29 efi_loader: disk: a helper function to create efi_disk objects from udevice
Add efi_disk_probe() function.
This function creates an efi_disk object for a raw disk device (UCLASS_BLK)
and additional objects for related partitions (UCLASS_PARTITION).

So this function is expected to be called through driver model's "probe"
interface every time one raw disk device is detected and activated.
We assume that partition devices (UCLASS_PARTITION) have been created
when this function is invoked.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
a57ad20d07 efi_loader: split efi_init_obj_list() into two stages
In the next commit, CONFIG_EFI_SETUP_EARLY will become mandated
in order to support dynamic enumeration of efi_disk objects.

This can, however, be problematic particularly in case of file-based
variable storage (efi_variable.c, default).
Non-volatile variables are to be restored from EFI system partition
by efi_init_variables() in efi_init_obj_list(). When efi_init_obj_list()
is called in board_init_r(), we don't know yet what disk devices
we have since none of device probing commands (say, scsi rescan) has not
been executed at that stage.

So in this commit, a preparatory change is made; efi_init_obj_list() is
broken into the two functions;
   * efi_init_early(), and
   * new efi_init_obj_list()

Only efi_init_early() will be called in board_init_r(), which allows
us to execute any of device probing commands, either though "preboot"
variable or normal command line, before calling efi_init_obj_list() which
is to be invoked at the first execution of an efi-related command
(or at efi_launch_capsules()) as used to be.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
bf76031d19 dm: blk: add a device-probe hook for scanning disk partitions
Now that all the block device drivers have enable a probe hook, we will
call part_create_block_devices() to enumerate all the partitions and
create associated udevices when a block device is detected.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
43855fdb2c dm: disk: add UCLASS_PARTITION
NOTE: probably we have to update config dependencies,
in particular, SPL/TPL_PRINTF?

With this new function, UCLASS_PARTITION devices will be created as
child nodes of UCLASS_BLK device.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:41 +02:00
AKASHI Takahiro
8ff50227be test: dm: add tests for tag support
The new test covers all tag-related interfaces.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
b77324d831 dm: tag: add some document
Some basic stuff about tag support is explained under
doc/devlop/driver-model.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
a806f33401 dm: tag: change ENOSPC to ENOMEM
ENOMEM is a more common error code for memory starvation.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-04-23 22:05:34 +02:00
Masahisa Kojima
990f6636ea bootmenu: fix menu API error handling
U-Boot menu framework(common/menu.c) returns 1 if it is successful,
returns negative value if it fails.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
3fb6fa7a71 disk: don't compile in partition support for spl/tpl if not really necessary
Under the current Kconfigs, disk/part.c will be compiled in even if none of
partition table types are enabled. This will lead to the size growth of SPL
/TPL code.

With this patch, CONFIG_PARTITIONS is selected only if, at least, one of
CONFIG_*_PARTITION is enabled.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
38f255b960 efi_loader: disk: compile efi_disk when CONFIG_BLK
Now we can build efi_loader with block device support (CONFIG_BLK) and
without CONFIG_PARTITIONS.
So change Makefile.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
7a06fd7579 efi_loader: PARTITION_UUIDS should be optional
In the current implementation, partition table support (either GPT or DOS)
is not mandatory. So CONFIG_PARTITION_UUIDS should not be enabled
(selected) unconditionally.

Fixes: commit 17f8cda505 ("efi_loader: set partition GUID in device path for SIG_TYPE_GUID")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-23 22:05:34 +02:00
AKASHI Takahiro
c73a0709e4 sandbox: move a function prototype
Since host_get_dev_errr() is defined in drivers/block/sandbox.c,
the associated function prototype should be in a more appropriate
header file.

Fixes: commit 4101f68792 ("dm: Drop the block_dev_desc_t typedef")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:33 +02:00
AKASHI Takahiro
2a0d1881ac disk: define nullified functions for !PARTITIONS
Some defconfig enables CMD_PART even if none of any partition table
types (CONFIG_*_PARTITION) are enabled.
This will lead to the size growth in SPL/TPL code since disk/part.c
will be compiled in any way.
We will change disk/Kconfig later so that CONFIG_PARTITIONS is only
enabled when, at least, one of CONFIG_*_PARTITION is enabled.

To make the build work (in particular, "part" command) correctly,
a few functions should be defined as void functions in case of
!CONFIG_PARTITIONS.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:33 +02:00
AKASHI Takahiro
37168e3964 disk: enable function prototypes in part.h for SPL/TPL
Since CONFIG_[SPL|TPL]_PARTITIONS were introduced, part.h has not been
updated. Due to this, while the build won't fail, some functionality may
possibly break as some partition-related functions are nullified even
though some partition table types are enabled for SPL/TPL.

Fixes: commit 88ca8e2695 ("disk: Add an option for partitions in SPL")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:33 +02:00
AKASHI Takahiro
fd3654df36 disk: include errno.h explicitly in part.h
Some errno numbers are used in defining inline functions.
So "errno.h" should be explicitly included to avoid possible build errors.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-04-23 22:05:33 +02:00
Heinrich Schuchardt
7f97d8cddf doc: update bootefi man-page
A image_size parameter has been added to the bootefi parameter.
Describe all parameters.

Correct how the description of how the device-path in the loaded
image protocol is determined.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-23 22:05:33 +02:00
Kyle Evans
2058983689 cmd: bootefi: restore ability to boot arbitrary blob
Up until commit 5f59518a7b ("efi_loader: setting boot device"), we
could boot an arbitrary blob with bootefi. Indeed, efi_run_image() even
has a special case for missing device paths indicating a payload that
was directly loaded via JTAG, for example.

Restore the ability to inject a UEFI payload into memory and `bootefi`
it. If the address passed isn't the last PE-COFF loaded, then we'll
wipe out the pre-existing DP/Image information and let efi_run_image()
synthesize a memory device path.

An image size is required if we're booting an arbitrary payload, and
the FDT argument has been changed to accept `-`. The size could be
deduced from the image header, but it's required anyways as an explicit
acknowledgment that one's trying to boot an arbitrary payload rather
than accidentally using the wrong address in the single-addr form.

Fixes: 5f59518a7b ("efi_loader: setting boot device")
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-23 22:05:33 +02:00
Vagrant Cascadian
11343854b6 tools: kwboot: Fix spelling of "followed" in kwboot.1
Fix spelling of "followed" in kwboot.1 manpage.

Series: 2
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-23 22:05:33 +02:00
Mark Kettenis
568d3ba969 doc: board: apple: Mention M1 Ultra support
U-Boot now supports the M1 Ultra SoC as found in the new Mac Studio.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-04-23 22:05:33 +02:00
Tom Rini
9bb99fa958 Merge branch '2022-04-22-assorted-updates'
- Add "-q" to fdt addr and use it in distro_bootcmd to make the user
  experience less scary reading in normal try/fail cases.
- Let the adc update an environment variable like many other commands do
- Fix TPL SEPARATE_BSS check when locating DTB
- Allow ":" in PXE file names again
- Two Apple M1 fixes
2022-04-23 08:06:28 -04:00
Mark Kettenis
a609353e82 arm: apple: Point stdout-path to framebuffer when keyboard present
Unless you have a spare Apple Silicon machine, getting access to
the serial port on Apple Silicon machines requires special
hardware. Given that most machines come with a built-in screen
the framebuffer is likely to be the most convenient output device
for most users. While U-Boot will output to both serial and
framebuffer, OSes might not. Therefore set stdout-path to point
at /chosen/framebuffer when a keyboard is connected to the machine.

This behaviour can be overridden by setting the "stdout" variable
in the U-Boot environment. I addition to that keep the serial
console as the default when running under the m1n1 hypervisor.
The m1n1 hypervisor virtualizes the serial port such that it
can be easily accessed from any other machine with a USB port.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Janne Grunau <j@jannau.net>
Tested-by: Janne Grunau <j@jannau.net>
2022-04-22 15:56:39 -04:00
Mark Kettenis
4a8d07114e arm: apple: Don't clear framebuffer
Enable CONFIG_NO_FB_CLEAR to preserve the Asahi logo. Since that
logo is drawn on a black background also enable
CONFIG_SYS_WHITE_ON_BLACK such that text printed by U-Boot is still
visible.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-04-22 15:44:10 -04:00
Lyle Franklin
85f8e03b2a Allow colon in PXE bootfile URLs
- U-boot's PXE flow supports prefixing your bootfile name with an
  IP address to fetch from a server other than the DHCP server,
  e.g. `hostIPaddr:bootfilename`:
  a93907c43f
- However, this breaks bootfile paths which contain a colon, e.g.
  `f0:ad:4e:10:1b:87/7/pxelinux.cfg/default`
- This patch checks whether the `hostIPaddr` prefix is a valid
  IP address before overriding the serverIP otherwise the whole
  bootfile path is preserved

Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
2022-04-22 15:44:10 -04:00
Peter Hoyes
e9496ec374 fdt: Add -q option to fdt addr for distro_bootcmd
distro_bootcmd uses this construct a few times to test $fdt_addr_r,
and fall back on $fdtcontroladdr if not set/invalid:

    if fdt addr ${fdt_addr_r}; then
        ...
    else
        ...
    fi

If the `fdt addr` test fails, it prints the following  message on the
console, suggesting there is an error when there is not:

    libfdt fdt_check_header(): FDT_ERR_BADMAGIC

To remove this potentially confusing error message, this patch adds -q
as a 'quiet' option for fdt addr, and uses this flag in
config_distro_bootcmd.h

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2022-04-22 15:44:10 -04:00
Marek Vasut
9de612ae4d cmd: adc: Add support for storing ADC result in env variable
Add the ability to save ADC conversion result in an environment
variable. This is useful for further arbitrary processing by the
U-Boot scripts.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-04-22 15:44:10 -04:00
Andrew Abbott
0de71bb580 fdt: Fix TPL SEPARATE_BSS check when locating DTB
Commit 690af71850 changed this condition
from an explicit

IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)

to

CONFIG_IS_ENABLED(SEPARATE_BSS)

The documentation for CONFIG_IS_ENABLED() in include/linux/kconfig.h
implies that we will get the correct behaviour, but the actual behaviour
differs such that this condition is now always false.

This stopped TPL being able to load the device tree blob at least on the
ROCKPro64 board (RK3399 SoC), since the wrong device tree location was
chosen.

The issues causing this behaviour with CONFIG_IS_ENABLED() are:

1. The documentation implies that CONFIG_SPL_BUILD =>
   CONFIG_SPL_<option> is considered before the TPL equivalent.

   Actually, the TPL options have higher priority - see definition of
   _CONFIG_PREFIX.

2. The documentation implies a fallthrough, eg. if CONFIG_SPL_BUILD is
   defined but the CONFIG_SPL_<option> is not, then it will proceed to
   check if CONFIG_TPL_BUILD

   Actually, if CONFIG_TPL_BUILD is defined, then it stops there
   and CONFIG_SPL_BUILD is not considered - see definition of
   _CONFIG_PREFIX.

   During TPL build, at least for the ROCKPro64, both CONFIG_TPL_BUILD
   and CONFIG_SPL_BUILD are defined, but because of the above, only TPL
   options are considered. Since there is no CONFIG_TPL_SEPARATE_BSS,
   this fails.

Fixes: 690af71850 ("fdt: Correct condition for SEPARATE_BSS")
Signed-off-by: Andrew Abbott <andrew@mirx.dev>
2022-04-22 15:44:10 -04:00
Tom Rini
faeb564113 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-pmic 2022-04-22 11:06:38 -04:00
Tom Rini
6d73175b1f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb 2022-04-22 11:06:31 -04:00
Tom Rini
bfdb30559c configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-22 10:17:35 -04:00
Sean Anderson
847990219c power-domain: Fix use of uninitialized value in dev_power_domain_ctrl
If dev_count_phandle_with_args returns 0 or another error, then pd will never
have been initialized by power_domain_get_by_index. Avoid comparing against
pd.dev in this situation.

Fixes: 3e4fcfa4bc ("power-domain: fix hang in endless loop on i.MX8")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-22 21:19:21 +09:00
Tom Rini
759a89924b Merge https://gitlab.denx.de/u-boot/custodians/u-boot-watchdog
- device-tree-bindings: watchdog: document common properties (Philippe)
- nuvoton: Add support for Nuvoton (Jim)
2022-04-22 08:12:53 -04:00
Tom Rini
6e2af641e4 Merge tag 'u-boot-imx-20220422' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220422
-------------------

- Switch to DM_SERIAL
- Drop MMCROOT
- several cleanup

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11815
2022-04-22 08:12:20 -04:00
Oleksii Titov
6674d2d9fe Add support for TP-Link UE200 dongle
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Oleksii Titov <ootitov@gmail.com>
2022-04-22 10:35:14 +02:00
Michal Simek
142d50fbce usb: dwc3: Add support for usb3-phy PHY configuration
When usb3-phy label is found, PHY driver is called and serdes line is
initialized. This is preparation for serdes/psgtr driver to configure GT
lines based on description in DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-04-22 10:35:14 +02:00
Michal Simek
e81782ab88 generic-phy: s/CONFIG_PHY/CONFIG_IS_ENABLED(PHY)/
Allow to disable PHY driver in SPL because it checks the CONFIG_SPL_PHY
variable for SPL builds.

The same change was done for usb by commit fd09c205fc ("usb:
s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-04-22 10:35:14 +02:00
Adam Ford
570eaadac0 usb: gadget: ci: Make various ops const
ci_udc_ops and ci_ep_ops do not change their operations.
Mark them as const.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-04-22 10:35:14 +02:00
Jim Liu
e885d09dd0 wdt: nuvoton: Add support for Nuvoton
Add watchdog controller driver for NPCM7xx/npcm8xx

the wdt design of npcm750 and npcm845 is the same.
so the driver can work on npcm750 and npcm845.
about npcm845 wdt dtsi i will followed kernel dts name
to use nuvoton,npcm750-wdt.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-22 09:02:55 +02:00
Philippe Reynes
33ef09072b doc: device-tree-bindings: watchdog: document common properties
Adds simple documentation about common properties for watchdog
in the device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-22 09:02:34 +02:00
Tom Rini
ea5583b90f Merge branch '2022-04-21-further-cleanups'
- Fix SPL_SYS_MALLOC_SIMPLE and non-SPL_FRAMEWORK boards (a large number
  of PowerPC platforms)
- Remove duplication of crc16 functionality
- Migrate COUNTER_FREQUENCY to CONFIG_COUNTER_FREQUENCY and have it in
  Kconfig
2022-04-21 19:55:38 -04:00
Heiko Thiery
d173b107be ARM: imx: imx8mn-evk: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enough space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 23:14:24 +02:00
Peng Fan
f5f3906d3a configs: imx: drop IMX_FEC_BASE
IMX_FEC_BASE is not used in these boards, so drop it.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 23:00:26 +02:00
Ying-Chun Liu (PaulLiu)
84adf92968 imx8mm-cl-iot-gate: Remove redundant board_fix_fdt()
In arch/arm/mach-imx/imx8m/soc.c there's an implementation of
board_fix_fdt() introduced by commit 35bb60787b. Remove the
redundant one to avoid failed to build from source when enabling
CONFIG_OF_BOARD_FIXUP.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21 23:00:26 +02:00
Peng Fan
151a030063 arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid
Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if
CONFIG_COUNTER_FREQUENCY is valid

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2022-04-21 15:27:18 -04:00
Peng Fan
c5b9bf5518 include/configs: drop COUNTER_FREQUENCY
Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:27:17 -04:00
Peng Fan
abf8d9632f configs: set CONFIG_COUNTER_FREQUENCY
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in
config header file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: Re-run migration]
2022-04-21 15:15:51 -04:00
Peng Fan
4e65175ea7 arch: arm: Kconfig: set default COUNTER_FREQUENCY
Set default COUNTER_FREQUENCY according to config header file
under include/configs/
i.MX6UL/ULL/7D/8QM/8QXP all has system counter frequency run at 8MHz,
so set default value for them.
SUNXI/EXYNOS/ROCKCHIP_RK3128/ROCKCHIP_RK3288/ROCKCHIP_RK322X/ROCKCHIP_RK3036
at 24MHz. ARCH_LX2160A at 25MHz
ARCH_ZYNQMP at 100MHz
2022-04-21 14:32:40 -04:00
Peng Fan
bf8c4ced3c arch: arm: move COUNTER_FREQUENCY from versal to arm
Make COUNTER_FREQUENCY usable to armv8 and armv7-a, not limited to
versal. And update help message.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:32:40 -04:00
Peng Fan
d8c033a9cd xilinx: versal: board: use CONFIG_COUNTER_FREQUENCY
Since versal has CONFIG_COUNTER_FREQUENCY, so use it. And
COUNTER_FREQUENCY will be dropped.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2022-04-21 14:32:40 -04:00
Pali Rohár
467f0c4dc2 misc: atsha204a: Remove duplicate CRC-16 implementation
ATSHA204A uses bit-reversed checksum of standard CRC-16 with polynomial
x^16 + x^15 + x^2 + 1.

This ATSHA204A specific checksum can be calculated just by using common
U-Boot functions bitrev16() and crc16().

So replace custom driver CRC-16 implementation by common U-Boot functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Pali Rohár
4f0e77f8f0 fs: ext4: Use CRC-16 implementation from linux/crc16.h
Implementation in linux/crc16.h provides standard CRC-16 algorithm with
polynomial x^16 + x^15 + x^2 + 1. Use it and remove duplicate ext4 CRC-16
specific code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Pali Rohár
1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
This implementation provides standard CRC-16 algorithm with polynomial
x^16 + x^15 + x^2 + 1.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Pali Rohár
e523f5d181 crc16: Rename fs/ubifs/crc16.h to include/linux/crc16.h
File fs/ubifs/crc16.h is standard linux's crc16.h include file. So move it
from fs/ubifs to include/linux where are also other linux include files.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Pali Rohár
bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
U-Boot CRC-16 implementation uses polynomial x^16 + x^12 + x^5 + 1 which is
not standard CRC-16 algorithm, but it is known as CRC-16-CCITT. Rename file
crc16.c to crc16-ccitt.c to reduce confusion.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Pali Rohár
b616947052 SPL: Do not enable SPL_SYS_MALLOC_SIMPLE without SPL_FRAMEWORK by default
On P2020 board is SPL malloc simple always failing with error and loops:

  SD boot...
  alloc space exhausted
  Bad trap at PC: f8f8b5f0, SR: 21200, vector=d00
  NIP: 00000000 XER: 00000000 LR: 00000000 REGS: f8f8b5f0 TRAP: 20000000 DAR: 00000000
  MSR: 00021200 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

  GPR00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
  GPR08: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
  GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
  GPR24: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
  Call backtrace:
  Exception in kernel pc f8f8b5f0 signal 0

Inspection showed that gd->malloc_limit is zero. And it is because
generally SPL_FRAMEWORK initialize SPL's gd->malloc_limit. But when
SPL_FRAMEWORK is not enabled then in most cases nobody initialize
gd->malloc_limit and so SPL malloc simple does not work.

So disable SPL_SYS_MALLOC_SIMPLE by default when SPL_FRAMEWORK is not
enabled. SPL_SYS_MALLOC_SIMPLE can be disabled only by setting
SPL_SYS_MALLOC_F_LEN to zero. So do it.

This change fixes SPL error "alloc space exhausted" on P2020 board.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 14:32:40 -04:00
Tom Rini
e50f66e364 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mrvl_uart.sh: Remove script (Pali)
- Fix Espressobin build for configs where ENV is not in SPI (Rogier)
- mvebu: a37xx: Add support for reading OTP (Pali)
- mvebu: uDPU: Ethernet fixes and misc DT and defconfig changes (Robert)
- mvebu: Add support for reading LD0 and LD1 eFuse (Pali)
- kwboot: Replace fstat()+st_size by lseek()+SEEK_END (Pali)
- mvebu: turris_omnia: Enable CONFIG_CMD_FUSE (Pali)
- arm: Add CONFIG_SPL_SYS_NO_VECTOR_TABLE used on 32bit MVEBU (Pali)
- mvebu: a37xx: Add support for writing Security OTP values (Pali)
- mvebu: turris: Misc enhancements and cleanups / fixes (Pali)
- Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet (Tony)
2022-04-21 11:44:54 -04:00
Tom Rini
feeacc7ec7 Merge branch '2022-04-21-assorted-improvements'
- For the environment, add a arch_env_get_location hook and make use of
  it on some NXP platforms (so that boards can override SoCs).
- Remove some unused squashfs code from SPL
- Resync am335x beaglebone related DTS files
- Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
2022-04-21 10:56:58 -04:00
Ye Li
0b0cd1536a imx: Fix build error
Fix wrong environment.h and remove DECLARE_GLOBAL_DATA_PTR

Fixes: 30e39ac7c9 (imx: imx7 Support for Manufacturing Protection)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-04-21 15:18:25 +02:00
Ye Li
92aff90b1e imx: Update FSL_MFGPROT config for iMX8M
Update the Kconfig and Makefile to allow build for iMX8M and
restrict the build only in u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-04-21 15:18:25 +02:00
Gaurav Jain
2c16bf2d14 crypto/fsl: add invalidate_dcache_range for hash output buffer
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.

caam_hash()
 -moved address alignment check in the beginning of function.
 -added invalidate_dcache_range for pout buffer before running descriptor.

Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21 15:18:25 +02:00
Fabio Estevam
96b2c9c9e0 doc: imx8mn_evk: Do not export ATF_LOAD_ADDR
The imx8mn_evk target have been converted to use binman.

With the binman approach the ATF load address is described via
devicetree, so remove the now unneeded instruction of exporting
ATF_LOAD_ADDR.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-21 15:18:25 +02:00
Fabio Estevam
6826c33e42 imx8mn_evk: Enable cache in SPL
There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-21 15:18:25 +02:00
Michael Trimarchi
0016e62813 board: bsh: imx8mn_bsh_smm_s2/s2pro: enable DM_SERIAL
Enable DM_SERIAL for both U_Boot and the SPL. The uart4 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_init() to avoid a board hang
as dm can't be used until after spl_init().

Remove the manual config of the UART pinmux now that it is no longer
needed.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-21 15:18:25 +02:00
Tim Harvey
6a21c69521 arm: dts: imx8mp: add of-list support to common imx8mp-u-boot.dtsi
Add support for OF-LIST to common imx8mp-u-boot.dtsi so that it can
be used with boards that have multiple DTB's.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21 15:18:25 +02:00
Gaurav Jain
cc84edddd1 crypto/fsl: Clear the memory when blob decapsulation fails
issue: blob decapsulation operation store the decrypted data
       in memory even if ICV check failed.

fix: clear the blob data output memory.

Fixes: c5de15cbc8 (crypto/fsl: Add command for encapsulating/decapsulating blobs)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Tested-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21 15:18:25 +02:00
Peng Fan
e3b330e489 imx: imx8mq-evk: enable CONFIG_DM_SERIAL
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
a497740f4e imx: imx8mn_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

move the preloader_console_init() call after spl_init() to
avoid board hang

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
bf6e0b9fd2 imx: imx8mm_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

move the preloader_console_init() call after spl_early_init() to
avoid board hang

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
ae188eb61c imx: imx8mp_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
62b3d75868 scripts: config_whitelist: drop CONFIG_MMCROOT
Drop CONFIG_MMCROOT, no users now.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
adfaa4284c configs: drop CONFIG_MMCROOT
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.

Script as below
"
 for i in `ls include/configs/*.h`
 do
 mmcroot=`sed -n '/define.*MMCROOT/ p' $i  | awk -F\" '{ print $2;}'`

 if [ ! -n "$mmcroot" ]; then
 	continue
 fi

 sed -i '/define.*MMCROOT/ d' $i
 sed -i 's,\" CONFIG_MMCROOT \",'$mmcroot',g' $i

 done
"

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:17 +02:00
Sean Anderson
1dd56db5e0 treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-21 09:08:57 -04:00
Paul Barker
a95cd68d51 board: ti: am335x: Add support for BBE Extended WiFi
The Sancloud BeagleBone Enhanced Extended WiFi (BBE Extended WiFi) has
its own devicetree file and the board can be identified by the 2nd
letter of the config string within the common EEPROM.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-04-21 09:08:57 -04:00
Paul Barker
cde726442b board: ti: am335x: Add BBE Lite support
The Sancloud BeagleBone Enhanced Lite (BBE Lite) has its own devicetree
file and the board can be identified by the 2nd letter of the config
string within the common EEPROM.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-04-21 09:08:57 -04:00
Paul Barker
1d49b8d73b arm: dts: Resync dts for BeagleBone and derivatives
Sync BeagleBone dts files & TPS dtsi files with Linux v5.17 and include
the SanCloud BBE Extended WiFi dts added in v5.18-rc1. Also pull in
changes to am33xx-l4.dtsi needed to support the BeagleBone Blue.

The change to use the cpsw switch driver (commit c477358e66a3 in Linux)
is excluded from the sync as u-boot does not recognise the new
compatible string.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-04-21 09:08:57 -04:00
Pali Rohár
f362deaefb fs: Allow to compile FS_SQUASHFS only for proper U-Boot
CONFIG_SPL_FS_SQUASHFS cannot be disabled when CONFIG_FS_SQUASHFS is
enabled. Fix it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 09:08:57 -04:00
Marek Vasut
e4dc2d0620 ARM: imx: imx8m: env: Switch to arch_env_get_location()
Implement arch_env_get_location() instead of env_get_location(), so that
the env_get_location() can be implemented on board level and override the
arch_env_get_location() architecture defaults.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-21 09:08:41 -04:00
Marek Vasut
dfb6da55e3 armv8: layerscape: env: Switch to arch_env_get_location()
Implement arch_env_get_location() instead of env_get_location(), so that
the env_get_location() can be implemented on board level and override the
arch_env_get_location() architecture defaults.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-21 09:08:41 -04:00
Marek Vasut
de70e8879b env: Implement lower priority arch_env_get_location()
Currently there is only one way to override desired environment location,
by implementing env_get_location(). This is increasingly being conflated
both on board level and architecture level, which leads to a problem on
boards where this function is already implemented on architecture level,
since those boards have no way to override this environment location on
board level anymore.

Implement arch_env_get_location() function which is architecture specific
and should only ever be implemented in architecture code. This function
has lower priority than env_get_location(), which should only ever be
implemented in board code, and which overrides the arch_env_get_location()
architecture environment selection.

This way, architecture can define its default environment chooser, while
board can now override it as needed at all times.

There is no functional change, since env_get_location() simply returns
arch_env_get_location(), and arch_env_get_location() implements the
current env_get_location() default content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-21 09:08:40 -04:00
Peng Fan
c82622acdf configs: phycore_imx8mm/p: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
ec04c5a9d7 configs: imx8mm/n_venice: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
d3af06012a configs: verdin-imx8m: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
ee5e8ee471 configs: imx8qm/qxp_evk: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
0f82da2b90 configs: mx7dsabresd: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
228e947fa4 configs: mx6sxsabresd: drop CONFIG_SYS_FSL_USDHC_NUM
With DM_MMC, CONFIG_SYS_FSL_USDHC_NUM is not needed.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
893152f383 configs: imx8mn_evk: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
42d56cad63 configs: imx8mp_evk: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Peng Fan
ff234d75ff configs: imx8mm_evk: drop unused SDHC macro
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:38:03 +02:00
Marek Vasut
74f88b7221 ARM: imx: imx8m: Fix board_get_usable_ram_top()
The 4 GiB boundary is at 0xffffffff+1 , not at 0x80000000, fix this.

The PHYS_SDRAM of i.MX8M is at 0x40000000 , so to restrict ram_top
below 4 GiB, the ram_top has to be set to 0xffffffff as it is not
an offset from the start of PHYS_SDRAM, but rather a physical address
marking the topmost allowed DRAM address.

Fixes: e27bddff4b ("imx8m: Restrict usable memory to space below 4G boundary")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-04-21 14:38:03 +02:00
Ian Ray
2e26a76eb0 configs: ge_bx50v3: remove CONFIG_PCIE_IMX_POWER_GPIO
This GPIO is actually an input "Q7_3V3_PCIE_WAKE#_IN" not an output, so
remove the misleaading and incorrect definition.

Cc: Tim Harvey <tharvey@gateworks.com> (re: pci: imx: use vpcie-supply if defined by device-tree)
Signed-off-by: Ian Ray <ian.ray@ge.com>
2022-04-21 14:38:03 +02:00
Tim Harvey
e3bdc97148 pci: imx: remove weak overrides no longer used
There are no users of the imx6_pcie_toggle_power and imx6_pcie_toggle_reset
weak overrides and as these functions are able to be handled now via dt
properties lets remove these.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 14:38:03 +02:00
Tim Harvey
6f6e069ca3 pci: imx: use vpcie-supply if defined by device-tree
If vpcie-supply is defined by device-tree use that if
CONFIG_PCIE_IMX_POWER_GPIO is not defined.

Note that after this the following boards which define
CONFIG_PCIE_IMX_POWER_GPIO in their board header file as well as their
device-tree should be able to remove CONFIG_PCIE_IMX_PERST_GPIO without
consequence:
 - mx6sabresd
 - mx6sxsabresd
 - novena

Note that the ge_bx50v3 board uses CONFIG_PCIE_IMX_POWER_GPIO and does
not have vpcie-supply defined in it's pcie node in the dt thus removing
CONFIG_PCIE_IMX_POWER_GPIO globally can't be done until that board adds
vpcie-supply.

Cc: Ian Ray <ian.ray@ge.com> (maintainer:GE BX50V3 BOARD)
Cc: Sebastian Reichel <sebastian.reichel@collabora.com> (maintainer:GE BX50V3 BOARD)
Cc: Fabio Estevam <festevam@gmail.com> (maintainer:MX6SABRESD BOARD)
Cc: Marek Vasut <marex@denx.de> (maintainer:NOVENA BOARD)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 14:38:03 +02:00
Tony Dinh
ac47bd230c arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
The Globalscale Technologies Sheevaplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.

- Remove CONFIG_RESET_PHY_R symbol from all board files
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
comments.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2022-04-21 13:14:52 +02:00
Pali Rohár
376a7d728a arm: mvebu: turris_omnia: Enable CONFIG_CMD_FUSE
This allows to read eFuse on Turris Omnia.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 13:14:52 +02:00
Marcel Ziswiler
fc102c87c1 board: toradex: drop colibri pxa270 support
The Colibri PXA270 has been end-of-life since quite a while and would
require more and more maintenance (e.g. DM conversions).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:48:30 +02:00
Tim Harvey
2395625209 board: gateworks: venice: add imx8mp-venice-gw740x support
The GW74xx is based on the i.MX 8M Plus SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - PCIe Gen 3.0 switch (build option)
 - USB 3.0 HUB
 - USB Type-C front panel connector
 - GPS
 - 3-axis accelerometer
 - CAN bus
 - 6x GbE RJ45 front-panel jacks
  - 1x IMX8M FEC RGMII GbE (with Passive PoE)
  - 5x IMX8M EQOS RGMII 6 port GbE Switch
    (1x with 802.3af class 5 Active PoE)
 - RS232/RS485/RS422 serial transceiver
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - DigI/O header (UART/GPIO/I2C/ADC)
 - 802.11ac WiFi
 - Bluetooth BLE
 - 3x MiniPCIe sockets with PCI/USB
 - 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
 - PMIC
 - Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
 - add dts
 - add DRAM config
 - add PMIC config
 - add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
93de85c9d7 board: gateworks: venice: add additional levels for dtb name match
Gateworks produces many products from a single PCB with subloaded
components. Add an additional two levels of dtb name matching so that
for example a GW7400-A matches the dtb name of gw74xx.dtb

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
61cf225053 board: gateworks: gw_ventana: use comomn GSC driver
Use the common GSC driver.

This allows us to do some additional cleanup:
 - use the GSC driver functions
 - move waiting for the EEPROM to the SPL int (it will always be ready
   after this)
 - move eeprom functions into eeprom file and elimate GSC_I2C_BUS
 - eliminate some redundant EEPROM reads (the EEPROM must be read in
   SPL before relocation, in SPL after relocation, and in U-Boot init.
   All subsequent uses can use the global structure)
 - remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
1cb249b6b6 imx8m{m, n}_venice_defconfig: enable md5sum and crc32 commands
Enable the md5sum and crc32 commands.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
53a2b6bd5d imx8m{m,n}-venice-gw7902: add support for GPY111 phy
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
 - increase post-reset time to 300ms per datasheet
 - add tx-delay/rx-delay config

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
7a2ff55d87 imx8m{m,n}_venice_defconfig: add DT overlay support
enable CONFIG_OF_LIBFDT_OVERLAY to support applying dt overlays in
U-Boot.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00
Tim Harvey
d5cc234154 arm: dts: imx8m*-venice: add gpio hog support
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
  in sync with the kernel. The hogs will not be put in the kernel
  as that makes them un-usable by userspace as well as
  re-initializes them to dt defaults overriding changes which may
  have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 12:44:23 +02:00
Tim Harvey
fb9ec33878 board: gateworks: venice: use common GSC driver
Use the common GSC driver.

This allows us to do some additional cleanup:
 - rename gsc{.c,.h} to eeprom{.c.h} for clarity
 - collapse eeprom_get_dev
 - remove unnecessary header files and alphabatize includes

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:23 +02:00
Tim Harvey
82b16555cf board: gateworks: venice: enable DM_SERIAL
Enable DM_SERIAL.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:23 +02:00
Tim Harvey
c574736915 configs: imx8m{m,n}_venice_defconfig: add usb support
Enable USB support for host controller and various USB ethernet
devices.

Example usage of USB Mass Storage (UMS) support:
 u-boot=> mmc list
 FSL_SDHC: 0
 FSL_SDHC: 1
 FSL_SDHC: 2 (eMMC)
 u-boot=> ums 0 mmc 2
 UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe30000

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:23 +02:00
Tim Harvey
fd5c7173ad imx8m{m,n}_venice: update env memory layout
Update distro config env memory layout:
 - loadaddr=0x48200000 allows for 130MB area for uncompressing (ie FIT
   images, kernel_comp_addr_r)
 - fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
 - scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
 - ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21 12:44:23 +02:00
Marcel Ziswiler
3f7d518acc configs: tdx: apalis/colibri_imx6: use preboot as well
Use PREBOOT as well. This allows a customer to just set fdt_board as
on any other module to customize the device tree for his carrier
board.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Marcel Ziswiler
405c97fd1d configs: tdx: apalis_imx6: drop hw v1.0 support
Drop optional support for the ancient Apalis iMX6 V1.0 hardware which
had the UART wired as DCE rather than DTE.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Marcel Ziswiler
4625ff6521 board: colibri_imx7: fix usb start on solo
This fixes the following crash when run on a Colibri iMX7S aka solo:

Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000:

The i.MX 7Solo has only one single USB OTG1 but no USB host port. Trying
to initialize the nonexisting port just crashes.

While at it also drop board_usb_phy_mode() which is also no longer used
in the driver model age.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Philippe Schenker
dbc5633963 configs: tdx: Do not overwrite fdtfile if it got set manually
In case a customer wants to set fdtfile currently preboot overrides it
always with preboot just before the bootdelay. Use test -n to check
if fdtfile is already set and only set it if nothing got touched manually

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Oleksandr Suvorov
dfaa71bc4b configs: colibri-imx7/-emmc: enable booting from usb sdp
For recovery purpose allow booting via SDP over USB as well.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Oleksandr Suvorov
877347b558 configs: toradex: enable missing fit options
Add missing support of FIT-images and enable a verbosity for
this feature.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Igor Opaniuk
1410cba567 toradex: drop legacy nfsboot script
Drop legacy nfsboot script in favor of distroboot DHCP boot.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Igor Opaniuk
1377a776c3 toradex: set default dhcp distroboot scriptname
Use the same name of DHCP Distroboot script as in regular eMMC case.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Igor Opaniuk
2575d70baa toradex: globally disable video support
As video support is very specific depending on the exact display
customisation we decided to disable video support for all out modules
by default.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Denys Drozdov
47bcc0d056 toradex: apalis-imx8x: drop support for apalis imx8x
Drop Apalis iMX8X platform as it never left sample state and is no
longer supported.

Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:44:23 +02:00
Marek Vasut
9fe5a129f3 arm: dts: imx8mp: Import GPCv2 subset, HSIOMIX and USB PD
Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
HSIOMIX PD controller and missing USB PD properties. This is required
to bring up the DWC3 USB controller up.

This is based on linux next and patches which are still pending
review, but which are likely going to be part of Linux 5.19:
b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1")
290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes")
https://www.spinics.net/lists/arm-kernel/msg958501.html

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
d0f7a0559a usb: dwc3: Implement .glue_configure for i.MX8MP
The i.MX8MP glue needs to be configured based on a couple of DT
properties, implement .glue_configure callback to parse those DT
properties and configure the glue accordingly.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
f1ef95591c usb: dwc3: Rename .select_dr_mode to .glue_configure
Rename the select_dr_mode callback to glue_configure, the callback is
used for more than enforcing controller mode even on the TI chips, so
change the name to a more generic one. No functional change.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
898e7610c6 imx: power-domain: Add i.MX8MP HSIOMIX driver
Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible
for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe
in the correct order. Currently supported is the USB 3.0 part which
can be tested, PCIe support should be easy to add.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
2e760f180d imx: power-domain: Add i.MX8MP support
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
63c390a1ea power_domain: Add power_domain_get_by_name()
Implement power_domain_get_by_name() convenience function which parses
DT property 'power-domain-names' and looks up power domain by matching
name.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
2022-04-21 12:44:23 +02:00
Marek Vasut
4eb82c2e56 imx: power-domain: Get rid of SMCCC dependency
This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework
the driver based on Linux GPCv2 driver to directly control the GPCv2
block instead of using SMCCC calls. This way, U-Boot can operate the
i.MX8M power domains without depending on anything else.

This is losely based on Linux GPCv2 driver. The GPU, VPU, MIPI power
domains are not supported to save space, since they are not useful in
the bootloader. The only domains kept are ones for HSIO, PCIe, USB.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
19842b6a20 imx: power-domain: Inline arch-imx8m/power-domain.h
The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
anywhere except in drivers/power/domain/imx8m-power-domain.c, just
inline the content and drop the header. No functional change.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
8741d92756 imx: power-domain: Descend into pgc subnode if present
In case the power domain node structure is gpc@303a0000/pgc/power-domain@N,
do not bind power domain driver to the 'pgc' node, but rather descend into
it and only bind power domain drivers to power-domain@N subnodes. This way
we do not waste one useless driver instance associated with 'pgc' node.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Marek Vasut
20874a6072 power-domain: Return 0 if ops unimplemented and remove empty functions
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each power domain driver. Drop all those empty functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
2022-04-21 12:44:23 +02:00
Loic Poulain
85d0580e68 imx8ulp: clock: Fix lcd clock algo
The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.

Fixes: 829e06bf41 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 12:44:23 +02:00
Pali Rohár
08b99b6775 board: turris: Rename atsha204a@64 DT node to crypto@64
DT node name should be generic, therefore rename atsha204a@64 to crypto@64.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
98bbb6e7ab board: turris: Allow to specify first eth idx of first MAC address
Turris Omnia uses first MAC address from OTP for second ethernet interface.
Second MAC address for third interface and third MAC address for first
interface.

Other Turris routers do not have this rotate by one mapping. So add
function parameter for specifying id of the first ethernet interface.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
ada791db3e board: turris: Do not cache Atsha device in BSS
Atsha device is used prior relocation and at this early stage BSS does not
have to be ready yet. So do not cache Atsha device in BSS.

Fixes support for other Turris routers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
6ac08dc1a8 board: turris: Move Turris Atsha OTP code to separate file
OTP code is not Atsha generic but also it is not Omnia specific. It is
common for all Turris routers which use Atsha cryptochip for storing OTP.
So move this common Turris specific Atsha OTP code from Turris Omnia into
separate file. It will be used also by other Turris routers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
1d71bbca45 arm: mvebu: a37xx: Add support for writing Security OTP values
Implement write support for Security OTP values via mailbox API commands
MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE.

Write support for North and South Bridge OTPs are not implemented as these
OTPs are already burned in factory with some data.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
2975bba6df arm: mvebu: Enable CONFIG_SPL_SYS_NO_VECTOR_TABLE for 32-bit mvebu
U-Boot SPL is on 32-bit mvebu executed by the BootROM. And BootROM expects
that U-Boot SPL returns execution back to the BootROM. Vectors during
execution of U-Boot SPL should not be changed as BootROM does not expect it
and uses its own vectors. So do not overwrite vectors in SPL build.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Pali Rohár
5165d2a04a arm: Do not compile vector table when SYS_NO_VECTOR_TABLE is enabled
Vector table is not used when SYS_NO_VECTOR_TABLE is enabled.
So do not compile it and reduce image size.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Pali Rohár
372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
Move OMAP4 specific option for disabling overwriting vector table into
config option CONFIG_SPL_SYS_NO_VECTOR_TABLE.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Pali Rohár
a339d6c464 tools: kwboot: Replace fstat()+st_size by lseek()+SEEK_END
fstat()'s st_size works only for regular files. lseek() with SEEK_END works
also for block or MTD devices. This replacement allows kwboot to load
kwbimage from /dev/mtd0 for booting another device over /dev/ttyS0.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Pali Rohár
8b3d7ecdfe arm: mvebu: Add support for reading LD0 and LD1 eFuse
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
is used for secure boot and each line is 64 bits long + 1 lock bit. LD
eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for
Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot
already contains HD eFuse reading and programming support.

This patch implements LD eFuse reading support. LD 0 line is mapped to
U-Boot fuse bank 64 and LD 1 line to fuse bank 65.

LD 0 Marvell Internal Use line seems that was burned in factory with some
data and can be read by U-Boot fuse command:

  => fuse read 64 0 9

LD 1 General Purpose Data line is by default empty and can be read by
U-Boot fuse command:

  => fuse read 65 0 9

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
Robert Marko
7001ea3ec4 mvebu: uDPU: update defconfig
Update the current uDPU defconfig with following changes:
* Disable CONFIG_SPI_BOOT, its not needed for booting and the device boots
from eMMC anyway.
* Disable CONFIG_SYS_CONSOLE_INFO_QUIET, there is no need to diverge from
other boards by not priting the console device
* Enable CONFIG_CMD_MTD in order to allow use of the MTD tool
* Disable CONFIG_CMD_MTDPARTS, with MTD now being able to parse partitions
from DTS there is no need for it, the default MTDPARTS were incorrect
anyway
* Enable CONFIG_MMC_HS200_SUPPORT, the eMMC used support both HS200 and
HS400 modes, so enable at least HS200 because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Robert Marko
9e778c7ffc arm: mvebu: dts: uDPU: fix non-working networking
uDPU is a bit of a specific device in that it does not have any copper
ports nor any ethernet PHY-s but 2 SFP ports.

This is an issue since MVNETA requires a PHY phandle or a fixed-link to
be defined under its node.
Since U-boot has no SFP support this is reasonable in order to know how
to configure the MAC.

However this also means that networking does not work on uDPU at all
currently, and fails with:

uDPU>> dhcp
Could not get PHY for neta@30000: addr 0
phy_connect failed
Could not get PHY for neta@40000: addr 1
phy_connect failed

So, to provide working networking using only SFP-s let add the fixed-link
at 1G which is much more common than 2.5G SFP-s as well as disable the
TX_DISABLE pins like done on Armada 7040 and 8040 platforms.

Since uDPU is not using any of the GPIO-s on the SB controller for any
purpose other than GPIO, a call to the pinctrl must be made in order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Robert Marko
2b7beb9c09 net: mvneta: add SFP TX disable handling
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.

This allows using ethernet on SFP only boards.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Robert Marko
9b02de8525 arm: mvebu: dts: uDPU: update DTS
Update the uDPU DTS to the version that is pending upstream [1][2].

[1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220322105857.1107016-1-robert.marko@sartura.hr/
[2] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220322105857.1107016-2-robert.marko@sartura.hr/

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Pali Rohár
c8b00da695 arm: mvebu: a37xx: Add support for reading Security OTP values
It is not possible for the A53 core (on which U-Boot is running) to read it
directly. For this purpose Marvell defined mbox API for sending OTP
commands between CM3 and A53 cores.

Implement these Marvell fuse reading mbox commands via U-Boot fuse API.

Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44
banks and words 0-2).

Note that of the 67 bits, the 3 upper bits are: 1 lock bit and 2
auxiliary bits (meant for testing during the manufacture of the SOC, as
I understand it).

Also note that the lock bit and the auxiliary bits are not readable
via Marvell commands.

With CZ.NIC's commands the lock bit is readable.

Write support is not implemented yet.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Pali Rohár
85df8f9a21 arm: mvebu: a37xx: Extend mbox_do_cmd() code
Allow to specify input parameters, define all available mbox commands
supported by CZ.NIC's secure firmware and also Marvell's fuse.bin firmware
and fix parsing response from Marvell OTP commands.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Pali Rohár
46ce9c78a9 arm: mvebu: a37xx: Move generic mbox code to arch/arm/mach-mvebu
Generic A3720 mbox code is currently in Turris Mox specific board file
board/CZ.NIC/turris_mox/mox_sp.c. Move it to board independent arch file
arch/arm/mach-mvebu/armada3700/mbox.c.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Pali Rohár
122dae9084 arm: mvebu: a37xx: Enable fuse command on all Armada 3720 boards
Allow to read OTP bits via U-Boot fuse command on all Armada 3720 boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Pali Rohár
10154b81de arm: mvebu: a37xx: Add support for reading NB and SB fuse OTP value
Implement reading NB and SB fuses of Armada 37xx SOC via U-Boot fuse API.

Banks 0-43 are reserved for accessing Security OTP (not implemented yet).
Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2).
Bank 45 is used for accessing South Bridge OTP (97 bits via words 0-3).

Write support is not implemented yet because it looks like that both North
and South Bridge OTPs are already burned in factory with some data. The
meaning of some bits of North Bridge is documented in WTMI source code.
The meaning of bits in South Bridge is unknown.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 12:31:36 +02:00
Rogier Stam
a37b68820c arm: mvebu: Fix Espressobin build for configs where ENV is not in SPI
When storing the UBoot Environment in for example EXT4,
the U-Boot build is broken for several reasons:
1. armada-385-turris-omnia-u-boot.dtsi will not allow
   CONFIG_ENV_OFFSET and CONFIG_ENV_SIZE to be undefined
2. armada-37xx/board.c ft_board_setup function does not
   exist if CONFIG_ENV_IS_IN_SPI_FLASH is not defined

This commit changes these files so that selecting a
different location for the environment is possible.

Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:26 +02:00
Pali Rohár
83a8e27062 tools/mrvl_uart.sh: Remove script
There are two tools for sending images over UART to Marvell SoCs: kwboot
and mrvl_uart.sh. kwboot received lot of new features and improvements in
last few months. There is no need to maintain two tools in U-Boot, so
remove old mrvl_uart.sh tool.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
2022-04-21 10:22:36 +02:00
Tom Rini
22bfaa1f67 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-20 14:48:59 -04:00
Tom Rini
e2743c2aa0 Merge branch '2022-04-20-assorted-improvements'
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
  move TI am33xx to use that as well, fix DT relocation with multiple
  DRAM banks, and add a gpio read sub-command.
2022-04-20 14:33:53 -04:00
Diego Rondini
dd2b8c1155 cmd: gpio: Add gpio read subcommand
As explained in commit 4af2a33ee5 ("cmd: gpio: Make `gpio input`
return pin value again") the `gpio input` is used in scripts to obtain
the value of a pin, despite the fact that CMD_RET_FAILURE is
indistinguishable from a valid pin value.
To be able to detect failures and properly use the value of a GPIO in
scripts we introduce the `gpio read` command that sets the variable
`name` to the value of the pin. Return code of the `gpio read` command
can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE.
CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
2022-04-20 11:14:39 -04:00
Dave Gerlach
270f7fd25b ram: k3-ddrss: Allow use of dt provided initial frequency
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR
frequency that is set for lpddr4 before initialization of the
controller. Make this optional and continue to use PLL bypass frequency
as is done currently if ti,ddr-freq0 is not provided.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-20 11:14:39 -04:00
Marek Vasut
a96d565725 image: fdt: Fix DT relocation handling with multiple DRAM banks with gap
The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
  env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.

Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so
for them the calculated highest DRAM address is 0xafffffff, which is
exactly in the gap and thus not usable.

Fix this by iterating over all DRAM banks and tracking the remaining
amount of the total mapping size obtained from env_get_bootm_mapsize().
Limit the maximum LMB area size to each bank, to avoid using nonexistent
DRAM.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2022-04-20 11:14:39 -04:00
Tom Rini
4448d0c702 am33xx: Update SYS_MALLOC_F_LEN to use 0x2000 as the default
A number of platforms here had already been increasing the size a bit,
so lets moving all of them up.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-20 11:14:39 -04:00
Tom Rini
e056892422 Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000
The most commonly used value today is 0x2000 and not 0x400.  Rework the
Kconfig logic to use this more frequently used value as the default.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Cc: Andes <uboot@andestech.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Bharat Gooty <bharat.gooty@broadcom.com>
Cc: David Lechner <david@lechnology.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Gerald Kerma <dreagle@doukki.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Kristian Amlie <kristian.amlie@northern.tech>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Bosch <stefan_b@posteo.net>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tony Dinh <mibodhi@gmail.com>
Cc: Trevor Woerner <twoerner@gmail.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: liuhao <liuhao@phytium.com.cn>
Cc: lixinde <lixinde@phytium.com.cn>
Cc: shuyiqi <shuyiqi@phytium.com.cn>
Cc: weichangzheng <weichangzheng@phytium.com.cn>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2022-04-20 11:14:39 -04:00
Dominic Rath
b4c80f245b ram: k3-ddrss: Fix register name and explain its usage
The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).

The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
2022-04-20 11:14:39 -04:00
Tom Rini
246e03476b Merge branch '2022-04-19-assorted-updates'
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
  https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
  change
2022-04-19 17:06:01 -04:00
Pali Rohár
b8a7916467 fs: Allow to compile FS_BTRFS when SPL is enabled
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.

Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-19 14:54:15 -04:00
Pali Rohár
c4bbbed371 btrfs: Fix compilation on big endian systems
Fix following two compile errors on big endian systems:

  CC      fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
                 from ./arch/powerpc/include/asm/byteorder.h:82,
                 from ./arch/powerpc/include/asm/bitops.h:8,
                 from include/linux/bitops.h:152,
                 from include/uuid.h:9,
                 from fs/btrfs/btrfs.c:10:
fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’:
include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’?
 #define cpu_to_le16 __cpu_to_le16
                     ^~~~~~~~~~~~~
fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’
   __u16: cpu_to_le16,     \
          ^~~~~~~~~~~

  CC      fs/btrfs/compression.o
In file included from ./arch/powerpc/include/asm/unaligned.h:9,
                 from fs/btrfs/compression.c:16:
include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~
In file included from fs/btrfs/ctree.h:16,
                 from fs/btrfs/btrfs.h:12,
                 from fs/btrfs/compression.c:8:
include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~

Include file asm/unaligned.h contains arch specific macros and functions
for unaligned access as opposite to linux/unaligned le_byteshift.h which
contains macros and functions specific to little endian systems only.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2022-04-19 14:52:34 -04:00
Sean Anderson
9dc775aabb IOMUX: Fix access past end of console_devices
We should only access console_devices[file][i] once we have checked that i
< cd_count[file]. Otherwise, we will access uninitialized memory at the end
of the loop. console_devices[file][i] should not be NULL, but putting the
assignment in the loop condition allows us to ensure that i is checked
beforehand. This isn't a bug, but it does make valgrind stop complaining.

Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Andrew Scull <ascull@google.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-19 14:52:34 -04:00
Tom Rini
24c904f309 Convert CONFIG_SYS_MEM_TOP_HIDE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MEM_TOP_HIDE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-19 14:52:34 -04:00
Du Huanpeng
bdf9831226 tools: add boot/ to .gitignore
/tools/boot/ is a build product. Add it to .gitignore

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2022-04-19 14:51:11 -04:00
Heinrich Schuchardt
9bd89bbd71 fs/squashfs: simplify sqfs_read()
* Don't check argument of free(). Free does this itself.
* Reduce scope of data_buffer. Remove duplicate free().
* Avoid superfluous NULL assignment.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-04-19 14:51:11 -04:00
Heinrich Schuchardt
7ffc66e7db image-fit: don't check free() argument
* free() checks if its argument is NULL. Remove duplicate checks.
* Remove duplicate free(ovcopy).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-19 14:51:11 -04:00
Billy Tsai
fe2f284270 gpio: aspeed: Fix incorrect offset of read back register.
The offset of the current read back register is the value of the gpio pin,
not the value written for the gpio output.
This patch fix it to avoid the other gpio output value controlled by the
same register being set incorrectly.

Fixes: 7ad889b0f3 ("gpio: Add Aspeed GPIO driver")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2022-04-19 14:51:11 -04:00
Ilias Apalodimas
0b93b7fed6 configs: Enable EXT4 and ISO partitions for the DeveloperBox
Since this box is SystemReady compliant enable ISO_PARTITION which is
needed to start some installers (e.g Fedora).  While at it enable EXT4
as well which is a common filesystem for targets

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-19 14:51:11 -04:00
Michal Simek
fcbdd7a070 .mailmap: Start to use new amd.com email address
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb994 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-04-19 14:51:11 -04:00
Daniel Golle
5f2d5915f8 image-fdt: save name of FIT configuration in '/chosen' node
It can be useful for the OS (Linux) to know which configuration has
been chosen by U-Boot when launching a FIT image.
Store the name of the FIT configuration node used in a new string
property called 'u-boot,bootconf' in the '/chosen' node in device tree.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-04-19 14:51:11 -04:00
Tom Rini
9acf3726b6 Merge tag 'u-boot-rockchip-20220418' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add rk3066 SoC support;
- Add rk3066 MK808 board support;
- dts sync from kernel for rk322x, rk3288;
- some other board level config update;
2022-04-19 08:50:40 -04:00
Tom Rini
aec75a3d1d Merge branch '2022-04-18-dm-reducing-spl-memory-usage'
- Assorted DM cleanups from Simon.  This results in some noticeable
  binary size savings in SPL.
2022-04-19 08:14:15 -04:00
Simon Glass
cdd73e7215 dm: core: Deal with a wrinkle with linker lists
When every member of a linker list is aligned by the compiler, we can no
longer rely on the sizeof of the struct to determine the number of
entries.

For example, if the struct size is 0x90 but every entry is aligned to 0xa0
by the compiler, the linker list entries takes more space in memory and
the calculation of the number of entries is incorrect. For example, we may
see 0x12 entries when there are only 0x11.

This is a real problem. There may be a general solution, although I cannot
currently think of one. So far it only bites with OF_PLATDATA_RT which
creates a pointer to each entry of the 'struct udevice' linker_list. This
does not happen without that option, so it only affects SPL.

Work around it by manually calculating the aligned size of struct udevice,
then using that for the n_ent calculation.

Note: the alignment fix to linker list was here:

   0b2fa98aa5 linker_lists: Fix alignment issue

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
092d5c2a83 dm: core: Allow devres to be disabled in SPL
At present if devres is enabled in U-Boot proper it is enabled in SPL.
We don't normally want it there, so disable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Angus Ainslie <angus@akkea.ca>
2022-04-18 17:53:56 -04:00
Simon Glass
0c6be933ff sandbox: Align linker lists to a 32-byte boundary
Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
1b34719b61 sandbox: Allow link flags to be given
At present the link flags are not used for sandbox. Update the command
line to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
1ddda37bbe Makefile: Avoid resetting link flags in config.mk
This makes it impossible to change them elsewhere. The default value is
'empty' anyway, so just drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
55cbf5ad50 Makefile: Drop a stale comment about linking
The bug mentioned here is fixed, so drop the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
830d73b4de sandbox: Correct loss of early output in SPL
At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.

This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Johan Jonker
dcaaefdc0a rockchip: video: mipi: add more compatible strings for rk3288/rk3399
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0944e77fde rockchip: video: rk_edp: add more rk3288 edp node options
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
8f47414466 board: rk3288: add more DT files to MAINTAINERS
A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
8042717afa board: google: veyron: add more DT files to MAINTAINERS
The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
5859bb2863 rockchip: fix boot_devices constants
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
52a0c68994 arm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
334d519a13 rockchip: rk3288-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
444311196e rockchip: rk3288-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
d3cb7565de arm: dts: rockchip: sync rk3229-evb.dts from Linux
Sync rk3229-evb.dts from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6980e83c41 arm: dts: rockchip: sync rk322x.dtsi from Linux
Sync rk322x.dtsi from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
d886532a7c arm: dts: rockchip: move all rk322x u-boot specific properties in separate dtsi files
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6914ef8e67 rockchip: rk3228-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
3c48a62460 rockchip: rk3228-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
c57677b06f doc: rockchip: add rk3066 Rikomagic MK808
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0c99c6e63e doc: rockchip: add px30/rk3326 boards and examples
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
ed33f8c4e3 doc: rockchip: restyle rockchip.rst
With more text coming to the rockchip.rst document,
give it a restyle first.

Changed:
  sort build examples alphabetically
  add git clone example
  fix bash examples
  fix phrases (grammer)
  fix typos

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
ccd8ab374e rockchip: rk3066: add mk808_defconfig
This commit adds the default configuration file and
relevant description for a MK808 board.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
62fcd72ef2 rockchip: rk3066: add Rikomagic MK808 board
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
33f4750783 rockchip: rk3066: add core support
Add the core architecture code for the rk3066.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0034f1da5a rockchip: tools: add rk3066 support to rkcommon.c
Add rk3066 support to rkcommon.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
41ed3912c0 arm: dts: rockchip: add rk3066a-mk808.dts
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
b08f32c159 arm: dts: rockchip: add rk3066a.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
65a28bc4db arm: dts: rockchip: fix include rk3xxx-u-boot.dtsi
Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
c9b0051d67 arm: dts: rockchip: fix rk3xxx-u-boot.dtsi
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Paweł Jarosz
4b957e7ff5 rockchip: rk3066: add sdram driver
Add rockchip rk3066 sdram driver

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Paweł Jarosz
086863c982 rockchip: rk3066: add rk3066 pinctrl driver
Add driver supporting pin multiplexing on rk3066 platform.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Paweł Jarosz
730a402450 rockchip: rk3066: add clock driver for rk3066 soc
Add the clock driver for the rk3066 platform.

Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
  SDRAM clock configuration.
  The boot devices NAND, EMMC, SDMMC, SPI.
  A UART for the debug messages (fixed) at 115200n8.
  A SARADC for the recovery button.
  A TIMER for the delays (fixed).

There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.

After the clock tree is set during the TPL probe
there's no parent update support.

In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.

The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Paweł Jarosz
e6b0ed0e74 rockchip: rk3066: add grf header file
grf is needed by various drivers for rk3066 soc.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
5e6ee6bde5 rockchip: rk3066-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
9ee6c0766d rockchip: serial: Kconfig: allow ROCKCHIP_SERIAL enabled in TPL
The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6dcaf2d22b rockchip: serial: Kconfig: add select SYS_NS16550 to config ROCKCHIP_SERIAL
The Rockchip serial driver depends on an enabled NS16550 driver,
so add select SYS_NS16550 to config ROCKCHIP_SERIAL.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6e2ee2ebb8 rockchip: serial: rename U_BOOT_DRIVER name to rockchip_uart
When a defconfig for rk3288 is compiled it gives the warning:

rockchip_rk3288_uart: Missing .compatible in
                      ./drivers/serial/serial_rockchip.c
                    : WARNING: the driver rockchip_rk3288_uart
                      was not found in the driver list

Fix by renaming U_BOOT_DRIVER name of serial_rockchip.c
to rockchip_uart. Add rk3288 serial support with
a DM_DRIVER_ALIAS define.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
04ee76c988 rockchip: serial: move driver alias to serial_rockchip.c
The Rockchip uart DT nodes have "snps,dw-apb-uart" as
fall back string. The driver ns16550.c has CONFIG_IS_ENABLED(OF_REAL)
as condition to of_match and does not copy dtplat data.
For TPL/SPL the driver serial_rockchip.c
is used. Move driver alias to correct driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
728489753c rockchip: serial: restyle the serial_rockchip.c driver
The ns16550.c driver has the following conditions for .of_match:

CONFIG_IS_ENABLED(OF_REAL)

For Rockchip SoCs with TPL/SPL and platform data that need serial
support the serial_rockchip.c driver was made. It copies this data
and then calls ns16550_serial_probe(). With the addition of yet an other
SoC type this driver is in need for a little restyle.
Simplify struct rockchip_uart_plat and add extra SoCs with
DM_DRIVER_ALIAS(). Return -ENODEV when the ns16550.c driver
probe function is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
2d3bb400f3 rockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 support
The Rockchip SoCs rk3066/rk3188 have MMC DT nodes
with as compatible string "rockchip,rk2928-dw-mshc".
Add OF_PLATDATA support to the existing driver with
help of a DM_DRIVER_ALIAS.

This type needs a permanent enabled fifo.
The other Rockchip SoCs always have the property
"u-boot,spl-fifo-mode" in the MMC DT nodes,
because MMC to SRAM can't do DMA.
Make this property a requirement for MMC OF_PLATDATA
structures. The property "fifo-mode" must be added
for all other compile modes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
9d75dafb1b rockchip: mmc: rockchip_dw_mmc: fix ciu clock index
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
In the rockchip_dw_mmc driver the clock name in use was "fixed"
to "ciu" with index 1, but later reverted back to index 0.
The clock drivers can handle both, but the calling driver
should submit correct data as a standard practice.
Fix the "ciu" clock index by setting it back to 1.

  clock-names:
    minItems: 2
    items:
      - const: biu
      - const: ciu
      - const: ciu-drive
      - const: ciu-sample

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
3930209526 rockchip: timer: dw-apb-timer: fix whitespace in U_BOOT_DRIVER structure
The line with .of_to_plat in the U_BOOT_DRIVER structure
of dw-apb-timer.c is not aligned with the rest.
Add an extra TAB to fix the whitespace.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
516e216a78 rockchip: timer: add OF_PLATDATA support for dw-apb-timer
The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
30a7b824aa rockchip: tpl: use IS_ENABLED for timer_init() call condition
Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
d23f55d217 rockchip: tpl: change call condition rockchip_stimer_init()
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
12a716422f rockchip: spl: change call condition rockchip_stimer_init()
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Johan Jonker
54562045e5 rockchip: move ROCKCHIP_STIMER_BASE to Kconfig
Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Vagrant Cascadian
60be6e0860 rockchip: Enable AHCI/SCSI/SATA on rockpro64-rk3399.
Add options to enable AHCI, SCSI and SATA.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Vagrant Cascadian
48cd7a1f6c rockchip: Enable SCSI in distro bootcmd for rk3399.
Include SCSI in the list of boot targets if CONFIG_CMD_SCSI is
enabled.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Chris Morgan
0abb5b0426 rockchip: clk: add clocks to px30_clk_enable
Add the HCLK_OTG, HCLK_SFC, and SCLK_SFC clocks to px30_clk_enable.
Without this change U-Boot reports an error of "Enable
clock-controller@ff2b0000 failed" on boot when using the SFC or USB in
U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Chris Morgan
f0d49d4f0d spi: rockchip_sfc: Add missing include for dm/device_compat.h
Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Peter Cai
e963228af5 adc: rockchip-saradc: add support for getting reference voltage value
Mirroring commit 97ab802aa3 ("adc: meson-saradc: add support for
getting reference voltage value") for meson-saradc, this adds support
for getting the "vref-supply" regulator and register it as the ADC's
reference voltage regulator, so clients can translate sampled ADC values
to voltage.

Signed-off-by: Peter Cai <peter@typeblog.net>
Reviewed-by: John Keeping <john@metanate.com>
Tested-by: John Keeping <john@metanate.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:12 +08:00
Haolin Li
fdda7901cc mmc: rockchip_sdhci: Correct error checking
A pointer can not be negative. Use macro IS_ERR_OR_NULL() for checking.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-18 11:25:12 +08:00
Tom Rini
9859465bfe Merge tag 'efi-2022-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc1-2

Documentation:

* Describe env command

UEFI

* simplify Unicode string functions
* clean up the usage of GUIDs for capsule updates
2022-04-15 14:29:52 -04:00
Tom Rini
7f418ea598 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.

[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
2022-04-15 08:10:32 -04:00
Tom Rini
239fe55a6c CI: Print out unmigrated symbols when failing
To make addressing the problem of migrated symbols being present in
board config header files, update the CI test to them print what symbols
are causing it to fail.  Also report all failures in the tree, rather
than stopping at the first failing file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-15 08:09:16 -04:00
Tom Rini
74ae732d80 Merge branch '2022-04-14-assorted-updates'
- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
  support, LED cleanups and support for default-state, increase malloc
  pool on sandbox, ubifs bugfix, further serial cleanup / semihost
  support, fix a few cases around enabling/disabling FS support in SPL,
  clean up duplication of table_compute_checksum()
2022-04-15 08:04:16 -04:00
Heinrich Schuchardt
8bf5f9af3b efi_loader: simplify efi_serialize_load_option()
Use u16_strsize().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-15 11:26:21 +02:00
Heinrich Schuchardt
b27d8e4037 efi_loader: EFI_HII_STRING_PROTOCOL.GetString()
Use u16_strsize().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-15 11:26:21 +02:00
Heinrich Schuchardt
967407defe lib: simplify u16_strdup()
Use u16_strsize() instead of duplicating it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-15 11:26:20 +02:00
Heinrich Schuchardt
0121282d1a lib: convert u16_strlen() into a macro
The function u16_strlen() can be implemented as call to u16_strnlen().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-15 11:26:20 +02:00
Patrick Delaunay
fe869e11c7 doc: man-page for the env command
Describe the env command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-04-15 11:23:02 +02:00
Sughosh Ganu
2cc2fa4458 doc: uefi: Update the capsule update related documentation
Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
2eda55e4c9 mkeficapsule: Remove raw and FIT GUID types
While building a capsule, the GUID value of that specific image is to
be passed through the --guid command option to the mkeficapsule
tool instead of using one of --raw or --fit options, where the GUID
value passed through the command line option is the image GUID.

This renders the EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID and
EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID values superfluous. Remove the
--raw and --fit command line options as well. Also modify the
mkeficapsule man page to reflect this change.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
9736287173 FMP: Remove GUIDs for FIT and raw images
The capsule update code has been modified for getting the image GUID
values from the platform code. With this, each image now has a unique
GUID value. With this change, there is no longer a need for defining
GUIDs for FIT and raw images. Remove these GUID values.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
2e9c3c6965 test: capsule: Modify the capsule tests to use GUID values for sandbox
The current UEFI capsule updation code uses two GUID values, one for
FIT images, and one for raw images across platforms. This logic is
being changed to have GUID values per image, per platform. Change the
tests for the capsule update code to reflect this change. The GUID
values now used are the ones specific to the sandbox platform -- one
for the u-boot image, and another for the u-boot environment image.

Install the FMP instance for raw images on the sandbox variant for
testing the capsule update code. Install the FMP instance for the FIT
images on the sandbox64 and sandbox_flattree variant for testing
capsule update for FIT images. This is being done by splitting the
capsule update script for FIT and raw images.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
a9e6f01a94 efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled
Currently, there are a bunch of boards which enable the UEFI capsule
update feature. The actual update of the firmware images is done
through the dfu framework which uses the dfu_alt_info environment
variable for getting information on the update, like device, partition
number/address etc. The dfu framework allows the variable to be set
through the set_dfu_alt_info function defined by the platform, or if
the function is not defined, it gets the variable from the
environment. Using the value set in the environment is not very
robust, since the variable can be modified from the u-boot command
line and this can cause an incorrect update.

To prevent this from happening, define the set_dfu_alt_info function
when the capsule update feature is enabled. A weak function is defined
which sets the dfu_alt_info environment variable by getting the string
for the variable from the platform.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
7cf06f09cc capsule: Put a check for image index before the update
The current capsule update code compares the image GUID value in the
capsule header with the image GUID value obtained from the
GetImageInfo function of the Firmware Management Protocol(FMP). This
comparison is done to ascertain if the FMP's SetImage function can be
called for the update. Make this checking more robust by comparing the
image_index value passed through the capsule with that returned by the
FMP's GetImageInfo function. This protects against the scenario of the
firmware being updated in a wrong partition/location on the storage
device if an incorrect value has been passed through the capsule,
since the image_index is used to determine the location of the update
on the storage device.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
1ea06bc929 capsule: FMP: Populate the image descriptor array from platform data
Currently, the image descriptor array that has been passed to the
GetImageInfo function of the Firmware Management Protocol(FMP) gets
populated through the data stored with the dfu framework. The
dfu data is not restricted to contain information only of the images
updatable through the capsule update mechanism, but it also contains
information on other images. The image descriptor array is also parsed
by the ESRT generation code, and thus the ESRT table contains entries
for other images that are not being handled by the FMP for the capsule
updates. Fix this by populating the image descriptor array from the
structure initialised in the board file.

The other issue fixed is assignment of a separate GUID for all images
in the image descriptor array. The UEFI specification mandates that
all entries in the ESRT table should have a unique GUID value as part
of the FwClass member of the EFI_SYSTEM_RESOURCE_ENTRY. Currently, all
images are assigned a single GUID value, either an FIT GUID or a raw
image GUID. This is fixed by obtaining the GUID values from the
efi_fw_images array defined per platform.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-15 10:43:18 +02:00
Sughosh Ganu
741ef86728 capsule: board: Add information needed for capsule updates
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 10:43:18 +02:00
Pali Rohár
b8617df6d5 fs: Allow to compile CMD_UBIFS when SPL is enabled
Currently there is no UBIFS support in SPL. But macro CONFIG_CMD_UBIFS is
defined also when building SPL. when both CMD_UBIFS and SPL are enabled
then build process throw compile error.

Fix check for ubifs code in fstypes[] to allow compiling CMD_UBIFS only in
proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-14 15:39:15 -04:00
Pali Rohár
5bbaba6e29 fs: Allow to compile FS_FAT only for proper U-Boot
CONFIG_SPL_FS_FAT cannot be disabled when CONFIG_FS_FAT is enabled. Fix it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-14 15:39:15 -04:00
Tom Rini
2df59b2bd4 Remove duplication of table_compute_checksum function
It seems like there was some merge error when first cleaning up and
sharing this function.  We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).

Fixes: 1befb38b86 ("x86: Move table csum into separate file")
Fixes: 2b445e4d31 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:15 -04:00
Sean Anderson
34855b39be serial: smh: Implement puts for DM
This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-14 15:39:15 -04:00
Sean Anderson
679190c41a test: serial: Add test for putc/puts
This adds a test to ensure that puts is equivalent to putc called in a
loop. We don't verify the contents of the message to avoid having to
record console output a second time (though that could be added in the
future). The globals are initialized to non-zero values to avoid a
warning; in particular, the character count is off-by-one (but we always
make relative measurements).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-14 15:39:15 -04:00
Sean Anderson
efa51f2bd6 serial: sandbox: Implement puts
This implements puts for sandbox. It is fairly straightforward, except
that we break out the shared color printing functionality into its own
function.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-14 15:39:15 -04:00
Sean Anderson
2c777488b6 serial: Fix _serial_puts using \n\r instead of \r\n
A string like "test\n" would be broken up into the following sequence of
prints by _serial_puts:

	puts("test\n")
	putc('\r')

Although functionally this is the same as \r\n, it is not the standard
sequence and caused tests to fail. Fix this by excluding the '\n' from
the initial print. The above string will now be broken up like

	puts("test")
	puts("\r\n")

Since we may now need to call ops->puts twice (with the associated retry
logic), break that part of the function off into a helper.

Fixes: 7a76347189 ("serial: dm: Add support for puts")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-14 15:39:15 -04:00
Alexandre Besnard
af298f3dcd cmd: ubi.c: skip part command if right partition is already attached
Attaching a UBI partition may take a while, since scanning the memory is
required.
It thus makes sense to avoid a detach/scan/attach cycle when the right
partition is already attached, and let the calling process call 'detach'
beforehand if it needs it.

This commit checks for the currently attached UBI partition, and skips
reattaching if not needed, showing an information.

Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
72675b063b led: Configure LED default-state on boot
In case the DT LED subnode contains "default-state" property set to
either "on" or "off", probe the LED driver and configure the LED state
automatically.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
[trini: Update the relevant test now that we have support]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
2d1deaf88e led: gpio: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:15 -04:00
Tom Rini
d797dd4c1e led: pwm: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:15 -04:00
Tom Rini
4228023eff led: bcm6753: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
c6db8eb4f6 led: cortina: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
fec9156478 led: bcm6858: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
93c3722085 led: bcm6358: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:15 -04:00
Marek Vasut
9183fb45b8 led: bcm6328: Drop duplicate OF "label" property parsing
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:14 -04:00
Marek Vasut
83c63f0d11 led: Move OF "label" property parsing to core
Every driver in drivers/led/ currently does some form of "label" OF
property parsing in its bind() callback. Move this label parsing to
LED core, since this "label" OF property is a generic property. This
permits code deduplication in subseuqent patches.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
2022-04-14 15:39:14 -04:00
Pali Rohár
aecb338163 misc: atsha204a: Fix big endian support
Callers of function atsha204a_crc16() expect to return value in host cpu
endianity. So remove cpu_to_le16() conversion.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-14 15:39:14 -04:00
Dave Gerlach
e9598cfb28 power: domain: ti: Extend use of PTCMD and PTSTAT registers for high PDs
It is possible for power domain IDs to be great than 31. If this
happens, the PTCMD and PTSTAT registers must overflow into adjacent
corresponding PTCMD_H and PTSTAT_H registers for each. Update the driver
to account for this.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-14 15:39:14 -04:00
Janne Grunau
585fc1c8c5 arm: apple: Add M1 Ultra support
The M1 Ultra consists of two M1 Max dies. The second die's I/O is at
a consistent offset of 0x2000000000.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-04-14 15:39:14 -04:00
Tom Rini
46d940ce71 sandbox: Increase default SYS_MALLOC_LEN
Increase the malloc pool on sandbox in order to avoid spurious errors
such as:
___________________ test_ut[ut_dm_dm_test_video_comp_bmp32] ____________________
test/py/tests/test_ut.py:43: in test_ut
    assert output.endswith('Failures: 0')
E   AssertionError: assert False
E    +  where False = <built-in method endswith of str object at 0x7f5de85efb20>('Failures: 0')
E    +    where <built-in method endswith of str object at 0x7f5de85efb20> = 'Test: dm_test_video_comp_bmp32: video.c\r\r\nSDL renderer does not exist\r\r\ntest/dm/video.c:86, compress_frame_buff..._test_video_comp_bmp32(): 2024 == compress_frame_buffer(uts, dev): Expected 0x7e8 (2024), got 0x1 (1)\r\r\nFailures: 2'.endswith

Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:14 -04:00
Tom Rini
42a2d90cf5 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-13 09:14:57 -04:00
Marek Vasut
0154e6de37 configs: net: dm9000: Move new Kconfig option to board configs
Drop legacy #define CONFIG_DRIVER_DM9000 from board include/configs/
and enable the same in Kconfig configs/ .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:14:31 +03:00
Marek Vasut
f478da938f net: dm9000: Add Kconfig entry
Add Kconfig entry for the DM9000 MAC.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
41e10bea31 net: dm9000: Add DM support
Add support for U-Boot DM and DT probing.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
84bf20f6ce net: dm9000: Receive one packet per recv call
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
85a7260186 net: dm9000: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
f0d1a29dc5 net: dm9000: Pass private data around for IO
Pass private data into IO accessors and use the base addresses of
IO and DATA window from the private data instead of using the hard
coded macros DM9000_IO/DM9000_DATA. Currently both the DM9000_IO
and DM9000_DATA are assigned to the respecive private data fields
for the non-DM case backward compatibility.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
1494a4aace net: dm9000: Drop dm9000.h and staticize SROM access
Dispose of dm9000.h because none of the function prototypes declared in
it are called anywhere in the codebase. Staticize dm9000_read_srom_word()
because it is now called only from within the dm9000 driver. Drop
dm9000_write_srom_word() because it is no longer used.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
3928055e4f net: dm9000: Drop static device private data
Allocate driver private data dynamically in its init function and drop
the static driver private data variable. Pass the dynamic private data
throughout the driver. This is done in preparation for DM conversion.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
8371edd52f net: dm9000: Rename board_info to dm9000_priv
Rename board_info structure to dm9000_priv to make it clear what this
structure really contains, the driver private data. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
a2e92304bb net: dm9000: Reorder and staticize
Reorder the driver functions to get rid of forward declarations.
Staticize whatever is possible. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
a7bebf8d4d net: dm9000: Checkpatch cleanup
Fix checkpatch errors and warnings. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
6d3de0f6db net: dm9000: Drop volatiles
Remove volatile keyword usage from arrays, they are not really volatile
in any way, so this keyword is misused here. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
c7b7ee52b2 net: dm9000: Turn DM9000_DMP_PACKET() into a function
Rework DM9000_DMP_PACKET() into dm9000_dump_packet() function,
this brings better type checking. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
d1854794c0 net: dm9000: Drop unused dump_regs()
Drop unused function dump_regs() because it is unused.
No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
d8f21b2358 net: dm9000: Make RxLen and RxStatus lowercase
Rename variables to lowercase to be consistent with coding style.
No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
42a7e0f2d7 net: dm9000: Replace DM9000_DBG() with debug()
Use standard debug() macro to print debug messages instead of
reinventing driver-specific macro again. No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Vasut
ff61d4eb74 net: dm9000: Make accessor names lowercase
Make accessor names lowercase to be consistent with coding style.
No functional change.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:13:54 +03:00
Marek Behún
af8b0a8d2c driver: net: ti: keystone_net: Change priv member type
Change type of private struct member mdio_base from void * to
phys_addr_t. This allows us to drop 2 casts.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:12:03 +03:00
Marek Behún
71b65d8210 driver: net: ti: keystone_net: Convert to ofnode functions
Convert fdt parsing functions to ofnode parsing functions.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:12:03 +03:00
Marek Behún
71f473916d driver: net: ti: keystone_net: Deduplicate code
Deduplicate common code in ks2_eth_bind_slaves().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-13 15:12:03 +03:00
Tom Rini
2ddf84679d Merge tag 'u-boot-imx-20220413' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220413

i.MX patches for 2022.07

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
2022-04-13 08:00:11 -04:00
Tim Harvey
a1c711046b board: gateworks: venice: add imx8mm-gw7903 support
The GW7903 is based on the i.MX 8M Mini SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - microSD socket with voltage select support
 - Gateworks System Controller
 - M.2 A-E Socket with USB2.0 and PCIe
 - MiniPCIe Socket with PCIe, USB2.0, and SIM
 - IMX8M FEC
 - RS232/RS485/RS422 serial transceiver
 - LIS2DE12 3-axis accelerometer
 - front panel LED's
 - off-board isolated digital I/O
 - Wide range DC power input
 - 802.3at PoE
 - PMIC

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-13 09:55:26 +02:00
Marek Vasut
2c6ae0a15f clk: imx8mp: Fix 24M and 32k clock
Fix registration of 24M and 32k clock, those got applied or rebased
incorrectly, so fill in the correct code.

Fixes: 7a2c3be95a ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
2022-04-13 09:38:25 +02:00
Fabio Estevam
20bd57e90e warp7: Remove duplicated "mmc dev" command
The "mmc dev ${mmcdev}" command is done twice.

Remove one ocurrence to avoid the duplication.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-13 09:37:42 +02:00
Marek Vasut
cb61b2fb2b ARM: imx: Get rid of only i.MX8M SMCCC arch call
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.

By removing this one instance of SMCCC call, U-Boot no longer depends
on SMC handlers and can boot without hanging in any case. If there is
a need to dump this commit ID, use CMD_SMC instead and do 'smc' call
from U-Boot shell or scripts instead of hard-coding SMCCC dependency
into architecture code. This particular code can be replaced by:
 => smc 0xc2000003 0 0 0 0 0 0

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-13 09:35:45 +02:00
Marek Vasut
2fa763baa1 ARM: imx: Enable instruction cache early on on i.MX8M
Enable instruction cache early on to speed up the boot process on i.MX8M.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-13 09:35:33 +02:00
Elmar Albert
87f958810f clk: imx8mp: Add ECSPI clocks
Add clock tables required for bing up ECSPI interfaces

Signed-off-by: Elmar Albert <ealbert@data-modul.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Signed-off-by: Elmar Albert <ealbert@data-modul.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 23:27:32 +02:00
Arjan Minzinga Zijlstra
1ffe366881 net: tftp: fix tftp server initialization
Some globals where not properly initialized causing timeouts
as data packets where not immediately acknowledged.

Fixes: cc6b87ecaa ("net: tftp: Add client support for RFC 7440")
Signed-off-by: Arjan Minzinga Zijlstra <arjan.minzingazijlstra@fox-it.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12 22:41:27 +03:00
Heiko Thiery
76975d415b include: configs: *imx8*: remove IMX_FEC_BASE
The IMX_FEC_BASE value is not used when CONFIG_DM_ETH is configured. So this
value can be removed.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 21:18:02 +02:00
Heiko Thiery
fee2d974f1 kontron-pitx-imx8m: change environment address variables
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-04-12 21:13:56 +02:00
Marek Vasut
d7f72b6830 ARM: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-12 21:08:23 +02:00
Jesse Taube
558331e0f3 board: freescale: imxrt10..-evk: Fix missing include of serial.h
If FALCON mode is enabled we have a missing include in spl_start_uboot.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Jesse Taube
6f9d3da42f ARM: dts: imxrt10..-evk: Linux moved pins-imxrt1020 to dts
The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Jesse Taube
3be38e592e configs/*imxrt10*: SYS_MALLOC_LEN is too large
1M of heap is more than internal ram making booting without SDRAM not
possible now it is 256k

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Jesse Taube
a2d6fbf5ff clk: imxrt: Use dts for anatop base address
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Marek Vasut
c8009c1527 mmc: fsl_esdhc_imx: Add i.MX8MP compatible string
Add compatible string for i.MX8MP, which permits i.MX8MP to use
HS400ES mode, just like all the other i.MX8M.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Haibo Chen <haibo.chen@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 21:08:23 +02:00
Marek Vasut
d072fdde53 ARM: imx: romapi: Repair FlexSPI NOR boot offset
The FlexSPI NOR boot offset does not require any special handling,
the image_offset is correct in either case (0x1000 for FlexSPI NOR
and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start
of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the
case on MX8MN/MX8MP.

The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in
case of the MX8MN/MX8MP, but fixing that needs additional plumbing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-12 21:08:23 +02:00
Marek Vasut
1b4f979492 ARM: dts: imx: Add flexspi node to i.MX8MP
Add flexspi DT node matching Linux kernel as of commit
d7cd74466651e ("arm64: dts: imx8mp: Reorder flexspi clock-names entry")

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 21:08:23 +02:00
Marek Vasut
e1aad512a6 spi: nxp_fspi: Add i.MX8MP compatible string
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one
another, however the linux kernel DT uses separate compatible string
for each SoC. Add the missing i.MX8MP compatible into this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 21:08:23 +02:00
Tim Harvey
8f40e7d29f board: gateworks venice: add support for GPY111 phy
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.

Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 21:08:22 +02:00
Tim Harvey
255658127b board: venice: add spl_board_loader_name
Implement spl_board_loader_name to provide more meaningful device names
vs MMC1 and MMC2.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 21:08:22 +02:00
Tim Harvey
0f42ffd0c7 imx8m{m,n}-venice-gw7902: add GSC ADC rail for VDD_5P0
The GW7902-C revision adds an ADC for the VDD_5P0 voltage rail.
Add register definitions for it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 21:08:22 +02:00
Tim Harvey
f3722dd6da imx8m{m,n}_venice: update boot_net script to load fdt
Update the 'boot_net' script to load the fdt with the kernel.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 21:08:22 +02:00
Heinrich Schuchardt
ca161222e5 ARM: renesas: reduce rcar3_salvator-x image size
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit.

Enable linked time optimization (LTO).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-12 20:23:42 +02:00
Marek Vasut
bba6cc7018 ARM: dts: imx: Add support for Data Modul i.MX8M Mini eDM SBC
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-12 19:10:44 +02:00
Fabio Estevam
fd44d48f24 imx8mm-cl-iot-gate: Add redundand environment support
Add redundand environment support as it is required
by SWUpdate.

While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate
larger offset as done on other i.MX8M defconfigs.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:44 +02:00
Fabio Estevam
ea10bea68d imx8mm-cl-iot-gate: Retrieve the serial number from EEPROM
The serial number is located at offset 0x14 of the EEPROM
under i2c0 bus at address 0x54.

To print the serial number in Linux:

SERNUM=$(cat /proc/device-tree/serial-number)
echo $SERNUM

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:44 +02:00
Fabio Estevam
79bc9dcfa2 imx8mm-cl-iot-gate: Retrieve the MAC address from EEPROM
Currently the eth0 MAC address is randomly assigned.

Retrieve the MAC address from EEPROM.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:44 +02:00
Fabio Estevam
6924bc7ca2 imx8mm-cl-iot-gate: Retrieve the DDR type from EEPROM
Currently, the DDR type is retrieved by iteracting inside an array
of possible DDR types.

This may take saveral attempts, which slows the overall U-Boot process
and does not provide a good user experience:

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 1/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x5000010 ]
resetting ...

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 2/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x1061010 ]
resetting ...

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 3/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0xff000010 ]
Normal Boot
WDT:   Not starting
Trying to boot from MMC2
NOTICE:  BL31: v2.5(release):v2.5
NOTICE:  BL31: Built : 07:12:44, Jan 24 2022

Improve the boot time by retrieving the correct DDR information from
the EEPROM:

U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300)
DDRINFO(D): Kingston 4096G
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(E): mr5-8 [ 0xff000010 ]
Normal Boot
WDT:   Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from MMC2
NOTICE:  BL31: v2.5(release):v2.5
NOTICE:  BL31: Built : 22:28:11, Mar 15 2022

Based on the original code from Compulab's U-Boot.

Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:44 +02:00
Fabio Estevam
0bb304e363 imx8mm-cl-iot-gate: Add SPL EEPROM support
imx8mm-cl-iot-gate supports multiple DDR sizes and models.

The DDR type can be retrieved from the EEPROM, so add SPL code
that can be used to get the DDR information.

Based on the original code from Compulab's U-Boot.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:44 +02:00
Ariel D'Alessandro
6c317fedc7 bsh: imx8mn-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.

Add support for iMX8MN BSH SMM S2 board:

- 256 MiB DDR3 RAM
- 512MiB Nand
- USBOTG1 peripheral - fastboot.
- 100Mbit Ethernet

Add support for iMX8MN BSH SMM S2 PRO board:

- 512 MiB DDR3 RAM
- 8 GiB eMMC
- USBOTG1 peripheral - fastboot.
- 100Mbit Ethernet

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-04-12 19:10:44 +02:00
Michael Trimarchi
a2f5c9366a net: phy: nxp-tja11xx: Add NXP TJA11xx PHY driver
Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special
BroadRReach 100BaseT1 PHYs used in automotive.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12 19:10:44 +02:00
Ariel D'Alessandro
087baf80ec net: phy: Add phy_modify() accessor
Add read-modify-write unlocked accessor for accessing a PHY register.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12 19:10:44 +02:00
Ariel D'Alessandro
d7db0e6df3 iopoll: Extend read_poll_timeout macro to support variable parameters
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12 19:10:44 +02:00
Ariel D'Alessandro
01c67a381c phy: nxp-c45-tja11xx: Rename functions to be c45 tja11xx specific
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP
TJA11XX PHYs. Let's rename functions in this driver to be c45 variant
specific, so further drivers can be introduced adding support for NXP
TJA11XX PHYs.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12 19:10:44 +02:00
Michael Trimarchi
1dd4985ed4 imx8m: add init_nand_clk
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF,
so we still use legacy mode to configure the clock.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-04-12 19:10:44 +02:00
Michael Trimarchi
1247c444d6 imx8m: add regs used by GPMI
Add regs used by GPMI

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-04-12 19:10:44 +02:00
Marek Vasut
9f3370f800 ARM: imx8mm: verdin-imx8mm: Drop superfluous header
The power/bd71837.h should no longer be included, since V1.1 SoM
uses only the PCA9450 PMIC and the BD71837 support was removed.
Drop the header too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Tommaso Merciai
d101661087 driver: pwm: pwm-imx: separe dm from non dm implementation
Separe dm implementation from non dm implementation of pwm-imx
driver using CONFIG_DM_PWM

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 19:10:44 +02:00
Tommaso Merciai
2c432563df drivers: pwm: pwm-imx: move pwm-imx-util into pwm-imx
Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c
and drop off pwm-imx-util.c

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 19:10:44 +02:00
Peng Fan
ec191a8176 imx: mx7dsabresd: enable DM_SERIAL
Enable CONFIG_DM_SERIAL, and `dm tree` could show:
 serial        1  [   ]   serial_mxc            |       |-- serial@30a80000

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Peng Fan
eace942951 imx8mq: soc: Set the BYPASS ID SWAP bit (GPR10 bit 1)
Set the BYPASS ID SWAP bit (GPR10 bit 1).
The ID SWAP function randomly make TZASC grant non-secure access to
secure memory. TZASC ID SWAP should be bypassed by setting the bit
TZASC_ID_SWAP_BYPASS(bit 1) in IOMUX_GPR10 register.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Marcel Ziswiler
a398d7d2d4 board: colibri-imx6ull: fix detecting sd card
Turns out on certain carrier boards (e.g. Iris V2) and under certain
circumstances (e.g. after a software reset) the SD card may have been
left in a strange state which later failed as follows:

Colibri iMX6ULL # mmc dev 0
Card did not respond to voltage select! : -110

Fix this as follows:
- Re-name the signaling voltage rail regulator from vmmc to vqmmc.
- Fix the name of the GPIO property to gpios.
- Specify 4-bit bus width, no write-protect capability and no 1.8
  volt signaling voltage capability.
- Fix the clock vs. command pull-up vs. push-pull configuration.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Marcel Ziswiler
9cec652ec5 configs: colibri-imx6ull/-emmc: use micrel ksz8xxx phy driver
Use the Micrel KSZ8xxx specific Ethernet PHY driver rather than the
generic one.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Marcel Ziswiler
0fed070c38 colibri-imx6ull: fix nand bch geometry
Fix NAND BCH geometry as otherwise the following errors are observed
upon boot:

...
Loading Environment from NAND... NAND read from offset 380000 failed -74
...
NAND read from offset 800 failed -74
...
ubi0 error: ubi_io_read: error -74 (ECC error) while reading 64 bytes
 from PEB 0:0, read 64 bytes
...

Fixes: ed48490f8d
("mtd: gpmi: fix the bch setting backward compatible issue")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Oleksii Bidnichenko
192e7012c2 disk: part: add the device search failed log msg
Add missing error message to blk_get_device_part_str.

Signed-off-by: Oleksii Bidnichenko <oleksii.bidnichenko@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Philippe Schenker
aa6f57d877 board: colibri-imx6ull: fix detecting ethernet phy
Now that it is possible to use regulator-fixed-clock make use
of it. This makes U-Boot detect the PHY on first cold-boot.

This commit also adjusts the code in setup_fec and follows
how it is done in mx6ullevk.c

This commit also slows down the boot-process by about 150ms
as it now waits for the regulator-fixed-clock voltage that
drives the PHY to go up.
If you rely on very fast boot-speeds and don't need ethernet
for your boot-process you can safely revert the changes on
imx6ull-colibri.dtsi

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Philippe Schenker
f3b5100aff regulator: fixed: add possibility to enable by clock
This commit adds the possibility to choose the compatible
"regulator-fixed-clock" in devicetree.

This is a special case of regulator-fixed where a clock has to
be used to switch the regulator on and off.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Philippe Schenker
885dcc36af board: colibri-imx6ull: Do not leave variant variable unset
Toradex uses the variable variant to distinguish between modules with
eMMC, NAND with wifi and NAND without wifi.
This variable is set on every boot. Set this variable also if we have a
NAND module without wifi to prevent issues.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Denys Drozdov
c1e6576162 apalis-tk1: avoid save environment unasked
U-Boot should never save the environment unasked.
This also avoids storing broken fdt_module to flash.

Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Denys Drozdov
b8055ee176 apalis-imx6: avoid save environment unasked
U-Boot should never save the environment unasked.
This also avoids storing broken ftd_file to eMMC.

Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Oleksandr Suvorov
338b9b9a19 colibri-imx6ull: drop vidargs and remove video= settings
Since we envision using overlays for display interfaces, the video=
settings within vidargs are obsolete. Remove these settings from the
U-Boot.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Philippe Schenker
05cc835135 include: colibri_vf: add missing tdxargs variable
All the other NAND-based boards have tdxargs specified for setting
manual kernel command-line arguments.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Marcel Ziswiler
4551e18987 configs: verdin-imx8mm: verdin-imx8mp: enable dm serial
Enable driver model for serial.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Marcel Ziswiler
310de88287 arm64: dts: imx8mm-u-boot.dtsi: imx8mp-u-boot.dtsi: use atf-bl31 type
Explicitly use the atf-bl31 type for the bl31.bin atf-blob. This uses
the path from the BL31 environment variable, if defined.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12 19:10:44 +02:00
Marek Vasut
34694f1a3e ARM: imx8mm: verdin-imx8mm: Rework board_early_init()
Rename board_early_init_f() to board_early_init(), since this function
has nothing to do with actual board_early_init_f() as used throughout
U-Boot. The board_early_init() is function local to this board used to
configure UART and WDT pinmux. Wrap init_uart_clk() into this function
so that early UART init would be all in one place. Turn the function
into __weak one, so it could be overridden in case custom carrier board
uses different UART or needs custom IOMUX settings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-12 19:10:44 +02:00
Ye Li
1c9bc0fffa imx8m: soc: Relocate u-boot to the top DDR in 4GB space
The EFI memory init uses gd->ram_top for conventional memory. In
current implementation, the ram_top is below optee address. This cause
grub failed to allocation memory for initrd.
The change updates DDR bank setup functions to place the u-boot at top
DDR in 4GB space.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Peng Fan
1166bd433a imx8m: soc: drop phy-reset-gpios for fec
Need to drop phy-reset-gpios before booting linux, this property
is legacy property and replaced with reset-gpios.

If provide both, kernel would failed to request the same gpio twice
and cause fec not work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Peng Fan
8325ef3d77 imx: imx8m: soc: runtime drop extcon property from usbotg node
The extcon is an decrepted property and not used by upstream Linux and
NXP 5.10 kernel, so we remove it before kicking linux in case it is in
dts. Otherwise distro kernel will not able to have usb function.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Peng Fan
35bb60787b imx: imx8mp: disable fused IP for UltraLite
Beside the fused modules on iMX8MP Lite, this part has also fused
GPU3D/2D, LVDS and MIPI DSI.
So we have to disable them for kernel and also disable MIPI DSI
in u-boot DTS for splash screen at runtime.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:44 +02:00
Peng Fan
36bfd71c92 imx: imx8mp: detect i.MX8MP UltraLite when get cpu rev
Detect i.MX8MP UltraLite in get_cpu_variant_type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
fd437083b8 imx: imx8mp: Add iMX8MP UltraLite Part cpu type
Add i.MX8MP UltraLite Part CPU type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Francesco Dolcini
aa42894471 mx6: ddr: Wait before issuing the first MRS cmd
Wait 1ms before issuing the first MRS command to write DDR3 Mode
registers.

There is a requirement to wait a minimum time before issuing command to
the DDR3 device, according to the JEDEC standard this time is 500us
(after RESET_n is de-asserted until CKE becomes active) + tXPR (Reset
CKE Exit time, maximum value 360ns).

It seems that for some reason this is not enforced by the MMDC
controller.

Without this change we experienced random memory initialization failures
with about 2% boot failure rate on specific problematic boards, after
this change we were able to do more than 10.000 power-cycle without a
single failure.

Fixes: fe0f7f7842 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:43 +02:00
Francesco Dolcini
09dbac8174 mx6: ddr: Restore ralat/walat in write level calibration
The current DDR write level calibration routine always overwrite
the ralat/walat fields to their maximum value, just save
the existing values at the beginning of the calibration routine
and restore it at the end.

In case the delay is estimated by the user to be more than one cycle the
walat should be configured according to that, this is not
automatically done.  From the i.MX6 RM:

   The user should read the results of the associated delay-line at
   MPWLDECTRL#[WL_DL_ABS_OFFSET#] and in case the user estimates that the
   reasonable delay may be above 1 cycle then the user should indicate it at
   MPWLDECTRL#[WL_CYC_DEL#]. Moreover the user should indicate it in
   MDMISC[WALAT] field. For example, if the result of the write leveling calibration
   is 100/256 parts of a cycle, but the user estimates that the delay is above 2 cycles
   then MPWLDECTRL#[WL_CYC_DEL#] should be configured to 2, so the total
   delay will be 2 and 100/256 parts of a cycle

Probably it would just possible to not overwrite the mdmisc register in
the first place, since this is not present in the write_level_calib() example
in NXP AN4467 nor in the i.MX6 RM (44.11.6.1 Hardware Write Leveling
Calibration).

Fixes: d339f16911 ("arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 19:10:43 +02:00
Peng Fan
ed6ba46e3b misc: imx8ulp: Update fuse driver
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Ye Li
c41ffaa253 imx: imx8ulp_evk: Enable multiple env storage devices
Enable multiple storages for u-boot env:
MMC or SPI flash or NOWHERE for usb
so u-boot can runtime select the storage flash according to boot device.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
4b33383fee imx: imx8ulp_evk: enlarge CONFIG_NR_DRAM_BANKS
When TEE is present, the DRAM maybe split to two parts,
so enlarge CONFIG_NR_DRAM_BANKS

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Ji Luo
112b777849 imx: imx8ulp: reserve tee memory
The TEE memory should be reserved when TEE is present, so need
to runtime update dram bank and memory information according to
tee present or not.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
8c453e9d3d imx: imx8ulp: enable wdog_ad interrupt in CMC1
Enable wdog_ad interrupt being triggered by CMC1 to CM33 to let CM33
know A35 reset and reinitialize rpmsg.
Clear wdog_ad and AD_PERIPH reset interrupt after A35 up, otherwise
M33 will always receive interrupt.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
1f7f0dd934 imx: imx8ulp_evk: Enable SD/MMC port auto detect
Enable the SD/MMC port auto detect.
The mmc relevant env can be reset when auto detect is enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
f342c9e381 imx: dynamic setting mmcdev and mmcroot
Dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Ye Li
7b68357130 imx: imx8ulp_evk: call the handshake with M33
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Ye Li
34385a20f3 imx: imx8ulp_evk: Update LPDDR4 PHY settings
Update DDR PHY settings to support LPDDR4 mode only by adjusting
DQ VREF ctrl, ODT and pads drive strength.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Clement Faure
c72f1f2f0c imx: imx8ulp: release CAAM for the Cortex-A35
Release the CAAM for the A35 from the SPL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Ye Li
203412f66d misc: S400_API: Update S400 API for buffer dump
Add ahab_dump_buffer API to dump AHAB buffer for debug purpose

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Clement Faure
a55ca506c9 misc: S400_API: add ahab_release_caam
Add ahab_release_caam() function to the S400 API.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
3524540e70 imx: imx8ulp: Load the lposc fuse for dual boot
Found the lposc fuse loading having impact to cpu idle in kernel.
Without the loading in dual boot mode, kernel will hang after idle
for a while.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
c916fb1747 imx: imx8ulp: Change LPAV assignment for dual boot
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.

No needs to initialize DDR again after reboot.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
043d11a459 misc: imx8ulp: Add OEM SRK Hash fuse support
Since latest S400 firmware has supported to read OEM SRK Hash, add
it to the driver's table

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
c628016c12 imx: imx8ulp: enable MU0_B clk by default
Enable MU0_B clk by default. When M33 image is loaded by Jlink,
the previous method not enable MU0_B clk and not able to communicate
with M33, so let's enable it by default.

And we not put it under kernel dts, because it conflicts with i.MX8QM
suspend/resume logic which requires large change.

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
509b8e7ba1 imx: imx8ulp: cgc: Switch to NICLPAV to FRO192 before PLL4 init
When reset with dual boot mode, the LPAV domain won't power down
due to its master is not assigned to APD. So the NICLPAV keeps the
last setting to use PLL4PFD1. So before SPL initialize the PLL4,
we need to switch NICLPAV to FRO192, otherwise system will hang.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
4ab38f6822 imx: imx8ulp_evk: Skip init DDR for reboot in dual boot mode
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset
during APD reset. So no need to init DDR again after reboot, but need to
reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may
change or disable some of them.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
a092f33305 imx: imx8ulp: add ND/LD clock
Add a new ddr script, defconfig for ND
Configure the clock for ND mode
changing A35 to 960MHz for OD mode
Update NIC CLK for the various modes
Introduce clock_init_early/late, late is used after pmic voltage
setting, early is used in the very early stage for upower mu, lpuart and
etc.

Note: NIC runs at 324MHz, 442MHz has some random kernel hang issue with
cpuidle enabled now.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
4ddb33dac5 imx: imx8ulp_evk: Remove PMIC Bucks PWM mode settings
This workaround is not needed on i.MX8ULP proto-1B EVK as board has
fixed the problem. Because we don't support proto-1A any longer,
remove the PMIC settings.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
40d60ec780 imx: imx8ulp: add CAAM clock entry
Add CAAM clock entry in PCC3

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Clark Wang
a178a8c5de imx: imx8ulp: clock: Add clock support for i3c controller
Add i3c controller clock enable/disable function for imx8ulp.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
5579d66e37 imx: imx8ulp: Add M33 handshake functions
Add functions to check if M33 image is booted and handshake with M33
image via MU. A core notifies M33 to start init by FCR F0, then wait
M33 init done signal by checking FSR F0.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
8576f1a67a imx: imx8ulp: include pcc/cgc header in clock header
With this change, we no need to include pcc/cgc header files both.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
38149cd0cc imx: imx8ulp: Set COUNTER_FREQUENCY to 1Mhz
The COUNTER_FREQUENCY is missed in 8ulp configs, it will cause SPL
and u-boot not set the cntfrq_el0. For u-boot, this is ok, because
ATF has set it. But for SPL, it will lead delay and get_timer
not working.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Marek Vasut
77ee5d3508 phy: phy-imx8mq-usb: Add support for i.MX8MP USB PHY
Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
the i.MX8MQ, except for clock and power domain design customization.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2022-04-12 17:33:56 +02:00
Marek Vasut
7a2c3be95a clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock
Add clock tables required to bring up DWC3 USB, USB PHY and HSIOMIX domain.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-12 17:33:56 +02:00
Clément Péron
1697638e71 arm: imx: parse-container: add some missing end of line
Some printf() have strings that doesn't terminate with end of line
and make the output hard to read.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:55 +02:00
Angus Ainslie
129f5102d2 clk: imx8m: reduce rate table duplication
Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock
driver.

43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place")

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
2022-04-12 17:33:55 +02:00
Angus Ainslie
11c8ab01f3 clk: imx8mq: Add a clock driver for the imx8mq
This is a DM clock driver based off the imx8mm u-boot driver and the linux
kernel driver.

All of the PLLs and clocks are initialized so the subsystems below are
functional and tested.

1) USB host and peripheral
2) ECSPI
3) UART
4) I2C all busses
5) USDHC for eMMC support
6) USB storage
7) GPIO
8) DRAM

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Acked-by: Sean Anderson <seanga2@gmail.com>
2022-04-12 17:33:55 +02:00
Angus Ainslie
a375c6f3fb dt-bindings: imx8mq-clock: add mainline definitions
Sync the clock ids with the mainline kernel

077de6e1c9f ("clk: imx8mq: add PLL monitor output")

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-04-12 17:33:55 +02:00
Ye Li
34793598c8 mtd: nand: mxs_nand_spl: Remove the page aligned access
The mxs_nand_spl driver can support to read from page unaligned offset,
so don't need to set bl_len to ask spl_load_simple_fit to handle
the page unaligned access.

Actually spl_load_simple_fit has two parts of reading:
spl_simple_fit_read and spl_load_fit_image.
The spl_load_fit_image can handle the page unaligned offset,
but the spl_simple_fit_read can't do it. spl_simple_fit_read requires
the FIT location at page aligned offset.

Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl
to use page unaligned read by driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
2022-04-12 17:33:55 +02:00
Tommaso Merciai
f399a8d38f configs: imx8mm_evk: add pwm backlight support
Enable support for backlight/pwm-imx driver

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
3c9d1945e6 arm: dts: imx8mm_evk: add pwm1/backlight support
Add pwm1/backlight support nodes for imx8mm_evk board

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
6828b3ecea driver: pwm: pwm-imx: introduce pwm_dm_imx_get_parms
Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms.
This function get clock rate using clk dm api

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
bfc778cb93 driver: pwm: pwm-imx: get and enable per/ipg clock using dm
Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat
and imx_pwm_probe driver function

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
e2d074cead clk: imx8mm: add pwm clocks support
Add clocks support for the PWM controllers. This is ported from
Linux v5.17-rc8.

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
625a3fe90c arch: mach-imx: imx8m: add pwm_regs struct in imx-regs
Add pwm_regs struct for i.MX8MM SOC

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Tommaso Merciai
4aee7d0b84 arch: mach-imx: imx8m: add pwm ctrl registers fields defines
Add pwm control registers fields defines into imx-regs.h:

 - prescaler
 - dozeen
 - waiten
 - dbgen
 - clksrc_ipg_high
 - clksrc_ipg, en field

References:
 - iMX8MMRM.pdf p 3884

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12 17:33:55 +02:00
Marek Vasut
e26d0152d6 ARM: imx: Decode ECSPI env location from i.MX8M ROMAPI tables
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables.
This is necessary to correctly identify env is in SPI NOR when the system
boots from SPI NOR attached to ECSPI.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 17:33:55 +02:00
Adam Ford
7990277a7b arm: imx: imx8mn_beacon: Remove unnecessary configs
Because the Beacon imx8mn board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 17:33:55 +02:00
Adam Ford
1a831a383c arm: imx: imx8mm_beacon: Remove unnecessary configs
Because the Beacon imx8mm board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 17:33:55 +02:00
Tom Rini
b2a22b2c9f Merge branch '2022-04-12-two-more-fixes'
- Bugfix in cpu_to_be32_array() and re-use $(UBOOTINCLUDE) in
  dtc_cpp_flags
2022-04-12 09:52:08 -04:00
Ye Li
0f709635fd imx8ulp: Disable SPL exception vector
Disable SPL exception vector which causes issue to ROM patch execution
when SPL calling ROM API.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 15:36:18 +02:00
Fabio Estevam
8fbca1a8b9 tbs2910: Convert to DM_SERIAL
Conversion to DM_SERIAL is mandatory.

Select DM_SERIAL and add a imx6q-tbs2910-u-boot.dtsi file
that describes the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.

Remove the now unneeded board UART initialization.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
2022-04-12 15:36:18 +02:00
Fabio Estevam
473466a5c4 warp7: Remove UART initialization code
With DM_SERIAL selected, it is no longer needed board code to
initialize the UART.

Describe the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.

Remove the now unneeded board UART initialization.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12 15:36:18 +02:00
Tim Harvey
8479b9e6c9 drivers: misc: add Gateworks System Controller driver
Add a driver for the Gateworks System Controller used on Gateworks boards
which provides a boot watchdog, power control, temperature monitor,
and voltage ADCs.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Tim Harvey
6bec6c169f board: gateworks: gw_ventana: move ft_early_fixups out of common
DM is not used for the SPL and a generic DT is used in the SPL
which requires no fixups. Remove the call in the SPL and move the function
into the U-Boot code.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Tim Harvey
6d7418c423 board: gateworks: gw_ventana: move GPIO config out of common
Move gpio configuration out of common and into u-boot code as it is
not used by the SPL.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Tim Harvey
d169313dda board: gateworks: gw_ventana: move SPL uart config out of common
Since DM_SERIAL is used for U-Boot we no longer need legacy UART code in
common.c shared by the SPL and U-Boot. Move the legacy UART config to
the non-DM SPL.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Tim Harvey
cb339a0021 board: gateworks: gw_ventana: convert to DM_I2C
convert to DM_I2C for U-Boot while leaving SPL legacy I2C:
 - Move I2C config from common to SPL
 - Move PMIC config from common to SPL (no need to re-configure pmic)
 - add DM_I2C support to eeprom/gsc functions shared by SPL and U-Boot

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Ariel D'Alessandro
0c67906248 arm: dts: imx8mn_var_som: Set atf-bl31 blob entry type
Configure binman ATF blob entry type to use the path from the BL31
environment variable, if defined.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12 15:36:17 +02:00
Heiko Thiery
ff1c7961d8 ARM: imx: imx8mn-evk: enable DM_SERIAL
U-Boot complains that CONFIG_SERIAL is not converted to CONFIG_DM_SERIAL
and gives a deadline before possibly removing the board. Migrate to
DM_SERIAL to fulfill the request.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 15:36:17 +02:00
Marek Vasut
b8a24e07b2 imx8m: ddrphy_utils: Add 3732 MT/s mode
Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 15:36:17 +02:00
Marek Vasut
4ca42af8f5 ARM: imx: imx8m: Add 933 MHz PLL settings
Add settings for operating PLL at 933 MHz. This setting is useful in
case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 15:36:17 +02:00
Marek Vasut
a0044538c8 pmic: pca9450: Add PCA9450C compatible string
Add DT compatible string for PCA9450C PMIC. This is a variant of the
PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator,
and is software-wise compatible with the PCA9450B. This variant of the
PCA9450 is designed for use as companion PMIC for i.MX8MP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-12 15:36:17 +02:00
Marek Vasut
3fa3f23d1b ARM: dts: net: dwc_eth_qos: Fix i.MX8MP compatible string
The correct compatible string for i.MX8MP variant of DWC EQoS MAC
is "nxp,imx8mp-dwmac-eqos", use it. Drop the two current users of
the current wrong compatible string to avoid breaking them.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12 15:36:17 +02:00
Adam Ford
448616126b imx: imx8mm/imx8mn_beacon: Remove redundant code
The Ethernet controller and PHY use the device tree info to
configure themselves, so it's not necessary to manually do it
in the board file.  This permits the removal of a bunch of headers
as well.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 15:36:17 +02:00
Heiko Thiery
4d372b053b ARM: imx: imx8mn-*-evk: add qca, disable-smarteee phy node
To be in sync with the linux devicetree add the disable-smarteee
property.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
2022-04-12 15:36:17 +02:00
Heiko Thiery
83fdfa64e4 ARM: imx: imx8mn-*-evk: use reset-gpios in phy node
To be in sync with the linux devicetree change the 'phy-reset-gpios' in
the fec node to 'reset-gpios' in the phy node. The PHY reset will be
done by the eth-phy-uclass driver while probing the PHY. This is ok
since it is done before probing the fec.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-04-12 15:36:17 +02:00
Heiko Thiery
775011980b ARM: imx: imx8mn-*-evk: use DM settings for PHY configuration
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.

The PHY latency settings are derived from the phy-mode property and the
voltage seetings are done via the regulator.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-04-12 15:36:17 +02:00
Angus Ainslie
9eb5e7d9ab pinctrl: nxp: don't automatically select DEVRES
If we select DEVRES here then it breaks building an imx8m SPL without
DEVRES support.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-04-12 15:36:17 +02:00
Heinrich Schuchardt
c8f9e666ab include/linux/byteorder: fix cpu_to_be32_array()
In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int
counter to a size_t parameter. Correct the type of the counter.  This
exists in upstream as b4c80629c5c9 ("include/linux/byteorder/generic.h:
fix index variables").

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-04-12 08:02:54 -04:00
Andy Shevchenko
672c170f68 Makefile.lib: Re-use $(UBOOTINCLUDE) in dtc_cpp_flags
As in ASL case use same basic set of the inclusions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-12 08:02:54 -04:00
Michael Trimarchi
ebe757d995 configs: imx6dl_mamoj_defconfig: Enable LTO on imx6dl_mamoj board
Enable LTO on mamoj to reduce SPL and uboot size. Tested with gcc
gcc-11.1.0

U-Boot 2022.04-rc4-00051-g17fc5facd0 (Mar 23 2022 - 16:43:43 +0100)

CPU:   Freescale i.MX6DL rev1.3 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 40C
Reset cause: POR
Model: BTicino i.MX6DL Mamoj board
DRAM:  512 MiB
Core:  29 devices, 12 uclasses, devicetree: separate
MMC:   FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:
Error: ethernet@2188000 address not set.
No ethernet found.

Tested-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12 13:39:33 +02:00
Gaurav Jain
6a8829ae13 update CAAM MAINTAINER
updated CAAM driver files maintainer.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-04-12 11:20:30 +02:00
Gaurav Jain
98281e6d49 PPC: Enable Job ring driver model.
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-12 11:20:30 +02:00
Gaurav Jain
5e2ff13357 PPC: Add crypto node in device tree
device tree imported from linux kernel.
c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-12 11:20:01 +02:00
Gaurav Jain
8976556a8a Layerscape: Enable Job ring driver model.
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
platforms are enabled with JR driver model.

removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-04-12 11:20:01 +02:00
Gaurav Jain
88071ca2bb Layerscape: Add crypto node in device tree
LS(1021/1012/1028/1043/1046/1088/2088), LX2160 - updated device tree

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-12 11:19:21 +02:00
Gaurav Jain
cb5d0419f5 crypto/fsl: i.MX8: Enable Job ring driver model.
i.MX8(QM/QXP) - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:19:21 +02:00
Gaurav Jain
0b9c444559 i.MX8: Add crypto node in device tree
i.MX8(QM/QXP) - updated device tree for supporting DM in SPL.

disabled use of JR1 in SPL and uboot, as JR1 is reserved
for SECO FW.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
75d3a9f8fd i.MX7ULP: Enable Job ring driver model.
added crypto node in device tree.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
4f1375d4e8 i.MX7: Enable Job ring driver model.
i.MX7D - added support for JR driver model.

removed sec_init() call, sec is initialized based on
job ring information processed from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
644bfa8e1d i.MX6: Enable Job ring driver model.
i.MX6,i.MX6SX,i.MX6UL - added support for JR driver model.

removed sec_init() call, sec is initialized based on
job ring information processed from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Ye Li
720bcfb1e0 mx6sabre: Remove unnecessary SPL configs
Because we don't use SPL_DM on mx6sabresd and mx6sabreauto, so it is
unnecessary to have SPL DTB related configs and SPL_OF_CONTROL enabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
2cddfcbc75 crypto/fsl: i.MX8M: Enable Job ring driver model.
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
ee51b2c767 i.MX8M: crypto: updated device tree for supporting DM in SPL
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
4556cf8271 crypto/fsl: Add support for CAAM Job ring driver model
added device tree support for job ring driver.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-12 11:18:34 +02:00
Kshitiz Varshney
a9d1e18b6a LS1043ARDB, LS1046ARDB, LS1088ARDB: Enable SPL_OF_CONTROL in SECURE Boot defconfig
If enable SPL_DM without SPL_OF_CONTROL,
build errors "undefined reference to fdt_get_resource",
is coming in function `caam_jr_probe'.
Added SPL_OF_CONTROL to remove the error.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
2022-04-12 11:17:01 +02:00
Tom Rini
a7fb97b6e6 linux/mtd/mtd.h: Add <dm/ofnode.h>
We need to know where the typedef of 'ofnode' comes from.

Fixes: c86a4de8df ("mtd: Add flash_node in struct mtd_info")
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-11 17:11:21 -04:00
Tom Rini
7486c2ef9d Merge branch '2022-04-11-assorted-updates'
- Assorted fixes/updates including K3-J721s2 timer dts fix, assorted
  crypto improvements, led-pwm driver, improve handling of mtd
  partitions, align mkimage hash output buffers and backport a UBIFS
  bugfix from Linux.
2022-04-11 15:59:45 -04:00
Hajo Noerenberg
c3322a53f3 ahci: add PCI bindings for Marvell 88SE6121/45 SATA controllers
Add AHCI PCI bindings for Marvell 88SE6121/45 SATA controllers.

The 88SE6121 controller is used, for example, in the Seagate Blackarmor NAS440 or the Iomega ix4-200d NAS.

As Pali Rohár explained [1], these controllers do not match the standard AHCI class code and therefore require an explizit PCI binding. The Linux kernel also uses this approach [2].

[1] https://lists.denx.de/pipermail/u-boot/2022-March/479197.html
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci.c?h=v5.17#n557

Signed-off-by: Hajo Noerenberg <hajo-uboot@noerenberg.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-04-11 15:03:29 -04:00
Ville Baillie
749c6a6275 ubifs: Fix journal replay wrt. xattr nodes
Backport commit 1cb51a15b576 ("ubifs: Fix journal replay wrt. xattr
nodes") from the Linux Kernel, which has the following Signed-off-by
line:
Signed-off-by: Richard Weinberger <richard@nod.at>

For U-Boot, after comapring with the upstream commit:
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-11 15:03:28 -04:00
Sean Anderson
b583348ca8 image: fit: Align hash output buffers
Hardware-accelerated hash functions require that the input and output
buffers be aligned to the minimum DMA alignment. memalign.h helpfully
provides a macro just for this purpose. It doesn't exist on the host,
but we don't need to be aligned there either.

Fixes: 5dfb521386 ("[new uImage] New uImage low-level API")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 11:39:19 -04:00
Patrick Delaunay
e6fe02a571 cmd: pxe_utils: sysboot: replace cls command by video_clear in PXE parser
Since the commit bfaa51dd4a ("cmd: add serial console support
for the cls command") the cls command is not enough to clear the
video display when ANSI console is activated.

This patch clears the video device with the video_clear() API
before to display the bitmap used for the PXE background.

This patch avoids to display the LOGO, activated by default with
commit 7a8555d871 ("video: Show the U-Boot logo by default").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-11 11:39:19 -04:00
Patrice Chotard
7ab3364c6d mtd: Update the way partitions are parsed
In case mtd_info's dev field is not populated (raw nand's case),
use the flash_node new field which reference the DT flash node where
can be found "partitions" node with "fixed-partitions" compatible.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
2022-04-11 11:39:19 -04:00
Patrice Chotard
c86a4de8df mtd: Add flash_node in struct mtd_info
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().

But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.

To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
2022-04-11 11:39:19 -04:00
Paul HENRYS
877de2a369 drivers: led: bcm6858: Set a default brightness when probing LEDs
When probing the LEDs, a default brightness is set based on settings
from the U-Boot device tree, i.e. the 'default-brightness' property
of the LED nodes. If that property is not present, the default
maximum brightness is set.
This should make sure the LED controller's registers affecting the
brightness are correctly initialized and should give a consistent
behaviour.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
2022-04-11 11:39:19 -04:00
Jérôme Carretero
5fa973eb28 spl: allow boot from first bootable partition
This was implemented in order to get dual-slot bootloader
partitions on the BeagleBone Black, whose MLO boots from
the first bootable partition: MLO chainloads u-boot in the
same way.

Signed-off-by: Jérôme Carretero <cJ-uboot@zougloub.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-04-11 11:39:19 -04:00
Dhananjay Phadke
e146a2c12f lib/crypto: support sha384/sha512 in x509/pkcs7
Set digest_size SHA384 and SHA512 algorithms in pkcs7 and x509,
(not set by ported linux code, but needed by __UBOOT__ part).

EFI_CAPSULE_AUTHENTICATE doesn't select these algos but required for
correctness if certificates contain sha384WithRSAEncryption or
sha512WithRSAEncryption OIDs.

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-04-11 11:39:19 -04:00
Ivan Vozvakhov
067cfc1c2e led: led_pwm: Add a driver for LEDs connected to PWM
Add a driver which allows to use of LEDs connected
to PWM (Linux compatible).
MAINTAINERS: add i.vozvakhov as a maintainer of leds-pwm
C(required during new functionality adding).

Signed-off-by: Ivan Vozvakhov <i.vozvakhov@corp.mail.ru>
2022-04-11 11:39:19 -04:00
SESA644425
81eff51047 lib: rsa: Update function padding_pss_verify (any-salt)
Modify function to support any salt length instead of max
length only. Function now detects salt length by parsing
the content of db buffer. Note that it works with (but is
not limited to) zero-length, digest-length and max-length

Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 11:39:19 -04:00
SESA644425
fb7330545e lib: rsa: Leverage existing data buffer instead of systematic copy
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to reduce memory
consumption of function by replacing memory copies of parts of
const buffer by pointers to the original buffer (masked_db and
h are subparts of msg buffer which is declared const, salt is a
subpart of db which is a working buffer, unmodified after being
filled). New pointers scope is limited to the function where
they are declared (not returned to caller by any mean), zeroing
risk of memory fault related to the change.

Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 11:39:19 -04:00
SESA644425
c755aa8a1d lib: rsa: Fix const-correctness of rsassa_pss functions
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to update
const-correctness in targeted functions to comply with
coding-rules and avoid const-cast

Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 11:39:19 -04:00
Vignesh Raghavendra
7262ff7e56 ARM: dts: k3-j721s2: Correct timer frequency
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.

Without this delays in R5 SPL are 10x off.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-04-11 11:39:19 -04:00
Tom Rini
1583c87b1b Merge branch '2022-04-11-add-OP-TEE-rng'
- Add support for OP-TEE providing an RNG to use, and enable on some
  stm32mp15 configurations.
2022-04-11 10:46:16 -04:00
Patrick Delaunay
4ec168a61b configs: add support of OPTEE RNG in stm32mp15 defconfig
When the RNG device is secured with OP-TEE, it is only accessible with
the HWRNG TA, the CONFIG_RNG_OPTEE is needed for STM32MP15 targets
with OP-TEE support.

The probe of this RNG driver fails when the TA is not available in OP-TEE
and the previous driver can be used, as CONFIG_RNG_STM32MP1 is activated
and when the associated node is activated in the device tree with:

&rng1 {
	status = "okay";
};

When the RNG is used in OP-TEE, this node should be deactivated in
the Linux and U-Boot device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-04-11 10:28:04 -04:00
Patrick Delaunay
70812bb83d tee: optee: bind rng optee driver
In U-Boot, the discovery of TA based on its UUID on the TEE bus is
not supported.

This patch only binds the driver associated to the new supported
OP-TEE TA = TA_HWRNG when this driver is enable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-04-11 10:28:04 -04:00
Patrick Delaunay
fd52e7f9c7 rng: add OP-TEE based Random Number Generator
Add driver for OP-TEE based Random Number Generator on ARM SoCs
where hardware entropy sources are not accessible to normal world
and the RNG service is provided by a HWRNG Trusted Application (TA).

This driver is based on the linux driver: char/hw_random/optee-rng.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-04-11 10:28:04 -04:00
Tom Rini
c45d38d651 Merge branch '2022-04-11-initial-valgrind-support'
To quote the author:
This series adds support for running valgrind against U-Boot's internal
malloc. This allows for much more useful reports to be generated.

Some example output of valgrind run against u-boot/master with this
branch applied may be found at [1]. Note that valgrind gives up around
acpi.  This feature still needs a lot of work on suppressions/hints to
filter out the noise properly.

[1] 2a2f99108e/gistfile1.txt
2022-04-11 10:15:06 -04:00
Sean Anderson
02fc867810 doc: sandbox: Document how to run sandbox with valgrind
This documents how to get more detailed results from valgrind made possible
by the last two commits.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 10:00:30 -04:00
Sean Anderson
bdaeea1b68 malloc: Annotate allocator for valgrind
This annotates malloc and friends so that valgrind can track the heap. To
do this, we need to follow a few rules:

* Call VALGRIND_MALLOCLIKE_BLOCK whenever we malloc something
* Call VALGRIND_FREELIKE_BLOCK whenever we free something (generally after
  we have done our bookkeeping)
* Call VALGRIND_RESIZEINPLACE_BLOCK whenever we change the size of an
  allocation. We don't record the original request size of a block, and
  neither does valgrind. For this reason, we pretend that the old size of
  the allocation was for 0 bytes. This marks the whole allocaton as
  undefined, so in order to mark all bits correctly, we must make the whole
  new allocation defined with VALGRIND_MAKE_MEM_DEFINED. This may cause us
  to miss some invalid reads, but there is no way to detect these without
  recording the original size of the allocation.

In addition to the above, dlmalloc itself tends to make a lot of accesses
which we know are safe, but which would be unsafe outside of dlmalloc. For
this reason, we provide a suppression file which ignores errors ocurring in
dlmalloc.c

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 10:00:30 -04:00
Sean Anderson
fba0882bcd Add valgrind headers to U-Boot
Valgrind uses magic code sequences to define an ABI that the client may use
to request behavior from the host. In particular, this may be used to
inform valgrind about custom allocators, such as the one used in U-Boot.

This adds headers defining these sequences to U-Boot. It also adds a config
option to disable emission of these sequences entirely, in the (likely)
event that the user does not wish to use valgrind. Note that this option is
called NVALGRIND upstream, but was renamed (and inverted) to
CONFIG_VALGRIND. Aside from this and the conversion of a few instances of
VALGRIND_DO_CLIENT_REQUEST_EXPR to STMT, these headers are unmodified.

These headers were copied from valgrind 3.16.1-4 as distributed in Arch
Linux. They are licensed with the bzip2 1.16 license. This appears to be a
BSD license with some clauses from Zlib.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-11 10:00:30 -04:00
Peng Fan
b598957206 Kconfig: Fix SYS_MALLOC_F_LEN for i.MX8MQ
i.MX8MQ use SYS_MALLOC_F_LEN 0x2000, not 0x10000. The OCRAM_S only has
32KB memory, use 0x10000 will make SPL not bootable.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-11 08:27:20 -04:00
Tom Rini
33ae8c5beb Merge tag 'efi-2022-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc1

Documentation:

* Describe how enable DM_SERIAL for a board

UEFI

* Preparatory patches for better integration of DM and UEFI
* Use sysreset after capsule updates instead of do_reset
* Allow to disable persisting non-volatile variables
2022-04-10 11:21:39 -04:00
Marek Vasut
5c7399ec90 Revert "env: Load env when ENV_IS_NOWHERE is only location selected"
This reverts commit 8d61237edb.

This commit broke environment on literally every board I have access
to, with this revert in place, environment works as it should again.
The problem I observe with this patch is that saved environment in
either SPI NOR or eMMC is never used, the system always falls back
to default environment. The 'saveenv' command does succeed, but then
after reset, the default env is again used.

Furthermore, the commit introduced duplicate code in env_init(), this:
"
	if (!prio) {
		gd->env_addr = (ulong)&default_environment[0];
		gd->env_valid = ENV_INVALID;

		return 0;
	}

	if (ret == -ENOENT) {
		gd->env_addr = (ulong)&default_environment[0];
		gd->env_valid = ENV_INVALID;

		return 0;
	}
"

Furthermore, the commit is missing DCO SoB line.

Also note that upstream does not support UltraZed EG board, so
this might have been a patch pulled from downstream which did
depend on some other downstream behavior.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Felix.Vietmeyer@jila.colorado.edu <felix.vietmeyer@jila.colorado.edu>
Cc: Tom Rini <trini@konsulko.com>
2022-04-10 11:20:16 -04:00
Tom Rini
22b7d140fa Merge branch '2022-04-08-gpio-updates'
- Add PCA957X GPIO support, enable GPIO hogging in SPL, add
  gpio_request_by_line_name() for later use and add some pytests for
  'gpio'
2022-04-10 11:19:14 -04:00
Nate Drude
d79f1a8569 phy: adin: add driver for Analog Devices ADIN1300 PHY
The current implementation configures RGMII using device tree phy-mode
property and then calls genphy_config

adin_config_rgmii_mode is derived from:
https://github.com/varigit/linux-imx/blob/lf-5.10.y_var04/drivers/net/phy/adin.c#L218-L262

Signed-off-by: Nate Drude <nate.d@variscite.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Tim Harvey
f3409d7ae6 net: eth-phy: prevent undesired de-assertion of phy-reset on request
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before eth_phy_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.

Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.

Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Tim Harvey
4223fb0ee1 net: fec: prevent undesired de-assertion of phy-reset on request
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before fec_gpio_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.

Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.

Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Marek Behún
e24b58f5ed net: phy: don't require PHY interface mode during PHY creation
Currently we require PHY interface mode to be known when
finding/creating the PHY - the functions
  * phy_connect_phy_id()
  * phy_device_create()
  * create_phy_by_mask()
  * search_for_existing_phy()
  * get_phy_device_by_mask()
  * phy_find_by_mask()
all require the interface parameter, but the only thing done with it is
that it is assigned to phydev->interface.

This makes it impossible to find a PHY device without overwriting the
set mode.

Since the interface mode is not used during .probe() and should be used
at first in .config(), drop the interface parameter from these
functions. Make the default value of phydev->interface (in
phy_device_create()) to be PHY_INTERFACE_MODE_NA. Move the interface
parameter to phy_connect_dev(), where it should be.

Change all occurrences treewide. In occurrences where we don't call
phy_connect_dev() for some reason (they only configure the PHY without
connecting it to an ethernet controller), set
  phydev->interface = value from phy_find_by_mask call.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:13 +03:00
Marek Behún
b638814e91 bcmgenet, sun8i_emac: Don't connect PHY two times
The bcmgenet and sun8i_emac drivers call phy_connect(), which finds /
creates the PHY and also connects it to the eth device via
phy_connect_dev(), then set some phydev members (bcmgenet only), and
then call phy_connect_dev() explicitly again.

Drop the second phy_connect_dev(), since it is unnecesary.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Marek Behún
79bef5fb1f net: phy: use ->is_c45 instead of is_10g_interface()
Use phydev->is_c45 instead of is_10g_interface(phydev->interface) to
determine whether clause 45 protocol should be used.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Marek Behún
f961b3abf8 net: phy: xilinx: Check interface type in ->config(), not ->probe()
We want to be able to have phydev->interface uninitialized during
->probe(). We should assume that phydev->interface is initialized only
before ->config().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Marek Behún
c677fb1e31 phy: Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition
Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition to
make it have zero value. This makes it possible (although not
encouraged) to test for invalid/nonexistent interface mode with !val
instead of val == PHY_INTERFACE_MODE_NA.

The comment near the definition says "Must be last", because when the
constant was introduced in commit 5f184715ec ("Create PHY Lib for
U-Boot"), it was used as the maximum value when interating over the
constants. But this is no longer true - we use PHY_INTERFACE_MODE_MAX
for that now, and so we can move it.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:13 +03:00
Marek Behún
ffb0f6f488 treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make
it compatible with Linux' naming.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:13 +03:00
Marek Behún
6706d7dcbe treewide: Rename PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX
Rename constant PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX to
make it compatible with Linux' naming.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:13 +03:00
Marek Behún
123ca114e0 net: introduce helpers to get PHY interface mode from a device/ofnode
Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the
"phy-mode" / "phy-connection-type" property. Add corresponding UT test.

Use them treewide.

This allows us to inline the phy_get_interface_by_name() into
ofnode_read_phy_mode(), since the former is not used anymore.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-10 08:44:12 +03:00
Marek Behún
9c06b4815c net: phy: fix parsing wrong property
The "phy-interface-type" property should be "phy-connection-type".

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:12 +03:00
Marek Behún
1776a24bbb treewide: use dm_mdio_read/write/reset() wrappers
Use the new dm_mdio_read/write/reset() wrappers treewide, instead of
always getting and dereferencing MDIO operations structure pointer.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:12 +03:00
Marek Behún
351bfa6ebd net: mdio-uclass: add wrappers for read/write/reset operations
Add wrappers dm_mdio_read(), dm_mdio_write() and dm_mdio_reset() for
DM MDIO's .read(), .write() and .reset() operations.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:12 +03:00
Marek Behún
f3dd213e15 net: introduce helpers to get PHY ofnode from MAC
Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in
net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add
corresponding UT test.

This is useful because other part's of U-Boot may want to get PHY ofnode
without connecting a PHY.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-10 08:44:12 +03:00
Marek Behún
a7a96ef812 net: mdio-uclass: use ARRAY_SIZE()
Use the ARRAY_SIZE() macro instead of hardcoding sizes of arrays in
macros.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:12 +03:00
Marek Behún
6fb4482ea2 net: mdio-uclass: fix type for phy_mode_str and phy_handle_str
These global variables should both have type
  static const char * const

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:12 +03:00
Haolin Li
e2b6cf5cad net: phy: dp83867: Fix a never true comparison
The type of the return value of phy_read() and phy_read_mmd() is int.
Change the variable to not be unsigned so that we not get into an
unsigned compared against 0.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:12 +03:00
Vladimir Oltean
5faf161d07 net: phy: atheros: avoid error in ar803x_of_init() when PHY has no OF node
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:

pfe_eth_probe
-> pfe_phy_configure
   -> phy_connect

When this happens, the PHY will have an invalid OF node.

When ar803x_config() runs, it silently fails at ar803x_of_init(), and
therefore, fails to run the rest of the initialization.

This makes MII_BMCR contain what it had after BMCR_RESET (0x8000) has
been written into it by phy_reset(). Since BMCR_RESET is volatile and
self-clearing, the MII_BMCR ends up having a value of 0x0. The further
configuration of this register, which is supposed to be handled by
genphy_config_aneg() lower in ar803x_config(), never gets a chance to
run due to this early error from ar803x_of_init().

As a result of having MII_BMCR as 0, the following symptom appears:

=> setenv ethact pfe_eth0
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
pfe_eth0 Waiting for PHY auto negotiation to complete......... TIMEOUT !
Could not initialize PHY pfe_eth0

Manually writing 0x1140 into register 0 of the PHY makes the connection
work, but it is rather desirable that the port works without any manual
intervention.

Fixes: fe6293a809 ("phy: atheros: add device tree bindings and config")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:12 +03:00
Vladimir Oltean
107b14e36e net: phy: dp83867: avoid error in dp83867_of_init() when PHY has no OF node
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:

pfe_eth_probe
-> pfe_phy_configure
   -> phy_connect

When this happens, the PHY will have an invalid OF node.

The dp83867_config() method has extra initialization steps which are
bypassed when the PHY lacks an OF node, which is undesirable because it
will lead to broken networking. Allow the rest of the code to run.

Fixes: 085445ca41 ("net: phy: ti: Allow the driver to be more configurable")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-10 08:44:12 +03:00
AKASHI Takahiro
6b7a6210fd dm: add tag support
With dm-tag feature, any U-Boot subsystem is allowed to associate
arbitrary number of data with a particular udevice. This can been
see as expanding "struct udevice" without modifying the definition.

As a first user, UEFI subsystem makes use of tags to associate
an efi_disk object with a block device.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
75a9d75041 virtio: call device_probe() in scanning
virtio_init() enumerates all the peripherals that are to be materialised
with udevices(UCLASS_VIRIO) and creates particular device instances
(UCLASS_BlK or whatever else) as children.
On the other hand, device_probe() won't be invoked against those resultant
udevices unlike other ordinary device drivers do in the driver model.

This is particularly inconvenient when we want to add "event notification"
callback so that we will be able to automatically create all efi_disk
objects in a later patch.

With this patch applied, "virtio scan" will work in a similar way
to "scsi rescan", "usb start" or others in term of 'probe' semantics.

I didn't add this change to virtio_init() itself because this function
may be called in board_init_r() (indirectly in board_late_init())
before UEFI subsustem is initialized.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
4c73b03442 block: ide: call device_probe() after scanning
Every time an ide bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
c662edd6de sata: call device_probe() after scanning
Every time a sata bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
df1ed8b2a8 nvme: call device_probe() after scanning
Every time a nvme bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
c822c1a50b mmc: call device_probe() after scanning
Every time a mmc bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
8c9812a5d5 usb: storage: call device_probe() after scanning
Every time a usb bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
AKASHI Takahiro
ae518bd880 scsi: call device_probe() after scanning
Every time a scsi bus/port is scanned and a new block device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.

In particular, support for creating partitions on a device will be added.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
Masami Hiramatsu
7660cfee0f efi_loader: Use sysreset instead of reset command
Use sysreset_walk_halt() directly from reset-after-capsule-on-disk
feature to reboot (cold reset) machine instead of using reset command
interface, since this is not a command.
Note that this will make CONFIG_EFI_CAPSULE_ON_DISK depending on
the CONFIG_SYSRESET.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-09 21:06:31 +02:00
Masami Hiramatsu
39bdf11580 efi_loader: Make efi_load_capsule_drivers() available even if EFI_CAPSULE_ON_DISK=n
Make efi_load_capsule_drivers() available even if EFI_CAPSULE_ON_DISK
is disabled because the caller (efi_init_obj_list()) expects it only
relays on EFI_HAVE_CAPSULE_SUPPORT.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-09 21:06:31 +02:00
Masami Hiramatsu
4cd1fca361 cmd: efidebug: Disable 'capsule disk-update' when CONFIG_EFI_CAPSULE_ON_DISK=n
Disable 'capsule disk-update' option for the efidebug command
when CONFIC_EFI_CAPSULE_ON_DISK is disabled, because this option
is available only when the EFI capsule update on disk is enabled.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-04-09 21:06:31 +02:00
Tom Saeger
f2288a26ab efi_loader: optional persistence of variables
Since be66b89da3 ("efi_loader: configuration of variables store")
the choice of EFI_VARIABLE_FILE_STORE or EFI_MM_COMM_TEE
is mutually-exclusive, however efi_var_to_file also allows
for "neither". Provide an additional Kconfig option.

Signed-off-by: Tom Saeger <tom.saeger@oracle.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-09 21:06:31 +02:00
Pali Rohár
2f5c9ad3f4 doc: distro: Update list of all support boot types
Add HOST, UBIFS.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-09 21:06:31 +02:00
Heinrich Schuchardt
16736c2312 doc: debug UART for RISC-V QEMU virt machine
Provide settings for enabling the debug UART of the virt machine on
RISC-V QEMU.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-09 21:06:31 +02:00
Heinrich Schuchardt
56bc239db2 doc: correct bootefi.rst
* add link to booti man-page
* correct link description for efidebug command
* correct punctuation

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-09 21:06:31 +02:00
Simon Glass
67ae5d3d46 dm: Add docs to explain how to enable DM_SERIAL for a board
This is an attempt to cover the common cases found when enabling driver
model for serial on a new board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-09 21:06:31 +02:00
Luca Ellero
c170fe0a77 gpio: pca953x_gpio: add PCA957X support
Take as reference Linux kernel code:
	drivers/gpio/gpio-pca953x.c

Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-08 22:51:48 -04:00
Eddie James
1d99e673c7 gpio: Enable hogging support in SPL
Use the CONFIG macros to conditionally build the GPIO hogging support in
either the SPL or U-Boot, or both, depending on the configuration. Also
call the GPIO hog probe function in the common SPL board initialization
as an equivalent to adding it to the U-Boot init sequence functions.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-08 22:51:48 -04:00
Andrew Jeffery
34be6968c3 gpio: Add gpio_request_by_line_name()
Add support for the upstream gpio-line-names property already described
in the common GPIO binding document[1]. The ability to search for a line
name allows boards to lift the implementation of common GPIO behaviours
away from specific line indexes on a GPIO controller.

[1] 3c35bfee83/dtschema/schemas/gpio/gpio.yaml (L17)

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-04-08 15:17:23 -04:00
Adarsh Babu Kalepalli
965b989fb6 test/py:Update python tests for ‘gpio’ cmd
Generic Python Test cases are developed to verfiy 'gpio' command.

Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com>
2022-04-08 15:17:23 -04:00
Tom Rini
d46e86d25c configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 13:36:51 -04:00
Tom Rini
909d2120e2 Merge branch '2022-04-08-Kconfig-updates-and-dead-code-removal'
- Migration of more symbols from board config.h files to defconfig
- Remove unused network drivers
2022-04-08 13:33:14 -04:00
Tom Rini
2fc0995cc0 arm: Remove unused ep93xx code
There are no platforms for this architecture anymore, remove unused
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
9035caf080 net: Remove uli526x driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
0467b3b3ae net: Remove ns8382x driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
4c5469645d net: Remove natsemi driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
9bd2ab4b39 net: Remove lan91c96 driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
2e808fadf6 net: Remove ftmac110 driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
acae10dc3e net: Remove dnet driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
f693a921a3 net: Remove cs8900 driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
122126adbd net: Remove ax88180 driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
53b666b76f net: Remove armada100_fec driver
This driver is not enabled by any board and not converted to DM_ETH.
Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
6751b70055 arm: fsl-layerscape: Migrate more DP-DDR options to Kconfig
Based on current usage, migrate a number of DP-DDR related options to
Kconfig.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
001a56b008 siemens-am33x-common: Drop CONFIG_DMA_COHERENT*
These values are not used in the code, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
d9180c3035 m53menlo: Drop CONFIG_DISCOVER_PHY
This is not used in code, drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
d43cd486ee Convert CONFIG_FSL_QIXIS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_QIXIS
   CONFIG_QIXIS_I2C_ACCESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
388de0fa8b Convert CONFIG_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig:
   CONFIG_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
bef12ea4a3 galileo: Remove CONFIG_DESIGNWARE_ETH reference
This platform has CONFIG_ETH_DESIGNWARE set already, which is the
correct value for the driver in question.  Remove this incorrect line.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
1d2893d191 powerpc: mpc83xx: Migrate DEFAULT_IMMR to Kconfig
As no platforms override this value, set it for all mpc83xx platforms.

Cc: Mario Six <mario.six@gdsys.cc>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
4681e80536 nds32: Migrate CONFIG_DEBUG_LED to Kconfig
Move this value to the board Kconfig file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
89e9625fc7 ls1021atwr: Use DEBUG and not CONFIG_DEBUG
We use 'DEBUG' and not 'CONFIG_DEBUG' tree-wide for debug code that is
left in, and not wrapped by some other regular debugging type print
macro.

Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
f83f0cb4c7 microblaze: Migrate DCACHE/ICACHE to Kconfig
Move these two options to the arch Kconfig file.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2022-04-08 10:46:22 -04:00
Tom Rini
6c3c05f6a4 tegra: Drop CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
This is not currently set by any boards, so drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
53dbf1160d controlcenterdc: Migrate CUSTOMER_BOARD_SUPPORT to Kconfig
This symbol is only possibly useful on some mvebu platforms, so move the
symbol there and select it for the only current user.

Cc: Mario Six <mario.six@gdsys.cc>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-08 10:46:22 -04:00
Tom Rini
55b3ba4c2b spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig
This is a little tricky since SoCFPGA has code to determine this as
runtime.  Introduce a guard variable for platforms to select if they
have a static value to use.  Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.

Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
5d14c336b2 Convert CONFIG_SH_SCIF_CLK_FREQ to Kconfig
This converts the following to Kconfig:
   CONFIG_SH_SCIF_CLK_FREQ

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:06:46 -04:00
Tom Rini
f9f3209a34 Convert CONFIG_CONS_SCIF0 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_CONS_SCIF0
   CONFIG_CONS_SCIF1
   CONFIG_CONS_SCIF2
   CONFIG_CONS_SCIF4
   CONFIG_CONS_SCIFA0

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:06:28 -04:00
Tom Rini
8c3e231b8f at91: Remove unused LED code
These LED files (and CONFIG values) are unused today, remove the code in
question.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:20 -04:00
Tom Rini
a62acac12a stm32f429-discovery: Migrate CONFIG_*_LED out of CONFIG namespace
These values are only used in one file, reference them more directly.

Cc: Kamil Lulko <kamil.lulko@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-04-08 09:05:20 -04:00
Tom Rini
e0f0f1836b corvus: Migrate CONFIG_*_LED out of CONFIG namespace
This code is only used on the corvus platform, so migrate the LED on/off
code to this platform and remove it from the CONFIG namespace.  In
theory, this should likely be moved to the modern GPIO LED driver as a
further cleanup.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-04-08 09:05:20 -04:00
Tom Rini
8ab7647297 MPC837XERDB: Stop using CONFIG_RAMDISKFILE
We don't really configure this, just set it directly in the environment
section.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:20 -04:00
Tom Rini
428eb2e26f s5p_goni, smdkc100: Move some environment settings out of CONFIG
A number of CONFIG options are used on these platforms as part of the
default environment.  Set some of these more directly and in other
cases, just reference them directly.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:19 -04:00
Tom Rini
f01928e232 arm: integrator: Migrate platform-specific options and cleanup armcoremodule.h
This converts the following to Kconfig:
   CONFIG_CM_INIT
   CONFIG_CM_REMAP
   CONFIG_CM_SPD_DETECT
   CONFIG_CM_MULTIPLE_SSRAM
   CONFIG_CM_TCRAM

We make the first three of these options be always enabled, as that
matches usage.  We select the last two based on how they were defined in
armcoremodule.h.  This also allows us to remove some unused code in
board/armltd/integrator/lowlevel_init.S

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:19 -04:00
Tom Rini
dafcd96d8a Convert CONFIG_CMDLINE_PS_SUPPORT to Kconfig
This converts the following to Kconfig:
   CONFIG_CMDLINE_PS_SUPPORT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:19 -04:00
Tom Rini
bd3ef27886 tegra: Migrate CI_UDC_HAS_HOSTPC to Kconfig
This option is only enabled for CI_UDC and !TEGRA20, so implement it as
such in Kconfig directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2022-04-08 09:05:19 -04:00
Tom Rini
4e4fff7d93 mvebu: Move BOOTROM_ERR_REG out of CONFIG namespace
This register is referenced in one location and does not seem
configurable, so remove it from CONFIG namespace.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-08 09:05:19 -04:00
Tom Rini
95b641756c Convert CONFIG_BOARD_SIZE_LIMIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_SIZE_LIMIT

To do this, introduce CONFIG_HAS_BOARD_SIZE_LIMIT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 09:05:19 -04:00
Tom Rini
03a8a797e5 Merge branch '2022-04-08-env-updates'
- Assorted env tooling updates
- Bug fix around multiple possible env locations and ENV_IS_NOWHERE
- Add 'indirect' sub-command to env
- Allow for FAT env to have the location overridden by the board code.
2022-04-08 08:27:50 -04:00
Simon Glass
6910dbe341 env: Allow text-env tests to run with awk
At present the tests assume that gawk is being used. Adjust the tests so
that the names are inserted in alphabetical order, so that awk is happy.

Also use PROCINFO to make gawk output in alphabetical order. This is not
ideal, since it changes the env-car ordering from what the user provided,
but it may be acceptable.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/10
2022-04-07 16:50:53 -04:00
Simon Glass
754a722d1b env: Drop the unncessary protocol mention in autoload
Drop this text at the end since it already mentions bootp and dhcp.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-04-07 16:50:53 -04:00
Simon Glass
9d4e88c021 env: Move the doc comment to the code
This doesn't really make much sense in the documentation. Add a code
comment instead.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-07 16:50:53 -04:00
Christoph Niedermaier
cc5a490cf4 Makefile: Sort u-boot-initial-env output
This will sort the default environment file generated by
"make u-boot-initial-env", but won't sort the default
environment in the compiled u-boot binary. The file
u-boot-initial-env is considered to use for the userpace
environment access tools [1] in case of that the
environments is written the first time into its location.
This is done on the one hand for a better overview and
comparison of the generated environment file. On the other
hand it is to synchronize the output with the script
get_default_env.sh, which generated a sorted default
environment file. The sorting preserves the order of equal
variable names by sorting only the variable name, and
disable the last-resort comparison. After sorting,
unnoticed blank lines at the end move to the top. Avoid
that by removing it before sorting.

[1] https://github.com/sbabic/libubootenv

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Behún <marek.behun@nic.cz>
To: u-boot@lists.denx.de
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-07 16:50:53 -04:00
Christoph Niedermaier
7d79cba28c scripts/get_default_envs.sh: Remove blank lines
After sorting, unnoticed blank lines at the end move to the top.
Avoid this by removing it before sorting.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
2022-04-07 16:50:53 -04:00
He Yong
eb68ead2d3 env: fat: Allow overriding interface, device and partition
For platform which can boot on different device, this allows
to override interface, device and partition from board code

Signed-off-by: He Yong <hyyoxhk@163.com>
2022-04-07 16:50:53 -04:00
Samuel Dionne-Riel
ec57bd7454 cmd: env: Add indirect to indirectly set values
This allows an ergonomic-enough approximation of ${!variable} expansion.
This could be used the following way:

```
for target in ${boot_targets}; do
   env indirect target_name target_name_${target}
   # ...
done
```

Assuming `target_name_mmc0` and similar are set appropriately.

A default value can be optionally provided.

Note: this acts on environment variables, not hush variables.

Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Marek Behún" <marek.behun@nic.cz>
[trini: Don't enable by default]
2022-04-07 16:50:42 -04:00
Felix.Vietmeyer@jila.colorado.edu
8d61237edb env: Load env when ENV_IS_NOWHERE is only location selected
This patch prevent u-boot from hanging on a UltraZed EG board (zynqmp).

Without the patch,
(drv = env_driver_lookup(ENVOP_INIT, prio))
evaluates to 0, causing prio = 0
Then, (!prio) is hit, returning -ENODEV causing a stall.

With the patch,
instead of returning -ENODEV and causing a stall, we
set gd->env_addr (is this really needed?)
and then
mark gd->env_valid = ENV_INVALID to use the default env.
2022-04-07 13:52:36 -04:00
Fabio Estevam
545eceb520 imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default
When adding new features to imx8m boards, such as DM clock support,
the malloc area can be exhausted.

To avoid such issue, provide a reasonable default for the
SYS_MALLOC_F_LEN size.

Quoting Tom Rini:

"This seems to be an area where everyone is either:
- Kicking the value up a bit for themselves
- Having hard to figure out problems booting the platform because it's
  too small a value until they see someone else picked a larger value.

So lets raise these a bit and get some acks, please."

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon, imx8mn-beacon
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-04-07 10:21:22 -04:00
Tom Rini
f75e5164c6 Merge branch '2022-04-06-various-verified-boot-bugfixes'
To quote the author:

This series collects together various misc patches that were needed when
building mainline U-Boot against Chromium OS verified boot. Most of them
fix minor bugs.
2022-04-07 09:49:27 -04:00
Simon Glass
49e8668181 dm: blk: Expand iteration and add tests
Add some functions which support iteration before probing. Also add tests
for the functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
e86b6f7100 dm: core: Tidy up comments in uclass headers
Improve some of the comments in these files, which don't follow the
correct style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
bb36b9a7d6 dm: core: Add a required struct declaration
This file uses struct driver, so declare it at the top in case the
header-inclusion order is not as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
09bc3d2eac stdint: Add a definition of UINT8_MAX
This is normally defined in stdint.h but is not used in U-Boot. When
libraries (such as Chromium OS vboot) are built against U-Boot they may
expect this value to be available. Add it to avoid build errors in this
case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
b7463f198d Make ASYMMETRIC_KEY_TYPE depend on FIT_SIGNATURE
Add this dependency to avoid a build error if FIT_SIGNATURE is not
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
8e6c129931 Add a default for TPL_TEXT_BASE
If this value is not provided it causes a hang in the build. Add a default
value to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
a42d2caa63 disk: Correct the conditions for SPL
These filesystems may have different settings for SPL and TPL. Use the
correct Makefile variable to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:03:17 -04:00
Simon Glass
564e532eea spi: Avoid checking console in SPL
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
a50b561333 cros_ec: Complete the comment for cros_ec_read_batt_charge()
Add the missing 'Return' information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
9dc29742c5 cbfs: Add some more definititions
Add definitions for a payload or 'self', which is like an unpacked ELF
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
ccfc9d7841 lzma: Tidy up the function prototype
This should use a const pointer for the input stream. Fix this and also
add a proper comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
423cf0acda fdt: sandbox: Avoid looking for an appended device tree
We don't use an appended tree for sandbox and the required symbols are
not present. Add a condition to avoid a build error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
690af71850 fdt: Correct condition for SEPARATE_BSS
This may have different settings for SPL and TPL. Correct the condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
99aca9efe1 abuf: Correct a corner case with abuf_realloc()
If the buffer is empty and not allocated, then abuf_realloc() tries to
copy invalid data. This happens because an incorrect change to use
memdup() was added after the original code was written.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
64aefc4800 errno: Avoid including strings in SPL
At present the header file defines this function in SPL but the file may
not actually be built. This causes a build error if the option is enabled.

Fix the condition in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Simon Glass
3390948c0f binman: Correct Chromium OS entry types
The conversion to bintools broke the invocation of the utility, since
the arguments are not correct. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-06 14:01:42 -04:00
Tom Rini
78df2146d2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-04-06 11:52:17 -04:00
Tom Rini
88b6b33253 Merge branch '2022-04-06-assorted-updates'
- Add DM_PMIC support to TPS65217 and migrate some platforms to it.
- mkimage verification fixes
- DM rST fix, add missing flag when linking u-boot-elf.o
2022-04-06 11:51:00 -04:00
Heinrich Schuchardt
d23f290840 dm: fix function documentation in include/dm/ofnode.h
We use Sphinx style comments to describe functions.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:21:49 -04:00
Pali Rohár
d3b1ca21e2 tools: mkimage: Call verify_header after writing image to disk
If image backend provides verify_header callback then call it after writing
image to disk. This ensures that written image is correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-06 09:21:49 -04:00
Yi Liu
3548903fc8 tools: mkimage: No need to verify_header for header_v2
rockchip header_v2 do not have a spl_hdr, so remove the verify.

Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-06 09:21:49 -04:00
Du Huanpeng
21d3e3d107 Makefile: add endian link flag to u-boot-elf.o
fix compile error when using a little-endian to build with configs:
	sfr_nb4-ser_ram_defconfig
	comtrend_wap5813n_ram_defconfig
	comtrend_ar5387un_ram_defconfig
	comtrend_ct5361_ram_defconfig
	comtrend_vr3032u_ram_defconfig
	comtrend_ar5315u_ram_defconfig
	huawei_hg556a_ram_defconfig
	netgear_dgnd3700v2_ram_defconfig

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2022-04-06 09:21:49 -04:00
Heinrich Schuchardt
776e8aca0b riscv: alloc space exhausted
When trying to run qemu-riscv64_smode_defconfig with 32 harts booting
fails. The debug UART shows a message

    alloc space exhausted

32 is the current maximum number of harts for machine virt in QEMU 7.0.

Raise the default for SYS_MALLOC_F_LEN to 16 KiB.

Move the setting to /Kconfig where we define SYS_MALLOC_F_LEN for
other architectures too.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-04-06 10:58:13 +08:00
Heinrich Schuchardt
22e324c638 riscv: enable CONFIG_CMD_SBI for QEMU boards
Let CONFIG_TARGET_QEMU_VIRT imply CONFIG_CMD_SBI.

The sbi command provides detailed information about the SBI.
It is useful to test the discovery of extensions.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
cfb31e0b9e cmd/sbi: add missing SBI information
Let the sbi command display:

* machine vendor ID
* machine architecture ID
* machine implementation ID

With this patch the output for the HiFive Unmatched looks like

    => sbi
    SBI 0.3
    OpenSBI 0.9
    Machine:
      Vendor ID 489
      Architecture ID 8000000000000007
      Implementation ID 20181004
    Extensions:
      sbi_set_timer
      sbi_console_putchar
      sbi_console_getchar
      sbi_clear_ipi
      sbi_send_ipi
      sbi_remote_fence_i
      sbi_remote_sfence_vma
      sbi_remote_sfence_vma_asid
      sbi_shutdown
      SBI Base Functionality
      Timer Extension
      IPI Extension
      RFENCE Extension
      Hart State Management Extension
      System Reset Extension

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
ca7e93fa9f riscv: provide missing base extension functions
Provide library functions to read:

* machine vendor ID
* machine architecture ID
* machine implementation ID

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-04-06 09:40:05 +08:00
Heinrich Schuchardt
70ae54bd25 cmd: sbi: add Performance Monitoring Unit Extension
Version 1.0-rc3 of the RISC-V Supervisor Binary Interface Specification
has added the Performance Monitoring Unit Extension.

The sbi command should be able to detect it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-06 09:40:05 +08:00
Lukasz Majewski
e8cb4e78c7 power: pmic: Provide DM_PMIC support for tps65217 driver
The tps65217 PMIC driver is used with am335x SoC based designs.

It is used in the SPL (MLO) as well, so the DM conversion only is
for u-boot proper.

This driver only allows simple reading/writing/dumping of the content
of its registers and requires the DM_I2C for proper operation.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-05 15:51:52 -04:00
Lukasz Majewski
1610b68ea3 power: Rename CONFIG_POWER_TPS65217 with CONFIG_PMIC_TPS65217
Up till now the CONFIG_POWER_TPS65217 has been defined in several header
files for am335x SoC.

This patch renames it to CONFIG_PMIC_TPS65217, which better reflects the
role of this IC circuit.

Moreover, new CONFIG_PMIC_TPS65217 has been introduced in Kconfig
to be used with boards, which both support DM_PMIC and DM_I2C.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Migrate all other platforms as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-05 15:51:46 -04:00
Tom Rini
59bffec43a Merge branch '2022-04-04-platform-updates'
- Updates for exynos78x0 and TI K3 platforms
2022-04-05 13:45:22 -04:00
Tom Rini
037ef53cf0 Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2

xilinx:
- Allow booting bigger kernels till 100MB

zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device

serial_zynq:
- Change fifo behavior in DEBUG mode

zynq_sdhci:
- Fix BASECLK setting calculation

clk_zynqmp:
- Add support for showing video clock

gpio:
- Update slg driver to handle DT flags

net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver

pwm:
- Add driver for cadence PWM

versal:
- Add support for reserved memory

firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations

include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
2022-04-05 11:27:39 -04:00
T Karthik Reddy
a7379ba650 net: zynq_gem: Add SGMII dynamic config support
Add support for SGMII dynamic configuration which will takes care of
configuring SGMII in the GEM secure (GEM_CLK_CTRL) configuration
register.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a8915186e44015959978d080a31de652f544cd4a.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
7011efce23 firmware: firmware-zynqmp: Add zynqmp_pm_set_gem_config api
Add zynqmp_pm_set_gem_config() api to configure GEM secure registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f69e32355c6a6be7d2780663353c52757530207d.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
e949e78948 gpio: slg7xl45106: Update gpio desc flags from DT
In current slg7xl45106 gpio driver xlate() function we are not updating
gpio flags from DT. Read the given flag from DT and update the gpio desc
flags variable with required gpio direction state.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a8d7b4799337bd99f61ace509889f02b192a9414.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
fc6e56283e net: zynq_gem: Move ethernet info print statement
As we are not reading the PHY address in case of CONFIG_ETH_PHY in plat
function, phy address always prints as -1. So move the ethernet info
print statement to probe function, to display proper phy address.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f6efc6719d767b1bebe65987c22c6d52329f4225.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
T Karthik Reddy
ccc8656f7f net: phy: Avoid phy gpio reset sequence if DM_ETH_PHY is enabled
If DM_ETH_PHY config is enabled PHY gpio reset is taken care by the
eth-phy-uclass driver, so use the PHY gpio reset functionality from
ethernet_id file when this config is disabled to reset the PHY.
Use debug() print instead of dev_err() to avoid warning incase if phy-id
compatible string is not present.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4d0fd3f9f886c1d943776025e5efb5438b0eb389.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
Michal Simek
801725395a net: zynq_gem: Use shared MDIO bus support for zynqmp
CONFIG_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/337b1a38ba36cde1951739af62fb3d2736d97f53.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
Michal Simek
d2f059c3dc dt-bindings: xilinx: Add missing ids for PD
There are some new power domain IDs which are used in Linux kernel that's
why add them here too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
2022-04-05 15:12:12 +02:00
Michal Simek
ad8d48e981 arm64: zynqmp: Record ID code for XCZU1EG device
Add ID code for 1eg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5b6c9f6a25bba076f304bc4699f6f676a929a683.1648619516.git.michal.simek@xilinx.com
2022-04-05 15:11:35 +02:00
T Karthik Reddy
9b529a972d net: phy: Fix rgmii-id phy reset timeout issue
While creating a phy device using phy_device_create(), we need to
provide a valid phyaddr instead of 0 causing phy address being
registered as 0 with mdio bus and shows mdio phy list as below

ZynqMP>  mdio list
eth0:
0 - TI DP83867 <--> ethernet@ff0b0000
eth1:
0 - TI DP83867 <--> ethernet@ff0c0000

Also PHY soft reset is being requested on 0 instead of valid
address causing "PHY reset timed out" error.

So add phyaddr argument to phy_connect_phy_id() and to its prototype
to create phy device with valid phyaddress.

Fixes: a744a284e3 ("net: phy: Add support for ethernet-phy-id with gpio reset")
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Link: https://lore.kernel.org/r/fe35fddb9faa5af577ffdfabaec6879c935a30f8.1648562755.git.michal.simek@xilinx.com
2022-04-05 15:10:54 +02:00
Michal Simek
6f735e4178 clk: zynqmp: Add support for for DP audio/video clocks
Add support for getting rate for DP audio and video clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8792efe1fd9715f7c8a2e1e24f0454fb5b25d833.1648552434.git.michal.simek@xilinx.com
2022-04-05 15:09:47 +02:00
Tom Rini
4de720e98d Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.

The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
2022-04-05 08:33:32 -04:00
Michal Simek
cf5ed341e4 xilinx: Increase max size of image from 60 to 100MB
Recently big Linux kernels can have more then 60MB that's why increase this
limit to also cover these large kernels.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f52f7c8ea419d69b248ba1460a96d1635194e128.1648551279.git.michal.simek@xilinx.com
2022-04-05 13:26:10 +02:00
Andre Przywara
69a0ea0078 sunxi: defconfig: enable eMMC boot partition support
Now that the SPL can safely detect whether it was loaded from an eMMC
boot partition or the normal user data partition, let's enable this
feature on some boards that feature eMMC storage.

That covers the boards where I could test this on, and allows the same
build to be written to an SD card, eMMC user partition, eMMC boot
partition, or into SPI NOR flash.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-05 00:08:46 +01:00
Andre Przywara
b9a2e18533 sunxi: eMMC: Improve automatic boot source detection
When the Allwinner BROM loads the SPL from an eMMC boot partition, it
sets the boot source byte to the same value as when booting from the
user data partition. This prevents us from determining the boot source
to load U-Boot proper from the proper partition for sure.

The generic SPL MMC code already looks at the enabled boot partition
number, to load U-Boot proper from the same partition, but this fails
if there is nothing bootable in this partition, as the BROM then
silently falls back to the user data partition, which the SPL misses.

To learn about the actual boot source anyway, we repeat the algorithm
the BROM used to select the boot partition in the first place:
- Test EXT_CSD[179] to check if an eMMC boot partition is enabled.
- Test EXT_CSD[177] to check for valid MMC interface settings.
- Check if BOOT_ACK is enabled.
- Check the beginning of the first sector for a valid eGON signature.
- Load the whole SPL.
- Recalculate the checksum to verify the SPL is valid.

If one of those steps fails, we bail out and continue loading from the
user data partition. Otherwise we load from the selected boot partition.

Since the boot source is needed twice in the boot process, we cache the
result of this test to avoid doing this costly test multiple times.

This allows the very same image file to be put onto an SD card, into the
eMMC user data partition or into the eMMC boot partition, and safely
loads the whole of U-Boot from there.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-05 00:08:40 +01:00
Christian Gmeiner
da61ee6625 ram: k3-am654: Make VTT regulator optional
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Dominic Rath
e4901e6591 ram: k3-am654: Write all configuration values
Makes it possible to use 16-bit DDR memory.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
ca1d803a47 configs: am64x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am64x_evm_a53_defconfig as this is needed
to calculate the size of DDR that is available.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
1a40ddffec arm: dts: k3-am64-ddr: Add ss_cfg reg entry
Add 'ss_cfg' memory region for memorycontroller node which is required
to enable ECC.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
7ffcff277d board: ti: am64x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize the available
amount of DDR if ECC is enabled.

A second fixup is required from A53 SPL to take the fixup as done from
R5 SPL and apply it to DT passed to A53 U-boot, which in turn passes
this to the OS.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
f861ce90ca ram: k3-ddrss: Introduce ECC Functionality for full memory space
Introduce ECC Functionality for full memory space as implemented in the
DDRSS. The following is done to accomplish this:

 * Introduce a memory region "ss" to allow dt to provide DDRSS region,
   which is not the same as "ctl" which is the controller region.

 * Introduce a "ti,ecc-enable" flag which allows a memorycontroller
   instance to enable ecc.

 * Introduce functionality to properly program the DDRSS registers to
   enable ECC for the full DDR memory space if enabled with above flag.

 * Expose a k3_ddrss_ddr_fdt_fixup call to allow fixup of fdt blob to
   account from DDR memory that must be reserved for ECC operation.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
71eb527476 ram: k3-ddrss: Rename ddrss_ss_regs to ddrss_ctl_regs
The current address being read from dt actually represents the ddrss_ctl
memory region, while ddrss_ss region is something else. Introduce
ddrss_ctl_regs and use it to free up ddrss_ss_regs for its proper
purpose later so that we can avoid confusion.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
7b8a96e57e dt-bindings: memory-controller: Add information about ECC bindings
Add DT binding documentation for enabling ECC in the DDR sub system present
on AM64 device.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
dffdb1f8eb board: ti: am64x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base and
fdtdec_setup_bank_size calls in dram_init and dram_bank_init to pull
these values from DT, where they are already available, instead of
hardcoding them.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Dave Gerlach
adbe138a90 arm: dts: k3-am642-r5-evm: Mark memory with u-boot, dm-spl
Mark the memory node with u-boot,dm-spl so we can use it from early SPL.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Vignesh Raghavendra
8d1acfd8de ARM: dts: k3-am642: Correct timer frequency
Timer0 runs at 200MHz,and the clock-frequency defined in DT is
incorrect. Fix it.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
2022-04-04 19:02:04 -04:00
Vignesh Raghavendra
1e20f57144 configs: am64x_evm_a53_defconfig: Switch to per-cpu timer as tick provider
On arm64 systems, recommendation is to use per-cpu timer for time
keeping. Currently AM64 ends up using DM timer as tick timer as driver
is enabled in the config. Drop OMAP DM Timer related configs, this will
switch to using armv8 per-cpu timer as tick timer for A53 SPL/U-Boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
2022-04-04 19:02:04 -04:00
Hari Nagalla
cf13851be9 configs: am64x_evm_r5_defconfig: Add support for ESM
Enable ESM driver for AM64x R5 SPL/u-boot builds.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Hari Nagalla
92e46092f2 arch: arm: mach-k3: am642_init: Probe ESM nodes
On AM64x devices, it is possible to route Main ESM0 error events to MCU
ESM. MCU ESM high error output can trigger the reset logic to reset the
device. So, for these devices we expect two ESM device nodes in the
device tree, one for Main ESM and the another MCU ESM in the device tree.
 When these ESM device nodes are properly configired it is possible to
route the Main RTI0 WWDT output to the MCU ESM high output through Main
ESM and trigger a device reset when
CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.

On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node
configurations.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Hari Nagalla
3d64cffa91 arm: dts: k3-am64: Add support for ESM device nodes
Enable access to ESM0 configuration space and add Main ESM0 and MCU ESM
nodes to the AM64 device tree.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Hari Nagalla
162a6f53a1 misc: k3_esm: Add functionality to set and route error events within K3SoC
Add functionality to enable, set priority to the input events and to
route to MCU ESM. On AM64x/AM62x devices, it is possible to route Main
ESM0 error events to MCU ESM. When these error events are routed to MCU
ESM high output, it can trigger the reset logic to reset the device,
when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.

K3 based J7 devices (ex: J721e) also have ESM modules, and the changes
to the driver does not impact those devices.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Dzmitry Sankouski
d5c4ec4aa3 board: axy17lte: get board usable - add bootcmd and docs
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`

In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration

What done:
- Rearrange defconfig option order
- Add CONFIG_SAVE_PREV_BL_* options
- Doc updates:
  - remove wrong SBOOT memory corruption note, because
  memory is changed during u-boot bringup process,
  not by SBOOT
  - put payload on ramdisk place in abl boot image
  creation step

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
2022-04-04 19:02:03 -04:00
Andre Przywara
5907357322 spl: mmc: extend spl_mmc_boot_mode() to take mmc argument
Platforms can overwrite the weak definition of spl_mmc_boot_mode() to
determine where to load U-Boot proper from.
For most of them this is a trivial decision based on Kconfig variables,
but it might be desirable the probe the actual device to answer this
question.

Pass the pointer to the mmc struct to that function, so implementations
can make use of that.

Compile-tested for all users changed.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ley Foon Tan <ley.foon.tan@inte.com> (for SoCFPGA)
Acked-by: Lokesh Vutla <lokeshvutla@ti.com> (for OMAP and K3)
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-04 23:24:17 +01:00
Jernej Skrabec
35b786c1ba sunxi: clock: H6: Adjust PLL LDO before clock setup
BSP boot0 adjust PLL LDO regulator before clocks are initialized.
Let's do that.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Jernej Skrabec
40a9c200af sunxi: clock: H6/H616: Add resistor calibration
BSP boot0 executes resistor calibration before clocks are initialized.
Let's do that.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Jernej Skrabec
1772771ac0 sunxi: prcm: Add a few registers
H6 and H616 SPL code has a few writes to unknown PRCM registers. Now
that we know what they are, let's replace magic offsets with proper
register names.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Angelo Dureghello
482c1ccd1c sunxi: H3: fix non working console on uart2
Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Baltazár Radics
fbc8acf644 Add ethernet0 alias in Nanopi NEO's device tree
This syncs the sun8i-h3-nanopi-neo.dts from the Linux tree, from tag
v5.18-rc1.
The alias is required to enable automatic MAC address generation.

Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
f5bfe15750 i2c: sun8i_rsb: Add support for DM clocks and resets
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.

This also has the added benefit of picking the right clock/reset
bits for H6 and new SoCs that have a rearranged PRCM MMIO space.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
c9dd3caae3 i2c: sun8i_rsb: Initialize chips in .child_pre_probe
Chips attached to the RSB bus require an initialization command before
they can be used. (Specifically, this command programs the chip's
runtime address.) The driver does this in its .probe_chip hook, under
the assumption that .probe_chip is called during child probe. This is
not the case; .probe_chip is only called by dm_i2c_probe, which is
intended for use by board-level code, not for chips with OF nodes.

Since this initialization command must be run before a child chip can be
used, do it before probing each child.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
07c411346c i2c: sun6i_p2wi: Add support for DM clocks and resets
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
48457f7ab0 i2c: sun6i_p2wi: Initialize chips in .child_pre_probe
Chips attached to the P2WI bus require an initialization command before
they can be used. (Specifically, this switches the chip from I2C mode
to P2WI mode.) The driver does this in its .probe_chip hook, under the
assumption that .probe_chip is called during child probe. This is not
the case; .probe_chip is only called by dm_i2c_probe, which is intended
for use by board-level code, not for chips with OF nodes.

Since this initialization command must be run before a child chip can be
used, do it before probing each child.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
a0ca51f70b sunxi: Support building a SPL as a TOC0 image
Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build. Since the absolute load address is stored in the
TOC0 header, that information must be passed to mkimage.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
44de13d945 sunxi: Support SPL in both eGON and TOC0 images
SPL uses the image header to detect the boot device and to find the
offset of the next U-Boot stage. Since this information is stored
differently in the eGON and TOC0 image headers, add code to find the
correct value based on the image type currently in use.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
e9e87ec47c tools: mkimage: Add Allwinner TOC0 support
Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
completely different image type, known as TOC0.

A TOC0 image is composed of a header and two or more items. One item
is the firmware binary. The others form a chain linking the firmware
signature to the root-of-trust public key (ROTPK), which has its hash
burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.

The pseudo-ASN.1 structure is manually assembled; this is done to work
around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
implementation has been verified to work with the A50, A64, H5, H6,
and H616 SBROMs, and it may work with other SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Icenowy Zheng
8c621f4c3b sunxi: specify architecture when generating SPL boot image
As mkimage -T sunxi_egon now gains support for -A parameter, specify the
architecture when generating SPL boot image for sunxi.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Icenowy Zheng
78ac2c0fd0 mkimage: sunxi_egon: add support for riscv
There's now a sun20i family in sunxi, which uses RISC-V CPU.

Add support for making eGON.BT0 image for RISC-V.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Icenowy Zheng
82ae151aee mkimage: sunxi_egon: refactor for multi-architecture support
Refactor some functions in mkimage sunxi_egon type, in order to prepare
for adding support for more CPU architectures (e.g. RISC-V). In
addition, compatibility for operation w/o specified architecture is
kept, in this case the architecture is assumed as ARM.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Icenowy Zheng
c2d08f0110 mkimage: add a flag to describe whether -A is specified
The sunxi_egon type used to take no -A argument (because we assume sunxi
targets are all ARM). However, as Allwinner D1 appears as the first
RISC-V sunxi target, we need to support -A; in addition, as external
projects rely on U-Boot mkimage to generate sunxi eGON.BT0 header, we
need to keep compatibility with command line without -A.

As the default value of arch in mkimage is not proper (IH_ARCH_PPC
instead of IH_ARCH_INVALID), to keep more compatibility, add an Aflag
field to image parameters to describe whether an architecture is
explicitly specified.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
f64233e9a5 spi: sun4i_spi: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
77834dcc5b pinctrl: sunxi: Add SPI0 pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
458e59da5d pwm: sunxi: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
aa4823ce48 pinctrl: sunxi: Add the A64 PWM pinmux
This is the only possible mux setting for the A64's PWM peripheral.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
8c2bdff483 sunxi: Remove non-DM MMC pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:17 +01:00
Samuel Holland
7570c54e46 pinctrl: sunxi: Add MMC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
af2ec35c41 i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2C
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.

Clean up the code in the process: remove #ifdefs and recognize that the
pin configuration is the same for all sun8i/sun50i SoCs, not just those
which select CONFIG_MACH_SUN8I.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
923d89316a i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
aadf3d5383 sunxi: Remove options and setup code for I2C2-I2C4
These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
4c8f11d4af pinctrl: sunxi: Add I2C pinmuxes
Where multiple options were available, the one matching board.c and the
device trees was chosen.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixup H5 I2C1 pinmux]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
ae022e8366 net: sun8i_emac: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
37b3de432f pinctrl: sunxi: Add sun8i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
3e42d919af sunxi: Remove non-DM GMAC pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
7a93644c69 pinctrl: sunxi: Add sunxi GMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
12bd00aafc net: sunxi_emac: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
fcdbbd68d3 pinctrl: sunxi: Add sun4i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
470a7bdb61 pinctrl: sunxi: Add UART pinmuxes
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:16 +01:00
Samuel Holland
50c195ee85 sunxi: pinctrl: Implement pin configuration
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:01 +01:00
Samuel Holland
d4b388244a sunxi: pinctrl: Implement get_pin_muxing function
The pinmux command uses this function to display pinmux status.

Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:01 +01:00
Samuel Holland
29babfd92b sunxi: pinctrl: Implement pin muxing functions
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.

We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.

This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.

[1]: See commit dda9fa734f ("sunxi: Simplify MMC pinmux selection")

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: add comment summarising the commit message]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:24:01 +01:00
Samuel Holland
b799eabc7e sunxi: pinctrl: Create the driver skeleton
Create a do-nothing driver for each sunxi pin controller variant.

Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:23:50 +01:00
Dzmitry Sankouski
f8a1b33889 board: starqltechn: get board usable - add bootcmd and docs
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`

In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration

What done:
- strip unneeded config options
- add FIT image support
- add framebuffer node, u-boot logo and video console
- increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions
- add linux kernel image header

Uart driver causes hang, when u-boot is used in android boot image instead
of linux. Temporary disable console driver, until investigated and fixed.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2022-04-04 15:06:11 -04:00
Dzmitry Sankouski
12a3e1ada0 arm: init: save previous bootloader data
When u-boot is used as a chain-loaded bootloader (replacing OS kernel),
previous bootloader leaves data in RAM, that can be reused.

For example, on recent arm linux system, when chainloading u-boot,
there are initramfs and fdt in RAM prepared for OS booting. Initramfs
may be modified to store u-boot's payload, thus providing the ability to
use chainloaded u-boot to boot OS without any storage support.

Two config options added:
- SAVE_PREV_BL_INITRAMFS_START_ADDR
  saves initramfs start address to 'prevbl_initrd_start_addr' environment
  variable
- SAVE_PREV_BL_FDT_ADDR
  saves fdt address to 'prevbl_fdt_addr' environment variable

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2022-04-04 14:53:26 -04:00
Alexander Graf
5c9b420ada qemu-arm: Enable NVMe for distro boot
We already support the NVMe commands and PCIe backend in the QEMU target,
so let's make it easy for anyone to consume them and enable NVMe distro
boot along the way!

With this patch, I can put an NVMe backed disk image into my QEMU VM and
have it automatically load a UEFI target blob.

Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-04-04 14:53:26 -04:00
Tom Rini
01f1ab67f3 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-04 10:48:44 -04:00
Tom Rini
8221c52d88 Merge tag 'u-boot-at91-2022.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.07 cycle:

This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
2022-04-04 08:26:55 -04:00
Tom Rini
25b8acee2e Revert "global: Remove CONFIG_SYS_EXTRA_OPTIONS support"
Unfortunately, we require additional logic to buildman to support this
removal and still use SYS_SOC, etc, for build targets.

This reverts commit eeec00072d.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-02 18:18:57 -04:00
Tom Rini
10d615f2fc Merge branch '2022-04-01-arm-semihosting-cleanups-and-new-features' into next
This brings in two related series.  The first from Andre:

This series is the continuation of last year's effort to support the new
Armv8-R64 application profile. This led to a significant rework of the
existing fastmodel (FVP) support, to both upgrade it to newest U-Boot
standards (OF_CONTROL and distro_boot support), but also to generalise
the code, so that plugging in the v8-R64 support in the last patch gets
much easier. This is because apart from the twisted memory map between
the two profiles there is actually little difference, when it comes to
U-Boot relevant parts of the hardware.

I kept the legacy semihosting support (which picks up magic files from
the current directory), but if that fails, we go and try virtio-blk
(.iso installer images work), then virtio-net.

Please have a look, and give it a try, if possible. Both the v8-R and
v8-A FVP models are available for free on the Arm website[1].

Patch 01/11 fixes a regression introduced in December, it should be
applied now. The rest of the patches are for the next merge window.

[1]
https://developer.arm.com/tools-and-software/simulation-models/fast-models

And the second from Sean (where we exclude 27, 28 and 29 for now):
This cleans up the semihosting code and adds the following new features:

- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled

The main device affected by these changes is vexpress64, so I'd
appreciate
if Andre (or anyone else) could try booting.

These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.

The patches in this series are organized as follows:

0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-29: DM puts support

The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).

Patch 14 depends on [1] to apply cleanly. Patch 17 depends on [2] for
correctness. This series should be applied to u-boot/next (in
particular, the EROFS series must have been applied).

[1]
https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
[2]
https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/
2022-04-02 15:28:43 -04:00
Sean Anderson
7a76347189 serial: dm: Add support for puts
Some serial drivers can be vastly more efficient when printing multiple
characters at once. Non-DM serial has had a puts option for these sorts
of drivers; implement it for DM serial as well.

Because we have to add carriage returns, we can't just pass the whole
string directly to the serial driver. Instead, we print up to the
newline, then print a carriage return, and then continue on. This is
less efficient, but it is better than printing each character
individually. It also avoids having to allocate memory just to add a few
characters.

Drivers may perform short writes (such as filling a FIFO) and return the
number of characters written in len. We loop over them in the same way
that _serial_putc loops over putc.

This results in around sizeof(void *) growth for all boards with
DM_SERIAL. The full implementation takes around 140 bytes.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-01 16:56:54 -04:00
Sean Anderson
53b953f2eb arm64: ls1046a: Support semihosting fallback
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:54 -04:00
Sean Anderson
2332590c48 serial: smh: Initialize serial only if semihosting is enabled
If semihosting is disabled, then the user has no debugger attached, and
will not see any messages. Don't create a serial device in this
instance, to (hopefully) fall back on another working serial device.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
bbe310cdaf arm64: Catch non-emulated semihosting calls
If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)

We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.

A future enhancement could try to determine semihosting capability by
inspecting the processor state.  There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.

[1] https://tomverbeure.github.io/2021/12/30/Semihosting-on-RISCV.html#avoiding-hangs-when-a-debugger-is-not-connected

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
385d69d76b arm: smh: Add option to detect semihosting
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.

Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.

This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
6d16157426 arm64: Import some ESR and SPSR defines from Linux
This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
e75d791c50 arm64: Save spsr in pt_regs
This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
e97ac4780d arm64: Save esr in pt_regs
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
93c3d32970 ls1046ardb: Add support for JTAG boot
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).

These steps require LS1046A support in OpenOCD, which was added in [1].

[1] 5b70c1f679/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
2022-04-01 16:56:44 -04:00
Sean Anderson
eeb54e81ca doc: smh: Update semihosting documentation
This documents how to use semihosting, the new semihosting features, and
how to migrate from smhload.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
74d11d37e2 serial: Add semihosting driver
This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.

There are three ways to print to the console:

Method              Baud
================== =====
smh_putc in a loop   170
smh_puts            1600
smh_write with :tt 20000
================== =====

These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.

DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).

Some semihosting implementations (QEMU) don't handle READC properly. To
work around this, we try to use open/read (much like for stdin) if
possible.

There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-01 15:03:13 -04:00
Sean Anderson
3ea744e873 arm: smh: Add some functions for working with the host console
This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
dcc4f9623e arm: smh: Remove smhload command
This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
dbf6f7c952 cmd: fdt: Use start/size for chosen instead of start/end
Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
f676b45151 fs: Add semihosting filesystem
This adds a filesystem which is backed by the host's filesystem. It is
modeled off of sandboxfs, which has very similar aims. Semihosting
doesn't support listing directories (except with SYS_SYSTEM), so neither
do we. it's possible to optimize a bit for the common case of reading a
whole file by omitting a call to smh_seek, but this is left as a future
optimization.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
8e1c9fe243 spl: Add semihosting boot method
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
12a05b3bcd arm: smh: Add some file manipulation commands
In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
79f6ad6a7b arm: smh: Document functions in header
This adds some documentation for semihosting functions in the header.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
80e62ccfa6 arm: smh: Return errno on error
Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
eff77c3a24 arm: smh: Use numeric modes for smh_open
There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
b10f724807 arm: smh: Export semihosting functions
This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.

smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
c8f4cc9590 arm: smh: Add semihosting entry to MAINTAINERS
These files are spread all over the tree, so just use a regex. Orphaned
for now, since this is more of a "one-off" series. Though I'll be happy
to review patches.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
e5e982c69b doc: ls1046ardb: Document debug uart
This adds some instructions for enabling the debug uart, including the
correct address and clock rate.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
b5ec417b56 doc: ls1046ardb: Expand boot mode section
This adds some additional info about booting from different sources,
including the correct switch positions.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
71230cdaa9 nxp: ls1046ardb: Convert README to rST
This converts the readme for this board to rST. I have tried not to
change any semantics from the original (though I did convert MB to M).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
d0ed9b1081 doc: Convert semihosting readme to rST
This converts the semihosting readme to rST. I have tried to make only
cosmetic changes, but I did fix up the first link (which was broken).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Peter Hoyes
8d78a6b674 vexpress64: Add ARMv8R-64 board variant
The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.

Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].

 * Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
   exising configuration.
 * Implement inverted memory map in vexpress_aemv8.h
 * Create vexpress_aemv8r defconfig
 * Provide an MMU memory map for the BASER_FVP
 * Update vexpress64 documentation

At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.

[1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add MAINTAINERS entry for Peter]
2022-04-01 15:03:03 -04:00
Andre Przywara
1a1143a454 vexpress64: pick DRAM size from DT
So far the DRAM size for both the Juno and the FVP model were hardcoded
in our config header file. For the Juno this is fine, as all models have
8 GiB of DRAM, but the DRAM size can be configured on the model command
line.

Drop the fixed DRAM size setup, instead look up the size in the device
tree, that we now have for every board. This allows a user to inject
a DT with the proper size, and be able to use the full amount of DRAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:59:15 -04:00
Andre Przywara
30cacb8123 vexpress64: generalise page table generation
In preparation for the ARMv8-R64 FVP support, which has DRAM mapped at
0x0, generalise the page table generation, by using symbolic names for
the address ranges instead of fixed numbers.

We already define the base of the DRAM and MMIO regions, so just use
those symbols in the page table description. Rename V2M_BASE to the more
speaking V2M_DRAM_BASE on the way.

On the VExpress memory map, the address space right after 4GB is of no
particular interest to software, as the whole of DRAM is mapped at 32GB
instead. The first 2 GB alias to the lower 2GB of DRAM mapped below 4GB,
so we skip this part and map some more of the high DRAM, should anyone
need it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:59:15 -04:00
Andre Przywara
168e815d25 vexpress64: defconfigs: allow default commands
Right now the defconfig the Arm VExpress64 boards disables quite some
standard commands, for apparently no good reasons (as image size is
hardly a concern here).

Remove the lines explicitly disabling those features, leaving it to
the U-Boot default settings to set them.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:59:15 -04:00
Andre Przywara
8a0a8ff52c vexpress64: fvp: add distro_boot support
So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.

Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
  commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
  infrastructure. This is also slightly tweaked to fail graceful in case
  the required files could not be found.
- Next we try to use a user provided script, that could be easily
  placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
  let's check virtio block devices next. This is where UEFI boot can
  be easily used, for instance by providing a distro installer .iso
  file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
  PXE and DHCP boot flows, mostly because we can.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:58:16 -04:00
Andre Przywara
5865038257 vexpress64: move hardware setting from defconfig to Kconfig
The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:57:46 -04:00
Andre Przywara
e09ec8e340 vexpress64: config header: unify environment definition
The definition of the standard environment variables (kernel_addr_r and
friends) has been improved lately for the FVP model, but the Juno board
is still using some custom scheme.
Since we need to extend this to a third board soon, let's unify the
definition:
- Define the Juno addresses in the same generic way we do for the FVP
  model, and move the actual variable setting out of the board #ifdef's.
- Add the missing addresses for a PXE file and a boot script.
- Cleanup some stale comments on the way.

As the FVP model doesn't have support for distro_boot quite yet, add
a dummy definition for now, to be replaced with the real thing later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:56:26 -04:00
Andre Przywara
c0fce92956 vexpress64: fvp: enable OF_CONTROL
The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.

Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.

To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.

Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:55:38 -04:00
Andre Przywara
71fa41ebfc arm: dts: Add Arm FVP Fastmodel RevC .dts files from Linux
The Arm Fixed Virtual Platform (FVP) is a software model for an
artificial ARM platform, it is available for free on the Arm website[1].

Add the devicetree files for the latest RevC version, as we will need
them to enable OF_CONTROL for the vexpress_aemv8a_semi board.

This is a verbatim copy of the respective files from Linux v5.17-rc6,
which is unchanged from the v5.16 release.

[1] https://developer.arm.com/tools-and-software/simulation-models/fast-models

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:55:38 -04:00
Andre Przywara
fac7fc43cf vexpress64: Kconfig: move board definitions out of arch/arm
At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.

To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.

That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:55:38 -04:00
Tom Rini
5b160c3a13 Merge branch '2022-04-01-Kconfig-migrations-and-cleanups' into next
- Migrate a number of CONFIG symbols to Kconfig.  Of note, with this we
  now complete migration of CONFIG_SYS_EXTRA_OPTIONS.
2022-04-01 10:35:19 -04:00
Tom Rini
0a3689cb86 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:33:18 -04:00
Tom Rini
eeec00072d global: Remove CONFIG_SYS_EXTRA_OPTIONS support
All options have now been migrated to Kconfig correctly so remove this
support.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
e4d741f8ab Convert CONFIG_SYS_MONITOR_BASE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MONITOR_BASE

Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
d4a2c400d1 Convert CONFIG_NORFLASH_PS32BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_NORFLASH_PS32BIT

Note that we also attempt to correct the behavior of the code here,
which had been testing for "NORFLASH_PS32BIT" which would never be set,
instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results
in some behavior change.

Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
2c32f24f95 at91: Switch to SD_BOOT / CONFIG_NAND_BOOT
The values CONFIG_SYS_USE_NANDFLASH and CONFIG_SYS_USE_MMC serve the
same purpose as CONFIG_SD_BOOT / CONFIG_NAND_BOOT so migrate to using
these switches instead as they're already in Kconfig.

Cc: Stelian Pop <stelian@popies.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
7505588342 Convert CONFIG_SRIO_PCIE_BOOT_SLAVE to Kconfig
This converts the following to Kconfig:
   CONFIG_SRIO_PCIE_BOOT_SLAVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
f2428acbf1 Convert CONFIG_E300 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_E300
   CONFIG_E5500

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
f13d7e21fc mx53loco: Convert CONFIG_DIALOG_POWER to Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
38c108f88d exynos: Drop CONFIG_DEVICE_TREE_LIST
This value isn't used anywhere, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
28f9c3125d Convert CONFIG_DEEP_SLEEP to Kconfig
This converts the following to Kconfig:
   CONFIG_DEEP_SLEEP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
ac28e20842 M5329EVB, M5373EVB: Remove CONFIG_NANDFLASH_SIZE
In the case of M5373EVB we always had NANDFLASH_SIZE=16, so just use it
directly.  In the case of M5329EVB we had not removed the rest of NAND
support when saying we didn't have NAND, so instead use that to key off
of rather than NANDFLASH_SIZE.

Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
225aaacf36 db-mv784mp-gp: Rename CONFIG_DB_784MP_GP to CONFIG_TARGET_DB_MV784MP_GP
The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to
CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-01 10:28:47 -04:00
Tom Rini
53f2222c71 p1_p2_rdb: Remove CONFIG_CPLD_[BO]R_PRELIM
These are not referenced in code, drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
15b4aed473 Convert CONFIG_CLOCKS to Kconfig
This converts the following to Kconfig:
   CONFIG_CLOCKS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
b20e79f0bb Convert CONFIG_CLOCK_SYNTHESIZER to Kconfig
This converts the following to Kconfig:
   CONFIG_CLOCK_SYNTHESIZER

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
a9ee1ad95a exynos: Drop CONFIG_CLK_*
We only set one of these values ever at this point, so remove dead code.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-01 10:28:47 -04:00
Tom Rini
d7b7e3e906 Convert CONFIG_SYS_USE_NORFLASH et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_USE_NORFLASH
   CONFIG_SYS_USE_BOOT_NORFLASH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
36a4dae18f global: Remove CONFIG_SYS_USE_DATAFLASH*
There are a handful of variants around CONFIG_SYS_USE_DATAFLASH and none
of them now control anything further within their board config.h files,
so remove these from CONFIG_SYS_EXTRA_OPTIONS and then remove the empty
blocks in the board config.h files.  In a few places further clean up
related logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
d433c74eec Convert CONFIG_SDCARD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SDCARD
   CONFIG_SPIFLASH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
0941548c20 am43xx_evm_qspiboot: Remove CONFIG_SYS_EXTRA_OPTIONS
CONFIG_QSPI is not used in the code, drop this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
ef26b53a11 MPC837XERDB: Move CONFIG_PCIE to Kconfig
Move this symbol to the board Kconfig file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
db48e52584 Convert CONFIG_LPUART et al to Kconfig
This converts the following to Kconfig:
   CONFIG_LPUART
   CONFIG_LPUART_32B_REG

And note that CONFIG_LPUART_32B_REG is unused in code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
e9ce70eff0 Convert CONFIG_LSCHLV2 to Kconfig et al
This converts the following to Kconfig:
   CONFIG_LSCHLV2
   CONFIG_LSXHL

Cc: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-04-01 10:28:46 -04:00
Tom Rini
11f077bb20 mpc8548cds: Rework CONFIG_LEGACY usage
This CONFIG option is used in one place, so pick a more direct name and
migrate to Kconfig.  Rework the code slightly.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
7f3092d713 Convert CONFIG_KM_COGE5UN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_KM_COGE5UN
   CONFIG_KM_KIRKWOOD_128M16
   CONFIG_KM_KIRKWOOD
   CONFIG_KM_KIRKWOOD_PCI
   CONFIG_KM_NUSA
   CONFIG_KM_SUSE2

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-04-01 10:28:46 -04:00
Tom Rini
0ebaa72e56 kmtegr1: Drop CONFIG_KMTEGR1
The only usage of CONFIG_KMTEGR1 can be replaced by
CONFIG_TARGET_KMTEGR1 so do so and remove this other symbol.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-04-01 10:28:46 -04:00
Tom Rini
c6c0e56ff8 keymile: Move sourcing of common Kconfig
The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms.  We cannot however safely source
this file from multiple locations.  This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources).  However, moving some target selection to
one of these files exposes the underlying problem.  Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-04-01 10:28:46 -04:00
Tom Rini
a8a326e62d Convert CONFIG_EMMC_BOOT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_EMMC_BOOT
   CONFIG_MAC_ADDR_IN_SPIFLASH
   CONFIG_NAND_BOOT
   CONFIG_SPL_FSL_PBL
   CONFIG_SYS_FSL_DDR4

In this case we re-sync options that had been set in
CONFIG_SYS_EXTRA_OPTIONS but should not have been as they have proper
entries.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
ef0a3449e3 mx28evk_auart_console: Remove CONFIG_SYS_EXTRA_OPTIONS
This was only setting values not referenced in the code so remove it.

Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
26e5944ec9 stmark2: Migrate CONFIG_SYS_EXTRA_OPTIONS to Kconfig
This platform is the only one to set these options, so define them in
the board Kconfig file.

Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
3c205a6e4a Convert CONFIG_MCFRTC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MCFRTC
   CONFIG_SYS_MCFRTC_BASE

While at it, remove '#undef RTC_DEBUG' from these config files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
b7872641a8 stmark2: Remove CONFIG_SERIAL_FLASH
This is not referenced anywhere, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
143a365a5b Convert CONFIG_MCFTMR to Kconfig
This converts the following to Kconfig:
   CONFIG_MCFTMR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
f88e9f5ab8 Convert CONFIG_CF_DSPI to Kconfig
This converts the following to Kconfig:
   CONFIG_CF_DSPI

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
c3cdca48df atmel: Remove CONFIG_SPL_ATMEL_SIZE
This seems to be unused in the code, remove it.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
47267f8261 Remove CONFIG_BOARDNAME and CONFIG_BOARD_NAME
Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user.  In almost all cases, it's
just as useful to hard-code the value used.  The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
448dfb407f Convert CONFIG_BITBANGMII_MULTI to Kconfig
This converts the following to Kconfig:
   CONFIG_BITBANGMII_MULTI

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
797c2b4a1a Convert CONFIG_BCM2835_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_BCM2835_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
439cc7fb05 Finish converting CONFIG_BOOTM_NETBSD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTM_NETBSD
   CONFIG_BOOTM_RTEMS
   CONFIG_DESIGNWARE_WATCHDOG
   CONFIG_DISPLAY_CPUINFO
   CONFIG_DM_ETH
   CONFIG_DM_MMC
   CONFIG_DM_REGULATOR
   CONFIG_DM_SPI
   CONFIG_DM_SPI_FLASH
   CONFIG_ISO_PARTITION
   CONFIG_OF_SEPARATE
   CONFIG_SPI_FLASH_WINBOND
   CONFIG_SPL_ETH
   CONFIG_TIMER
   CONFIG_USB_DWC3
   CONFIG_USB_DWC3_GADGET
   CONFIG_USB_DWC3_OMAP
   CONFIG_USB_DWC3_PHY_OMAP
   CONFIG_USB_EHCI_TEGRA
   CONFIG_USB_GADGET_DOWNLOAD
   CONFIG_USB_GADGET_DUALSPEED
   CONFIG_USB_GADGET_MANUFACTURER
   CONFIG_USB_GADGET_PRODUCT_NUM
   CONFIG_USB_GADGET_VBUS_DRAW
   CONFIG_USB_GADGET_VENDOR_NUM

This catches a number of cases where board config files were #undef
various CONFIG options when building SPL, and that doesn't work.  Clean
up the related comments as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:45 -04:00
Tom Rini
694943cf2a CI: Update unmigrated symbol check
We need to check for config header files that #undef migrated symbols as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:45 -04:00
Tom Rini
6815a66ad7 am33xx: musb: Remove unused configuration logic
At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL.  Remove
a bunch of now unused logic to simplify the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:45 -04:00
Clément Léger
ef9d9b2501 configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01 15:42:47 +03:00
Clément Léger
3d3fdaf075 ARM: dts: at91: sama5d2: add u-boot, dm-pre-reloc property for TCB
In order to use the TCB early in boot and in the SPL, add
u-boot,dm-pre-reloc property for the TCB and the clock that is used by
the driver (tcb0_clk).

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01 15:42:46 +03:00
Clément Léger
757647313d ARM: dts: at91: sama5d2: add TCB node
Add the device-tree node to describe the TCB timer.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01 15:42:46 +03:00
Clément Léger
d29e55a6c2 ARM: dts: at91: sama5d2: add AIC node
When using interrupts property, a global interrupt controller needs to
be added to avoid warnings when compiling device-tree:

 arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
    /ahb/apb/timer@f800c000: Missing interrupt-parent

Add AIC node as the sama5d2 global interrupt controller.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01 15:42:46 +03:00
Clément Léger
70fb1ae9dd timer: atmel_tcb_timer: add atmel_tcb driver
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01 15:42:46 +03:00
Eugen Hristev
746b738224 ARM: dts: at91: sama7g5/sama7g5ek: align with Linux DT
Align the DT for sama7g5 SoC and sama7g5 EK board with Linux devicetree
in version 5.18.

Some things remain still different, due to some things yet unimplemented in
certain drivers. These include in PMC, pinctrl, and others.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01 15:42:46 +03:00
Eugen Hristev
29641527ac ARM: dts: at91: rename sama7g5ek.dts to at91-sama7g5ek.dts
In Linux this DT file is named at91-sama7g5ek.dts. Rename it accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01 15:42:46 +03:00
Mihai Sain
d05fc47bbc board: at91: sama5d2: set blue led on at boot time
Set blue led on at boot time in order to highlight that u-boot is loaded.
This is done for all sama5d2 based boards which contain an RGB led.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-04-01 15:42:46 +03:00
Tudor Ambarus
f206af80f8 ARM: at91: sama7g5: Reset external devices at software reset
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller
a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external
devices.

This is particular useful for external devices that are configured in
stateful modes which can not be undone without reconfiguring the device
or without resetting the device. An example is an SPI NOR flash that is
configured in octal mode. The do_reset u-boot cmd does not call any
driver's remove method, but merely resets the CPU. As the code was, this
left the flash in octal mode, being impossible for the first stage boot
loaders to recover/identify the flash after a "software reset".
RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset"
to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL
field and reset the external devices (including the SPI NOR flash in the
example).
nrst_out is always asserted at "user reset" and it resets the external
devices correctly. Asserting nrst_out at "software reset" should behave
in a similar way. The only difference that I could find between the two
types of resets in regards to the nrst_out signal, is that at "user reset"
timing diagram the "Processor and Peripherals Reset Line" rises after six
MD_SLCK cycles after the nrst_out line rose, while at the "software reset"
timing diagram the "Processor and Peripherals Reset Line" is active for
3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset"
case the nrst_out signal can be active for a longer period of time than the
"Processor and Peripherals Reset Line" active time, depending on the
RSTC_MR.ERSTL value.
Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the
sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a
software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01 15:42:46 +03:00
Tudor Ambarus
af612ee418 configs: Convert AT91RESET_EXTRST to Kconfig
Convert AT91RESET_EXTRST to Kconfig for easier integration. The symbol is
not configurable from menuconfig, it will be automatically selected by SoCs
that select it explicitly via the "select" directive.
AT91RESET_EXTRST sets the Reset Controller's RSTC_CR.EXTRST bit which
asserts the nrst_out pin that resets external devices.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01 15:42:46 +03:00
Tudor Ambarus
5576bb36ad ARM: at91: sama5d2: Enable the use of Galois Tables from ROM
sama5d2 contains in its ROM memory BCH code tables for NAND Flash ECC
correction. Enable the use of the GF tables defined in ROM. This should
speed up the boot process, as the tables are no longer constructed at
runtime. Tested with sama5d2-ptc-ek.

Reported-by: David Mosberger-Tang <davidm@egauge.net>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01 15:42:46 +03:00
Tom Rini
52d8100b1d Merge branch '2022-03-31-image-add-a-stage-pre-load' into next
To quote the author:
This series adds a stage pre-load before launching an image.  This stage
is used to read a header before the image and this header contains the
signature of the full image.  So u-boot may check the full image before
using any data of the image.

The support of this header is added to binman, and a command verify
checks the signature of a blob and set the u-boot env variable
"loadaddr_verified" to the beginning of the "real" image.

The support of this header is only added to binman, but it may also be
added to mkimage.
2022-03-31 14:12:30 -04:00
Philippe Reynes
7bebc11c42 cmd: bootm: add subcommand preload
Add a subcommand preload to bootm that execute the preload
stage on the image. Right now, it checks the signature
of the image with the pre-load header. If the check
succeed, the u-boot env variable 'loadaddr_verified'
is set to the address of the image (without the header).

It allows to run such commands:
tftp script.img && bootm preload $loadaddr && source $loadaddr_verified

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:23 -04:00
Philippe Reynes
776db4fa96 test: py: vboot: add test for global image signature
Adds test units for the pre-load header signature.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:23 -04:00
Philippe Reynes
29451432c7 configs: sandbox_defconfig: enable stage pre-load in bootm
Enable the support of stage pre-load in bootm.
For the moment, this stage allow to verify the
signature of the full image with a header.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:23 -04:00
Philippe Reynes
b1c5093008 tools: binman: add support for pre-load header
Adds the support of the pre-load header with the image signature
to binman.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:23 -04:00
Philippe Reynes
d12c1be903 Makefile: provide sah-key to binman
Set the variable pre-load-key-path with the shell variable
PRE_LOAD_KEY_PATH that contain the keys path (used for signature).
This variable pre-load-key-path is provided to binman.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
6e052d1cba mkimage: add public key for image pre-load stage
This commit enhances mkimage to update the node
/image/pre-load/sig with the public key.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
2404a01544 common: spl: fit_ram: allow to use image pre load
Add the support of image pre load in spl or tpl
when loading an image from ram.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
9d46e63d97 cmd: bootm: add a stage pre-load
Add a stage pre-load to the command bootm.
Right now, this stage may be used to read a
header and check the signature of the full
image.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
982207435a boot: image: add a stage pre-load
Add a stage pre-load that could
check or modify an image.

For the moment, only a header with a signature is
supported. This header has the following format:
- magic : 4 bytes
- version : 4 bytes
- header size : 4 bytes
- image size : 4 bytes
- offset image signature : 4 bytes
- flags : 4 bytes
- reserved0 : 4 bytes
- reserved1 : 4 bytes
- sha256 of the image signature : 32 bytes
- signature of the first 64 bytes : n bytes
- image signature : n bytes
- padding : up to header size

The stage uses a node /image/pre-load/sig to
get some informations:
- algo-name (mandatory) : name of the algo used to sign
- padding-name : name of padding used to sign
- signature-size : size of the signature (in the header)
- mandatory : set to yes if this sig is mandatory
- public-key (madatory) : value of the public key

Before running the image, the stage pre-load checks
the signature provided in the header.

This is an initial support, later we could add the
support of:
- ciphering
- uncompressing
- ...

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
f6bacf1d48 lib: rsa: allow rsa verify with pkey in SPL
This commit adds the option SPL_RSA_VERIFY_WITH_PKEY.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
e44ec9f709 lib: crypto: allow to build crypyo in SPL
This commit adds the options:
- SPL_ASYMMETRIC_KEY_TYPE
- SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE
- SPL_RSA_PUBLIC_KEY_PARSER

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
fd210fee1d lib: allow to build asn1 decoder and oid registry in SPL
This commit adds the options:
- SPL_ASN1_DECODER
- SPL_OID_REGISTRY

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
7d44a98517 lib: Kconfig: enhance the help of OID_REGISTRY
Enhance the help for the config OID_REGISTRY.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
a0e71d9614 lib: Kconfig: enhance help for ASN1
Enhance the help for configs ASN1_COMPILER
and ASN1_decoder.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Philippe Reynes
059df5624b arch: Kconfig: imply BINMAN for SANDBOX
To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-31 14:12:01 -04:00
Tom Rini
23e354f82c Merge tag 'clk-2022.04-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next
Clock patches for u-boot/next

This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.

I had to fix up the last commit since I missed an include for at91.

CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
2022-03-30 18:14:33 -04:00
Sean Anderson
682e73d235 clk: Use generic CCF ops where possible
This converts most CCF drivers to use generic ops. imx6q is the only
outlier, where we retain the existing functionality by moving the check to
request().

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com
[ fixed missing include for at91 ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-03-30 14:18:56 -04:00
Sean Anderson
3a11b5ae65 clk: ccf: Add some helper functions for clock ops
Most CCF drivers follow a common pattern where their clock ops defer the
actual operation to the backing CCF clock. Add some generic implementations
of these functions to reduce duplication of code.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-1-seanga2@gmail.com
2022-03-30 13:03:29 -04:00
Sean Anderson
e7075ff7b3 clk: Consolidate some clock functions
These functions are exactly the same as their "nodev" varients, except they
accept a device and not an ofnode. Rewrite them to just call the other
function.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220227190113.1617498-1-seanga2@gmail.com
2022-03-30 13:03:26 -04:00
Sean Anderson
ac15e789ca clk: Make clk_free return void
Most callers of this function do not check the return value, and it is
unclear what action they should take if it fails. If a function is freeing
multiple clocks, it should not stop just because the first one failed.
Since the callbacks can no longer fail, just convert the return type to
void.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-8-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
3cbdd4cab9 spi: dw: Don't check clk_free
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-7-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
dfdb227c3d spi: bcm63xx: Don't check clk_free
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-6-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
ad20358c74 phy: bcm63xx: Don't check clk_free
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-5-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
b2e0889aba net: bcm63xx: Don't check clk_free
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-4-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
454af567ed dma: bcm6348: Don't check clk_free
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-3-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Sean Anderson
276d446757 clk: Make rfree return void
When freeing a clock there is not much we can do if there is an error, and
most callers do not actually check the return value. Even e.g. checking to
make sure that clk->id is valid should have been done in request() in the
first place (unless someone is messing with the driver behind our back).
Just return void and don't bother returning an error.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115222504.617013-2-seanga2@gmail.com
2022-03-30 13:02:55 -04:00
Michal Simek
24d973c0c1 arm: zynqmp: Enable PWM command and cadence ttc pwm driver
Enable PWM ttc driver and command in generic image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a660c8f2010f4f07534753e0ac44a34b8ff0d3c3.1634303847.git.michal.simek@xilinx.com
2022-03-30 14:50:47 +02:00
Michal Simek
fb92cc2c17 pwm: Add driver for cadence TTC
TTC has three modes of operations. Timer, PWM and input counters.

There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
2022-03-30 14:50:47 +02:00
Michal Simek
dcbdd24259 timer: cadence: Add bind function to driver
When DT node has pwm-cells property it shouldn't be bind as timer driver
but as PWM driver. That's why make sure that this property is checked.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/434ef195fbedea9f83672a12d1ace0da16e8832e.1634303847.git.michal.simek@xilinx.com
2022-03-30 14:43:26 +02:00
Ashok Reddy Soma
035d56f238 mmc: zynq_sdhci: Fix SDx_BASECLK configuration
The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and
200 MHz. When user select SD frequency as 200MHz in the design, the
actual frequency is going to come around ~187MHz (<= 200MHz considering
the parent clock and divisor selection). We need to set SDx_BASECLK as
200 in this case, setting 187 will result in tuning failures in mmc.

Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency
range.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/6c1e5eeeedd2864a0c85e6b409d182031d8c6c1a.1648210268.git.michal.simek@xilinx.com
2022-03-29 09:20:33 +02:00
Michal Simek
cbeba35152 serial: zynq: Change fifo behavior in debug mode
Serial IP has output buffer which status is indicated by two bits. If fifo
if empty or full. Default configuration is that chars are pushed to fifo
till it is full. Time to time it is visible that chars are scambled and
logs are not visible. Not sure what it is exactly happening but all the
time it helps to change driver behavior to write only one char at a time.
That's why enable this mode when debug uart is enabled not to see scrambled
chars in debug by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/332b2106d7a8190dd1001b5387f8bd1fba2e061b.1648205405.git.michal.simek@xilinx.com
2022-03-29 09:19:59 +02:00
Michal Simek
0302a207c3 arm64: zynqmp: Remove low level UART setting cont
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
The same change was done in past by commit 84d2bbf082 ("arm64: zynqmp:
Remove low level UART setting").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/91a73f292bafc4b64ed09954cc23780496da4b65.1648125082.git.michal.simek@xilinx.com
2022-03-29 09:18:31 +02:00
Michal Simek
7ce9d921bd dt-bindings: phy: Sync phy.h with Linux kernel
Make sure that both files are in sync to have the same values in DTs.
The patch is fixing SPDX license as is used in the kernel and adding new
values for PHY_TYPE_DPHY and PHY_TYPE_CPHY.

SPDX license change was done by:
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
and new value added by:
Link: https://lore.kernel.org/r/20210617144349.28448-3-jonathan@marek.ca

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/06dbc03d4c9ac5d621341d8fb8cc16f489062b39.1648113469.git.michal.simek@xilinx.com
2022-03-29 09:17:49 +02:00
Michal Simek
f66d0b5346 arm64: versal: Do not place u-boot to reserved memory location
Versal can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in ZynqMP by commit
ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory location")
and also for microblaze by commit d7b5cc89d3 ("microblaze: Do not place
u-boot to reserved memory location").

The patch was tested by adding reserved-memory node to DT and check via
bdinfo back.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/15426fa6d64835dd23c5c8c12bbfc97306fb6098.1647527129.git.michal.simek@xilinx.com
2022-03-29 09:16:30 +02:00
Michal Simek
f307c688ea firmware: zynqmp: Do not bind PD driver in SPL if disabled
Change if condition to cover SPL flow. SPL needs to have
CONFIG_SPL_POWER_DOMAIN enabled to be able to bind
CONFIG_ZYNQMP_POWER_DOMAIN driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8e1d381013a0ce39d736da166d2b401c4b12d38a.1646064792.git.michal.simek@xilinx.com
2022-03-29 09:12:58 +02:00
Sai Krishna Potthuri
8bd9e2f631 arm64: zynqmp: Add resets property to sdhci nodes
Add "resets" property to sdhci nodes.
resets property is used to reset the SD host controller when
dynamic configuration support is enabled.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f1fe39259c45a37aae56c2835ee8ba187c889d25.1646060367.git.michal.simek@xilinx.com
2022-03-29 09:12:58 +02:00
Tom Rini
d2e5250be4 Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video into next
- drop old CFB code
 - drop CONFIG_LCD_BMP_RLE8
2022-03-28 17:04:45 -04:00
Simon Glass
60cc409448 video: Drop CONFIG_LCD_BMP_RLE8
This is not defined by any board. Even sandbox doesn't actually use
it since it has migrated to DM_VIDEO.

Drop this option. Remove the dead code also, for completeness, even
though the whole lcd.c file will be dropped soon.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2022-03-28 20:30:33 +02:00
Simon Glass
39161e0880 video: Drop formike driver
This is not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:29:58 +02:00
Simon Glass
2cbc1c019b video: Convert CONFIG_VIDEO_BCM2835 to Kconfig
This converts the following to Kconfig:
   CONFIG_VIDEO_BCM2835

This is the final ad-hoc CONFIG_VIDEO_... to convert.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
2022-03-28 20:28:56 +02:00
Simon Glass
bfd7a1a33c video: mxs: Drop old video code
This is no-longer used and is the last reference to video_hw_init(). Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:26 +02:00
Simon Glass
92e3fb8b5e video: Drop FSL DIU driver
This does not use driver model and is more than two years past the
migration date. Drop it.

It can be added back later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:16 +02:00
Simon Glass
77f46f0607 video: fsl: colibri_vf: Drop FSL DCU driver
This does not use driver model and is more than two years past the
migration date. Drop it.

It can be added back later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:07 +02:00
Simon Glass
636b8b999c video: Drop da8xx-fb
This is not used in U-Boot anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:17:30 +02:00
Simon Glass
50800147b4 video: Clean up the uclass header
Drop the unnecessary cruft from this header and update the title.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:17:20 +02:00
Simon Glass
1fa43cad86 video: Drop references to CONFIG_VIDEO et al
Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.

Also drop the prototype for video_get_info_str() which is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
2022-03-28 20:17:07 +02:00
Simon Glass
82975f8a9e video: Drop CONFIG_VIDEO_BMP_LOGO
This option is not implemented anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:16:56 +02:00
Simon Glass
fff49e01d8 video: Drop video_fb header
This is not used now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:16:46 +02:00
Simon Glass
9b39da6e42 video: nexell: Drop unused and invalid code
Unfortunately this driver uses the old video structure to store things.
This is not supported with driver model.

Drop the old code and comment out the other pieces, so the maintainer can
take a look.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:16:30 +02:00
Simon Glass
d77c6fbd3f video: siemens: Drop unused video code
Drop this old code which is not built anymore, as it depends on
CONFIG_VIDEO which has been removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:16:19 +02:00
Simon Glass
814dd92bdc video: Drop cfg_console
The non-driver model video support was removed two years ago. Drop this
driver, which is only used by nokia_rx51.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:14:24 +02:00
Tom Rini
34d2b7f203 Merge tag 'v2022.04-rc5' into next
Prepare v2022.04-rc5
2022-03-28 12:36:49 -04:00
Tom Rini
7f0826c169 Merge branch '2022-03-25-assorted-updates' into next
- Assorted PCI cleanups
- Allow building with -Og
- ast2600 pwm support
- PFUZE100 bootcount driver
2022-03-25 19:18:30 -04:00
Philip Oberfichtner
c537a36839 bootcount: Add pmic pfuze100 bootcount driver
Use the MEMA - MEMD registers on the PFUZE100 as bootcount
registers.

Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-03-25 16:42:40 -04:00
Philip Oberfichtner
a194d59eec power: pfuze100: Add MEMx register definitions
Add missing MEMA - MEMD register definitions for PFUZE100.

Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-03-25 16:42:40 -04:00
Simon Glass
88ca8e2695 disk: Add an option for partitions in SPL
In some cases we do not want to enable partition support in SPL. Add an
option to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-25 16:42:40 -04:00
Billy Tsai
5b66ebb4e9 ARM: dts: ast2600: Add PWM to device tree
Add the PWM node and enable it for AST2600 EVB

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-03-25 13:35:50 -04:00
Billy Tsai
73ee1f261e pinctrl: Add the pinctrl setting for PWM.
This patchs add the signal description array for PWM pinctrl settings.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-03-25 13:35:50 -04:00
Billy Tsai
fae101d6e8 pwm: Add Aspeed ast2600 PWM support
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-03-25 13:35:50 -04:00
Pali Rohár
d158fa1b8b pci: Remove duplicate PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* macros
Macros PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* are unused and are
duplication of PCI_CLASS_* macros defined in pci_ids.h header file.
So remove them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-25 13:35:50 -04:00
Pali Rohár
f02b396548 sandbox: video: Replace PCI_CLASS_* macros by one from pci_ids.h
Replace old macros PCI_CLASS_CODE_COMM and PCI_CLASS_SUB_CODE_COMM_SERIAL
by new macros defined in pci_ids.h. Old macros would be deleted in followup
commit.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-25 13:35:50 -04:00
Pali Rohár
d7b904092d pci: Add defines for normal and subtractive PCI bridges
Add following two new PCI class codes defines into pci_ids.h include file:

  PCI_CLASS_BRIDGE_PCI_NORMAL
  PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE

And use these defines in all U-Boot code for describing PCI class codes for
normal and subtractive PCI bridges.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-25 13:35:50 -04:00
Sean Anderson
e976504374 Add option to use -Og
This adds support for using -Og when building U-Boot. According to the
gcc man page:

> -Og should be the optimization level of choice for the standard
> edit-compile-debug cycle, offering a reasonable level of optimization
> while maintaining fast compilation and a good debugging experience.

This optimization level is roughly -O1 minus a few additional
optimizations. It provides a noticably better debugging experience, with
many fewer variables <optimized out>.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-25 13:35:50 -04:00
Sean Anderson
f38cb2aca7 Split CONFIG_CC_OPTIMIZE_FOR_SIZE into two configs
This adds a separate CONFIG_CC_OPTIMIZE_FOR_SPEED option in a choice,
in preparation for adding another optimization option. Also convert SH's
makefile to use this new option.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-25 13:35:50 -04:00
Tom Rini
e47bbf7e0e CI: Pin pylint version to 2.12.2
For consistency in runs, we need to always use the same pylint version.
Pin to 2.12.2 as this is what we have been using so far.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 08:26:01 -04:00
Tom Rini
3b2d19c838 Merge branch '2022-03-25-Kconfig-migrations' into next
- Merge a number of Kconfig migration patches
2022-03-25 08:02:31 -04:00
Tom Rini
b40d2b2891 Convert CONFIG_BACKSIDE_L2_CACHE to Kconfig
This converts the following to Kconfig:
   CONFIG_BACKSIDE_L2_CACHE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
2665853a5f vinco: Remove CONFIG_ATMEL_SPI0
This is not referenced anywhere, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
61b9c42e8c lcd: Remove LCD_TEST_PATTERN code
This is a legacy driver and the value is set in board config headers
without a CONFIG prefix.  Remove the code.

Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
3e2ea3278e Convert CONFIG_LCD_INFO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_LCD_INFO
   CONFIG_LCD_LOGO
   CONFIG_LCD_INFO_BELOW_LOGO
   CONFIG_LCD_IN_PSRAM

Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
286c4531ad Convert CONFIG_ATMEL_LCD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_LCD
   CONFIG_ATMEL_LCD_BGR555
   CONFIG_ATMEL_LCD_RGB565
   CONFIG_GURNARD_SPLASH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
cc386f161c Convert CONFIG_MII_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_MII_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
16199a8b96 Convert CONFIG_PHY_RESET_DELAY to Kconfig
This converts the following to Kconfig:
   CONFIG_PHY_RESET_DELAY

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
0b956e3987 Convert CONFIG_SYS_RX_ETH_BUFFER to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_RX_ETH_BUFFER

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
6329dda175 Convert CONFIG_LPC32XX_ETH to Kconfig
This converts the following to Kconfig:
   CONFIG_LPC32XX_ETH

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
5842c8107d Convert CONFIG_TFTP_PORT to Kconfig
This converts the following to Kconfig:
   CONFIG_TFTP_PORT

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
03d14ccdf6 Convert CONFIG_RMII to Kconfig
This converts the following to Kconfig:
   CONFIG_RMII

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
1d5686acfd Convert CONFIG_SYS_FAULT_ECHO_LINK_DOWN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FAULT_ECHO_LINK_DOWN

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
29cc2b542d Convert CONFIG_RESET_PHY_R to Kconfig
This converts the following to Kconfig:
   CONFIG_RESET_PHY_R

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
5a606a4c97 Convert CONFIG_AT91_WANTS_COMMON_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_WANTS_COMMON_PHY

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
210a4b46bd Convert CONFIG_AT91_LED to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_LED

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25 12:01:15 +00:00
Tom Rini
a958c58571 Merge tag 'dm-pull-18mar22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
binman FIT improvements
various minor sandbox improvements
2022-03-19 09:09:58 -04:00
Simon Glass
40c8bdd87e binman: Support splitting an ELF file into multiple nodes
Some boards need to load an ELF file using the 'loadables' property, but
the file has segments at different memory addresses. This means that it
cannot be supplied as a flat binary.

Allow generating a separate node in the FIT for each segment in the ELF,
with a different load address for each.

Also add checks that the fit,xxx directives are valid.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
2337eca283 binman: Keep a separate list of entries for fit
The current implementation sets up the FIT entries but then deletes the
'generator' ones so they don't appear in the final image.

This is a bit clumsy. We cannot build the image more than once, since the
generator entries are lost during the first build. Binman requires that
calling BuildSectionData() multiple times returns a valid result each
time.

Keep a separate, private list which includes the generator nodes and use
that where needed, to correct this problem. Ensure that the missing list
includes removed generator entries too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
01f467e2d3 binman: Update fit to use node instead of subnode
It doesn't make sense to use 'subnode' as a function parameter since it
is just a 'node' so far as the function is concerned. Update two functions
to use 'node' instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
ce4e402a32 binman: Add a consistent way to report errors with fit
Add a new function to handling reporting errors within a particular
subnode of the FIT description. This can be used to make the format of
these errors consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
5795497e8b binman: Fix some pylint warnings in fit
Some warnings have crept in, so fix those that are easy to fix.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
d32169c0fd binman: Update fit to move node reading into the ReadNode() method
This should not be done in the constructor. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
b55c11c96e binman: Read the fit entries only once
At present the entries are read twice, once by the entry_Section class
and once by the FIT implementation. This is harmless but can be confusing
when debugging. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
72e423c6b6 binman: Allow mkimage to use a non-zero fake-blob size
Unfortunately mkimage gets upset with zero-sized files. Update the
ObtainContents() method to support specifying the size, if a fake blob is
created.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
3817ad4c1c binman: Make fake blobs zero-sized by default
On x86 devices having even a small amount of data can cause an overlap
between regions. For example, bayleybay complains when the intel-vga
region overlaps with u-boot-ucode:

   ImagePos    Offset      Size  Name
   <none>    00000000  00800000  main-section
   <none>     ff800000  00000080  intel-descriptor
   <none>     ff800400  00000080  intel-me
   <none>     fff00000  00098f24  u-boot-with-ucode-ptr
   <none>     fff98f24  00001aa0  u-boot-dtb-with-ucode
   <none>     fff9a9d0  0002a000  u-boot-ucode
   <none>     fffb0000  00000080  intel-vga
   ...

It is safer to use an empty file in most cases. Add an option to set the
size for those uses that need it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
9a0a2e9569 binman: Change how faked blobs are created
At present fake blobs are created but internally an empty blob is used.
Change it to use the contents of the faked file. Also return whether the
blob was faked, in case the caller needs to know that.

Add a TODO to put fake blobs in their own directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
ae9a457029 binman: Rename tools parameter to btools
This shadows the patman.tools library so rename it to avoid a pylint
warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
38397d0833 binman: Refactor fit to generate output at the end
At present the fit implementation creates the output tree while
scanning the FIT description. Then it updates the tree later when the
data is known.

This works, but is a bit confusing, since it requires mixing the scanning
code with the generation code, with a fix-up step at the end.

It is actually possible to do this in two phases, one to scan everything
and the other to generate the FIT. Thus the FIT is generated in one pass,
when everything is known.

Update the code accordingly. The only functional change is that the 'data'
property for each node are now last instead of first, which is really a
more natural position. Update the affected test to deal with this.

One wrinkle is that the calculated properties (image-pos, size and offset)
are now added before the FIT is generated. so we must filter these out
when copying properties from the binman description to the FIT.

Most of the change here is splitting out some of the code from the
ReadEntries() implementation into _BuildInput(). So despite the large
diff, most of the code is the same. It is not feasible to split this patch
up, so far as I can tell.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
c9ee33ac97 binman: Rename ExpandEntries to gen_entries
Leave the 'expand' term for use by entry types which have an expanded
version of themselves. Rename this method to indicate that it generates
subentries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
80a66ae646 binman: Rename ExpandToLimit to extend_to_limit
The word 'expand' is used for entries which generate subentries. It is
also used for entries that can have an '_expanded' version which is used
to break out its contents.

Rather than talking about expanding an entry's size, use the term
'extending'. It is slightly more precise and avoids the above conflicts.

This change renders the old 'expand-size' property invalid, so add an
error check for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
6d427c4bcb binman: Tweak collect_contents_to_file() and docs
Update the return value of this function, fix the 'create' typo and
update the documentation for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
17b4ffc56f elf: Rename load_segments() and module failure
Rename this function to make it clear that it only reads loadable
segments. Also update the error for missing module to better match the
message emitted by Python.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
0ded4d434d dtoc: Tidy up implementation of AddStringList()
Refactor this to avoid a loop. Also add a test for an empty string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
b13114cd21 spl: Correct Kconfig help for TPL_BINMAN_SYMBOLS
Fix the help which should refer to TPL, not SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:25 -06:00
Simon Glass
d9c958f49c moveconfig: Use re.fullmatch() to avoid extra check
Simplify the code by using the available function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:24 -06:00
Simon Glass
78f12e5369 moveconfig: Remove remove_defconfig()
This is not necessary if simpler code is used. Use the split function and
drop the unnecessary []

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:24 -06:00
Simon Glass
6101253818 dtoc: Make GetArgs() more flexible
At present it is not possible to have arguments which include spaces.
Update the function to only split the args if the property is a single
string. This is a bit inconsistent, but might still be useful.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-03-18 19:24:24 -06:00
Simon Glass
04fce6ff70 patman: Define Commit.path in the constructor
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
2022-03-18 19:24:24 -06:00
Simon Glass
79e1d289b7 sandbox: test: Tidy up spl_test_load() calls
Use the new sandbox_find_next_phase() function, which does what is needed
here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Simon Glass
7c19e4cbfe sandbox: Slow down the LCD sync rate
There is seldom a need to refresh at 100Hz and it uses a lot of CPU.
Reduce the rate to 10Hz which seems to be adequate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Simon Glass
7aa9dbd0ab sandbox: Open host file for read-only access if needed
Some files cannot be written but read-only access is still useful for
tests. Add a fallback to read-only access when needed.

This is useful in CI when opening a large data file provided by docker,
where read/write access would result in copying the file, thus needing
a lot of extra disk space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Simon Glass
acc874a4c5 sandbox: Add the handoff header for spl
This defines a function declared in handoff.h so add the header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Simon Glass
d02f99dd67 sandbox: Show a message when writing out the ram buffer
If state is not being written, but RAM is, we should still show a message,
so it is clear that this is happening.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Jan Kiszka
b210661c86 binman: Include also subnodes in generator nodes
This allows to prefill fdt and config nodes with hash and signature
subnodes. It's just important to place the child nodes last so that
hashes do not come before the data - would be disliked by mkimage.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Philippe Reynes
7aa288ef5c tools: binman: main.py: add build-sandbox in sys.path
Adds build-sandbox in sys.path to look for libfdt,
otherwise py_test can't use binman.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:24:24 -06:00
Simon Glass
40def8ad75 binman: Complete elf test coverage
Add coverage for the new elf functions needed for the event_dump.py
script.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18 19:21:49 -06:00
Simon Glass
fc6c663af3 patman: Define Commit.path in the constructor
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
2022-03-18 19:44:45 +00:00
Tom Rini
bc30585888 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:40 -04:00
Tom Rini
e29654e408 Merge branch '2022-03-18-Kconfig-migrations' into next
- A large number of Kconfig migrations.  This also includes a few
  convert-by-enable of DM_ETH on some i.MX platforms.
2022-03-18 12:48:34 -04:00
Tom Rini
cb81640011 Convert CONFIG_ATMEL_LEGACY to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_LEGACY

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:18 -04:00
Tom Rini
5644f3b19d Convert CONFIG_AT91_GPIO_PULLUP to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_GPIO_PULLUP

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:18 -04:00
Tom Rini
b601906ed5 atmel: Remove CONFIG_AT91SAM9G45_LCD_BASE
This variable is used once and is noted as board-specific.  Use the
value directly with a comment.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
137b990bf5 atmel: Remove CONFIG_AT91SAM9G45EKES
This symbol is used only once, and in comparison with an unset symbol,
so drop it.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
de0bb2ba54 Convert CONFIG_AT91SAM9G10EK et al to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91SAM9G10EK
   CONFIG_AT91SAM9261EK
   CONFIG_AT91SAM9G10

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
23cf6344c0 Convert CONFIG_AT91SAM9G20EK et al to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91SAM9G20EK
   CONFIG_AT91SAM9260EK
   CONFIG_AT91SAM9G20EK_2MMC

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
675e703d91 Convert CONFIG_AT91SAM9260 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91SAM9260
   CONFIG_AT91SAM9G20
   CONFIG_AT91SAM9XE
   CONFIG_AT91SAM9261
   CONFIG_AT91SAM9263
   CONFIG_AT91SAM9G45
   CONFIG_AT91SAM9M10G45
   CONFIG_AT91SAM9N12
   CONFIG_AT91SAM9RL
   CONFIG_AT91SAM9X5
   CONFIG_SAM9X60
   CONFIG_SAMA7G5
   CONFIG_SAMA5D2
   CONFIG_SAMA5D3
   CONFIG_SAMA5D4

These options are already select'd as needed, so we're just cleaning up
files here.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
ae3f467e84 Convert CONFIG_AM335X_USB0 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_AM335X_USB0
   CONFIG_AM335X_USB0_MODE
   CONFIG_AM335X_USB1
   CONFIG_AM335X_USB1_MODE

We do this by introducing specific options for static configuration of
USB0/USB1 in SPL rather than defining CONFIG_AM335X_USBx_MODE to the
enum value being used.  Furthermore, with how the code is used now we do
not need to have OTG mode exposed as an option here, so remove that.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
08f1d58aff net: fec_mxc: Drop CONFIG_FEC_XCV_TYPE
With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back.  Set the fallback directly now.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
b07fb55747 net: fec_mxc: Remove non-DM_ETH code
Now that all boards have been converted, remove the non-DM_ETH code.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
79b6eab0bd imx: Convert some boards to DM_ETH
A small number of i.MX6/7 and vf610 boards have not enabled DM_ETH yet.
Given the state of the rest of the platform, enable DM_ETH.

Cc: Alison Wang <alison.wang@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
0e14cdfaf3 Convert CONFIG_ETHPRIME to Kconfig
This converts the following to Kconfig:
   CONFIG_ETHPRIME

This is also done by adding a gating Kconfig option, CONFIG_USE_ETHPRIME
similar to other options that are not always set and control environment
variables.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
5d6a64f71d Remove CONFIG_HAS_ETH0 et al symbols
This converts removes the following symbols:
   CONFIG_HAS_ETH0
   CONFIG_HAS_ETH1
   CONFIG_HAS_ETH2
   CONFIG_HAS_ETH3

This is because at this point, only the ids8313 platform was using the
code which was controlled by these symbols.  In turn, this code already
performs error checking on being able to perform the device tree fixup.
Rather than convert these to Kconfig for a single platform, update the
code to not need these checks and remove them from all the platforms
they were unused on.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
eeda762af3 Convert CONFIG_NFS_TIMEOUT to Kconfig
This converts the following to Kconfig:
   CONFIG_NFS_TIMEOUT

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
69c8a817cf Convert CONFIG_BOOT_RETRY_TIME et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOT_RETRY_TIME
   CONFIG_BOOT_RETRY_MIN
   CONFIG_RESET_TO_RETRY

We also introduce CONFIG_BOOT_RETRY to gate these options, and clean up
the associated Makefile entry and C code for picking default values of
CONFIG_BOOT_RETRY_MIN.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
0b5870c3f5 powerpc: Move CONFIG_BPTR_VIRT_ADDR out of CONFIG namespace
This is only used in one file, and is never overridden.  Move this out
of CONFIG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
01d1b99c9b Convert CONFIG_NET_RETRY_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_NET_RETRY_COUNT

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
5d4e863bf8 Convert CONFIG_ARP_TIMEOUT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARP_TIMEOUT

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
5f7c886c82 Convert CONFIG_A008044_WORKAROUND to Kconfig
This converts the following to Kconfig:
   CONFIG_A008044_WORKAROUND

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
fdd0da4ca4 Convert CONFIG_A003399_NOR_WORKAROUND to Kconfig
This converts the following to Kconfig:
   CONFIG_A003399_NOR_WORKAROUND

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 12:48:17 -04:00
Tom Rini
b53a280b81 Convert CONFIG_ARMV8_SWITCH_TO_EL1 to Kconfig
This converts the following to Kconfig:
   CONFIG_ARMV8_SWITCH_TO_EL1

Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2022-03-18 12:48:17 -04:00
Tom Rini
0da35fa8d6 Convert CONFIG_ARMV7_SECURE_BASE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ARMV7_SECURE_BASE
   CONFIG_ARMV7_SECURE_MAX_SIZE
   CONFIG_ARMV7_SECURE_RESERVE_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 08:43:25 -04:00
Tom Rini
eb8eb31749 configs: Re-run migrations
As the CI test for stopping platforms from being merged that were
defining symbols that had Kconfig entries, a small number of symbols
needed to be migrated again.  Do so, and catch two cases the README
should also have been updated but was not.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 08:43:25 -04:00
Tom Rini
ab366418b5 Revert "efi: Allow easy selection of serial-only operation"
This commit re-introduced a migrated CONFIG symbol to the board header
file.  These changes should likely be handled via documentation instead,
as well.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-18 08:43:25 -04:00
Tom Rini
b3fe015893 sunxi: Do not define CONFIG_SPL_STACK_ADDR_R
We cannot define a CONFIG value here to ensure that the Kconfig value
isn't set wrong.

Fixes: 2c699fe0d3 ("configs: sunxi: Add common SUNIV header")
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 08:43:24 -04:00
Tom Rini
576eac8557 CI: Fix unmigrated symbol test
When calling comm to compare the CONFIG symbols a defconfig uses with
the symbols that have been migrated, we need to suppress all output as
the summary line will have everything we need.  Failure to do this leads
to the test blowing up, but in non-fatal ways.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18 08:43:24 -04:00
Tom Rini
297e6eb8dc Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.07-rc1

microblaze:
- Add support for reserved memory

xilinx:
- Update FRU code with MAC reading

zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0

zynq:
- Update nand binding

nand:
- Aligned zynq_nand to upstream DT binding

net:
- Add support for ethernet-phy-id

mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs

gpio:
- Add driver for slg7xl45106

firmware:
- Add support for dynamic SD config

power-domain:
- Update zynqmp driver with the latest firmware

video:
- Add skeleton driver for DP and DPDMA

i2c:
- Fix i2c to work with QEMU

pinctrl:
- Add driver for zynqmp pinctrl driver
2022-03-16 12:52:02 -04:00
Michal Simek
0ac03fbab5 arm64: zynqmp: Add pinctrl emmc description to SM-K26
Production SOM has emmc on it and make sense to describe pin description to
be able use EMMC if it is not configured via psu_init.
(Still some regs are not handled but this is one step in that direction)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3545a0f08d342de98efc82b78f5725eda091555a.1647267969.git.michal.simek@xilinx.com
2022-03-16 16:14:34 +01:00
Tom Rini
c24b4e4fb8 Merge branch '2022-03-15-add-erofs-support' into next
- Add erofs support
2022-03-16 08:09:12 -04:00
Huang Jianan
2c30aa3dbc test/py: Add tests for the erofs
Add Python scripts to test 'ls' and 'load' commands, as well as
test related filesystem functions.

Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
2022-03-15 16:19:51 -04:00
Huang Jianan
739941e11e fs/erofs: add filesystem commands
Add 'ls' and 'load' commands.

Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
2022-03-15 16:19:29 -04:00
Huang Jianan
65cb73057b fs/erofs: add lz4 decompression support
Support EROFS lz4 compressed files.

Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
2022-03-15 16:19:29 -04:00
Huang Jianan
26c7fdadcb lib/lz4: update LZ4 decompressor module
Update the LZ4 compression module based on LZ4 v1.8.3 in order to
use the newest LZ4_decompress_safe_partial() which can now decode
exactly the nb of bytes requested.

Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
2022-03-15 16:19:29 -04:00
Huang Jianan
830613f8f5 fs/erofs: add erofs filesystem support
This patch mainly deals with uncompressed files.

Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
2022-03-15 16:19:29 -04:00
Tom Rini
17af72eb16 CI, Docker: Update to latest focal tag
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-15 16:18:16 -04:00
Tom Rini
2abf048ab7 Merge tag 'v2022.04-rc4' into next
Prepare v2022.04-rc4
2022-03-14 17:40:36 -04:00
Michal Simek
e5d8d08981 arm64: zynqmp: Fix i2c addresses for zynqmp-p-a2197
After double checking some i2c addresses are not correct. It is visible
from i2c dump

ZynqMP> i2c bus
Bus 3:	i2c@ff020000
   74: i2c-mux@74, offset len 1, flags 0
Bus 5:	i2c@ff020000->i2c-mux@74->i2c@0
Bus 6:	i2c@ff020000->i2c-mux@74->i2c@2
Bus 7:	i2c@ff020000->i2c-mux@74->i2c@1
Bus 8:	i2c@ff020000->i2c-mux@74->i2c@3
Bus 4:	i2c@ff030000  (active 4)
   74: i2c-mux@74, offset len 1, flags 0
Bus 9:	i2c@ff030000->i2c-mux@74->i2c@0
Bus 10:	i2c@ff030000->i2c-mux@74->i2c@3
Bus 11:	i2c@ff030000->i2c-mux@74->i2c@4
Bus 12:	i2c@ff030000->i2c-mux@74->i2c@5  (active 12)
   51: generic_51, offset len 1, flags 0
   60: generic_60, offset len 1, flags 0
   74: generic_74, offset len 1, flags 0
Bus 13:	i2c@ff030000->i2c-mux@74->i2c@6  (active 13)
   51: generic_51, offset len 1, flags 0
   5d: generic_5d, offset len 1, flags 0
   74: generic_74, offset len 1, flags 0
ZynqMP> i2c dev 4
Setting bus to 4
ZynqMP> i2c mw 74 0 18
ZynqMP> i2c probe
Valid chip addresses: 18 36 37 50 51 60 74
ZynqMP> i2c mw 74 0 20
ZynqMP> i2c probe
Valid chip addresses: 51 60 74

where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is
also at address 0x60 based on log above.
i2c address 0x74 is i2c mux and 0x51 is eeprom.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
2022-03-14 15:24:04 +01:00
Ashok Reddy Soma
dbd673f14d pinctrl: zynqmp: Add pinctrl driver
Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with
linux device tree parameters for configuring pinmux and pinconf.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2d7eefa83c8c0129f7243a25de56a289e948f6c6.1645626183.git.michal.simek@xilinx.com
2022-03-14 15:23:31 +01:00
Ashok Reddy Soma
e19b8dda92 pinctrl: Increase length of pinmux status buffer
Xilinx ZynqMP SOC can set 6 parameters for its pins. pinmux status
command will print the status of these parameters for each pin. But
current print buffer length is only 40 characters long, increase it
to 80 to print all the parameters.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3a6be84c8354f38754a9838670cc0319e84f29e8.1645626183.git.michal.simek@xilinx.com
2022-03-14 15:23:26 +01:00
Michal Simek
57d820da97 cmd: test: pinmux: Do not check all empty spaces
There is really no value to check empty spaces. That's why use
ut_assert_nextlinen() instead of ut_assert_nextline().
This change ensures that PINMUX_SIZE can be increased without changing
tests.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/03aecf4c67ec8d72bf2a90baf1516fc5bd300fe0.1646668094.git.michal.simek@xilinx.com
2022-03-14 15:22:57 +01:00
Tom Rini
7b958ede8c Merge branch '2022-03-10-platform-updates' into next
- Assorted TI omap3, j7 platform updates
- Phytium Pomelo board
2022-03-14 09:05:06 -04:00
weichangzheng
b9d0f00a9d arm: add initial support for the Phytium Pomelo Board
This adds platform code and the device tree for the Phytium Pomelo Board.
The initial support comprises the UART and the PCIE.

Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
2022-03-10 13:57:04 -05:00
Adam Ford
901ff692d1 ARM: mach-omap2: omap3: Make clock functions static
get_osc_clk_speed and get_sys_clkin_sel are only used in
one file.  Make them static.

Tested on OMAP3530, DM3730, AM3517.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
6553f154f2 ARM: am3517_evm: Remove hard-coded pin muxing
With updated device trees now supporting pinmuxing for USB,
ethernet, MMC, and other peripherals necessary to start MLO
and U-Boot, the hard-coded pinmux options can be removed since
they are now handed by DM and only muxed when the respective
peripheral needs it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
72ce7818f9 ARM: dts: am3517-evm: Sync DTS with Linux 5.17-rc5
Sync the am3517-evm device tree files with those from Linux
5.17-rc5 with some additional fixes for pinmuxing Ethernet and
moving the pinmux references to the respective peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
08ff17d3b9 ARM: dts: logicpd-torpedo: Resyc DTS files with Linux 5.17-rc5
Resyc DTS files with Linux 5.17-rc5.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
735ec22375 ARM: omap3_logic: Remove hard-coded USB muxing
With recent fixes to USB pinmuxing in the device trees, there
is no need to hard-code the pinmuxing in this table.  It is
all handled in DM now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
d0331d46c8 ARM: dts: logicpd-som-lv: Resync DTS files with Linux 5.17-rc5
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5
with some additional pending changes to address issues with
wrong pin-muxing on the OMAP35.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-03-10 13:57:04 -05:00
Adam Ford
b2356be87d ARM: am3517-evm: Remove more non-DM legacy ethernet reset code
The ethernet controller is DM compliant, and the device tree
defines it.  There is no need to manually handle pulling
the ethernet out of reset.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2022-03-10 13:57:04 -05:00
Aswath Govindraju
019548efb0 configs: j721e_hs_evm_a72_defconfig: Add command for initializing QSGMII PHY
QSGMII PHY present on the j721e common processor board requires
to be initialized before the core boots up. Therefore, run the
corresponding command during boot to do the same.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-03-10 13:49:57 -05:00
Aswath Govindraju
b6c17e9175 configs: j721e_evm_a72_defconfig: Fix the bootcmd
Add the command "boot_rprocs" that is required for booting remote
processors in U-Boot.

Fixes: 5980925e2a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Jesse Villarreal <jesse.villarreal@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-03-10 13:49:57 -05:00
Aswath Govindraju
a30dc99b55 include: configs: j721e_evm.h: Fix the env variable corresponding to QSGMII PHY init
QSGMII PHY initialization should only be done for J721E EVMs and not for
J721E-SK boards. Therefore, fix the environment variables accordingly.

Also, by default remote processors should not be booted in U-Boot but
rather be left to the users to enable this by setting dorprocboot.
Therefore, remove dorprocboot that is being set by default.

Fixes: 5980925e2a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-03-10 13:49:57 -05:00
Joel Stanley
5bb26a59c4 ram: aspeed: Rework kconfig options
Ensure the ASPEED related options are grouped together under the RAM
option when enabling support.

This also makes some minor grammar corrections and renames options so
they present cleanly in menuconfig.

There should be no functional change to the configuration or binary.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-03-10 13:49:57 -05:00
Romain Naour
4d7de5c508 ARM: omap3_beagle: Enable DM_PMIC and DM_REGULATOR
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.

Based on commit [1][2].

[1] a40d3cc845
[2] 2448e42d73

Signed-off-by: Romain Naour <romain.naour@gmail.com>
2022-03-10 13:49:57 -05:00
Romain Naour
a7658396ee ARM: omap3_beagle: Enable Pinctrl
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.

Based on commit: 57dbf754e3

Signed-off-by: Romain Naour <romain.naour@gmail.com>
2022-03-10 13:49:57 -05:00
Romain Naour
848cfe098f ARM: omap3_beagle: Power on MMC when setting up PMIC
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.

This patch patch explicitly tells the twl4030 to power the MMC.

Based on commits [1][2].

[1] 64fd2d2614
[2] 27b6534491

Signed-off-by: Romain Naour <romain.naour@gmail.com>
2022-03-10 13:49:57 -05:00
Romain Naour
b2aac9c622 ARM: omap3_beagle: Remove non-DM initialization
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.

Based on omap3_logic: 42140dd096.

Signed-off-by: Romain Naour <romain.naour@gmail.com>
2022-03-10 13:49:57 -05:00
Tom Rini
cb83a7a0c3 Merge branch '2022-03-09-events-subsystem' into next
To quote the author:
It is a common need in U-Boot to have one subsystem notify another
when something happens. An example is reading a partition table when a
new block device is set up.

It is also common to add weak functions and 'hook' functions to modify
how U-Boot works. See for example ft_board_setup() and the like.

U-Boot would benefit from a generic mechanism to handle these cases,
with the ability to hook into various 'events' in a
subsystem-independent and transparent way.

This series provides a way to create and dispatch events, with a way of
registering a 'spy' which watches for events of different types. This
allows 'hook' functions to be created in a generic way.

It also includes a script to list the hooks in an image, which is a bit
easier to debug than weak functions, as well as an 'event' command to
do the same from within U-Boot.

These 'static' events can be used to replace hooks like misc_init_f(),
for example. Also included is basic support for 'dynamic' events, where
a spy can be registered at runtime. The need for this is still being
figured out.
2022-03-10 08:28:40 -05:00
Simon Glass
abe5d1184f event: Add documentation
Add documentation for events, including the event command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
9de3773a5c event: Add a script to decode the event-spy list
For debugging and dicoverability it is useful to be able to see a list of
each event spy in a U-Boot ELF file. Add a script which shows this, along
with the event type and the source location. This makes events a little
easier to use than weak functions, for example.

Add a basic sandbox test as well. We could provide a test for other
boards, but for now, few use events.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
c81b460c86 event: Add a command
Add a command to show the available events.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
7fe32b3442 event: Convert arch_cpu_init_dm() to use events
Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
42fdcebf85 event: Convert misc_init_f() to use events
This hook can be implmented using events, for the three boards that
actually use it.

Add the event type and event handlers. Drop CONFIG_MISC_INIT_F since we
can just use CONFIG_EVENT to control this. Since sandbox always enables
CONFIG_EVENT, we can drop the defconfig lines there too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
5b896ed585 event: Add events for device probe/remove
Generate events when devices are probed or removed, allowing hooks
to be added for these situations.

This is controlled by the DM_EVENT config option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
5a4219043d event: Set up the event system on start-up
Call event_init() before relocation to get the event system running.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
7d02645fe4 event: Add a simple test
Add a test for event registration and activation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
87a5d1b5d0 event: Add basic support for events
Add a way to create and dispatch events without needing to allocate
memory. Also add a way to 'spy' on events, thus allowing 'hooks' to be
created.

Use a linker list for static events, which we can use to replace functions
like arch_cpu_init_f(). Allow an EVENT_DEBUG option which makes it
easier to see what is going on at runtime, but uses more code space.

Dynamic events allow the creation of a spy at runtime. This is not always
necessary, but can be enabled with EVENT_DYNAMIC if needed.

A 'test' event is the only option for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
64defba4ea binman: Expand elf support a little
Allow finding a symbol by its address. Also export the function to get
the file offset of a particular address, so it can be used by a script to
be added.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
d41b703f45 sandbox: start: Sort the header files
These header files don't follow the correct order. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Michal Simek
a744a284e3 net: phy: Add support for ethernet-phy-id with gpio reset
Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perform phy reset. I can be workarounded by reset gpio done for mdio bus
but this is not working properly when multiply phys sitting on the same
bus. That's why it needs to be done via ethernet-phy-id driver where dt
binding has gpio reset per phy.

DT binding is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml

The driver is are reading the vendor and device id from valid phy node
using ofnode_read_eth_phy_id() and creating a phy device.
Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio
support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
2022-03-09 12:43:16 +01:00
Michal Simek
3249116d83 net: phy: Remove static return type for phy_device_create()
Remove static return type for phy_device_create() to avoid file scope for
this function. Also add required prototype in phy.h.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/1517f4053403fbd53e899d500e7485d068a4f0b6.1645627539.git.michal.simek@xilinx.com
2022-03-09 12:43:16 +01:00
Michal Simek
db681d4929 net: phy: Add new read ethernet phy id function
Add new function to get ethernet phy id from compatible property
of the mdio phy node.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/16019efb3820a50330935fdaae191cec1f101b5c.1645627539.git.michal.simek@xilinx.com
2022-03-09 12:43:16 +01:00
Michal Simek
d24b3e32ab MAINTAINERS: Remove duplicated entry for ehci-zynq.c
ehci-zynq.c is assigned to Zynq and ZynqMP that's why remove one.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d97779178fa56f1c6af40f5604b0bf349002cd36.1646639027.git.michal.simek@xilinx.com
2022-03-09 12:42:31 +01:00
Neal Frager
9fb9ec5e24 arm64: zynqmp: add support for zcu106 rev1.0
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has
newer x16 DDR4 memories and it is SW compatible with revA.

Signed-off-by: Neal Frager <neal.frager@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
2022-03-09 12:39:33 +01:00
Sai Pavan Boddu
f76f86029d i2c: i2c-cdns: Prevent early termination of write
During sequential loading of data, hold the bus to prevent controller
from sending stop signal in case no data is available in fifo.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
2022-03-09 12:36:37 +01:00
Sai Pavan Boddu
94b3f3fc7d i2c: i2c-cdns: Fix write transaction state
Start write transfer after loading data to FIFO.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
2022-03-09 12:36:37 +01:00
Sai Pavan Boddu
1bc2a79a4c i2c: i2c-cdns: Start read transaction after write to transfer_size reg
Avoid a race condition where read transaction is started
keeping expected bytes as 0. Which sometimes would result in sending
STOP signal as no data is expected. Observed on QEMU platform.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
2022-03-09 12:36:37 +01:00
Michal Simek
d926695cc5 dma: xilinx: Add Display Port DMA driver
Display Port (DP) has own dma driver that's why add this skeleton driver
only for handling power domain setting and send configuration object to
PMUFW to enable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/fe8bc313bcd430b04e9fa6fb770d5799ef28b350.1645627920.git.michal.simek@xilinx.com
2022-03-09 12:35:50 +01:00
Michal Simek
98cacab765 video: Add skeleton driver for ZynqMP Display port driver
The reason for this driver is to use call power management driver to enable
it in PMUFW. There is missing functionality now but should be added in
near future.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com
2022-03-09 12:35:49 +01:00
Ashok Reddy Soma
90ab7fafb6 mmc: zynq_sdhci: Add support for dynamic configuration
Add support for dynamic configuration which will takes care of
configuring the SD secure space configuration registers using firmware
APIs, performing SD reset assert and deassert.

High level sequence:
  - Check for the PM dynamic configuration support, if no error proceed
    with SD dynamic configurations(next steps) otherwise skip the dynamic
    configuration.
  - Put the SD Controller in reset.
  - Configure SD Fixed configurations.
  - Configure the SD Slot Type.
  - Configure the BASE_CLOCK.
  - Configure the 8-bit support.
  - Bring the SD Controller out of reset.

In the above steps, apart from the Fixed configurations, remaining all
configurations are dynamic and they will be read from devicetree.

And also remove hardcoded secure register writes, as dynamic sd config
support is added.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Ashok Reddy Soma
3adc17f60b lib: div64: Add support for round up of div64_u64
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 199999994hz, we will calculate
it using div64_u64(199999994, 1000000) and we will get 199Mhz in place
of 200Mhz.

Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken
from linux 'commit 68600f623d69("mm: don't miss the last page because of
round-off error")'.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Ashok Reddy Soma
7d9ee46672 firmware: zynqmp: Add support for set sd config and is function supported
Add firmware API's to set SD configuration and to check if a purticular
function is supported.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f64fa2f73e4775e9ad2f4d91339d6c74b43116a3.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Ashok Reddy Soma
de5358a82c firmware: zynqmp: Add and update firmware enums
Update enum pm_ioctl_id with more IOCTLs.
Add enum pm_sd_config_type to support dynamic sd configuration.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9aba090ec11d2591dbe6978e73e64384873c99fc.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Tom Rini
0bf4e0bb93 Merge branch '2022-03-07-add-platforms' into next
- bcm6753 support
- Aspeed GPIO driver
- AM33xx DT-related MMC updates
2022-03-07 16:20:36 -05:00
Andrew Jeffery
14d8610090 configs: evb-ast2[56]00: Enable GPIO control
Build in the driver for the Aspeed GPIO controller and turn on the
`gpio` shell command.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-03-07 11:36:12 -05:00
Andrew Jeffery
7da8754971 ARM: dts: ast2500: Add ngpios property to GPIO node
Populate gpio_count in the gpio subsystem for the AST2500.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-03-07 11:36:12 -05:00
Andrew Jeffery
7ad889b0f3 gpio: Add Aspeed GPIO driver
The Aspeed GPIO driver supports the GPIO controllers found in the
AST2400, AST2500 and AST2600 BMC SoCs. The implementation is a cut-down
copy of the upstream Linux kernel driver, adapted for u-boot.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
2022-03-07 11:36:12 -05:00
Lukasz Majewski
4a9099ef1c arm: dts: Add DTS description for MMC2 am33xx devices
This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi
file to allow correct usage of MMC2 controller in U-Boot.

This IP block is a bit specific as it is connected to L3 interconnect bus,
whereas mmc[01] are connected to L4.

Proper configuration of this block (including providing clock) is handled
in ti-sysc.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-03-07 11:36:12 -05:00
Lukasz Majewski
ab9e48f096 arm: dts: Add mmc[01] aliases to am33xx.dtsi
This change provides similar aliases definitions as now present in
Linux kernel v5.16.9 for am33xx.dtsi file.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-03-07 11:36:12 -05:00
Lukasz Majewski
497f57cfc2 arm: mmc: Add "ti, am335-sdhci" compatible for TI's omap_hsmmc driver
In the Linux kernel (v5.16) for this SoC there are two separate drivers
- namely sdhci-omap.c and omap_hsmmc.c which have separate set of
compatibles.

The U-Boot's drivers/mmc/omap_hsmmc.c driver supports both eMMC and
SD devices - hence the compatible for SDHCI can be added.

After this change the am335x DTS description can be easier ported
from Linux kernel.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
8fb30e3f80 configs: bcm96753ref_ram_defconfig: enable led support
Enable the led support on the refboard bcm96753ref.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
3bf5e4343c arch: arm: dts: bcm96753ref: enable led support
Enable the led in the device tree of the refboard bcm96753ref.
It also defines two leds (led_red ad led_green).

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
66425ca694 arch: arm: dts: bcm6753: add led support
Add a node leds to support the LED IP in the
device tree of the bcm6753.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
0d2001b105 drivers: led: led_bcm6753: initial support
Add the support of the LED IP for bcm6357. This
LED IP supports blinking, fading and pulsating,
but for the moment, only blinking is supported.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
a241ccdc44 bcm96753ref: add initial support
This add the initial support of the broadcom reference
board bcm96753ref with a bcm6753 SoC.

This board has 1 GB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
40ca58a8db watchdog: bcm6345: allow to use this driver on arm bcm6753
This IP is also used on some arm SoC, so we allow to
use it on arm bcm6753 too.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
0d32ebfcfa nand: brcmnand: add bcm6753 support
This adds the nand support for chipset bcm6753.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
c19eaef7e0 gpio: bcm6345: allow to use this driver on arm bcm6753
This IP is also used on some arm SoC, so we allow to
use it on arm bcm6753 too.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
1d5555fae4 bcm6753: add initial support
This add the initial support of the broadcom bcm6753 SoC family.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Michal Simek
2f6e1dde38 arm64: zynqmp: Fix level of gpio reset for usb on kv260 boards
Active level is low that's why it should be fixed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/86b3a96ce990b0ee0adab221146b5a5c751bd4a9.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
8b82a3a7fe arm64: zynqmp: Enable DP driver for SOMs
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot instance. It is called from board_f
via embedded_dtb_select(). That's why bind function is not able to allocate
memory and it ends up with error:
"Video device 'display@fd4a0000' cannot allocate frame buffer memory
-ensure the device is set up before relocation"

To avoid this situation DP is placed also to SOM where bind function is
called and frame buffer memory is allocated and just reused after DTB
reselection. Result is the same. There could be a problem in Linux with
different DP configurations but that's need to be solved there because
console should be on from u-boot already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
ff79448294 arm64: zynqmp: Switch to ethernet-phy-id in kv260
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
a3efa53c01 arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOM
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up proper clock for USBs
and SDs.
Also setup proper bus width for SD cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
59e1bdd48d arm64: zynqmp: Setup clock for DP and DPDMA
Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
c36dc2449b arm64: zynqmp: Move usb hub from i2c to usb node
Based on upstream discussion based on link below usb hub should be placed
to usb node directly as child node. Based on this Linux driver was updated
and the same change should be also reflected in kv260 board.

Link: https://lore.kernel.org/all/CAL_JsqJZBbu+UXqUNdZwg-uv0PAsNg55026PTwhKr5wQtxCjVQ@mail.gmail.com/
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/aa18df1978f161b933e6cdc6cd99c807b5f74398.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
d7b5cc89d3 microblaze: Do not place u-boot to reserved memory location
Microblaze can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in Zynqmp by commit
ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory location").

This feature was tested with this memory description on kc705:

	memory {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		alloc@b00000000 {
			reg = <0xb0000000 0x10000000>;
			no-map;
		};

		alloc@a8000000 {
			reg = <0xa8000000 0x00010000>;
			no-map;
		};
	};

And in U-Boot log you can check u-boot relocation address and reserved
locations.
U-Boot 2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100)

Model: Xilinx MicroBlaze
DRAM:  1 GiB
Flash: 128 MiB
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Model: Xilinx MicroBlaze
Net:   AXI EMAC: 40c00000, phyaddr 7, interface gmii
eth0: ethernet@40c00000
U-BOOT for microblaze-generic

U-Boot-mONStR> bdi
...
DRAM bank   = 0x00000000
-> start    = 0x80000000
-> size     = 0x40000000
...
relocaddr   = 0xaff69000
...
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]	[0x80000000-0xbfffffff], 0x40000000 bytes flags: 0
 reserved.cnt  = 0x3
 reserved[0]	[0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4
 reserved[1]	[0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0
 reserved[2]	[0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
fda7cbfefd power: zynqmp: Use zynqmp_pmufw_node() from firmware
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which
provides the same functionality.
Also add debug messages for easier debugging.

Fixes: e0283cbdfd ("power: zynqmp: Add power domain driver for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
T Karthik Reddy
15efe0f3a5 gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expander
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by
writing and reading corresponding gpo bit value into its data register.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Ashok Reddy Soma
980e55518f mmc: zynq_sdhci: Enable card detect workaround for ZynqMP
Card detect state stable issue is observed on few ZynqMP boards(SOM),
so enable the workaround 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' for ZynqMP platforms also.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Ashok Reddy Soma
8d32bca205 mmc: zynq_sdhci: Change granularity of timeout to 1us
The timeout used in 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' workaround is 1000ms at a
granularity of 1msec. Change it to 1usec, to not waste time incase the
cd is stable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Ashok Reddy Soma
c252b27747 mmc: zynq_sdhci: Fix timeout issue
In the workaround added with 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' the timeout variable has post
decrement. Whenever timeout happens, this post decrement is making
timeout=0xffffffff, so timeout error print and return statement are
never reached. Fix it by decrementing it inside the while loop.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Michael Walle
03a8e826e0 ARM: dts: zynq: add NAND flash controller node
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.

Also update cfi-flash registers and location in DT.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
2022-03-07 08:52:20 +01:00
Michal Simek
c2b74edf15 mtd: nand: Update driver to match new DT binding
New binding changed node name from flash@e1000000 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-03-07 08:52:20 +01:00
Ashok Reddy Soma
4173a42685 dm: pinctrl: Use explicit values for enums
Based on discussion at
https://lore.kernel.org/r/20200318125003.GA2727094@kroah.com we got
recommendation to use explicit values for all enums.

So, add explicit values to all pinctrl related enums for readability.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/dcdb20e7252ea7465e9f984d815e9624c30e9558.1645624969.git.michal.simek@xilinx.com
2022-03-07 08:49:42 +01:00
T Karthik Reddy
2569b51e32 Revert "board: zynqmp: Fix for wrong AMS setting by ROM"
This reverts commit dfbe492ede.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8 ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/215bc936e36f88d2e7c4422ec68cad6d40cb8f68.1645624892.git.michal.simek@xilinx.com
2022-03-07 08:49:08 +01:00
Ashok Reddy Soma
7a036b674f fru: ops: Add support to read mac addresses from multirecord
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.

Copy these read MAC address in xilinx_read_eeprom_fru so that they are
updated to eth*addr in board_late_init_xilinx().

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:22 +01:00
Ashok Reddy Soma
ff8ee707fb xilinx: common: Optimise updating ethaddr from eeprom
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
90e8f2db60 fru: ops: Return error from checksum if data is all zero's
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning error if all
the data is 0's.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ac0366fe55c60a818a3f9ed33d96826c817d5520.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
952b2e60de fru: ops: Clear fru table before storing data
Fill fru table with 0's before using it, to avoid junk data.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e5f15caf9c2102316e39f300d7c9c1ecb6be8439.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Tom Rini
fd690a5e93 Merge branch '2022-03-03-Kconfig-migrations' into next
- Assorted Kconfig migrations and related cleanups.
2022-03-03 16:51:45 -05:00
Tom Rini
f9147d636c Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig
This converts the following to Kconfig:
   CONFIG_CHIP_SELECTS_PER_CTRL

Cc: Alison Wang <alison.wang@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Tom Rini
819b4778d6 Convert CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to Kconfig
This converts the following to Kconfig:
   CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Tom Rini
f0171e7ea7 net: Remove CONFIG_BOOTP_DHCP_REQUEST_DELAY
This option is not in use anywhere and the documentation implies it's
for some very old and unlikely to be seen currently issues.  Rather than
update the code so the CONFIG symbol could be easily in Kconfig, remove
the code.

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-03-03 16:51:20 -05:00
Tom Rini
a542e4307d Convert CONFIG_BOOTP_MAY_FAIL et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_MAY_FAIL
   CONFIG_BOOTP_VENDOREX
   CONFIG_BOOTP_BOOTFILESIZE
   CONFIG_BOOTP_NISDOMAIN
   CONFIG_BOOTP_TIMEOFFSET

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Tom Rini
028aa0946f powerpc: P1010RDB: Move CONFIG_BOOTMODE out of CONFIG namespace
This slight environment modification shouldn't be in the CONFIG
namespace, change it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Tom Rini
fdfb17b1f5 Convert CONFIG_BOOTFILE to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTFILE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:20 -05:00
Tom Rini
6d21dd313b Convert CONFIG_BOARD_POSTCLK_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_POSTCLK_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
da8592d5fa Convert CONFIG_BOARD_ECC_SUPPORT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_ECC_SUPPORT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
2c58d2fccf Convert CONFIG_BIOSEMU to Kconfig
This converts the following to Kconfig:
   CONFIG_BIOSEMU

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
a7e6c6b1be Convert CONFIG_BOARD_COMMON to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_COMMON

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
43ea564652 arm: exynos: Move BL1/2 SPI flash defines to their user, drop CONFIG
These particular values are not configurable and today we always set
CONFIG_SECURE_BL1_ONLY.  Move these to where they're used in the code,
and drop from the CONFIG namespace.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2022-03-03 16:51:19 -05:00
Tom Rini
a3041d934f Convert CONFIG_BTB to Kconfig
This converts the following to Kconfig:
   CONFIG_BTB

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
3db7b2bb4c powerpc: Remove unused MPC8540/60ADS code
Remove some code, primarily CPM2 related, that is now unused since the
removal of MPC8540/60ADS.

Fixes 3913191c8a ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-03 16:51:19 -05:00
Tom Rini
09cb77d22e Merge branch '2022-03-02-scmi-updates' into next
- A small set of scmi updates
2022-03-03 14:16:14 -05:00
Etienne Carriere
7c33f78983 clk: scmi: register scmi clocks with CCF
Implements SCMI APIs to retrieve the number exposed SCMI clocks using
SCMI_PROTOCOL_ATTRIBUTES messages and the names of the clocks using
SCMI_CLOCK_ATTRIBUTES messages.

This change updates sandbox SCMI clock test driver to manage these
2 new message IDs.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Clement Leger <clement.leger@bootlin.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
10d3e5d20b firmware: scmi: fix sandbox and related tests for clock discovery
Updates sandbox SCMI clock driver and tests since enabling CCF will
mandate clock discovery that is all exposed SCMI clocks shall be
discovered at initialization. For this reason, sandbox SCMI clock
driver must emulate all clocks exposed by SCMI server, not only those
effectively consumed by some other U-Boot devices.

Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2)
and sandbox SCMI clock consumer driver gets 2 of them.

Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
6983710a31 scmi: change parameter dev in devm_scmi_process_msg
Changes devm_scmi_process_msg() first argument from target parent device
to current SCMI device and lookup the SCMI agent device among SCMI device
parents for find the SCMI agent operator needed for communication with
the firmware.

This change is needed in order to support CCF in clk_scmi driver unless
what CCF will fail to find the right udevice related to exposed SCMI
clocks.

This patch allows to simplify the caller sequence, using SCMI device
reference as parameter instead of knowing SCMI uclass topology. This
change also adds some protection in case devm_scmi_process_msg() API
function is called for an invalid device type.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
41d62e2f27 sandbox: scmi: test against a single scmi agent
As per DT bindings since Linux kernel v5.14, the device tree can define
only 1 SCMI agent node that is named scmi [1]. As a consequence, change
implementation of the SCMI driver test through sandbox architecture to
reflect that.

This change updates sandbox test DT and sandbox SCMI driver accordingly
since all these are impacted.

Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
4dea25a00d doc: binding: scmi: link to latest Linux kernel binding
Changes SCMI bindings documentation to relate to Linux kernel
source tree that recently changed the bindings description to YAML
format.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Tom Rini
2dfdba4a5a Merge branch '2022-03-02-armv8-fixes-and-cleanups' into next
To quote the author:
I was looking into the arm64 boot code lately and stumbled upon some
issues. Also Nishanth brought back memories of a lengthy debug session,
which was caused due to U-Boot keeping SErrors masked. As the resulting
patches are all somewhat related, I gathered this series here to address
those problems.

Patches 1 to 3 address exception handling issues, with the SError
enablement being the most prominent fix here.
Patch 4 cleans up asm/io.h. This was on the list before[1], but was
somehow lost when it was intercepted by a shorter version of itself.
Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly
code.
2022-03-02 13:59:33 -05:00
Andre Przywara
5ff4857d35 armv8: Fix and simplify branch_if_master/branch_if_slave
The branch_if_master macro jumps to a label if the CPU is the "master"
core, which we define as having all affinity levels set to 0. To check
for this condition, we need to mask off some bits from the MPIDR
register, then compare the remaining register value against zero.

The implementation of this was slighly broken (it preserved the upper
RES0 bits), overly complicated and hard to understand, especially since
it lacked comments. The same was true for the very similar
branch_if_slave macro.

Use a much shorter assembly sequence for those checks, use the same
masking for both macros (just negate the final branch), and put some
comments on them, to make it clear what the code does.
This allows to drop the second temporary register for branch_if_master,
so we adjust all call sites as well.

Also use the opportunity to remove a misleading comment: the macro
works fine on SoCs with multiple clusters. Judging by the commit
message, the original problem with the Juno SoC stems from the fact that
the master CPU *can* be configured to be from cluster 1, so the
assumption that the master CPU has all affinity values set to 0 does not
hold there. But this is already mentioned above in a comment, so remove
the extra comment.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Andre Przywara
f660fe0bd3 armv8: Simplify switch_el macro
The switch_el macro is a neat contraption to handle cases where we need
different code depending on the current exception level, but its
implementation was longer than needed.

Simplify it by doing just one comparison, then using the different
condition codes to branch to the desired target. PState.CurrentEL just
holds two bits, and since we don't care about EL0, we can use >, =, < to
select EL3, EL2 and EL1, respectively.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Andre Przywara
7ab2e47d27 arm: Clean up asm/io.h
asm/io.h is the header file containing the central MMIO accessor macros.
Judging by the header and the comments, it was apparently once copied
from the Linux kernel, but has deviated since then *heavily*. There is
absolutely no point in staying close to the original Linux code anymore,
so just remove the old cruft, by:
- removing pointless Linux history
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa)

This massively improves the readability of the file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Andre Przywara
7ed340a828 armv8: Force SP_ELx stack pointer usage
In ARMv8 we have the choice between two stack pointers to use: SP_EL0 or
SP_ELx, which is banked per exception level. This choice is stored in
the SP field of PState, and can be read and set via the SPSel special
register. When the CPU takes an exception, it automatically switches to
the SP_ELx stack pointer.

Trusted Firmware enters U-Boot typically with SPSel set to 1, so we use
SP_ELx all along as our sole stack pointer, both for normal operation and
for exceptions.

But if we now for some reason enter U-Boot with SPSel cleared, we will
setup and use SP_EL0, which is fine, but leaves SP_ELx uninitialised.
When we now take an exception, we try to save the GPRs to some undefined
location, which will usually end badly.

To make sure we always have SP_ELx pointing to some memory, set SPSel
to 1 in the early boot code, to ensure safe operation at all times.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Andre Przywara
6c7691edd5 armv8: Always unmask SErrors
The ARMv8 architecture describes the "SError interrupt" as the fourth
kind of exception, next to synchronous exceptions, IRQs, and FIQs.
Those SErrors signal exceptional conditions from which the system might
not easily recover, and are normally generated by the interconnect as a
response to some bus error. A typical situation is access to a
non-existing memory address or device, but it might be deliberately
triggered by a device as well.
The SError interrupt replaces the Armv7 asynchronous abort.

Trusted Firmware enters U-Boot (BL33) typically with SErrors masked,
and we never enable them. However any SError condition still triggers
the SError interrupt, and this condition stays pending, it just won't be
handled. If now later on the Linux kernel unmasks the "A" bit in PState,
it will immediately take the exception, leading to a kernel crash.
This leaves many people scratching their head about the reason for
this, and leads to long debug sessions, possibly looking at the wrong
places (the kernel, but not U-Boot).

To avoid the situation, just unmask SErrors early in the ARMv8 boot
process, so that the U-Boot exception handlers reports them in a timely
manner. As SErrors are typically asynchronous, the register dump does
not need to point at the actual culprit, but it should happen very
shortly after the condition.

For those exceptions to be taken, we also need to route them to EL2,
if U-Boot is running in this exception level.

This removes the respective code snippet from the Freescale lowlevel
routine, as this is now handled in generic ARMv8 code.

Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Andre Przywara
e7588d81cd cmd: exception: arm64: fix undefined, add faults
The arm64 version of the exception command was just defining the
undefined exception, but actually copied the AArch32 instruction.

Replace that with an encoding that is guaranteed to be and stay
undefined. Also add instructions to trigger unaligned access faults and
a breakpoint.
This brings ARM64 on par with ARM(32) for the exception command.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-02 13:59:29 -05:00
Tom Rini
f861ffa660 Merge branch '2022-03-02-enable-pylint-in-CI' into next
To quote the author:
This series adds a new errors-only pylint check and adds it to the CI
systems.

It also fixes the current errors in the U-Boot Python code, disabling
errors where it seems necessary.

A small patch to buildman allows it to build sandbox without any changes
to the default config file
2022-03-02 10:38:00 -05:00
Simon Glass
642e51addf Azure/GitLab CI: Add the pylint checker
Add a check that new Python code does not regress the pylint score for
any module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
fc8af3803f buildman: Update default config to build for sandbox
At present the default .buildman file written by buildman does not specify
a default toolchain. Add an 'other' line so this works correctly and
sandbox builds run as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
f44a52af4d Makefile: Add a way to check for pylint errors
Add a new 'pylint_err' target which only reports errors, not warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
9e0077796f test: Correct pylint errors
Fix pylint errors in all test.

This requires adding a get_spawn() method to the ConsoleBase base, so that
its subclass is happy.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
68a0b7156a moveconfig: Correct pylint errors
Fix two pylint errors in this file.

Note ACTION_SPL_NOT_EXIST is not defined so the dead code can be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
8d2ef3e993 binman: Correct pylint errors
Fix pylint errors that can be fixed and mask those that seem to be
incorrect.

A complication with binman is that it tries to avoid importing libfdt
(or anything that imports it) unless needed, so that things like help
still work if it is missing.

Note that two tests are duplicated in binman and two others have
duplicate names, so both of these issues are fixed also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
8a455fc08f dtoc: Correct pylint errors
Fix pylint errors in this directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
ac05335d85 buildman: Correct pylint errors
Fix pylint errors that can be fixed and mask those that seem to be
incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
Simon Glass
32cc6ae273 patman: Correct pylint errors
Fix pylint errors that can be fixed and mask those that seem to be
incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-02 10:28:12 -05:00
5841 changed files with 302951 additions and 125304 deletions

View File

@@ -1,8 +1,8 @@
variables:
windows_vm: windows-2019
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20220113-03Feb2022
ubuntu_vm: ubuntu-22.04
macos_vm: macOS-12
ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20220801-09Aug2022
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -22,8 +22,9 @@ stages:
displayName: 'Install MSYS2'
- script: |
sfx.exe -y -o%CD:~0,2%\
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syyuu"
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Su"
%CD:~0,2%\msys64\usr\bin\bash -lc " "
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syuu"
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm -Syuu"
displayName: 'Update MSYS2'
- script: |
%CD:~0,2%\msys64\usr\bin\bash -lc "pacman --noconfirm --needed -Sy make gcc bison flex diffutils openssl-devel libgnutls-devel libutil-linux-devel"
@@ -63,21 +64,26 @@ stages:
- script: |
KSYMLST=`mktemp`
KUSEDLST=`mktemp`
RET=0
cat `find . -name "Kconfig*"` | \
sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
-e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
| sort -u > $KSYMLST
for CFG in `find include/configs -name "*.h"`; do
grep '#define[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | \
(grep '#define[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ; \
grep '#undef[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') | \
sort -u > ${KUSEDLST} || true
NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \
NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \
cut -d , -f 3`
if [[ $NUM -ne 0 ]]; then
echo "Unmigrated symbols found in $CFG"
exit 1
echo "Unmigrated symbols found in $CFG:"
comm -12 ${KSYMLST} ${KUSEDLST}
RET=1
fi
done
exit $RET
- job: cppcheck
displayName: 'Static code analysis with cppcheck'
@@ -134,7 +140,7 @@ stages:
options: $(container_option)
steps:
- script: |
if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
./tools/buildman/buildman -R
- job: tools_only
displayName: 'Ensure host tools build'
@@ -164,13 +170,11 @@ stages:
vmImage: $(ubuntu_vm)
steps:
- script: |
cat << EOF > build.sh
set -ex
cd ${WORK_DIR}
EOF
cat << "EOF" >> build.sh
cat << "EOF" > build.sh
cd $(work_dir)
git config --global user.name "Azure Pipelines"
git config --global user.email bmeng.cn@gmail.com
git config --global --add safe.directory $(work_dir)
export USER=azure
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
@@ -179,6 +183,7 @@ stages:
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w --board sandbox_spl
set -ex
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
./tools/buildman/buildman -t
./tools/dtoc/dtoc -t
@@ -202,6 +207,29 @@ stages:
export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH
test/nokia_rx51_test.sh
- job: pylint
displayName: Check for any pylint regressions
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
git config --global --add safe.directory $(work_dir)
export USER=azure
pip install -r test/py/requirements.txt
pip install asteval pylint==2.12.2 pyopenssl
export PATH=${PATH}:~/.local/bin
echo "[MASTER]" >> .pylintrc
echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w --board sandbox_spl
set -ex
pylint --version
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
make pylint_err
- stage: test_py
jobs:
- job: test_py
@@ -218,6 +246,9 @@ stages:
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
sandbox_vpl:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "test_vpl_help or test_spl"
sandbox_noinst:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
@@ -230,6 +261,9 @@ stages:
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
evb_ast2600:
TEST_PY_BD: "evb-ast2600"
TEST_PY_ID: "--id qemu"
vexpress_ca9x4:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
@@ -404,10 +438,10 @@ stages:
vmImage: $(ubuntu_vm)
strategy:
# Use almost the same target division in .travis.yml, only merged
# 4 small build jobs (arc/microblaze/nds32/xtensa) into one.
# 3 small build jobs (arc/microblaze/xtensa) into one.
matrix:
arc_microblaze_nds32_xtensa:
BUILDMAN: "arc microblaze nds32 xtensa"
arc_microblaze_xtensa:
BUILDMAN: "arc microblaze xtensa"
arm11_arm7_arm920t_arm946es:
BUILDMAN: "arm11 arm7 arm920t arm946es"
arm926ejs:
@@ -442,6 +476,12 @@ stages:
BUILDMAN: "imx8"
keystone2_keystone3:
BUILDMAN: "k2 k3"
sandbox_asan:
BUILDMAN: "sandbox"
OVERRIDE: "-a ASAN"
sandbox_clang_asan:
BUILDMAN: "sandbox"
OVERRIDE: "-O clang-13 -a ASAN"
samsung_socfpga:
BUILDMAN: "samsung socfpga"
sun4i:
@@ -474,20 +514,8 @@ stages:
BUILDMAN: "m68k"
mips:
BUILDMAN: "mips"
non_fsl_ppc:
BUILDMAN: "powerpc -x freescale"
mpc85xx_freescale:
BUILDMAN: "mpc85xx&freescale -x t208xrdb -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x bsc91*"
t208xrdb_corenet_ds:
BUILDMAN: "t208xrdb corenet_ds"
fsl_ppc:
BUILDMAN: "mpc83xx&freescale"
t102x:
BUILDMAN: "t102*"
p1_p2_rdb_pc:
BUILDMAN: "p1_p2_rdb_pc"
p1010rdb_bsc91:
BUILDMAN: "p1010rdb bsc91"
powerpc:
BUILDMAN: "powerpc"
siemens:
BUILDMAN: "siemens"
tegra:

View File

@@ -1,6 +1,6 @@
Please do not submit a Pull Request via github. Our project makes use of
mailing lists for patch submission and review. For more details please
see https://www.denx.de/wiki/U-Boot/Patches
see https://u-boot.readthedocs.io/en/latest/develop/sending_patches.html
The only exception to this is in order to trigger a CI loop on Azure prior
to posting of patches.

2
.gitignore vendored
View File

@@ -10,6 +10,7 @@
*.asn1.[ch]
*.bin
*.cfgout
*.cover
*.dtb
*.dtbo
*.dtb.S
@@ -22,6 +23,7 @@
*.lex.c
*.lst
*.mod.c
*.mbx
*.o
*.o.*
*.order

View File

@@ -1,8 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
# Grab our configured image. The source for this is found at:
# https://source.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:focal-20220113-03Feb2022
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
image: trini/u-boot-gitlab-ci-runner:jammy-20220801-09Aug2022
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -124,21 +124,26 @@ check for migrated symbols in board header:
script:
- KSYMLST=`mktemp`;
KUSEDLST=`mktemp`;
RET=0;
cat `find . -name "Kconfig*"` |
sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p'
-e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p'
| sort -u > $KSYMLST;
for CFG in `find include/configs -name "*.h"`; do
grep '#define[[:blank:]]CONFIG_' $CFG |
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' |
(grep '#define[[:blank:]]CONFIG_' $CFG |
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ;
grep '#undef[[:blank:]]CONFIG_' $CFG |
sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') |
sort -u > ${KUSEDLST} || true;
NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} |
NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} |
cut -d , -f 3`;
if [[ $NUM -ne 0 ]]; then
echo "Unmigrated symbols found in $CFG";
exit 1;
echo "Unmigrated symbols found in $CFG:";
comm -12 ${KSYMLST} ${KUSEDLST};
RET=1;
fi;
done
done;
exit $RET
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
@@ -175,7 +180,7 @@ sloccount:
Check for configs without MAINTAINERS entry:
stage: testsuites
script:
- if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
- ./tools/buildman/buildman -R
# Ensure host tools build
Build tools-only:
@@ -194,6 +199,7 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
script:
- git config --global user.name "GitLab CI Runner";
git config --global user.email trini@konsulko.com;
git config --global --add safe.directory "${CI_PROJECT_DIR}";
export USER=gitlab;
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
@@ -201,8 +207,10 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl;
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
set +e;
./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w
--board sandbox_spl;
set -e;
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
./tools/buildman/buildman -t;
./tools/dtoc/dtoc -t;
@@ -215,6 +223,25 @@ Run tests for Nokia RX-51 (aka N900):
- export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH;
test/nokia_rx51_test.sh
# Check for any pylint regressions
Run pylint:
stage: testsuites
script:
- git config --global --add safe.directory "${CI_PROJECT_DIR}"
- pip install -r test/py/requirements.txt
- pip install asteval pylint==2.12.2 pyopenssl
- export PATH=${PATH}:~/.local/bin
- echo "[MASTER]" >> .pylintrc
- echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
- set +e
- ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w
--board sandbox_spl
- set -e
- pylint --version
- export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
- make pylint_err
# Test sandbox with test.py
sandbox test.py:
variables:
@@ -239,12 +266,24 @@ sandbox_noinst_test.py:
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
<<: *buildman_and_testpy_dfn
sandbox_vpl test.py:
variables:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "test_vpl_help or test_spl"
<<: *buildman_and_testpy_dfn
evb-ast2500 test.py:
variables:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
evb-ast2600 test.py:
variables:
TEST_PY_BD: "evb-ast2600"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
sandbox_flattree test.py:
variables:
TEST_PY_BD: "sandbox_flattree"

View File

@@ -37,15 +37,19 @@ Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
Marek Behún <kabel@kernel.org> Marek Behun <marek.behun@nic.cz>
Marek Vasut <marex@denx.de> <marek.vasut+renesas@gmail.com>
Marek Vasut <marex@denx.de> <marek.vasut@gmail.com>
Marek Vasut <marex@denx.de> <marex at denx.de>
Markus Klotzbuecher <mk@denx.de>
Masahiro Yamada <yamada.masahiro@socionext.com> <yamada.m@jp.panasonic.com>
Masahiro Yamada <yamada.masahiro@socionext.com> <masahiroy@kernel.org>
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
Michal Simek <michal.simek@xilinx.com> <monstr@monstr.eu>
Michal Simek <michal.simek@xilinx.com> <Monstr@seznam.cz>
Michal Simek <michal.simek@xilinx.com> <root@monstr.eu>
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
Patrice Chotard <patrice.chotard@foss.st.com> <patrice.chotard@st.com>
Patrick Delaunay <patrick.delaunay@foss.st.com> <patrick.delaunay@st.com>

140
Kconfig
View File

@@ -72,15 +72,32 @@ config CLANG_VERSION
int
default $(shell,$(srctree)/scripts/clang-version.sh $(CC))
choice
prompt "Optimization level"
default CC_OPTIMIZE_FOR_SIZE
config CC_OPTIMIZE_FOR_SIZE
bool "Optimize for size"
default y
help
Enabling this option will pass "-Os" instead of "-O2" to gcc
resulting in a smaller U-Boot image.
Enabling this option will pass "-Os" to gcc, resulting in a smaller
U-Boot image.
This option is enabled by default for U-Boot.
config CC_OPTIMIZE_FOR_SPEED
bool "Optimize for speed"
help
Enabling this option will pass "-O2" to gcc, resulting in a faster
U-Boot image.
config CC_OPTIMIZE_FOR_DEBUG
bool "Optimize for debugging"
help
Enabling this option will pass "-Og" to gcc, enabling optimizations
which don't interfere with debugging.
endchoice
config OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in full U-Boot"
help
@@ -137,6 +154,22 @@ config CC_COVERAGE
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config ASAN
bool "Enable AddressSanitizer"
depends on SANDBOX
help
Enables AddressSanitizer to discover out-of-bounds accesses,
use-after-free, double-free and memory leaks.
config FUZZ
bool "Enable fuzzing"
depends on CC_IS_CLANG
depends on DM_FUZZING_ENGINE
select ASAN
help
Enables the fuzzing infrastructure to generate fuzzing data and run
fuzz tests.
config CC_HAS_ASM_INLINE
def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)
@@ -211,12 +244,38 @@ config SYS_BOOT_GET_CMDLINE
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BARGSIZE
int "Size of kernel command line buffer in bytes"
depends on SYS_BOOT_GET_CMDLINE
default 512
help
Buffer size for Boot Arguments which are passed to the application
(usually a Linux kernel) when it is booted
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config HAS_CUSTOM_SYS_INIT_SP_ADDR
bool "Use a custom location for the initial stack pointer address"
depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV
default y if TFABOOT
help
Typically, we use an initial stack pointer address that is calculated
by taking the statically defined CONFIG_SYS_INIT_RAM_ADDR, adding the
statically defined CONFIG_SYS_INIT_RAM_SIZE and then subtracting the
build-time constant of GENERATED_GBL_DATA_SIZE. On MIPS a different
but statica calculation is performed. However, some platforms will
take a different approach. Say Y here to define the address statically
instead.
config CUSTOM_SYS_INIT_SP_ADDR
hex "Static location for the initial stack pointer"
depends on HAS_CUSTOM_SYS_INIT_SP_ADDR
default SYS_TEXT_BASE if TFABOOT
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
@@ -230,13 +289,18 @@ config SYS_MALLOC_F
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
default 0x1000 if AM33XX
default 0x4000 if SANDBOX
default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \
ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \
ARCH_LS1046A || ARCH_QEMU || ARCH_SUNXI || ARCH_OWL)
default 0x400
default 0x400 if M68K || PPC || ROCKCHIP_PX30 || ROCKCHIP_RK3036 || \
ROCKCHIP_RK3308 || ROCKCHIP_RV1108
default 0x600 if ARCH_ZYNQMP_R5 || ARCH_ZYNQMP
default 0x800 if ARCH_ZYNQ || ROCKCHIP_RK3128 || ROCKCHIP_RK3188 || \
ROCKCHIP_RK322X || X86
default 0x1000 if ARCH_MESON || ARCH_BMIPS || ARCH_MTMIPS
default 0x1800 if ARCH_TEGRA
default 0x4000 if SANDBOX || RISCV || ARCH_APPLE || ROCKCHIP_RK3368 || \
ROCKCHIP_RK3399
default 0x8000 if RCAR_GEN3
default 0x10000 if ARCH_IMX8 || ARCH_IMX8M
default 0x2000
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
@@ -245,6 +309,7 @@ config SYS_MALLOC_F_LEN
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
default 0x4000000 if SANDBOX
default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON
default 0x200000 if ARCH_BMIPS || X86
default 0x120000 if MACH_SUNIV
@@ -258,7 +323,9 @@ config SYS_MALLOC_LEN
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL"
depends on SYS_MALLOC_F && SPL
default 0 if !SPL_FRAMEWORK
default 0x2800 if RCAR_GEN3
default 0x2000 if IMX8MQ
default SYS_MALLOC_F_LEN
help
In SPL memory is very limited on many platforms. Still,
@@ -279,6 +346,31 @@ config TPL_SYS_MALLOC_F_LEN
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config VALGRIND
bool "Inform valgrind about memory allocations"
depends on !RISCV
help
Valgrind is an instrumentation framework for building dynamic analysis
tools. In particular, it may be used to detect memory management bugs
in U-Boot. It relies on knowing when heap blocks are allocated in
order to give accurate results. This happens automatically for
standard allocator functions provided by the host OS. However, this
doesn't automatically happen for U-Boot's malloc implementation.
Enable this option to annotate U-Boot's malloc implementation so that
it can be handled accurately by Valgrind. If you aren't planning on
using valgrind to debug U-Boot, say 'n'.
config VPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in VPL before relocation"
depends on SYS_MALLOC_F && VPL
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
@@ -378,6 +470,23 @@ config BUILD_TARGET
special image will be automatically built upon calling
make / buildman.
config HAS_BOARD_SIZE_LIMIT
bool "Define a maximum size for the U-Boot image"
default y if RCAR_GEN3
help
In some cases, we need to enforce a hard limit on how big the U-Boot
image itself can be.
config BOARD_SIZE_LIMIT
int "Maximum size of the U-Boot image in bytes"
default 1048576 if RCAR_GEN3
depends on HAS_BOARD_SIZE_LIMIT
help
Maximum size of the U-Boot image. When defined, the build system
checks that the actual size does not exceed it. This does not
include SPL nor TPL, on platforms that use that functionality, they
have a separate option to restict size.
config SYS_CUSTOM_LDSCRIPT
bool "Use a custom location for the U-Boot linker script"
help
@@ -439,6 +548,17 @@ config STACK_SIZE
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
config SYS_MEM_TOP_HIDE
hex "Exclude some memory from U-Boot / OS information"
default 0x0
help
If set, this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By fixing up
gd->ram_size the OS / next stage should gets passed the now
"corrected" memory size and won't touch it either.
WARNING: Please make sure that this value is a multiple of the OS
page size.
config SYS_HAS_SRAM
bool
default y if TARGET_PIC32MZDASK

View File

@@ -139,6 +139,7 @@ License identifier syntax
Full name SPDX Identifier OSI Approved File name URI
=======================================================================================================================================
bzip2 and libbzip2 License v1.0.6 bzip2-1.0.6 bzip2-1.0.6.txt https://spdx.org/licenses/bzip2-1.0.6.html
GNU General Public License v2.0 only GPL-2.0 Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU General Public License v2.0 or later GPL-2.0+ Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt

30
Licenses/bzip2-1.0.6.txt Normal file
View File

@@ -0,0 +1,30 @@
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. The origin of this software must not be misrepresented; you must
not claim that you wrote the original software. If you use this
software in a product, an acknowledgment in the product
documentation would be appreciated but is not required.
3. Altered source versions must be plainly marked as such, and must
not be misrepresented as being the original software.
4. The name of the author may not be used to endorse or promote
products derived from this software without specific prior written
permission.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -121,6 +121,7 @@ F: arch/arm/include/asm/arch-m1/
F: arch/arm/mach-apple/
F: configs/apple_m1_defconfig
F: drivers/iommu/apple_dart.c
F: drivers/nvme/nvme_apple.c
F: drivers/pinctrl/pinctrl-apple.c
F: drivers/watchdog/apple_wdt.c
F: include/configs/apple.h
@@ -142,7 +143,7 @@ F: arch/arm/mach-socfpga/
F: drivers/sysreset/sysreset_socfpga*
ARM AMLOGIC SOC SUPPORT
M: Neil Armstrong <narmstrong@baylibre.com>
M: Neil Armstrong <neil.armstrong@linaro.org>
S: Maintained
L: u-boot-amlogic@groups.io
T: git https://source.denx.de/u-boot/custodians/u-boot-amlogic.git
@@ -160,6 +161,7 @@ F: drivers/spi/meson_spifc.c
F: drivers/pinctrl/meson/
F: drivers/power/domain/meson-gx-pwrc-vpu.c
F: drivers/video/meson/
F: drivers/watchdog/meson_gxbb_wdt.c
F: include/configs/meson64.h
F: include/configs/meson64_android.h
F: doc/board/amlogic/
@@ -169,12 +171,23 @@ ARM ASPEED
M: Ryan Chen <ryan_chen@aspeedtech.com>
M: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
R: Aspeed BMC SW team <BMC-SW@aspeedtech.com>
R: Joel Stanley <joel@jms.id.au>
S: Maintained
F: arch/arm/mach-aspeed/
F: arch/arm/include/asm/arch-aspeed/
F: board/aspeed/
F: drivers/clk/aspeed/
F: drivers/crypto/aspeed/
F: drivers/gpio/gpio-aspeed.c
F: drivers/i2c/ast_i2c.[ch]
F: drivers/mmc/aspeed_sdhci.c
F: drivers/net/aspeed_mdio.c
F: drivers/net/ftgmac100.[ch]
F: drivers/pinctrl/aspeed/
F: drivers/pwm/pwm-aspeed.c
F: drivers/ram/aspeed/
F: drivers/reset/reset-ast2500.c
F: drivers/watchdog/ast_wdt.c
N: aspeed
ARM BROADCOM BCM283X / BCM27XX
@@ -195,6 +208,17 @@ F: drivers/pinctrl/broadcom/
F: configs/rpi_*
T: git https://source.denx.de/u-boot/custodians/u-boot-arm.git
ARM BROADCOM BCMBCA
M: Anand Gore <anand.gore@broadcom.com>
M: William Zhang <william.zhang@broadcom.com>
M: Kursad Oney <kursad.oney@broadcom.com>
M: Joel Peshkin <joel.peshkin@broadcom.com>
S: Maintained
F: arch/arm/mach-bcmbca/
F: board/broadcom/bcmbca/
F: configs/bcm947622_defconfig
F: include/configs/bcm947622.h
ARM BROADCOM BCMSTB
M: Thomas Fitzsimmons <fitzsim@fitzsim.org>
S: Maintained
@@ -224,14 +248,6 @@ F: drivers/net/cortina_ni.h
F: drivers/net/phy/ca_phy.c
F: configs/cortina_presidio-asic-pnand_defconfig
ARM/CZ.NIC TURRIS MOX SUPPORT
M: Marek Behun <marek.behun@nic.cz>
S: Maintained
F: arch/arm/dts/armada-3720-turris-mox.dts
F: board/CZ.NIC/
F: configs/turris_*_defconfig
F: include/configs/turris_*.h
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
M: Fabio Estevam <festevam@gmail.com>
@@ -243,11 +259,12 @@ F: arch/arm/cpu/arm926ejs/mx*/
F: arch/arm/cpu/armv7/vf610/
F: arch/arm/dts/*imx*
F: arch/arm/mach-imx/
F: arch/arm/include/asm/arch-imx/
F: arch/arm/include/asm/arch-imx*/
F: arch/arm/include/asm/arch-mx*/
F: arch/arm/include/asm/arch-vf610/
F: arch/arm/include/asm/mach-imx/
F: board/freescale/*mx*/
F: drivers/serial/serial_mxc.c
ARM HISILICON
M: Peter Griffin <peter.griffin@linaro.org>
@@ -257,6 +274,19 @@ F: arch/arm/cpu/armv8/hisilicon
F: arch/arm/include/asm/arch-hi6220/
F: arch/arm/include/asm/arch-hi3660/
ARM HPE GXP ARCHITECTURE
M: Jean-Marie Verdun <verdun@hpe.com>
M: Nick Hawkins <nick.hawkins@hpe.com>
S: Maintained
F: arch/arm/dts/hpe-bmc*
F: arch/arm/dts/hpe-gxp*
F: arch/arm/mach-hpe/
F: board/hpe/
F: configs/gxp_defconfig
F: doc/device-tree-bindings/spi/hpe,gxp-spi.yaml
F: drivers/timer/gxp-timer.c
F: drivers/spi/gxp_spi.c
ARM IPQ40XX
M: Robert Marko <robert.marko@sartura.hr>
M: Luka Kovacic <luka.kovacic@sartura.hr>
@@ -271,6 +301,11 @@ F: drivers/spi/spi-qup.c
F: drivers/net/mdio-ipq4019.c
F: drivers/rng/msm_rng.c
ARM LAYERSCAPE SFP
M: Sean Anderson <sean.anderson@seco.com>
S: Maintained
F: drivers/misc/ls2_sfp.c
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
M: Stefan Roese <sr@denx.de>
S: Maintained
@@ -308,13 +343,6 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git
F: drivers/serial/serial_mvebu_a3700.c
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-pxa.git
F: arch/arm/cpu/pxa/
F: arch/arm/include/asm/arch-pxa/
ARM MEDIATEK
M: Ryder Lee <ryder.lee@mediatek.com>
M: Weijie Gao <weijie.gao@mediatek.com>
@@ -344,6 +372,14 @@ F: tools/mtk_image.c
F: tools/mtk_image.h
N: mediatek
ARM METHODE SUPPORT
M: Robert Marko <robert.marko@sartura.hr>
S: Maintained
F: arch/arm/dts/armada-3720-eDPU*
F: arch/arm/dts/armada-3720-uDPU*
F: configs/eDPU_defconfig
F: configs/uDPU_defconfig
ARM MICROCHIP/ATMEL AT91
M: Eugen Hristev <eugen.hristev@microchip.com>
S: Maintained
@@ -352,6 +388,7 @@ F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/cpu/at91_cpu.c
F: drivers/misc/microchip_flexcom.c
F: drivers/timer/atmel_tcb_timer.c
F: include/dt-bindings/mfd/atmel-flexcom.h
F: drivers/timer/mchp-pit64b-timer.c
@@ -468,7 +505,7 @@ S: Maintained
F: arch/arm/mach-stm32mp/
F: doc/board/st/
F: drivers/adc/stm32-adc*
F: drivers/clk/clk_stm32mp1.c
F: drivers/clk/stm32/
F: drivers/gpio/stm32_gpio.c
F: drivers/hwspinlock/stm32_hwspinlock.c
F: drivers/i2c/stm32f7_i2c.c
@@ -485,6 +522,7 @@ F: drivers/power/regulator/stpmic1.c
F: drivers/ram/stm32mp1/
F: drivers/remoteproc/stm32_copro.c
F: drivers/reset/stm32-reset.c
F: drivers/rng/optee_rng.c
F: drivers/rng/stm32mp1_rng.c
F: drivers/rtc/stm32_rtc.c
F: drivers/serial/serial_stm32.*
@@ -520,7 +558,9 @@ F: arch/arm/mach-sunxi/
F: board/sunxi/
F: drivers/clk/sunxi/
F: drivers/phy/allwinner/
F: drivers/pinctrl/sunxi/
F: drivers/video/sunxi/
F: tools/sunxi*
ARM TEGRA
M: Tom Warren <twarren@nvidia.com>
@@ -590,12 +630,13 @@ F: configs/uniphier_*_defconfig
N: uniphier
ARM VERSAL
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-versal/
F: drivers/net/xilinx_axi_mrmac.*
F: drivers/soc/soc_xilinx_versal.c
F: drivers/spi/cadence_ospi_versal.c
F: drivers/watchdog/xilinx_wwdt.c
N: (?<!uni)versal
@@ -621,8 +662,10 @@ F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/raw/zynq_nand.c
F: drivers/net/phy/ethernet_id.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/pinctrl/pinctrl-zynqmp.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
@@ -633,13 +676,14 @@ F: tools/zynqimage.c
N: zynq
ARM ZYNQMP
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp/
F: drivers/clk/clk_zynqmp.c
F: driver/firmware/firmware-zynqmp.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/gpio_slg7xl45106.c
F: drivers/gpio/zynq_gpio.c
F: drivers/gpio/zynqmp_gpio_modepin.c
F: drivers/i2c/i2c-cdns.c
@@ -652,6 +696,7 @@ F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/phy/phy-zynqmp.c
F: drivers/power/domain/zynqmp-power-domain.c
F: drivers/pwm/pwm-cadence-ttc.c
F: drivers/serial/serial_zynq.c
F: drivers/reset/reset-zynqmp.c
F: drivers/rtc/zynqmp_rtc.c
@@ -659,7 +704,6 @@ F: drivers/soc/soc_xilinx_zynqmp.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/timer/cadence-ttc.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/video/seps525.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmppl.h
@@ -669,7 +713,7 @@ N: ultra96
N: zynqmp
ARM ZYNQMP R5
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp-r5/
@@ -683,11 +727,33 @@ F: arch/arm/dts/phytium-durian.dts
BINMAN
M: Simon Glass <sjg@chromium.org>
M: Alper Nebi Yasak <alpernebiyasak@gmail.com>
S: Maintained
F: tools/binman/
BOOTDEVICE
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: boot/bootdev*.c
F: boot/bootflow.c
F: boot/bootmeth*.c
F: boot/bootstd.c
F: cmd/bootdev.c
F: cmd/bootflow.c
F: doc/develop/bootstd.rst
F: doc/usage/bootdev.rst
F: doc/usage/bootflow.rst
F: doc/usage/bootmeth.rst
F: drivers/mmc/mmc_bootdev.c
F: include/bootdev.h
F: include/bootflow.h
F: include/bootmeth.h
F: include/bootstd.h
F: net/eth_bootdevice.c
F: test/boot/
BTRFS
M: Marek Behun <marek.behun@nic.cz>
M: Marek Behún <kabel@kernel.org>
R: Qu Wenruo <wqu@suse.com>
L: linux-btrfs@vger.kernel.org
S: Maintained
@@ -763,6 +829,7 @@ F: test/dm/efi_media.c
EFI PAYLOAD
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
M: Ilias Apalodimas <ilias.apalodimas@linaro.org>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-efi.git
F: doc/api/efi.rst
@@ -813,6 +880,25 @@ S: Maintained
F: doc/usage/environment.rst
F: scripts/env2string.awk
EROFS
M: Huang Jianan <jnhuang95@gmail.com>
L: linux-erofs@lists.ozlabs.org
S: Maintained
F: cmd/erofs.c
F: fs/erofs/
F: include/erofs.h
F: test/py/tests/test_fs/test_erofs.py
EVENTS
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: cmd/event.c
F: common/event.c
F: include/event.h
F: scripts/event_dump.py
F: test/common/event.c
F: test/py/tests/test_event_dump.py
FASTBOOT
S: Orphaned
F: cmd/fastboot.c
@@ -826,7 +912,7 @@ F: net/fastboot.c
F: test/dm/fastboot.c
FPGA
M: Michal Simek <michal.simek@xilinx.com>
M: Michal Simek <michal.simek@amd.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: drivers/fpga/
@@ -857,6 +943,12 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git
F: drivers/watchdog/sp805_wdt.c
F: drivers/watchdog/sbsa_gwdt.c
GATEWORKS_SC
M: Tim Harvey <tharvey@gateworks.com>
S: Maintained
F: drivers/misc/gsc.c
F: include/gsc.h
I2C
M: Heiko Schocher <hs@denx.de>
S: Maintained
@@ -865,7 +957,7 @@ F: drivers/i2c/
KWBIMAGE / KWBOOT TOOLS
M: Pali Rohár <pali@kernel.org>
M: Marek Behún <marek.behun@nic.cz>
M: Marek Behún <kabel@kernel.org>
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git
@@ -873,6 +965,12 @@ F: doc/README.kwbimage
F: doc/kwboot.1
F: tools/kwb*
LED
M: Ivan Vozvakhov <i.vozvakhov@vk.team>
S: Supported
F: doc/device-tree-bindings/leds/leds-pwm.txt
F: drivers/led/led_pwm.c
LOGGING
M: Simon Glass <sjg@chromium.org>
S: Maintained
@@ -904,6 +1002,7 @@ F: drivers/net/xilinx_emaclite.c
F: drivers/serial/serial_xuartlite.c
F: drivers/spi/xilinx_spi.c
F: drivers/sysreset/sysreset_gpio.c
F: drivers/timer/xilinx-timer.c
F: drivers/watchdog/xilinx_tb_wdt.c
N: xilinx
@@ -935,15 +1034,23 @@ R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>
S: Maintained
F: arch/mips/mach-mtmips/
F: arch/mips/dts/mt7620.dtsi
F: arch/mips/dts/mt7621.dtsi
F: arch/mips/dts/mt7620-u-boot.dtsi
F: arch/mips/dts/mt7621-u-boot.dtsi
F: include/configs/mt7620.h
F: include/configs/mt7621.h
F: include/dt-bindings/clock/mt7620-clk.h
F: include/dt-bindings/clock/mt7621-clk.h
F: include/dt-bindings/clock/mt7628-clk.h
F: include/dt-bindings/reset/mt7620-reset.h
F: include/dt-bindings/reset/mt7621-reset.h
F: include/dt-bindings/reset/mt7628-reset.h
F: drivers/clk/mtmips/
F: drivers/pinctrl/mtmips/
F: drivers/gpio/mt7620_gpio.c
F: drivers/mtd/nand/raw/mt7621_nand.c
F: drivers/mtd/nand/raw/mt7621_nand.h
F: drivers/mtd/nand/raw/mt7621_nand_spl.c
F: drivers/net/mt7620-eth.c
F: drivers/phy/mt7620-usb-phy.c
F: drivers/reset/reset-mtmips.c
@@ -992,17 +1099,12 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
#M: Scott Wood <oss@buserror.net>
S: Orphaned (Since 2018-07)
M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
M: Michael Trimarchi <michael@amarulasolutions.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
F: drivers/mtd/nand/raw/
NDS32
M: Rick Chen <rick@andestech.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
M: Ramon Fried <rfried.dev@gmail.com>
@@ -1026,6 +1128,13 @@ F: cmd/nvme.c
F: include/nvme.h
F: doc/develop/driver-model/nvme.rst
NVMEM
M: Sean Anderson <seanga2@gmail.com>
S: Maintained
F: doc/api/nvmem.rst
F: drivers/misc/nvmem.c
F: include/nvmem.h
NXP C45 TJA11XX PHY DRIVER
M: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
S: Maintained
@@ -1101,7 +1210,7 @@ F: arch/powerpc/cpu/mpc83xx/
F: arch/powerpc/include/asm/arch-mpc83xx/
POWERPC MPC85XX
M: Priyanka Jain <priyanka.jain@nxp.com>
M: Marek Behún <kabel@kernel.org>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-mpc85xx.git
F: arch/powerpc/cpu/mpc85xx/
@@ -1152,6 +1261,11 @@ F: arch/sandbox/
F: doc/arch/sandbox.rst
F: include/dt-bindings/*/sandbox*.h
SEMIHOSTING
R: Sean Anderson <sean.anderson@seco.com>
S: Orphaned
N: semihosting
SETEXPR
M: Roland Gaudig <roland.gaudig@weidmueller.com>
S: Maintained
@@ -1172,6 +1286,11 @@ F: drivers/gpio/sl28cpld-gpio.c
F: drivers/misc/sl28cpld.c
F: drivers/watchdog/sl28cpld-wdt.c
SMCCC TRNG
M: Etienne Carriere <etienne.carriere@linaro.org>
S: Maintained
F: drivers/rng/smccc_trng.c
SPI
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
@@ -1195,7 +1314,7 @@ F: drivers/spmi/
F: include/spmi/
SQUASHFS
M: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
M: Joao Marcos Costa <jmcosta944@gmail.com>
R: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
R: Miquel Raynal <miquel.raynal@bootlin.com>
S: Maintained
@@ -1246,6 +1365,7 @@ F: arch/arm/mach-k3/config_secure.mk
F: configs/am335x_hs_evm_defconfig
F: configs/am335x_hs_evm_uart_defconfig
F: configs/am43xx_hs_evm_defconfig
F: configs/am43xx_hs_evm_qspi_defconfig
F: configs/am57xx_hs_evm_defconfig
F: configs/am57xx_hs_evm_usb_defconfig
F: configs/dra7xx_hs_evm_defconfig
@@ -1376,3 +1496,10 @@ T: git https://source.denx.de/u-boot/u-boot.git
F: configs/tools-only_defconfig
F: *
F: */
CAAM
M: Gaurav Jain <gaurav.jain@nxp.com>
S: Maintained
F: arch/arm/dts/ls1021a-twr-u-boot.dtsi
F: drivers/crypto/fsl/
F: include/fsl_sec.h

152
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2022
PATCHLEVEL = 04
PATCHLEVEL = 10
SUBLEVEL =
EXTRAVERSION =
NAME =
@@ -21,7 +21,7 @@ include include/host_arch.h
ifeq ("", "$(CROSS_COMPILE)")
MK_ARCH="${shell uname -m}"
else
MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 's/^\s*\([^\/]*\/\)*\([^-]*\)-\S*/\2/p'}"
MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 's/^[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\2/p'}"
endif
unexport HOST_ARCH
ifeq ("x86_64", $(MK_ARCH))
@@ -30,7 +30,7 @@ else ifneq (,$(findstring $(MK_ARCH), "i386" "i486" "i586" "i686"))
export HOST_ARCH=$(HOST_ARCH_X86)
else ifneq (,$(findstring $(MK_ARCH), "aarch64" "armv8l"))
export HOST_ARCH=$(HOST_ARCH_AARCH64)
else ifneq (,$(findstring $(MK_ARCH), "arm" "armv7" "armv7l"))
else ifneq (,$(findstring $(MK_ARCH), "arm" "armv7" "armv7a" "armv7l"))
export HOST_ARCH=$(HOST_ARCH_ARM)
else ifeq ("riscv32", $(MK_ARCH))
export HOST_ARCH=$(HOST_ARCH_RISCV32)
@@ -521,7 +521,8 @@ env_h := include/generated/environment.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
ubootversion backup tests check qcheck tcheck pylint
ubootversion backup tests check qcheck tcheck pylint \
pylint_err
config-targets := 0
mixed-targets := 0
@@ -672,6 +673,15 @@ else
include/config/auto.conf: ;
endif # $(dot-config)
ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG
KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -Og -g -fomit-frame-pointer \
$(HOST_LFS_CFLAGS) $(HOSTCFLAGS)
# Avoid false positives -Wmaybe-uninitialized
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394
KBUILD_HOSTCFLAGS += -Wno-maybe-uninitialized
KBUILD_HOSTCXXFLAGS := -Og -g $(HOST_LFS_CFLAGS) $(HOSTCXXFLAGS)
endif
#
# Xtensa linker script cannot be preprocessed with -ansi because of
# preprocessor operations on strings that don't make C identifiers.
@@ -682,10 +692,19 @@ endif
ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
KBUILD_CFLAGS += -Os
else
endif
ifdef CONFIG_CC_OPTIMIZE_FOR_SPEED
KBUILD_CFLAGS += -O2
endif
ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG
KBUILD_CFLAGS += -Og -Wno-maybe-uninitialized
# Avoid false positives -Wmaybe-uninitialized
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394
KBUILD_CFLAGS += -Wno-maybe-uninitialized
endif
LTO_CFLAGS :=
LTO_FINAL_LDFLAGS :=
export LTO_CFLAGS LTO_FINAL_LDFLAGS
@@ -834,12 +853,13 @@ libs-y += drivers/usb/host/
libs-y += drivers/usb/mtu3/
libs-y += drivers/usb/musb/
libs-y += drivers/usb/musb-new/
libs-y += drivers/usb/isp1760/
libs-y += drivers/usb/phy/
libs-y += drivers/usb/ulpi/
ifdef CONFIG_POST
libs-y += post/
endif
libs-$(CONFIG_UNIT_TEST) += test/
libs-$(CONFIG_$(SPL_TPL_)UNIT_TEST) += test/
libs-$(CONFIG_UT_ENV) += test/env/
libs-$(CONFIG_UT_OPTEE) += test/optee/
libs-$(CONFIG_UT_OVERLAY) += test/overlay/
@@ -904,17 +924,21 @@ else
TPL_SIZE_CHECK =
endif
ifneq ($(CONFIG_VPL_SIZE_LIMIT),0x0)
VPL_SIZE_CHECK = @$(call size_check,$@,$(CONFIG_VPL_SIZE_LIMIT))
else
VPL_SIZE_CHECK =
endif
# Statically apply RELA-style relocations (currently arm64 only)
# This is useful for arm64 where static relocation needs to be performed on
# the raw binary, but certain simulators only accept an ELF file (but don't
# do the relocation).
ifneq ($(CONFIG_STATIC_RELA),)
# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
# $(2) is u-boot ELF, $(3) is u-boot bin, $(4) is text base
quiet_cmd_static_rela = RELOC $@
cmd_static_rela = \
start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \
end=$$($(NM) $(2) | grep __rel_dyn_end | cut -f 1 -d ' '); \
tools/relocate-rela $(3) $(4) $$start $$end
tools/relocate-rela $(3) $(2)
else
quiet_cmd_static_rela =
cmd_static_rela =
@@ -944,6 +968,7 @@ INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
endif
endif
INPUTS-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
INPUTS-$(CONFIG_VPL) += vpl/u-boot-vpl.bin
# Allow omitting the .dtb output if it is not normally used
INPUTS-$(CONFIG_OF_SEPARATE) += $(if $(CONFIG_OF_OMIT_DTB),dts/dt.dtb,u-boot.dtb)
@@ -972,22 +997,12 @@ ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
INPUTS-y += init_sp_bss_offset_check
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
INPUTS-y += u-boot-with-dtb.bin
endif
ifeq ($(CONFIG_ARCH_ROCKCHIP),y)
# On ARM64 this target is produced by binman so we don't need this dep
ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy)
# Binman image dependencies
ifeq ($(CONFIG_ARM64),y)
ifeq ($(CONFIG_SPL),y)
# TODO: Get binman to generate this too
INPUTS-y += u-boot-rockchip.bin
endif
INPUTS-y += u-boot.itb
else
ifeq ($(CONFIG_SPL),y)
# Generate these inputs for binman which will create the output files
INPUTS-y += idbloader.img u-boot.img
endif
INPUTS-y += u-boot.img
endif
endif
@@ -1106,7 +1121,7 @@ ifeq ($(CONFIG_OF_EMBED)$(CONFIG_EFI_APP),y)
@echo >&2 "CONFIG_OF_EMBED is enabled. This option should only"
@echo >&2 "be used for debugging purposes. Please use"
@echo >&2 "CONFIG_OF_SEPARATE for boards in mainline."
@echo >&2 "See doc/README.fdt-control for more info."
@echo >&2 "See doc/develop/devicetree/control.rst for more info."
@echo >&2 "===================================================="
endif
ifneq ($(CONFIG_SPL_FIT_GENERATOR),)
@@ -1126,7 +1141,6 @@ ifneq ($(CONFIG_DM),y)
endif
$(call deprecated,CONFIG_WDT,DM watchdog,v2019.10,\
$(CONFIG_WATCHDOG)$(CONFIG_HW_WATCHDOG))
$(call deprecated,CONFIG_DM_ETH,Ethernet drivers,v2020.07,$(CONFIG_NET))
$(call deprecated,CONFIG_DM_I2C,I2C drivers,v2022.04,$(CONFIG_SYS_I2C_LEGACY))
$(call deprecated,CONFIG_DM_KEYBOARD,Keyboard drivers,v2022.10,$(CONFIG_KEYBOARD))
@# CONFIG_SYS_TIMER_RATE has brackets in it for some boards which
@@ -1199,9 +1213,12 @@ else ifeq ($(CONFIG_OF_SEPARATE).$(CONFIG_OF_OMIT_DTB),y.)
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
$(call if_changed,cat)
ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-dtb.bin FORCE
$(call if_changed,copy)
else
endif
else ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-nodtb.bin FORCE
$(call if_changed,copy)
endif
@@ -1249,7 +1266,7 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if $(CONFIG_OF_SEPARATE),-R .bootpg -R .resetvec))
binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
@@ -1335,6 +1352,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
-a spl-dtb=$(CONFIG_SPL_OF_REAL) \
-a tpl-dtb=$(CONFIG_TPL_OF_REAL) \
-a pre-load-key-path=${PRE_LOAD_KEY_PATH} \
$(BINMAN_$(@F))
OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
@@ -1413,11 +1431,7 @@ MKIMAGEFLAGS_u-boot-spl.kwb = -n $(KWD_CONFIG_FILE) \
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -A $(ARCH) -T pblimage
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
UBOOT_BIN := u-boot-with-dtb.bin
else
UBOOT_BIN := u-boot.bin
endif
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
@@ -1473,29 +1487,6 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE
$(call if_changed,pad_cat)
ifeq ($(CONFIG_ARCH_ROCKCHIP),y)
# TPL + SPL
ifeq ($(CONFIG_SPL)$(CONFIG_TPL),yy)
MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T rksd
tpl/u-boot-tpl-rockchip.bin: tpl/u-boot-tpl.bin FORCE
$(call if_changed,mkimage)
idbloader.img: tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl.bin FORCE
$(call if_changed,cat)
else
MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T rksd
idbloader.img: spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
endif
ifeq ($(CONFIG_ARM64),y)
OBJCOPYFLAGS_u-boot-rockchip.bin = -I binary -O binary \
--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
u-boot-rockchip.bin: idbloader.img u-boot.itb FORCE
$(call if_changed,pad_cat)
endif # CONFIG_ARM64
endif # CONFIG_ARCH_ROCKCHIP
ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy)
MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)
@@ -1607,17 +1598,14 @@ u-boot-with-nand-spl.sfp: u-boot-spl-padx4.sfp u-boot.img FORCE
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin) FORCE
ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-nodtb.bin u-boot.dtb u-boot-br.bin FORCE
$(call if_changed,binman)
ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y)
OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec
u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
endif
quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
@@ -1674,12 +1662,8 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
ifeq ($(ARCH),arm)
UBOOT_BINLOAD := u-boot.img
else
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
UBOOT_BINLOAD := u-boot-with-dtb.bin
else
UBOOT_BINLOAD := u-boot.bin
endif
endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
--gap-fill=0xff
@@ -1700,6 +1684,7 @@ u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
$(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \
-T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
u-boot.elf: u-boot.bin u-boot-elf.lds
@@ -1776,10 +1761,6 @@ quiet_cmd_u-boot__ ?= LTO $@
-Wl,-Map,u-boot.map; \
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
else
# Note: Linking efi-x86_app64 causes a segfault in the linker at present
# when using x86_64-linux-gnu-ld.bfd
# For now, disable --whole-archive which makes things link, although not
# correctly
quiet_cmd_u-boot__ ?= LD $@
cmd_u-boot__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
-T u-boot.lds $(u-boot-init) \
@@ -2090,9 +2071,7 @@ spl/u-boot-spl-dtb.bin: spl/u-boot-spl
spl/u-boot-spl-dtb.hex: spl/u-boot-spl
@:
spl/u-boot-spl: tools prepare \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
spl/u-boot-spl: tools prepare $(if $(CONFIG_SPL_OF_CONTROL),dts/dt.dtb)
$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
spl/sunxi-spl.bin: spl/u-boot-spl
@@ -2107,11 +2086,20 @@ spl/u-boot-spl.sfp: spl/u-boot-spl
spl/boot.bin: spl/u-boot-spl
@:
tpl/u-boot-tpl.bin: tools prepare \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
tpl/u-boot-tpl.bin: tpl/u-boot-tpl
@:
$(TPL_SIZE_CHECK)
tpl/u-boot-tpl: tools prepare $(if $(CONFIG_TPL_OF_CONTROL),dts/dt.dtb)
$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
vpl/u-boot-vpl.bin: vpl/u-boot-vpl
@:
$(VPL_SIZE_CHECK)
vpl/u-boot-vpl: tools prepare $(if $(CONFIG_TPL_OF_CONTROL),dts/dt.dtb)
$(Q)$(MAKE) obj=vpl -f $(srctree)/scripts/Makefile.spl all
TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
FIND := find
@@ -2190,13 +2178,15 @@ CLEAN_DIRS += $(MODVERDIR) \
$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
include/generated/env.in drivers/video/u_boot_logo.S \
include/generated/env.* drivers/video/u_boot_logo.S \
tools/version.h u-boot* MLO* SPL System.map fit-dtb.blob* \
u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
idbloader.img flash.bin flash.log defconfig keep-syms-lto.c \
mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \
itb.fit.fit itb.fit.itb itb.map spl.map
itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \
mkimage.rom.mkimage rom.map simple-bin.map simple-bin-spi.map \
idbloader-spi.img
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl \
@@ -2265,7 +2255,7 @@ distclean: mrproper
@rm -f boards.cfg CHANGELOG
# See doc/develop/python_cq.rst
PHONY += pylint
PHONY += pylint pylint_err
PYLINT_BASE := scripts/pylint.base
PYLINT_CUR := pylint.cur
PYLINT_DIFF := pylint.diff
@@ -2307,6 +2297,11 @@ pylint:
echo "No pylint regressions"; \
fi
# Check for errors only
pylint_err:
$(Q)pylint -E -j 0 --ignore-imports=yes \
$(shell find tools test -name "*.py")
backup:
F=`basename $(srctree)` ; cd .. ; \
gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
@@ -2445,7 +2440,8 @@ endif
quiet_cmd_genenv = GENENV $@
cmd_genenv = $(OBJCOPY) --dump-section .rodata.default_environment=$@ env/common.o; \
sed --in-place -e 's/\x00/\x0A/g' $@
sed --in-place -e 's/\x00/\x0A/g' $@; sed --in-place -e '/^\s*$$/d' $@; \
sort --field-separator== -k1,1 --stable $@ -o $@
u-boot-initial-env: u-boot.bin
$(call if_changed,genenv)

624
README
View File

@@ -134,7 +134,6 @@ Directory Hierarchy:
/m68k Files generic to m68k architecture
/microblaze Files generic to microblaze architecture
/mips Files generic to MIPS architecture
/nds32 Files generic to NDS32 architecture
/nios2 Files generic to Altera NIOS2 architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
@@ -167,27 +166,6 @@ Directory Hierarchy:
Software Configuration:
=======================
Configuration is usually done using C preprocessor defines; the
rationale behind that is to avoid dead code whenever possible.
There are two classes of configuration variables:
* Configuration _OPTIONS_:
These are selectable by the user and have names beginning with
"CONFIG_".
* Configuration _SETTINGS_:
These depend on the hardware etc. and should not be meddled with if
you don't know what you're doing; they have names beginning with
"CONFIG_SYS_".
Previously, all configuration was done by hand, which involved creating
symbolic links and editing configuration files manually. More recently,
U-Boot has added the Kbuild infrastructure used by the Linux kernel,
allowing you to use the "make menuconfig" command to configure your
build.
Selection of Processor Architecture and Board Type:
---------------------------------------------------
@@ -294,33 +272,6 @@ board_init_r():
SPL-specific notes:
- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
CONFIG_SPL_STACK_R_ADDR points into SDRAM
- preloader_console_init() can be called here - typically this is
done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
spl_board_init() function containing this call
- loads U-Boot or (in falcon mode) Linux
Configuration Options:
----------------------
Configuration depends on the combination of board and CPU type; all
such information is kept in a configuration file
"include/configs/<board_name>.h".
Example: For a TQM823L module, all configuration settings are in
"include/configs/TQM823L.h".
Many of the options are named exactly as the corresponding Linux
kernel configuration options. The intention is to make it easier to
build a config tool - later.
- ARM Platform Bus Type(CCI):
CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
provides full cache coherency between two clusters of multi-core
CPUs and I/O coherency for devices and I/O masters
CONFIG_SYS_FSL_HAS_CCI400
Defined For SoC that has cache coherent interconnect
@@ -343,17 +294,6 @@ The following options need to be configured:
the "64" category of the Power ISA). This is necessary for ePAPR
compliance, among other possible reasons.
CONFIG_SYS_FSL_TBCLK_DIV
Defines the core time base clock divider ratio compared to the
system clock. On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32. The ratio varies from SoC to Soc.
CONFIG_SYS_FSL_PCIE_COMPAT
Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.
CONFIG_SYS_FSL_ERRATUM_A004510
Enables a workaround for erratum A004510. If set,
@@ -374,52 +314,17 @@ The following options need to be configured:
See Freescale App Note 4493 for more information about
this erratum.
CONFIG_A003399_NOR_WORKAROUND
Enables a workaround for IFC erratum A003399. It is only
required during NOR boot.
CONFIG_A008044_WORKAROUND
Enables a workaround for T1040/T1042 erratum A008044. It is only
required during NAND boot and valid for Rev 1.0 SoC revision
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
This is the value to write into CCSR offset 0x18600
according to the A004510 workaround.
CONFIG_SYS_FSL_DSP_DDR_ADDR
This value denotes start offset of DDR memory which is
connected exclusively to the DSP cores.
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
This value denotes start offset of M2 memory
which is directly connected to the DSP core.
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
This value denotes start offset of M3 memory which is directly
connected to the DSP core.
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
This value denotes start offset of DSP CCSR space.
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL SoC's.
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
CONFIG_SYS_CPC_REINIT_F
This CONFIG is defined when the CPC is configured as SRAM at the
time of U-Boot entry and is required to be re-initialized.
CONFIG_DEEP_SLEEP
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those
values is arch specific.
CONFIG_SYS_FSL_DDR
Freescale DDR driver in use. This type of DDR controller is
@@ -428,93 +333,18 @@ The following options need to be configured:
CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.
CONFIG_SYS_FSL_DDR_EMU
Specify emulator support for DDR. Some DDR features such as
deskew training are not available.
CONFIG_SYS_FSL_DDRC_GEN1
Freescale DDR1 controller.
CONFIG_SYS_FSL_DDRC_GEN2
Freescale DDR2 controller.
CONFIG_SYS_FSL_DDRC_GEN3
Freescale DDR3 controller.
CONFIG_SYS_FSL_DDRC_GEN4
Freescale DDR4 controller.
CONFIG_SYS_FSL_DDRC_ARM_GEN3
Freescale DDR3 controller for ARM-based SoCs.
CONFIG_SYS_FSL_DDR1
Board config to use DDR1. It can be enabled for SoCs with
Freescale DDR1 or DDR2 controllers, depending on the board
implemetation.
CONFIG_SYS_FSL_DDR2
Board config to use DDR2. It can be enabled for SoCs with
Freescale DDR2 or DDR3 controllers, depending on the board
implementation.
CONFIG_SYS_FSL_DDR3
Board config to use DDR3. It can be enabled for SoCs with
Freescale DDR3 or DDR3L controllers.
CONFIG_SYS_FSL_DDR3L
Board config to use DDR3L. It can be enabled for SoCs with
DDR3L controllers.
CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian
CONFIG_SYS_FSL_IFC_LE
Defines the IFC controller register space as Little Endian
CONFIG_SYS_FSL_IFC_CLK_DIV
Defines divider of platform clock(clock input to IFC controller).
CONFIG_SYS_FSL_LBC_CLK_DIV
Defines divider of platform clock(clock input to eLBC controller).
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
CONFIG_SYS_FSL_DDR_LE
Defines the DDR controller register space as Little Endian
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
Physical address from the view of DDR controllers. It is the
same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
it could be different for ARM SoCs.
CONFIG_SYS_FSL_DDR_INTLV_256B
DDR controller interleaving on 256-byte. This is a special
interleaving mode, handled by Dickens for Freescale layerscape
SoCs with ARM core.
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
Number of controllers used as main memory.
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
Number of controllers used for other than main memory.
CONFIG_SYS_FSL_HAS_DP_DDR
Defines the SoC has DP-DDR used for DPAA.
CONFIG_SYS_FSL_SEC_BE
Defines the SEC controller register space as Big Endian
CONFIG_SYS_FSL_SEC_LE
Defines the SEC controller register space as Little Endian
- MIPS CPU options:
CONFIG_SYS_INIT_SP_OFFSET
Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
pointer. This is needed for the temporary stack before
relocation.
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
@@ -565,13 +395,6 @@ The following options need to be configured:
boards with QUICC Engines require OF_QE to set UCC MAC
addresses
CONFIG_OF_SYSTEM_SETUP
Other code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel.
This causes ft_system_setup() to be called before booting
the kernel.
CONFIG_OF_IDE_FIXUP
U-Boot can detect if an IDE device is present or not.
@@ -720,18 +543,6 @@ The following options need to be configured:
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
- LBA48 Support
CONFIG_LBA48
Set this to enable support for disks larger than 137GB
Also look at CONFIG_SYS_64BIT_LBA.
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.
CONFIG_SYS_64BIT_LBA:
When enabled, makes the IDE subsystem use 64bit sector addresses.
Default is 32bit.
- NETWORK Support (PCI):
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
@@ -754,20 +565,6 @@ The following options need to be configured:
CONFIG_LAN91C96_USE_32_BIT
Define this to enable 32 bit addressing
CONFIG_SMC91111
Support for SMSC's LAN91C111 chip
CONFIG_SMC91111_BASE
Define this to hold the physical address
of the device (I/O space)
CONFIG_SMC_USE_32_BIT
Define this if data bus is 32 bits
CONFIG_SMC_USE_IOFUNCS
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
Define this if you have more then 3 PHYs.
@@ -849,9 +646,6 @@ The following options need to be configured:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.
CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
HW module registers.
@@ -925,13 +719,6 @@ The following options need to be configured:
the appropriate value in Hz.
- MMC Support:
The MMC controller on the Intel PXA is supported. To
enable this define CONFIG_MMC. The MMC can be
accessed from the boot prompt by mapping the device
to physical memory similar to flash. Command line is
enabled with CONFIG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CONFIG_CMD_FAT.
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller
@@ -985,34 +772,12 @@ The following options need to be configured:
- Keyboard Support:
See Kconfig help for available keyboard drivers.
- Video support:
CONFIG_FSL_DIU_FB
Enable the Freescale DIU video driver. Reference boards for
SOCs that have a DIU should define this macro to enable DIU
support, and should also define these other macros:
CONFIG_SYS_DIU_ADDR
CONFIG_VIDEO
CONFIG_CFB_CONSOLE
CONFIG_VIDEO_SW_CURSOR
CONFIG_VGA_AS_SINGLE_DEVICE
CONFIG_VIDEO_BMP_LOGO
The DIU driver will look for the 'video-mode' environment
variable, and if defined, enable the DIU as a console during
boot. See the documentation file doc/README.video for a
description of this variable.
- LCD Support: CONFIG_LCD
Define this to enable LCD support (for output to LCD
display); also select one of the supported displays
by defining one of these:
CONFIG_ATMEL_LCD:
HITACHI TX09D70VM1CCA, 3.5", 240x320.
CONFIG_NEC_NL6448AC33:
NEC NL6448AC33-18. Active, color, single scan.
@@ -1081,22 +846,11 @@ The following options need to be configured:
If CONFIG_LCD_ROTATION is not defined, the console will be
initialized with 0degree rotation.
CONFIG_LCD_BMP_RLE8
Support drawing of RLE8-compressed bitmaps on the LCD.
- MII/PHY support:
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
CONFIG_PHY_RESET_DELAY
Some PHY like Intel LXT971A need extra delay after
reset before any MII register access is possible.
For such PHY, set this option to the usec delay
required. (minimum 300usec for LXT971A)
CONFIG_PHY_CMD_DELAY (ppc4xx)
Some PHY like Intel LXT971A need extra delay after
@@ -1172,35 +926,6 @@ The following options need to be configured:
from a BOOTP client in networks with unusually high latency.
- DHCP Advanced Options:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTP_MAY_FAIL
CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
after the configured retry count, the call will fail
instead of starting over. This can be used to fail over
to Link-local IP address configuration if the DHCP server
is not available.
CONFIG_BOOTP_DHCP_REQUEST_DELAY
A 32bit value in microseconds for a delay between
receiving a "DHCP Offer" and sending the "DHCP Request".
This fixes a problem with certain DHCP servers that don't
respond 100% of the time to a "DHCP request". E.g. On an
AT91RM9200 processor running at 180MHz, this delay needed
to be *at least* 15,000 usec before a Windows Server 2003
DHCP server would reply 100% of the time. I recommend at
least 50,000 usec to be safe. The alternative is to hope
that one of the retries will be successful but note that
the DHCP timeout and retry process takes a longer than
this delay.
- Link-local IP address negotiation:
Negotiate with other link-local clients on the local network
@@ -1439,11 +1164,6 @@ The following options need to be configured:
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
CONFIG_SYS_SPD_BUS_NUM
If defined, then this indicates the I2C bus number for DDR SPD.
If not defined, then U-Boot assumes that SPD is on I2C bus 0.
CONFIG_SYS_RTC_BUS_NUM
If defined, then this indicates the I2C bus number for the RTC.
@@ -1483,14 +1203,6 @@ The following options need to be configured:
Enables support for FPGA family.
(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
CONFIG_FPGA_COUNT
Specify the number of FPGA devices to support.
CONFIG_SYS_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA configuration.
CONFIG_SYS_FPGA_CHECK_BUSY
Enable checks on FPGA configuration interface busy
@@ -1503,9 +1215,6 @@ The following options need to be configured:
If defined, a function that provides delays in the FPGA
configuration driver.
CONFIG_SYS_FPGA_CHECK_CTRLC
Allow Control-C to interrupt FPGA configuration
CONFIG_SYS_FPGA_CHECK_ERROR
Check for configuration errors during FPGA bitfile
@@ -1592,24 +1301,6 @@ The following options need to be configured:
FLAGADM
- Error Recovery:
CONFIG_NET_RETRY_COUNT
This variable defines the number of retries for
network operations like ARP, RARP, TFTP, or BOOTP
before giving up the operation. If not defined, a
default value of 5 is used.
CONFIG_ARP_TIMEOUT
Timeout waiting for an ARP reply in milliseconds.
CONFIG_NFS_TIMEOUT
Timeout in milliseconds used in NFS protocol.
If you encounter "ERROR: Cannot umount" in nfs command,
try longer timeout such as
#define CONFIG_NFS_TIMEOUT 10000UL
Note:
In the current implementation, the local variables
@@ -1631,14 +1322,6 @@ The following options need to be configured:
of the backslashes before semicolons and special
symbols.
- Command Line Editing and History:
CONFIG_CMDLINE_PS_SUPPORT
Enable support for changing the command prompt string
at run-time. Only static string is supported so far.
The string is obtained from environment variables PS1
and PS2.
- Default Environment:
CONFIG_EXTRA_ENV_SETTINGS
@@ -1674,26 +1357,6 @@ The following options need to be configured:
this is instead controlled by the value of
/config/load-environment.
- TFTP Fixed UDP Port:
CONFIG_TFTP_PORT
If this is defined, the environment variable tftpsrcp
is used to supply the TFTP UDP source port value.
If tftpsrcp isn't defined, the normal pseudo-random port
number generator is used.
Also, the environment variable tftpdstp is used to supply
the TFTP UDP destination port value. If tftpdstp isn't
defined, the normal port 69 is used.
The purpose for tftpsrcp is to allow a TFTP server to
blindly start the TFTP transfer using the pre-configured
target IP address and UDP port. This has the effect of
"punching through" the (Windows XP) firewall, allowing
the remainder of the TFTP transfer to proceed normally.
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
CONFIG_STANDALONE_LOAD_ADDR
This option defines a board specific value for the
@@ -1701,20 +1364,6 @@ The following options need to be configured:
overwriting the architecture dependent default
settings.
- Frame Buffer Address:
CONFIG_FB_ADDR
Define CONFIG_FB_ADDR if you want to use specific
address for frame buffer. This is typically the case
when using a graphics controller has separate video
memory. U-Boot will then place the frame buffer at
the given address instead of dynamically reserving it
in system RAM by calling lcd_setmem(), which grabs
the memory for the frame buffer depending on the
configured panel size.
Please see board_init_f function.
- Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
@@ -1789,36 +1438,6 @@ The following options need to be configured:
CONFIG_SPL
Enable building of SPL globally.
CONFIG_SPL_MAX_FOOTPRINT
Maximum size in memory allocated to the SPL, BSS included.
When defined, the linker checks that the actual memory
used by SPL from _start to __bss_end does not exceed it.
CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
must not be both defined at the same time.
CONFIG_SPL_MAX_SIZE
Maximum size of the SPL image (text, data, rodata, and
linker lists sections), BSS excluded.
When defined, the linker checks that the actual size does
not exceed it.
CONFIG_SPL_RELOC_TEXT_BASE
Address to relocate to. If unspecified, this is equal to
CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
CONFIG_SPL_BSS_START_ADDR
Link address for the BSS within the SPL binary.
CONFIG_SPL_BSS_MAX_SIZE
Maximum size in memory allocated to the SPL BSS.
When defined, the linker checks that the actual memory used
by SPL from __bss_start to __bss_end does not exceed it.
CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
must not be both defined at the same time.
CONFIG_SPL_STACK
Adress of the start of the stack SPL will use
CONFIG_SPL_PANIC_ON_RAW_IMAGE
When defined, SPL will panic() if the image it has
loaded does not have a signature.
@@ -1829,69 +1448,20 @@ The following options need to be configured:
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation. If unspecified, this is equal to
CONFIG_SPL_STACK.
CONFIG_SYS_SPL_MALLOC_START
Starting address of the malloc pool used in SPL.
When this option is set the full malloc is used in SPL and
it is set up by spl_init() and before that, the simple malloc()
can be used if CONFIG_SYS_MALLOC_F is defined.
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.
CONFIG_SPL_INIT_MINIMAL
Arch init code should be built for a very small image
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
Sector and number of sectors to load kernel argument
parameters from when MMC is being used in raw mode
(for falcon mode)
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from filesystem
CONFIG_SPL_FS_LOAD_KERNEL_NAME
Filename to read to load kernel uImage when reading
from filesystem (for Falcon mode)
CONFIG_SPL_FS_LOAD_ARGS_NAME
Filename to read to load kernel argument parameters
when reading from filesystem (for Falcon mode)
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
Set this for NAND SPL on PPC mpc83xx targets, so that
start.S waits for the rest of the SPL to load before
continuing (the hardware starts execution after just
loading the first page rather than the full 4K).
CONFIG_SPL_SKIP_RELOCATE
Avoid SPL relocation
CONFIG_SPL_NAND_IDENT
SPL uses the chip ID list to identify the NAND flash.
Requires CONFIG_SPL_NAND_BASE.
CONFIG_SPL_UBI
Support for a lightweight UBI (fastmap) scanner and
loader
CONFIG_SPL_NAND_RAW_ONLY
Support to boot only raw u-boot.bin images. Use this only
if you need to save space.
CONFIG_SPL_COMMON_INIT_DDR
Set for common ddr init with serial presence detect in
SPL binary.
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
@@ -1916,35 +1486,12 @@ The following options need to be configured:
CONFIG_SPL_RAM_DEVICE
Support for running image already present in ram, in SPL binary
CONFIG_SPL_PAD_TO
Image offset to which the SPL should be padded before appending
the SPL payload. By default, this is defined as
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
CONFIG_SPL_TARGET
Final target image containing SPL and payload. Some SPLs
use an arch-specific makefile fragment instead, for
example if more than one image needs to be produced.
CONFIG_SPL_FIT_PRINT
Printing information about a FIT image adds quite a bit of
code to SPL. So this is normally disabled in SPL. Use this
option to re-enable it. This will affect the output of the
bootm command when booting a FIT image.
- TPL framework
CONFIG_TPL
Enable building of TPL globally.
CONFIG_TPL_PAD_TO
Image offset to which the TPL should be padded before appending
the TPL payload. By default, this is defined as
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
- Interrupt support (PPC):
There are common interrupt_init() and timer_interrupt()
@@ -1972,7 +1519,6 @@ typically in board_init_f() and board_init_r().
- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
- CONFIG_BOARD_LATE_INIT: Call board_late_init()
- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
Configuration Settings:
-----------------------
@@ -1989,16 +1535,6 @@ Configuration Settings:
- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
prompt for user input.
- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
- CONFIG_SYS_PBSIZE: Buffer size for Console output
- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
the application (usually a Linux kernel) when it is
booted
- CONFIG_SYS_BAUDRATE_TABLE:
List of legal baudrate settings for this board.
@@ -2011,27 +1547,6 @@ Configuration Settings:
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
- CONFIG_SYS_MEM_TOP_HIDE:
If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
board ports in arch/powerpc with bootwrapper support that
recalculate the memory size from the SDRAM controller setup
will have to get fixed in Linux additionally.
This option can be used as a workaround for the 440EPx/GRx
CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
be touched.
WARNING: Please make sure that this value is a multiple of
the Linux page size (normally 4k). If this is not the case,
then the end address of the Linux memory will be located at a
non page size aligned address and this could cause major
problems.
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download
@@ -2041,12 +1556,6 @@ Configuration Settings:
- CONFIG_SYS_FLASH_BASE:
Physical start address of Flash memory.
- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
(CONFIG_SYS_TEXT_BASE) used when linking) - same as
CONFIG_SYS_FLASH_BASE when booting from flash.
- CONFIG_SYS_MONITOR_LEN:
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is
@@ -2072,7 +1581,7 @@ Configuration Settings:
- CONFIG_SYS_MALLOC_SIMPLE
Provides a simple and small malloc() and calloc() for those
boards which do not use the full malloc in SPL (which is
enabled with CONFIG_SYS_SPL_MALLOC_START).
enabled with CONFIG_SYS_SPL_MALLOC).
- CONFIG_SYS_NONCACHED_MEMORY:
Size of non-cached memory area. This area of memory will be
@@ -2093,12 +1602,6 @@ Configuration Settings:
Non-cached memory is only supported on 32-bit ARM at present.
- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to an
uncompressed size of 8 MBytes. If this is not enough,
you can define CONFIG_SYS_BOOTM_LEN in your board config file
to adjust this setting to your needs.
- CONFIG_SYS_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
@@ -2111,11 +1614,6 @@ Configuration Settings:
CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
then the value in "bootm_size" will be used instead.
- CONFIG_SYS_BOOT_RAMDISK_HIGH:
Enable initrd_high functionality. If defined then the
initrd_high feature is enabled and the bootm ramdisk subcommand
is enabled.
- CONFIG_SYS_BOOT_GET_CMDLINE:
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
@@ -2124,38 +1622,10 @@ Configuration Settings:
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
- CONFIG_SYS_MAX_FLASH_SECT:
Max number of sectors on a Flash chip
- CONFIG_SYS_FLASH_ERASE_TOUT:
Timeout for Flash erase operations (in ms)
- CONFIG_SYS_FLASH_WRITE_TOUT:
Timeout for Flash write operations (in ms)
- CONFIG_SYS_FLASH_LOCK_TOUT
Timeout for Flash set sector lock bit operation (in ms)
- CONFIG_SYS_FLASH_UNLOCK_TOUT
Timeout for Flash clear lock bits operation (in ms)
- CONFIG_SYS_FLASH_PROTECTION
If defined, hardware flash sectors protection is used
instead of U-Boot software protection.
- CONFIG_SYS_DIRECT_FLASH_TFTP:
Enable TFTP transfers directly to flash memory;
without this option such a download has to be
performed in two steps: (1) download to RAM, and (2)
copy from RAM to flash.
The two-step approach is usually more reliable, since
you can check if the download worked before you erase
the flash, but in some situations (when system RAM is
too limited to allow for a temporary copy of the
downloaded image) this option may be very useful.
- CONFIG_SYS_FLASH_CFI:
Define if the flash driver uses extra elements in the
common flash structure for storing flash geometry.
@@ -2176,12 +1646,6 @@ Configuration Settings:
s29ws-n MirrorBit flash has non-standard addresses for buffered
write commands.
- CONFIG_SYS_FLASH_QUIET_TEST
If this option is defined, the common CFI flash doesn't
print it's warning upon not recognized FLASH banks. This
is useful, if some of the configured banks are only
optionally available.
- CONFIG_FLASH_SHOW_PROGRESS
If defined (must be an integer), print out countdown
digits and dots. Recommended value: 45 (9..1) for 80
@@ -2196,22 +1660,6 @@ Configuration Settings:
while unprotecting/erasing/programming. Please only enable
this option if you really know what you are doing.
- CONFIG_SYS_RX_ETH_BUFFER:
Defines the number of Ethernet receive buffers. On some
Ethernet controllers it is recommended to set this value
to 8 or even higher (EEPRO100 or 405 EMAC), since all
buffers can be full shortly after enabling the interface
on high Ethernet traffic.
Defaults to 4 if not defined.
- CONFIG_ENV_MAX_ENTRIES
Maximum number of entries in the hash table that is used
internally to store the environment settings. The default
setting is supposed to be generous and should work in most
cases. This setting can be used to tune behaviour; see
lib/hashtable.c for details.
- CONFIG_ENV_FLAGS_LIST_DEFAULT
- CONFIG_ENV_FLAGS_LIST_STATIC
Enable validation of the values given to environment variables when
@@ -2301,12 +1749,6 @@ Note: once the monitor has been relocated, then it will complain if
the default environment is used; a new CRC is computed as soon as you
use the "saveenv" command to store a valid environment.
- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
Echo the inverted Ethernet link state to the fault LED.
Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
also needs to be defined.
- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
@@ -2327,11 +1769,6 @@ use the "saveenv" command to store a valid environment.
later, once stdio is running and output goes to the LCD, if
present.
- CONFIG_BOARD_SIZE_LIMIT:
Maximum size of the U-Boot image. When defined, the
build system checks that the actual size does not
exceed it.
Low Level (hardware related) configuration options:
---------------------------------------------------
@@ -2368,10 +1805,6 @@ Low Level (hardware related) configuration options:
used in assembly code, so it must not contain typecasts or
integer size suffixes (e.g. "ULL").
- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
forced to a value that ensures that CCSR is not relocated.
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx systems only]
@@ -2389,24 +1822,6 @@ Low Level (hardware related) configuration options:
U-Boot uses the following memory types:
- MPC8xx: IMMR (internal memory of the CPU)
- CONFIG_SYS_GBL_DATA_OFFSET:
Offset of the initial data structure in the memory
area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
GENERATED_GBL_DATA_SIZE), and the initial stack is just
below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_GBL_DATA_OFFSET) downward.
Note:
On the MPC824X (or other systems that use the data
cache for initial memory) the address chosen for
CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
point to an otherwise UNUSED address space between
the top of RAM and the start of the PCI space.
- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
- CONFIG_SYS_OR_TIMING_SDRAM:
@@ -2460,12 +1875,6 @@ Low Level (hardware related) configuration options:
one, specify here. Note that the value must resolve
to something your driver can deal with.
- CONFIG_SYS_DDR_RAW_TIMING
Get DDR timing information from other than SPD. Common with
soldered DDR chips onboard without SPD. DDR raw timing
parameters are extracted from datasheet and hard-coded into
header files or board specific files.
- CONFIG_FSL_DDR_INTERACTIVE
Enable interactive DDR debugging. See doc/README.fsl-ddr.
@@ -2475,10 +1884,6 @@ Low Level (hardware related) configuration options:
- CONFIG_FSL_DDR_BIST
Enable built-in memory test for Freescale DDR controllers.
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
- CONFIG_RMII
Enable RMII mode for all FECs.
Note that this is a global option, we can't
@@ -2524,11 +1929,6 @@ Low Level (hardware related) configuration options:
proper). Code that needs stage-specific behavior should check
this.
- CONFIG_SYS_MPC85XX_NO_RESETVEC
Only for 85xx systems. If this variable is specified, the section
.resetvec is not kept and the section .bootpg is placed in the
previous 4k of the .text section.
- CONFIG_ARCH_MAP_SYSMEM
Generally U-Boot (and in particular the md command) uses
effective address. It is therefore not necessary to regard
@@ -2760,6 +2160,7 @@ rarpboot- boot image via network using RARP/TFTP protocol
diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
loads - load S-Record file over serial line
loadb - load binary file over serial line (kermit mode)
loadm - load binary blob from source address to destination address
md - memory display
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
@@ -2870,8 +2271,8 @@ details; basically, the header defines the following image properties:
LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
@@ -3583,23 +2984,6 @@ On Nios II, the ABI is documented here:
Note: on Nios II, we give "-G0" option to gcc and don't use gp
to access small data sections, so gp is free.
On NDS32, the following registers are used:
R0-R1: argument/return
R2-R5: argument
R15: temporary register for assembler
R16: trampoline register
R28: frame pointer (FP)
R29: global pointer (GP)
R30: link register (LP)
R31: stack pointer (SP)
PC: program counter (PC)
==> U-Boot will use R10 to hold a pointer to the global data
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.
On RISC-V, the following registers are used:
x0: hard-wired zero (zero)

View File

@@ -1,5 +1,5 @@
config ARCH_MAP_SYSMEM
depends on SANDBOX || NDS32
depends on SANDBOX
def_bool y
config CREATE_ARCH_SYMLINK
@@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK
config HAVE_ARCH_IOREMAP
bool
config NEEDS_MANUAL_RELOC
bool
config SYS_CACHE_SHIFT_4
bool
@@ -56,6 +53,8 @@ config ARC
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_7
select TIMER
select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
config ARM
bool "ARM architecture"
@@ -76,24 +75,25 @@ config M68K
config MICROBLAZE
bool "MicroBlaze architecture"
select NEEDS_MANUAL_RELOC
select SUPPORT_OF_CONTROL
imply CMD_IRQ
imply CMD_TIMER
imply SPL_REGMAP if SPL
imply SPL_TIMER if SPL
imply TIMER
imply XILINX_TIMER
config MIPS
bool "MIPS architecture"
select HAVE_ARCH_IOREMAP
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config NDS32
bool "NDS32 architecture"
select SUPPORT_OF_CONTROL
select SPL_SEPARATE_BSS if SPL
config NIOS2
bool "Nios II architecture"
select CPU
select DM
imply DM_EVENT
select OF_CONTROL
select SUPPORT_OF_CONTROL
imply CMD_DM
@@ -111,8 +111,10 @@ config RISCV
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
select SPL_SEPARATE_BSS if SPL
imply DM_SERIAL
imply DM_ETH
imply DM_EVENT
imply DM_MMC
imply DM_SPI
imply DM_SPI_FLASH
@@ -135,6 +137,7 @@ config SANDBOX
select BZIP2
select CMD_POWEROFF
select DM
select DM_FUZZING_ENGINE
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
@@ -170,6 +173,7 @@ config SANDBOX
imply CRC32_VERIFY
imply FAT_WRITE
imply FIRMWARE
imply FUZZING_ENGINE_SANDBOX
imply HASH_VERIFY
imply LZMA
imply TEE
@@ -203,6 +207,7 @@ config SANDBOX
imply KEYBOARD
imply PHYSMEM
imply GENERATE_ACPI_TABLE
imply BINMAN
config SH
bool "SuperH architecture"
@@ -238,6 +243,7 @@ config X86
imply CMD_SF_TEST
imply CMD_ZBOOT
imply DM_ETH
imply DM_EVENT
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
@@ -369,6 +375,9 @@ config SYS_IMMR
default 0xF0000000 if ARCH_MPC8313
default 0xE0000000 if MPC83xx && !ARCH_MPC8313
default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
ARCH_P2020
default SYS_CCSRBAR_DEFAULT
help
Address for the Internal Memory-Mapped Registers (IMMR) window used
@@ -376,7 +385,7 @@ config SYS_IMMR
config SKIP_LOWLEVEL_INIT
bool "Skip the calls to certain low level initialization functions"
depends on ARM || NDS32 || MIPS || RISCV
depends on ARM || MIPS || RISCV
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
@@ -387,7 +396,7 @@ config SKIP_LOWLEVEL_INIT
config SPL_SKIP_LOWLEVEL_INIT
bool "Skip the calls to certain low level initialization functions"
depends on SPL && (ARM || NDS32 || MIPS || RISCV)
depends on SPL && (ARM || MIPS || RISCV)
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
@@ -436,7 +445,6 @@ source "arch/arm/Kconfig"
source "arch/m68k/Kconfig"
source "arch/microblaze/Kconfig"
source "arch/mips/Kconfig"
source "arch/nds32/Kconfig"
source "arch/nios2/Kconfig"
source "arch/powerpc/Kconfig"
source "arch/sandbox/Kconfig"
@@ -444,3 +452,33 @@ source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"
if ARM || M68K || PPC
source "arch/Kconfig.nxp"
endif
source "board/keymile/Kconfig"
if MIPS || MICROBLAZE
choice
prompt "Endianness selection"
help
Some MIPS boards can be configured for either little or big endian
byte order. These modes require different U-Boot images. In general there
is one preferred byteorder for a particular system but some systems are
just as commonly used in the one or the other endianness.
config SYS_BIG_ENDIAN
bool "Big endian"
depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
config SYS_LITTLE_ENDIAN
bool "Little endian"
depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
endchoice
endif

253
arch/Kconfig.nxp Normal file
View File

@@ -0,0 +1,253 @@
config NXP_ESBC
bool "NXP ESBC (secure boot) functionality"
help
Enable Freescale Secure Boot feature. Normally selected by defconfig.
If unsure, do not change.
menu "Chain of trust / secure boot options"
depends on !FIT_SIGNATURE && NXP_ESBC
config CHAIN_OF_TRUST
select FSL_CAAM
select ARCH_MISC_INIT
select FSL_SEC_MON
select SPL_BOARD_INIT if (ARM && SPL)
select SPL_HASH if (ARM && SPL)
select SHA_HW_ACCEL
select SHA_PROG_HW_ACCEL
select ENV_IS_NOWHERE
select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT
select CMD_EXT4 if ARM
select CMD_EXT4_WRITE if ARM
imply CMD_BLOB
imply CMD_HASH if ARM
def_bool y
config CMD_ESBC_VALIDATE
bool "Enable the 'esbc_validate' and 'esbc_halt' commands"
default y
help
This option enables two commands used for secure booting:
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)
config ESBC_HDR_LS
bool
config ESBC_ADDR_64BIT
def_bool y
depends on ESBC_HDR_LS && FSL_LAYERSCAPE
help
For Layerscape based platforms, ESBC image Address in Header is 64bit.
config SYS_FSL_SFP_BE
def_bool y
depends on PPC || FSL_LSCH2 || ARCH_LS1021A
config SYS_FSL_SFP_LE
def_bool y
depends on !SYS_FSL_SFP_BE
choice
prompt "SFP IP revision"
default SYS_FSL_SFP_VER_3_0 if PPC
default SYS_FSL_SFP_VER_3_4
config SYS_FSL_SFP_VER_3_0
bool "SFP version 3.0"
config SYS_FSL_SFP_VER_3_2
bool "SFP version 3.2"
config SYS_FSL_SFP_VER_3_4
bool "SFP version 3.4"
endchoice
config SPL_UBOOT_KEY_HASH
string "Non-SRK key hash for U-Boot public/private key pair"
depends on SPL
default ""
help
Set the key hash for U-Boot here if public/private key pair used to
sign U-boot are different from the SRK hash put in the fuse. Example
of a key hash is
41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b.
Otherwise leave this empty.
if PPC
config BOOTSCRIPT_COPY_RAM
bool "Secure boot copies boot script to RAM"
help
On systems that support chain of trust booting, a number of addresses
are required to set variables that are used in the copying and then
verification of different parts of the system. If enabled, the subsequent
options are for what location to use in each step.
config BS_ADDR_DEVICE
hex "Address in RAM for bs_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_SIZE
hex "The size of bs_size which is the amount read from bs_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_ADDR_RAM
hex "Address in RAM for bs_ram"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_ADDR_DEVICE
hex "Address in RAM for bs_hdr_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_SIZE
hex "The size of bs_hdr_size which is the amount read from bs_hdr_device"
depends on BOOTSCRIPT_COPY_RAM
config BS_HDR_ADDR_RAM
hex "Address in RAM for bs_hdr_ram"
depends on BOOTSCRIPT_COPY_RAM
config BOOTSCRIPT_HDR_ADDR
hex "CONFIG_BOOTSCRIPT_HDR_ADDR"
default BS_ADDR_RAM if BOOTSCRIPT_COPY_RAM
endif
config SYS_FSL_SRK_LE
def_bool y
depends on ARM
config KEY_REVOCATION
def_bool y
endmenu
comment "Other functionality shared between NXP SoCs"
config DEEP_SLEEP
bool "Enable SoC deep sleep feature"
depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
default y
help
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
config LAYERSCAPE_NS_ACCESS
bool "Layerscape non-secure access support"
depends on ARCH_LS1021A || FSL_LSCH2
config PCIE1
bool "PCIe controller #1"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE2
bool "PCIe controller #2"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE3
bool "PCIe controller #3"
depends on LAYERSCAPE_NS_ACCESS || PPC
config PCIE4
bool "PCIe controller #4"
depends on LAYERSCAPE_NS_ACCESS || PPC
config FSL_USE_PCA9547_MUX
bool "Enable PCA9547 I2C Mux on Freescale boards"
depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
help
This option enables the PCA9547 I2C mux on Freescale boards.
config VID
bool "Enable Freescale VID"
depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C)
help
This option enables setting core voltage based on individual
values saved in SoC fuses.
config SPL_VID
bool "Enable Freescale VID in SPL"
depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C)
help
This option enables setting core voltage based on individual
values saved in SoC fuses, in SPL.
if VID || SPL_VID
config VID_FLS_ENV
string "Environment variable for overriding VDD"
help
This option allows for specifying the environment variable
to check to override VDD information.
config VOL_MONITOR_INA220
bool "Enable the INA220 voltage monitor read"
help
This option enables INA220 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_IR36021_READ
bool "Enable the IR36021 voltage monitor read"
help
This option enables IR36021 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_IR36021_SET
bool "Enable the IR36021 voltage monitor set"
help
This option enables IR36021 voltage monitor set
functionality. It is used by the common VID driver.
config VOL_MONITOR_LTC3882_READ
bool "Enable the LTC3882 voltage monitor read"
help
This option enables LTC3882 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_LTC3882_SET
bool "Enable the LTC3882 voltage monitor set"
help
This option enables LTC3882 voltage monitor set
functionality. It is used by the common VID driver.
config VOL_MONITOR_ISL68233_READ
bool "Enable the ISL68233 voltage monitor read"
help
This option enables ISL68233 voltage monitor read
functionality. It is used by the common VID driver.
config VOL_MONITOR_ISL68233_SET
bool "Enable the ISL68233 voltage monitor set"
help
This option enables ISL68233 voltage monitor set
functionality. It is used by the common VID driver.
endif
config SYS_FSL_NUM_CC_PLLS
int "Number of clock control PLLs"
depends on MPC85xx || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A || ARCH_LS1028A
default 2 if ARCH_LS1021A || ARCH_LS1028A || FSL_LSCH2
default 6 if FSL_LSCH3 || MPC85xx
config SYS_FSL_ESDHC_BE
bool
config SYS_FSL_IFC_BE
bool
config FSL_QIXIS
bool "Enable QIXIS support"
depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
config QIXIS_I2C_ACCESS
bool "Access to QIXIS is over i2c"
depends on FSL_QIXIS
default y
config HAS_FSL_DR_USB
def_bool y
depends on USB_EHCI_HCD && PPC

View File

@@ -2,12 +2,6 @@
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
ifndef CONFIG_CPU_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
else
CONFIG_SYS_BIG_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
KBUILD_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -mlittle-endian

View File

@@ -39,8 +39,8 @@ SECTIONS
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);

View File

@@ -6,6 +6,4 @@
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#endif /*__ASM_ARC_CONFIG_H_ */

View File

@@ -29,9 +29,11 @@ static int boot_prep_linux(bootm_headers_t *images)
{
int ret;
ret = image_setup_linux(images);
if (ret)
return ret;
if (CONFIG_IS_ENABLED(LMB)) {
ret = image_setup_linux(images);
if (ret)
return ret;
}
return board_prep_linux(images);
}

View File

@@ -7,6 +7,7 @@
#include <config.h>
#include <linux/linkage.h>
#include <asm/arcregs.h>
#include <system-constants.h>
ENTRY(_start)
/* Setup interrupt vector base that matches "__text_start" */
@@ -86,7 +87,7 @@ ENTRY(_start)
#endif
/* Establish C runtime stack and frame */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %sp, SYS_INIT_SP_ADDR
mov %fp, %sp
/* Allocate reserved area from current top of stack */

View File

@@ -8,6 +8,7 @@ config ARM64
bool
select PHYS_64BIT
select SYS_CACHE_SHIFT_6
imply SPL_SEPARATE_BSS
config ARM64_CRC32
bool "Enable support for CRC32 instruction"
@@ -19,6 +20,23 @@ config ARM64_CRC32
not be present on all ARMv8.0, but is always present on ARMv8.1 and
newer.
config COUNTER_FREQUENCY
int "Timer clock frequency"
depends on ARM64 || CPU_V7A
default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
default 100000000 if ARCH_ZYNQMP
default 0
help
For platforms with ARMv8-A and ARMv7-A which features a system
counter, those platforms needs software to program the counter
frequency. Setup time clock frequency for certain platform.
0 means no need to configure the system counter frequency.
For platforms needs the frequency set in U-Boot with a
pre-defined value, should have the macro defined as a non-zero value.
config POSITION_INDEPENDENT
bool "Generate position-independent pre-relocation code"
depends on ARM64 || CPU_V7A
@@ -57,6 +75,10 @@ config SYS_INIT_SP_BSS_OFFSET
that the early malloc region, global data (gd), and early stack usage
do not overlap any appended DTB.
config SPL_SYS_NO_VECTOR_TABLE
depends on SPL
bool
config LINUX_KERNEL_IMAGE_HEADER
depends on ARM64
bool
@@ -267,6 +289,7 @@ config CPU_ARM926EJS
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
imply SPL_SEPARATE_BSS
config CPU_ARM946ES
bool
@@ -277,6 +300,7 @@ config CPU_ARM1136
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
imply SPL_SEPARATE_BSS
config CPU_ARM1176
bool
@@ -306,20 +330,6 @@ config CPU_V7R
select SYS_ARM_MPU
select SYS_CACHE_SHIFT_6
config CPU_PXA
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
config CPU_PXA27X
bool
select CPU_PXA
config CPU_SA1100
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
config SYS_CPU
default "arm720t" if CPU_ARM720T
default "arm920t" if CPU_ARM920T
@@ -330,8 +340,6 @@ config SYS_CPU
default "armv7" if CPU_V7A
default "armv7" if CPU_V7R
default "armv7m" if CPU_V7M
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
default "armv8" if ARM64
config SYS_ARM_ARCH
@@ -345,14 +353,11 @@ config SYS_ARM_ARCH
default 7 if CPU_V7A
default 7 if CPU_V7M
default 7 if CPU_V7R
default 5 if CPU_PXA
default 4 if CPU_SA1100
default 8 if ARM64
choice
prompt "Select the ARM data write cache policy"
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
CPU_PXA || RZA1
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
default SYS_ARM_CACHE_WRITEBACK
config SYS_ARM_CACHE_WRITEBACK
@@ -377,6 +382,12 @@ config SYS_ARM_CACHE_WRITEALLOC
write is performed.
endchoice
config ARCH_VERY_EARLY_INIT
bool
config SPL_ARCH_VERY_EARLY_INIT
bool
config ARCH_CPU_INIT
bool "Enable ARCH_CPU_INIT"
help
@@ -403,11 +414,50 @@ config ARM_SMCCC
firmware (for example, PSCI) according to SMCCC.
config SEMIHOSTING
bool "support boot from semihosting"
bool "Support ARM semihosting"
help
In emulated environments, semihosting is a way for
the hosted environment to call out to the emulator to
retrieve files from the host machine.
Semihosting is a method for a target to communicate with a host
debugger. It uses special instructions which the debugger will trap
on and interpret. This allows U-Boot to read/write files, print to
the console, and execute arbitrary commands on the host system.
Enabling this option will add support for reading and writing files
on the host system. If you don't have a debugger attached then trying
to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
config SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails"
depends on SEMIHOSTING && ARM64
default y
help
Normally, if U-Boot makes a semihosting call and no debugger is
attached, then it will panic due to a synchronous abort
exception. This config adds an exception handler which will allow
U-Boot to recover. Say 'y' if unsure.
config SPL_SEMIHOSTING
bool "Support ARM semihosting in SPL"
depends on SPL
help
Semihosting is a method for a target to communicate with a host
debugger. It uses special instructions which the debugger will trap
on and interpret. This allows U-Boot to read/write files, print to
the console, and execute arbitrary commands on the host system.
Enabling this option will add support for reading and writing files
on the host system. If you don't have a debugger attached then trying
to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
config SPL_SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails in SPL"
depends on SPL_SEMIHOSTING && ARM64
select ARMV8_SPL_EXCEPTION_VECTORS
default y
help
Normally, if U-Boot makes a semihosting call and no debugger is
attached, then it will panic due to a synchronous abort
exception. This config adds an exception handler which will allow
U-Boot to recover. Say 'y' if unsure.
config SYS_THUMB_BUILD
bool "Build U-Boot using the Thumb instruction set"
@@ -540,6 +590,9 @@ config ARM64_SUPPORT_AARCH32
help
This ARM64 system supports AArch32 execution state.
config S5P
def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
choice
prompt "Target select"
default TARGET_HIKEY
@@ -585,6 +638,7 @@ config ARCH_ORION5X
bool "Marvell Orion"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select SPL_SEPARATE_BSS if SPL
config TARGET_STV0991
bool "Support stv0991"
@@ -617,6 +671,13 @@ config ARCH_BCM63158
select OF_CONTROL
imply CMD_DM
config ARCH_BCM6753
bool "Broadcom BCM6753 family"
select CPU_V7A
select DM
select OF_CONTROL
imply CMD_DM
config ARCH_BCM68360
bool "Broadcom BCM68360 family"
select DM
@@ -641,6 +702,11 @@ config ARCH_BCMSTB
This enables support for Broadcom ARM-based set-top box
chipsets, including the 7445 family of chips.
config ARCH_BCMBCA
bool "Broadcom broadband chip family"
select DM
select OF_CONTROL
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
select CPU_V7A
@@ -744,7 +810,6 @@ config ARCH_KEYSTONE
select CMD_POWEROFF
select CPU_V7A
select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
select SYS_THUMB_BUILD
@@ -767,6 +832,8 @@ config ARCH_OMAP2PLUS
select SUPPORT_SPL
imply TI_SYSC if DM && OF_CONTROL
imply FIT
imply DM_EVENT
imply SPL_SEPARATE_BSS
config ARCH_MESON
bool "Amlogic Meson"
@@ -806,24 +873,29 @@ config ARCH_LPC32XX
config ARCH_IMX8
bool "NXP i.MX8 platform"
select ARM64
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select DM
select GPIO_EXTRA_HEADER
select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
imply DM_EVENT
config ARCH_IMX8M
bool "NXP i.MX8M platform"
select ARM64
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_I2C_MXC
select DM
select SUPPORT_SPL
imply CMD_DM
imply DM_EVENT
config ARCH_IMX8ULP
bool "NXP i.MX8ULP platform"
@@ -833,7 +905,22 @@ config ARCH_IMX8ULP
select OF_CONTROL
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
select MISC
select IMX_SENTINEL
imply CMD_DM
imply DM_EVENT
config ARCH_IMX9
bool "NXP i.MX9 platform"
select ARM64
select DM
select MACH_IMX
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
select MISC
select IMX_SENTINEL
imply CMD_DM
imply DM_EVENT
config ARCH_IMXRT
bool "NXP i.MXRT platform"
@@ -869,10 +956,11 @@ config ARCH_MX31
config ARCH_MX7ULP
bool "NXP MX7ULP"
select BOARD_POSTCLK_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select ROM_UNIFIED_SECTIONS
@@ -885,7 +973,7 @@ config ARCH_MX7
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply BOARD_EARLY_INIT_F
@@ -894,6 +982,7 @@ config ARCH_MX7
config ARCH_MX6
bool "Freescale MX6"
select BOARD_POSTCLK_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
@@ -902,11 +991,7 @@ config ARCH_MX6
select SYS_FSL_SEC_LE
imply MXC_GPIO
imply SYS_THUMB_BUILD
if ARCH_MX6
config SPL_LDSCRIPT
default "arch/arm/mach-omap2/u-boot-spl.lds"
endif
imply SPL_SEPARATE_BSS
config ARCH_MX5
bool "Freescale MX5"
@@ -922,6 +1007,12 @@ config ARCH_NEXELL
select DM
select GPIO_EXTRA_HEADER
config ARCH_NPCM
bool "Support Nuvoton SoCs"
select DM
select OF_CONTROL
imply CMD_DM
config ARCH_APPLE
bool "Apple SoCs"
select ARM64
@@ -939,6 +1030,7 @@ config ARCH_APPLE
select DM_VIDEO
select IOMMU
select LINUX_KERNEL_IMAGE_HEADER
select OF_BOARD_SETUP
select OF_CONTROL
select PINCTRL
select POSITION_INDEPENDENT
@@ -1021,7 +1113,6 @@ config ARCH_SOCFPGA
select SPL_DM_SERIAL
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
select SPL_SERIAL
@@ -1072,6 +1163,7 @@ config ARCH_SUNXI
select OF_BOARD_SETUP
select OF_CONTROL
select OF_SEPARATE
select PINCTRL
select SPECIFY_CONSOLE_INDEX
select SPL_SEPARATE_BSS if SPL
select SPL_STACK_R if SPL
@@ -1237,34 +1329,25 @@ config ARCH_TEGRA
imply DISTRO_DEFAULTS
imply FAT_WRITE
config TARGET_VEXPRESS64_AEMV8A
bool "Support vexpress_aemv8a"
config ARCH_VEXPRESS64
bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
select ARM64
select GPIO_EXTRA_HEADER
select PL01X_SERIAL
config TARGET_VEXPRESS64_BASE_FVP
bool "Support Versatile Express ARMv8a FVP BASE model"
select ARM64
select GPIO_EXTRA_HEADER
select PL01X_SERIAL
select SEMIHOSTING
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64
select GPIO_EXTRA_HEADER
select PL01X_SERIAL
select DM
select DM_SERIAL
select PL01X_SERIAL
select OF_CONTROL
select CLK
select DM_SERIAL
select ARM_PSCI_FW
select PSCI_RESET
select DM_ETH
select BLK
select USB
imply OF_HAS_PRIOR_STAGE
select MTD_NOR_FLASH if MTD
select FLASH_CFI_DRIVER if MTD
select ENV_IS_IN_FLASH if MTD
imply DISTRO_DEFAULTS
config TARGET_CORSTONE1000
bool "Support Corstone1000 Platform"
select ARM64
select PL01X_SERIAL
select DM
config TARGET_TOTAL_COMPUTE
bool "Support Total Compute Platform"
@@ -1792,11 +1875,6 @@ config TARGET_TEN64
Support for Traverse Technologies Ten64 board, based
on NXP LS1088A.
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
select CPU_PXA27X
select GPIO_EXTRA_HEADER
config ARCH_UNIPHIER
bool "Socionext UniPhier SoCs"
select BOARD_LATE_INIT
@@ -1847,7 +1925,7 @@ config ARCH_STM32
imply CMD_DM
config ARCH_STI
bool "Support STMicrolectronics SoCs"
bool "Support STMicroelectronics SoCs"
select BLK
select CPU_V7A
select DM
@@ -1875,7 +1953,6 @@ config ARCH_STM32MP
select OF_SYSTEM_SETUP
select PINCTRL
select REGMAP
select SUPPORT_SPL
select SYSCON
select SYSRESET
select SYS_THUMB_BUILD
@@ -1897,7 +1974,7 @@ config ARCH_STM32MP
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select BLK
select BINMAN if SPL_OPTEE || (SPL && !ARM64)
select BINMAN if SPL_OPTEE || SPL
select DM
select DM_GPIO
select DM_I2C
@@ -1975,6 +2052,25 @@ config TARGET_DURIAN
Support for durian platform.
It has 2GB Sdram, uart and pcie.
config TARGET_POMELO
bool "Support Phytium Pomelo Platform"
select ARM64
select DM
select AHCI
select SCSI_AHCI
select AHCI_PCI
select BLK
select PCI
select DM_PCI
select SCSI
select DM_SCSI
select DM_SERIAL
select DM_ETH if NET
imply CMD_PCI
help
Support for pomelo platform.
It has 8GB Sdram, uart and pcie.
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
@@ -1990,6 +2086,12 @@ config TARGET_XENGUEST_ARM64
select SSCANF
imply OF_HAS_PRIOR_STAGE
config ARCH_GXP
bool "Support HPE GXP SoCs"
select DM
select OF_CONTROL
imply CMD_DM
endchoice
config SUPPORT_PASSING_ATAGS
@@ -2024,6 +2126,7 @@ config SERIAL_TAG
config STATIC_MACH_TYPE
bool "Statically define the Machine ID number"
default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
help
When booting via ATAGs, enable this option if we know the correct
machine ID number to use at compile time. Some systems will be
@@ -2032,6 +2135,10 @@ config STATIC_MACH_TYPE
config MACH_TYPE
int "Machine ID number"
depends on STATIC_MACH_TYPE
default 527 if TARGET_DS109
default 1955 if TARGET_NOKIA_RX51
default 3036 if TARGET_DS414
default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
help
When booting via ATAGs, the machine type must be passed as a number.
For the full list see https://www.arm.linux.org.uk/developer/machines
@@ -2061,21 +2168,6 @@ config TI_SECURE_DEVICE
authenticated) and the code. See the doc/README.ti-secure
file for further details.
if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
config ISW_ENTRY_ADDR
hex "Address in memory or XIP address of bootloader entry point"
default 0x402F4000 if AM43XX
default 0x402F0400 if AM33XX
default 0x40301350 if OMAP54XX
help
After any reset, the boot ROM searches the boot media for a valid
boot image. For non-XIP devices, the ROM then copies the image into
internal memory. For all boot modes, after the ROM processes the
boot image it eventually computes the entry point address depending
on the device type (secure/non-secure), boot media (xip/non-xip) and
image headers.
endif
config SYS_KWD_CONFIG
string "kwbimage config file path"
depends on ARCH_KIRKWOOD || ARCH_MVEBU
@@ -2092,12 +2184,16 @@ source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-bcm283x/Kconfig"
source "arch/arm/mach-bcmbca/Kconfig"
source "arch/arm/mach-bcmstb/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/mach-exynos/Kconfig"
source "arch/arm/mach-hpe/gxp/Kconfig"
source "arch/arm/mach-highbank/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
@@ -2136,6 +2232,8 @@ source "arch/arm/mach-imx/imx8m/Kconfig"
source "arch/arm/mach-imx/imx8ulp/Kconfig"
source "arch/arm/mach-imx/imx9/Kconfig"
source "arch/arm/mach-imx/imxrt/Kconfig"
source "arch/arm/mach-imx/mxs/Kconfig"
@@ -2196,8 +2294,10 @@ source "arch/arm/mach-imx/Kconfig"
source "arch/arm/mach-nexell/Kconfig"
source "board/armltd/total_compute/Kconfig"
source "arch/arm/mach-npcm/Kconfig"
source "board/armltd/total_compute/Kconfig"
source "board/armltd/corstone1000/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/Marvell/octeontx/Kconfig"
@@ -2206,6 +2306,7 @@ source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm963158/Kconfig"
source "board/broadcom/bcm96753ref/Kconfig"
source "board/broadcom/bcm968360bg/Kconfig"
source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
@@ -2236,23 +2337,18 @@ source "board/hisilicon/poplar/Kconfig"
source "board/isee/igep003x/Kconfig"
source "board/kontron/sl28/Kconfig"
source "board/myir/mys_6ulx/Kconfig"
source "board/siemens/common/Kconfig"
source "board/seeed/npi_imx6ull/Kconfig"
source "board/socionext/developerbox/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/traverse/ten64/Kconfig"
source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/phytium/durian/Kconfig"
source "board/phytium/pomelo/Kconfig"
source "board/xen/xenguest_arm64/Kconfig"
source "board/keymile/Kconfig"
source "arch/arm/Kconfig.debug"
endmenu
config SPL_LDSCRIPT
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64

View File

@@ -10,8 +10,6 @@ arch-$(CONFIG_CPU_ARM720T) =-march=armv4
arch-$(CONFIG_CPU_ARM920T) =-march=armv4t
arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te
arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te
arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5t
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
@@ -40,8 +38,6 @@ tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM920T) =
tune-$(CONFIG_CPU_ARM926EJS) =
tune-$(CONFIG_CPU_ARM946ES) =
tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
@@ -59,9 +55,11 @@ machine-$(CONFIG_ARCH_APPLE) += apple
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_BCMBCA) += bcmbca
machine-$(CONFIG_ARCH_BCMSTB) += bcmstb
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_GXP) += hpe
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx
machine-$(CONFIG_ARCH_K3) += k3
@@ -72,6 +70,7 @@ machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
machine-$(CONFIG_ARCH_MESON) += meson
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NEXELL) += nexell
machine-$(CONFIG_ARCH_NPCM) += npcm
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_OWL) += owl
@@ -93,6 +92,8 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_ARCH_ZYNQMP) += zynqmp
machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5
machine-$(CONFIG_MACH_IMX) += imx
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
PLATFORM_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
@@ -102,8 +103,8 @@ libs-y += $(machdirs)
head-y := arch/arm/cpu/$(CPU)/start.o
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq ($(CONFIG_SPL_START_S_PATH),)
head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
ifeq ($(CONFIG_SYS_SOC)$(CONFIG_SPL_FRAMEWORK),"mxs")
head-y := arch/arm/cpu/arm926ejs/mxs/start.o
endif
endif
@@ -111,16 +112,6 @@ libs-y += arch/arm/cpu/$(CPU)/
libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 imx8m imx8 imx8ulp imxrt))
libs-y += arch/arm/mach-imx/
endif
else
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8 imx8ulp imxrt vf610))
libs-y += arch/arm/mach-imx/
endif
endif
ifneq (,$(filter $(SOC), kirkwood))
libs-y += arch/arm/mach-mvebu/
endif

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@@ -141,11 +141,11 @@ endif
# limit ourselves to the sections we want in the .bin.
ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-j .u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j __u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j .binman_sym_table -j .text_rest
else
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
-j .data -j .got -j .got.plt -j __u_boot_list -j .rel.dyn \
-j .binman_sym_table -j .text_rest
endif

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@@ -7,7 +7,6 @@ extra-y = start.o
obj-y += cpu.o
obj-$(CONFIG_EP93XX) += ep93xx/
obj-$(CONFIG_IMX) += imx/
# some files can only build in ARM mode

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@@ -1,19 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Cirrus Logic EP93xx CPU-specific Makefile
#
# Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
#
# Copyright (C) 2004, 2005
# Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
#
# Copyright (C) 2006
# Dominic Rath <Dominic.Rath@gmx.de>
#
# Based on an original Makefile, which is
#
# (C) Copyright 2000, 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y = cpu.o led.o speed.o timer.o
obj-y += lowlevel_init.o

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@@ -1,37 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Cirrus Logic EP93xx CPU-specific support.
*
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
*
* Copyright (C) 2004, 2005
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
*/
#include <common.h>
#include <cpu_func.h>
#include <asm/arch/ep93xx.h>
#include <asm/io.h>
/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */
extern void reset_cpu(void)
{
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
uint32_t value;
/* Unlock DeviceCfg and set SWRST */
writel(0xAA, &syscon->sysswlock);
value = readl(&syscon->devicecfg);
value |= SYSCON_DEVICECFG_SWRST;
writel(value, &syscon->devicecfg);
/* Unlock DeviceCfg and clear SWRST */
writel(0xAA, &syscon->sysswlock);
value = readl(&syscon->devicecfg);
value &= ~SYSCON_DEVICECFG_SWRST;
writel(value, &syscon->devicecfg);
/* Dying... */
while (1)
; /* noop */
}

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@@ -1,85 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2010, 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
*/
#include <asm/io.h>
#include <asm/arch/ep93xx.h>
#include <config.h>
#include <status_led.h>
static uint8_t saved_state[2] = {CONFIG_LED_STATUS_OFF, CONFIG_LED_STATUS_OFF};
static uint32_t gpio_pin[2] = {1 << CONFIG_LED_STATUS_GREEN,
1 << CONFIG_LED_STATUS_RED};
static inline void switch_LED_on(uint8_t led)
{
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
writel(readl(&gpio->pedr) | gpio_pin[led], &gpio->pedr);
saved_state[led] = CONFIG_LED_STATUS_ON;
}
static inline void switch_LED_off(uint8_t led)
{
register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
writel(readl(&gpio->pedr) & ~gpio_pin[led], &gpio->pedr);
saved_state[led] = CONFIG_LED_STATUS_OFF;
}
void red_led_on(void)
{
switch_LED_on(CONFIG_LED_STATUS_RED);
}
void red_led_off(void)
{
switch_LED_off(CONFIG_LED_STATUS_RED);
}
void green_led_on(void)
{
switch_LED_on(CONFIG_LED_STATUS_GREEN);
}
void green_led_off(void)
{
switch_LED_off(CONFIG_LED_STATUS_GREEN);
}
void __led_init(led_id_t mask, int state)
{
__led_set(mask, state);
}
void __led_toggle(led_id_t mask)
{
if (CONFIG_LED_STATUS_RED == mask) {
if (CONFIG_LED_STATUS_ON == saved_state[CONFIG_LED_STATUS_RED])
red_led_off();
else
red_led_on();
} else if (CONFIG_LED_STATUS_GREEN == mask) {
if (CONFIG_LED_STATUS_ON ==
saved_state[CONFIG_LED_STATUS_GREEN])
green_led_off();
else
green_led_on();
}
}
void __led_set(led_id_t mask, int state)
{
if (CONFIG_LED_STATUS_RED == mask) {
if (CONFIG_LED_STATUS_ON == state)
red_led_on();
else
red_led_off();
} else if (CONFIG_LED_STATUS_GREEN == mask) {
if (CONFIG_LED_STATUS_ON == state)
green_led_on();
else
green_led_off();
}
}

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@@ -1,457 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Low-level initialization for EP93xx
*
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
* Copyright (C) 2013
* Sergey Kostanabev <sergey.kostanbaev <at> fairwaves.ru>
*
* Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de>
* Copyright (C) 2006 Cirrus Logic Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*/
#include <config.h>
#include <asm/arch-ep93xx/ep93xx.h>
/*
/* Configure the SDRAM based on the supplied settings.
*
* Input: r0 - SDRAM DEVCFG register
* r2 - configuration for SDRAM chips
* Output: none
* Modifies: r3, r4
*/
ep93xx_sdram_config:
/* Program the SDRAM device configuration register. */
ldr r3, =SDRAM_BASE
#ifdef CONFIG_EDB93XX_SDCS0
str r0, [r3, #SDRAM_OFF_DEVCFG0]
#endif
#ifdef CONFIG_EDB93XX_SDCS1
str r0, [r3, #SDRAM_OFF_DEVCFG1]
#endif
#ifdef CONFIG_EDB93XX_SDCS2
str r0, [r3, #SDRAM_OFF_DEVCFG2]
#endif
#ifdef CONFIG_EDB93XX_SDCS3
str r0, [r3, #SDRAM_OFF_DEVCFG3]
#endif
/* Set the Initialize and MRS bits (issue continuous NOP commands
* (INIT & MRS set))
*/
ldr r4, =(EP93XX_SDRAMCTRL_GLOBALCFG_INIT | \
EP93XX_SDRAMCTRL_GLOBALCFG_MRS | \
EP93XX_SDRAMCTRL_GLOBALCFG_CKE)
str r4, [r3, #SDRAM_OFF_GLCONFIG]
/* Delay for 200us. */
mov r4, #0x3000
delay1:
subs r4, r4, #1
bne delay1
/* Clear the MRS bit to issue a precharge all. */
ldr r4, =(EP93XX_SDRAMCTRL_GLOBALCFG_INIT | \
EP93XX_SDRAMCTRL_GLOBALCFG_CKE)
str r4, [r3, #SDRAM_OFF_GLCONFIG]
/* Temporarily set the refresh timer to 0x10. Make it really low so
* that refresh cycles are generated.
*/
ldr r4, =0x10
str r4, [r3, #SDRAM_OFF_REFRSHTIMR]
/* Delay for at least 80 SDRAM clock cycles. */
mov r4, #80
delay2:
subs r4, r4, #1
bne delay2
/* Set the refresh timer to the fastest required for any device
* that might be used. Set 9.6 ms refresh time.
*/
ldr r4, =0x01e0
str r4, [r3, #SDRAM_OFF_REFRSHTIMR]
/* Select mode register update mode. */
ldr r4, =(EP93XX_SDRAMCTRL_GLOBALCFG_CKE | \
EP93XX_SDRAMCTRL_GLOBALCFG_MRS)
str r4, [r3, #SDRAM_OFF_GLCONFIG]
/* Program the mode register on the SDRAM by performing fake read */
ldr r4, [r2]
/* Select normal operating mode. */
ldr r4, =EP93XX_SDRAMCTRL_GLOBALCFG_CKE
str r4, [r3, #SDRAM_OFF_GLCONFIG]
/* Return to the caller. */
mov pc, lr
/*
* Test to see if the SDRAM has been configured in a usable mode.
*
* Input: r0 - Test address of SDRAM
* Output: r0 - 0 -- Test OK, -1 -- Failed
* Modifies: r0-r5
*/
ep93xx_sdram_test:
/* Load the test patterns to be written to SDRAM. */
ldr r1, =0xf00dface
ldr r2, =0xdeadbeef
ldr r3, =0x08675309
ldr r4, =0xdeafc0ed
/* Store the test patterns to SDRAM. */
stmia r0, {r1-r4}
/* Load the test patterns from SDRAM one at a time and compare them
* to the actual pattern.
*/
ldr r5, [r0]
cmp r5, r1
ldreq r5, [r0, #0x0004]
cmpeq r5, r2
ldreq r5, [r0, #0x0008]
cmpeq r5, r3
ldreq r5, [r0, #0x000c]
cmpeq r5, r4
/* Return -1 if a mismatch was encountered, 0 otherwise. */
mvnne r0, #0xffffffff
moveq r0, #0x00000000
/* Return to the caller. */
mov pc, lr
/*
* Determine the size of the SDRAM. Use data=address for the scan.
*
* Input: r0 - Start SDRAM address
* Return: r0 - Single block size
* r1 - Valid block mask
* r2 - Total block count
* Modifies: r0-r5
*/
ep93xx_sdram_size:
/* Store zero at offset zero. */
str r0, [r0]
/* Start checking for an alias at 1MB into SDRAM. */
ldr r1, =0x00100000
/* Store the offset at the current offset. */
check_block_size:
str r1, [r0, r1]
/* Read back from zero. */
ldr r2, [r0]
/* Stop searching of an alias was found. */
cmp r1, r2
beq found_block_size
/* Advance to the next power of two boundary. */
mov r1, r1, lsl #1
/* Loop back if the size has not reached 256MB. */
cmp r1, #0x10000000
bne check_block_size
/* A full 256MB of memory was found, so return it now. */
ldr r0, =0x10000000
ldr r1, =0x00000000
ldr r2, =0x00000001
mov pc, lr
/* An alias was found. See if the first block is 128MB in size. */
found_block_size:
cmp r1, #0x08000000
/* The first block is 128MB, so there is no further memory. Return it
* now.
*/
ldreq r0, =0x08000000
ldreq r1, =0x00000000
ldreq r2, =0x00000001
moveq pc, lr
/* Save the block size, set the block address bits to zero, and
* initialize the block count to one.
*/
mov r3, r1
ldr r4, =0x00000000
ldr r5, =0x00000001
/* Look for additional blocks of memory by searching for non-aliases. */
find_blocks:
/* Store zero back to address zero. It may be overwritten. */
str r0, [r0]
/* Advance to the next power of two boundary. */
mov r1, r1, lsl #1
/* Store the offset at the current offset. */
str r1, [r0, r1]
/* Read back from zero. */
ldr r2, [r0]
/* See if a non-alias was found. */
cmp r1, r2
/* If a non-alias was found, then or in the block address bit and
* multiply the block count by two (since there are two unique
* blocks, one with this bit zero and one with it one).
*/
orrne r4, r4, r1
movne r5, r5, lsl #1
/* Continue searching if there are more address bits to check. */
cmp r1, #0x08000000
bne find_blocks
/* Return the block size, address mask, and count. */
mov r0, r3
mov r1, r4
mov r2, r5
/* Return to the caller. */
mov pc, lr
.globl lowlevel_init
lowlevel_init:
mov r6, lr
/* Make sure caches are off and invalidated. */
ldr r0, =0x00000000
mcr p15, 0, r0, c1, c0, 0
nop
nop
nop
nop
nop
/* Turn off the green LED and turn on the red LED. If the red LED
* is left on for too long, the external reset circuit described
* by application note AN258 will cause the system to reset.
*/
ldr r1, =EP93XX_LED_DATA
ldr r0, [r1]
bic r0, r0, #EP93XX_LED_GREEN_ON
orr r0, r0, #EP93XX_LED_RED_ON
str r0, [r1]
/* Undo the silly static memory controller programming performed
* by the boot rom.
*/
ldr r0, =SMC_BASE
/* Set WST1 and WST2 to 31 HCLK cycles (slowest access) */
ldr r1, =0x0000fbe0
/* Reset EP93XX_OFF_SMCBCR0 */
ldr r2, [r0]
orr r2, r2, r1
str r2, [r0]
ldr r2, [r0, #EP93XX_OFF_SMCBCR1]
orr r2, r2, r1
str r2, [r0, #EP93XX_OFF_SMCBCR1]
ldr r2, [r0, #EP93XX_OFF_SMCBCR2]
orr r2, r2, r1
str r2, [r0, #EP93XX_OFF_SMCBCR2]
ldr r2, [r0, #EP93XX_OFF_SMCBCR3]
orr r2, r2, r1
str r2, [r0, #EP93XX_OFF_SMCBCR3]
ldr r2, [r0, #EP93XX_OFF_SMCBCR6]
orr r2, r2, r1
str r2, [r0, #EP93XX_OFF_SMCBCR6]
ldr r2, [r0, #EP93XX_OFF_SMCBCR7]
orr r2, r2, r1
str r2, [r0, #EP93XX_OFF_SMCBCR7]
/* Set the PLL1 and processor clock. */
ldr r0, =SYSCON_BASE
#ifdef CONFIG_EDB9301
/* 332MHz, giving a 166MHz processor clock. */
ldr r1, = 0x02b49907
#else
#ifdef CONFIG_EDB93XX_INDUSTRIAL
/* 384MHz, giving a 196MHz processor clock. */
ldr r1, =0x02a4bb38
#else
/* 400MHz, giving a 200MHz processor clock. */
ldr r1, =0x02a4e39e
#endif
#endif
str r1, [r0, #SYSCON_OFF_CLKSET1]
nop
nop
nop
nop
nop
/* Need to make sure that SDRAM is configured correctly before
* coping the code into it.
*/
#ifdef CONFIG_EDB93XX_SDCS0
mov r11, #SDRAM_DEVCFG0_BASE
#endif
#ifdef CONFIG_EDB93XX_SDCS1
mov r11, #SDRAM_DEVCFG1_BASE
#endif
#ifdef CONFIG_EDB93XX_SDCS2
mov r11, #SDRAM_DEVCFG2_BASE
#endif
#ifdef CONFIG_EDB93XX_SDCS3
ldr r0, =SYSCON_BASE
ldr r0, [r0, #SYSCON_OFF_SYSCFG]
ands r0, r0, #SYSCON_SYSCFG_LASDO
moveq r11, #SDRAM_DEVCFG3_ASD0_BASE
movne r11, #SDRAM_DEVCFG3_ASD1_BASE
#endif
/* See Table 13-5 in EP93xx datasheet for more info about DRAM
* register mapping */
/* Try a 32-bit wide configuration of SDRAM. */
ldr r0, =(EP93XX_SDRAMCTRL_DEVCFG_BANKCOUNT | \
EP93XX_SDRAMCTRL_DEVCFG_SROMLL | \
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_2 | \
EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_2)
/* Set burst count: 4 and CAS: 2
* Burst mode [A11:A10]; CAS [A16:A14]
*/
orr r2, r11, #0x00008800
bl ep93xx_sdram_config
/* Test the SDRAM. */
mov r0, r11
bl ep93xx_sdram_test
cmp r0, #0x00000000
beq ep93xx_sdram_done
/* Try a 16-bit wide configuration of SDRAM. */
ldr r0, =(EP93XX_SDRAMCTRL_DEVCFG_BANKCOUNT | \
EP93XX_SDRAMCTRL_DEVCFG_SROMLL | \
EP93XX_SDRAMCTRL_DEVCFG_CASLAT_2 | \
EP93XX_SDRAMCTRL_DEVCFG_RASTOCAS_2 | \
EP93XX_SDRAMCTRL_DEVCFG_EXTBUSWIDTH)
/* Set burst count: 8, CAS: 2, sequential burst
* Accoring to Table 13-3 for 16bit operations mapping must be shifted.
* Burst mode [A10:A9]; CAS [A15:A13]
*/
orr r2, r11, #0x00004600
bl ep93xx_sdram_config
/* Test the SDRAM. */
mov r0, r11
bl ep93xx_sdram_test
cmp r0, #0x00000000
beq ep93xx_sdram_done
/* Turn off the red LED. */
ldr r0, =EP93XX_LED_DATA
ldr r1, [r0]
bic r1, r1, #EP93XX_LED_RED_ON
str r1, [r0]
/* There is no SDRAM so flash the green LED. */
flash_green:
orr r1, r1, #EP93XX_LED_GREEN_ON
str r1, [r0]
ldr r2, =0x00010000
flash_green_delay_1:
subs r2, r2, #1
bne flash_green_delay_1
bic r1, r1, #EP93XX_LED_GREEN_ON
str r1, [r0]
ldr r2, =0x00010000
flash_green_delay_2:
subs r2, r2, #1
bne flash_green_delay_2
orr r1, r1, #EP93XX_LED_GREEN_ON
str r1, [r0]
ldr r2, =0x00010000
flash_green_delay_3:
subs r2, r2, #1
bne flash_green_delay_3
bic r1, r1, #EP93XX_LED_GREEN_ON
str r1, [r0]
ldr r2, =0x00050000
flash_green_delay_4:
subs r2, r2, #1
bne flash_green_delay_4
b flash_green
ep93xx_sdram_done:
ldr r1, =EP93XX_LED_DATA
ldr r0, [r1]
bic r0, r0, #EP93XX_LED_RED_ON
str r0, [r1]
/* Determine the size of the SDRAM. */
mov r0, r11
bl ep93xx_sdram_size
/* Save the SDRAM characteristics. */
mov r8, r0
mov r9, r1
mov r10, r2
/* Compute total memory size into r1 */
mul r1, r8, r10
#ifdef CONFIG_EDB93XX_SDCS0
ldr r2, [r0, #SDRAM_OFF_DEVCFG0]
#endif
#ifdef CONFIG_EDB93XX_SDCS1
ldr r2, [r0, #SDRAM_OFF_DEVCFG1]
#endif
#ifdef CONFIG_EDB93XX_SDCS2
ldr r2, [r0, #SDRAM_OFF_DEVCFG2]
#endif
#ifdef CONFIG_EDB93XX_SDCS3
ldr r2, [r0, #SDRAM_OFF_DEVCFG3]
#endif
/* Consider small DRAM size as:
* < 32Mb for 32bit bus
* < 64Mb for 16bit bus
*/
tst r2, #EP93XX_SDRAMCTRL_DEVCFG_EXTBUSWIDTH
moveq r1, r1, lsr #1
cmp r1, #0x02000000
#if defined(CONFIG_EDB9301)
/* Set refresh counter to 20ms for small DRAM size, otherwise 9.6ms */
movlt r1, #0x03f0
movge r1, #0x01e0
#else
/* Set refresh counter to 30.7ms for small DRAM size, otherwise 15ms */
movlt r1, #0x0600
movge r1, #0x2f0
#endif
str r1, [r0, #SDRAM_OFF_REFRSHTIMR]
/* Save the memory configuration information. */
orr r0, r11, #UBOOT_MEMORYCNF_BANK_SIZE
stmia r0, {r8-r11}
mov lr, r6
mov pc, lr

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@@ -1,96 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Cirrus Logic EP93xx PLL support.
*
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
*/
#include <common.h>
#include <clock_legacy.h>
#include <asm/arch/ep93xx.h>
#include <asm/io.h>
#include <div64.h>
/*
* get_board_sys_clk() should be defined as the input frequency of the PLL.
*
* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
* the specified bus in HZ.
*/
/*
* return the PLL output frequency
*
* PLL rate = get_board_sys_clk() * (X1FBD + 1) * (X2FBD + 1)
* / (X2IPD + 1) / 2^PS
*/
static ulong get_PLLCLK(uint32_t *pllreg)
{
uint8_t i;
const uint32_t clkset = readl(pllreg);
uint64_t rate = get_board_sys_clk();
rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1;
rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1;
do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */
for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++)
rate >>= 1;
return (ulong)rate;
}
/* return FCLK frequency */
ulong get_FCLK(void)
{
const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
const uint32_t clkset1 = readl(&syscon->clkset1);
const uint8_t fclk_div =
fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7];
const ulong fclk_rate = get_PLLCLK(&syscon->clkset1) / fclk_div;
return fclk_rate;
}
/* return HCLK frequency */
ulong get_HCLK(void)
{
const uint8_t hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
const uint32_t clkset1 = readl(&syscon->clkset1);
const uint8_t hclk_div =
hclk_divisors[(clkset1 >> SYSCON_CLKSET1_HCLK_DIV_SHIFT) & 7];
const ulong hclk_rate = get_PLLCLK(&syscon->clkset1) / hclk_div;
return hclk_rate;
}
/* return PCLK frequency */
ulong get_PCLK(void)
{
const uint8_t pclk_divisors[] = { 1, 2, 4, 8 };
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
const uint32_t clkset1 = readl(&syscon->clkset1);
const uint8_t pclk_div =
pclk_divisors[(clkset1 >> SYSCON_CLKSET1_PCLK_DIV_SHIFT) & 3];
const ulong pclk_rate = get_HCLK() / pclk_div;
return pclk_rate;
}
/* return UCLK frequency */
ulong get_UCLK(void)
{
struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
ulong uclk_rate;
const uint32_t value = readl(&syscon->pwrcnt);
if (value & SYSCON_PWRCNT_UART_BAUD)
uclk_rate = get_board_sys_clk();
else
uclk_rate = get_board_sys_clk() / 2;
return uclk_rate;
}

View File

@@ -1,117 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Cirrus Logic EP93xx timer support.
*
* Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias@kaehlcke.net>
*
* Copyright (C) 2004, 2005
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
*
* Based on the original intr.c Cirrus Logic EP93xx Rev D. interrupt support,
* author unknown.
*/
#include <common.h>
#include <init.h>
#include <time.h>
#include <linux/delay.h>
#include <linux/types.h>
#include <asm/arch/ep93xx.h>
#include <asm/io.h>
#include <div64.h>
#define TIMER_CLKSEL (1 << 3)
#define TIMER_ENABLE (1 << 7)
#define TIMER_FREQ 508469 /* ticks / second */
#define TIMER_MAX_VAL 0xFFFFFFFF
static struct ep93xx_timer
{
unsigned long long ticks;
unsigned long last_read;
} timer;
static inline unsigned long long usecs_to_ticks(unsigned long usecs)
{
unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
do_div(ticks, 1000 * 1000);
return ticks;
}
static inline void read_timer(void)
{
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value);
if (now >= timer.last_read)
timer.ticks += now - timer.last_read;
else
/* an overflow occurred */
timer.ticks += TIMER_MAX_VAL - timer.last_read + now;
timer.last_read = now;
}
/*
* Get the number of ticks (in CONFIG_SYS_HZ resolution)
*/
unsigned long long get_ticks(void)
{
unsigned long long sys_ticks;
read_timer();
sys_ticks = timer.ticks * CONFIG_SYS_HZ;
do_div(sys_ticks, TIMER_FREQ);
return sys_ticks;
}
unsigned long get_timer(unsigned long base)
{
return get_ticks() - base;
}
void __udelay(unsigned long usec)
{
unsigned long long target;
read_timer();
target = timer.ticks + usecs_to_ticks(usec);
while (timer.ticks < target)
read_timer();
}
int timer_init(void)
{
struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
/* use timer 3 with 508KHz and free running, not enabled now */
writel(TIMER_CLKSEL, &timer_regs->timer3.control);
/* set initial timer value */
writel(TIMER_MAX_VAL, &timer_regs->timer3.load);
/* Enable the timer */
writel(TIMER_ENABLE | TIMER_CLKSEL,
&timer_regs->timer3.control);
/* Reset the timer */
read_timer();
timer.ticks = 0;
return 0;
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
unsigned long get_tbclk(void)
{
return CONFIG_SYS_HZ;
}

View File

@@ -21,6 +21,7 @@
#include <asm-offsets.h>
#include <config.h>
#include <common.h>
#include <system-constants.h>
/*
*************************************************************************
@@ -44,7 +45,7 @@ reset:
* it point to the end of OCRAM if the SP is zero.
*/
cmp sp, #0x00000000
ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
ldreq sp, =SYS_INIT_SP_ADDR
/*
* Store all registers on old stack pointer, this will allow us later to

View File

@@ -29,8 +29,8 @@ SECTIONS
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
} > .sram
. = ALIGN(4);

View File

@@ -27,6 +27,37 @@ config ARMV7_BOOT_SEC_DEFAULT
This can be overridden at run-time by setting the bootm_boot_mode env.
variable to "sec" or "nonsec".
config HAS_ARMV7_SECURE_BASE
bool "Enable support for a ahardware secure memory area"
default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \
|| MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124
config ARMV7_SECURE_BASE
hex "Base address for secure mode memory"
depends on HAS_ARMV7_SECURE_BASE
default 0xfff00000 if TEGRA124
default 0x2ffc0000 if ARCH_STM32MP
default 0x2f000000 if ARCH_MX7ULP
default 0x10010000 if ARCH_LS1021A
default 0x00900000 if ARCH_MX7
default 0x00044000 if MACH_SUN8I
default 0x00020000 if MACH_SUN6I || MACH_SUN7I
config ARMV7_SECURE_RESERVE_SIZE
hex
depends on TEGRA124 && HAS_ARMV7_SECURE_BASE
default 0x100000
help
Reserve top 1M for secure RAM
config ARMV7_SECURE_MAX_SIZE
hex
depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \
|| MACH_SUN7I || MACH_SUN8I
default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3
default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
default 0x10000
config ARMV7_VIRT
bool "Enable support for hardware virtualization" if EXPERT
depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC

View File

@@ -13,6 +13,7 @@
#include <asm-offsets.h>
#include <config.h>
#include <linux/linkage.h>
#include <system-constants.h>
.pushsection .text.s_init, "ax"
WEAK(s_init)
@@ -28,7 +29,7 @@ WEAK(lowlevel_init)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr sp, =CONFIG_SPL_STACK
#else
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
ldr sp, =SYS_INIT_SP_ADDR
#endif
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#ifdef CONFIG_SPL_DM

View File

@@ -3,16 +3,17 @@ config ARCH_LS1021A
select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI
select SYS_FSL_DDR_BE if SYS_FSL_DDR
select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
select SYS_FSL_IFC_BE
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
select SYS_FSL_ERRATUM_A008850
select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR
select SYS_FSL_ERRATUM_A008997 if USB
select SYS_FSL_ERRATUM_A009007 if USB
select SYS_FSL_ERRATUM_A009008 if USB
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009798 if USB
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ESDHC_BE
select SYS_FSL_HAS_CCI400
select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
@@ -42,12 +43,6 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
config NXP_ESBC
bool "NXP_ESBC"
help
Enable Freescale Secure Boot feature. Normally selected
by defconfig. If unsure, do not change.
config SYS_CCI400_OFFSET
hex "Offset for CCI400 base"
depends on SYS_FSL_HAS_CCI400

View File

@@ -13,10 +13,6 @@
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SYS_FSL_NUM_CC_PLLS
#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
#endif
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2021 NXP
*/
#include <common.h>
@@ -20,6 +21,7 @@
#include <config.h>
#include <fsl_wdog.h>
#include <linux/delay.h>
#include <dm.h>
#include "fsl_epu.h"
@@ -397,3 +399,19 @@ void arch_preboot_os(void)
ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
}
#ifdef CONFIG_ARCH_MISC_INIT
int arch_misc_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize caam_jr: %d\n", ret);
}
return 0;
}
#endif

View File

@@ -36,7 +36,7 @@
.align 5
#define ONE_MS (COUNTER_FREQUENCY / 1000)
#define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000)
#define RESET_WAIT (30 * ONE_MS)
.globl psci_version

View File

@@ -12,7 +12,9 @@
#include <asm/arch/ls102xa_soc.h>
#include <asm/arch/ls102xa_stream_id.h>
#include <fsl_csu.h>
#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
#include <fsl_ddr_sdram.h>
#endif
struct liodn_id_table sec_liodn_tbl[] = {
SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
@@ -172,10 +174,6 @@ int arch_soc_init(void)
out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
#endif
#ifdef CONFIG_VIDEO_FSL_DCU_FB
out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);
#endif
/* Configure Little endian for SAI, ASRC and SPDIF */
out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE);

View File

@@ -65,7 +65,7 @@ int timer_init(void)
/* Enable System Counter */
writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
freq = COUNTER_FREQUENCY;
freq = CONFIG_COUNTER_FREQUENCY;
asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/* Set PL1 Physical Timer Ctrl */

View File

@@ -189,11 +189,11 @@ ENTRY(_nonsec_init)
* we do this here instead.
* But first check if we have the generic timer.
*/
#ifdef COUNTER_FREQUENCY
#if CONFIG_COUNTER_FREQUENCY
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
ldreq r1, =COUNTER_FREQUENCY
ldreq r1, =CONFIG_COUNTER_FREQUENCY
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif

View File

@@ -3,14 +3,13 @@
# Copyright (C) 2009 Samsung Electronics
# Minkyu Kang <mk7.kang@samsung.com>
obj-$(CONFIG_PWM_S5P) += pwm.o
ifdef CONFIG_ARCH_NEXELL
obj-$(CONFIG_PWM_NX) += pwm.o
obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o
else
obj-y += cpu_info.o
ifndef CONFIG_SPL_BUILD
obj-y += timer.o
obj-y += sromc.o
obj-$(CONFIG_PWM) += pwm.o
endif
endif

View File

@@ -4,6 +4,7 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
#include <common.h>
#include <display_options.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/global_data.h>

View File

@@ -17,6 +17,7 @@
#include <asm/system.h>
#include <linux/linkage.h>
#include <asm/armv7.h>
#include <system-constants.h>
/*************************************************************************
*
@@ -97,12 +98,10 @@ switch_to_hypervisor_ret:
orr r0, r0, #0xc0 @ disable FIQ and IRQ
msr cpsr,r0
#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
* Continue to use ROM code vector only in OMAP4 spl)
*/
#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
/* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */
mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
bic r0, #CR_V @ V = 0
@@ -256,7 +255,7 @@ ENTRY(cpu_init_cp15)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr r0, =(CONFIG_SPL_STACK)
#else
ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0, =(SYS_INIT_SP_ADDR)
#endif
bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
mov sp, r0

View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2014 stmicroelectronics
* (C) Copyright 2014 STMicroelectronics
*/
#include <config.h>

View File

@@ -57,7 +57,7 @@ static u32 __secure cp15_read_cntp_ctl(void)
return val;
}
#define ONE_MS (COUNTER_FREQUENCY / 1000)
#define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000)
static void __secure __mdelay(u32 ms)
{
@@ -153,7 +153,7 @@ static void __secure sunxi_cpu_set_power(int cpu, bool on)
sunxi_power_switch((void *)cpucfg + SUN8I_R40_PWR_CLAMP(cpu),
(void *)cpucfg + SUN8I_R40_PWROFF,
on, 0);
on, cpu);
}
#else /* ! CONFIG_MACH_SUN7I && ! CONFIG_MACH_SUN8I_R40 */
static void __secure sunxi_cpu_set_power(int cpu, bool on)

View File

@@ -38,8 +38,8 @@ SECTIONS
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
} > .sram
. = ALIGN(4);

View File

@@ -31,6 +31,12 @@ config ARMV8_SET_SMPEN
it can be safely enabled when EL2/EL3 initialized SMPEN bit
or when CPU implementation doesn't include that register.
config ARMV8_SWITCH_TO_EL1
bool "Enable switching to running in EL1"
help
In some circumstances we need to switch to running in EL1.
Enable this option to have U-Boot switch to EL1.
config ARMV8_SPIN_TABLE
bool "Support spin-table enable method"
depends on ARMV8_MULTIENTRY && OF_LIBFDT
@@ -70,6 +76,7 @@ config ARMV8_SEC_FIRMWARE_SUPPORT
config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
bool "Enable ARMv8 secure monitor firmware framework support for SPL"
depends on SPL
select SPL_FIT
select SPL_OF_LIBFDT
help
@@ -77,6 +84,7 @@ config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
config SPL_RECOVER_DATA_SECTION
bool "save/restore SPL data section"
depends on SPL
help
Say Y here to save SPL data section for cold boot, and restore
at warm boot in SPL phase.
@@ -84,6 +92,7 @@ config SPL_RECOVER_DATA_SECTION
config SEC_FIRMWARE_ARMV8_PSCI
bool "PSCI implementation in secure monitor firmware"
depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT
depends on ARMV8_PSCI=n
help
This config enables the ARMv8 PSCI implementation in secure monitor
firmware. This is a private PSCI implementation and different from
@@ -125,6 +134,9 @@ config PSCI_RESET
Select Y here to make use of PSCI calls for system reset
config SYS_HAS_ARMV8_SECURE_BASE
bool
config ARMV8_PSCI
bool "Enable PSCI support" if EXPERT
help
@@ -152,22 +164,41 @@ config ARMV8_PSCI_CPUS_PER_CLUSTER
A value 0 or no definition of it works for single cluster system.
System with multi-cluster should difine their own exact value.
config ARMV8_PSCI_RELOCATE
bool "Relocate PSCI code"
depends on ARMV8_PSCI
depends on SYS_HAS_ARMV8_SECURE_BASE
help
Relocate PSCI code, for example to a secure memory on the SoC. If not
set, the PSCI sections are placed together with the u-boot and the
regions will be marked as reserved before linux is started.
config ARMV8_SECURE_BASE
hex "Secure address for PSCI image"
depends on ARMV8_PSCI_RELOCATE
default 0x18000000 if ARCH_LS1028A
help
Address for placing the PSCI text, data and stack sections.
config ARMV8_EA_EL3_FIRST
bool "External aborts and SError interrupt exception are taken in EL3"
help
Exception handling at all exception levels for External Abort and
SError interrupt exception are taken in EL3.
if SYS_HAS_ARMV8_SECURE_BASE
menuconfig ARMV8_CRYPTO
bool "ARM64 Accelerated Cryptographic Algorithms"
config ARMV8_SECURE_BASE
hex "Secure address for PSCI image"
depends on ARMV8_PSCI
help
Address for placing the PSCI text, data and stack sections.
If not defined, the PSCI sections are placed together with the u-boot
but platform can choose to place PSCI code image separately in other
places such as some secure RAM built-in SOC etc.
if ARMV8_CRYPTO
config ARMV8_CE_SHA1
bool "SHA-1 digest algorithm (ARMv8 Crypto Extensions)"
default y if SHA1
config ARMV8_CE_SHA256
bool "SHA-256 digest algorithm (ARMv8 Crypto Extensions)"
default y if SHA256
endif

View File

@@ -44,3 +44,5 @@ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
obj-$(CONFIG_ARMV8_PSCI) += psci.o
obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/
obj-$(CONFIG_XEN) += xen/
obj-$(CONFIG_ARMV8_CE_SHA1) += sha1_ce_glue.o sha1_ce_core.o
obj-$(CONFIG_ARMV8_CE_SHA256) += sha256_ce_glue.o sha256_ce_core.o

View File

@@ -39,8 +39,28 @@ DECLARE_GLOBAL_DATA_PTR;
* off: FFF
*/
u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
static int get_effective_el(void)
{
int el = current_el();
if (el == 2) {
u64 hcr_el2;
/*
* If we are using the EL2&0 translation regime, the TCR_EL2
* looks like the EL1 version, even though we are in EL2.
*/
__asm__ ("mrs %0, HCR_EL2\n" : "=r" (hcr_el2));
if (hcr_el2 & BIT(HCR_EL2_E2H_BIT))
return 1;
}
return el;
}
u64 get_tcr(u64 *pips, u64 *pva_bits)
{
int el = get_effective_el();
u64 max_addr = 0;
u64 ips, va_bits;
u64 tcr;
@@ -115,7 +135,7 @@ static u64 *find_pte(u64 addr, int level)
debug("addr=%llx level=%d\n", addr, level);
get_tcr(0, NULL, &va_bits);
get_tcr(NULL, &va_bits);
if (va_bits < 39)
start_level = 1;
@@ -343,7 +363,7 @@ __weak u64 get_page_table_size(void)
u64 va_bits;
int start_level = 0;
get_tcr(0, NULL, &va_bits);
get_tcr(NULL, &va_bits);
if (va_bits < 39)
start_level = 1;
@@ -415,7 +435,7 @@ __weak void mmu_setup(void)
setup_all_pgtables();
el = current_el();
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL),
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL),
MEMORY_ATTRIBUTES);
/* enable the mmu */

View File

@@ -3,6 +3,7 @@
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
PLATFORM_RELFLAGS += -fno-common -ffixed-x18
PLATFORM_RELFLAGS += $(call cc-option,-mbranch-protection=none)
PF_NO_UNALIGNED := $(call cc-option, -mstrict-align)
PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)

View File

@@ -8,9 +8,9 @@
#include <asm/psci.h>
#include <asm/system.h>
#include <asm/armv8/sec_firmware.h>
#include <linux/libfdt.h>
#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
int psci_update_dt(void *fdt)
__weak int psci_update_dt(void *fdt)
{
/*
* If the PSCI in SEC Firmware didn't work, avoid to update the
@@ -18,8 +18,10 @@ int psci_update_dt(void *fdt)
* number to support detecting PSCI dynamically and then switching
* the SMP boot method between PSCI and spin-table.
*/
if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
if (CONFIG_IS_ENABLED(SEC_FIRMWARE_ARMV8_PSCI) &&
sec_firmware_support_psci_version() == PSCI_INVALID_VER)
return 0;
fdt_psci(fdt);
#if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
@@ -30,4 +32,3 @@ int psci_update_dt(void *fdt)
return 0;
}
#endif

View File

@@ -79,6 +79,9 @@ static void relocate_secure_section(void)
void armv8_setup_psci(void)
{
if (current_el() != 3)
return;
relocate_secure_section();
secure_ram_addr(psci_setup_vectors)();
secure_ram_addr(psci_arch_init)();

View File

@@ -77,14 +77,18 @@ _save_el_regs:
switch_el x11, 3f, 2f, 1f
3: mrs x1, esr_el3
mrs x2, elr_el3
mrs x3, spsr_el3
b 0f
2: mrs x1, esr_el2
mrs x2, elr_el2
mrs x3, spsr_el2
b 0f
1: mrs x1, esr_el1
mrs x2, elr_el1
mrs x3, spsr_el1
0:
stp x2, x0, [sp, #-16]!
stp x1, x0, [sp, #-16]!
stp x3, x2, [sp, #-16]!
mov x0, sp
ret
@@ -98,7 +102,7 @@ _save_el_regs:
* This is the first part of the shared routine called into from all entries.
*/
exception_exit:
ldp x2, x0, [sp],#16
ldp xzr, x2, [sp],#16
switch_el x11, 3f, 2f, 1f
3: msr elr_el3, x2
b _restore_regs
@@ -118,6 +122,7 @@ exception_exit:
* This is the second part of the shared routine called into from all entries.
*/
_restore_regs:
ldp xzr, x0, [sp],#16
ldp x1, x2, [sp],#16
ldp x3, x4, [sp],#16
ldp x5, x6, [sp],#16

View File

@@ -26,6 +26,7 @@ config ARCH_LS1012A
config ARCH_LS1028A
bool
select ARMV8_SET_SMPEN
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
@@ -55,6 +56,7 @@ config ARCH_LS1028A
select SYS_FSL_ERRATUM_A011334
select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND
select RESV_RAM if GIC_V3_ITS
select SYS_HAS_ARMV8_SECURE_BASE
imply PANIC_HANG
config ARCH_LS1043A
@@ -74,7 +76,6 @@ config ARCH_LS1043A
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009660 if !TFABOOT
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
@@ -84,6 +85,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
@@ -91,6 +93,7 @@ config ARCH_LS1043A
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
select SYS_HAS_ARMV8_SECURE_BASE
imply CMD_PCI
imply ID_EEPROM
@@ -112,7 +115,6 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A008511 if !TFABOOT
select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
@@ -122,6 +124,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
@@ -138,6 +141,7 @@ config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873 if !TFABOOT
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
@@ -187,9 +191,11 @@ config ARCH_LS2080A
select ARM_ERRATA_828024
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
select SYS_FSL_OTHER_DDR_NUM_CTRLS
select GICV3
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
@@ -239,6 +245,7 @@ config ARCH_LS2080A
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
@@ -277,6 +284,7 @@ config ARCH_LX2162A
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
@@ -318,6 +326,11 @@ config ARCH_LX2160A
config FSL_LSCH2
bool
select SKIP_LOWLEVEL_INIT
select SYS_FSL_CCSR_GUR_BE
select SYS_FSL_CCSR_SCFG_BE
select SYS_FSL_ESDHC_BE
select SYS_FSL_IFC_BE
select SYS_FSL_PEX_LUT_BE
select SYS_FSL_HAS_CCI400
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
@@ -325,16 +338,46 @@ config FSL_LSCH2
config FSL_LSCH3
select ARCH_MISC_INIT
select SYS_FSL_CCSR_GUR_LE
select SYS_FSL_CCSR_SCFG_LE
select SYS_FSL_ESDHC_LE
select SYS_FSL_IFC_LE
select SYS_FSL_PEX_LUT_LE
bool
config NXP_LSCH3_2
bool
config SYS_FSL_CCSR_GUR_BE
bool
config SYS_FSL_CCSR_SCFG_BE
bool
config SYS_FSL_PEX_LUT_BE
bool
config SYS_FSL_CCSR_GUR_LE
bool
config SYS_FSL_CCSR_SCFG_LE
bool
config SYS_FSL_ESDHC_LE
bool
config SYS_FSL_IFC_LE
bool
config SYS_FSL_PEX_LUT_LE
bool
menu "Layerscape architecture"
depends on FSL_LSCH2 || FSL_LSCH3
config FSL_LAYERSCAPE
bool
select ARM_SMCCC
config HAS_FEATURE_GIC64K_ALIGN
bool
@@ -455,11 +498,6 @@ config EMC2305
Enable the EMC2305 fan controller for configuration of fan
speed.
config NXP_ESBC
bool "NXP_ESBC"
help
Enable Freescale Secure Boot feature
config QSPI_AHB_INIT
bool "Init the QSPI AHB bus"
help
@@ -502,6 +540,36 @@ config SYS_FSL_HAS_CCN508
config SYS_FSL_HAS_DP_DDR
bool
help
Defines the SoC has DP-DDR used for DPAA.
config DP_DDR_CTRL
int
depends on SYS_FSL_HAS_DP_DDR
default 2 if ARCH_LS2080A
config DP_DDR_DIMM_SLOTS_PER_CTLR
int
depends on SYS_FSL_HAS_DP_DDR
default 1 if ARCH_LS2080A
config DP_DDR_NUM_CTRLS
int
depends on SYS_FSL_HAS_DP_DDR
default 1 if ARCH_LS2080A
config SYS_DP_DDR_BASE
hex
depends on SYS_FSL_HAS_DP_DDR
default 0x6000000000 if ARCH_LS2080A
config SYS_DP_DDR_BASE_PHY
int
depends on SYS_FSL_HAS_DP_DDR
default 0 if ARCH_LS2080A
help
DDR controller uses this value as the base address for binding.
It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access.
config SYS_FSL_SRDS_1
bool
@@ -675,9 +743,6 @@ config SYS_FSL_HAS_RGMII
bool
depends on SYS_FSL_EC1 || SYS_FSL_EC2
config SPL_LDSCRIPT
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
config HAS_FSL_XHCI_USB
bool
help

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2017-2020 NXP
* Copyright 2017-2021 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
@@ -8,7 +8,6 @@
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <fsl_ddr_sdram.h>
#include <init.h>
#include <hang.h>
#include <log.h>
@@ -18,6 +17,7 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <linux/arm-smccc.h>
#include <linux/errno.h>
#include <asm/system.h>
#include <fm_eth.h>
@@ -36,6 +36,7 @@
#endif
#include <asm/armv8/sec_firmware.h>
#ifdef CONFIG_SYS_FSL_DDR
#include <fsl_ddr_sdram.h>
#include <fsl_ddr.h>
#endif
#include <asm/arch/clock.h>
@@ -49,6 +50,7 @@
#endif
#endif
#include <linux/mii.h>
#include <dm.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -452,7 +454,7 @@ static inline void early_mmu_setup(void)
/* point TTBR to the new table */
set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
get_tcr(el, NULL, NULL) &
get_tcr(NULL, NULL) &
~(TCR_ORGN_MASK | TCR_IRGN_MASK),
MEMORY_ATTRIBUTES);
@@ -607,7 +609,7 @@ static inline void final_mmu_setup(void)
invalidate_icache_all();
/* point TTBR to the new table */
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL),
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL),
MEMORY_ATTRIBUTES);
set_sctlr(get_sctlr() | CR_M);
@@ -767,7 +769,7 @@ enum boot_src __get_boot_src(u32 porsr1)
enum boot_src get_boot_src(void)
{
struct pt_regs regs;
struct arm_smccc_res res;
u32 porsr1 = 0;
#if defined(CONFIG_FSL_LSCH3)
@@ -777,11 +779,9 @@ enum boot_src get_boot_src(void)
#endif
if (current_el() == 2) {
regs.regs[0] = SIP_SVC_RCW;
smc_call(&regs);
if (!regs.regs[0])
porsr1 = regs.regs[1];
arm_smccc_smc(SIP_SVC_RCW, 0, 0, 0, 0, 0, 0, 0, &res);
if (!res.a0)
porsr1 = res.a1;
}
if (current_el() == 3 || !porsr1) {
@@ -818,7 +818,7 @@ int mmc_get_env_dev(void)
}
#endif
enum env_location env_get_location(enum env_operation op, int prio)
enum env_location arch_env_get_location(enum env_operation op, int prio)
{
enum boot_src src = get_boot_src();
enum env_location env_loc = ENVL_NOWHERE;
@@ -1080,9 +1080,9 @@ static void config_core_prefetch(void)
char *buf = NULL;
char buffer[HWCONFIG_BUFFER_SIZE];
const char *prefetch_arg = NULL;
struct arm_smccc_res res;
size_t arglen;
unsigned int mask;
struct pt_regs regs;
if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
@@ -1100,11 +1100,10 @@ static void config_core_prefetch(void)
}
#define SIP_PREFETCH_DISABLE_64 0xC200FF13
regs.regs[0] = SIP_PREFETCH_DISABLE_64;
regs.regs[1] = mask;
smc_call(&regs);
arm_smccc_smc(SIP_PREFETCH_DISABLE_64, mask, 0, 0, 0, 0, 0, 0,
&res);
if (regs.regs[0])
if (res.a0)
printf("Prefetch disable config failed for mask ");
else
printf("Prefetch disable config passed for mask ");
@@ -1344,25 +1343,20 @@ phys_size_t get_effective_memsize(void)
#ifdef CONFIG_TFABOOT
phys_size_t tfa_get_dram_size(void)
{
struct pt_regs regs;
phys_size_t dram_size = 0;
struct arm_smccc_res res;
regs.regs[0] = SMC_DRAM_BANK_INFO;
regs.regs[1] = -1;
smc_call(&regs);
if (regs.regs[0])
arm_smccc_smc(SMC_DRAM_BANK_INFO, -1, 0, 0, 0, 0, 0, 0, &res);
if (res.a0)
return 0;
dram_size = regs.regs[1];
return dram_size;
return res.a1;
}
static int tfa_dram_init_banksize(void)
{
int i = 0, ret = 0;
struct pt_regs regs;
phys_size_t dram_size = tfa_get_dram_size();
struct arm_smccc_res res;
debug("dram_size %llx\n", dram_size);
@@ -1370,19 +1364,15 @@ static int tfa_dram_init_banksize(void)
return -EINVAL;
do {
regs.regs[0] = SMC_DRAM_BANK_INFO;
regs.regs[1] = i;
smc_call(&regs);
if (regs.regs[0]) {
arm_smccc_smc(SMC_DRAM_BANK_INFO, i, 0, 0, 0, 0, 0, 0, &res);
if (res.a0) {
ret = -EINVAL;
break;
}
debug("bank[%d]: start %lx, size %lx\n", i, regs.regs[1],
regs.regs[2]);
gd->bd->bi_dram[i].start = regs.regs[1];
gd->bd->bi_dram[i].size = regs.regs[2];
debug("bank[%d]: start %lx, size %lx\n", i, res.a1, res.a2);
gd->bd->bi_dram[i].start = res.a1;
gd->bd->bi_dram[i].size = res.a2;
dram_size -= gd->bd->bi_dram[i].size;
@@ -1632,11 +1622,13 @@ void update_early_mmu_table(void)
__weak int dram_init(void)
{
#ifdef CONFIG_SYS_FSL_DDR
fsl_initdram();
#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif
#endif
return 0;
@@ -1650,6 +1642,14 @@ __weak int serdes_misc_init(void)
int arch_misc_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize caam_jr: %d\n", ret);
}
serdes_misc_init();
return 0;

View File

@@ -671,7 +671,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
"clock-frequency", get_qman_freq(), 1);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_FMAN_ENET
fdt_fixup_fman_firmware(blob);
#endif
#ifdef CONFIG_FSL_PFE

View File

@@ -18,10 +18,6 @@
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SYS_FSL_NUM_CC_PLLS
#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
#endif
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -29,8 +25,8 @@ void get_sys_info(struct sys_info *sys_info)
* mux 2 clock for LS1043A/LS1046A.
*/
#if defined(CONFIG_SYS_DPAA_FMAN) || \
defined(CONFIG_TARGET_LS1046ARDB) || \
defined(CONFIG_TARGET_LS1043ARDB)
defined(CONFIG_ARCH_LS1046A) || \
defined(CONFIG_ARCH_LS1043A)
u32 rcw_tmp;
#endif
struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
@@ -129,13 +125,13 @@ void get_sys_info(struct sys_info *sys_info)
#define HWA_CGA_M2_CLK_SEL 0x00000007
#define HWA_CGA_M2_CLK_SHIFT 0
#if defined(CONFIG_TARGET_LS1046ARDB) || defined(CONFIG_TARGET_LS1043ARDB)
#if defined(CONFIG_ARCH_LS1046A) || defined(CONFIG_ARCH_LS1043A)
rcw_tmp = in_be32(&gur->rcwsr[15]);
switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) {
case 1:
sys_info->freq_cga_m2 = freq_c_pll[1];
break;
#if defined(CONFIG_TARGET_LS1046ARDB)
#if defined(CONFIG_ARCH_LS1046A)
case 2:
sys_info->freq_cga_m2 = freq_c_pll[1] / 2;
break;
@@ -143,7 +139,7 @@ void get_sys_info(struct sys_info *sys_info)
case 3:
sys_info->freq_cga_m2 = freq_c_pll[1] / 3;
break;
#if defined(CONFIG_TARGET_LS1046ARDB)
#if defined(CONFIG_ARCH_LS1046A)
case 6:
sys_info->freq_cga_m2 = freq_c_pll[0] / 2;
break;

View File

@@ -147,10 +147,14 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
cfg >>= sd_prctl_shift;
cfg = serdes_get_number(sd, cfg);
printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg);
if (cfg == 0) {
printf("SERDES%d is disabled\n", sd + 1);
} else {
printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg);
if (!is_serdes_prtcl_valid(sd, cfg))
printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg);
if (!is_serdes_prtcl_valid(sd, cfg))
printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg);
}
for (lane = 0; lane < SRDS_MAX_LANES; lane++) {
enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane);

View File

@@ -21,11 +21,6 @@
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SYS_FSL_NUM_CC_PLLS
#define CONFIG_SYS_FSL_NUM_CC_PLLS 6
#endif
void get_sys_info(struct sys_info *sys_info)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);

View File

@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2014-2015 Freescale Semiconductor
* Copyright 2019 NXP
* Copyright 2019-2022 NXP
*
* Extracted from armv8/start.S
*/
@@ -74,15 +74,6 @@ ENDPROC(smp_kick_all_cpus)
ENTRY(lowlevel_init)
mov x29, lr /* Save LR */
/* unmask SError and abort */
msr daifclr, #4
/* Set HCR_EL2[AMO] so SError @EL2 is taken */
mrs x0, hcr_el2
orr x0, x0, #0x20 /* AMO */
msr hcr_el2, x0
isb
switch_el x1, 1f, 100f, 100f /* skip if not in EL3 */
1:
@@ -209,7 +200,7 @@ ENTRY(lowlevel_init)
#endif
100:
branch_if_master x0, x1, 2f
branch_if_master x0, 2f
#if defined(CONFIG_MP) && defined(CONFIG_ARMV8_MULTIENTRY)
/*
@@ -353,7 +344,7 @@ ENTRY(fsl_ocram_clear_ecc_err)
ldr x0, =DCSR_DCFG_MBEESR2
str w1, [x0]
ret
ENDPROC(fsl_ocram_init)
ENDPROC(fsl_ocram_clear_ecc_err)
#endif
#ifdef CONFIG_FSL_LSCH3

View File

@@ -302,6 +302,7 @@ int cpu_release(u32 nr, int argc, char *const argv[])
u64 boot_addr;
u64 *table = get_spin_tbl_addr();
int pos;
int ret;
boot_addr = simple_strtoull(argv[0], NULL, 16);
@@ -326,16 +327,10 @@ int cpu_release(u32 nr, int argc, char *const argv[])
asm volatile("sev");
} else {
/* Use PSCI to kick the core */
struct pt_regs regs;
printf("begin to kick cpu core #%d to address %llx\n",
nr, boot_addr);
regs.regs[0] = PSCI_0_2_FN64_CPU_ON;
regs.regs[1] = nr;
regs.regs[2] = boot_addr;
regs.regs[3] = 0;
smc_call(&regs);
if (regs.regs[0])
ret = invoke_psci_fn(PSCI_0_2_FN64_CPU_ON, nr, boot_addr, 0);
if (ret)
return -1;
}

View File

@@ -206,6 +206,9 @@ static void erratum_a008997(void)
static void erratum_a009007(void)
{
if (!IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A009007))
return;
#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \
defined(CONFIG_ARCH_LS1012A)
void __iomem *usb_phy = (void __iomem *)SCFG_USB_PHY1;

View File

@@ -113,6 +113,6 @@ _dead_loop:
.align 3
.global __real_cntfrq
__real_cntfrq:
.quad COUNTER_FREQUENCY
.quad CONFIG_COUNTER_FREQUENCY
/* Secondary Boot Code ends here */
__secondary_boot_code_end:

View File

@@ -12,6 +12,7 @@
#include <image.h>
#include <init.h>
#include <log.h>
#include <semihosting.h>
#include <spl.h>
#include <asm/cache.h>
#include <asm/global_data.h>
@@ -27,6 +28,8 @@ DECLARE_GLOBAL_DATA_PTR;
u32 spl_boot_device(void)
{
if (semihosting_enabled())
return BOOT_DEVICE_SMH;
#ifdef CONFIG_SPL_MMC
return BOOT_DEVICE_MMC1;
#endif
@@ -64,11 +67,24 @@ void spl_board_init(void)
#endif
}
void tzpc_init(void)
{
/*
* Mark the whole OCRAM as non-secure, otherwise DMA devices cannot
* access it. This is for example necessary for MMC boot.
*/
#ifdef TZPCR0SIZE_BASE
out_le32(TZPCR0SIZE_BASE, 0);
#endif
}
void board_init_f(ulong dummy)
{
int ret;
icache_enable();
tzpc_init();
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
if (IS_ENABLED(CONFIG_DEBUG_UART))

View File

@@ -13,6 +13,7 @@
#include <asm/global_data.h>
#include <asm/ptrace.h>
#include <linux/kernel.h>
#include <linux/arm-smccc.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/types.h>
@@ -35,9 +36,6 @@ phys_addr_t sec_firmware_addr;
#ifndef SEC_FIRMWARE_FIT_IMAGE
#define SEC_FIRMWARE_FIT_IMAGE "firmware"
#endif
#ifndef SEC_FIRMWARE_FIT_CNF_NAME
#define SEC_FIRMWARE_FIT_CNF_NAME "config-1"
#endif
#ifndef SEC_FIRMWARE_TARGET_EL
#define SEC_FIRMWARE_TARGET_EL 2
#endif
@@ -45,46 +43,8 @@ phys_addr_t sec_firmware_addr;
static int sec_firmware_get_data(const void *sec_firmware_img,
const void **data, size_t *size)
{
int conf_node_off, fw_node_off;
char *conf_node_name = NULL;
char *desc;
int ret;
conf_node_name = SEC_FIRMWARE_FIT_CNF_NAME;
conf_node_off = fit_conf_get_node(sec_firmware_img, conf_node_name);
if (conf_node_off < 0) {
printf("SEC Firmware: %s: no such config\n", conf_node_name);
return -ENOENT;
}
fw_node_off = fit_conf_get_prop_node(sec_firmware_img, conf_node_off,
SEC_FIRMWARE_FIT_IMAGE);
if (fw_node_off < 0) {
printf("SEC Firmware: No '%s' in config\n",
SEC_FIRMWARE_FIT_IMAGE);
return -ENOLINK;
}
/* Verify secure firmware image */
if (!(fit_image_verify(sec_firmware_img, fw_node_off))) {
printf("SEC Firmware: Bad firmware image (bad CRC)\n");
return -EINVAL;
}
if (fit_image_get_data(sec_firmware_img, fw_node_off, data, size)) {
printf("SEC Firmware: Can't get %s subimage data/size",
SEC_FIRMWARE_FIT_IMAGE);
return -ENOENT;
}
ret = fit_get_desc(sec_firmware_img, fw_node_off, &desc);
if (ret)
printf("SEC Firmware: Can't get description\n");
else
printf("%s\n", desc);
return ret;
return fit_get_data_conf_prop(sec_firmware_img, SEC_FIRMWARE_FIT_IMAGE,
data, size);
}
/*
@@ -123,18 +83,15 @@ static int sec_firmware_check_copy_loadable(const void *sec_firmware_img,
{
phys_addr_t sec_firmware_loadable_addr = 0;
int conf_node_off, ld_node_off, images;
char *conf_node_name = NULL;
const void *data;
size_t size;
ulong load;
const char *name, *str, *type;
int len;
conf_node_name = SEC_FIRMWARE_FIT_CNF_NAME;
conf_node_off = fit_conf_get_node(sec_firmware_img, conf_node_name);
conf_node_off = fit_conf_get_node(sec_firmware_img, NULL);
if (conf_node_off < 0) {
printf("SEC Firmware: %s: no such config\n", conf_node_name);
puts("SEC Firmware: no config\n");
return -ENOENT;
}
@@ -374,29 +331,25 @@ bool sec_firmware_support_hwrng(void)
*/
int sec_firmware_get_random(uint8_t *rand, int bytes)
{
struct arm_smccc_res res;
unsigned long long num;
struct pt_regs regs;
int param1;
if (!bytes || bytes > 8) {
printf("Max Random bytes genration supported is 8\n");
return -1;
}
#define SIP_RNG_64 0xC200FF11
regs.regs[0] = SIP_RNG_64;
if (bytes <= 4)
param1 = 0;
else
param1 = 1;
regs.regs[1] = param1;
smc_call(&regs);
if (regs.regs[0])
#define SIP_RNG_64 0xC200FF11
arm_smccc_smc(SIP_RNG_64, param1, 0, 0, 0, 0, 0, 0, &res);
if (res.a0)
return -1;
num = regs.regs[1];
num = res.a1;
memcpy(rand, &num, bytes);
return 0;
@@ -473,8 +426,8 @@ int fdt_fixup_kaslr(void *fdt)
return 0;
}
ret = sec_firmware_get_random(rand, 8);
if (ret < 0) {
err = sec_firmware_get_random(rand, 8);
if (err < 0) {
printf("WARNING: No random number to set kaslr-seed\n");
return 0;
}

View File

@@ -0,0 +1,132 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* sha1_ce_core.S - SHA-1 secure hash using ARMv8 Crypto Extensions
*
* Copyright (C) 2014 Linaro Ltd <ard.biesheuvel@linaro.org>
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
#include <config.h>
#include <linux/linkage.h>
#include <asm/system.h>
#include <asm/macro.h>
.text
.arch armv8-a+crypto
k0 .req v0
k1 .req v1
k2 .req v2
k3 .req v3
t0 .req v4
t1 .req v5
dga .req q6
dgav .req v6
dgb .req s7
dgbv .req v7
dg0q .req q12
dg0s .req s12
dg0v .req v12
dg1s .req s13
dg1v .req v13
dg2s .req s14
.macro add_only, op, ev, rc, s0, dg1
.ifc \ev, ev
add t1.4s, v\s0\().4s, \rc\().4s
sha1h dg2s, dg0s
.ifnb \dg1
sha1\op dg0q, \dg1, t0.4s
.else
sha1\op dg0q, dg1s, t0.4s
.endif
.else
.ifnb \s0
add t0.4s, v\s0\().4s, \rc\().4s
.endif
sha1h dg1s, dg0s
sha1\op dg0q, dg2s, t1.4s
.endif
.endm
.macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
sha1su0 v\s0\().4s, v\s1\().4s, v\s2\().4s
add_only \op, \ev, \rc, \s1, \dg1
sha1su1 v\s0\().4s, v\s3\().4s
.endm
.macro loadrc, k, val, tmp
movz \tmp, :abs_g0_nc:\val
movk \tmp, :abs_g1:\val
dup \k, \tmp
.endm
/*
* void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src,
* uint32_t blocks)
*/
ENTRY(sha1_armv8_ce_process)
/* load round constants */
loadrc k0.4s, 0x5a827999, w6
loadrc k1.4s, 0x6ed9eba1, w6
loadrc k2.4s, 0x8f1bbcdc, w6
loadrc k3.4s, 0xca62c1d6, w6
/* load state (4+1 digest states) */
ld1 {dgav.4s}, [x0]
ldr dgb, [x0, #16]
/* load input (64 bytes into v8->v11 16B vectors) */
0: ld1 {v8.4s-v11.4s}, [x1], #64
sub w2, w2, #1
#if __BYTE_ORDER == __LITTLE_ENDIAN
rev32 v8.16b, v8.16b
rev32 v9.16b, v9.16b
rev32 v10.16b, v10.16b
rev32 v11.16b, v11.16b
#endif
1: add t0.4s, v8.4s, k0.4s
mov dg0v.16b, dgav.16b
add_update c, ev, k0, 8, 9, 10, 11, dgb
add_update c, od, k0, 9, 10, 11, 8
add_update c, ev, k0, 10, 11, 8, 9
add_update c, od, k0, 11, 8, 9, 10
add_update c, ev, k1, 8, 9, 10, 11
add_update p, od, k1, 9, 10, 11, 8
add_update p, ev, k1, 10, 11, 8, 9
add_update p, od, k1, 11, 8, 9, 10
add_update p, ev, k1, 8, 9, 10, 11
add_update p, od, k2, 9, 10, 11, 8
add_update m, ev, k2, 10, 11, 8, 9
add_update m, od, k2, 11, 8, 9, 10
add_update m, ev, k2, 8, 9, 10, 11
add_update m, od, k2, 9, 10, 11, 8
add_update m, ev, k3, 10, 11, 8, 9
add_update p, od, k3, 11, 8, 9, 10
add_only p, ev, k3, 9
add_only p, od, k3, 10
add_only p, ev, k3, 11
add_only p, od
/* update state */
add dgbv.2s, dgbv.2s, dg1v.2s
add dgav.4s, dgav.4s, dg0v.4s
/* loop on next block? */
cbz w2, 2f
b 0b
/* store new state */
2: st1 {dgav.4s}, [x0]
str dgb, [x0, #16]
mov w0, w2
ret
ENDPROC(sha1_armv8_ce_process)

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* sha1_ce_glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions
*
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
#include <common.h>
#include <u-boot/sha1.h>
extern void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src,
uint32_t blocks);
void sha1_process(sha1_context *ctx, const unsigned char *data,
unsigned int blocks)
{
if (!blocks)
return;
sha1_armv8_ce_process(ctx->state, data, blocks);
}

View File

@@ -0,0 +1,134 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* sha256-ce-core.S - core SHA-256 transform using v8 Crypto Extensions
*
* Copyright (C) 2014 Linaro Ltd <ard.biesheuvel@linaro.org>
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
#include <config.h>
#include <linux/linkage.h>
#include <asm/system.h>
#include <asm/macro.h>
.text
.arch armv8-a+crypto
dga .req q20
dgav .req v20
dgb .req q21
dgbv .req v21
t0 .req v22
t1 .req v23
dg0q .req q24
dg0v .req v24
dg1q .req q25
dg1v .req v25
dg2q .req q26
dg2v .req v26
.macro add_only, ev, rc, s0
mov dg2v.16b, dg0v.16b
.ifeq \ev
add t1.4s, v\s0\().4s, \rc\().4s
sha256h dg0q, dg1q, t0.4s
sha256h2 dg1q, dg2q, t0.4s
.else
.ifnb \s0
add t0.4s, v\s0\().4s, \rc\().4s
.endif
sha256h dg0q, dg1q, t1.4s
sha256h2 dg1q, dg2q, t1.4s
.endif
.endm
.macro add_update, ev, rc, s0, s1, s2, s3
sha256su0 v\s0\().4s, v\s1\().4s
add_only \ev, \rc, \s1
sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s
.endm
/*
* The SHA-256 round constants
*/
.align 4
.Lsha2_rcon:
.word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
.word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
.word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
.word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
.word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
.word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
.word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
.word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
.word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
.word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
.word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3
.word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
.word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5
.word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
.word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
.word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
/*
* void sha256_armv8_ce_process(struct sha256_ce_state *sst,
* uint8_t const *src, uint32_t blocks)
*/
ENTRY(sha256_armv8_ce_process)
/* load round constants */
adr x8, .Lsha2_rcon
ld1 { v0.4s- v3.4s}, [x8], #64
ld1 { v4.4s- v7.4s}, [x8], #64
ld1 { v8.4s-v11.4s}, [x8], #64
ld1 {v12.4s-v15.4s}, [x8]
/* load state */
ldp dga, dgb, [x0]
/* load input */
0: ld1 {v16.4s-v19.4s}, [x1], #64
sub w2, w2, #1
#if __BYTE_ORDER == __LITTLE_ENDIAN
rev32 v16.16b, v16.16b
rev32 v17.16b, v17.16b
rev32 v18.16b, v18.16b
rev32 v19.16b, v19.16b
#endif
1: add t0.4s, v16.4s, v0.4s
mov dg0v.16b, dgav.16b
mov dg1v.16b, dgbv.16b
add_update 0, v1, 16, 17, 18, 19
add_update 1, v2, 17, 18, 19, 16
add_update 0, v3, 18, 19, 16, 17
add_update 1, v4, 19, 16, 17, 18
add_update 0, v5, 16, 17, 18, 19
add_update 1, v6, 17, 18, 19, 16
add_update 0, v7, 18, 19, 16, 17
add_update 1, v8, 19, 16, 17, 18
add_update 0, v9, 16, 17, 18, 19
add_update 1, v10, 17, 18, 19, 16
add_update 0, v11, 18, 19, 16, 17
add_update 1, v12, 19, 16, 17, 18
add_only 0, v13, 17
add_only 1, v14, 18
add_only 0, v15, 19
add_only 1
/* update state */
add dgav.4s, dgav.4s, dg0v.4s
add dgbv.4s, dgbv.4s, dg1v.4s
/* handled all input blocks? */
cbnz w2, 0b
/* store new state */
3: stp dga, dgb, [x0]
ret
ENDPROC(sha256_armv8_ce_process)

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* sha256_ce_glue.c - SHA-256 secure hash using ARMv8 Crypto Extensions
*
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
#include <common.h>
#include <u-boot/sha256.h>
extern void sha256_armv8_ce_process(uint32_t state[8], uint8_t const *src,
uint32_t blocks);
void sha256_process(sha256_context *ctx, const unsigned char *data,
unsigned int blocks)
{
if (!blocks)
return;
sha256_armv8_ce_process(ctx->state, data, blocks);
}

View File

@@ -125,7 +125,9 @@ pie_fixup_done:
msr cptr_el3, xzr /* Enable FP/SIMD */
b 0f
2: mrs x1, hcr_el2
tbnz x1, #34, 1f /* HCR_EL2.E2H */
tbnz x1, #HCR_EL2_E2H_BIT, 1f /* HCR_EL2.E2H */
orr x1, x1, #HCR_EL2_AMO_EL2 /* Route SErrors to EL2 */
msr hcr_el2, x1
set_vbar vbar_el2, x0
mov x0, #0x33ff
msr cptr_el2, x0 /* Enable FP/SIMD */
@@ -134,10 +136,11 @@ pie_fixup_done:
mov x0, #3 << 20
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
msr daifclr, #0x4 /* Unmask SError interrupts */
#ifdef COUNTER_FREQUENCY
#if CONFIG_COUNTER_FREQUENCY
branch_if_not_highest_el x0, 4f
ldr x0, =COUNTER_FREQUENCY
ldr x0, =CONFIG_COUNTER_FREQUENCY
msr cntfrq_el0, x0 /* Initialize CNTFRQ */
#endif
@@ -172,11 +175,11 @@ pie_fixup_done:
bl lowlevel_init
#if defined(CONFIG_ARMV8_SPIN_TABLE) && !defined(CONFIG_SPL_BUILD)
branch_if_master x0, x1, master_cpu
branch_if_master x0, master_cpu
b spin_table_secondary_jump
/* never return */
#elif defined(CONFIG_ARMV8_MULTIENTRY)
branch_if_master x0, x1, master_cpu
branch_if_master x0, master_cpu
/*
* Slave CPUs
@@ -189,6 +192,7 @@ slave_cpu:
br x0 /* branch to the given address */
#endif /* CONFIG_ARMV8_MULTIENTRY */
master_cpu:
msr SPSel, #1 /* make sure we use SP_ELx */
bl _main
/*-----------------------------------------------------------------------*/
@@ -301,7 +305,7 @@ WEAK(lowlevel_init)
#endif
#ifdef CONFIG_ARMV8_MULTIENTRY
branch_if_master x0, x1, 2f
branch_if_master x0, 2f
/*
* Slave should wait for master clearing spin table.

View File

@@ -23,7 +23,7 @@ SECTIONS
{
.text : {
. = ALIGN(8);
*(.__image_copy_start)
__image_copy_start = .;
CPUDIR/start.o (.text*)
*(.text*)
} >.sram
@@ -46,9 +46,9 @@ SECTIONS
} >.sram
#endif
.u_boot_list : {
__u_boot_list : {
. = ALIGN(8);
KEEP(*(SORT(.u_boot_list*)));
KEEP(*(SORT(__u_boot_list*)));
} >.sram
.image_copy_end : {

View File

@@ -109,8 +109,8 @@ SECTIONS
. = .;
. = ALIGN(8);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(8);

View File

@@ -1,15 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
extra-y = start.o
obj-$(CONFIG_CPU_PXA25X) += pxa2xx.o
obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o
obj-y += cpuinfo.o
obj-y += timer.o
obj-y += usb.o
obj-y += relocate.o
obj-y += cache.o

View File

@@ -1,58 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016 Vasily Khoruzhick <anarsoul@gmail.com>
*/
#include <cpu_func.h>
#include <asm/cache.h>
#include <linux/types.h>
#include <common.h>
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void invalidate_dcache_all(void)
{
/* Flush/Invalidate I cache */
asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
/* Flush/Invalidate D cache */
asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
}
void flush_dcache_all(void)
{
return invalidate_dcache_all();
}
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
while (start <= stop) {
asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
start += CONFIG_SYS_CACHELINE_SIZE;
}
}
void flush_dcache_range(unsigned long start, unsigned long stop)
{
return invalidate_dcache_range(start, stop);
}
#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
void invalidate_dcache_all(void)
{
}
void flush_dcache_all(void)
{
}
#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
/*
* Stub implementations for l2 cache operations
*/
__weak void l2_cache_disable(void) {}
#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
__weak void invalidate_l2_cache(void) {}
#endif

View File

@@ -1,18 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2002
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
# Marius Groeger <mgroeger@sysgo.de>
#
# !WARNING!
# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from
# really small OneNAND memories where the mmap'd window is only 1KiB big. The
# .text.0 contains only the bare minimum needed to load the real SPL into SRAM.
# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd,
# they are not discarded.
#
#ifdef CONFIG_SPL_BUILD
OBJCOPYFLAGS += -j .text.0 -j .text.1
#endif

View File

@@ -1,145 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* PXA CPU information display
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <errno.h>
#include <linux/compiler.h>
#ifdef CONFIG_CPU_PXA25X
#if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800)
#error "Init SP address must be set to 0xfffff800 for PXA250"
#endif
#endif
#define CPU_MASK_PXA_PRODID 0x000003f0
#define CPU_MASK_PXA_REVID 0x0000000f
#define CPU_MASK_PRODREV (CPU_MASK_PXA_PRODID | CPU_MASK_PXA_REVID)
#define CPU_VALUE_PXA25X 0x100
#define CPU_VALUE_PXA27X 0x110
static uint32_t pxa_get_cpuid(void)
{
uint32_t cpuid;
asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid));
return cpuid;
}
int cpu_is_pxa25x(void)
{
uint32_t id = pxa_get_cpuid();
id &= CPU_MASK_PXA_PRODID;
return id == CPU_VALUE_PXA25X;
}
int cpu_is_pxa27x(void)
{
uint32_t id = pxa_get_cpuid();
id &= CPU_MASK_PXA_PRODID;
return id == CPU_VALUE_PXA27X;
}
int cpu_is_pxa27xm(void)
{
uint32_t id = pxa_get_cpuid();
return ((id & CPU_MASK_PXA_PRODID) == CPU_VALUE_PXA27X) &&
((id & CPU_MASK_PXA_REVID) == 8);
}
uint32_t pxa_get_cpu_revision(void)
{
return pxa_get_cpuid() & CPU_MASK_PRODREV;
}
#ifdef CONFIG_DISPLAY_CPUINFO
static const char *pxa25x_get_revision(void)
{
static __maybe_unused const char * const revs_25x[] = { "A0" };
static __maybe_unused const char * const revs_26x[] = {
"A0", "B0", "B1"
};
static const char *unknown = "Unknown";
uint32_t id;
if (!cpu_is_pxa25x())
return unknown;
id = pxa_get_cpuid() & CPU_MASK_PXA_REVID;
/* PXA26x is a sick special case as it can't be told apart from PXA25x :-( */
#ifdef CONFIG_CPU_PXA26X
switch (id) {
case 3: return revs_26x[0];
case 5: return revs_26x[1];
case 6: return revs_26x[2];
}
#else
if (id == 6)
return revs_25x[0];
#endif
return unknown;
}
static const char *pxa27x_get_revision(void)
{
static const char *const rev[] = { "A0", "A1", "B0", "B1", "C0", "C5" };
static const char *unknown = "Unknown";
uint32_t id;
if (!cpu_is_pxa27x())
return unknown;
id = pxa_get_cpuid() & CPU_MASK_PXA_REVID;
if ((id == 5) || (id == 6) || (id > 8))
return unknown;
/* Cap the special PXA270 C5 case. */
if (id == 7)
id = 5;
/* Cap the special PXA270M A1 case. */
if (id == 8)
id = 1;
return rev[id];
}
static int print_cpuinfo_pxa2xx(void)
{
if (cpu_is_pxa25x()) {
puts("Marvell PXA25x rev. ");
puts(pxa25x_get_revision());
} else if (cpu_is_pxa27x()) {
puts("Marvell PXA27x");
if (cpu_is_pxa27xm()) puts("M");
puts(" rev. ");
puts(pxa27x_get_revision());
} else
return -EINVAL;
puts("\n");
return 0;
}
int print_cpuinfo(void)
{
int ret;
puts("CPU: ");
ret = print_cpuinfo_pxa2xx();
if (!ret)
return ret;
return ret;
}
#endif

View File

@@ -1,295 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*/
#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <irq_func.h>
#include <asm/arch/pxa-regs.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/system.h>
#include <command.h>
/* Flush I/D-cache */
static void cache_flush(void)
{
unsigned long i = 0;
asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
}
int cleanup_before_linux(void)
{
/*
* This function is called just before we call Linux. It prepares
* the processor for Linux by just disabling everything that can
* disturb booting Linux.
*/
disable_interrupts();
icache_disable();
dcache_disable();
cache_flush();
return 0;
}
inline void writelrb(uint32_t val, uint32_t addr)
{
writel(val, addr);
asm volatile("" : : : "memory");
readl(addr);
asm volatile("" : : : "memory");
}
void pxa2xx_dram_init(void)
{
uint32_t tmp;
int i;
/*
* 1) Initialize Asynchronous static memory controller
*/
writelrb(CONFIG_SYS_MSC0_VAL, MSC0);
writelrb(CONFIG_SYS_MSC1_VAL, MSC1);
writelrb(CONFIG_SYS_MSC2_VAL, MSC2);
/*
* 2) Initialize Card Interface
*/
/* MECR: Memory Expansion Card Register */
writelrb(CONFIG_SYS_MECR_VAL, MECR);
/* MCMEM0: Card Interface slot 0 timing */
writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0);
/* MCMEM1: Card Interface slot 1 timing */
writelrb(CONFIG_SYS_MCMEM1_VAL, MCMEM1);
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
writelrb(CONFIG_SYS_MCATT0_VAL, MCATT0);
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
writelrb(CONFIG_SYS_MCATT1_VAL, MCATT1);
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0);
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1);
/*
* 3) Configure Fly-By DMA register
*/
writelrb(CONFIG_SYS_FLYCNFG_VAL, FLYCNFG);
/*
* 4) Initialize Timing for Sync Memory (SDCLK0)
*/
/*
* Before accessing MDREFR we need a valid DRI field, so we set
* this to power on defaults + DRI field.
*/
/* Read current MDREFR config and zero out DRI */
tmp = readl(MDREFR) & ~0xfff;
/* Add user-specified DRI */
tmp |= CONFIG_SYS_MDREFR_VAL & 0xfff;
/* Configure important bits */
tmp |= MDREFR_K0RUN | MDREFR_SLFRSH;
tmp &= ~(MDREFR_APD | MDREFR_E1PIN);
/* Write MDREFR back */
writelrb(tmp, MDREFR);
/*
* 5) Initialize Synchronous Static Memory (Flash/Peripherals)
*/
/* Initialize SXCNFG register. Assert the enable bits.
*
* Write SXMRS to cause an MRS command to all enabled banks of
* synchronous static memory. Note that SXLCR need not be written
* at this time.
*/
writelrb(CONFIG_SYS_SXCNFG_VAL, SXCNFG);
/*
* 6) Initialize SDRAM
*/
writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR);
writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR);
/*
* 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure
* but not enable each SDRAM partition pair.
*/
writelrb(CONFIG_SYS_MDCNFG_VAL &
~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG);
/* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
writel(0, OSCR);
while (readl(OSCR) < 0x300)
asm volatile("" : : : "memory");
/*
* 8) Trigger a number (usually 8) refresh cycles by attempting
* non-burst read or write accesses to disabled SDRAM, as commonly
* specified in the power up sequence documented in SDRAM data
* sheets. The address(es) used for this purpose must not be
* cacheable.
*/
for (i = 9; i >= 0; i--) {
writel(i, 0xa0000000);
asm volatile("" : : : "memory");
}
/*
* 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1).
*/
tmp = CONFIG_SYS_MDCNFG_VAL &
(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3);
tmp |= readl(MDCNFG);
writelrb(tmp, MDCNFG);
/*
* 10) Write MDMRS.
*/
writelrb(CONFIG_SYS_MDMRS_VAL, MDMRS);
/*
* 11) Enable APD
*/
if (CONFIG_SYS_MDREFR_VAL & MDREFR_APD) {
tmp = readl(MDREFR);
tmp |= MDREFR_APD;
writelrb(tmp, MDREFR);
}
}
void pxa_gpio_setup(void)
{
writel(CONFIG_SYS_GPSR0_VAL, GPSR0);
writel(CONFIG_SYS_GPSR1_VAL, GPSR1);
writel(CONFIG_SYS_GPSR2_VAL, GPSR2);
#if defined(CONFIG_CPU_PXA27X)
writel(CONFIG_SYS_GPSR3_VAL, GPSR3);
#endif
writel(CONFIG_SYS_GPCR0_VAL, GPCR0);
writel(CONFIG_SYS_GPCR1_VAL, GPCR1);
writel(CONFIG_SYS_GPCR2_VAL, GPCR2);
#if defined(CONFIG_CPU_PXA27X)
writel(CONFIG_SYS_GPCR3_VAL, GPCR3);
#endif
writel(CONFIG_SYS_GPDR0_VAL, GPDR0);
writel(CONFIG_SYS_GPDR1_VAL, GPDR1);
writel(CONFIG_SYS_GPDR2_VAL, GPDR2);
#if defined(CONFIG_CPU_PXA27X)
writel(CONFIG_SYS_GPDR3_VAL, GPDR3);
#endif
writel(CONFIG_SYS_GAFR0_L_VAL, GAFR0_L);
writel(CONFIG_SYS_GAFR0_U_VAL, GAFR0_U);
writel(CONFIG_SYS_GAFR1_L_VAL, GAFR1_L);
writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U);
writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L);
writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U);
#if defined(CONFIG_CPU_PXA27X)
writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L);
writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U);
#endif
writel(CONFIG_SYS_PSSR_VAL, PSSR);
}
void pxa_interrupt_setup(void)
{
writel(0, ICLR);
writel(0, ICMR);
#if defined(CONFIG_CPU_PXA27X)
writel(0, ICLR2);
writel(0, ICMR2);
#endif
}
void pxa_clock_setup(void)
{
writel(CONFIG_SYS_CKEN, CKEN);
writel(CONFIG_SYS_CCCR, CCCR);
asm volatile("mcr p14, 0, %0, c6, c0, 0" : : "r"(0x0b));
/* enable the 32Khz oscillator for RTC and PowerManager */
writel(OSCC_OON, OSCC);
while (!(readl(OSCC) & OSCC_OOK))
asm volatile("" : : : "memory");
}
void pxa_wakeup(void)
{
uint32_t rcsr;
rcsr = readl(RCSR);
writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR);
/* Wakeup */
if (rcsr & RCSR_SMR) {
writel(PSSR_PH, PSSR);
pxa2xx_dram_init();
icache_disable();
dcache_disable();
asm volatile("mov pc, %0" : : "r"(readl(PSPR)));
}
}
int arch_cpu_init(void)
{
pxa_gpio_setup();
pxa_wakeup();
pxa_interrupt_setup();
pxa_clock_setup();
return 0;
}
void i2c_clk_enable(void)
{
/* Set the global I2C clock on */
writel(readl(CKEN) | CKEN14_I2C, CKEN);
}
void __attribute__((weak)) reset_cpu(void) __attribute__((noreturn));
void reset_cpu(void)
{
uint32_t tmp;
setbits_le32(OWER, OWER_WME);
tmp = readl(OSCR);
tmp += 0x1000;
writel(tmp, OSMR3);
writel(MDREFR_SLFRSH, MDREFR);
for (;;)
;
}
void enable_caches(void)
{
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
icache_enable();
#endif
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
dcache_enable();
#endif
}

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@@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* relocate - PXA270 vector relocation
*
* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
*/
#include <linux/linkage.h>
/*
* The PXA SoC is very specific with respect to exceptions: it
* does not provide RAM at the high vectors address (0xFFFF0000),
* thus only the low address (0x00000000) is useable; but that is
* in ROM, so let's avoid relocating the vectors.
*/
.section .text.relocate_vectors,"ax",%progbits
ENTRY(relocate_vectors)
bx lr
ENDPROC(relocate_vectors)

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@@ -1,205 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* armboot - Startup Code for XScale CPU-core
*
* Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
* Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
* Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
* Copyright (C) 2001 Alex Zuepke <azu@sysgo.de>
* Copyright (C) 2001 Marius Groger <mag@sysgo.de>
* Copyright (C) 2002 Alex Zupke <azu@sysgo.de>
* Copyright (C) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net>
* Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
* Copyright (C) 2003 Kshitij <kshitij@ti.com>
* Copyright (C) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
* Copyright (C) 2004 Texas Instruments <r-woodruff2@ti.com>
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*/
#include <asm-offsets.h>
#include <config.h>
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* setup Memory and board specific bits prior to relocation.
* relocate armboot to ram
* setup stack
*
*************************************************************************
*/
.globl reset
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
#ifdef CONFIG_CPU_PXA25X
bl lock_cache_for_stack
#endif
#ifdef CONFIG_CPU_PXA27X
/*
* enable clock for SRAM
*/
ldr r0,=CKEN
ldr r1,[r0]
orr r1,r1,#(1 << 20)
str r1,[r0]
#endif
bl _main
/*------------------------------------------------------------------------------*/
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
#ifdef CONFIG_CPU_PXA25X
/*
* Unlock (actually, disable) the cache now that board_init_f
* is done. We could do this earlier but we would need to add
* a new C runtime hook, whereas c_runtime_cpu_setup already
* exists.
* As this routine is just a call to cpu_init_crit, let us
* tail-optimize and do a simple branch here.
*/
b cpu_init_crit
#else
bx lr
#endif
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00003300 @ clear bits 13:12, 9:8 (--VI --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 1 (A) Align
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || CONFIG_CPU_PXA25X */
/*
* Enable MMU to use DCache as DRAM.
*
* This is useful on PXA25x and PXA26x in early bootstages, where there is no
* other possible memory available to hold stack.
*/
#ifdef CONFIG_CPU_PXA25X
.macro CPWAIT reg
mrc p15, 0, \reg, c2, c0, 0
mov \reg, \reg
sub pc, pc, #4
.endm
lock_cache_for_stack:
/* Domain access -- enable for all CPs */
ldr r0, =0x0000ffff
mcr p15, 0, r0, c3, c0, 0
/* Point TTBR to MMU table */
ldr r0, =mmutable
mcr p15, 0, r0, c2, c0, 0
/* Kick in MMU, ICache, DCache, BTB */
mrc p15, 0, r0, c1, c0, 0
bic r0, #0x1b00
bic r0, #0x0087
orr r0, #0x1800
orr r0, #0x0005
mcr p15, 0, r0, c1, c0, 0
CPWAIT r0
/* Unlock Icache, Dcache */
mcr p15, 0, r0, c9, c1, 1
mcr p15, 0, r0, c9, c2, 1
/* Flush Icache, Dcache, BTB */
mcr p15, 0, r0, c7, c7, 0
/* Unlock I-TLB, D-TLB */
mcr p15, 0, r0, c10, c4, 1
mcr p15, 0, r0, c10, c8, 1
/* Flush TLB */
mcr p15, 0, r0, c8, c7, 0
/* Allocate 4096 bytes of Dcache as RAM */
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r4, #0x00
mov r5, #0x00
mov r2, #0x01
mcr p15, 0, r0, c9, c2, 0
CPWAIT r0
/* 128 lines reserved (128 x 32bytes = 4096 bytes total) */
mov r0, #128
ldr r1, =0xfffff000
alloc:
mcr p15, 0, r1, c7, c2, 5
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
subs r0, #0x01
bne alloc
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r2, #0x00
mcr p15, 0, r2, c9, c2, 0
CPWAIT r0
mov pc, lr
.section .mmutable, "a"
mmutable:
.align 14
/* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */
.set __base, 0
.rept 0xfff
.word (__base << 20) | 0xc12
.set __base, __base + 1
.endr
/* 0xfff00000 : 1:1, cached mapping */
.word (0xfff << 20) | 0x1c1e
#endif /* CONFIG_CPU_PXA25X */

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@@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Marvell PXA2xx/3xx timer driver
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <common.h>
#include <init.h>
#include <asm/io.h>
int timer_init(void)
{
writel(0, CONFIG_SYS_TIMER_COUNTER);
return 0;
}

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@@ -1,89 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2006
* Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
*/
#include <common.h>
#include <linux/delay.h>
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
#include <asm/arch/pxa-regs.h>
#include <asm/io.h>
#include <usb.h>
int usb_cpu_init(void)
{
#if defined(CONFIG_CPU_MONAHANS)
/* Enable USB host clock. */
writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
udelay(100);
#endif
#if defined(CONFIG_CPU_PXA27X)
/* Enable USB host clock. */
writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
#endif
#if defined(CONFIG_CPU_MONAHANS)
/* Configure Port 2 for Host (USB Client Registers) */
writel(0x3000c, UP2OCR);
#endif
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
mdelay(11);
writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
while (readl(UHCHR) & UHCHR_FSBIR)
udelay(1);
#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
#endif
#if defined(CONFIG_CPU_PXA27X)
writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
#endif
writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
return 0;
}
int usb_cpu_stop(void)
{
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
udelay(11);
writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS);
udelay(10);
#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
#endif
#if defined(CONFIG_CPU_PXA27X)
writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
#endif
writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
#if defined(CONFIG_CPU_MONAHANS)
/* Disable USB host clock. */
writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
udelay(100);
#endif
#if defined(CONFIG_CPU_PXA27X)
/* Disable USB host clock. */
writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
#endif
return 0;
}
int usb_cpu_init_fail(void)
{
return usb_cpu_stop();
}
# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */

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@@ -1,9 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
extra-y = start.o
obj-y += cpu.o
obj-y += timer.o

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@@ -1,65 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*/
/*
* CPU specific code
*/
#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
#include <asm/system.h>
#include <asm/io.h>
static void cache_flush(void);
int cleanup_before_linux (void)
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* just disable everything that can disturb booting linux
*/
disable_interrupts();
/* turn off I-cache */
icache_disable();
dcache_disable();
/* flush I-cache */
cache_flush();
return (0);
}
/* flush I/D-cache */
static void cache_flush (void)
{
unsigned long i = 0;
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
}
#define RST_BASE 0x90030000
#define RSRR 0x00
#define RCSR 0x04
__attribute__((noreturn)) void reset_cpu(void)
{
/* repeat endlessly */
while (1) {
writel(0, RST_BASE + RCSR);
writel(1, RST_BASE + RSRR);
}
}

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@@ -1,126 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* armboot - Startup Code for SA1100 CPU
*
* Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
* Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
* Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
* Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
*/
#include <asm-offsets.h>
#include <config.h>
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* relocate armboot to ram
* setup stack
* jump to second stage
*
*************************************************************************
*/
.globl reset
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
bl _main
/*------------------------------------------------------------------------------*/
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
mov pc, lr
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/* Interrupt-Controller base address */
IC_BASE: .word 0x90050000
#define ICMR 0x04
/* Reset-Controller */
RST_BASE: .word 0x90030000
#define RSRR 0x00
#define RCSR 0x04
/* PWR */
PWR_BASE: .word 0x90020000
#define PSPR 0x08
#define PPCR 0x14
cpuspeed: .word CONFIG_SYS_CPUSPEED
cpu_init_crit:
/*
* mask all IRQs
*/
ldr r0, IC_BASE
mov r1, #0x00
str r1, [r0, #ICMR]
/* set clock speed */
ldr r0, PWR_BASE
ldr r1, cpuspeed
str r1, [r0, #PPCR]
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
bl lowlevel_init
mov lr, ip
#endif
/*
* disable MMU stuff and enable I-cache
*/
mrc p15,0,r0,c1,c0
bic r0, r0, #0x00002000 @ clear bit 13 (X)
bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
orr r0, r0, #0x00000002 @ set bit 1 (A) Align
mcr p15,0,r0,c1,c0
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
mov pc, lr

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@@ -1,66 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*/
#include <common.h>
#include <SA-1100.h>
#include <time.h>
#include <linux/delay.h>
static ulong get_timer_masked (void)
{
return OSCR;
}
ulong get_timer (ulong base)
{
return get_timer_masked ();
}
void __udelay(unsigned long usec)
{
ulong tmo;
ulong endtime;
signed long diff;
if (usec >= 1000) {
tmo = usec / 1000;
tmo *= CONFIG_SYS_HZ;
tmo /= 1000;
} else {
tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000*1000);
}
endtime = get_timer_masked () + tmo;
do {
ulong now = get_timer_masked ();
diff = endtime - now;
} while (diff >= 0);
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}

View File

@@ -32,8 +32,8 @@ SECTIONS
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);

View File

@@ -15,7 +15,7 @@ ENTRY(_start)
SECTIONS
{
#ifndef CONFIG_CMDLINE
/DISCARD/ : { *(.u_boot_list_2_cmd_*) }
/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
#endif
#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
/*
@@ -149,8 +149,8 @@ SECTIONS
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);

View File

@@ -5,9 +5,9 @@ dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
dtb-$(CONFIG_TARGET_SMDKC100) += s5pc1xx-smdkc100.dtb
dtb-$(CONFIG_TARGET_S5P_GONI) += s5pc1xx-goni.dtb
dtb-$(CONFIG_ARCH_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-universal_c210.dtb \
exynos4210-trats.dtb \
@@ -19,7 +19,7 @@ dtb-$(CONFIG_TARGET_HIKEY960) += hi3660-hikey960.dtb
dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb
dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
dtb-$(CONFIG_ARCH_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-spring.dtb \
exynos5250-smdk5250.dtb \
@@ -90,6 +90,9 @@ dtb-$(CONFIG_ROCKCHIP_PX30) += \
dtb-$(CONFIG_ROCKCHIP_RK3036) += \
rk3036-sdk.dtb
dtb-$(CONFIG_ROCKCHIP_RK3066) += \
rk3066a-mk808.dtb
dtb-$(CONFIG_ROCKCHIP_RK3128) += \
rk3128-evb.dtb
@@ -229,11 +232,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra210-p2571.dtb \
tegra210-p3450-0000.dtb
ifdef CONFIG_ARMADA_32BIT
dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
armada-3720-uDPU.dtb \
armada-375-db.dtb \
armada-385-atl-x530.dtb \
armada-385-atl-x530DP.dtb \
@@ -243,12 +243,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-388-gp.dtb \
armada-388-helios4.dtb \
armada-38x-controlcenterdc.dtb \
armada-7040-db-nand.dtb \
armada-7040-db.dtb \
armada-8040-clearfog-gt-8k.dtb \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
armada-8040-puzzle-m801.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
@@ -259,7 +253,20 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
armada-xp-synology-ds414.dtb \
armada-xp-theadorable.dtb \
armada-xp-theadorable.dtb
else
dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
armada-3720-eDPU.dtb \
armada-3720-uDPU.dtb \
armada-7040-db-nand.dtb \
armada-7040-db.dtb \
armada-8040-clearfog-gt-8k.dtb \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
armada-8040-puzzle-m801.dtb \
cn9130-db-A.dtb \
cn9130-db-B.dtb \
cn9131-db-A.dtb \
@@ -268,6 +275,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
cn9132-db-B.dtb \
cn9130-crb-A.dtb \
cn9130-crb-B.dtb
endif
dtb-$(CONFIG_ARCH_SYNQUACER) += synquacer-sc2a11-developerbox.dtb
dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
@@ -339,6 +347,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-qspi.dtb \
zynqmp-sm-k26-revA.dtb \
zynqmp-smk-k26-revA.dtb \
zynqmp-sck-kr-g-revA.dtbo \
zynqmp-sck-kr-g-revB.dtbo \
zynqmp-sck-kv-g-revA.dtbo \
zynqmp-sck-kv-g-revB.dtbo \
zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \
@@ -350,6 +360,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-zcu104-revA.dtb \
zynqmp-zcu104-revC.dtb \
zynqmp-zcu106-revA.dtb \
zynqmp-zcu106-rev1.0.dtb \
zynqmp-zcu111-revA.dtb \
zynqmp-zcu1275-revA.dtb \
zynqmp-zcu1275-revB.dtb \
@@ -374,6 +385,8 @@ dtb-$(CONFIG_AM33XX) += \
am335x-baltos.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
am335x-boneblack-wireless.dtb \
am335x-boneblue.dtb \
am335x-brppt1-mmc.dtb \
am335x-brppt1-nand.dtb \
am335x-brppt1-spi.dtb \
@@ -383,11 +396,14 @@ dtb-$(CONFIG_AM33XX) += \
am335x-evm.dtb \
am335x-evmsk.dtb \
am335x-bonegreen.dtb \
am335x-bonegreen-wireless.dtb \
am335x-icev2.dtb \
am335x-pocketbeagle.dtb \
am335x-pxm50.dtb \
am335x-rut.dtb \
am335x-sancloud-bbe.dtb \
am335x-sancloud-bbe-lite.dtb \
am335x-sancloud-bbe-extended-wifi.dtb \
am335x-shc.dtb \
am335x-pdu001.dtb \
am335x-chiliboard.dtb \
@@ -403,12 +419,14 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
am437x-cm-t43.dtb
dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
socfpga_arria10_chameleonv3_480_2.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_is1.dtb \
@@ -491,6 +509,7 @@ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb
dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
@@ -530,7 +549,8 @@ dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-olinuxino-lime.dtb \
sun4i-a10-pcduino.dtb \
sun4i-a10-pcduino2.dtb \
sun4i-a10-pov-protab2-ips9.dtb
sun4i-a10-pov-protab2-ips9.dtb \
sun4i-a10-topwise-a721.dtb
dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a10s-auxtek-t003.dtb \
sun5i-a10s-auxtek-t004.dtb \
@@ -545,11 +565,14 @@ dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a13-hsg-h702.dtb \
sun5i-a13-inet-86vs.dtb \
sun5i-a13-inet-98v-rev2.dtb \
sun5i-a13-licheepi-one.dtb \
sun5i-a13-olinuxino.dtb \
sun5i-a13-olinuxino-micro.dtb \
sun5i-a13-pocketbook-touch-lux-3.dtb \
sun5i-a13-q8-tablet.dtb \
sun5i-a13-utoo-p66.dtb \
sun5i-gr8-chip-pro.dtb \
sun5i-gr8-evb.dtb \
sun5i-r8-chip.dtb
dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-app4-evb1.dtb \
@@ -573,11 +596,13 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapro.dtb \
sun7i-a20-cubieboard2.dtb \
sun7i-a20-cubietruck.dtb \
sun7i-a20-haoyu-marsboard.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
sun7i-a20-icnova-swac.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-lamobo-r1.dtb \
sun7i-a20-linutronix-testbox-v2.dtb \
sun7i-a20-m3.dtb \
sun7i-a20-m5.dtb \
sun7i-a20-mk808c.dtb \
@@ -585,6 +610,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olimex-som204-evb.dtb \
sun7i-a20-olimex-som204-evb-emmc.dtb \
sun7i-a20-olinuxino-lime.dtb \
sun7i-a20-olinuxino-lime-emmc.dtb \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
@@ -601,17 +627,22 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \
sun8i-a23-evb.dtb \
sun8i-a23-gt90h-v4.dtb \
sun8i-a23-inet86dz.dtb \
sun8i-a23-ippo-q8h-v1.2.dtb \
sun8i-a23-ippo-q8h-v5.dtb \
sun8i-a23-polaroid-mid2407pxe03.dtb \
sun8i-a23-polaroid-mid2809pxe04.dtb \
sun8i-a23-q8-tablet.dtb
dtb-$(CONFIG_MACH_SUN8I_A33) += \
sun8i-a33-et-q8-v1.6.dtb \
sun8i-a33-ga10h-v1.1.dtb \
sun8i-a33-inet-d978-rev2.dtb \
sun8i-a33-ippo-q8h-v1.2.dtb \
sun8i-a33-olinuxino.dtb \
sun8i-a33-q8-tablet.dtb \
sun8i-a33-sinlinx-sina33.dtb \
sun8i-r16-bananapi-m2m.dtb \
sun8i-r16-nintendo-nes-classic-edition.dtb \
sun8i-r16-nintendo-nes-classic.dtb \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb
dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
@@ -634,6 +665,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb \
sun8i-h3-nanopi-r1.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
@@ -646,9 +678,13 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-zeropi.dtb
dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-r40-oka40i-c.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-s3-elimo-initium.dtb \
sun8i-s3-pinecube.dtb \
sun8i-v3-sl631-imx179.dtb \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-bananapi-m2-plus.dtb \
@@ -669,7 +705,9 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-orangepi-lite2.dtb \
sun50i-h6-orangepi-one-plus.dtb \
sun50i-h6-pine-h64.dtb \
sun50i-h6-tanix-tx6.dtb
sun50i-h6-pine-h64-model-b.dtb \
sun50i-h6-tanix-tx6.dtb \
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
sun50i-h616-orangepi-zero2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
@@ -695,8 +733,7 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-cubieboard4.dtb \
sun9i-a80-cx-a99.dtb
dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
vf610-colibri.dtb \
dtb-$(CONFIG_VF610) += vf610-colibri-eval-v3.dtb \
vf610-twr.dtb \
vf610-pcm052.dtb \
vf610-bk4r1.dtb
@@ -729,6 +766,7 @@ dtb-y += \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
imx6dl-dhcom-pdk2.dtb \
imx6dl-dhcom-picoitx.dts \
imx6dl-gw51xx.dtb \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
@@ -762,12 +800,14 @@ dtb-y += \
imx6dl-sabreauto.dtb \
imx6dl-sabresd.dtb \
imx6dl-wandboard-revd1.dtb \
imx6s-dhcom-drc02.dtb
endif
ifneq ($(CONFIG_MX6Q)$(CONFIG_MX6QDL),)
dtb-y += \
imx6-apalis.dtb \
imx6q-apalis-eval.dtb \
imx6q-bosch-acc.dtb \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
imx6q-cubox-i-emmc-som-v15.dtb \
@@ -848,18 +888,19 @@ dtb-$(CONFIG_MX6UL) += \
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
imx6ull-colibri-emmc.dtb \
imx6ull-colibri-emmc-eval-v3.dtb \
imx6ull-colibri-eval-v3.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-seeed-npi-imx6ull-dev-board.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-dart-6ul.dtb \
imx6ull-somlabs-visionsom.dtb \
imx6ulz-bsh-smm-m2.dtb \
imx6ulz-14x14-evk.dtb
dtb-$(CONFIG_ARCH_MX6) += \
imx6-apalis.dtb \
imx6-colibri.dtb
imx6q-apalis-eval.dtb \
imx6dl-colibri-eval-v3.dtb
dtb-$(CONFIG_O4_IMX_NANO) += \
o4-imx-nano.dtb
@@ -870,8 +911,8 @@ dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \
dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
imx7d-sdb-qspi.dtb \
imx7-cm.dtb \
imx7-colibri-emmc.dtb \
imx7-colibri-rawnand.dtb \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7s-warp.dtb \
imx7d-meerkat96.dtb \
imx7d-pico-pi.dtb \
@@ -890,7 +931,6 @@ dtb-$(CONFIG_ARCH_IMX8) += \
imx8qm-rom7720-a1.dtb \
fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-apalis.dtb \
fsl-imx8qxp-mek.dtb \
imx8-deneb.dtb \
imx8-giedi.dtb
@@ -899,19 +939,24 @@ dtb-$(CONFIG_ARCH_IMX8ULP) += \
imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-evk.dtb \
imx8mm-icore-mx8mm-ctouch2.dtb \
imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-kontron-n801x-s.dtb \
imx8mm-kontron-n801x-s-lvds.dtb \
imx8mm-mx8menlo.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
imx8mm-venice-gw73xx-0x.dtb \
imx8mm-venice-gw7901.dtb \
imx8mm-venice-gw7902.dtb \
imx8mm-verdin.dtb \
imx8mm-venice-gw7903.dtb \
imx8mm-verdin-wifi-dev.dtb \
phycore-imx8mm.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
imx8mn-ddr4-evk.dtb \
imx8mq-cm.dtb \
imx8mn-evk.dtb \
@@ -923,14 +968,22 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mp-verdin.dtb \
imx8mp-venice.dtb \
imx8mp-venice-gw74xx.dtb \
imx8mp-verdin-wifi-dev.dtb \
imx8mq-pico-pi.dtb \
imx8mq-kontron-pitx-imx8m.dtb
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
imx93-11x11-evk.dtb
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb
imxrt1020-evk.dtb \
imxrt1170-evk.dtb \
dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
@@ -1006,6 +1059,8 @@ dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
dtb-$(CONFIG_TARGET_SAM9X60EK) += sam9x60ek.dtb
dtb-$(CONFIG_TARGET_SAM9X60_CURIOSITY) += at91-sam9x60_curiosity.dtb
dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
dtb-$(CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM) += \
@@ -1030,6 +1085,8 @@ dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
omap3-beagle-xm.dtb \
omap3-beagle.dtb
dtb-$(CONFIG_TARGET_DEVKIT8000) += omap3-devkit8000.dtb
dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \
omap3-igep0020.dtb
@@ -1045,7 +1102,7 @@ dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
omap5-uevm.dtb
dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
sama7g5ek.dtb
at91-sama7g5ek.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb
@@ -1105,6 +1162,9 @@ dtb-$(CONFIG_ARCH_BCM63158) += \
dtb-$(CONFIG_ARCH_BCM68360) += \
bcm968360bg.dtb
dtb-$(CONFIG_ARCH_BCM6753) += \
bcm96753ref.dtb
dtb-$(CONFIG_ARCH_BCM6858) += \
bcm968580xref.dtb
@@ -1112,27 +1172,38 @@ dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb
dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
dtb-$(CONFIG_STM32MP13x) += \
stm32mp135f-dk.dtb
dtb-$(CONFIG_STM32MP15x) += \
stm32mp157a-dk1.dtb \
stm32mp157a-dk1-scmi.dtb \
stm32mp157a-icore-stm32mp1-ctouch2.dtb \
stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-dk2-scmi.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ed1-scmi.dtb \
stm32mp157c-ev1.dtb \
stm32mp157c-ev1-scmi.dtb \
stm32mp157c-odyssey.dtb \
stm32mp15xx-dhcom-drc02.dtb \
stm32mp15xx-dhcom-pdk2.dtb \
stm32mp15xx-dhcom-picoitx.dtb \
stm32mp15xx-dhcor-avenger96.dtb
stm32mp15xx-dhcor-avenger96.dtb \
stm32mp15xx-dhcor-drc-compact.dtb
dtb-$(CONFIG_SOC_K3_AM6) += \
dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-base-board.dtb \
k3-am654-r5-base-board.dtb \
k3-am65-iot2050-spl.dtb \
@@ -1153,6 +1224,9 @@ dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
k3-am642-sk.dtb \
k3-am642-r5-sk.dtb
dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
k3-am625-r5-sk.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
@@ -1164,6 +1238,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt8516-pumpkin.dtb \
mt8518-ap1-emmc.dtb
dtb-$(CONFIG_ARCH_NPCM7xx) += nuvoton-npcm750-evb.dtb
dtb-$(CONFIG_XEN) += xenguest-arm64.dtb
dtb-$(CONFIG_ARCH_OCTEONTX) += octeontx.dtb
@@ -1181,14 +1256,19 @@ dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
# TODO(Linus Walleij <linus.walleij@linaro.org>): Should us a single vexpress
# Kconfig option to build all of these. See examples above.
dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
dtb-$(CONFIG_TARGET_VEXPRESS64_BASE_FVP) += fvp-base-revc.dtb
dtb-$(CONFIG_TARGET_VEXPRESS64_BASER_FVP) += arm_fvp.dtb
dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb
dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb
dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
dtb-$(CONFIG_TARGET_GXP) += hpe-bmc-dl360gen10.dts
dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \
imx8mm-cl-iot-gate-ied.dtbo \
imx8mm-cl-iot-gate-ied-adc0.dtbo \
@@ -1215,6 +1295,9 @@ dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb
dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb
dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \
corstone1000-fvp.dtb
include $(srctree)/scripts/Makefile.dts
targets += $(dtb-y)

View File

@@ -397,4 +397,9 @@
&rtc {
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
system-power-controller;
};
&pruss_tm {
status = "okay";
};

View File

@@ -3,9 +3,6 @@
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/display/tda998x.h>
#include <dt-bindings/interrupt-controller/irq.h>
&ldo3_reg {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -25,145 +22,9 @@
non-removable;
};
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
>;
};
mcasp0_pins: mcasp0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
>;
};
};
&lcdc {
status = "okay";
/* If you want to get 24 bit RGB and 16 BGR mode instead of
* current 16 bit RGB and 24 BGR modes, set the propety
* below to "crossed" and uncomment the video-ports -property
* in tda19988 node.
*/
blue-and-red-wiring = "straight";
port {
lcdc_0: endpoint@0 {
remote-endpoint = <&hdmi_0>;
};
};
};
&i2c0 {
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
nxp,calib-gpios = <&gpio1 25 0>;
interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
/* video-ports = <0x234501>; */
#sound-dai-cells = <0>;
audio-ports = < TDA998x_I2S 0x03>;
ports {
port@0 {
hdmi_0: endpoint@0 {
remote-endpoint = <&lcdc_0>;
};
};
};
};
};
&rtc {
system-power-controller;
};
&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
/ {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
clk_mcasp0_fixed: clk_mcasp0_fixed {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
clk_mcasp0: clk_mcasp0 {
#clock-cells = <0>;
compatible = "gpio-gate-clock";
clocks = <&clk_mcasp0_fixed>;
enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "TI BeagleBone Black";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
dailink0_master: simple-audio-card,cpu {
sound-dai = <&mcasp0>;
clocks = <&clk_mcasp0>;
};
simple-audio-card,codec {
sound-dai = <&tda19988>;
};
};
};

View File

@@ -0,0 +1,141 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/display/tda998x.h>
#include <dt-bindings/interrupt-controller/irq.h>
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
>;
};
mcasp0_pins: mcasp0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
>;
};
};
&lcdc {
status = "okay";
/* If you want to get 24 bit RGB and 16 BGR mode instead of
* current 16 bit RGB and 24 BGR modes, set the propety
* below to "crossed" and uncomment the video-ports -property
* in tda19988 node.
*/
blue-and-red-wiring = "straight";
port {
lcdc_0: endpoint@0 {
remote-endpoint = <&hdmi_0>;
};
};
};
&i2c0 {
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
nxp,calib-gpios = <&gpio1 25 0>;
interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
/* video-ports = <0x234501>; */
#sound-dai-cells = <0>;
audio-ports = < TDA998x_I2S 0x03>;
ports {
port@0 {
hdmi_0: endpoint@0 {
remote-endpoint = <&lcdc_0>;
};
};
};
};
};
&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
/ {
clk_mcasp0_fixed: clk_mcasp0_fixed {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
clk_mcasp0: clk_mcasp0 {
#clock-cells = <0>;
compatible = "gpio-gate-clock";
clocks = <&clk_mcasp0_fixed>;
enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "TI BeagleBone Black";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
dailink0_master: simple-audio-card,cpu {
sound-dai = <&mcasp0>;
clocks = <&clk_mcasp0>;
};
simple-audio-card,codec {
sound-dai = <&tda19988>;
};
};
};

View File

@@ -0,0 +1,111 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-boneblack-hdmi.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x BeagleBone Black Wireless";
compatible = "ti,am335x-bone-black-wireless", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
/* WL_EN */
gpio = <&gpio3 9 0>;
enable-active-high;
};
};
&am33xx_pinmux {
bt_pins: pinmux_bt_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */
>;
};
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
>;
};
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
>;
};
};
&mac {
status = "disabled";
};
&mmc3 {
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
status = "okay";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <29 IRQ_TYPE_EDGE_RISING>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins &bt_pins>;
status = "okay";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
};
};
&gpio3 {
ls-buf-en-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "LS_BUF_EN";
};
};

View File

@@ -7,6 +7,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-boneblack-hdmi.dtsi"
/ {
model = "TI AM335x BeagleBone Black";

View File

@@ -0,0 +1,617 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-osd335x-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x BeagleBone Blue";
compatible = "ti,am335x-bone-blue", "ti,am33xx";
chosen {
stdout-path = &uart0;
tick-timer = &timer2;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
usr_0_led {
label = "beaglebone:green:usr0";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
usr_1_led {
label = "beaglebone:green:usr1";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
usr_2_led {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
usr_3_led {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
wifi_led {
label = "wifi";
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "phy0assoc";
};
red_led {
label = "red";
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green_led {
label = "green";
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
batt_1_led {
label = "bat25";
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
batt_2_led {
label = "bat50";
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
batt_3_led {
label = "bat75";
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
batt_4_led {
label = "bat100";
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
vmmcsd_fixed: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
/* WL_EN */
gpio = <&gpio3 9 0>;
enable-active-high;
};
};
&am33xx_pinmux {
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
>;
};
/* UT0 */
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
/* UT1 */
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
/* GPS */
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (B17) spi0_d0.uart2_txd */
>;
};
/* DSM2 */
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
>;
};
/* UT5 */
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* (U1) lcd_data8.uart5_txd */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */
>;
};
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6) /* (L15) gmii1_rxd1.mmc2_clk */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6) /* (J16) gmii1_txen.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5) /* (J17) gmii1_rxdv.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5) /* (J18) gmii1_txd3.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5) /* (K15) gmii1_txd2.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5) /* (H16) gmii1_col.mmc2_dat3 */
>;
};
bt_pins: pinmux_bt_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] - BT_EN */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* (M17) mdio_data.uart3_ctsn */
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* (M18) mdio_clk.uart3_rtsn */
>;
};
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
>;
};
/* DCAN */
dcan1_pins: pinmux_dcan1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* (E17) uart0_rtsn.dcan1_rx */
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* (E18) uart0_ctsn.dcan1_tx */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
>;
};
/* E1 */
eqep0_pins: pinmux_eqep0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE1) /* (B12) mcasp0_aclkr.eQEP0A_in */
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT, MUX_MODE1) /* (C13) mcasp0_fsr.eQEP0B_in */
>;
};
/* E2 */
eqep1_pins: pinmux_eqep1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT, MUX_MODE2) /* (V2) lcd_data12.eQEP1A_in */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_INPUT, MUX_MODE2) /* (V3) lcd_data13.eQEP1B_in */
>;
};
/* E3 */
eqep2_pins: pinmux_eqep2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE4) /* (T12) gpmc_ad12.eQEP2A_in */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE4) /* (R12) gpmc_ad13.eQEP2B_in */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
};
&usb0 {
dr_mode = "peripheral";
interrupts-extended = <&intc 18 &tps 0>;
interrupt-names = "mc", "vbus";
};
&usb1 {
dr_mode = "host";
};
&i2c0 {
baseboard_eeprom: baseboard_eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
baseboard_data: baseboard_data@0 {
reg = <0 0x100>;
};
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
mpu9250@68 {
compatible = "invensense,mpu9250";
reg = <0x68>;
interrupt-parent = <&gpio3>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>;
i2c-gate {
#address-cells = <1>;
#size-cells = <0>;
ax8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
};
};
};
pressure@76 {
compatible = "bosch,bmp280";
reg = <0x76>;
};
};
/include/ "tps65217.dtsi"
&tps {
/delete-property/ ti,pmic-shutdown-controller;
charger {
interrupts = <0>, <1>;
interrupt-names = "USB", "AC";
status = "okay";
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&mmc2 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
};
&mmc3 {
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
status = "okay";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>;
};
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins &bt_pins>;
status = "okay";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
};
};
&rtc {
system-power-controller;
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
&gpio0 {
gpio-line-names =
"UART3_CTS", /* M17 */
"UART3_RTS", /* M18 */
"UART2_RX", /* A17 */
"UART2_TX", /* B17 */
"I2C1_SDA", /* B16 */
"I2C1_SCL", /* A16 */
"MMC0_CD", /* C15 */
"SPI1_SS2", /* C18 */
"EQEP_1A", /* V2 */
"EQEP_1B", /* V3 */
"MDIR_2B", /* V4 */
"BATT_LED_2", /* T5 */
"I2C2_SDA", /* D18 */
"I2C2_SCL", /* D17 */
"UART1_RX", /* D16 */
"UART1_TX", /* D15 */
"MMC2_DAT1", /* J18 */
"MMC2_DAT2", /* K15 */
"NC", /* F16 */
"WIFI_LED", /* A15 */
"MOT_STBY", /* D14 */
"WLAN_IRQ", /* K16 */
"PWM_2A", /* U10 */
"PWM_2B", /* T10 */
"",
"",
"BATT_LED_4", /* T11 */
"BATT_LED_1", /* U12 */
"BT_EN", /* K17 */
"SPI1_SS1", /* H18 */
"UART4_RX", /* T17 */
"MDIR_1B"; /* U17 */
};
&gpio1 {
gpio-line-names =
"MMC1_DAT0", /* U7 */
"MMC1_DAT1", /* V7 */
"MMC1_DAT2", /* R8 */
"MMC1_DAT3", /* T8 */
"MMC1_DAT4", /* U8 */
"MMC1_DAT5", /* V8 */
"MMC1_DAT6", /* R9 */
"MMC1_DAT7", /* T9 */
"DCAN1_TX", /* E18 */
"DCAN1_RX", /* E17 */
"UART0_RX", /* E15 */
"UART0_TX", /* E16 */
"EQEP_2A", /* T12 */
"EQEP_2B", /* R12 */
"PRU_E_A", /* V13 */
"PRU_E_B", /* U13 */
"MDIR_2A", /* R13 */
"GPIO1_17", /* V14 */
"PWM_1A", /* U14 */
"PWM_1B", /* T14 */
"EMMC_RST", /* R14 */
"USR_LED_0", /* V15 */
"USR_LED_1", /* U15 */
"USR_LED_2", /* T15 */
"USR_LED_3", /* V16 */
"GPIO1_25", /* U16 */
"MCASP0_AXR0", /* T16 */
"MCASP0_AXR1", /* V17 */
"MCASP0_ACLKR", /* U18 */
"BATT_LED_3", /* V6 */
"MMC1_CLK", /* U9 */
"MMC1_CMD"; /* V9 */
};
&gpio2 {
gpio-line-names =
"MDIR_1A", /* T13 */
"MCASP0_FSR", /* V12 */
"LED_RED", /* R7 */
"LED_GREEN", /* T7 */
"MODE_BTN", /* U6 */
"PAUSE_BTN", /* T6 */
"MDIR_4A", /* R1 */
"MDIR_4B", /* R2 */
"MDIR_3B", /* R3 */
"MDIR_3A", /* R4 */
"SVO7", /* T1 */
"SVO8", /* T2 */
"SVO5", /* T3 */
"SVO6", /* T4 */
"UART5_TX", /* U1 */
"UART5_RX", /* U2 */
"SERVO_EN", /* U3 */
"NC", /* U4 */
"UART3_RX", /* L17 */
"UART3_TX", /* L16 */
"MMC2_CLK", /* L15 */
"DCAN1_SILENT", /* M16 */
"SVO1", /* U5 */
"SVO3", /* R5 */
"SVO2", /* V5 */
"SVO4", /* R6 */
"MMC0_DAT3", /* F17 */
"MMC0_DAT2", /* F18 */
"MMC0_DAT1", /* G15 */
"MMC0_DAT0", /* G16 */
"MMC0_CLK", /* G17 */
"MMC0_CMD"; /* G18 */
};
&gpio3 {
gpio-line-names =
"MMC2_DAT3", /* H16 */
"GPIO3_1", /* H17 */
"GPIO3_2", /* J15 */
"MMC2_CMD", /* J16 */
"MMC2_DAT0", /* J17 */
"I2C0_SDA", /* C17 */
"I2C0_SCL", /* C16 */
"EMU1", /* C14 */
"EMU0", /* B14 */
"WL_EN", /* K18 */
"WL_BT_OE", /* L18 */
"",
"",
"NC", /* F15 */
"SPI1_SCK", /* A13 */
"SPI1_MISO", /* B13 */
"SPI1_MOSI", /* D12 */
"GPIO3_17", /* C12 */
"EQEP_0A", /* B12 */
"EQEP_0B", /* C13 */
"GPIO3_20", /* D13 */
"IMU_INT", /* A14 */
"",
"",
"",
"",
"",
"",
"",
"",
"",
"";
ls-buf-en-hog {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&epwmss0 {
status = "okay";
};
&eqep0 {
pinctrl-names = "default";
pinctrl-0 = <&eqep0_pins>;
status = "okay";
};
&epwmss1 {
status = "okay";
};
&eqep1 {
pinctrl-names = "default";
pinctrl-0 = <&eqep1_pins>;
status = "okay";
};
&epwmss2 {
status = "okay";
};
&eqep2 {
pinctrl-names = "default";
pinctrl-0 = <&eqep2_pins>;
status = "okay";
};

View File

@@ -0,0 +1,127 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-bonegreen-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x BeagleBone Green Wireless";
compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
/* WL_EN */
gpio = <&gpio0 26 0>;
enable-active-high;
};
};
&am33xx_pinmux {
bt_pins: pinmux_bt_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_ad12.gpio1_28 BT_EN */
>;
};
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
>;
};
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 LS_BUF_EN */
>;
};
};
&mac {
status = "disabled";
};
&mmc3 {
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
status = "okay";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <27 IRQ_TYPE_EDGE_RISING>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins &bt_pins>;
status = "okay";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
};
};
&gpio1 {
ls-buf-en-hog {
gpio-hog;
gpios = <29 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "LS_BUF_EN";
};
};
/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
/* in case it isn't, wilink8 ends up in one of the test modes that */
/* intruces various issues (elp wkaeup timeouts etc.) */
/* On the BBGW this pin is routed through the level shifter (U21) that */
/* introduces a pullup on the line and wilink8 ends up in a bad state. */
/* use a gpio hog to force this pin low. An alternative may be adding */
/* an external pulldown on U21 pin 4. */
&gpio3 {
bt-aud-in-hog {
gpio-hog;
gpios = <16 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "MCASP0_AHCLKR";
};
};

View File

@@ -82,7 +82,7 @@
lcd0_pins: pinmux_lcd0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7)
>;
};
};

View File

@@ -388,167 +388,189 @@
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
>;
};
dmtimer7_pins: pinmux_dmtimer7_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE5)
>;
};
guardian_button_pins: pinmux_gpio_keys_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT, MUX_MODE7)
>;
};
guardian_interface_pins: pinmux_guardian_interface_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLUP, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
lcd_disen_pins: pinmux_lcd_disen_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW, MUX_MODE7)
>;
};
lcd_pins_default: pinmux_lcd_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
AM33XX_PADCONF
(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
>;
};
lcd_pins_sleep: pinmux_lcd_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA0, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA1, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA2, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA3, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA4, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA5, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA6, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA7, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA8, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA9, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA10, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA11, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA12, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA13, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA14, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_DATA15, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
AM33XX_PADCONF
(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
>;
};
guardian_led_pins: pinmux_leds_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_OUTPUT, MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
>;
};
nandflash_pins: pinmux_nandflash_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
>;
};
};

View File

@@ -0,0 +1,67 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
&am33xx_pinmux {
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
usb_hub_ctrl: usb_hub_ctrl {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */
>;
};
};
&mac {
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&cpsw_emac0 {
phy-mode = "rgmii-id";
};
&i2c0 {
usb2512b: usb-hub@2c {
pinctrl-names = "default";
pinctrl-0 = <&usb_hub_ctrl>;
compatible = "microchip,usb2512b";
reg = <0x2c>;
reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -0,0 +1,113 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2021 Sancloud Ltd
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-sancloud-bbe-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "SanCloud BeagleBone Enhanced Extended WiFi";
compatible = "sancloud,am335x-boneenhanced",
"ti,am335x-bone-black",
"ti,am335x-bone",
"ti,am33xx";
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us= <100000>;
};
};
&am33xx_pinmux {
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
/* gpmc_a9.gpio1_25: RADIO_EN */
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_OUTPUT_PULLUP, MUX_MODE7)
/* gpmc_ad12.mmc2_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3)
/* gpmc_ad13.mmc2_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3)
/* gpmc_ad14.mmc2_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3)
/* gpmc_ad15.mmc2_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3)
/* gpmc_csn3.mmc2_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)
/* gpmc_clk.mmc2_clk */
AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)
>;
};
bluetooth_pins: pinmux_bluetooth_pins {
pinctrl-single,pins = <
/* event_intr0.gpio0_19 */
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE7)
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
/* uart1_rxd */
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
/* uart1_txd */
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
/* uart1_ctsn */
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
/* uart1_rtsn */
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
};
&i2c2 {
status = "disabled";
};
&mmc3 {
status = "okay";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins>;
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
clock-frequency = <50000000>;
max-frequency = <50000000>;
};
&uart1 {
status = "okay";
bluetooth {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins &bluetooth_pins>;
compatible = "qcom,qca6174-bt";
enable-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
interrupt-parent = <&gpio0>;
interrupts = <19 IRQ_TYPE_EDGE_RISING>;
};
};

View File

@@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2021 SanCloud Ltd
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-sancloud-bbe-common.dtsi"
/ {
model = "SanCloud BeagleBone Enhanced Lite";
compatible = "sancloud,am335x-boneenhanced",
"ti,am335x-bone-black",
"ti,am335x-bone",
"ti,am33xx";
};
&am33xx_pinmux {
bb_spi0_pins: pinmux_bb_spi0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0)
>;
};
};
&spi0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_spi0_pins>;
channel@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "micron,spi-authenta";
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpha;
};
};

View File

@@ -7,6 +7,8 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-boneblack-hdmi.dtsi"
#include "am335x-sancloud-bbe-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
@@ -15,66 +17,6 @@
};
&am33xx_pinmux {
pinctrl-names = "default";
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
usb_hub_ctrl: usb_hub_ctrl {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */
>;
};
mpu6050_pins: pinmux_mpu6050_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
@@ -88,31 +30,10 @@
};
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
};
&i2c0 {
lps331ap: barometer@5c {
pinctrl-names = "default";
pinctrl-0 = <&lps3331ap_pins>;
compatible = "st,lps331ap-press";
st,drdy-int-pin = <1>;
reg = <0x5c>;
@@ -121,17 +42,12 @@
};
mpu6050: accelerometer@68 {
pinctrl-names = "default";
pinctrl-0 = <&mpu6050_pins>;
compatible = "invensense,mpu6050";
reg = <0x68>;
interrupt-parent = <&gpio0>;
interrupts = <2 IRQ_TYPE_EDGE_RISING>;
orientation = <0xff 0 0 0 1 0 0 0 0xff>;
};
usb2512b: usb-hub@2c {
compatible = "microchip,usb2512b";
reg = <0x2c>;
reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
/* wifi on port 4 */
};
};

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