Stefan Rueger
95bc4db4b9
Generate symbolic names for ldi on register pairs
2024-07-27 13:32:58 +01:00
Stefan Rueger
e594863f95
Provide op_width() and z_width()
2024-07-27 11:05:06 +01:00
Stefan Rueger
8f7afd6b56
Make opcode mnemonic variants more memorable
2024-07-27 00:17:00 +01:00
Stefan Rueger
5f3d2b4452
Provide ldi_Rd() and ldi_K() extractors
2024-07-26 17:17:17 +01:00
Stefan Rueger
16c3eedc53
Consistently use mnemo and opcode terminology
...
- ldi is the mnemonic
- Opcode is the (mostly 16-bit) machine instruction
2024-07-26 16:53:49 +01:00
Stefan Rueger
8001aedfae
Write is_opcode32() and ldi_register() in terms of mnemonics
2024-07-26 16:45:07 +01:00
Stefan Rueger
63e27021e2
Give disasm option variables punchier names
2024-07-26 16:21:33 +01:00
Stefan Rueger
68555d1688
Refrain from labelling zero-distance rjmps/branches
2024-07-26 16:15:37 +01:00
Stefan Rueger
c0aa3b68de
Rename gcc isr vector numbers with isr names
2024-07-26 14:49:42 +01:00
Stefan Rueger
d6c970543d
Only provide main label if not in tagfile
2024-07-26 13:53:34 +01:00
Stefan Rueger
8570dd27fd
Use memory labels for lds/sts
2024-07-26 01:23:55 +01:00
Stefan Rueger
d221e46673
Shorten I/O Register name
2024-07-25 18:36:54 +01:00
Stefan Rueger
32ca573b71
Make list of jumpable addresses a bitfield
2024-07-25 17:40:19 +01:00
Stefan Rueger
fec6e842df
Disassemble a series of 4 or more 0xff as fill block
2024-07-24 19:54:02 +01:00
Stefan Rueger
ac0f0af7bb
Provide disasm -g option that generates avr-gcc source
2024-07-24 18:42:45 +01:00
Stefan Rueger
a14b13e2bd
Consider UTF-8 characters when escaping strings
2024-07-23 23:59:05 +01:00
Stefan Rueger
7162711ebc
Refine opcode_mnemo() to consider reduced-core parts
2024-07-23 16:01:28 +01:00
Stefan Rueger
4526d330ea
Provide disasm -e to show technical explanation in comment
2024-07-22 23:39:33 +01:00
Stefan Rueger
0c3044217b
Provide disasm -n to show full opcode name in comment
2024-07-22 23:31:39 +01:00
Stefan Rueger
dadd9c52cd
Auto-adjust cycles for parts with 3-byte PC
2024-07-22 22:21:01 +01:00
Stefan Rueger
cdcb8fa8a2
Provide disasm -f to show affected flags in SREG
2024-07-22 22:05:41 +01:00
Stefan Rueger
92a6e71ae4
Adjust address when disassembling flash sub-memories, eg, boot
2024-07-22 21:28:27 +01:00
Stefan Rueger
1fcc0d9f91
Consolidate disassm source into one file
2024-07-22 21:27:30 +01:00
Stefan Rueger
20cb01d4c8
Consolidate CodeLabel, PGMLabel, MemLabel and IO_Register into one symbols struct
2024-07-22 19:40:36 +01:00
Stefan Rueger
4d9ee7aa0f
Rename Type/Comment/Name components for clarity
2024-07-22 17:08:41 +01:00
Stefan Rueger
1721a77259
Rename Type variables/component for self-documentation
2024-07-22 16:33:00 +01:00
Stefan Rueger
1eeaae5740
Warn if destination of jmp/call is outside flash
2024-07-22 14:45:12 +01:00
Stefan Rueger
08ab9cba0e
assign OTY_JMPI to icall (no sram or I/O access)
2024-07-22 14:44:08 +01:00
Stefan Rueger
41c18a2d18
Warn when opcodes have undefined results, eg, ld r26, X+
2024-07-22 12:50:46 +01:00
Stefan Rueger
d58ad3365c
Move from callbacks to table-driven disassembly
2024-07-22 02:20:54 +01:00
Stefan Rueger
02fca3d6e7
Remove operand for spm/lpm/(e)ijmp/(e)icall
2024-07-21 10:01:41 +01:00
Stefan Rueger
ea48a29708
Change operands entries from "-" to "" in avr_opcodes table
2024-07-20 22:40:48 +01:00
Stefan Rueger
c3732b098e
Add utility functions to avr_opcode.c
2024-07-20 17:21:50 +01:00
Stefan Rueger
d8fea60471
Reorder avr_opcodes table so that first match is reasonable
...
- Unallocated opcodes come last
- Specific reduced-core sts/lds opcodes are penultimate
- More specific opcodes come before less specific ones (clr before eor)
- Opcodes labelled alias come behind those not labelled so
2024-07-20 15:57:03 +01:00
Stefan Rueger
52608e9dcc
Introduce idname for avr_opcodes table
2024-07-20 15:18:42 +01:00
Stefan Rueger
294f74ce43
Reformat affected SREG flags in avr_opcodes.c
2024-07-20 13:39:48 +01:00
Stefan Rueger
9f439b714a
Introduce opcode type in avr_opcodes.c
2024-07-20 13:11:36 +01:00
Stefan Rueger
68c700c4f5
Correct ijmp/eijmp operand in avr_opcodes.c
2024-07-19 20:37:23 +01:00
Stefan Rueger
8941e0d636
Give weird address the letter a for reduced-core lds/sts
2024-07-19 17:40:09 +01:00
Stefan Rueger
f23a430b2e
Improve Rd/Rr modelling in avr_opcodes.c
2024-07-19 17:02:01 +01:00
Stefan Rueger
ce391927ad
Encode register constraints for tst, clr, lsl and rol
2024-07-19 14:38:20 +01:00
Stefan Rueger
64aeb1203a
Provide a bash script to generate disasm tag files
2024-07-19 00:01:47 +01:00
Stefan Rueger
966f20b858
Adapt AVRDUDE style for GPL 2.0 licence header
2024-07-18 23:48:55 +01:00
Stefan Rueger
ab08e1c1b4
Wrap round flash on disasm
2024-07-18 23:39:40 +01:00
Stefan Rueger
7dbab82a2b
Provide disasm -d for decoding of all opcodes
...
- Irrespective of the part
- Including all unallocated opcodes
Unallocated opcodes disassemble as u/opcode, eg, for the famous 0xffff:
7ff2: ff ff u/sbrs r31, 7 ; 0x80 = 128
2024-07-18 23:15:16 +01:00
Stefan Rueger
88ef47c7d1
Label unallocated opcodes with OP_AVR_ILL
2024-07-18 21:10:40 +01:00
Stefan Rueger
22eb262c53
Determine default disasm options
2024-07-18 20:25:19 +01:00
Stefan Rueger
e636a0b4ce
Fix normal lds operand order
2024-07-18 20:12:52 +01:00
Stefan Rueger
a973a92023
Add sts command for reduced-core ATtiny
2024-07-18 20:11:10 +01:00
Stefan Rueger
a1050419f9
Add lds command for reduced-core ATtiny
2024-07-18 20:02:32 +01:00
