For this configuration, the watchdog (iwdg1) is secured and managed by
OP-TEE. Add an watchdog node with arm,smc-wdt compatible, and disable
iwdg2 node which is then no more used.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently the sequence to enable caches for the A53/A72 core on K3
devices looks as follows:
1. Map entire DDR banks
2. Setup page tables (done by mmu_setup)
3. Enable MMU
4. Unmap reserved-memory regions
5. Enable caches
However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.
A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:
1. Map entire DDR banks
2. Setup page tables
3. Unmap reserved-memory regions
4. Enable MMU
5. Enable caches
Fixes: f1c694b8fd ("mach-k3: map all banks using mem_map_from_dram_banks")
Reported-by: Suhaas Joshi <s-joshi@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently mmu_setup for ARMv8 performs two functions, first it sets up
the page tables based the memory map provided by the board and then it
enables the MMU.
However for some platforms runtime fixes to the generated page tables
are required before the MMU can be enabled, such as K3 family of SoCs.
Therefore this patch moves the enablement of the MMU out of mmu_setup
and to a standalone mmu_enable function to give more granular control to
the platforms.
Note that no functional changes are intended from this patch.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.
The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.
The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add target to generate u-boot-elf.shdr for R-Car Gen5 Cortex-M33
RSIP core. The resulting .shdr SREC file can be written into the
HF at offset 0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33
RSIP core. The resulting .scif SREC file can be loaded using the
SCIF loader to start U-Boot on the RSIP core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Point every direct user of SCMI clock protocol at CPG node instead
of SCMI clock protocol node. Point every direct user of SCMI reset
and power domain protocol at a matching newly introduced MDLC node
instead of the SCMI reset and power domain protocol nodes.
This allows the CPG and MDLC remap drivers bound to CPG node and MDLC
nodes to remap between DT clock, reset and power domain IDs and SCMI
clock, reset and power domain IDs. This makes U-Boot on R-Car X5H
compatible with multiple SCP firmware versions. Currently supported
versions of SCP firmware are 4.28, 4.31 and 4.32.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H
SoC by default. The power domain and reset driver is used to remap
DT power domain and reset IDs to SCMI power domain and reset IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default.
The clock driver is used to remap DT clock IDs to SCMI clock IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691
instead of hardcoding the number in DT. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base
for U-Boot control DT. Retain currently present parts of the DT which
are not yet part of upstream Linux kernel DT in -u-boot.dtsi files
until they get replaced by upstream equivalents. Add renesas/ prefix
to the DEFAULT_DEVICE_TREE as part of the switch.
Unused i2c2..i2c8 nodes have been removed, and will become available
once upstream Linux kernel DT adds those nodes.
The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM,
which are reserved for firmware and other use.
Note that all DT parts in -u-boot.dtsi are not considered stable DT
bindings and may change before they land in Linux kernel and become
stable DT ABI.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The shared LX2160A board file calls helpers that only exist when
their subsystem is enabled. Gate them on the matching CONFIG_*:
- pci_init() under CONFIG_PCI.
- fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET.
- qixis_*() and the QIXIS branch of checkboard() under
CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path
still prints "Board: <name>".
- EVENT_SPY_SIMPLE on init_func_vid moves inside the
CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling
symbol when LTC3882 off).
#if / #ifdef, not IS_ENABLED(), because the helpers are themselves
conditionally compiled.
While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC
1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC,
not CONFIG_MMC.
No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or
LX2162AQDS, but mainly build clean up in order to support
other NXP lx2160a boards without those HW dependencies.
Signed-off-by: Vincent Jardin <vjardin@free.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Switch to the upstream device tree, which already includes the UART
nodes we need for the DM.
We also need to increase malloc area before relocation otherwise you'll
get the following error and the board panics:
DRAM: Initializing....using SPD
alloc space exhausted ptr 414 limit 400
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For non-secure boot environments pamu_init() isn't called but the CAAM
will still call sec_config_pamu_table() -> config_pamu() which then uses
an uninitialized ppaact variable. In fact, that variable is initialized
with 0, so the config_pamu() will happily assume the structure is there
and will operate on that memory. Call pamu_init() in the non-secure boot
case, too.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The combined boot firmware firmware-aquila-am69-gp.bin depends on
tiboot3-am69-gp-aquila.bin, which in turn requires the GP variant
of the TI system firmware blob (ti-fs-firmware-j784s4-gp.bin).
Fix the combined boot firmware image build by adding the missing binman
nodes.
Fixes: f62d4535cf ("arm: dts: k3-am69-aquila: add combined boot firmware image")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
The main difference is that RAM starts at 0x100_0000_0000 like on t600x
and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
rearranged.
U-boot's existing drivers are compatible with the hardware and M3 device
trees will carry "apple,t8103-*" compatible strings. Only
apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
changes the Linux driver has to deal with.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
Janne Grunau <j@jannau.net> says:
The Linux device trees for Apple silicon devices cover now most of the
hardware as u-boot's internal device trees for M1 devices. Linux has in
addition device trees M2 and M1 and M2 Pro/Max/Ultra devices which were
never added in u-boot.
The most common use case for u-boot on Apple silicon devices does not
use DTBs from u-boot but passes runtime modified device trees from an
earlier boot loader (m1n1).
This change regresses support for the SPI on M1 and M1 Pro/Max notebooks
as SPI keyboard support is not in upstream Linux. This regression is in
my opinion acceptable due to the limited use of u-boot's DTBs for these
targets.
Link: https://lore.kernel.org/r/20260507-apple-dt-upstream-v2-0-35181f2b0509@jannau.net
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
The main use case for u-boot on Apple silicon based devices is to
provide an EFI based bootloader for operating systems. This uses a
generic u-boot image with DTBs passed from an earlier boot loader
(m1n1). Use the generic board name "mac" for this purpose.
Signed-off-by: Janne Grunau <j@jannau.net>
Add nodes to the binman configuration to create single binaries that
combine tiboot3-am69-*-aquila.bin, tispl.bin and u-boot.img into
firmware-aquila-am69-*.bin, with the proper offsets.
These binaries can be used to flash U-Boot via a single binary of three,
as it is done now.
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add the workaround proposed for J784S4 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.
Link: https://www.ti.com/lit/pdf/sprz536
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Add the workaround proposed for J721S2 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.
Link: https://www.ti.com/lit/pdf/sprz530
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Add a helper macro to write and verify a 32-bit value to a memory-mapped
register. This is essential for hardware errata workarounds that require
confirmation that register writes have taken effect before proceeding with
initialization.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Pull request net-20260506.
net:
- phy: dp83867: default to 2ns delay if unspecified in device-tree
- nfs: fix buffer overflow in nfs_readlink_reply()
- cpsw: Add cpsw-switch DT binding support
- phy: add common PHY polarity properties support
- phy: adin: add support for the ADIN1200 phy
- macb: support for instances with less features
- phy: mscc: add support for the VSC8572
net-lwip:
- wget: correct diagnostic output
MT7621 doesn't boot on u-boot v2026.04. Fix it by correcting the
u-boot aligned offset.
Fixes: d9e183a04c ("MIPS: Assure end of U-Boot is at 8-byte aligned offset")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Add sandbox DM unit tests for the PHY common properties library and the
corresponding device tree test nodes to arch/sandbox/dts/test.dts.
Also enable CONFIG_PHY_COMMON_PROPS in configs/sandbox_defconfig so
the tests are built and run in the sandbox environment.
The test file covers rx/tx polarity lookups for all relevant cases:
- missing property (defaults to PHY_POL_NORMAL)
- single value without names array (applies to all modes)
- count mismatch between values and names arrays (-EINVAL)
- name found by exact match
- name not found with no "default" fallback (-EINVAL)
- name not found with a "default" entry (uses fallback value)
- unsupported polarity value (-EOPNOTSUPP)
Ported from Linux KUnit test:
linux/drivers/phy/phy-common-props-test.c
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
This board has been migrated to the upstream / kernel
device tree version (OF_UPSTREAM), so remove the
old 'local' copies that are no longer required.
However, the -u-boot.dtsi append needs to remain,
because the SoC fsl-ls1088a-u-boot.dtsi is required
for some devices (like PCIe controllers and DPAA2 ethernet)
to properly enumerate under U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Both consumers and sub-arch specific versions of gpio.h
may reference stdint or other non-C90 type definitions.
Ensure the common ones are available by including linux/types.h
before any other headers.
This issue came to light when the usb onboard hub driver
was enabled for ten64_tfa_defconfig:
In file included from ./arch/arm/include/asm/gpio.h:2,
from common/usb_onboard_hub.c:10:
./arch/arm/include/asm/arch/gpio.h:17:9: error: unknown type name 'ulong'
17 | ulong addr;
./arch/arm/include/asm/arch/gpio.h:18:9: error: unknown type name 'ulong'
18 | ulong size;
./arch/arm/include/asm/arch/gpio.h:19:9: error: unknown type name 'uint'
19 | uint ngpios;
(In this instance, the cited errors actually originate from
arch/arm/include/asm/arch-fsl-layerscape/gpio.h, which is included
by the arm top level asm/gpio.h)
Implemented as per suggestion from Quentin Schulz in Link:
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://lore.kernel.org/u-boot/35038a9a-fa5a-4f9f-b34e-17cc80a7824c@cherry.de/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_DM_SPI_FLASH is enabled, sf command will default find
device from DT which requires to use "jedec,spi-nor" compatible
string not obsoleted "spi-flash". So update NXP LS DTS to use
new compatible string
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are lots of DT warning in layerscape DTS files like:
node name for SPI buses should be 'spi' and SPI bus unit address
format error.
Update the spi node name and flash node name to avoid build warning
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable USB nodes in -u-boot.dtsi. After sync dts with kernel, USB
nodes status are set to disabled. So "usb start" does not work on
ls1088ardb and ls1088aqds.
Fixes: 10ff7e6b04 ("arm: dts: fsl-ls1088a: sync usb controller nodes with Linux")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Due to update of fsl-ls1088a.dtsi in previous patch, the esdhc
node is disabled, so u-boot can't to probe any eSDHC controller.
Fixes: fd4f7b0158 ("arm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Disable ethernet controller dpmac nodes in fsl-ls1088a.dtsi. Board
dts is responsible to enable them. Otherwise will meet failure from
ldpaa_eth driver on LS1088AQDS board, because only few dpmac
controllers can be enabled on this board.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
LS1088AQDS u-boot contains multiple DTB files:
fsl-ls1088a-qds-21-x.dtb and fsl-ls1088a-qds-29-x.dtb.
It does not use default device tree fsl-ls1088a-qds.dtb
However, the nodes updated in fsl-ls1088a-qds-u-boot.dtsi are not
included for fsl-ls1088a-qds-21-x.dts and fsl-ls1088a-qds-29-x.dts,
so fail to get any output from serial.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In layerspace's lmb_arch_add_memory implementation, all memory bank
are added to lmb, even some is with zero size. This will cause lmb
treating it as overlap with available memory by lmb_addrs_overlap
and merge with available memory. Finally causing available memory
start address changed to 0.
For example, on LX2160, before zero memory bank added to lmb, there
are two available memory regions:
- region 0, start 0x80000000, size 0x7be00000
- region 1, start 0x2080000000, size 0x700000000
After zero size memory bank added, merge to one region:
- region 0, start 0, size 0x2780000000
This wrong new region causes efi_memory_init issue when allocating bounce
buffer because of conflict address (with uboot reserved) is allocated.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The 'default ... if SYS_L3_SIZE_512KB' statement is written twice, making
the second instance dead code.
Based on the context, I believe the author of the code intended to set a
default value of '1048576' when SYS_L3_SIZE_1024KB is set.
This dead code was detected by kconfirm, a static analysis tool for
Kconfig.
Fixes: b85d75951f ("powerpc: Migrate SYS_L3_SIZE to Kconfig")
Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The R-Car Gen5 SoCs contains Cortex-M33, Cortex-R52 and Cortex-A720AE
cores. Add U-Boot build options for the Cortex-M33 core.
Since the Cortex-M33 core is a 32bit core, select V8M and ARM64 for
RCAR64 accordingly. Select TMU timer on the 32bit core, where it is
used instead of the ARMv8 timer. Adjust TMU timer base address to match
the address map of the Cortex-M33 core. Disable unused OF_BOARD_SETUP
as well as unavailable POSITION_INDEPENDENT configuration options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Both R-Car V3M Eagle and V3MSK U-Boot DT extras contain AVB pinmux
assignment, which is a leftover from before the same pinmux was part
of upstream DTs. Remove the duplicate AVB pinmux assignment in favor
of the upstream DT content. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Remove duplicate properties which are present both in arch/arm/dts/
and upstream dts/upstream/src/arm64/renesas/ in favor of those in
upstream DTs. Since those are duplicates, this causes no functional
change. Remove unused num-cs and bank-width DT properties.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There is a value of 256K hardcoded as u-boot image size. This
produce bank tty as soon as the image size grows over the limit.
Fix it by using value preset by CONFIG_SYS_MONITOR_LEN.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Some NXP imx hardware ip module as the esdhc controller are exactly the
same in some new ColdFire cpus. For the specific case, mcf5441x needs to
use the existing fsl_esdhc_imx.c driver for the esdhc device.
Create a stub to be able to use NXP "imx" serie drivers as the
fsl_esdhc_imx in the ColdFire architecture.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
