Prepare v2009.11.1

Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>

.checkpatch.conf

@@ -1,23 +0,0 @@
-# Not Linux, so don't expect a Linux tree.
---no-tree
-
-# Temporary for false positive in checkpatch
---ignore COMPLEX_MACRO
-
-# For CONFIG_SYS_I2C_NOPROBES
---ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
-
-# For simple_strtoul
---ignore CONSIDER_KSTRTO
-
-# For min/max
---ignore MINMAX
-
-# enable more tests
---strict
-
-# Not Linux, so we don't recommend usleep_range() over udelay()
---ignore USLEEP_RANGE
-
-# Ignore networking block comment style
---ignore NETWORKING_BLOCK_COMMENT_STYLE

.gitignore

@@ -5,60 +5,41 @@
 #
 # Normal rules
 #
-.*
-*.o
-*.o.*
-*.a
-*.s
-*.su
-*.mod.c
-*.i
-*.lst
-*.order
-*.elf
-*.swp
-*.bin
-*.patch
-*.cfgtmp
-*.dts.tmp
 
-# Build tree
-/build-*
+*.rej
+*.orig
+*.a
+*.o
+*~
+*.swp
+*.patch
 
 #
 # Top-level generic files
 #
-/MLO*
-/SPL
-/System.map
-/u-boot*
 
-#
-# git files that we don't want to ignore even it they are dot-files
-#
-!.gitignore
-!.mailmap
+/System.map
+/u-boot
+/u-boot.hex
+/u-boot.map
+/u-boot.bin
+/u-boot.srec
+/u-boot.ldr
+/u-boot.ldr.hex
+/u-boot.ldr.srec
+/u-boot.lds
+/u-boot-onenand.bin
+/u-boot-flexonenand.bin
 
 #
 # Generated files
 #
 
+*.depend
 /LOG
 /errlog
 /reloc_off
 
-!/spl/Makefile
-/spl/*
-/tpl/
-
-#
-# Generated include files
-#
-/include/config/
-/include/generated/
-/include/spl-autoconf.mk
-/include/tpl-autoconf.mk
-
 # stgit generated dirs
 patches-*
 .stgit-edit.txt
@@ -78,12 +59,7 @@ cscope.*
 /ctags
 /etags
 
-# gnu global files
-GPATH
-GRTAGS
-GSYMS
-GTAGS
-
-*.orig
-*~
-\#*#
+# OneNAND IPL files
+/onenand_ipl/onenand-ipl*
+/onenand_ipl/board/*/onenand*
+/onenand_ipl/board/*/*.S

COPYING

@@ -0,0 +1,298 @@
+  NOTE! This copyright does *not* cover the so-called "standalone"
+applications that use U-Boot services by means of the jump table
+provided by U-Boot exactly for this purpose - this is merely
+considered normal use of U-Boot, and does *not* fall under the
+heading of "derived work".
+
+  The header files "include/image.h" and "include/asm-*/u-boot.h"
+define interfaces to U-Boot. Including these (unmodified) header
+files in another file is considered normal use of U-Boot, and does
+*not* fall under the heading of "derived work".
+
+  Also note that the GPL below is copyrighted by the Free Software
+Foundation, but the instance of code that it refers to (the U-Boot
+source code) is copyrighted by me and others who actually wrote it.
+-- Wolfgang Denk
+
+=======================================================================
+
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+     59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+    1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS

CREDITS

@@ -22,6 +22,10 @@ N: Guillaume Alexandre
 E: guillaume.alexandre@gespac.ch
 D: Add PCIPPC6 configuration
 
+N: Swen Anderson
+E: sand@peppercon.de
+D: ERIC Support
+
 N: Pantelis Antoniou
 E: panto@intracom.gr
 D: NETVIA & NETPHONE board support, ARTOS support.
@@ -79,6 +83,12 @@ N: Oliver Brown
 E: obrown@adventnetworks.com
 D: Port to the gw8260 board
 
+N: Curt Brune
+E: curt@cucy.com
+D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
+D: Added support for ESPD-Inc. EVB4510 Board
+W: http://www.cucy.com
+
 N: Jonathan De Bruyne
 E: jonathan.debruyne@siemens.atea.be
 D: Port to Siemens IAD210 board
@@ -124,14 +134,15 @@ N: James F. Dougherty
 E: jfd@GigabitNetworks.COM
 D: Port to the MOUSSE board
 
-N: Mike Dunn
-E: mikedunn@newsguy.com
-D: Palmtreo680 board, docg4 nand flash driver
-
 N: Dave Ellis
 E: DGE@sixnetio.com
 D: EEPROM Speedup, SXNI855T port
 
+N: Thomas Elste
+E: info@elste.org
+D: Port for the ModNET50 Board, NET+50 CPU Port
+W: http://www.imms.de
+
 N: Daniel Engstr?m
 E: daniel@omicron.se
 D: x86 port, Support for sc520_cdp board
@@ -143,7 +154,7 @@ W: www.freescale.com
 
 N: Dr. Wolfgang Grandegger
 E: wg@denx.de
-D: Support for Interphase 4539 T1/E1/J1 PMC, CCM, SCM boards
+D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
 W: www.denx.de
 
 N: Peter Figuli
@@ -154,13 +165,18 @@ N: Thomas Frieden
 E: ThomasF@hyperion-entertainment.com
 D: Support for AmigaOne
 
+N: Niklaus Giger
+E: niklaus.giger@netstal.com
+D: Support for HCU(x) boards
+W: www.netstal.com
+
 N: Paul Gortmaker
 E: paul.gortmaker@windriver.com
 D: Support for WRS SBC8347/8349 boards
 
 N: Frank Gottschling
 E: fgottschling@eltec.de
-D: Support for ELTEC MHPC/ELPPC boards, cfb-console, i8042, SMI LynxEM
+D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
 W: www.eltec.de
 
 N: Marius Groeger
@@ -182,7 +198,11 @@ D: Port to Walnut405 board
 
 N: Andreas Heppel
 E: aheppel@sysgo.de
-D: CPU Support for MPC 75x
+D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
+
+N: August Hoeraendl
+E: august.hoerandl@gmx.at
+D: Support for the logodl board (PXA2xx)
 
 N: Josh Huber
 E: huber@alum.wpi.edu
@@ -266,6 +286,11 @@ N: Thomas Lange
 E: thomas@corelatus.se
 D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
 
+N: Marc Leeman
+E: marc.leeman@barco.com
+D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
+W: www.barco.com
+
 N: The LEOX team
 E: team@leox.org
 D: Support for LEOX boards, DS164x RTC
@@ -375,7 +400,7 @@ D: Support for the Wind River sbc405, sbc8240 board
 W: http://www.windriver.com
 
 N: Stelian Pop
-E: stelian@popies.net
+E: stelian.pop@leadtechdesign.com
 D: Atmel AT91CAP9ADK support
 
 N: Ricardo Ribalda Delgado
@@ -412,11 +437,11 @@ D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots mor
 
 N: Andre Schwarz
 E: andre.schwarz@matrix-vision.de
-D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
 
 N: Robert Schwebel
 E: r.schwebel@pengutronix.de
-D: Support for csb226 and innokom boards (PXA2xx)
+D: Support for csb226, logodl and innokom boards (PXA2xx)
 
 N: Aaron Sells
 E: sellsa@embeddedplanet.com
@@ -427,11 +452,6 @@ E: art@videon-central.com
 D: Support for NetSilicon NS7520
 D: Support for ColdFire MCF5275
 
-N: Jeremy C. Andrus
-E: jeremy@jeremya.com
-D: ColdFire MCF5249 initialization code
-W: jeremya.com
-
 N: Michal Simek
 E: monstr@monstr.eu
 D: Support for Microblaze, ML401, XUPV2P board
@@ -491,11 +511,6 @@ N: Martin Winistoerfer
 E: martinwinistoerfer@gmx.ch
 D: Port to MPC555/556 microcontrollers and support for cmi board
 
-N: David Wu
-E: support@arcturusnetworks.com
-D: Mercury Security EP2500
-W: http://www.arcturusnetworks.com
-
 N: Ming-Len Wu
 E: minglen_wu@techware.com.tw
 D: Motorola MX1ADS board support

Kbuild

@@ -1,87 +0,0 @@
-#
-# Kbuild for top-level directory of U-Boot
-# This file takes care of the following:
-# 1) Generate generic-asm-offsets.h
-# 2) Generate asm-offsets.h
-
-#####
-# 1) Generate generic-asm-offsets.h
-
-generic-offsets-file := include/generated/generic-asm-offsets.h
-
-always  := $(generic-offsets-file)
-targets := $(generic-offsets-file) lib/asm-offsets.s
-
-quiet_cmd_generic-offsets = GEN     $@
-define cmd_generic-offsets
-	(set -e; \
-	 echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; \
-	 echo "#define __GENERIC_ASM_OFFSETS_H__"; \
-	 echo "/*"; \
-	 echo " * DO NOT MODIFY."; \
-	 echo " *"; \
-	 echo " * This file was generated by Kbuild"; \
-	 echo " *"; \
-	 echo " */"; \
-	 echo ""; \
-	 sed -ne $(sed-y) $<; \
-	 echo ""; \
-	 echo "#endif" ) > $@
-endef
-
-# We use internal kbuild rules to avoid the "is up to date" message from make
-lib/asm-offsets.s: lib/asm-offsets.c FORCE
-	$(Q)mkdir -p $(dir $@)
-	$(call if_changed_dep,cc_s_c)
-
-$(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
-	$(Q)mkdir -p $(dir $@)
-	$(call cmd,generic-offsets)
-
-#####
-# 2) Generate asm-offsets.h
-#
-
-ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
-offsets-file := include/generated/asm-offsets.h
-endif
-
-always  += $(offsets-file)
-targets += $(offsets-file)
-targets += arch/$(ARCH)/lib/asm-offsets.s
-
-
-# Default sed regexp - multiline due to syntax constraints
-define sed-y
-	"/^->/{s:->#\(.*\):/* \1 */:; \
-	s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
-	s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
-	s:->::; p;}"
-endef
-
-CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
-
-quiet_cmd_offsets = GEN     $@
-define cmd_offsets
-	(set -e; \
-	 echo "#ifndef __ASM_OFFSETS_H__"; \
-	 echo "#define __ASM_OFFSETS_H__"; \
-	 echo "/*"; \
-	 echo " * DO NOT MODIFY."; \
-	 echo " *"; \
-	 echo " * This file was generated by Kbuild"; \
-	 echo " *"; \
-	 echo " */"; \
-	 echo ""; \
-	 sed -ne $(sed-y) $<; \
-	 echo ""; \
-	 echo "#endif" ) > $@
-endef
-
-# We use internal kbuild rules to avoid the "is up to date" message from make
-arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
-	$(Q)mkdir -p $(dir $@)
-	$(call if_changed_dep,cc_s_c)
-
-$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s Kbuild
-	$(call cmd,offsets)

Licenses/Exceptions

@@ -1,15 +0,0 @@
-
-GPL License Exception:
-
-Even though U-Boot in general is covered by the GPL-2.0/GPL-2.0+,
-this does *not* cover the so-called "standalone" applications that
-use U-Boot services by means of the jump table provided by U-Boot
-exactly for this purpose - this is merely considered normal use of
-U-Boot, and does *not* fall under the heading of "derived work".
-
-  The header files "include/image.h" and "arch/*/include/asm/u-boot.h"
-define interfaces to U-Boot.  Including these (unmodified) header
-files in another file is considered normal use of U-Boot, and does
-*not* fall under the heading of "derived work".
--- Wolfgang Denk
-

Licenses/README

@@ -1,68 +0,0 @@
-  U-Boot is Free Software.  It is copyrighted by Wolfgang Denk and
-many others who contributed code (see the actual source code and the
-git commit messages for details).  You can redistribute U-Boot and/or
-modify it under the terms of version 2 of the GNU General Public
-License as published by the Free Software Foundation.  Most of it can
-also be distributed, at your option, under any later version of the
-GNU General Public License -- see individual files for exceptions.
-
-  NOTE! This license does *not* cover the so-called "standalone"
-applications that use U-Boot services by means of the jump table
-provided by U-Boot exactly for this purpose - this is merely
-considered normal use of U-Boot, and does *not* fall under the
-heading of "derived work" -- see file  Licenses/Exceptions  for
-details.
-
-  Also note that the GPL and the other licenses are copyrighted by
-the Free Software Foundation and other organizations, but the
-instance of code that they refer to (the U-Boot source code) is
-copyrighted by me and others who actually wrote it.
--- Wolfgang Denk
-
-
-Like many other projects, U-Boot has a tradition of including big
-blocks of License headers in all files.  This not only blows up the
-source code with mostly redundant information, but also makes it very
-difficult to generate License Clearing Reports.  An additional problem
-is that even the same licenses are referred to by a number of
-slightly varying text blocks (full, abbreviated, different
-indentation, line wrapping and/or white space, with obsolete address
-information, ...) which makes automatic processing a nightmare.
-
-To make this easier, such license headers in the source files will be
-replaced with a single line reference to Unique License Identifiers
-as defined by the Linux Foundation's SPDX project [1].  For example,
-in a source file the full "GPL v2.0 or later" header text will be
-replaced by a single line:
-
-	SPDX-License-Identifier:	GPL-2.0+
-
-Ideally, the license terms of all files in the source tree should be
-defined by such License Identifiers; in no case a file can contain
-more than one such License Identifier list.
-
-If a "SPDX-License-Identifier:" line references more than one Unique
-License Identifier, then this means that the respective file can be
-used under the terms of either of these licenses, i. e. with
-
-	SPDX-License-Identifier:	GPL-2.0+	BSD-3-Clause
-
-you can chose between GPL-2.0+ and BSD-3-Clause licensing.
-
-We use the SPDX Unique License Identifiers here; these are available
-at [2].
-
-[1] http://spdx.org/
-[2] http://spdx.org/licenses/
-
-Full name					SPDX Identifier	OSI Approved	File name		URI
-=======================================================================================================================================
-GNU General Public License v2.0 only		GPL-2.0		Y		gpl-2.0.txt		http://www.gnu.org/licenses/gpl-2.0.txt
-GNU General Public License v2.0 or later	GPL-2.0+	Y		gpl-2.0.txt		http://www.gnu.org/licenses/gpl-2.0.txt
-GNU Library General Public License v2 or later	LGPL-2.0+	Y		lgpl-2.0.txt		http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt
-GNU Lesser General Public License v2.1 or later	LGPL-2.1+	Y		lgpl-2.1.txt		http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt
-eCos license version 2.0			eCos-2.0			eCos-2.0.txt		http://www.gnu.org/licenses/ecos-license.html
-BSD 2-Clause License				BSD-2-Clause	Y		bsd-2-clause.txt	http://spdx.org/licenses/BSD-2-Clause
-BSD 3-clause "New" or "Revised" License		BSD-3-Clause	Y		bsd-3-clause.txt	http://spdx.org/licenses/BSD-3-Clause#licenseText
-IBM PIBS (PowerPC Initialization and		IBM-pibs			ibm-pibs.txt
-	Boot Software) license

Licenses/bsd-2-clause.txt

@@ -1,25 +0,0 @@
-Redistribution and use in source and binary forms, with or
-without modification, are permitted provided that the following
-conditions are met:
-
-1. Redistributions of source code must retain the above
-   copyright notice, this list of conditions and the following
-   disclaimer.
-2. Redistributions in binary form must reproduce the above
-   copyright notice, this list of conditions and the following
-   disclaimer in the documentation and/or other materials
-   provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
-CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
-INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
-CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Licenses/bsd-3-clause.txt

@@ -1,24 +0,0 @@
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions, and the following disclaimer,
-   without modification.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-3. The names of the above-listed copyright holders may not be used
-   to endorse or promote products derived from this software without
-   specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
-CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Licenses/eCos-2.0.txt

@@ -1,43 +0,0 @@
-   Note that this license is not endorsed by the Free Software Foundation.
-   It is available here as a convenience to readers of [1]the license
-   list.
-
-The eCos license version 2.0
-
-   This file is part of eCos, the Embedded Configurable Operating System.
-   Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-
-   eCos is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 2 or (at your option) any later
-   version.
-
-   eCos is distributed in the hope that it will be useful, but WITHOUT ANY
-   WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-   for more details.
-
-   You should have received a copy of the GNU General Public License along
-   with eCos; if not, write to the Free Software Foundation, Inc., 51
-   Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-
-   As a special exception, if other files instantiate templates or use
-   macros or inline functions from this file, or you compile this file and
-   link it with other works to produce a work based on this file, this
-   file does not by itself cause the resulting work to be covered by the
-   GNU General Public License. However the source code for this file must
-   still be made available in accordance with section (3) of the GNU
-   General Public License.
-
-   This exception does not invalidate any other reasons why a work based
-   on this file might be covered by the GNU General Public License.
-
-   Alternative licenses for eCos may be arranged by contacting Red Hat,
-   Inc. at http://sources.redhat.com/ecos/ecos-license/
-   -------------------------------------------
-
-   ####ECOSGPLCOPYRIGHTEND####
-
-References
-
-   1. http://www.gnu.org/licenses/license-list.html

Licenses/gpl-2.0.txt

@@ -1,339 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users.  This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it.  (Some other Free Software Foundation software is covered by
-the GNU Lesser General Public License instead.)  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
-
-  To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
-distribute copies of the software, or if you modify it.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must give the recipients all the rights that
-you have.  You must make sure that they, too, receive or can get the
-source code.  And you must show them these terms so they know their
-rights.
-
-  We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
-distribute and/or modify the software.
-
-  Also, for each author's protection and ours, we want to make certain
-that everyone understands that there is no warranty for this free
-software.  If the software is modified by someone else and passed on, we
-want its recipients to know that what they have is not the original, so
-that any problems introduced by others will not reflect on the original
-authors' reputations.
-
-  Finally, any free program is threatened constantly by software
-patents.  We wish to avoid the danger that redistributors of a free
-program will individually obtain patent licenses, in effect making the
-program proprietary.  To prevent this, we have made it clear that any
-patent must be licensed for everyone's free use or not licensed at all.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-                    GNU GENERAL PUBLIC LICENSE
-   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
-  0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
-under the terms of this General Public License.  The "Program", below,
-refers to any such program or work, and a "work based on the Program"
-means either the Program or any derivative work under copyright law:
-that is to say, a work containing the Program or a portion of it,
-either verbatim or with modifications and/or translated into another
-language.  (Hereinafter, translation is included without limitation in
-the term "modification".)  Each licensee is addressed as "you".
-
-Activities other than copying, distribution and modification are not
-covered by this License; they are outside its scope.  The act of
-running the Program is not restricted, and the output from the Program
-is covered only if its contents constitute a work based on the
-Program (independent of having been made by running the Program).
-Whether that is true depends on what the Program does.
-
-  1. You may copy and distribute verbatim copies of the Program's
-source code as you receive it, in any medium, provided that you
-conspicuously and appropriately publish on each copy an appropriate
-copyright notice and disclaimer of warranty; keep intact all the
-notices that refer to this License and to the absence of any warranty;
-and give any other recipients of the Program a copy of this License
-along with the Program.
-
-You may charge a fee for the physical act of transferring a copy, and
-you may at your option offer warranty protection in exchange for a fee.
-
-  2. You may modify your copy or copies of the Program or any portion
-of it, thus forming a work based on the Program, and copy and
-distribute such modifications or work under the terms of Section 1
-above, provided that you also meet all of these conditions:
-
-    a) You must cause the modified files to carry prominent notices
-    stating that you changed the files and the date of any change.
-
-    b) You must cause any work that you distribute or publish, that in
-    whole or in part contains or is derived from the Program or any
-    part thereof, to be licensed as a whole at no charge to all third
-    parties under the terms of this License.
-
-    c) If the modified program normally reads commands interactively
-    when run, you must cause it, when started running for such
-    interactive use in the most ordinary way, to print or display an
-    announcement including an appropriate copyright notice and a
-    notice that there is no warranty (or else, saying that you provide
-    a warranty) and that users may redistribute the program under
-    these conditions, and telling the user how to view a copy of this
-    License.  (Exception: if the Program itself is interactive but
-    does not normally print such an announcement, your work based on
-    the Program is not required to print an announcement.)
-
-These requirements apply to the modified work as a whole.  If
-identifiable sections of that work are not derived from the Program,
-and can be reasonably considered independent and separate works in
-themselves, then this License, and its terms, do not apply to those
-sections when you distribute them as separate works.  But when you
-distribute the same sections as part of a whole which is a work based
-on the Program, the distribution of the whole must be on the terms of
-this License, whose permissions for other licensees extend to the
-entire whole, and thus to each and every part regardless of who wrote it.
-
-Thus, it is not the intent of this section to claim rights or contest
-your rights to work written entirely by you; rather, the intent is to
-exercise the right to control the distribution of derivative or
-collective works based on the Program.
-
-In addition, mere aggregation of another work not based on the Program
-with the Program (or with a work based on the Program) on a volume of
-a storage or distribution medium does not bring the other work under
-the scope of this License.
-
-  3. You may copy and distribute the Program (or a work based on it,
-under Section 2) in object code or executable form under the terms of
-Sections 1 and 2 above provided that you also do one of the following:
-
-    a) Accompany it with the complete corresponding machine-readable
-    source code, which must be distributed under the terms of Sections
-    1 and 2 above on a medium customarily used for software interchange; or,
-
-    b) Accompany it with a written offer, valid for at least three
-    years, to give any third party, for a charge no more than your
-    cost of physically performing source distribution, a complete
-    machine-readable copy of the corresponding source code, to be
-    distributed under the terms of Sections 1 and 2 above on a medium
-    customarily used for software interchange; or,
-
-    c) Accompany it with the information you received as to the offer
-    to distribute corresponding source code.  (This alternative is
-    allowed only for noncommercial distribution and only if you
-    received the program in object code or executable form with such
-    an offer, in accord with Subsection b above.)
-
-The source code for a work means the preferred form of the work for
-making modifications to it.  For an executable work, complete source
-code means all the source code for all modules it contains, plus any
-associated interface definition files, plus the scripts used to
-control compilation and installation of the executable.  However, as a
-special exception, the source code distributed need not include
-anything that is normally distributed (in either source or binary
-form) with the major components (compiler, kernel, and so on) of the
-operating system on which the executable runs, unless that component
-itself accompanies the executable.
-
-If distribution of executable or object code is made by offering
-access to copy from a designated place, then offering equivalent
-access to copy the source code from the same place counts as
-distribution of the source code, even though third parties are not
-compelled to copy the source along with the object code.
-
-  4. You may not copy, modify, sublicense, or distribute the Program
-except as expressly provided under this License.  Any attempt
-otherwise to copy, modify, sublicense or distribute the Program is
-void, and will automatically terminate your rights under this License.
-However, parties who have received copies, or rights, from you under
-this License will not have their licenses terminated so long as such
-parties remain in full compliance.
-
-  5. You are not required to accept this License, since you have not
-signed it.  However, nothing else grants you permission to modify or
-distribute the Program or its derivative works.  These actions are
-prohibited by law if you do not accept this License.  Therefore, by
-modifying or distributing the Program (or any work based on the
-Program), you indicate your acceptance of this License to do so, and
-all its terms and conditions for copying, distributing or modifying
-the Program or works based on it.
-
-  6. Each time you redistribute the Program (or any work based on the
-Program), the recipient automatically receives a license from the
-original licensor to copy, distribute or modify the Program subject to
-these terms and conditions.  You may not impose any further
-restrictions on the recipients' exercise of the rights granted herein.
-You are not responsible for enforcing compliance by third parties to
-this License.
-
-  7. If, as a consequence of a court judgment or allegation of patent
-infringement or for any other reason (not limited to patent issues),
-conditions are imposed on you (whether by court order, agreement or
-otherwise) that contradict the conditions of this License, they do not
-excuse you from the conditions of this License.  If you cannot
-distribute so as to satisfy simultaneously your obligations under this
-License and any other pertinent obligations, then as a consequence you
-may not distribute the Program at all.  For example, if a patent
-license would not permit royalty-free redistribution of the Program by
-all those who receive copies directly or indirectly through you, then
-the only way you could satisfy both it and this License would be to
-refrain entirely from distribution of the Program.
-
-If any portion of this section is held invalid or unenforceable under
-any particular circumstance, the balance of the section is intended to
-apply and the section as a whole is intended to apply in other
-circumstances.
-
-It is not the purpose of this section to induce you to infringe any
-patents or other property right claims or to contest validity of any
-such claims; this section has the sole purpose of protecting the
-integrity of the free software distribution system, which is
-implemented by public license practices.  Many people have made
-generous contributions to the wide range of software distributed
-through that system in reliance on consistent application of that
-system; it is up to the author/donor to decide if he or she is willing
-to distribute software through any other system and a licensee cannot
-impose that choice.
-
-This section is intended to make thoroughly clear what is believed to
-be a consequence of the rest of this License.
-
-  8. If the distribution and/or use of the Program is restricted in
-certain countries either by patents or by copyrighted interfaces, the
-original copyright holder who places the Program under this License
-may add an explicit geographical distribution limitation excluding
-those countries, so that distribution is permitted only in or among
-countries not thus excluded.  In such case, this License incorporates
-the limitation as if written in the body of this License.
-
-  9. The Free Software Foundation may publish revised and/or new versions
-of the General Public License from time to time.  Such new versions will
-be similar in spirit to the present version, but may differ in detail to
-address new problems or concerns.
-
-Each version is given a distinguishing version number.  If the Program
-specifies a version number of this License which applies to it and "any
-later version", you have the option of following the terms and conditions
-either of that version or of any later version published by the Free
-Software Foundation.  If the Program does not specify a version number of
-this License, you may choose any version ever published by the Free Software
-Foundation.
-
-  10. If you wish to incorporate parts of the Program into other free
-programs whose distribution conditions are different, write to the author
-to ask for permission.  For software which is copyrighted by the Free
-Software Foundation, write to the Free Software Foundation; we sometimes
-make exceptions for this.  Our decision will be guided by the two goals
-of preserving the free status of all derivatives of our free software and
-of promoting the sharing and reuse of software generally.
-
-                            NO WARRANTY
-
-  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
-FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
-OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
-PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
-OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
-TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
-PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
-REPAIR OR CORRECTION.
-
-  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
-REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
-INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
-OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
-TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
-YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
-PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGES.
-
-                     END OF TERMS AND CONDITIONS
-
-            How to Apply These Terms to Your New Programs
-
-  If you develop a new program, and you want it to be of the greatest
-possible use to the public, the best way to achieve this is to make it
-free software which everyone can redistribute and change under these terms.
-
-  To do so, attach the following notices to the program.  It is safest
-to attach them to the start of each source file to most effectively
-convey the exclusion of warranty; and each file should have at least
-the "copyright" line and a pointer to where the full notice is found.
-
-    <one line to give the program's name and a brief idea of what it does.>
-    Copyright (C) <year>  <name of author>
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License along
-    with this program; if not, write to the Free Software Foundation, Inc.,
-    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-
-Also add information on how to contact you by electronic and paper mail.
-
-If the program is interactive, make it output a short notice like this
-when it starts in an interactive mode:
-
-    Gnomovision version 69, Copyright (C) year name of author
-    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-    This is free software, and you are welcome to redistribute it
-    under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License.  Of course, the commands you use may
-be called something other than `show w' and `show c'; they could even be
-mouse-clicks or menu items--whatever suits your program.
-
-You should also get your employer (if you work as a programmer) or your
-school, if any, to sign a "copyright disclaimer" for the program, if
-necessary.  Here is a sample; alter the names:
-
-  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Lesser General
-Public License instead of this License.

Licenses/ibm-pibs.txt

@@ -1,17 +0,0 @@
-This source code has been made available to you by IBM on an AS-IS
-basis.	 Anyone receiving this source is licensed under IBM
-copyrights to use it in any way he or she deems fit, including
-copying it, modifying it, compiling it, and redistributing it either
-with or without modifications.	 No license under IBM patents or
-patent applications is to be implied by the copyright license.
-
-Any user of this software should understand that IBM cannot provide
-technical support for this software and will not be responsible for
-any consequences resulting from the use of this software.
-
-Any person who transfers this source code or any derivative work
-must include the IBM copyright notice, this paragraph, and the
-preceding two paragraphs in the transferred software.
-
-COPYRIGHT   I B M   CORPORATION 1995
-LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M

Licenses/lgpl-2.0.txt

@@ -1,481 +0,0 @@
-                  GNU LIBRARY GENERAL PUBLIC LICENSE
-                       Version 2, June 1991
-
- Copyright (C) 1991 Free Software Foundation, Inc.
- 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-[This is the first released version of the library GPL.  It is
- numbered 2 because it goes with version 2 of the ordinary GPL.]
-
-                            Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-Licenses are intended to guarantee your freedom to share and change
-free software--to make sure the software is free for all its users.
-
-  This license, the Library General Public License, applies to some
-specially designated Free Software Foundation software, and to any
-other libraries whose authors decide to use it.  You can use it for
-your libraries, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
-
-  To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if
-you distribute copies of the library, or if you modify it.
-
-  For example, if you distribute copies of the library, whether gratis
-or for a fee, you must give the recipients all the rights that we gave
-you.  You must make sure that they, too, receive or can get the source
-code.  If you link a program with the library, you must provide
-complete object files to the recipients so that they can relink them
-with the library, after making changes to the library and recompiling
-it.  And you must show them these terms so they know their rights.
-
-  Our method of protecting your rights has two steps: (1) copyright
-the library, and (2) offer you this license which gives you legal
-permission to copy, distribute and/or modify the library.
-
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-
-  <signature of Ty Coon>, 1 April 1990
-  Ty Coon, President of Vice
-
-That's all there is to it!

MAINTAINERS

@@ -0,0 +1,972 @@
+#########################################################################
+#									#
+# Regular Maintainers for U-Boot board support:				#
+#									#
+# For any board without permanent maintainer, please contact		#
+#	Wolfgang Denk <wd@denx.de>					#
+# and Cc: the <u-boot@lists.denx.de> mailing list.			#
+#									#
+# Note: lists sorted by Maintainer Name					#
+#########################################################################
+
+
+#########################################################################
+# PowerPC Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Poonam Aggrwal <poonam.aggrwal@freescale.com>
+
+	P2020RDB	P2020
+
+Greg Allen <gallen@arlut.utexas.edu>
+
+	UTX8245		MPC8245
+
+Pantelis Antoniou <panto@intracom.gr>
+
+	NETVIA		MPC8xx
+
+Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+	cpci5200	MPC5200
+	mecp5123	MPC5121
+	mecp5200	MPC5200
+	pf5200		MPC5200
+
+	vme8349		MPC8349
+
+	CPCI750		PPC750FX/GX
+
+Yuli Barcohen <yuli@arabellasw.com>
+
+	Adder		MPC87x/MPC852T
+	ep8248		MPC8248
+	ISPAN		MPC8260
+	MPC8260ADS	MPC826x/MPC827x/MPC8280
+	Rattler		MPC8248
+	ZPC1900		MPC8265
+
+Michael Barkowski <michael.barkowski@freescale.com>
+
+	MPC8323ERDB	MPC8323
+
+Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
+
+	sacsng		MPC8260
+
+Oliver Brown <obrown@adventnetworks.com>
+
+	gw8260		MPC8260
+
+Conn Clark <clark@esteem.com>
+
+	ESTEEM192E	MPC8xx
+
+Joe D'Abbraccio <ljd015@freescale.com>
+
+	MPC837xERDB	MPC837x
+
+Kári Davíðsson <kd@flaga.is>
+
+	FLAGADM		MPC823
+
+Torsten Demke <torsten.demke@fci.com>
+
+	eXalion		MPC824x
+
+Wolfgang Denk <wd@denx.de>
+
+	IceCube_5100	MGT5100
+	IceCube_5200	MPC5200
+
+	ARIA		MPC5121e
+
+	AMX860		MPC860
+	ETX094		MPC850
+	FPS850L		MPC850
+	FPS860L		MPC860
+	ICU862		MPC862
+	IP860		MPC860
+	IVML24		MPC860
+	IVML24_128	MPC860
+	IVML24_256	MPC860
+	IVMS8		MPC860
+	IVMS8_128	MPC860
+	IVMS8_256	MPC860
+	LANTEC		MPC850
+	LWMON		MPC823
+	NC650		MPC852
+	R360MPI		MPC823
+	RMU		MPC850
+	RRvision	MPC823
+	SM850		MPC850
+	SPD823TS	MPC823
+	TQM823L		MPC823
+	TQM823L_LCD	MPC823
+	TQM850L		MPC850
+	TQM855L		MPC855
+	TQM860L		MPC860
+	TQM860L_FEC	MPC860
+	c2mon		MPC855
+	hermes		MPC860
+	lwmon		MPC823
+	pcu_e		MPC855
+
+	CU824		MPC8240
+	Sandpoint8240	MPC8240
+	SL8245		MPC8245
+
+	ATC		MPC8250
+	PM825		MPC8250
+
+	TQM8255		MPC8255
+
+	CPU86		MPC8260
+	PM826		MPC8260
+	TQM8260		MPC8260
+
+	P3G4		MPC7410
+
+	PCIPPC2		MPC750
+	PCIPPC6		MPC750
+
+	EXBITGEN	PPC405GP
+
+Jon Diekema <jon.diekema@smiths-aerospace.com>
+
+	sbc8260		MPC8260
+
+Dirk Eibach <eibach@gdsys.de>
+
+	devconcenter	PPC460EX
+	dlvision        PPC405EP
+	gdppc440etx	PPC440EP/GR
+	intip		PPC460EX
+	neo		PPC405EP
+
+Dave Ellis <DGE@sixnetio.com>
+
+	SXNI855T	MPC8xx
+
+Thomas Frieden <ThomasF@hyperion-entertainment.com>
+
+	AmigaOneG3SE	MPC7xx
+
+Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+	ADCIOP		IOP480 (PPC401)
+	APC405		PPC405GP
+	AR405		PPC405GP
+	ASH405		PPC405EP
+	CANBT		PPC405CR
+	CPCI2DP		PPC405GP
+	CPCI405		PPC405GP
+	CPCI4052	PPC405GP
+	CPCI405AB	PPC405GP
+	CPCI405DT	PPC405GP
+	CPCIISER4	PPC405GP
+	DASA_SIM	IOP480 (PPC401)
+	DP405		PPC405EP
+	DU405		PPC405GP
+	DU440		PPC440EPx
+	G2000		PPC405EP
+	HH405		PPC405EP
+	HUB405		PPC405EP
+	OCRTC		PPC405GP
+	ORSG		PPC405GP
+	PCI405		PPC405GP
+	PLU405		PPC405EP
+	PMC405		PPC405GP
+	PMC405DE	PPC405EP
+	PMC440		PPC440EPx
+	VOH405		PPC405EP
+	VOM405		PPC405EP
+	WUH405		PPC405EP
+	CMS700		PPC405EP
+
+Niklaus Giger <niklaus.giger@netstal.com>
+
+	HCU4		PPC405GPr
+	MCU25		PPC405GPr
+	HCU5		PPC440EPx
+
+Frank Gottschling <fgottschling@eltec.de>
+
+	MHPC		MPC8xx
+
+	BAB7xx		MPC740/MPC750
+
+Wolfgang Grandegger <wg@denx.de>
+
+	CCM		MPC855
+
+	PN62		MPC8240
+	IPHASE4539	MPC8260
+	SCM		MPC8260
+
+Joe Hamman <joe.hamman@embeddedspecialties.com>
+
+	sbc8548		MPC8548
+	sbc8641d	MPC8641D
+
+Klaus Heydeck <heydeck@kieback-peter.de>
+
+	KUP4K		MPC855
+	KUP4X		MPC859
+
+Ilko Iliev <iliev@ronetix.at>
+
+	PM9261		AT91SAM9261
+	PM9263		AT91SAM9263
+
+Gary Jennejohn <garyj@denx.de>
+
+	quad100hd	PPC405EP
+
+Murray Jensen <Murray.Jensen@csiro.au>
+
+	cogent_mpc8xx	MPC8xx
+
+	cogent_mpc8260	MPC8260
+	hymod		MPC8260
+
+Larry Johnson <lrj@acm.org>
+
+	korat		PPC440EPx
+
+Feng Kan <fkan@amcc.com>
+
+	redwood			PPC4xx
+
+Brad Kemp <Brad.Kemp@seranoa.com>
+
+	ppmc8260	MPC8260
+
+Sangmoon Kim <dogoil@etinsys.com>
+
+	debris		MPC8245
+	KVME080		MPC8245
+
+Thomas Lange <thomas@corelatus.se>
+
+	GTH		MPC860
+
+Robert Lazarski <robertlazarski@gmail.com>
+
+	ATUM8548	MPC8548
+
+The LEOX team <team@leox.org>
+
+	ELPT860		MPC860T
+
+Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+	linkstation	MPC8241
+
+Dave Liu <daveliu@freescale.com>
+
+	MPC8315ERDB	MPC8315
+	MPC832XEMDS	MPC832x
+	MPC8360EMDS	MPC8360
+	MPC837XEMDS	MPC837x
+
+Nye Liu <nyet@zumanetworks.com>
+
+	ZUMA		MPC7xx_74xx
+
+Kumar Gala <kumar.gala@freescale.com>
+
+	MPC8540ADS	MPC8540
+	MPC8560ADS	MPC8560
+	MPC8541CDS	MPC8541
+	MPC8555CDS	MPC8555
+
+	MPC8641HPCN	MPC8641D
+
+Ron Madrid <info@sheldoninst.com>
+
+	SIMPC8313	MPC8313
+
+Dan Malek <dan@embeddedalley.com>
+
+	stxgp3		MPC85xx
+	stxssa		MPC85xx
+	stxxtc		MPC8xx
+
+Eran Man <eran@nbase.co.il>
+
+	EVB64260_750CX	MPC750CX
+
+Andrea "llandre" Marson <andrea.marson@dave-tech.it>
+
+	PPChameleonEVB	PPC405EP
+
+Reinhard Meyer <r.meyer@emk-elektronik.de>
+
+	TOP860		MPC860T
+	TOP5200		MPC5200
+
+Tolunay Orkun <torkun@nextio.com>
+
+	csb272		PPC405GP
+	csb472		PPC405GP
+
+John Otken <jotken@softadvances.com>
+
+	luan		PPC440SP
+	taihu		PPC405EP
+
+Keith Outwater <Keith_Outwater@mvis.com>
+
+	GEN860T		MPC860T
+	GEN860T_SC	MPC860T
+
+Frank Panno <fpanno@delphintech.com>
+
+	ep8260		MPC8260
+
+Denis Peter <d.peter@mpl.ch>
+
+	MIP405		PPC4xx
+	PIP405		PPC4xx
+
+Kim Phillips <kim.phillips@freescale.com>
+
+	MPC8349EMDS	MPC8349
+
+Daniel Poirot <dan.poirot@windriver.com>
+
+	sbc8240		MPC8240
+	sbc405		PPC405GP
+
+Ricardo Ribalda <ricardo.ribalda@uam.es>
+
+	ml507 		PPC440x5
+	v5fx30teval	PPC440x5
+	xilinx-ppc405-generic	PPC405
+	xilinx-ppc440-generic	PPC440x5
+
+Stefan Roese <sr@denx.de>
+
+	P3M7448		MPC7448
+
+	uc100		MPC857
+
+	TQM85xx		MPC8540/8541/8555/8560
+
+	acadia		PPC405EZ
+	alpr		PPC440GX
+	bamboo		PPC440EP
+	bunbinga	PPC405EP
+	canyonlands	PPC460EX
+	ebony		PPC440GP
+	glacier		PPC460GT
+	haleakala	PPC405EXr
+	katmai		PPC440SPe
+	kilauea		PPC405EX
+	lwmon5		PPC440EPx
+	makalu		PPC405EX
+	ocotea		PPC440GX
+	p3p440		PPC440GP
+	pcs440ep	PPC440EP
+	rainier		PPC440GRx
+	sequoia		PPC440EPx
+	sycamore	PPC405GPr
+	taishan		PPC440GX
+	walnut		PPC405GP
+	yellowstone	PPC440GR
+	yosemite	PPC440EP
+	zeus		PPC405EP
+
+	P3M750		PPC750FX/GX/GL
+
+Yusdi Santoso <yusdi_santoso@adaptec.com>
+
+	HIDDEN_DRAGON	MPC8241/MPC8245
+
+Travis Sawyer (travis.sawyer@sandburst.com>
+
+	KAREF		PPC440GX
+	METROBOX	PPC440GX
+
+Georg Schardt <schardt@team-ctech.de>
+
+	fx12mm		PPC405
+
+Heiko Schocher <hs@denx.de>
+
+	ids8247		MPC8247
+	jupiter		MPC5200
+	kmeter1		MPC8360
+	kmsupx4		MPC852T
+	mgcoge		MPC8247
+	mgsuvd		MPC852
+	mucmc52		MPC5200
+	muas3001	MPC8270
+	municse		MPC5200
+	sc3		PPC405GP
+	uc101		MPC5200
+
+
+Peter De Schrijver <p2@mind.be>
+
+	ML2		PPC4xx
+
+Andre Schwarz <andre.schwarz@matrix-vision.de>
+
+	mvbc_p		MPC5200
+	mvblm7		MPC8343
+
+Jon Smirl <jonsmirl@gmail.com>
+
+	pcm030		MPC5200
+
+Timur Tabi <timur@freescale.com>
+
+	MPC8349E-mITX	MPC8349
+	MPC8349E-mITX-GP MPC8349
+
+Erik Theisen <etheisen@mindspring.com>
+
+	W7OLMC		PPC4xx
+	W7OLMG		PPC4xx
+
+Jim Thompson <jim@musenki.com>
+
+	MUSENKI		MPC8245/8241
+	Sandpoint8245	MPC8245
+
+Rune Torgersen <runet@innovsys.com>
+
+	MPC8266ADS	MPC8266
+
+Peter Tyser <ptyser@xes-inc.com>
+
+	XPEDITE1000	PPC440GX
+	XPEDITE5170	MPC8640
+	XPEDITE5200	MPC8548
+	XPEDITE5370	MPC8572
+
+David Updegraff <dave@cray.com>
+
+	CRAYL1		PPC4xx
+
+Anton Vorontsov <avorontsov@ru.mvista.com>
+
+	MPC8360ERDK	MPC8360
+
+Josef Wagner <Wagner@Microsys.de>
+
+	CPC45		MPC8245
+	PM520		MPC5200
+
+Stephen Williams <steve@icarus.com>
+
+	JSE		PPC405GPr
+
+Roy Zang <tie-fei.zang@freescale.com>
+
+	mpc7448hpc2	MPC7448
+
+John Zhan <zhanz@sinovee.com>
+
+	svm_sc8xx	MPC8xx
+
+Detlev Zundel <dzu@denx.de>
+
+	inka4x0		MPC5200
+
+-------------------------------------------------------------------------
+
+Unknown / orphaned boards:
+
+	ADS860		MPC8xx
+	FADS823		MPC8xx
+	FADS850SAR	MPC8xx
+	FADS860T	MPC8xx
+	GENIETV		MPC8xx
+	IAD210		MPC8xx
+	MBX		MPC8xx
+	MBX860T		MPC8xx
+	NX823		MPC8xx
+	RPXClassic	MPC8xx
+	RPXlite		MPC8xx
+
+	ERIC		PPC4xx
+
+	MOUSSE		MPC824x
+
+	RPXsuper	MPC8260
+	rsdproto	MPC8260
+
+	EVB64260	MPC7xx_74xx
+
+
+#########################################################################
+# ARM Systems:								#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Rowel Atienza <rowel@diwalabs.com>
+
+	armadillo	ARM720T
+
+Stefano Babic <sbabic@denx.de>
+
+	polaris		xscale
+	trizepsiv	xscale
+
+Dirk Behme <dirk.behme@gmail.com>
+
+	omap3_beagle	ARM CORTEX-A8 (OMAP3530 SoC)
+
+Eric Benard <eric@eukrea.com>
+
+	cpuat91		ARM920T
+	cpu9260		ARM926EJS (AT91SAM9260 SoC)
+	cpu9G20		ARM926EJS (AT91SAM9G20 SoC)
+
+Rishi Bhattacharya <rishi@ti.com>
+
+	omap5912osk	ARM926EJS
+
+Cliff Brake <cliff.brake@gmail.com>
+
+	pxa255_idp	xscale
+
+Rick Bronson <rick@efn.org>
+
+	AT91RM9200DK	at91rm9200
+
+George G. Davis <gdavis@mvista.com>
+
+	assabet		SA1100
+	gcplus		SA1100
+
+Wolfgang Denk <wd@denx.de>
+	imx27lite	i.MX27
+	qong		i.MX31
+
+Thomas Elste <info@elste.org>
+
+	modnet50	ARM720T (NET+50)
+
+Fabio Estevam <Fabio.Estevam@freescale.com>
+
+	mx31pdk		i.MX31
+
+Peter Figuli <peposh@etc.sk>
+
+	wepep250	xscale
+
+Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
+
+	meesc		ARM926EJS (AT91SAM9263 SoC)
+
+Sedji Gaouaou<sedji.gaouaou@atmel.com>
+	at91sam9g10ek		ARM926EJS (AT91SAM9G10 SoC)
+	at91sam9m10g45ek	ARM926EJS (AT91SAM9G45 SoC)
+
+Marius Gröger <mag@sysgo.de>
+
+	impa7		ARM720T (EP7211)
+	ep7312		ARM720T (EP7312)
+
+Kshitij Gupta <kshitij@ti.com>
+
+	omap1510inn	ARM925T
+	omap1610inn	ARM926EJS
+
+Grazvydas Ignotas <notasas@gmail.com>
+
+	omap3_pandora	ARM CORTEX-A8 (OMAP3xx SoC)
+
+Gary Jennejohn <garyj@denx.de>
+
+	smdk2400	ARM920T
+	trab		ARM920T
+
+Konstantin Kletschke <kletschke@synertronixx.de>
+	scb9328		ARM920T
+
+Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+       openrd_base     ARM926EJS (Kirkwood SoC)
+
+Nishant Kamat <nskamat@ti.com>
+
+	omap1610h2	ARM926EJS
+
+Frederik Kriewitz <frederik@kriewitz.eu>
+
+	devkit8000	ARM CORTEX-A8 (OMAP3530 SoC)
+
+Sergey Kubushyn <ksi@koi8.net>
+
+	DV-EVM		ARM926EJS
+	SONATA		ARM926EJS
+	SCHMOOGIE	ARM926EJS
+
+Sandeep Paulraj <s-paulraj@ti.com>
+
+	davinci_dm355evm	ARM926EJS
+	davinci_dm355leopard	ARM926EJS
+	davinci_dm365evm	ARM926EJS
+	davinci_dm6467evm	ARM926EJS
+
+Prakash Kumar <prakash@embedx.com>
+
+	cerf250		xscale
+
+Sergey Lapin <slapin@ossfans.org>
+
+	afeb9260	ARM926EJS (AT91SAM9260 SoC)
+
+Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+	imx31_phycore_eet	i.MX31
+	mx31ads			i.MX31
+	SMDK6400		S3C6400
+
+Nishanth Menon <nm@ti.com>
+
+	omap3_sdp3430	ARM CORTEX-A8 (OMAP3xx SoC)
+	omap3_zoom1	ARM CORTEX-A8 (OMAP3xx SoC)
+
+David Müller <d.mueller@elsoft.ch>
+
+	smdk2410	ARM920T
+	VCMA9		ARM920T
+
+Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+	galaxy5200	mpc5200
+
+Rolf Offermanns <rof@sysgo.de>
+
+	shannon		SA1100
+
+Kyungmin Park <kyungmin.park@samsung.com>
+
+	apollon		ARM1136EJS
+
+Peter Pearse <peter.pearse@arm.com>
+	integratorcp	All current ARM supplied & supported core modules
+			-see http://www.arm.com/products/DevTools/Hardware_Platforms.html
+	versatile	ARM926EJ-S
+	versatile	ARM926EJ-S
+
+Dave Peverley <dpeverley@mpc-data.co.uk>
+
+	omap730p2	ARM926EJS
+
+Manikandan Pillai <mani.pillai@ti.com>
+
+	omap3_evm	ARM CORTEX-A8 (OMAP3xx SoC)
+
+Stelian Pop <stelian.pop@leadtechdesign.com>
+
+	at91cap9adk	ARM926EJS (AT91CAP9 SoC)
+	at91sam9260ek	ARM926EJS (AT91SAM9260 SoC)
+	at91sam9261ek	ARM926EJS (AT91SAM9261 SoC)
+	at91sam9263ek	ARM926EJS (AT91SAM9263 SoC)
+	at91sam9rlek	ARM926EJS (AT91SAM9RL SoC)
+
+Tom Rix <Tom.Rix@windriver.com>
+
+	omap3_zoom2	ARM CORTEX-A8 (OMAP3xx SoC)
+
+Stefan Roese <sr@denx.de>
+
+	ixdpg425	xscale
+	pdnb3		xscale
+	scpu		xscale
+
+Alessandro Rubini <rubini@unipv.it>
+Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
+
+	nmdk8815	ARM926EJS (Nomadik 8815 Soc)
+
+Steve Sakoman <sakoman@gmail.com>
+
+	omap3_overo	ARM CORTEX-A8 (OMAP3xx SoC)
+
+Robert Schwebel <r.schwebel@pengutronix.de>
+
+	csb226		xscale
+	innokom		xscale
+
+Michael Schwingen <michael@schwingen.org>
+
+	actux1		xscale
+	actux2		xscale
+	actux3		xscale
+	actux4		xscale
+
+Andrea Scian <andrea.scian@dave-tech.it>
+
+	B2		ARM7TDMI (S3C44B0X)
+
+Albin Tonnerre <albin.tonnerre@free-electrons.com>
+
+	sbc35_a9g20	ARM926EJS (AT91SAM9G20 SoC)
+	tny_a9260	ARM926EJS (AT91SAM9260 SoC)
+	tny_a9g20	ARM926EJS (AT91SAM9G20 SoC)
+
+Greg Ungerer <greg.ungerer@opengear.com>
+
+	cm4008		ks8695p
+	cm4116		ks8695p
+	cm4148		ks8695p
+
+Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+	SFFSDR		ARM926EJS
+
+Prafulla Wadaskar <prafulla@marvell.com>
+
+	mv88f6281gtw_ge	ARM926EJS (Kirkwood SoC)
+	rd6281a		ARM926EJS (Kirkwood SoC)
+	sheevaplug	ARM926EJS (Kirkwood SoC)
+
+Richard Woodruff <r-woodruff2@ti.com>
+
+	omap2420h4	ARM1136EJS
+
+Alex Züpke <azu@sysgo.de>
+
+	lart		SA1100
+	dnp1110		SA1110
+
+Minkyu Kang <mk7.kang@samsung.com>
+
+	SMDKC100	ARM CORTEX-A8 (S5PC100 SoC)
+
+-------------------------------------------------------------------------
+
+Unknown / orphaned boards:
+ 	Board		CPU	Last known maintainer / Comment
+.........................................................................
+	cradle		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
+	ixdp425		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
+	lubbock		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
+
+#########################################################################
+# x86 Systems:								#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Daniel Engström <daniel@omicron.se>
+
+	sc520_cdp	x86
+
+#########################################################################
+# MIPS Systems:								#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Wolfgang Denk <wd@denx.de>
+
+	incaip		MIPS32 4Kc
+	purple		MIPS64 5Kc
+
+Thomas Lange <thomas@corelatus.se>
+	dbau1x00	MIPS32 Au1000
+	gth2		MIPS32 Au1000
+
+Vlad Lungu <vlad.lungu@windriver.com>
+	qemu_mips	MIPS32
+
+Stefan Roese <sr@denx.de>
+
+	vct_xxx		MIPS32 4Kc
+
+#########################################################################
+# Nios-32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Stephan Linz <linz@li-pro.net>
+
+	DK1S10		Nios-32
+	ADNPESC1	Nios-32
+
+Scott McNutt <smcnutt@psyent.com>
+
+	DK1C20		Nios-32
+
+#########################################################################
+# Nios-II Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Scott McNutt <smcnutt@psyent.com>
+
+	PCI5441		Nios-II
+	PK1C20		Nios-II
+	EP1C20		Nios-II
+	EP1S10		Nios-II
+	EP1S40		Nios-II
+
+#########################################################################
+# MicroBlaze Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Michal Simek <monstr@monstr.eu>
+
+	microblaze-generic	MicroBlaze
+
+#########################################################################
+# Coldfire Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Hayden Fraser <Hayden.Fraser@freescale.com>
+
+	M5253EVBE	mcf52x2
+
+Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+	TASREG		MCF5249
+
+TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+	M52277EVB	mcf5227x
+	M5235EVB	mcf52x2
+	M5253DEMO	mcf52x2
+	M53017EVB	mcf532x
+	M5329EVB	mcf532x
+	M5373EVB	mcf532x
+	M54455EVB	mcf5445x
+	M5475EVB	mcf547x_8x
+	M5485EVB	mcf547x_8x
+
+#########################################################################
+# AVR32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
+
+	FAVR-32-EZKIT		AT32AP7000
+
+Mark Jackson <mpfj@mimc.co.uk>
+
+	MIMC200			AT32AP7000
+
+Alex Raimondi <alex.raimondi@miromico.ch>
+Julien May <julien.may@miromico.ch>
+
+	HAMMERHEAD		AT32AP7000
+
+Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+	ATSTK1000	AT32AP7xxx
+	ATSTK1002	AT32AP7000
+	ATSTK1003	AT32AP7001
+	ATSTK1004	AT32AP7002
+	ATSTK1006	AT32AP7000
+	ATNGW100	AT32AP7000
+
+#########################################################################
+# SuperH Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Yusuke Goda <goda.yusuke@renesas.com>
+
+	MIGO-R		SH7722
+
+Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+		  <iwamatsu.nobuhiro@renesas.com>
+
+	MS7750SE	SH7750
+	MS7722SE	SH7722
+	R7780MP		SH7780
+	R2DPlus		SH7751R
+	SH7763RDP	SH7763
+	RSK7203		SH7203
+	AP325RXA	SH7723
+
+Mark Jonas <mark.jonas@de.bosch.com>
+
+	mpr2		SH7720
+
+Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+
+	MS7720SE	SH7720
+	R0P77850011RL	SH7785
+
+#########################################################################
+# Blackfin Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board		CPU						#
+#########################################################################
+
+Mike Frysinger <vapier@gentoo.org>
+Blackfin Team <u-boot-devel@blackfin.uclinux.org>
+
+	BF518F-EZBRD	BF518
+	BF526-EZBRD	BF526
+	BF527-EZKIT	BF527
+	BF533-EZKIT	BF533
+	BF533-STAMP	BF533
+	BF537-PNAV	BF537
+	BF537-STAMP	BF537
+	BF538F-EZKIT	BF538
+	BF548-EZKIT	BF548
+	BF561-EZKIT	BF561
+
+Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
+Blackfin Team <u-boot-devel@blackfin.uclinux.org>
+
+	CM-BF527	BF527
+	CM-BF533	BF533
+	CM-BF537E	BF537
+	CM-BF537U	BF537
+	CM-BF548	BF548
+	CM-BF561	BF561
+	TCM-BF537	BF537
+
+Martin Strubel <strubel@section5.ch>
+Blackfin Team <u-boot-devel@blackfin.uclinux.org>
+
+	BF537-minotaur	BF537
+	BF537-srv1	BF537
+
+Wojtek Skulski <skulski@pas.rochester.edu>
+Benjamin Matthews <mben12@gmail.com>
+
+	BLACKSTAMP	BF532
+
+I-SYST Micromodule <support@i-syst.com>
+Blackfin Team <u-boot-devel@blackfin.uclinux.org>
+
+	IBF-DSP561	BF561
+
+#########################################################################
+# End of MAINTAINERS list						#
+#########################################################################

api/Makefile

@@ -1,9 +1,39 @@
 #
 # (C) Copyright 2007 Semihalf
 #
-# SPDX-License-Identifier:	GPL-2.0+
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundatio; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
 #
 
-obj-y += api.o api_display.o api_net.o api_storage.o
-obj-$(CONFIG_ARM) += api_platform-arm.o
-obj-$(CONFIG_PPC) += api_platform-powerpc.o
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)libapi.a
+
+COBJS-$(CONFIG_API) += api.o api_net.o api_storage.o api_platform-$(ARCH).o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend

api/api.c

@@ -3,7 +3,24 @@
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
  */
 
 #include <config.h>
@@ -19,6 +36,9 @@
 #define DEBUG
 #undef DEBUG
 
+/* U-Boot routines needed */
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
 /*****************************************************************************
  *
  * This is the API core.
@@ -536,50 +556,6 @@ static int API_env_enum(va_list ap)
 	return 0;
 }
 
-/*
- * pseudo signature:
- *
- * int API_display_get_info(int type, struct display_info *di)
- */
-static int API_display_get_info(va_list ap)
-{
-	int type;
-	struct display_info *di;
-
-	type = va_arg(ap, int);
-	di = va_arg(ap, struct display_info *);
-
-	return display_get_info(type, di);
-}
-
-/*
- * pseudo signature:
- *
- * int API_display_draw_bitmap(ulong bitmap, int x, int y)
- */
-static int API_display_draw_bitmap(va_list ap)
-{
-	ulong bitmap;
-	int x, y;
-
-	bitmap = va_arg(ap, ulong);
-	x = va_arg(ap, int);
-	y = va_arg(ap, int);
-
-	return display_draw_bitmap(bitmap, x, y);
-}
-
-/*
- * pseudo signature:
- *
- * void API_display_clear(void)
- */
-static int API_display_clear(va_list ap)
-{
-	display_clear();
-	return 0;
-}
-
 static cfp_t calls_table[API_MAXCALL] = { NULL, };
 
 /*
@@ -643,9 +619,6 @@ void api_init(void)
 	calls_table[API_ENV_GET] = &API_env_get;
 	calls_table[API_ENV_SET] = &API_env_set;
 	calls_table[API_ENV_ENUM] = &API_env_enum;
-	calls_table[API_DISPLAY_GET_INFO] = &API_display_get_info;
-	calls_table[API_DISPLAY_DRAW_BITMAP] = &API_display_draw_bitmap;
-	calls_table[API_DISPLAY_CLEAR] = &API_display_clear;
 	calls_no = API_MAXCALL;
 
 	debugf("API initialized with %d calls\n", calls_no);

api/api_display.c

@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors.
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <api_public.h>
-#include <lcd.h>
-#include <video_font.h> /* Get font width and height */
-
-/* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
-#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
-#include <bmp_logo.h>
-#endif
-
-/* TODO(clchiou): add support of video device */
-
-int display_get_info(int type, struct display_info *di)
-{
-	if (!di)
-		return API_EINVAL;
-
-	switch (type) {
-	default:
-		debug("%s: unsupport display device type: %d\n",
-				__FILE__, type);
-		return API_ENODEV;
-#ifdef CONFIG_LCD
-	case DISPLAY_TYPE_LCD:
-		di->pixel_width  = panel_info.vl_col;
-		di->pixel_height = panel_info.vl_row;
-		di->screen_rows = lcd_get_screen_rows();
-		di->screen_cols = lcd_get_screen_columns();
-		break;
-#endif
-	}
-
-	di->type = type;
-	return 0;
-}
-
-int display_draw_bitmap(ulong bitmap, int x, int y)
-{
-	if (!bitmap)
-		return API_EINVAL;
-#ifdef CONFIG_LCD
-	return lcd_display_bitmap(bitmap, x, y);
-#else
-	return API_ENODEV;
-#endif
-}
-
-void display_clear(void)
-{
-#ifdef CONFIG_LCD
-	lcd_clear();
-#endif
-}

api/api_net.c

@@ -3,7 +3,24 @@
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
  */
 
 #include <config.h>
@@ -17,6 +34,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DEBUG
 #undef DEBUG
 
+#if !defined(CONFIG_NET_MULTI)
+#error "API/net is currently only available for platforms with CONFIG_NET_MULTI"
+#endif
+
 #ifdef DEBUG
 #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
 #else

api/api_platform-arm.c

@@ -3,10 +3,28 @@
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
  *
  * This file contains routines that fetch data from ARM-dependent sources
  * (bd_info etc.)
+ *
  */
 
 #include <config.h>

api/api_platform-powerpc.c

@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2007 Semihalf
- *
- * Written by: Rafal Jaworowski <raj@semihalf.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * This file contains routines that fetch data from PowerPC-dependent sources
- * (bd_info etc.)
- */
-
-#include <config.h>
-#include <linux/types.h>
-#include <api_public.h>
-
-#include <asm/u-boot.h>
-#include <asm/global_data.h>
-
-#include "api_private.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Important notice: handling of individual fields MUST be kept in sync with
- * include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
- * need to reflect their current state and layout of structures involved!
- */
-int platform_sys_info(struct sys_info *si)
-{
-	si->clk_bus = gd->bus_clk;
-	si->clk_cpu = gd->cpu_clk;
-
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
-    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
-#define bi_bar	bi_immr_base
-#elif defined(CONFIG_MPC5xxx)
-#define bi_bar	bi_mbar_base
-#elif defined(CONFIG_MPC83xx)
-#define bi_bar	bi_immrbar
-#endif
-
-#if defined(bi_bar)
-	si->bar = gd->bd->bi_bar;
-#undef bi_bar
-#else
-	si->bar = 0;
-#endif
-
-	platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
-	platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
-	platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
-
-	return 1;
-}

api/api_platform-ppc.c

@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2007 Semihalf
+ *
+ * Written by: Rafal Jaworowski <raj@semihalf.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ *
+ * This file contains routines that fetch data from PowerPC-dependent sources
+ * (bd_info etc.)
+ *
+ */
+
+#include <config.h>
+#include <linux/types.h>
+#include <api_public.h>
+
+#include <asm/u-boot.h>
+#include <asm/global_data.h>
+
+#include "api_private.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Important notice: handling of individual fields MUST be kept in sync with
+ * include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
+ * need to reflect their current state and layout of structures involved!
+ */
+int platform_sys_info(struct sys_info *si)
+{
+	si->clk_bus = gd->bus_clk;
+	si->clk_cpu = gd->cpu_clk;
+
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \
+    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#define bi_bar	bi_immr_base
+#elif defined(CONFIG_MPC5xxx)
+#define bi_bar	bi_mbar_base
+#elif defined(CONFIG_MPC83xx)
+#define bi_bar	bi_immrbar
+#elif defined(CONFIG_MPC8220)
+#define bi_bar	bi_mbar_base
+#endif
+
+#if defined(bi_bar)
+	si->bar = gd->bd->bi_bar;
+#undef bi_bar
+#else
+	si->bar = 0;
+#endif
+
+	platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
+	platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
+	platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
+
+	return 1;
+}

api/api_private.h

@@ -3,7 +3,24 @@
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
  */
 
 #ifndef _API_PRIVATE_H_
@@ -28,8 +45,4 @@ int		dev_write_net(void *, void *, int);
 
 void dev_stor_init(void);
 
-int display_get_info(int type, struct display_info *di);
-int display_draw_bitmap(ulong bitmap, int x, int y);
-void display_clear(void);
-
 #endif /* _API_PRIVATE_H_ */

api/api_storage.c

@@ -3,7 +3,24 @@
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
  */
 
 #include <config.h>

arch/.gitignore

@@ -1,2 +0,0 @@
-/*/include/asm/arch
-/*/include/asm/proc

arch/arc/config.mk

@@ -1,33 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-ifndef CONFIG_SYS_BIG_ENDIAN
-CONFIG_SYS_LITTLE_ENDIAN = 1
-endif
-
-ifdef CONFIG_SYS_LITTLE_ENDIAN
-ARC_CROSS_COMPILE := arc-buildroot-linux-uclibc-
-endif
-
-ifdef CONFIG_SYS_BIG_ENDIAN
-ARC_CROSS_COMPILE := arceb-buildroot-linux-uclibc-
-PLATFORM_LDFLAGS += -EB
-endif
-
-ifeq ($(CROSS_COMPILE),)
-CROSS_COMPILE := $(ARC_CROSS_COMPILE)
-endif
-
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -DCONFIG_ARC -gdwarf-2
-
-# Needed for relocation
-LDFLAGS_FINAL += -pie
-
-# Load address for standalone apps
-CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000
-
-# Support generic board on ARC
-__HAVE_ARCH_GENERIC_BOARD := y

arch/arc/cpu/arc700/Makefile

@@ -1,13 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-extra-y	+= start.o
-
-obj-y	+= cache.o
-obj-y	+= cpu.o
-obj-y	+= interrupts.o
-obj-y	+= reset.o
-obj-y	+= timer.o

arch/arc/cpu/arc700/cache.c

@@ -1,138 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <asm/arcregs.h>
-
-/* Bit values in IC_CTRL */
-#define IC_CTRL_CACHE_DISABLE	(1 << 0)
-
-/* Bit values in DC_CTRL */
-#define DC_CTRL_CACHE_DISABLE	(1 << 0)
-#define DC_CTRL_INV_MODE_FLUSH	(1 << 6)
-#define DC_CTRL_FLUSH_STATUS	(1 << 8)
-
-int icache_status(void)
-{
-	return (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE) !=
-	       IC_CTRL_CACHE_DISABLE;
-}
-
-void icache_enable(void)
-{
-	write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
-		      ~IC_CTRL_CACHE_DISABLE);
-}
-
-void icache_disable(void)
-{
-	write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
-		      IC_CTRL_CACHE_DISABLE);
-}
-
-void invalidate_icache_all(void)
-{
-#ifndef CONFIG_SYS_ICACHE_OFF
-	/* Any write to IC_IVIC register triggers invalidation of entire I$ */
-	write_aux_reg(ARC_AUX_IC_IVIC, 1);
-#endif /* CONFIG_SYS_ICACHE_OFF */
-}
-
-int dcache_status(void)
-{
-	return (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE) !=
-		DC_CTRL_CACHE_DISABLE;
-}
-
-void dcache_enable(void)
-{
-	write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
-		      ~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
-}
-
-void dcache_disable(void)
-{
-	write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
-		      DC_CTRL_CACHE_DISABLE);
-}
-
-void flush_dcache_all(void)
-{
-	/* Do flush of entire cache */
-	write_aux_reg(ARC_AUX_DC_FLSH, 1);
-
-	/* Wait flush end */
-	while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
-		;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-static void dcache_flush_line(unsigned addr)
-{
-#if (CONFIG_ARC_MMU_VER > 2)
-	write_aux_reg(ARC_AUX_DC_PTAG, addr);
-#endif
-	write_aux_reg(ARC_AUX_DC_FLDL, addr);
-
-	/* Wait flush end */
-	while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
-		;
-
-#ifndef CONFIG_SYS_ICACHE_OFF
-	/*
-	 * Invalidate I$ for addresses range just flushed from D$.
-	 * If we try to execute data flushed above it will be valid/correct
-	 */
-#if (CONFIG_ARC_MMU_VER > 2)
-	write_aux_reg(ARC_AUX_IC_PTAG, addr);
-#endif
-	write_aux_reg(ARC_AUX_IC_IVIL, addr);
-#endif /* CONFIG_SYS_ICACHE_OFF */
-}
-#endif /* CONFIG_SYS_DCACHE_OFF */
-
-void flush_dcache_range(unsigned long start, unsigned long end)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
-	unsigned int addr;
-
-	start = start & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
-	end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
-
-	for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE)
-		dcache_flush_line(addr);
-#endif /* CONFIG_SYS_DCACHE_OFF */
-}
-
-void invalidate_dcache_range(unsigned long start, unsigned long end)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
-	unsigned int addr;
-
-	start = start & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
-	end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
-
-	for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
-#if (CONFIG_ARC_MMU_VER > 2)
-		write_aux_reg(ARC_AUX_DC_PTAG, addr);
-#endif
-		write_aux_reg(ARC_AUX_DC_IVDL, addr);
-	}
-#endif /* CONFIG_SYS_DCACHE_OFF */
-}
-
-void invalidate_dcache_all(void)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
-	/* Write 1 to DC_IVDC register triggers invalidation of entire D$ */
-	write_aux_reg(ARC_AUX_DC_IVDC, 1);
-#endif /* CONFIG_SYS_DCACHE_OFF */
-}
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}

arch/arc/cpu/arc700/config.mk

@@ -1,7 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS += -mA7

arch/arc/cpu/arc700/cpu.c

@@ -1,47 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arcregs.h>
-#include <asm/cache.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int arch_cpu_init(void)
-{
-#ifdef CONFIG_SYS_ICACHE_OFF
-	icache_disable();
-#else
-	icache_enable();
-	invalidate_icache_all();
-#endif
-
-	flush_dcache_all();
-#ifdef CONFIG_SYS_DCACHE_OFF
-	dcache_disable();
-#else
-	dcache_enable();
-#endif
-	timer_init();
-
-/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */
-	if ((read_aux_reg(ARC_AUX_IDENTITY) & 0xffffff00) == 0xffffff00)
-		gd->arch.running_on_hw = 0;
-	else
-		gd->arch.running_on_hw = 1;
-
-	gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
-
-	return 0;
-}
-
-int arch_early_init_r(void)
-{
-	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
-	return 0;
-}

arch/arc/cpu/arc700/interrupts.c

@@ -1,142 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arcregs.h>
-#include <asm/ptrace.h>
-
-/* Bit values in STATUS32 */
-#define E1_MASK		(1 << 1)	/* Level 1 interrupts enable */
-#define E2_MASK		(1 << 2)	/* Level 2 interrupts enable */
-
-int interrupt_init(void)
-{
-	return 0;
-}
-
-/*
- * returns true if interrupts had been enabled before we disabled them
- */
-int disable_interrupts(void)
-{
-	int status = read_aux_reg(ARC_AUX_STATUS32);
-	int state = (status | E1_MASK | E2_MASK) ? 1 : 0;
-
-	status &= ~(E1_MASK | E2_MASK);
-	/* STATUS32 register is updated indirectly with "FLAG" instruction */
-	__asm__("flag %0" : : "r" (status));
-	return state;
-}
-
-void enable_interrupts(void)
-{
-	unsigned int status = read_aux_reg(ARC_AUX_STATUS32);
-
-	status |= E1_MASK | E2_MASK;
-	/* STATUS32 register is updated indirectly with "FLAG" instruction */
-	__asm__("flag %0" : : "r" (status));
-}
-
-static void print_reg_file(long *reg_rev, int start_num)
-{
-	unsigned int i;
-
-	/* Print 3 registers per line */
-	for (i = start_num; i < start_num + 25; i++) {
-		printf("r%02u: 0x%08lx\t", i, (unsigned long)*reg_rev);
-		if (((i + 1) % 3) == 0)
-			printf("\n");
-
-		/* Because pt_regs has registers reversed */
-		reg_rev--;
-	}
-
-	/* Add new-line if none was inserted in the end of loop above */
-	if (((i + 1) % 3) != 0)
-		printf("\n");
-}
-
-void show_regs(struct pt_regs *regs)
-{
-	printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
-	       regs->ret, regs->blink, regs->status32);
-	printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
-	printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta,
-	       regs->sp, regs->fp);
-	printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start,
-	       regs->lp_end, regs->lp_count);
-
-	print_reg_file(&(regs->r0), 0);
-}
-
-void bad_mode(struct pt_regs *regs)
-{
-	if (regs)
-		show_regs(regs);
-
-	panic("Resetting CPU ...\n");
-}
-
-void do_memory_error(unsigned long address, struct pt_regs *regs)
-{
-	printf("Memory error exception @ 0x%lx\n", address);
-	bad_mode(regs);
-}
-
-void do_instruction_error(unsigned long address, struct pt_regs *regs)
-{
-	printf("Instruction error exception @ 0x%lx\n", address);
-	bad_mode(regs);
-}
-
-void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
-{
-	printf("Machine check exception @ 0x%lx\n", address);
-	bad_mode(regs);
-}
-
-void do_interrupt_handler(void)
-{
-	printf("Interrupt fired\n");
-	bad_mode(0);
-}
-
-void do_itlb_miss(struct pt_regs *regs)
-{
-	printf("I TLB miss exception\n");
-	bad_mode(regs);
-}
-
-void do_dtlb_miss(struct pt_regs *regs)
-{
-	printf("D TLB miss exception\n");
-	bad_mode(regs);
-}
-
-void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)
-{
-	printf("TLB protection violation or misaligned access @ 0x%lx\n",
-	       address);
-	bad_mode(regs);
-}
-
-void do_privilege_violation(struct pt_regs *regs)
-{
-	printf("Privilege violation exception\n");
-	bad_mode(regs);
-}
-
-void do_trap(struct pt_regs *regs)
-{
-	printf("Trap exception\n");
-	bad_mode(regs);
-}
-
-void do_extension(struct pt_regs *regs)
-{
-	printf("Extension instruction exception\n");
-	bad_mode(regs);
-}

arch/arc/cpu/arc700/reset.c

@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <command.h>
-#include <common.h>
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
-{
-	printf("Put your restart handler here\n");
-
-#ifdef DEBUG
-	/* Stop debug session here */
-	__asm__("brk");
-#endif
-	return 0;
-}

arch/arc/cpu/arc700/start.S

@@ -1,241 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <asm/arcregs.h>
-
-/*
- * Note on the LD/ST addressing modes with address register write-back
- *
- * LD.a same as LD.aw
- *
- * LD.a    reg1, [reg2, x]  => Pre Incr
- *      Eff Addr for load = [reg2 + x]
- *
- * LD.ab   reg1, [reg2, x]  => Post Incr
- *      Eff Addr for load = [reg2]
- */
-
-.macro PUSH reg
-	st.a	\reg, [%sp, -4]
-.endm
-
-.macro PUSHAX aux
-	lr	%r9, [\aux]
-	PUSH	%r9
-.endm
-
-.macro  SAVE_R1_TO_R24
-	PUSH	%r1
-	PUSH	%r2
-	PUSH	%r3
-	PUSH	%r4
-	PUSH	%r5
-	PUSH	%r6
-	PUSH	%r7
-	PUSH	%r8
-	PUSH	%r9
-	PUSH	%r10
-	PUSH	%r11
-	PUSH	%r12
-	PUSH	%r13
-	PUSH	%r14
-	PUSH	%r15
-	PUSH	%r16
-	PUSH	%r17
-	PUSH	%r18
-	PUSH	%r19
-	PUSH	%r20
-	PUSH	%r21
-	PUSH	%r22
-	PUSH	%r23
-	PUSH	%r24
-.endm
-
-.macro SAVE_ALL_SYS
-
-	st	%r0, [%sp]
-	lr	%r0, [%ecr]
-	st	%r0, [%sp, 8]	/* ECR */
-	st	%sp, [%sp, 4]
-
-	SAVE_R1_TO_R24
-	PUSH	%r25
-	PUSH	%gp
-	PUSH	%fp
-	PUSH	%blink
-	PUSHAX	%eret
-	PUSHAX	%erstatus
-	PUSH	%lp_count
-	PUSHAX	%lp_end
-	PUSHAX	%lp_start
-	PUSHAX	%erbta
-.endm
-
-.align 4
-.globl _start
-_start:
-	/* Critical system events */
-	j	reset			/* 0 - 0x000 */
-	j	memory_error		/* 1 - 0x008 */
-	j	instruction_error	/* 2 - 0x010 */
-
-	/* Device interrupts */
-.rept	29
-	j	interrupt_handler	/* 3:31 - 0x018:0xF8 */
-.endr
-	/* Exceptions */
-	j	EV_MachineCheck		/* 0x100, Fatal Machine check  (0x20) */
-	j	EV_TLBMissI		/* 0x108, Intruction TLB miss  (0x21) */
-	j	EV_TLBMissD		/* 0x110, Data TLB miss        (0x22) */
-	j	EV_TLBProtV		/* 0x118, Protection Violation (0x23)
-							or Misaligned Access  */
-	j	EV_PrivilegeV		/* 0x120, Privilege Violation  (0x24) */
-	j	EV_Trap			/* 0x128, Trap exception       (0x25) */
-	j	EV_Extension		/* 0x130, Extn Intruction Excp (0x26) */
-
-memory_error:
-	SAVE_ALL_SYS
-	lr	%r0, [%efa]
-	mov	%r1, %sp
-	j	do_memory_error
-
-instruction_error:
-	SAVE_ALL_SYS
-	lr	%r0, [%efa]
-	mov	%r1, %sp
-	j	do_instruction_error
-
-interrupt_handler:
-	/* Todo - save and restore CPU context when interrupts will be in use */
-	bl	do_interrupt_handler
-	rtie
-
-EV_MachineCheck:
-	SAVE_ALL_SYS
-	lr	%r0, [%efa]
-	mov	%r1, %sp
-	j	do_machine_check_fault
-
-EV_TLBMissI:
-	SAVE_ALL_SYS
-	mov	%r0, %sp
-	j	do_itlb_miss
-
-EV_TLBMissD:
-	SAVE_ALL_SYS
-	mov	%r0, %sp
-	j	do_dtlb_miss
-
-EV_TLBProtV:
-	SAVE_ALL_SYS
-	lr	%r0, [%efa]
-	mov	%r1, %sp
-	j	do_tlb_prot_violation
-
-EV_PrivilegeV:
-	SAVE_ALL_SYS
-	mov	%r0, %sp
-	j	do_privilege_violation
-
-EV_Trap:
-	SAVE_ALL_SYS
-	mov	%r0, %sp
-	j	do_trap
-
-EV_Extension:
-	SAVE_ALL_SYS
-	mov	%r0, %sp
-	j	do_extension
-
-
-reset:
-	/* Setup interrupt vector base that matches "__text_start" */
-	sr	__text_start, [ARC_AUX_INTR_VEC_BASE]
-
-	/* Setup stack pointer */
-	mov	%sp, CONFIG_SYS_INIT_SP_ADDR
-	mov	%fp, %sp
-
-	/* Clear bss */
-	mov	%r0, __bss_start
-	mov	%r1, __bss_end
-
-clear_bss:
-	st.ab	0, [%r0, 4]
-	brlt	%r0, %r1, clear_bss
-
-	/* Zero the one and only argument of "board_init_f" */
-	mov_s	%r0, 0
-	j	board_init_f
-
-/*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
- * r0 = start_addr_sp
- * r1 = new__gd
- * r2 = relocaddr
- */
-.align 4
-.globl	relocate_code
-relocate_code:
-	/*
-	 * r0-r12 might be clobbered by C functions
-	 * so we use r13-r16 for storage here
-	 */
-	mov	%r13, %r0		/* save addr_sp */
-	mov	%r14, %r1		/* save addr of gd */
-	mov	%r15, %r2		/* save addr of destination */
-
-	mov	%r16, %r2		/* %r9 - relocation offset */
-	sub	%r16, %r16, __image_copy_start
-
-/* Set up the stack */
-stack_setup:
-	mov	%sp, %r13
-	mov	%fp, %sp
-
-/* Check if monitor is loaded right in place for relocation */
-	mov	%r0, __image_copy_start
-	cmp	%r0, %r15		/* skip relocation if code loaded */
-	bz	do_board_init_r		/* in target location already */
-
-/* Copy data (__image_copy_start - __image_copy_end) to new location */
-	mov	%r1, %r15
-	mov	%r2, __image_copy_end
-	sub	%r2, %r2, %r0		/* r3 <- amount of bytes to copy */
-	asr	%r2, %r2, 2		/* r3 <- amount of words to copy */
-	mov	%lp_count, %r2
-	lp	copy_end
-	ld.ab	%r2,[%r0,4]
-	st.ab	%r2,[%r1,4]
-copy_end:
-
-/* Fix relocations related issues */
-	bl	do_elf_reloc_fixups
-#ifndef CONFIG_SYS_ICACHE_OFF
-	bl	invalidate_icache_all
-#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
-	bl	flush_dcache_all
-#endif
-
-/* Update position of intterupt vector table */
-	lr	%r0, [ARC_AUX_INTR_VEC_BASE]	/* Read current position */
-	add	%r0, %r0, %r16			/* Update address */
-	sr	%r0, [ARC_AUX_INTR_VEC_BASE]	/* Write new position */
-
-do_board_init_r:
-/* Prepare for exection of "board_init_r" in relocated monitor */
-	mov	%r2, board_init_r	/* old address of "board_init_r()" */
-	add	%r2, %r2, %r16		/* new address of "board_init_r()" */
-	mov	%r0, %r14		/* 1-st parameter: gd_t */
-	mov	%r1, %r15		/* 2-nd parameter: dest_addr */
-	j	[%r2]

arch/arc/cpu/arc700/timer.c

@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm/arcregs.h>
-
-#define NH_MODE	(1 << 1)	/* Disable timer if CPU is halted */
-
-int timer_init(void)
-{
-	write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
-	/* Set max value for counter/timer */
-	write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
-	/* Set initial count value and restart counter/timer */
-	write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
-	return 0;
-}
-
-unsigned long timer_read_counter(void)
-{
-	return read_aux_reg(ARC_AUX_TIMER0_CNT);
-}

arch/arc/cpu/arc700/u-boot.lds

@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
-OUTPUT_ARCH(arc)
-ENTRY(_start)
-SECTIONS
-{
-	. = ALIGN(4);
-	.text :	{
-		*(.__text_start)
-		*(.__image_copy_start)
-		CPUDIR/start.o (.text*)
-		*(.text*)
-	}
-
-	. = ALIGN(4);
-	.text_end :
-	{
-		*(.__text_end)
-	}
-
-	. = ALIGN(4);
-	.rodata : {
-		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-	}
-
-	. = ALIGN(4);
-	.data : {
-		*(.data*)
-	}
-
-	. = ALIGN(4);
-	.u_boot_list : {
-		KEEP(*(SORT(.u_boot_list*)));
-	}
-
-	. = ALIGN(4);
-	.rel_dyn_start : {
-		*(.__rel_dyn_start)
-	}
-
-	.rela.dyn : {
-		*(.rela.dyn)
-	}
-
-	.rel_dyn_end : {
-		*(.__rel_dyn_end)
-	}
-
-	. = ALIGN(4);
-	.bss_start : {
-		*(.__bss_start);
-	}
-
-	.bss : {
-		*(.bss*)
-	}
-
-	.bss_end : {
-		*(.__bss_end);
-	}
-
-	. = ALIGN(4);
-	.image_copy_end : {
-		*(.__image_copy_end)
-		*(.__init_end)
-	}
-}

arch/arc/include/asm/arcregs.h

@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _ASM_ARC_ARCREGS_H
-#define _ASM_ARC_ARCREGS_H
-
-/*
- * ARC architecture has additional address space - auxiliary registers.
- * These registers are mostly used for configuration purposes.
- * These registers are not memory mapped and special commands are used for
- * access: "lr"/"sr".
- */
-
-#define ARC_AUX_IDENTITY	0x04
-#define ARC_AUX_STATUS32	0x0a
-
-/* Instruction cache related auxiliary registers */
-#define ARC_AUX_IC_IVIC		0x10
-#define ARC_AUX_IC_CTRL		0x11
-#define ARC_AUX_IC_IVIL		0x19
-#if (CONFIG_ARC_MMU_VER > 2)
-#define ARC_AUX_IC_PTAG		0x1E
-#endif
-
-/* Timer related auxiliary registers */
-#define ARC_AUX_TIMER0_CNT	0x21	/* Timer 0 count */
-#define ARC_AUX_TIMER0_CTRL	0x22	/* Timer 0 control */
-#define ARC_AUX_TIMER0_LIMIT	0x23	/* Timer 0 limit */
-
-#define ARC_AUX_INTR_VEC_BASE	0x25
-
-/* Data cache related auxiliary registers */
-#define ARC_AUX_DC_IVDC		0x47
-#define ARC_AUX_DC_CTRL		0x48
-
-#define ARC_AUX_DC_IVDL		0x4A
-#define ARC_AUX_DC_FLSH		0x4B
-#define ARC_AUX_DC_FLDL		0x4C
-#if (CONFIG_ARC_MMU_VER > 2)
-#define ARC_AUX_DC_PTAG		0x5C
-#endif
-
-#ifndef __ASSEMBLY__
-/* Accessors for auxiliary registers */
-#define read_aux_reg(reg)	__builtin_arc_lr(reg)
-
-/* gcc builtin sr needs reg param to be long immediate */
-#define write_aux_reg(reg_immed, val)		\
-		__builtin_arc_sr((unsigned int)val, reg_immed)
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_ARC_ARCREGS_H */

arch/arc/include/asm/bitops.h

@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_BITOPS_H
-#define __ASM_ARC_BITOPS_H
-
-/*
- * hweightN: returns the hamming weight (i.e. the number
- * of bits set) of a N-bit word
- */
-
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
-
-#endif /* __ASM_ARC_BITOPS_H */

arch/arc/include/asm/byteorder.h

@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_BYTEORDER_H
-#define __ASM_ARC_BYTEORDER_H
-
-#include <asm/types.h>
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-	#define __BYTEORDER_HAS_U64__
-	#define __SWAB_64_THRU_32__
-#endif
-
-#ifdef __LITTLE_ENDIAN__
-	#include <linux/byteorder/little_endian.h>
-#else
-	#include <linux/byteorder/big_endian.h>
-#endif	/* CONFIG_SYS_BIG_ENDIAN */
-
-#endif	/* ASM_ARC_BYTEORDER_H */

arch/arc/include/asm/cache.h

@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_CACHE_H
-#define __ASM_ARC_CACHE_H
-
-#include <config.h>
-
-/*
- * The current upper bound for ARC L1 data cache line sizes is 128 bytes.
- * We use that value for aligning DMA buffers unless the board config has
- * specified an alternate cache line size.
- */
-#ifdef CONFIG_SYS_CACHELINE_SIZE
-#define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
-#else
-#define ARCH_DMA_MINALIGN	128
-#endif
-
-#endif /* __ASM_ARC_CACHE_H */

arch/arc/include/asm/config.h

@@ -1,12 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_CONFIG_H_
-#define __ASM_ARC_CONFIG_H_
-
-#define CONFIG_LMB
-
-#endif /*__ASM_ARC_CONFIG_H_ */

arch/arc/include/asm/global_data.h

@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef	__ASM_ARC_GLOBAL_DATA_H
-#define __ASM_ARC_GLOBAL_DATA_H
-
-/* Architecture-specific global data */
-struct arch_global_data {
-	int running_on_hw;
-};
-
-#include <asm-generic/global_data.h>
-
-#define DECLARE_GLOBAL_DATA_PTR		register volatile gd_t *gd asm ("r25")
-
-#endif /* __ASM_ARC_GLOBAL_DATA_H */

arch/arc/include/asm/io.h

@@ -1,218 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_IO_H
-#define __ASM_ARC_IO_H
-
-#include <linux/types.h>
-#include <asm/byteorder.h>
-
-static inline void sync(void)
-{
-	/* Not yet implemented */
-}
-
-static inline u8 __raw_readb(const volatile void __iomem *addr)
-{
-	u8 b;
-
-	__asm__ __volatile__("ldb%U1	%0, %1\n"
-			     : "=r" (b)
-			     : "m" (*(volatile u8 __force *)addr)
-			     : "memory");
-	return b;
-}
-
-static inline u16 __raw_readw(const volatile void __iomem *addr)
-{
-	u16 s;
-
-	__asm__ __volatile__("ldw%U1	%0, %1\n"
-			     : "=r" (s)
-			     : "m" (*(volatile u16 __force *)addr)
-			     : "memory");
-	return s;
-}
-
-static inline u32 __raw_readl(const volatile void __iomem *addr)
-{
-	u32 w;
-
-	__asm__ __volatile__("ld%U1	%0, %1\n"
-			     : "=r" (w)
-			     : "m" (*(volatile u32 __force *)addr)
-			     : "memory");
-	return w;
-}
-
-#define readb __raw_readb
-
-static inline u16 readw(const volatile void __iomem *addr)
-{
-	return __le16_to_cpu(__raw_readw(addr));
-}
-
-static inline u32 readl(const volatile void __iomem *addr)
-{
-	return __le32_to_cpu(__raw_readl(addr));
-}
-
-static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
-{
-	__asm__ __volatile__("stb%U1	%0, %1\n"
-			     :
-			     : "r" (b), "m" (*(volatile u8 __force *)addr)
-			     : "memory");
-}
-
-static inline void __raw_writew(u16 s, volatile void __iomem *addr)
-{
-	__asm__ __volatile__("stw%U1	%0, %1\n"
-			     :
-			     : "r" (s), "m" (*(volatile u16 __force *)addr)
-			     : "memory");
-}
-
-static inline void __raw_writel(u32 w, volatile void __iomem *addr)
-{
-	__asm__ __volatile__("st%U1	%0, %1\n"
-			     :
-			     : "r" (w), "m" (*(volatile u32 __force *)addr)
-			     : "memory");
-}
-
-#define writeb __raw_writeb
-#define writew(b, addr) __raw_writew(__cpu_to_le16(b), addr)
-#define writel(b, addr) __raw_writel(__cpu_to_le32(b), addr)
-
-static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)
-{
-	__asm__ __volatile__ ("1:ld.di	r8, [r0]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "stb.ab	r8, [r1, 1]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (bytelen)
-			      : "r8");
-	return bytelen;
-}
-
-static inline int __raw_readsw(unsigned int addr, void *data, int wordlen)
-{
-	__asm__ __volatile__ ("1:ld.di	r8, [r0]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "stw.ab	r8, [r1, 2]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (wordlen)
-			      : "r8");
-	return wordlen;
-}
-
-static inline int __raw_readsl(unsigned int addr, void *data, int longlen)
-{
-	__asm__ __volatile__ ("1:ld.di	r8, [r0]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "st.ab	r8, [r1, 4]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (longlen)
-			      : "r8");
-	return longlen;
-}
-
-static inline int __raw_writesb(unsigned int addr, void *data, int bytelen)
-{
-	__asm__ __volatile__ ("1:ldb.ab	r8, [r1, 1]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "st.di	r8, [r0, 0]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (bytelen)
-			      : "r8");
-	return bytelen;
-}
-
-static inline int __raw_writesw(unsigned int addr, void *data, int wordlen)
-{
-	__asm__ __volatile__ ("1:ldw.ab	r8, [r1, 2]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "st.ab.di	r8, [r0, 0]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (wordlen)
-			      : "r8");
-	return wordlen;
-}
-
-static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
-{
-	__asm__ __volatile__ ("1:ld.ab	r8, [r1, 4]\n"
-			      "sub.f	r2, r2, 1\n"
-			      "bnz.d	1b\n"
-			      "st.ab.di	r8, [r0, 0]\n"
-			      :
-			      : "r" (addr), "r" (data), "r" (longlen)
-			      : "r8");
-	return longlen;
-}
-
-#define out_arch(type, endian, a, v)	__raw_write##type(cpu_to_##endian(v), a)
-#define in_arch(type, endian, a)	endian##_to_cpu(__raw_read##type(a))
-
-#define out_le32(a, v)	out_arch(l, le32, a, v)
-#define out_le16(a, v)	out_arch(w, le16, a, v)
-
-#define in_le32(a)	in_arch(l, le32, a)
-#define in_le16(a)	in_arch(w, le16, a)
-
-#define out_be32(a, v)	out_arch(l, be32, a, v)
-#define out_be16(a, v)	out_arch(w, be16, a, v)
-
-#define in_be32(a)	in_arch(l, be32, a)
-#define in_be16(a)	in_arch(w, be16, a)
-
-#define out_8(a, v)	__raw_writeb(v, a)
-#define in_8(a)		__raw_readb(a)
-
-/*
- * Clear and set bits in one shot. These macros can be used to clear and
- * set multiple bits in a register using a single call. These macros can
- * also be used to set a multiple-bit bit pattern using a mask, by
- * specifying the mask in the 'clear' parameter and the new bit pattern
- * in the 'set' parameter.
- */
-
-#define clrbits(type, addr, clear) \
-	out_##type((addr), in_##type(addr) & ~(clear))
-
-#define setbits(type, addr, set) \
-	out_##type((addr), in_##type(addr) | (set))
-
-#define clrsetbits(type, addr, clear, set) \
-	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
-
-#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
-#define setbits_be32(addr, set) setbits(be32, addr, set)
-#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
-
-#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
-#define setbits_le32(addr, set) setbits(le32, addr, set)
-#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
-
-#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
-#define setbits_be16(addr, set) setbits(be16, addr, set)
-#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
-
-#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
-#define setbits_le16(addr, set) setbits(le16, addr, set)
-#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
-
-#define clrbits_8(addr, clear) clrbits(8, addr, clear)
-#define setbits_8(addr, set) setbits(8, addr, set)
-#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
-
-#endif	/* __ASM_ARC_IO_H */

arch/arc/include/asm/posix_types.h

@@ -1,39 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_POSIX_TYPES_H
-#define __ASM_ARC_POSIX_TYPES_H
-
-typedef unsigned short		__kernel_dev_t;
-typedef unsigned long		__kernel_ino_t;
-typedef unsigned short		__kernel_mode_t;
-typedef unsigned short		__kernel_nlink_t;
-typedef long			__kernel_off_t;
-typedef int			__kernel_pid_t;
-typedef unsigned short		__kernel_ipc_pid_t;
-typedef unsigned short		__kernel_uid_t;
-typedef unsigned short		__kernel_gid_t;
-typedef unsigned int		__kernel_size_t;
-typedef int			__kernel_ssize_t;
-typedef int			__kernel_ptrdiff_t;
-typedef long			__kernel_time_t;
-typedef long			__kernel_suseconds_t;
-typedef long			__kernel_clock_t;
-typedef int			__kernel_daddr_t;
-typedef char			*__kernel_caddr_t;
-typedef unsigned short		__kernel_uid16_t;
-typedef unsigned short		__kernel_gid16_t;
-typedef unsigned int		__kernel_uid32_t;
-typedef unsigned int		__kernel_gid32_t;
-
-typedef unsigned short		__kernel_old_uid_t;
-typedef unsigned short		__kernel_old_gid_t;
-
-#ifdef __GNUC__
-typedef long long		__kernel_loff_t;
-#endif
-
-#endif	/* __ASM_ARC_POSIX_TYPES_H */

arch/arc/include/asm/ptrace.h

@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_PTRACE_H
-#define __ASM_ARC_PTRACE_H
-
-struct pt_regs {
-	long bta;
-	long lp_start;
-	long lp_end;
-	long lp_count;
-	long status32;
-	long ret;
-	long blink;
-	long fp;
-	long r26;	/* gp */
-	long r25;
-	long r24;
-	long r23;
-	long r22;
-	long r21;
-	long r20;
-	long r19;
-	long r18;
-	long r17;
-	long r16;
-	long r15;
-	long r14;
-	long r13;
-	long r12;
-	long r11;
-	long r10;
-	long r9;
-	long r8;
-	long r7;
-	long r6;
-	long r5;
-	long r4;
-	long r3;
-	long r2;
-	long r1;
-	long r0;
-	long sp;
-	long ecr;
-};
-
-#endif /* __ASM_ARC_PTRACE_H */

arch/arc/include/asm/sections.h

@@ -1,14 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_SECTIONS_H
-#define __ASM_ARC_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-extern ulong __text_end;
-
-#endif /* __ASM_ARC_SECTIONS_H */

arch/arc/include/asm/string.h

@@ -1,27 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_STRING_H
-#define __ASM_ARC_STRING_H
-
-#define __HAVE_ARCH_MEMSET
-#define __HAVE_ARCH_MEMCPY
-#define __HAVE_ARCH_MEMCMP
-#define __HAVE_ARCH_STRCHR
-#define __HAVE_ARCH_STRCPY
-#define __HAVE_ARCH_STRCMP
-#define __HAVE_ARCH_STRLEN
-
-extern void *memset(void *ptr, int, __kernel_size_t);
-extern void *memcpy(void *, const void *, __kernel_size_t);
-extern void memzero(void *ptr, __kernel_size_t n);
-extern int memcmp(const void *, const void *, __kernel_size_t);
-extern char *strchr(const char *s, int c);
-extern char *strcpy(char *dest, const char *src);
-extern int strcmp(const char *cs, const char *ct);
-extern __kernel_size_t strlen(const char *);
-
-#endif /* __ASM_ARC_STRING_H */

arch/arc/include/asm/types.h

@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_TYPES_H
-#define __ASM_ARC_TYPES_H
-
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32
-
-/* Dma addresses are 32-bits wide. */
-
-typedef u32 dma_addr_t;
-
-typedef unsigned long phys_addr_t;
-typedef unsigned long phys_size_t;
-
-#endif /* __ASM_ARC_TYPES_H */

arch/arc/include/asm/u-boot-arc.h

@@ -1,12 +0,0 @@
-/*
- * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_U_BOOT_ARC_H__
-#define __ASM_ARC_U_BOOT_ARC_H__
-
-int arch_early_init_r(void);
-
-#endif	/* __ASM_ARC_U_BOOT_ARC_H__ */

arch/arc/include/asm/u-boot.h

@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARC_U_BOOT_H__
-#define __ASM_ARC_U_BOOT_H__
-
-#include <asm-generic/u-boot.h>
-
-/* For image.h:image_check_target_arch() */
-#define IH_ARCH_DEFAULT IH_ARCH_ARC
-
-#endif	/* __ASM_ARC_U_BOOT_H__ */

arch/arc/include/asm/unaligned.h

@@ -1 +0,0 @@
-#include <asm-generic/unaligned.h>

arch/arc/lib/Makefile

@@ -1,16 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y += sections.o
-obj-y += relocate.o
-obj-y += strchr-700.o
-obj-y += strcmp.o
-obj-y += strcpy-700.o
-obj-y += strlen.o
-obj-y += memcmp.o
-obj-y += memcpy-700.o
-obj-y += memset.o
-obj-$(CONFIG_CMD_BOOTM) += bootm.o

arch/arc/lib/bootm.c

@@ -1,106 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static ulong get_sp(void)
-{
-	ulong ret;
-
-	asm("mov %0, sp" : "=r"(ret) : );
-	return ret;
-}
-
-void arch_lmb_reserve(struct lmb *lmb)
-{
-	ulong sp;
-
-	/*
-	 * Booting a (Linux) kernel image
-	 *
-	 * Allocate space for command line and board info - the
-	 * address should be as high as possible within the reach of
-	 * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
-	 * memory, which means far enough below the current stack
-	 * pointer.
-	 */
-	sp = get_sp();
-	debug("## Current stack ends at 0x%08lx ", sp);
-
-	/* adjust sp by 4K to be safe */
-	sp -= 4096;
-	lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
-}
-
-static int cleanup_before_linux(void)
-{
-	disable_interrupts();
-	flush_dcache_all();
-	invalidate_icache_all();
-
-	return 0;
-}
-
-/* Subcommand: PREP */
-static void boot_prep_linux(bootm_headers_t *images)
-{
-	if (image_setup_linux(images))
-		hang();
-}
-
-/* Subcommand: GO */
-static void boot_jump_linux(bootm_headers_t *images, int flag)
-{
-	void (*kernel_entry)(int zero, int arch, uint params);
-	unsigned int r0, r2;
-	int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
-
-	kernel_entry = (void (*)(int, int, uint))images->ep;
-
-	debug("## Transferring control to Linux (at address %08lx)...\n",
-	      (ulong) kernel_entry);
-	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
-
-	printf("\nStarting kernel ...%s\n\n", fake ?
-	       "(fake run for tracing)" : "");
-	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
-
-	cleanup_before_linux();
-
-	if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
-		r0 = 2;
-		r2 = (unsigned int)images->ft_addr;
-	} else {
-		r0 = 1;
-		r2 = (unsigned int)getenv("bootargs");
-	}
-
-	if (!fake)
-		kernel_entry(r0, 0, r2);
-}
-
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
-{
-	/* No need for those on ARC */
-	if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
-		return -1;
-
-	if (flag & BOOTM_STATE_OS_PREP) {
-		boot_prep_linux(images);
-		return 0;
-	}
-
-	if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
-		boot_jump_linux(images, flag);
-		return 0;
-	}
-
-	boot_prep_linux(images);
-	boot_jump_linux(images, flag);
-	return 0;
-}

arch/arc/lib/memcmp.S

@@ -1,121 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifdef __LITTLE_ENDIAN__
-#define WORD2 r2
-#define SHIFT r3
-#else /* __BIG_ENDIAN__ */
-#define WORD2 r3
-#define SHIFT r2
-#endif /* _ENDIAN__ */
-
-.global memcmp
-.align 4
-memcmp:
-	or	%r12, %r0, %r1
-	asl_s	%r12, %r12, 30
-	sub	%r3, %r2, 1
-	brls	%r2, %r12, .Lbytewise
-	ld	%r4, [%r0, 0]
-	ld	%r5, [%r1, 0]
-	lsr.f	%lp_count, %r3, 3
-	lpne	.Loop_end
-	ld_s	WORD2, [%r0, 4]
-	ld_s	%r12, [%r1, 4]
-	brne	%r4, %r5, .Leven
-	ld.a	%r4, [%r0, 8]
-	ld.a	%r5, [%r1, 8]
-	brne	WORD2, %r12, .Lodd
-.Loop_end:
-	asl_s	SHIFT, SHIFT, 3
-	bhs_s	.Last_cmp
-	brne	%r4, %r5, .Leven
-	ld	%r4, [%r0, 4]
-	ld	%r5, [%r1, 4]
-#ifdef __LITTLE_ENDIAN__
-	nop_s
-	/* one more load latency cycle */
-.Last_cmp:
-	xor	%r0, %r4, %r5
-	bset	%r0, %r0, SHIFT
-	sub_s	%r1, %r0, 1
-	bic_s	%r1, %r1, %r0
-	norm	%r1, %r1
-	b.d	.Leven_cmp
-	and	%r1, %r1, 24
-.Leven:
-	xor	%r0, %r4, %r5
-	sub_s	%r1, %r0, 1
-	bic_s	%r1, %r1, %r0
-	norm	%r1, %r1
-	/* slow track insn */
-	and	%r1, %r1, 24
-.Leven_cmp:
-	asl	%r2, %r4, %r1
-	asl	%r12, %r5, %r1
-	lsr_s	%r2, %r2, 1
-	lsr_s	%r12, %r12, 1
-	j_s.d	[%blink]
-	sub	%r0, %r2, %r12
-	.balign	4
-.Lodd:
-	xor	%r0, WORD2, %r12
-	sub_s	%r1, %r0, 1
-	bic_s	%r1, %r1, %r0
-	norm	%r1, %r1
-	/* slow track insn */
-	and	%r1, %r1, 24
-	asl_s	%r2, %r2, %r1
-	asl_s	%r12, %r12, %r1
-	lsr_s	%r2, %r2, 1
-	lsr_s	%r12, %r12, 1
-	j_s.d	[%blink]
-	sub	%r0, %r2, %r12
-#else /* __BIG_ENDIAN__ */
-.Last_cmp:
-	neg_s	SHIFT, SHIFT
-	lsr	%r4, %r4, SHIFT
-	lsr	%r5, %r5, SHIFT
-	/* slow track insn */
-.Leven:
-	sub.f	%r0, %r4, %r5
-	mov.ne	%r0, 1
-	j_s.d	[%blink]
-	bset.cs	%r0, %r0, 31
-.Lodd:
-	cmp_s	WORD2, %r12
-
-	mov_s	%r0, 1
-	j_s.d	[%blink]
-	bset.cs	%r0, %r0, 31
-#endif /* _ENDIAN__ */
-	.balign	4
-.Lbytewise:
-	breq	%r2, 0, .Lnil
-	ldb	%r4, [%r0, 0]
-	ldb	%r5, [%r1, 0]
-	lsr.f	%lp_count, %r3
-	lpne	.Lbyte_end
-	ldb_s	%r3, [%r0, 1]
-	ldb	%r12, [%r1, 1]
-	brne	%r4, %r5, .Lbyte_even
-	ldb.a	%r4, [%r0, 2]
-	ldb.a	%r5, [%r1, 2]
-	brne	%r3, %r12, .Lbyte_odd
-.Lbyte_end:
-	bcc	.Lbyte_even
-	brne	%r4, %r5, .Lbyte_even
-	ldb_s	%r3, [%r0, 1]
-	ldb_s	%r12, [%r1, 1]
-.Lbyte_odd:
-	j_s.d	[%blink]
-	sub	%r0, %r3, %r12
-.Lbyte_even:
-	j_s.d	[%blink]
-	sub	%r0, %r4, %r5
-.Lnil:
-	j_s.d	[%blink]
-	mov	%r0, 0

arch/arc/lib/memcpy-700.S

@@ -1,63 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-.global memcpy
-.align 4
-memcpy:
-	or	%r3, %r0, %r1
-	asl_s	%r3, %r3, 30
-	mov_s	%r5, %r0
-	brls.d	%r2, %r3, .Lcopy_bytewise
-	sub.f	%r3, %r2, 1
-	ld_s	%r12, [%r1, 0]
-	asr.f	%lp_count, %r3, 3
-	bbit0.d	%r3, 2, .Lnox4
-	bmsk_s	%r2, %r2, 1
-	st.ab	%r12, [%r5, 4]
-	ld.a	%r12, [%r1, 4]
-.Lnox4:
-	lppnz	.Lendloop
-	ld_s	%r3, [%r1, 4]
-	st.ab	%r12, [%r5, 4]
-	ld.a	%r12, [%r1, 8]
-	st.ab	%r3, [%r5, 4]
-.Lendloop:
-	breq	%r2, 0, .Last_store
-	ld	%r3, [%r5, 0]
-#ifdef __LITTLE_ENDIAN__
-	add3	%r2, -1, %r2
-	/* uses long immediate */
-	xor_s	%r12, %r12, %r3
-	bmsk	%r12, %r12, %r2
-	xor_s	%r12, %r12, %r3
-#else /* __BIG_ENDIAN__ */
-	sub3	%r2, 31, %r2
-	/* uses long immediate */
-	xor_s	%r3, %r3, %r12
-	bmsk	%r3, %r3, %r2
-	xor_s	%r12, %r12, %r3
-#endif /* _ENDIAN__ */
-.Last_store:
-	j_s.d	[%blink]
-	st	%r12, [%r5, 0]
-
-	.balign	4
-.Lcopy_bytewise:
-	jcs	[%blink]
-	ldb_s	%r12, [%r1, 0]
-	lsr.f	%lp_count, %r3
-	bhs_s	.Lnox1
-	stb.ab	%r12, [%r5, 1]
-	ldb.a	%r12, [%r1, 1]
-.Lnox1:
-	lppnz	.Lendbloop
-	ldb_s	%r3, [%r1, 1]
-	stb.ab	%r12, [%r5, 1]
-	ldb.a	%r12, [%r1, 2]
-	stb.ab	%r3, [%r5, 1]
-.Lendbloop:
-	j_s.d	[%blink]
-	stb	%r12, [%r5, 0]

arch/arc/lib/memset.S

@@ -1,62 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#define SMALL	7 /* Must be at least 6 to deal with alignment/loop issues.  */
-
-.global memset
-.align 4
-memset:
-	mov_s	%r4, %r0
-	or	%r12, %r0, %r2
-	bmsk.f	%r12, %r12, 1
-	extb_s	%r1, %r1
-	asl	%r3, %r1, 8
-	beq.d	.Laligned
-	or_s	%r1, %r1, %r3
-	brls	%r2, SMALL, .Ltiny
-	add	%r3, %r2, %r0
-	stb	%r1, [%r3, -1]
-	bclr_s	%r3, %r3, 0
-	stw	%r1, [%r3, -2]
-	bmsk.f	%r12, %r0, 1
-	add_s	%r2, %r2, %r12
-	sub.ne	%r2, %r2, 4
-	stb.ab	%r1, [%r4, 1]
-	and	%r4, %r4, -2
-	stw.ab	%r1, [%r4, 2]
-	and	%r4, %r4, -4
-
-	.balign	4
-.Laligned:
-	asl	%r3, %r1, 16
-	lsr.f	%lp_count, %r2, 2
-	or_s	%r1, %r1, %r3
-	lpne	.Loop_end
-	st.ab	%r1, [%r4, 4]
-.Loop_end:
-	j_s	[%blink]
-
-	.balign	4
-.Ltiny:
-	mov.f	%lp_count, %r2
-	lpne	.Ltiny_end
-	stb.ab	%r1, [%r4, 1]
-.Ltiny_end:
-	j_s	[%blink]
-
-/*
- * memzero: @r0 = mem, @r1 = size_t
- * memset:  @r0 = mem, @r1 = char, @r2 = size_t
- */
-
-.global memzero
-.align 4
-memzero:
-	/* adjust bzero args to memset args */
-	mov	%r2, %r1
-	mov	%r1, 0
-	/* tail call so need to tinker with blink */
-	b	memset

arch/arc/lib/relocate.c

@@ -1,76 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <elf.h>
-#include <asm/sections.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Base functionality is taken from x86 version with added ARC-specifics
- */
-int do_elf_reloc_fixups(void)
-{
-	Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
-	Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
-
-	Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
-	Elf32_Addr *offset_ptr_ram;
-
-	do {
-		/* Get the location from the relocation entry */
-		offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
-
-		/* Check that the location of the relocation is in .text */
-		if (offset_ptr_rom >= (Elf32_Addr *)CONFIG_SYS_TEXT_BASE &&
-		    offset_ptr_rom > last_offset) {
-			unsigned int val;
-			/* Switch to the in-RAM version */
-			offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
-							gd->reloc_off);
-
-			/*
-			 * Use "memcpy" because target location might be
-			 * 16-bit aligned on ARC so we may need to read
-			 * byte-by-byte. On attempt to read entire word by
-			 * CPU throws an exception
-			 */
-			memcpy(&val, offset_ptr_ram, sizeof(int));
-
-#ifdef __LITTLE_ENDIAN__
-			/* If location in ".text" section swap value */
-			if ((unsigned int)offset_ptr_rom <
-			    (unsigned int)&__text_end)
-				val = (val << 16) | (val >> 16);
-#endif
-
-			/* Check that the target points into .text */
-			if (val >= CONFIG_SYS_TEXT_BASE && val <=
-			    (unsigned int)&__bss_end) {
-				val += gd->reloc_off;
-#ifdef __LITTLE_ENDIAN__
-				/* If location in ".text" section swap value */
-				if ((unsigned int)offset_ptr_rom <
-				    (unsigned int)&__text_end)
-					val = (val << 16) | (val >> 16);
-#endif
-				memcpy(offset_ptr_ram, &val, sizeof(int));
-			} else {
-				debug("   %p: rom reloc %x, ram %p, value %x, limit %x\n",
-				      re_src, re_src->r_offset, offset_ptr_ram,
-				      val, (unsigned int)&__bss_end);
-			}
-		} else {
-			debug("   %p: rom reloc %x, last %p\n", re_src,
-			      re_src->r_offset, last_offset);
-		}
-		last_offset = offset_ptr_rom;
-
-	} while (++re_src < re_end);
-
-	return 0;
-}

arch/arc/lib/sections.c

@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * For some reason linker sets linker-generated symbols to zero in PIE mode.
- * A work-around is substitution of linker-generated symbols with
- * compiler-generated symbols which are properly handled by linker in PAE mode.
- */
-
-char __bss_start[0] __attribute__((section(".__bss_start")));
-char __bss_end[0] __attribute__((section(".__bss_end")));
-char __image_copy_start[0] __attribute__((section(".__image_copy_start")));
-char __image_copy_end[0] __attribute__((section(".__image_copy_end")));
-char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));
-char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
-char __text_start[0] __attribute__((section(".__text_start")));
-char __text_end[0] __attribute__((section(".__text_end")));
-char __init_end[0] __attribute__((section(".__init_end")));

arch/arc/lib/strchr-700.S

@@ -1,141 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * ARC700 has a relatively long pipeline and branch prediction, so we want
- * to avoid branches that are hard to predict.  On the other hand, the
- * presence of the norm instruction makes it easier to operate on whole
- * words branch-free.
- */
-
-.global strchr
-.align 4
-strchr:
-	extb_s	%r1, %r1
-	asl	%r5, %r1, 8
-	bmsk	%r2, %r0, 1
-	or	%r5, %r5, %r1
-	mov_s	%r3, 0x01010101
-	breq.d	%r2, %r0, .Laligned
-	asl	%r4, %r5, 16
-	sub_s	%r0, %r0, %r2
-	asl	%r7, %r2, 3
-	ld_s	%r2, [%r0]
-#ifdef __LITTLE_ENDIAN__
-	asl	%r7, %r3, %r7
-#else /* __BIG_ENDIAN__ */
-	lsr	%r7, %r3, %r7
-#endif /* _ENDIAN__ */
-	or	%r5, %r5, %r4
-	ror	%r4, %r3
-	sub	%r12, %r2, %r7
-	bic_s	%r12, %r12, %r2
-	and	%r12, %r12, %r4
-	brne.d	%r12, 0, .Lfound0_ua
-	xor	%r6, %r2, %r5
-	ld.a	%r2, [%r0, 4]
-	sub	%r12, %r6, %r7
-	bic	%r12, %r12, %r6
-#ifdef __LITTLE_ENDIAN__
-	and	%r7, %r12, %r4
-	/* For speed, we want this branch to be unaligned. */
-	breq	%r7, 0, .Loop
-	/* Likewise this one */
-	b	.Lfound_char
-#else /* __BIG_ENDIAN__ */
-	and	%r12, %r12, %r4
-	/* For speed, we want this branch to be unaligned. */
-	breq	%r12, 0, .Loop
-	lsr_s	%r12, %r12, 7
-	bic 	%r2, %r7, %r6
-	b.d	.Lfound_char_b
-	and_s	%r2, %r2, %r12
-#endif /* _ENDIAN__ */
-	/* We require this code address to be unaligned for speed...  */
-.Laligned:
-	ld_s	%r2, [%r0]
-	or	%r5, %r5, %r4
-	ror	%r4, %r3
-	/* ... so that this code address is aligned, for itself and ...  */
-.Loop:
-	sub	%r12, %r2, %r3
-	bic_s	%r12, %r12, %r2
-	and	%r12, %r12, %r4
-	brne.d	%r12, 0, .Lfound0
-	xor	%r6, %r2, %r5
-	ld.a	%r2, [%r0, 4]
-	sub	%r12, %r6, %r3
-	bic	%r12, %r12, %r6
-	and	%r7, %r12, %r4
-	breq	%r7, 0, .Loop
-	/*
-	 *... so that this branch is unaligned.
-	 * Found searched-for character.
-	 * r0 has already advanced to next word.
-	 */
-#ifdef __LITTLE_ENDIAN__
-	/*
-	 * We only need the information about the first matching byte
-	 * (i.e. the least significant matching byte) to be exact,
-	 * hence there is no problem with carry effects.
-	 */
-.Lfound_char:
-	sub	%r3, %r7, 1
-	bic	%r3, %r3, %r7
-	norm	%r2, %r3
-	sub_s	%r0, %r0, 1
-	asr_s	%r2, %r2, 3
-	j.d	[%blink]
-	sub_s	%r0, %r0, %r2
-
-	.balign	4
-.Lfound0_ua:
-	mov	%r3, %r7
-.Lfound0:
-	sub	%r3, %r6, %r3
-	bic	%r3, %r3, %r6
-	and	%r2, %r3, %r4
-	or_s	%r12, %r12, %r2
-	sub_s	%r3, %r12, 1
-	bic_s	%r3, %r3, %r12
-	norm	%r3, %r3
-	add_s	%r0, %r0, 3
-	asr_s	%r12, %r3, 3
-	asl.f	0, %r2, %r3
-	sub_s	%r0, %r0, %r12
-	j_s.d	[%blink]
-	mov.pl	%r0, 0
-#else /* __BIG_ENDIAN__ */
-.Lfound_char:
-	lsr	%r7, %r7, 7
-
-	bic	%r2, %r7, %r6
-.Lfound_char_b:
-	norm	%r2, %r2
-	sub_s	%r0, %r0, 4
-	asr_s	%r2, %r2, 3
-	j.d	[%blink]
-	add_s	%r0, %r0, %r2
-
-.Lfound0_ua:
-	mov_s	%r3, %r7
-.Lfound0:
-	asl_s	%r2, %r2, 7
-	or	%r7, %r6, %r4
-	bic_s	%r12, %r12, %r2
-	sub	%r2, %r7, %r3
-	or	%r2, %r2, %r6
-	bic	%r12, %r2, %r12
-	bic.f	%r3, %r4, %r12
-	norm	%r3, %r3
-
-	add.pl	%r3, %r3, 1
-	asr_s	%r12, %r3, 3
-	asl.f	0, %r2, %r3
-	add_s	%r0, %r0, %r12
-	j_s.d	[%blink]
-	mov.mi	%r0, 0
-#endif /* _ENDIAN__ */

arch/arc/lib/strcmp.S

@@ -1,97 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * This is optimized primarily for the ARC700.
- * It would be possible to speed up the loops by one cycle / word
- * respective one cycle / byte by forcing double source 1 alignment, unrolling
- * by a factor of two, and speculatively loading the second word / byte of
- * source 1; however, that would increase the overhead for loop setup / finish,
- * and strcmp might often terminate early.
- */
-
-.global strcmp
-.align 4
-strcmp:
-	or	%r2, %r0, %r1
-	bmsk_s	%r2, %r2, 1
-	brne	%r2, 0, .Lcharloop
-	mov_s	%r12, 0x01010101
-	ror	%r5, %r12
-.Lwordloop:
-	ld.ab	%r2, [%r0, 4]
-	ld.ab	%r3, [%r1, 4]
-	nop_s
-	sub	%r4, %r2, %r12
-	bic	%r4, %r4, %r2
-	and	%r4, %r4, %r5
-	brne	%r4, 0, .Lfound0
-	breq	%r2 ,%r3, .Lwordloop
-#ifdef	__LITTLE_ENDIAN__
-	xor	%r0, %r2, %r3	/* mask for difference */
-	sub_s	%r1, %r0, 1
-	bic_s	%r0, %r0, %r1	/* mask for least significant difference bit */
-	sub	%r1, %r5, %r0
-	xor	%r0, %r5, %r1	/* mask for least significant difference byte */
-	and_s	%r2, %r2, %r0
-	and_s	%r3, %r3, %r0
-#endif /* _ENDIAN__ */
-	cmp_s	%r2, %r3
-	mov_s	%r0, 1
-	j_s.d	[%blink]
-	bset.lo	%r0, %r0, 31
-
-	.balign	4
-#ifdef __LITTLE_ENDIAN__
-.Lfound0:
-	xor	%r0, %r2, %r3	/* mask for difference */
-	or	%r0, %r0, %r4	/* or in zero indicator */
-	sub_s	%r1, %r0, 1
-	bic_s	%r0, %r0, %r1	/* mask for least significant difference bit */
-	sub	%r1, %r5, %r0
-	xor	%r0, %r5, %r1	/* mask for least significant difference byte */
-	and_s	%r2, %r2, %r0
-	and_s	%r3, %r3, %r0
-	sub.f	%r0, %r2, %r3
-	mov.hi	%r0, 1
-	j_s.d	[%blink]
-	bset.lo	%r0, %r0, 31
-#else /* __BIG_ENDIAN__ */
-	/*
-	 * The zero-detection above can mis-detect 0x01 bytes as zeroes
-	 * because of carry-propagateion from a lower significant zero byte.
-	 * We can compensate for this by checking that bit0 is zero.
-	 * This compensation is not necessary in the step where we
-	 * get a low estimate for r2, because in any affected bytes
-	 * we already have 0x00 or 0x01, which will remain unchanged
-	 * when bit 7 is cleared.
-	 */
-	.balign	4
-.Lfound0:
-	lsr	%r0, %r4, 8
-	lsr_s	%r1, %r2
-	bic_s	%r2, %r2, %r0	/* get low estimate for r2 and get ... */
-	bic_s	%r0, %r0, %r1	/* <this is the adjusted mask for zeros> */
-	or_s	%r3, %r3, %r0	/* ... high estimate r3 so that r2 > r3 will */
-	cmp_s	%r3, %r2	/* ... be independent of trailing garbage */
-	or_s	%r2, %r2, %r0	/* likewise for r3 > r2 */
-	bic_s	%r3, %r3, %r0
-	rlc	%r0, 0		/* r0 := r2 > r3 ? 1 : 0 */
-	cmp_s	%r2, %r3
-	j_s.d	[%blink]
-	bset.lo	%r0, %r0, 31
-#endif /* _ENDIAN__ */
-
-	.balign	4
-.Lcharloop:
-	ldb.ab	%r2,[%r0,1]
-	ldb.ab	%r3,[%r1,1]
-	nop_s
-	breq	%r2, 0, .Lcmpend
-	breq	%r2, %r3, .Lcharloop
-.Lcmpend:
-	j_s.d	[%blink]
-	sub	%r0, %r2, %r3

arch/arc/lib/strcpy-700.S

@@ -1,67 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * If dst and src are 4 byte aligned, copy 8 bytes at a time.
- * If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
- * it 8 byte aligned.  Thus, we can do a little read-ahead, without
- * dereferencing a cache line that we should not touch.
- * Note that short and long instructions have been scheduled to avoid
- * branch stalls.
- * The beq_s to r3z could be made unaligned & long to avoid a stall
- * there, but it is not likely to be taken often, and it would also be likely
- * to cost an unaligned mispredict at the next call.
- */
-
-.global strcpy
-.align 4
-strcpy:
-	or	%r2, %r0, %r1
-	bmsk_s	%r2, %r2, 1
-	brne.d	%r2, 0, charloop
-	mov_s	%r10, %r0
-	ld_s	%r3, [%r1, 0]
-	mov	%r8, 0x01010101
-	bbit0.d	%r1, 2, loop_start
-	ror	%r12, %r8
-	sub	%r2, %r3, %r8
-	bic_s	%r2, %r2, %r3
-	tst_s	%r2,%r12
-	bne	r3z
-	mov_s	%r4,%r3
-	.balign 4
-loop:
-	ld.a	%r3, [%r1, 4]
-	st.ab	%r4, [%r10, 4]
-loop_start:
-	ld.a	%r4, [%r1, 4]
-	sub	%r2, %r3, %r8
-	bic_s	%r2, %r2, %r3
-	tst_s	%r2, %r12
-	bne_s	r3z
-	st.ab	%r3, [%r10, 4]
-	sub	%r2, %r4, %r8
-	bic	%r2, %r2, %r4
-	tst	%r2, %r12
-	beq	loop
-	mov_s	%r3, %r4
-#ifdef __LITTLE_ENDIAN__
-r3z:	bmsk.f	%r1, %r3, 7
-	lsr_s	%r3, %r3, 8
-#else /* __BIG_ENDIAN__ */
-r3z:	lsr.f	%r1, %r3, 24
-	asl_s	%r3, %r3, 8
-#endif /* _ENDIAN__ */
-	bne.d	r3z
-	stb.ab	%r1, [%r10, 1]
-	j_s	[%blink]
-
-	.balign	4
-charloop:
-	ldb.ab	%r3, [%r1, 1]
-	brne.d	%r3, 0, charloop
-	stb.ab	%r3, [%r10, 1]
-	j	[%blink]

arch/arc/lib/strlen.S

@@ -1,80 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-.global strlen
-.align 4
-strlen:
-	or	%r3, %r0, 7
-	ld	%r2, [%r3, -7]
-	ld.a	%r6, [%r3, -3]
-	mov	%r4, 0x01010101
-	/* uses long immediate */
-#ifdef __LITTLE_ENDIAN__
-	asl_s	%r1, %r0, 3
-	btst_s	%r0, 2
-	asl	%r7, %r4, %r1
-	ror	%r5, %r4
-	sub	%r1, %r2, %r7
-	bic_s	%r1, %r1, %r2
-	mov.eq	%r7, %r4
-	sub	%r12, %r6, %r7
-	bic	%r12, %r12, %r6
-	or.eq	%r12, %r12, %r1
-	and	%r12, %r12, %r5
-	brne	%r12, 0, .Learly_end
-#else /* __BIG_ENDIAN__ */
-	ror	%r5, %r4
-	btst_s	%r0, 2
-	mov_s	%r1, 31
-	sub3	%r7, %r1, %r0
-	sub	%r1, %r2, %r4
-	bic_s	%r1, %r1, %r2
-	bmsk	%r1, %r1, %r7
-	sub	%r12, %r6, %r4
-	bic	%r12, %r12, %r6
-	bmsk.ne	%r12, %r12, %r7
-	or.eq	%r12, %r12, %r1
-	and	%r12, %r12, %r5
-	brne	%r12, 0, .Learly_end
-#endif /* _ENDIAN__ */
-
-.Loop:
-	ld_s	%r2, [%r3, 4]
-	ld.a	%r6, [%r3, 8]
-	/* stall for load result */
-	sub	%r1, %r2, %r4
-	bic_s	%r1, %r1, %r2
-	sub	%r12, %r6, %r4
-	bic	%r12, %r12, %r6
-	or	%r12, %r12, %r1
-	and	%r12, %r12, %r5
-	breq	%r12, 0, .Loop
-.Lend:
-	and.f	%r1, %r1, %r5
-	sub.ne	%r3, %r3, 4
-	mov.eq	%r1, %r12
-#ifdef __LITTLE_ENDIAN__
-	sub_s	%r2, %r1, 1
-	bic_s	%r2, %r2, %r1
-	norm	%r1, %r2
-	sub_s	%r0, %r0, 3
-	lsr_s	%r1, %r1, 3
-	sub	%r0, %r3, %r0
-	j_s.d	[%blink]
-	sub	%r0, %r0, %r1
-#else /* __BIG_ENDIAN__ */
-	lsr_s	%r1, %r1, 7
-	mov.eq	%r2, %r6
-	bic_s	%r1, %r1, %r2
-	norm	%r1, %r1
-	sub	%r0, %r3, %r0
-	lsr_s	%r1, %r1, 3
-	j_s.d	[%blink]
-	add	%r0, %r0, %r1
-#endif /* _ENDIAN */
-.Learly_end:
-	b.d	.Lend
-	sub_s.ne %r1, %r1, %r1

arch/arm/config.mk

@@ -1,131 +0,0 @@
-#
-# (C) Copyright 2000-2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifneq ($(CONFIG_OMAP_COMMON),)
-CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
-else
-CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
-endif
-endif
-
-LDFLAGS_FINAL += --gc-sections
-PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
-		     -fno-common -ffixed-r9
-PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
-      $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
-
-# Support generic board on ARM
-__HAVE_ARCH_GENERIC_BOARD := y
-
-PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
-
-# Choose between ARM/Thumb instruction sets
-ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
-PF_CPPFLAGS_ARM := $(call cc-option, -mthumb -mthumb-interwork,\
-			$(call cc-option,-marm,)\
-			$(call cc-option,-mno-thumb-interwork,)\
-		)
-else
-PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
-		$(call cc-option,-mno-thumb-interwork,)
-endif
-
-# Only test once
-ifneq ($(CONFIG_SPL_BUILD),y)
-ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
-archprepare: checkthumb
-
-checkthumb:
-	@if test "$(call cc-version)" -lt "0404"; then \
-		echo -n '*** Your GCC does not produce working '; \
-		echo 'binaries in THUMB mode.'; \
-		echo '*** Your board is configured for THUMB mode.'; \
-		false; \
-	fi
-endif
-endif
-
-# Try if EABI is supported, else fall back to old API,
-# i. e. for example:
-# - with ELDK 4.2 (EABI supported), use:
-#	-mabi=aapcs-linux
-# - with ELDK 4.1 (gcc 4.x, no EABI), use:
-#	-mabi=apcs-gnu
-# - with ELDK 3.1 (gcc 3.x), use:
-#	-mapcs-32
-PF_CPPFLAGS_ABI := $(call cc-option,\
-			-mabi=aapcs-linux,\
-			$(call cc-option,\
-				-mapcs-32,\
-				$(call cc-option,\
-					-mabi=apcs-gnu,\
-				)\
-			)\
-		)
-PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
-
-# For EABI, make sure to provide raise()
-ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
-# This file is parsed many times, so the string may get added multiple
-# times. Also, the prefix needs to be different based on whether
-# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
-# before adding the correct one.
-PLATFORM_LIBS := arch/arm/lib/eabi_compat.o \
-	$(filter-out arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
-endif
-
-# needed for relocation
-LDFLAGS_u-boot += -pie
-
-#
-# FIXME: binutils versions < 2.22 have a bug in the assembler where
-# branches to weak symbols can be incorrectly optimized in thumb mode
-# to a short branch (b.n instruction) that won't reach when the symbol
-# gets preempted
-#
-# http://sourceware.org/bugzilla/show_bug.cgi?id=12532
-#
-ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
-ifeq ($(GAS_BUG_12532),)
-export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
-	then echo y; else echo n; fi)
-endif
-ifeq ($(GAS_BUG_12532),y)
-PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
-endif
-endif
-
-ifneq ($(CONFIG_SPL_BUILD),y)
-# Check that only R_ARM_RELATIVE relocations are generated.
-ALL-y += checkarmreloc
-# The movt / movw can hardcode 16 bit parts of the addresses in the
-# instruction. Relocation is not supported for that case, so disable
-# such usage by requiring word relocations.
-PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
-endif
-
-# limit ourselves to the sections we want in the .bin.
-ifdef CONFIG_ARM64
-OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
-else
-OBJCOPYFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list -j .rel.dyn
-endif
-
-ifneq ($(CONFIG_IMX_CONFIG),)
-ifdef CONFIG_SPL
-ifndef CONFIG_SPL_BUILD
-ALL-y += SPL
-endif
-else
-ifeq ($(CONFIG_OF_SEPARATE),y)
-ALL-y += u-boot-dtb.imx
-else
-ALL-y += u-boot.imx
-endif
-endif
-endif

arch/arm/cpu/Makefile

@@ -1,3 +0,0 @@
-obj-$(CONFIG_AT91FAMILY) += at91-common/
-obj-$(CONFIG_TEGRA) += $(SOC)-common/
-obj-$(CONFIG_TEGRA) += tegra-common/

arch/arm/cpu/arm1136/Makefile

@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-extra-y	= start.o
-obj-y	= cpu.o

arch/arm/cpu/arm1136/config.mk

@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-# Make ARMv5 to allow more compilers to work, even though its v6.
-PLATFORM_CPPFLAGS += -march=armv5

arch/arm/cpu/arm1136/cpu.c

@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2004 Texas Insturments
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * CPU specific code
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/system.h>
-
-static void cache_flush(void);
-
-int cleanup_before_linux (void)
-{
-	/*
-	 * this function is called just before we call linux
-	 * it prepares the processor for linux
-	 *
-	 * we turn off caches etc ...
-	 */
-
-	disable_interrupts ();
-
-#ifdef CONFIG_LCD
-	{
-		extern void lcd_disable(void);
-		extern void lcd_panel_disable(void);
-
-		lcd_disable(); /* proper disable of lcd & panel */
-		lcd_panel_disable();
-	}
-#endif
-
-	/* turn off I/D-cache */
-	icache_disable();
-	dcache_disable();
-	/* flush I/D-cache */
-	cache_flush();
-
-	return 0;
-}
-
-static void cache_flush(void)
-{
-	unsigned long i = 0;
-	/* clean entire data cache */
-	asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
-	/* invalidate both caches and flush btb */
-	asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
-	/* mem barrier to sync things */
-	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-
-#ifndef CONFIG_SYS_CACHELINE_SIZE
-#define CONFIG_SYS_CACHELINE_SIZE	32
-#endif
-
-void invalidate_dcache_all(void)
-{
-	asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
-}
-
-void flush_dcache_all(void)
-{
-	asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0));
-	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-}
-
-static int check_cache_range(unsigned long start, unsigned long stop)
-{
-	int ok = 1;
-
-	if (start & (CONFIG_SYS_CACHELINE_SIZE - 1))
-		ok = 0;
-
-	if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1))
-		ok = 0;
-
-	if (!ok)
-		debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
-			start, stop);
-
-	return ok;
-}
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-	if (!check_cache_range(start, stop))
-		return;
-
-	while (start < stop) {
-		asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
-		start += CONFIG_SYS_CACHELINE_SIZE;
-	}
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-	if (!check_cache_range(start, stop))
-		return;
-
-	while (start < stop) {
-		asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start));
-		start += CONFIG_SYS_CACHELINE_SIZE;
-	}
-
-	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-}
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-	flush_dcache_range(start, start + size);
-}
-
-#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
-void invalidate_dcache_all(void)
-{
-}
-
-void flush_dcache_all(void)
-{
-}
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_cache(unsigned long start, unsigned long size)
-{
-}
-#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
-
-#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_ICACHE_OFF
-	icache_enable();
-#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
-	dcache_enable();
-#endif
-}
-#endif

arch/arm/cpu/arm1136/mx31/Makefile

@@ -1,10 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	+= generic.o
-obj-y	+= timer.o
-obj-y	+= devices.o

arch/arm/cpu/arm1136/mx31/devices.c

@@ -1,51 +0,0 @@
-/*
- *
- * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
- *
- * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/clock.h>
-
-void mx31_uart1_hw_init(void)
-{
-	/* setup pins for UART1 */
-	mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
-	mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
-	mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
-	mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
-}
-
-void mx31_uart2_hw_init(void)
-{
-	/* setup pins for UART2 */
-	mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
-	mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
-	mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
-	mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
-}
-
-#ifdef CONFIG_MXC_SPI
-/*
- * Note: putting several spi setups here makes no sense as they may differ
- * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
- */
-void mx31_spi2_hw_init(void)
-{
-	/* SPI2 */
-	mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
-	mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
-	mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
-	mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
-	mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
-	mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
-	mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
-
-	/* start SPI2 clock */
-	__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
-}
-#endif

arch/arm/cpu/arm1136/mx31/generic.c

@@ -1,219 +0,0 @@
-/*
- * (C) Copyright 2007
- * Sascha Hauer, Pengutronix
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <div64.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/clock.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-
-static u32 mx31_decode_pll(u32 reg, u32 infreq)
-{
-	u32 mfi = GET_PLL_MFI(reg);
-	s32 mfn = GET_PLL_MFN(reg);
-	u32 mfd = GET_PLL_MFD(reg);
-	u32 pd =  GET_PLL_PD(reg);
-
-	mfi = mfi <= 5 ? 5 : mfi;
-	mfn = mfn >= 512 ? mfn - 1024 : mfn;
-	mfd += 1;
-	pd += 1;
-
-	return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
-		mfd * pd);
-}
-
-static u32 mx31_get_mpl_dpdgck_clk(void)
-{
-	u32 infreq;
-
-	if ((readl(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
-		infreq = MXC_CLK32 * 1024;
-	else
-		infreq = MXC_HCLK;
-
-	return mx31_decode_pll(readl(CCM_MPCTL), infreq);
-}
-
-static u32 mx31_get_mcu_main_clk(void)
-{
-	/* For now we assume mpl_dpdgck_clk == mcu_main_clk
-	 * which should be correct for most boards
-	 */
-	return mx31_get_mpl_dpdgck_clk();
-}
-
-static u32 mx31_get_ipg_clk(void)
-{
-	u32 freq = mx31_get_mcu_main_clk();
-	u32 pdr0 = readl(CCM_PDR0);
-
-	freq /= GET_PDR0_MAX_PODF(pdr0) + 1;
-	freq /= GET_PDR0_IPG_PODF(pdr0) + 1;
-
-	return freq;
-}
-
-/* hsp is the clock for the ipu */
-static u32 mx31_get_hsp_clk(void)
-{
-	u32 freq = mx31_get_mcu_main_clk();
-	u32 pdr0 = readl(CCM_PDR0);
-
-	freq /= GET_PDR0_HSP_PODF(pdr0) + 1;
-
-	return freq;
-}
-
-void mx31_dump_clocks(void)
-{
-	u32 cpufreq = mx31_get_mcu_main_clk();
-	printf("mx31 cpu clock: %dMHz\n", cpufreq / 1000000);
-	printf("ipg clock     : %dHz\n", mx31_get_ipg_clk());
-	printf("hsp clock     : %dHz\n", mx31_get_hsp_clk());
-}
-
-unsigned int mxc_get_clock(enum mxc_clock clk)
-{
-	switch (clk) {
-	case MXC_ARM_CLK:
-		return mx31_get_mcu_main_clk();
-	case MXC_IPG_CLK:
-	case MXC_IPG_PERCLK:
-	case MXC_CSPI_CLK:
-	case MXC_UART_CLK:
-	case MXC_ESDHC_CLK:
-	case MXC_I2C_CLK:
-		return mx31_get_ipg_clk();
-	case MXC_IPU_CLK:
-		return mx31_get_hsp_clk();
-	}
-	return -1;
-}
-
-u32 imx_get_uartclk(void)
-{
-	return mxc_get_clock(MXC_UART_CLK);
-}
-
-void mx31_gpio_mux(unsigned long mode)
-{
-	unsigned long reg, shift, tmp;
-
-	reg = IOMUXC_BASE + (mode & 0x1fc);
-	shift = (~mode & 0x3) * 8;
-
-	tmp = readl(reg);
-	tmp &= ~(0xff << shift);
-	tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift;
-	writel(tmp, reg);
-}
-
-void mx31_set_pad(enum iomux_pins pin, u32 config)
-{
-	u32 field, l, reg;
-
-	pin &= IOMUX_PADNUM_MASK;
-	reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
-	field = (pin + 2) % 3;
-
-	l = readl(reg);
-	l &= ~(0x1ff << (field * 10));
-	l |= config << (field * 10);
-	writel(l, reg);
-
-}
-
-void mx31_set_gpr(enum iomux_gp_func gp, char en)
-{
-	u32 l;
-	struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
-
-	l = readl(&iomuxc->gpr);
-	if (en)
-		l |= gp;
-	else
-		l &= ~gp;
-
-	writel(l, &iomuxc->gpr);
-}
-
-void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
-{
-	struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
-	struct mx31_weim_cscr *cscr = &weim->cscr[cs];
-
-	writel(weimcs->upper, &cscr->upper);
-	writel(weimcs->lower, &cscr->lower);
-	writel(weimcs->additional, &cscr->additional);
-}
-
-struct mx3_cpu_type mx31_cpu_type[] = {
-	{ .srev = 0x00, .v = 0x10 },
-	{ .srev = 0x10, .v = 0x11 },
-	{ .srev = 0x11, .v = 0x11 },
-	{ .srev = 0x12, .v = 0x1F },
-	{ .srev = 0x13, .v = 0x1F },
-	{ .srev = 0x14, .v = 0x12 },
-	{ .srev = 0x15, .v = 0x12 },
-	{ .srev = 0x28, .v = 0x20 },
-	{ .srev = 0x29, .v = 0x20 },
-};
-
-u32 get_cpu_rev(void)
-{
-	u32 i, srev;
-
-	/* read SREV register from IIM module */
-	struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
-	srev = readl(&iim->iim_srev);
-
-	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
-		if (srev == mx31_cpu_type[i].srev)
-			return mx31_cpu_type[i].v;
-
-	return srev | 0x8000;
-}
-
-static char *get_reset_cause(void)
-{
-	/* read RCSR register from CCM module */
-	struct clock_control_regs *ccm =
-		(struct clock_control_regs *)CCM_BASE;
-
-	u32 cause = readl(&ccm->rcsr) & 0x07;
-
-	switch (cause) {
-	case 0x0000:
-		return "POR";
-	case 0x0001:
-		return "RST";
-	case 0x0002:
-		return "WDOG";
-	case 0x0006:
-		return "JTAG";
-	case 0x0007:
-		return "ARM11P power gating";
-	default:
-		return "unknown reset";
-	}
-}
-
-#if defined(CONFIG_DISPLAY_CPUINFO)
-int print_cpuinfo(void)
-{
-	u32 srev = get_cpu_rev();
-
-	printf("CPU:   Freescale i.MX31 rev %d.%d%s at %d MHz.\n",
-			(srev & 0xF0) >> 4, (srev & 0x0F),
-			((srev & 0x8000) ? " unknown" : ""),
-			mx31_get_mcu_main_clk() / 1000000);
-	printf("Reset cause: %s\n", get_reset_cause());
-	return 0;
-}
-#endif

arch/arm/cpu/arm1136/mx31/timer.c

@@ -1,147 +0,0 @@
-/*
- * (C) Copyright 2007
- * Sascha Hauer, Pengutronix
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/clock.h>
-#include <div64.h>
-#include <watchdog.h>
-#include <asm/io.h>
-
-#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
-
-/* General purpose timers registers */
-#define GPTCR	__REG(TIMER_BASE)		/* Control register	*/
-#define GPTPR	__REG(TIMER_BASE + 0x4)		/* Prescaler register	*/
-#define GPTSR	__REG(TIMER_BASE + 0x8)		/* Status register	*/
-#define GPTCNT	__REG(TIMER_BASE + 0x24)	/* Counter register	*/
-
-/* General purpose timers bitfields */
-#define GPTCR_SWR		(1 << 15)	/* Software reset	*/
-#define GPTCR_FRR		(1 << 9)	/* Freerun / restart	*/
-#define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source		*/
-#define GPTCR_TEN		1		/* Timer enable		*/
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
- * "tick" is internal timer period
- */
-
-#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
-/* ~0.4% error - measured with stop-watch on 100s boot-delay */
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, MXC_CLK32);
-	return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
-	time *= MXC_CLK32;
-	do_div(time, CONFIG_SYS_HZ);
-	return time;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
-	us = us * MXC_CLK32 + 999999;
-	do_div(us, 1000000);
-	return us;
-}
-#else
-/* ~2% error */
-#define TICK_PER_TIME	((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define US_PER_TICK	(1000000 / MXC_CLK32)
-
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	do_div(tick, TICK_PER_TIME);
-	return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
-	return time * TICK_PER_TIME;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
-	us += US_PER_TICK - 1;
-	do_div(us, US_PER_TICK);
-	return us;
-}
-#endif
-
-/* The 32768Hz 32-bit timer overruns in 131072 seconds */
-int timer_init(void)
-{
-	int i;
-
-	/* setup GP Timer 1 */
-	GPTCR = GPTCR_SWR;
-	for (i = 0; i < 100; i++)
-		GPTCR = 0; /* We have no udelay by now */
-	GPTPR = 0; /* 32Khz */
-	/* Freerun Mode, PERCLK1 input */
-	GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
-
-	return 0;
-}
-
-unsigned long long get_ticks(void)
-{
-	ulong now = GPTCNT; /* current tick value */
-
-	if (now >= gd->arch.lastinc)	/* normal mode (non roll) */
-		/* move stamp forward with absolut diff ticks */
-		gd->arch.tbl += (now - gd->arch.lastinc);
-	else			/* we have rollover of incrementer */
-		gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
-	gd->arch.lastinc = now;
-	return gd->arch.tbl;
-}
-
-ulong get_timer_masked(void)
-{
-	/*
-	 * get_ticks() returns a long long (64 bit), it wraps in
-	 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
-	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
-	 * 5 * 10^6 days - long enough.
-	 */
-	return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
-	return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timestamp value */
-void __udelay(unsigned long usec)
-{
-	unsigned long long tmp;
-	ulong tmo;
-
-	tmo = us_to_tick(usec);
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)	/* loop till event */
-		 /*NOP*/;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	return MXC_CLK32;
-}

arch/arm/cpu/arm1136/mx35/Makefile

@@ -1,12 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	+= generic.o
-obj-y	+= timer.o
-obj-y	+= mx35_sdram.o

arch/arm/cpu/arm1136/mx35/generic.c

@@ -1,547 +0,0 @@
-/*
- * (C) Copyright 2007
- * Sascha Hauer, Pengutronix
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <div64.h>
-#include <asm/io.h>
-#include <asm/errno.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#ifdef CONFIG_FSL_ESDHC
-#include <fsl_esdhc.h>
-#endif
-#include <netdev.h>
-#include <spl.h>
-
-#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
-#define CLK_CODE_ARM(c)		(((c) >> 16) & 0xFF)
-#define CLK_CODE_AHB(c)		(((c) >>  8) & 0xFF)
-#define CLK_CODE_PATH(c)	((c) & 0xFF)
-
-#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
-
-#ifdef CONFIG_FSL_ESDHC
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
-static int g_clk_mux_auto[8] = {
-	CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1,
-	CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1,
-};
-
-static int g_clk_mux_consumer[16] = {
-	CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(1, 3, 1), -1,
-	-1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0),
-	CLK_CODE(1, 8, 1), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1,
-	-1, -1, CLK_CODE(4, 2, 0), -1,
-};
-
-static int hsp_div_table[3][16] = {
-	{4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1},
-	{-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1},
-	{3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1},
-};
-
-u32 get_cpu_rev(void)
-{
-	int reg;
-	struct iim_regs *iim =
-		(struct iim_regs *)IIM_BASE_ADDR;
-	reg = readl(&iim->iim_srev);
-	if (!reg) {
-		reg = readw(ROMPATCH_REV);
-		reg <<= 4;
-	} else {
-		reg += CHIP_REV_1_0;
-	}
-
-	return 0x35000 + (reg & 0xFF);
-}
-
-static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)
-{
-	int *pclk_mux;
-	if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
-		pclk_mux = g_clk_mux_consumer +
-			((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
-			MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
-	} else {
-		pclk_mux = g_clk_mux_auto +
-			((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >>
-			MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET);
-	}
-
-	if ((*pclk_mux) == -1)
-		return -1;
-
-	if (fi && fd) {
-		if (!CLK_CODE_PATH(*pclk_mux)) {
-			*fi = *fd = 1;
-			return CLK_CODE_ARM(*pclk_mux);
-		}
-		if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
-			*fi = 3;
-			*fd = 4;
-		} else {
-			*fi = 2;
-			*fd = 3;
-		}
-	}
-	return CLK_CODE_ARM(*pclk_mux);
-}
-
-static int get_ahb_div(u32 pdr0)
-{
-	int *pclk_mux;
-
-	pclk_mux = g_clk_mux_consumer +
-		((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
-		MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
-
-	if ((*pclk_mux) == -1)
-		return -1;
-
-	return CLK_CODE_AHB(*pclk_mux);
-}
-
-static u32 decode_pll(u32 reg, u32 infreq)
-{
-	u32 mfi = (reg >> 10) & 0xf;
-	s32 mfn = reg & 0x3ff;
-	u32 mfd = (reg >> 16) & 0x3ff;
-	u32 pd = (reg >> 26) & 0xf;
-
-	mfi = mfi <= 5 ? 5 : mfi;
-	mfn = mfn >= 512 ? mfn - 1024 : mfn;
-	mfd += 1;
-	pd += 1;
-
-	return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
-		mfd * pd);
-}
-
-static u32 get_mcu_main_clk(void)
-{
-	u32 arm_div = 0, fi = 0, fd = 0;
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-	arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd);
-	fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK);
-	return fi / (arm_div * fd);
-}
-
-static u32 get_ipg_clk(void)
-{
-	u32 freq = get_mcu_main_clk();
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-	u32 pdr0 = readl(&ccm->pdr0);
-
-	return freq / (get_ahb_div(pdr0) * 2);
-}
-
-static u32 get_ipg_per_clk(void)
-{
-	u32 freq = get_mcu_main_clk();
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-	u32 pdr0 = readl(&ccm->pdr0);
-	u32 pdr4 = readl(&ccm->pdr4);
-	u32 div;
-	if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
-		div = CCM_GET_DIVIDER(pdr4,
-			MXC_CCM_PDR4_PER0_PODF_MASK,
-			MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1;
-	} else {
-		div = CCM_GET_DIVIDER(pdr0,
-			MXC_CCM_PDR0_PER_PODF_MASK,
-			MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
-		div *= get_ahb_div(pdr0);
-	}
-	return freq / div;
-}
-
-u32 imx_get_uartclk(void)
-{
-	u32 freq;
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-	u32 pdr4 = readl(&ccm->pdr4);
-
-	if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
-		freq = get_mcu_main_clk();
-	else
-		freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
-	freq /= CCM_GET_DIVIDER(pdr4,
-			MXC_CCM_PDR4_UART_PODF_MASK,
-			MXC_CCM_PDR4_UART_PODF_OFFSET) + 1;
-	return freq;
-}
-
-unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
-{
-	u32 nfc_pdf, hsp_podf;
-	u32 pll, ret_val = 0, usb_podf;
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-
-	u32 reg = readl(&ccm->pdr0);
-	u32 reg4 = readl(&ccm->pdr4);
-
-	reg |= 0x1;
-
-	switch (clk) {
-	case CPU_CLK:
-		ret_val = get_mcu_main_clk();
-		break;
-	case AHB_CLK:
-		ret_val = get_mcu_main_clk();
-		break;
-	case HSP_CLK:
-		if (reg & CLKMODE_CONSUMER) {
-			hsp_podf = (reg >> 20) & 0x3;
-			pll = get_mcu_main_clk();
-			hsp_podf = hsp_div_table[hsp_podf][(reg>>16)&0xF];
-			if (hsp_podf > 0) {
-				ret_val = pll / hsp_podf;
-			} else {
-				puts("mismatch HSP with ARM clock setting\n");
-				ret_val = 0;
-			}
-		} else {
-			ret_val = get_mcu_main_clk();
-		}
-		break;
-	case IPG_CLK:
-		ret_val = get_ipg_clk();
-		break;
-	case IPG_PER_CLK:
-		ret_val = get_ipg_per_clk();
-		break;
-	case NFC_CLK:
-		nfc_pdf = (reg4 >> 28) & 0xF;
-		pll = get_mcu_main_clk();
-		/* AHB/nfc_pdf */
-		ret_val = pll / (nfc_pdf + 1);
-		break;
-	case USB_CLK:
-		usb_podf = (reg4 >> 22) & 0x3F;
-		if (reg4 & 0x200)
-			pll = get_mcu_main_clk();
-		else
-			pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
-
-		ret_val = pll / (usb_podf + 1);
-		break;
-	default:
-		printf("Unknown clock: %d\n", clk);
-		break;
-	}
-
-	return ret_val;
-}
-unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
-{
-	u32 ret_val = 0, pdf, pre_pdf, clk_sel;
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-	u32 mpdr2 = readl(&ccm->pdr2);
-	u32 mpdr3 = readl(&ccm->pdr3);
-	u32 mpdr4 = readl(&ccm->pdr4);
-
-	switch (clk) {
-	case UART1_BAUD:
-	case UART2_BAUD:
-	case UART3_BAUD:
-		clk_sel = mpdr3 & (1 << 14);
-		pdf = (mpdr4 >> 10) & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
-		break;
-	case SSI1_BAUD:
-		pre_pdf = (mpdr2 >> 24) & 0x7;
-		pdf = mpdr2 & 0x3F;
-		clk_sel = mpdr2 & (1 << 6);
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
-				((pre_pdf + 1) * (pdf + 1));
-		break;
-	case SSI2_BAUD:
-		pre_pdf = (mpdr2 >> 27) & 0x7;
-		pdf = (mpdr2 >> 8) & 0x3F;
-		clk_sel = mpdr2 & (1 << 6);
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
-				((pre_pdf + 1) * (pdf + 1));
-		break;
-	case CSI_BAUD:
-		clk_sel = mpdr2 & (1 << 7);
-		pdf = (mpdr2 >> 16) & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
-		break;
-	case MSHC_CLK:
-		pre_pdf = readl(&ccm->pdr1);
-		clk_sel = (pre_pdf & 0x80);
-		pdf = (pre_pdf >> 22) & 0x3F;
-		pre_pdf = (pre_pdf >> 28) & 0x7;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
-				((pre_pdf + 1) * (pdf + 1));
-		break;
-	case ESDHC1_CLK:
-		clk_sel = mpdr3 & 0x40;
-		pdf = mpdr3 & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
-		break;
-	case ESDHC2_CLK:
-		clk_sel = mpdr3 & 0x40;
-		pdf = (mpdr3 >> 8) & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
-		break;
-	case ESDHC3_CLK:
-		clk_sel = mpdr3 & 0x40;
-		pdf = (mpdr3 >> 16) & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
-		break;
-	case SPDIF_CLK:
-		clk_sel = mpdr3 & 0x400000;
-		pre_pdf = (mpdr3 >> 29) & 0x7;
-		pdf = (mpdr3 >> 23) & 0x3F;
-		ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
-			decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
-				((pre_pdf + 1) * (pdf + 1));
-		break;
-	default:
-		printf("%s(): This clock: %d not supported yet\n",
-				__func__, clk);
-		break;
-	}
-
-	return ret_val;
-}
-
-unsigned int mxc_get_clock(enum mxc_clock clk)
-{
-	switch (clk) {
-	case MXC_ARM_CLK:
-		return get_mcu_main_clk();
-	case MXC_AHB_CLK:
-		break;
-	case MXC_IPG_CLK:
-		return get_ipg_clk();
-	case MXC_IPG_PERCLK:
-	case MXC_I2C_CLK:
-		return get_ipg_per_clk();
-	case MXC_UART_CLK:
-		return imx_get_uartclk();
-	case MXC_ESDHC1_CLK:
-		return mxc_get_peri_clock(ESDHC1_CLK);
-	case MXC_ESDHC2_CLK:
-		return mxc_get_peri_clock(ESDHC2_CLK);
-	case MXC_ESDHC3_CLK:
-		return mxc_get_peri_clock(ESDHC3_CLK);
-	case MXC_USB_CLK:
-		return mxc_get_main_clock(USB_CLK);
-	case MXC_FEC_CLK:
-		return get_ipg_clk();
-	case MXC_CSPI_CLK:
-		return get_ipg_clk();
-	}
-	return -1;
-}
-
-#ifdef CONFIG_FEC_MXC
-/*
- * The MX35 has no fuse for MAC, return a NULL MAC
- */
-void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
-{
-	memset(mac, 0, 6);
-}
-
-u32 imx_get_fecclk(void)
-{
-	return mxc_get_clock(MXC_IPG_CLK);
-}
-#endif
-
-int do_mx35_showclocks(cmd_tbl_t *cmdtp,
-	int flag, int argc, char * const argv[])
-{
-	u32 cpufreq = get_mcu_main_clk();
-	printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
-	printf("ipg clock     : %dHz\n", get_ipg_clk());
-	printf("ipg per clock : %dHz\n", get_ipg_per_clk());
-	printf("uart clock    : %dHz\n", mxc_get_clock(MXC_UART_CLK));
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	clocks,	CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
-	"display clocks",
-	""
-);
-
-#if defined(CONFIG_DISPLAY_CPUINFO)
-static char *get_reset_cause(void)
-{
-	/* read RCSR register from CCM module */
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-
-	u32 cause = readl(&ccm->rcsr) & 0x0F;
-
-	switch (cause) {
-	case 0x0000:
-		return "POR";
-	case 0x0002:
-		return "JTAG";
-	case 0x0004:
-		return "RST";
-	case 0x0008:
-		return "WDOG";
-	default:
-		return "unknown reset";
-	}
-}
-
-int print_cpuinfo(void)
-{
-	u32 srev = get_cpu_rev();
-
-	printf("CPU:   Freescale i.MX35 rev %d.%d at %d MHz.\n",
-		(srev & 0xF0) >> 4, (srev & 0x0F),
-		get_mcu_main_clk() / 1000000);
-
-	printf("Reset cause: %s\n", get_reset_cause());
-
-	return 0;
-}
-#endif
-
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-int cpu_eth_init(bd_t *bis)
-{
-	int rc = -ENODEV;
-
-#if defined(CONFIG_FEC_MXC)
-	rc = fecmxc_initialize(bis);
-#endif
-
-	return rc;
-}
-
-#ifdef CONFIG_FSL_ESDHC
-/*
- * Initializes on-chip MMC controllers.
- * to override, implement board_mmc_init()
- */
-int cpu_mmc_init(bd_t *bis)
-{
-	return fsl_esdhc_mmc_init(bis);
-}
-#endif
-
-int get_clocks(void)
-{
-#ifdef CONFIG_FSL_ESDHC
-#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
-	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
-	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-#else
-	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
-#endif
-#endif
-	return 0;
-}
-
-#define RCSR_MEM_CTL_WEIM	0
-#define RCSR_MEM_CTL_NAND	1
-#define RCSR_MEM_CTL_ATA	2
-#define RCSR_MEM_CTL_EXPANSION	3
-#define RCSR_MEM_TYPE_NOR	0
-#define RCSR_MEM_TYPE_ONENAND	2
-#define RCSR_MEM_TYPE_SD	0
-#define RCSR_MEM_TYPE_I2C	2
-#define RCSR_MEM_TYPE_SPI	3
-
-u32 spl_boot_device(void)
-{
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
-
-	u32 rcsr = readl(&ccm->rcsr);
-	u32 mem_type, mem_ctl;
-
-	/* In external mode, no boot device is returned */
-	if ((rcsr >> 10) & 0x03)
-		return BOOT_DEVICE_NONE;
-
-	mem_ctl = (rcsr >> 25) & 0x03;
-	mem_type = (rcsr >> 23) & 0x03;
-
-	switch (mem_ctl) {
-	case RCSR_MEM_CTL_WEIM:
-		switch (mem_type) {
-		case RCSR_MEM_TYPE_NOR:
-			return BOOT_DEVICE_NOR;
-		case RCSR_MEM_TYPE_ONENAND:
-			return BOOT_DEVICE_ONENAND;
-		default:
-			return BOOT_DEVICE_NONE;
-		}
-	case RCSR_MEM_CTL_NAND:
-		return BOOT_DEVICE_NAND;
-	case RCSR_MEM_CTL_EXPANSION:
-		switch (mem_type) {
-		case RCSR_MEM_TYPE_SD:
-			return BOOT_DEVICE_MMC1;
-		case RCSR_MEM_TYPE_I2C:
-			return BOOT_DEVICE_I2C;
-		case RCSR_MEM_TYPE_SPI:
-			return BOOT_DEVICE_SPI;
-		default:
-			return BOOT_DEVICE_NONE;
-		}
-	}
-
-	return BOOT_DEVICE_NONE;
-}
-
-#ifdef CONFIG_SPL_BUILD
-u32 spl_boot_mode(void)
-{
-	switch (spl_boot_device()) {
-	case BOOT_DEVICE_MMC1:
-#ifdef CONFIG_SPL_FAT_SUPPORT
-		return MMCSD_MODE_FAT;
-#else
-		return MMCSD_MODE_RAW;
-#endif
-		break;
-	case BOOT_DEVICE_NAND:
-		return 0;
-		break;
-	default:
-		puts("spl: ERROR:  unsupported device\n");
-		hang();
-	}
-}
-#endif

arch/arm/cpu/arm1136/mx35/mx35_sdram.c

@@ -1,121 +0,0 @@
-/*
- * Copyright (C) 2012, Stefano Babic <sbabic@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <asm/errno.h>
-#include <asm/arch/imx-regs.h>
-#include <linux/types.h>
-#include <asm/arch/sys_proto.h>
-
-#define ESDCTL_DDR2_EMR2	0x04000000
-#define ESDCTL_DDR2_EMR3	0x06000000
-#define ESDCTL_PRECHARGE	0x00000400
-#define ESDCTL_DDR2_EN_DLL	0x02000400
-#define ESDCTL_DDR2_RESET_DLL	0x00000333
-#define ESDCTL_DDR2_MR		0x00000233
-#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
-
-enum {
-	SMODE_NORMAL =	0,
-	SMODE_PRECHARGE,
-	SMODE_AUTO_REFRESH,
-	SMODE_LOAD_REG,
-	SMODE_MANUAL_REFRESH
-};
-
-#define set_mode(x, en, m)	(x | (en << 31) | (m << 28))
-
-static inline void dram_wait(unsigned int count)
-{
-	volatile unsigned int wait = count;
-
-	while (wait--)
-		;
-
-}
-
-void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
-	u32 row, u32 col, u32 dsize, u32 refresh)
-{
-	struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
-	u32 *cfg_reg, *ctl_reg;
-	u32 val;
-	u32 ctlval;
-
-	switch (start_address) {
-	case CSD0_BASE_ADDR:
-		cfg_reg = &esdc->esdcfg0;
-		ctl_reg = &esdc->esdctl0;
-		break;
-	case CSD1_BASE_ADDR:
-		cfg_reg = &esdc->esdcfg1;
-		ctl_reg = &esdc->esdctl1;
-		break;
-	default:
-		return;
-	}
-
-	/* The MX35 supports 11 up to 14 rows */
-	if (row < 11 || row > 14 || col < 8 || col > 10)
-		return;
-	ctlval = (row - 11) << 24 | (col - 8) << 20 | (dsize << 16);
-
-	/* Initialize MISC register for DDR2 */
-	val = ESDC_MISC_RST | ESDC_MISC_MDDR_EN | ESDC_MISC_MDDR_DL_RST |
-		ESDC_MISC_DDR_EN | ESDC_MISC_DDR2_EN;
-	writel(val, &esdc->esdmisc);
-	val &= ~(ESDC_MISC_RST | ESDC_MISC_MDDR_DL_RST);
-	writel(val, &esdc->esdmisc);
-
-	/*
-	 * according to DDR2 specs, wait a while before
-	 * the PRECHARGE_ALL command
-	 */
-	dram_wait(0x20000);
-
-	/* Load DDR2 config and timing */
-	writel(ddr2_config, cfg_reg);
-
-	/* Precharge ALL */
-	writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
-		ctl_reg);
-	writel(0xda, start_address + ESDCTL_PRECHARGE);
-
-	/* Load mode */
-	writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
-		ctl_reg);
-	writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */
-	writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */
-	writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
-	writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */
-
-	/* Precharge ALL */
-	writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
-		ctl_reg);
-	writel(0xda, start_address + ESDCTL_PRECHARGE);
-
-	/* Set mode auto refresh : at least two refresh are required */
-	writel(set_mode(ctlval, 1, SMODE_AUTO_REFRESH),
-		ctl_reg);
-	writel(0xda, start_address);
-	writel(0xda, start_address);
-
-	writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
-		ctl_reg);
-	writeb(0xda, start_address + ESDCTL_DDR2_MR);
-	writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT);
-
-	/* OCD mode exit */
-	writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
-
-	/* Set normal mode */
-	writel(set_mode(ctlval, 1, SMODE_NORMAL) | refresh,
-		ctl_reg);
-
-	dram_wait(0x20000);
-
-	/* Do not set delay lines, only for MDDR */
-}

arch/arm/cpu/arm1136/mx35/timer.c

@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2007
- * Sascha Hauer, Pengutronix
- *
- * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <div64.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/clock.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp	(gd->arch.tbl)
-#define lastinc		(gd->arch.lastinc)
-
-/* General purpose timers bitfields */
-#define GPTCR_SWR       (1<<15)	/* Software reset */
-#define GPTCR_FRR       (1<<9)	/* Freerun / restart */
-#define GPTCR_CLKSOURCE_32   (4<<6)	/* Clock source */
-#define GPTCR_TEN       (1)	/* Timer enable */
-
-/*
- * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
- * "tick" is internal timer period
- */
-/* ~0.4% error - measured with stop-watch on 100s boot-delay */
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, MXC_CLK32);
-
-	return tick;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
-	us = us * MXC_CLK32 + 999999;
-	do_div(us, 1000000);
-
-	return us;
-}
-
-/*
- * nothing really to do with interrupts, just starts up a counter.
- * The 32KHz 32-bit timer overruns in 134217 seconds
- */
-int timer_init(void)
-{
-	int i;
-	struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
-	struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
-
-	/* setup GP Timer 1 */
-	writel(GPTCR_SWR, &gpt->ctrl);
-
-	writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
-
-	for (i = 0; i < 100; i++)
-		writel(0, &gpt->ctrl); /* We have no udelay by now */
-	writel(0, &gpt->pre); /* prescaler = 1 */
-	/* Freerun Mode, 32KHz input */
-	writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
-			&gpt->ctrl);
-	writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
-
-	return 0;
-}
-
-unsigned long long get_ticks(void)
-{
-	struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
-	ulong now = readl(&gpt->counter); /* current tick value */
-
-	if (now >= lastinc) {
-		/*
-		 * normal mode (non roll)
-		 * move stamp forward with absolut diff ticks
-		 */
-		timestamp += (now - lastinc);
-	} else {
-		/* we have rollover of incrementer */
-		timestamp += (0xFFFFFFFF - lastinc) + now;
-	}
-	lastinc = now;
-	return timestamp;
-}
-
-ulong get_timer_masked(void)
-{
-	/*
-	 * get_ticks() returns a long long (64 bit), it wraps in
-	 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
-	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
-	 * 5 * 10^6 days - long enough.
-	 */
-	return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
-	return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
-{
-	unsigned long long tmp;
-	ulong tmo;
-
-	tmo = us_to_tick(usec);
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)	/* loop till event */
-		 /*NOP*/;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	return MXC_CLK32;
-}

arch/arm/cpu/arm1136/start.S

@@ -1,346 +0,0 @@
-/*
- *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
- *
- *  Copyright (c) 2004	Texas Instruments <r-woodruff2@ti.com>
- *
- *  Copyright (c) 2001	Marius Gröger <mag@sysgo.de>
- *  Copyright (c) 2002	Alex Züpke <azu@sysgo.de>
- *  Copyright (c) 2002	Gary Jennejohn <garyj@denx.de>
- *  Copyright (c) 2003	Richard Woodruff <r-woodruff2@ti.com>
- *  Copyright (c) 2003	Kshitij <kshitij@ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <version.h>
-.globl _start
-_start: b	reset
-#ifdef CONFIG_SPL_BUILD
-	ldr	pc, _hang
-	ldr	pc, _hang
-	ldr	pc, _hang
-	ldr	pc, _hang
-	ldr	pc, _hang
-	ldr	pc, _hang
-	ldr	pc, _hang
-
-_hang:
-	.word	do_hang
-	.word	0x12345678
-	.word	0x12345678
-	.word	0x12345678
-	.word	0x12345678
-	.word	0x12345678
-	.word	0x12345678
-	.word	0x12345678	/* now 16*4=64 */
-#else
-	ldr	pc, _undefined_instruction
-	ldr	pc, _software_interrupt
-	ldr	pc, _prefetch_abort
-	ldr	pc, _data_abort
-	ldr	pc, _not_used
-	ldr	pc, _irq
-	ldr	pc, _fiq
-
-_undefined_instruction: .word undefined_instruction
-_software_interrupt:	.word software_interrupt
-_prefetch_abort:	.word prefetch_abort
-_data_abort:		.word data_abort
-_not_used:		.word not_used
-_irq:			.word irq
-_fiq:			.word fiq
-_pad:			.word 0x12345678 /* now 16*4=64 */
-#endif	/* CONFIG_SPL_BUILD */
-.global _end_vect
-_end_vect:
-
-	.balignl 16,0xdeadbeef
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- *
- * do important init only if we don't start from memory!
- * setup Memory and board specific bits prior to relocation.
- * relocate armboot to ram
- * setup stack
- *
- *************************************************************************
- */
-
-#ifdef CONFIG_USE_IRQ
-/* IRQ stack memory (calculated at run-time) */
-.globl IRQ_STACK_START
-IRQ_STACK_START:
-	.word	0x0badc0de
-
-/* IRQ stack memory (calculated at run-time) */
-.globl FIQ_STACK_START
-FIQ_STACK_START:
-	.word 0x0badc0de
-#endif
-
-/* IRQ stack memory (calculated at run-time) + 8 bytes */
-.globl IRQ_STACK_START_IN
-IRQ_STACK_START_IN:
-	.word	0x0badc0de
-
-/*
- * the actual reset code
- */
-
-reset:
-	/*
-	 * set the cpu to SVC32 mode
-	 */
-	mrs	r0,cpsr
-	bic	r0,r0,#0x1f
-	orr	r0,r0,#0xd3
-	msr	cpsr,r0
-
-	/* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	bl  cpu_init_crit
-#endif
-
-	bl	_main
-
-/*------------------------------------------------------------------------------*/
-
-	.globl	c_runtime_cpu_setup
-c_runtime_cpu_setup:
-
-	bx	lr
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-cpu_init_crit:
-	/*
-	 * flush v4 I/D caches
-	 */
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c7, 0	/* Invalidate I+D+BTB caches */
-	mcr	p15, 0, r0, c8, c7, 0	/* Invalidate Unified TLB */
-
-	/*
-	 * disable MMU stuff and caches
-	 */
-	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
-	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
-	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
-	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
-	mcr	p15, 0, r0, c1, c0, 0
-
-	/*
-	 * Jump to board specific initialization... The Mask ROM will have already initialized
-	 * basic memory.  Go here to bump up clock rate and handle wake up conditions.
-	 */
-	mov	ip, lr		/* persevere link reg across call */
-	bl	lowlevel_init	/* go setup pll,mux,memory */
-	mov	lr, ip		/* restore link */
-	mov	pc, lr		/* back to my caller */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-
-#ifndef CONFIG_SPL_BUILD
-/*
- *************************************************************************
- *
- * Interrupt handling
- *
- *************************************************************************
- */
-@
-@ IRQ stack frame.
-@
-#define S_FRAME_SIZE	72
-
-#define S_OLD_R0	68
-#define S_PSR		64
-#define S_PC		60
-#define S_LR		56
-#define S_SP		52
-
-#define S_IP		48
-#define S_FP		44
-#define S_R10		40
-#define S_R9		36
-#define S_R8		32
-#define S_R7		28
-#define S_R6		24
-#define S_R5		20
-#define S_R4		16
-#define S_R3		12
-#define S_R2		8
-#define S_R1		4
-#define S_R0		0
-
-#define MODE_SVC 0x13
-#define I_BIT	 0x80
-
-/*
- * use bad_save_user_regs for abort/prefetch/undef/swi ...
- * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
- */
-
-	.macro	bad_save_user_regs
-	sub	sp, sp, #S_FRAME_SIZE		@ carve out a frame on current user stack
-	stmia	sp, {r0 - r12}			@ Save user registers (now in svc mode) r0-r12
-
-	ldr	r2, IRQ_STACK_START_IN		@ set base 2 words into abort stack
-	ldmia	r2, {r2 - r3}			@ get values for "aborted" pc and cpsr (into parm regs)
-	add	r0, sp, #S_FRAME_SIZE		@ grab pointer to old stack
-
-	add	r5, sp, #S_SP
-	mov	r1, lr
-	stmia	r5, {r0 - r3}			@ save sp_SVC, lr_SVC, pc, cpsr
-	mov	r0, sp				@ save current stack into r0 (param register)
-	.endm
-
-	.macro	irq_save_user_regs
-	sub	sp, sp, #S_FRAME_SIZE
-	stmia	sp, {r0 - r12}			@ Calling r0-r12
-	add	r8, sp, #S_PC			@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
-	stmdb	r8, {sp, lr}^			@ Calling SP, LR
-	str	lr, [r8, #0]			@ Save calling PC
-	mrs	r6, spsr
-	str	r6, [r8, #4]			@ Save CPSR
-	str	r0, [r8, #8]			@ Save OLD_R0
-	mov	r0, sp
-	.endm
-
-	.macro	irq_restore_user_regs
-	ldmia	sp, {r0 - lr}^			@ Calling r0 - lr
-	mov	r0, r0
-	ldr	lr, [sp, #S_PC]			@ Get PC
-	add	sp, sp, #S_FRAME_SIZE
-	subs	pc, lr, #4			@ return & move spsr_svc into cpsr
-	.endm
-
-	.macro get_bad_stack
-	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack (enter in banked mode)
-
-	str	lr, [r13]			@ save caller lr in position 0 of saved stack
-	mrs	lr, spsr			@ get the spsr
-	str	lr, [r13, #4]			@ save spsr in position 1 of saved stack
-
-	mov	r13, #MODE_SVC			@ prepare SVC-Mode
-	@ msr	spsr_c, r13
-	msr	spsr, r13			@ switch modes, make sure moves will execute
-	mov	lr, pc				@ capture return pc
-	movs	pc, lr				@ jump to next instruction & switch modes.
-	.endm
-
-	.macro get_bad_stack_swi
-	sub	r13, r13, #4			@ space on current stack for scratch reg.
-	str	r0, [r13]			@ save R0's value.
-	ldr	r0, IRQ_STACK_START_IN		@ get data regions start
-	str	lr, [r0]			@ save caller lr in position 0 of saved stack
-	mrs	lr, spsr			@ get the spsr
-	str	lr, [r0, #4]			@ save spsr in position 1 of saved stack
-	ldr	lr, [r0]			@ restore lr
-	ldr	r0, [r13]			@ restore r0
-	add	r13, r13, #4			@ pop stack entry
-	.endm
-
-	.macro get_irq_stack			@ setup IRQ stack
-	ldr	sp, IRQ_STACK_START
-	.endm
-
-	.macro get_fiq_stack			@ setup FIQ stack
-	ldr	sp, FIQ_STACK_START
-	.endm
-#endif	/* CONFIG_SPL_BUILD */
-
-/*
- * exception handlers
- */
-#ifdef CONFIG_SPL_BUILD
-	.align	5
-do_hang:
-	bl	hang				/* hang and never return */
-#else	/* !CONFIG_SPL_BUILD */
-	.align	5
-undefined_instruction:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_undefined_instruction
-
-	.align	5
-software_interrupt:
-	get_bad_stack_swi
-	bad_save_user_regs
-	bl	do_software_interrupt
-
-	.align	5
-prefetch_abort:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_prefetch_abort
-
-	.align	5
-data_abort:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_data_abort
-
-	.align	5
-not_used:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_not_used
-
-#ifdef CONFIG_USE_IRQ
-
-	.align	5
-irq:
-	get_irq_stack
-	irq_save_user_regs
-	bl	do_irq
-	irq_restore_user_regs
-
-	.align	5
-fiq:
-	get_fiq_stack
-	/* someone ought to write a more effiction fiq_save_user_regs */
-	irq_save_user_regs
-	bl	do_fiq
-	irq_restore_user_regs
-
-#else
-
-	.align	5
-irq:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_irq
-
-	.align	5
-fiq:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_fiq
-
-#endif
-	.align 5
-.global arm1136_cache_flush
-arm1136_cache_flush:
-#if !defined(CONFIG_SYS_ICACHE_OFF)
-		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I cache
-#endif
-#if !defined(CONFIG_SYS_DCACHE_OFF)
-		mcr	p15, 0, r1, c7, c14, 0	@ invalidate D cache
-#endif
-		mov	pc, lr			@ back to caller
-#endif	/* CONFIG_SPL_BUILD */

arch/arm/cpu/arm1136/u-boot-spl.lds

@@ -1,50 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2010
- * Texas Instruments, <www.ti.com>
- *	Aneesh V <aneesh@ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
-		LENGTH = CONFIG_SPL_MAX_SIZE }
-MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
-		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	.text      :
-	{
-	__start = .;
-	  arch/arm/cpu/arm1136/start.o	(.text*)
-	  *(.text*)
-	} >.sram
-
-	. = ALIGN(4);
-	.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
-
-	. = ALIGN(4);
-	.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
-	. = ALIGN(4);
-	__image_copy_end = .;
-
-	.end :
-	{
-		*(.__end)
-	}
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start = .;
-		*(.bss*)
-		. = ALIGN(4);
-		__bss_end = .;
-	} >.sdram
-}

arch/arm/cpu/arm1176/Makefile

@@ -1,12 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-extra-y	= start.o
-obj-y	= cpu.o

arch/arm/cpu/arm1176/bcm2835/Makefile

@@ -1,16 +0,0 @@
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# version 2 as published by the Free Software Foundation.
-#
-# This program is distributed in the hope that it will be useful, but
-# WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-obj-y	:= lowlevel_init.o
-obj-y	+= init.o reset.o timer.o mbox.o

arch/arm/cpu/arm1176/bcm2835/init.c

@@ -1,24 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-
-int arch_cpu_init(void)
-{
-	icache_enable();
-
-	return 0;
-}

arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S

@@ -1,19 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-.globl lowlevel_init
-lowlevel_init:
-	mov	pc, lr

arch/arm/cpu/arm1176/bcm2835/mbox.c

@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/mbox.h>
-
-#define TIMEOUT 1000 /* ms */
-
-int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
-{
-	struct bcm2835_mbox_regs *regs =
-		(struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR;
-	ulong endtime = get_timer(0) + TIMEOUT;
-	u32 val;
-
-	debug("time: %lu timeout: %lu\n", get_timer(0), endtime);
-
-	if (send & BCM2835_CHAN_MASK) {
-		printf("mbox: Illegal mbox data 0x%08x\n", send);
-		return -1;
-	}
-
-	/* Drain any stale responses */
-
-	for (;;) {
-		val = readl(&regs->status);
-		if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
-			break;
-		if (get_timer(0) >= endtime) {
-			printf("mbox: Timeout draining stale responses\n");
-			return -1;
-		}
-		val = readl(&regs->read);
-	}
-
-	/* Wait for space to send */
-
-	for (;;) {
-		val = readl(&regs->status);
-		if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
-			break;
-		if (get_timer(0) >= endtime) {
-			printf("mbox: Timeout waiting for send space\n");
-			return -1;
-		}
-	}
-
-	/* Send the request */
-
-	val = BCM2835_MBOX_PACK(chan, send);
-	debug("mbox: TX raw: 0x%08x\n", val);
-	writel(val, &regs->write);
-
-	/* Wait for the response */
-
-	for (;;) {
-		val = readl(&regs->status);
-		if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
-			break;
-		if (get_timer(0) >= endtime) {
-			printf("mbox: Timeout waiting for response\n");
-			return -1;
-		}
-	}
-
-	/* Read the response */
-
-	val = readl(&regs->read);
-	debug("mbox: RX raw: 0x%08x\n", val);
-
-	/* Validate the response */
-
-	if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) {
-		printf("mbox: Response channel mismatch\n");
-		return -1;
-	}
-
-	*recv = BCM2835_MBOX_UNPACK_DATA(val);
-
-	return 0;
-}
-
-#ifdef DEBUG
-void dump_buf(struct bcm2835_mbox_hdr *buffer)
-{
-	u32 *p;
-	u32 words;
-	int i;
-
-	p = (u32 *)buffer;
-	words = buffer->buf_size / 4;
-	for (i = 0; i < words; i++)
-		printf("    0x%04x: 0x%08x\n", i * 4, p[i]);
-}
-#endif
-
-int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)
-{
-	int ret;
-	u32 rbuffer;
-	struct bcm2835_mbox_tag_hdr *tag;
-	int tag_index;
-
-#ifdef DEBUG
-	printf("mbox: TX buffer\n");
-	dump_buf(buffer);
-#endif
-
-	ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer);
-	if (ret)
-		return ret;
-	if (rbuffer != (u32)buffer) {
-		printf("mbox: Response buffer mismatch\n");
-		return -1;
-	}
-
-#ifdef DEBUG
-	printf("mbox: RX buffer\n");
-	dump_buf(buffer);
-#endif
-
-	/* Validate overall response status */
-
-	if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) {
-		printf("mbox: Header response code invalid\n");
-		return -1;
-	}
-
-	/* Validate each tag's response status */
-
-	tag = (void *)(buffer + 1);
-	tag_index = 0;
-	while (tag->tag) {
-		if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) {
-			printf("mbox: Tag %d missing val_len response bit\n",
-				tag_index);
-			return -1;
-		}
-		/*
-		 * Clear the reponse bit so clients can just look right at the
-		 * length field without extra processing
-		 */
-		tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE;
-		tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size);
-		tag_index++;
-	}
-
-	return 0;
-}

arch/arm/cpu/arm1176/bcm2835/reset.c

@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/wdog.h>
-
-#define RESET_TIMEOUT 10
-
-void reset_cpu(ulong addr)
-{
-	struct bcm2835_wdog_regs *regs =
-		(struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
-	uint32_t rstc;
-
-	rstc = readl(&regs->rstc);
-	rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
-	rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
-
-	writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, &regs->wdog);
-	writel(BCM2835_WDOG_PASSWORD | rstc, &regs->rstc);
-}

arch/arm/cpu/arm1176/bcm2835/timer.c

@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2012 Stephen Warren
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/timer.h>
-
-ulong get_timer_us(ulong base)
-{
-	struct bcm2835_timer_regs *regs =
-		(struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
-
-	return readl(&regs->clo) - base;
-}
-
-ulong get_timer(ulong base)
-{
-	ulong us = get_timer_us(0);
-	us /= (1000000 / CONFIG_SYS_HZ);
-	us -= base;
-	return us;
-}
-
-unsigned long long get_ticks(void)
-{
-	return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}
-
-void __udelay(unsigned long usec)
-{
-	ulong endtime;
-	signed long diff;
-
-	endtime = get_timer_us(0) + usec;
-
-	do {
-		ulong now = get_timer_us(0);
-		diff = endtime - now;
-	} while (diff >= 0);
-}

arch/arm/cpu/arm1176/config.mk

@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-# Make ARMv5 to allow more compilers to work, even though its v6.
-PLATFORM_CPPFLAGS += -march=armv5t

arch/arm/cpu/arm1176/cpu.c

@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2004 Texas Insturments
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * CPU specific code
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/system.h>
-
-static void cache_flush (void);
-
-int cleanup_before_linux (void)
-{
-	/*
-	 * this function is called just before we call linux
-	 * it prepares the processor for linux
-	 *
-	 * we turn off caches etc ...
-	 */
-
-	disable_interrupts ();
-
-	/* turn off I/D-cache */
-	icache_disable();
-	dcache_disable();
-	/* flush I/D-cache */
-	cache_flush();
-
-	return 0;
-}
-
-/* flush I/D-cache */
-static void cache_flush (void)
-{
-	/* invalidate both caches and flush btb */
-	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
-	/* mem barrier to sync things */
-	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
-}

arch/arm/cpu/arm1176/start.S

@@ -1,331 +0,0 @@
-/*
- *  armboot - Startup Code for ARM1176 CPU-core
- *
- * Copyright (c) 2007	Samsung Electronics
- *
- * Copyright (C) 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
- * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
- * jsgood (jsgood.yang@samsung.com)
- * Base codes by scsuh (sc.suh)
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <version.h>
-
-#ifndef CONFIG_SYS_PHY_UBOOT_BASE
-#define CONFIG_SYS_PHY_UBOOT_BASE	CONFIG_SYS_UBOOT_BASE
-#endif
-
-/*
- *************************************************************************
- *
- * Jump vector table as in table 3.1 in [1]
- *
- *************************************************************************
- */
-
-.globl _start
-_start: b	reset
-#ifndef CONFIG_SPL_BUILD
-	ldr	pc, _undefined_instruction
-	ldr	pc, _software_interrupt
-	ldr	pc, _prefetch_abort
-	ldr	pc, _data_abort
-	ldr	pc, _not_used
-	ldr	pc, _irq
-	ldr	pc, _fiq
-
-_undefined_instruction:
-	.word undefined_instruction
-_software_interrupt:
-	.word software_interrupt
-_prefetch_abort:
-	.word prefetch_abort
-_data_abort:
-	.word data_abort
-_not_used:
-	.word not_used
-_irq:
-	.word irq
-_fiq:
-	.word fiq
-_pad:
-	.word 0x12345678 /* now 16*4=64 */
-#else
-	. = _start + 64
-#endif
-
-.global _end_vect
-_end_vect:
-	.balignl 16,0xdeadbeef
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- *
- * do important init only if we don't start from memory!
- * setup Memory and board specific bits prior to relocation.
- * relocate armboot to ram
- * setup stack
- *
- *************************************************************************
- */
-
-/* IRQ stack memory (calculated at run-time) + 8 bytes */
-.globl IRQ_STACK_START_IN
-IRQ_STACK_START_IN:
-	.word	0x0badc0de
-
-/*
- * the actual reset code
- */
-
-reset:
-	/*
-	 * set the cpu to SVC32 mode
-	 */
-	mrs	r0, cpsr
-	bic	r0, r0, #0x3f
-	orr	r0, r0, #0xd3
-	msr	cpsr, r0
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
-	/*
-	 * we do sys-critical inits only at reboot,
-	 * not when booting from ram!
-	 */
-cpu_init_crit:
-	/*
-	 * When booting from NAND - it has definitely been a reset, so, no need
-	 * to flush caches and disable the MMU
-	 */
-#ifndef CONFIG_SPL_BUILD
-	/*
-	 * flush v4 I/D caches
-	 */
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c7, 0	/* flush v3/v4 cache */
-	mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
-
-	/*
-	 * disable MMU stuff and caches
-	 */
-	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
-	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
-	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
-	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
-
-	/* Prepare to disable the MMU */
-	adr	r2, mmu_disable_phys
-	sub	r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
-	b	mmu_disable
-
-	.align 5
-	/* Run in a single cache-line */
-mmu_disable:
-	mcr	p15, 0, r0, c1, c0, 0
-	nop
-	nop
-	mov	pc, r2
-mmu_disable_phys:
-
-#ifdef CONFIG_DISABLE_TCM
-	/*
-	 * Disable the TCMs
-	 */
-	mrc	p15, 0, r0, c0, c0, 2	/* Return TCM details */
-	cmp	r0, #0
-	beq	skip_tcmdisable
-	mov	r1, #0
-	mov	r2, #1
-	tst	r0, r2
-	mcrne	p15, 0, r1, c9, c1, 1	/* Disable Instruction TCM if present*/
-	tst	r0, r2, LSL #16
-	mcrne	p15, 0, r1, c9, c1, 0	/* Disable Data TCM if present*/
-skip_tcmdisable:
-#endif
-#endif
-
-#ifdef CONFIG_PERIPORT_REMAP
-	/* Peri port setup */
-	ldr	r0, =CONFIG_PERIPORT_BASE
-	orr	r0, r0, #CONFIG_PERIPORT_SIZE
-	mcr	p15,0,r0,c15,c2,4
-#endif
-
-	/*
-	 * Go setup Memory and board specific bits prior to relocation.
-	 */
-	bl	lowlevel_init		/* go setup pll,mux,memory */
-
-	bl	_main
-
-/*------------------------------------------------------------------------------*/
-
-	.globl	c_runtime_cpu_setup
-c_runtime_cpu_setup:
-
-	mov	pc, lr
-
-#ifndef CONFIG_SPL_BUILD
-/*
- *************************************************************************
- *
- * Interrupt handling
- *
- *************************************************************************
- */
-@
-@ IRQ stack frame.
-@
-#define S_FRAME_SIZE	72
-
-#define S_OLD_R0	68
-#define S_PSR		64
-#define S_PC		60
-#define S_LR		56
-#define S_SP		52
-
-#define S_IP		48
-#define S_FP		44
-#define S_R10		40
-#define S_R9		36
-#define S_R8		32
-#define S_R7		28
-#define S_R6		24
-#define S_R5		20
-#define S_R4		16
-#define S_R3		12
-#define S_R2		8
-#define S_R1		4
-#define S_R0		0
-
-#define MODE_SVC 0x13
-#define I_BIT	 0x80
-
-/*
- * use bad_save_user_regs for abort/prefetch/undef/swi ...
- */
-
-	.macro	bad_save_user_regs
-	/* carve out a frame on current user stack */
-	sub	sp, sp, #S_FRAME_SIZE
-	/* Save user registers (now in svc mode) r0-r12 */
-	stmia	sp, {r0 - r12}
-
-	ldr	r2, IRQ_STACK_START_IN
-	/* get values for "aborted" pc and cpsr (into parm regs) */
-	ldmia	r2, {r2 - r3}
-	/* grab pointer to old stack */
-	add	r0, sp, #S_FRAME_SIZE
-
-	add	r5, sp, #S_SP
-	mov	r1, lr
-	/* save sp_SVC, lr_SVC, pc, cpsr */
-	stmia	r5, {r0 - r3}
-	/* save current stack into r0 (param register) */
-	mov	r0, sp
-	.endm
-
-	.macro get_bad_stack
-	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack
-
-	/* save caller lr in position 0 of saved stack */
-	str	lr, [r13]
-	/* get the spsr */
-	mrs	lr, spsr
-	/* save spsr in position 1 of saved stack */
-	str	lr, [r13, #4]
-
-	/* prepare SVC-Mode */
-	mov	r13, #MODE_SVC
-	@ msr	spsr_c, r13
-	/* switch modes, make sure moves will execute */
-	msr	spsr, r13
-	/* capture return pc */
-	mov	lr, pc
-	/* jump to next instruction & switch modes. */
-	movs	pc, lr
-	.endm
-
-	.macro get_bad_stack_swi
-	/* space on current stack for scratch reg. */
-	sub	r13, r13, #4
-	/* save R0's value. */
-	str	r0, [r13]
-	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack
-	/* save caller lr in position 0 of saved stack */
-	str	lr, [r0]
-	/* get the spsr */
-	mrs	lr, spsr
-	/* save spsr in position 1 of saved stack */
-	str	lr, [r0, #4]
-	/* restore lr */
-	ldr	lr, [r0]
-	/* restore r0 */
-	ldr	r0, [r13]
-	/* pop stack entry */
-	add	r13, r13, #4
-	.endm
-
-/*
- * exception handlers
- */
-	.align	5
-undefined_instruction:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_undefined_instruction
-
-	.align	5
-software_interrupt:
-	get_bad_stack_swi
-	bad_save_user_regs
-	bl	do_software_interrupt
-
-	.align	5
-prefetch_abort:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_prefetch_abort
-
-	.align	5
-data_abort:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_data_abort
-
-	.align	5
-not_used:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_not_used
-
-	.align	5
-irq:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_irq
-
-	.align	5
-fiq:
-	get_bad_stack
-	bad_save_user_regs
-	bl	do_fiq
-#endif /* CONFIG_SPL_BUILD */

arch/arm/cpu/arm1176/tnetv107x/Makefile

@@ -1,6 +0,0 @@
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	+= aemif.o clock.o init.o mux.o timer.o
-obj-y	+= lowlevel_init.o

arch/arm/cpu/arm1176/tnetv107x/aemif.c

@@ -1,78 +0,0 @@
-/*
- * TNETV107X: Asynchronous EMIF Configuration
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/mux.h>
-
-#define ASYNC_EMIF_BASE			TNETV107X_ASYNC_EMIF_CNTRL_BASE
-#define ASYNC_EMIF_CONFIG(cs)		(ASYNC_EMIF_BASE+0x10+(cs)*4)
-#define ASYNC_EMIF_ONENAND_CONTROL	(ASYNC_EMIF_BASE+0x5c)
-#define ASYNC_EMIF_NAND_CONTROL		(ASYNC_EMIF_BASE+0x60)
-#define ASYNC_EMIF_WAITCYCLE_CONFIG	(ASYNC_EMIF_BASE+0x4)
-
-#define CONFIG_SELECT_STROBE(v)		((v) ? 1 << 31 : 0)
-#define CONFIG_EXTEND_WAIT(v)		((v) ? 1 << 30 : 0)
-#define CONFIG_WR_SETUP(v)		(((v) & 0x0f) << 26)
-#define CONFIG_WR_STROBE(v)		(((v) & 0x3f) << 20)
-#define CONFIG_WR_HOLD(v)		(((v) & 0x07) << 17)
-#define CONFIG_RD_SETUP(v)		(((v) & 0x0f) << 13)
-#define CONFIG_RD_STROBE(v)		(((v) & 0x3f) << 7)
-#define CONFIG_RD_HOLD(v)		(((v) & 0x07) << 4)
-#define CONFIG_TURN_AROUND(v)		(((v) & 0x03) << 2)
-#define CONFIG_WIDTH(v)			(((v) & 0x03) << 0)
-
-#define NUM_CS				4
-
-#define set_config_field(reg, field, val)			\
-	do {							\
-		if (val != -1) {				\
-			reg &= ~CONFIG_##field(0xffffffff);	\
-			reg |=	CONFIG_##field(val);		\
-		}						\
-	} while (0)
-
-void configure_async_emif(int cs, struct async_emif_config *cfg)
-{
-	unsigned long tmp;
-
-	if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
-		tmp = __raw_readl(ASYNC_EMIF_NAND_CONTROL);
-		tmp |= (1 << cs);
-		__raw_writel(tmp, ASYNC_EMIF_NAND_CONTROL);
-
-	} else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
-		tmp = __raw_readl(ASYNC_EMIF_ONENAND_CONTROL);
-		tmp |= (1 << cs);
-		__raw_writel(tmp, ASYNC_EMIF_ONENAND_CONTROL);
-	}
-
-	tmp = __raw_readl(ASYNC_EMIF_CONFIG(cs));
-
-	set_config_field(tmp, SELECT_STROBE,	cfg->select_strobe);
-	set_config_field(tmp, EXTEND_WAIT,	cfg->extend_wait);
-	set_config_field(tmp, WR_SETUP,		cfg->wr_setup);
-	set_config_field(tmp, WR_STROBE,	cfg->wr_strobe);
-	set_config_field(tmp, WR_HOLD,		cfg->wr_hold);
-	set_config_field(tmp, RD_SETUP,		cfg->rd_setup);
-	set_config_field(tmp, RD_STROBE,	cfg->rd_strobe);
-	set_config_field(tmp, RD_HOLD,		cfg->rd_hold);
-	set_config_field(tmp, TURN_AROUND,	cfg->turn_around);
-	set_config_field(tmp, WIDTH,		cfg->width);
-
-	__raw_writel(tmp, ASYNC_EMIF_CONFIG(cs));
-}
-
-void init_async_emif(int num_cs, struct async_emif_config *config)
-{
-	int cs;
-
-	clk_enable(TNETV107X_LPSC_AEMIF);
-
-	for (cs = 0; cs < num_cs; cs++)
-		configure_async_emif(cs, config + cs);
-}

arch/arm/cpu/arm1176/tnetv107x/clock.c

@@ -1,432 +0,0 @@
-/*
- * TNETV107X: Clock management APIs
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm-generic/errno.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/arch/clock.h>
-
-#define CLOCK_BASE		TNETV107X_CLOCK_CONTROL_BASE
-#define PSC_BASE		TNETV107X_PSC_BASE
-
-#define BIT(x)			(1 << (x))
-
-#define MAX_PREDIV		64
-#define MAX_POSTDIV		8
-#define MAX_MULT		512
-#define MAX_DIV			(MAX_PREDIV * MAX_POSTDIV)
-
-/* LPSC registers */
-#define PSC_PTCMD		0x120
-#define PSC_PTSTAT		0x128
-#define PSC_MDSTAT(n)		(0x800 + (n) * 4)
-#define PSC_MDCTL(n)		(0xA00 + (n) * 4)
-
-#define PSC_MDCTL_LRSTZ		BIT(8)
-
-#define psc_reg_read(reg)	__raw_readl((u32 *)(PSC_BASE + (reg)))
-#define psc_reg_write(reg, val)	__raw_writel(val, (u32 *)(PSC_BASE + (reg)))
-
-/* SSPLL registers */
-struct sspll_regs {
-	u32	modes;
-	u32	postdiv;
-	u32	prediv;
-	u32	mult_factor;
-	u32	divider_range;
-	u32	bw_divider;
-	u32	spr_amount;
-	u32	spr_rate_div;
-	u32	diag;
-};
-
-/* SSPLL base addresses */
-static struct sspll_regs *sspll_regs[] = {
-	(struct sspll_regs *)(CLOCK_BASE + 0x040),
-	(struct sspll_regs *)(CLOCK_BASE + 0x080),
-	(struct sspll_regs *)(CLOCK_BASE + 0x0c0),
-};
-
-#define sspll_reg(pll, reg)		(&(sspll_regs[pll]->reg))
-#define sspll_reg_read(pll, reg)	__raw_readl(sspll_reg(pll, reg))
-#define sspll_reg_write(pll, reg, val)	__raw_writel(val, sspll_reg(pll, reg))
-
-
-/* PLL Control Registers */
-struct pllctl_regs {
-	u32	ctl;		/* 00 */
-	u32	ocsel;		/* 04 */
-	u32	secctl;		/* 08 */
-	u32	__pad0;
-	u32	mult;		/* 10 */
-	u32	prediv;		/* 14 */
-	u32	div1;		/* 18 */
-	u32	div2;		/* 1c */
-	u32	div3;		/* 20 */
-	u32	oscdiv1;	/* 24 */
-	u32	postdiv;	/* 28 */
-	u32	bpdiv;		/* 2c */
-	u32	wakeup;		/* 30 */
-	u32	__pad1;
-	u32	cmd;		/* 38 */
-	u32	stat;		/* 3c */
-	u32	alnctl;		/* 40 */
-	u32	dchange;	/* 44 */
-	u32	cken;		/* 48 */
-	u32	ckstat;		/* 4c */
-	u32	systat;		/* 50 */
-	u32	ckctl;		/* 54 */
-	u32	__pad2[2];
-	u32	div4;		/* 60 */
-	u32	div5;		/* 64 */
-	u32	div6;		/* 68 */
-	u32	div7;		/* 6c */
-	u32	div8;		/* 70 */
-};
-
-struct lpsc_map {
-	int	pll, div;
-};
-
-static struct pllctl_regs *pllctl_regs[] = {
-	(struct pllctl_regs *)(CLOCK_BASE + 0x700),
-	(struct pllctl_regs *)(CLOCK_BASE + 0x300),
-	(struct pllctl_regs *)(CLOCK_BASE + 0x500),
-};
-
-#define pllctl_reg(pll, reg)		(&(pllctl_regs[pll]->reg))
-#define pllctl_reg_read(pll, reg)	__raw_readl(pllctl_reg(pll, reg))
-#define pllctl_reg_write(pll, reg, val)	__raw_writel(val, pllctl_reg(pll, reg))
-
-#define pllctl_reg_rmw(pll, reg, mask, val)			\
-	pllctl_reg_write(pll, reg,				\
-		(pllctl_reg_read(pll, reg) & ~(mask)) | val)
-
-#define pllctl_reg_setbits(pll, reg, mask)			\
-	pllctl_reg_rmw(pll, reg, 0, mask)
-
-#define pllctl_reg_clrbits(pll, reg, mask)			\
-	pllctl_reg_rmw(pll, reg, mask, 0)
-
-/* PLLCTL Bits */
-#define PLLCTL_CLKMODE		BIT(8)
-#define PLLCTL_PLLSELB		BIT(7)
-#define PLLCTL_PLLENSRC		BIT(5)
-#define PLLCTL_PLLDIS		BIT(4)
-#define PLLCTL_PLLRST		BIT(3)
-#define PLLCTL_PLLPWRDN		BIT(1)
-#define PLLCTL_PLLEN		BIT(0)
-
-#define PLLDIV_ENABLE		BIT(15)
-
-static int pll_div_offset[] = {
-#define div_offset(reg)	offsetof(struct pllctl_regs, reg)
-	div_offset(div1), div_offset(div2), div_offset(div3),
-	div_offset(div4), div_offset(div5), div_offset(div6),
-	div_offset(div7), div_offset(div8),
-};
-
-static unsigned long pll_bypass_mask[] = { 1, 4, 2 };
-static unsigned long pll_div_mask[] = { 0x01ff, 0x00ff, 0x00ff };
-
-/* Mappings from PLL+DIV to subsystem clocks */
-#define sys_arm1176_clk		{SYS_PLL, 0}
-#define sys_dsp_clk		{SYS_PLL, 1}
-#define sys_ddr_clk		{SYS_PLL, 2}
-#define sys_full_clk		{SYS_PLL, 3}
-#define sys_lcd_clk		{SYS_PLL, 4}
-#define sys_vlynq_ref_clk	{SYS_PLL, 5}
-#define sys_tsc_clk		{SYS_PLL, 6}
-#define sys_half_clk		{SYS_PLL, 7}
-
-#define eth_clk_5		{ETH_PLL, 0}
-#define eth_clk_50		{ETH_PLL, 1}
-#define eth_clk_125		{ETH_PLL, 2}
-#define eth_clk_250		{ETH_PLL, 3}
-#define eth_clk_25		{ETH_PLL, 4}
-
-#define tdm_clk			{TDM_PLL, 0}
-#define tdm_extra_clk		{TDM_PLL, 1}
-#define tdm1_clk		{TDM_PLL, 2}
-
-static const struct lpsc_map lpsc_clk_map[] = {
-	[TNETV107X_LPSC_ARM]			= sys_arm1176_clk,
-	[TNETV107X_LPSC_GEM]			= sys_dsp_clk,
-	[TNETV107X_LPSC_DDR2_PHY]		= sys_ddr_clk,
-	[TNETV107X_LPSC_TPCC]			= sys_full_clk,
-	[TNETV107X_LPSC_TPTC0]			= sys_full_clk,
-	[TNETV107X_LPSC_TPTC1]			= sys_full_clk,
-	[TNETV107X_LPSC_RAM]			= sys_full_clk,
-	[TNETV107X_LPSC_MBX_LITE]		= sys_arm1176_clk,
-	[TNETV107X_LPSC_LCD]			= sys_lcd_clk,
-	[TNETV107X_LPSC_ETHSS]			= eth_clk_125,
-	[TNETV107X_LPSC_AEMIF]			= sys_full_clk,
-	[TNETV107X_LPSC_CHIP_CFG]		= sys_half_clk,
-	[TNETV107X_LPSC_TSC]			= sys_tsc_clk,
-	[TNETV107X_LPSC_ROM]			= sys_half_clk,
-	[TNETV107X_LPSC_UART2]			= sys_half_clk,
-	[TNETV107X_LPSC_PKTSEC]			= sys_half_clk,
-	[TNETV107X_LPSC_SECCTL]			= sys_half_clk,
-	[TNETV107X_LPSC_KEYMGR]			= sys_half_clk,
-	[TNETV107X_LPSC_KEYPAD]			= sys_half_clk,
-	[TNETV107X_LPSC_GPIO]			= sys_half_clk,
-	[TNETV107X_LPSC_MDIO]			= sys_half_clk,
-	[TNETV107X_LPSC_SDIO0]			= sys_half_clk,
-	[TNETV107X_LPSC_UART0]			= sys_half_clk,
-	[TNETV107X_LPSC_UART1]			= sys_half_clk,
-	[TNETV107X_LPSC_TIMER0]			= sys_half_clk,
-	[TNETV107X_LPSC_TIMER1]			= sys_half_clk,
-	[TNETV107X_LPSC_WDT_ARM]		= sys_half_clk,
-	[TNETV107X_LPSC_WDT_DSP]		= sys_half_clk,
-	[TNETV107X_LPSC_SSP]			= sys_half_clk,
-	[TNETV107X_LPSC_TDM0]			= tdm_clk,
-	[TNETV107X_LPSC_VLYNQ]			= sys_vlynq_ref_clk,
-	[TNETV107X_LPSC_MCDMA]			= sys_half_clk,
-	[TNETV107X_LPSC_USB0]			= sys_half_clk,
-	[TNETV107X_LPSC_TDM1]			= tdm1_clk,
-	[TNETV107X_LPSC_DEBUGSS]		= sys_half_clk,
-	[TNETV107X_LPSC_ETHSS_RGMII]		= eth_clk_250,
-	[TNETV107X_LPSC_SYSTEM]			= sys_half_clk,
-	[TNETV107X_LPSC_IMCOP]			= sys_dsp_clk,
-	[TNETV107X_LPSC_SPARE]			= sys_half_clk,
-	[TNETV107X_LPSC_SDIO1]			= sys_half_clk,
-	[TNETV107X_LPSC_USB1]			= sys_half_clk,
-	[TNETV107X_LPSC_USBSS]			= sys_half_clk,
-	[TNETV107X_LPSC_DDR2_EMIF1_VRST]	= sys_ddr_clk,
-	[TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST]	= sys_ddr_clk,
-};
-
-static const unsigned long pll_ext_freq[] = {
-	[SYS_PLL] = CONFIG_PLL_SYS_EXT_FREQ,
-	[ETH_PLL] = CONFIG_PLL_ETH_EXT_FREQ,
-	[TDM_PLL] = CONFIG_PLL_TDM_EXT_FREQ,
-};
-
-static unsigned long pll_freq_get(int pll)
-{
-	unsigned long mult = 1, prediv = 1, postdiv = 1;
-	unsigned long ref = CONFIG_SYS_INT_OSC_FREQ;
-	unsigned long ret;
-	u32 bypass;
-
-	bypass = __raw_readl((u32 *)(CLOCK_BASE));
-	if (!(bypass & pll_bypass_mask[pll])) {
-		mult	= sspll_reg_read(pll, mult_factor);
-		prediv	= sspll_reg_read(pll, prediv) + 1;
-		postdiv	= sspll_reg_read(pll, postdiv) + 1;
-	}
-
-	if (pllctl_reg_read(pll, ctl) & PLLCTL_CLKMODE)
-		ref = pll_ext_freq[pll];
-
-	if (!(pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN))
-		return ref;
-
-	ret = (unsigned long)(ref + ((unsigned long long)ref * mult) / 256);
-	ret /= (prediv * postdiv);
-
-	return ret;
-}
-
-static unsigned long __pll_div_freq_get(int pll, unsigned int fpll,
-					int div)
-{
-	int divider = 1;
-	unsigned long divreg;
-
-	divreg = __raw_readl((void *)pllctl_regs[pll] + pll_div_offset[div]);
-
-	if (divreg & PLLDIV_ENABLE)
-		divider = (divreg & pll_div_mask[pll]) + 1;
-
-	return fpll / divider;
-}
-
-static unsigned long pll_div_freq_get(int pll, int div)
-{
-	unsigned int fpll = pll_freq_get(pll);
-
-	return __pll_div_freq_get(pll, fpll, div);
-}
-
-static void __pll_div_freq_set(int pll, unsigned int fpll, int div,
-			       unsigned long hz)
-{
-	int divider = (fpll / hz - 1);
-
-	divider &= pll_div_mask[pll];
-	divider |= PLLDIV_ENABLE;
-
-	__raw_writel(divider, (void *)pllctl_regs[pll] + pll_div_offset[div]);
-	pllctl_reg_setbits(pll, alnctl, (1 << div));
-	pllctl_reg_setbits(pll, dchange, (1 << div));
-}
-
-static unsigned long pll_div_freq_set(int pll, int div, unsigned long hz)
-{
-	unsigned int fpll = pll_freq_get(pll);
-
-	__pll_div_freq_set(pll, fpll, div, hz);
-
-	pllctl_reg_write(pll, cmd, 1);
-
-	/* Wait until new divider takes effect */
-	while (pllctl_reg_read(pll, stat) & 0x01);
-
-	return __pll_div_freq_get(pll, fpll, div);
-}
-
-unsigned long clk_get_rate(unsigned int clk)
-{
-	return pll_div_freq_get(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div);
-}
-
-unsigned long clk_round_rate(unsigned int clk, unsigned long hz)
-{
-	unsigned long fpll, divider, pll;
-
-	pll = lpsc_clk_map[clk].pll;
-	fpll = pll_freq_get(pll);
-	divider = (fpll / hz - 1);
-	divider &= pll_div_mask[pll];
-
-	return fpll / (divider + 1);
-}
-
-int clk_set_rate(unsigned int clk, unsigned long _hz)
-{
-	unsigned long hz;
-
-	hz = clk_round_rate(clk, _hz);
-	if (hz != _hz)
-		return -EINVAL;	/* Cannot set to target freq */
-
-	pll_div_freq_set(lpsc_clk_map[clk].pll, lpsc_clk_map[clk].div, hz);
-	return 0;
-}
-
-void lpsc_control(int mod, unsigned long state, int lrstz)
-{
-	u32 mdctl;
-
-	mdctl = psc_reg_read(PSC_MDCTL(mod));
-	mdctl &= ~0x1f;
-	mdctl |= state;
-
-	if (lrstz == 0)
-		mdctl &= ~PSC_MDCTL_LRSTZ;
-	else if (lrstz == 1)
-		mdctl |= PSC_MDCTL_LRSTZ;
-
-	psc_reg_write(PSC_MDCTL(mod), mdctl);
-
-	psc_reg_write(PSC_PTCMD, 1);
-
-	/* wait for power domain transition to end */
-	while (psc_reg_read(PSC_PTSTAT) & 1);
-
-	/* Wait for module state change */
-	while ((psc_reg_read(PSC_MDSTAT(mod)) & 0x1f) != state);
-}
-
-int lpsc_status(unsigned int id)
-{
-	return psc_reg_read(PSC_MDSTAT(id)) & 0x1f;
-}
-
-static void init_pll(const struct pll_init_data *data)
-{
-	unsigned long fpll;
-	unsigned long best_pre = 0, best_post = 0, best_mult = 0;
-	unsigned long div, prediv, postdiv, mult;
-	unsigned long delta, actual;
-	long best_delta = -1;
-	int i;
-	u32 tmp;
-
-	if (data->pll == SYS_PLL)
-		return; /* cannot reconfigure system pll on the fly */
-
-	tmp = pllctl_reg_read(data->pll, ctl);
-	if (data->internal_osc) {
-		tmp &= ~PLLCTL_CLKMODE;
-		fpll = CONFIG_SYS_INT_OSC_FREQ;
-	} else {
-		tmp |= PLLCTL_CLKMODE;
-		fpll = pll_ext_freq[data->pll];
-	}
-	pllctl_reg_write(data->pll, ctl, tmp);
-
-	mult = data->pll_freq / fpll;
-	for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) {
-		div = (fpll * mult) / data->pll_freq;
-		if (div < 1 || div > MAX_DIV)
-			continue;
-
-		for (postdiv = 1; postdiv <= min(div, MAX_POSTDIV); postdiv++) {
-			prediv = div / postdiv;
-			if (prediv < 1 || prediv > MAX_PREDIV)
-				continue;
-
-			actual = (fpll / prediv) * (mult / postdiv);
-			delta = (actual - data->pll_freq);
-			if (delta < 0)
-				delta = -delta;
-			if ((delta < best_delta) || (best_delta == -1)) {
-				best_delta = delta;
-				best_mult = mult;
-				best_pre = prediv;
-				best_post = postdiv;
-				if (delta == 0)
-					goto done;
-			}
-		}
-	}
-done:
-
-	if (best_delta == -1) {
-		printf("pll cannot derive %lu from %lu\n",
-				data->pll_freq, fpll);
-		return;
-	}
-
-	fpll = fpll * best_mult;
-	fpll /= best_pre * best_post;
-
-	pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLENSRC);
-	pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLEN);
-
-	pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLRST);
-
-	pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLPWRDN);
-	pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLDIS);
-
-	sspll_reg_write(data->pll, mult_factor,	(best_mult - 1) << 8);
-	sspll_reg_write(data->pll, prediv,	best_pre - 1);
-	sspll_reg_write(data->pll, postdiv,	best_post - 1);
-
-	for (i = 0; i < 10; i++)
-		if (data->div_freq[i])
-			__pll_div_freq_set(data->pll, fpll, i,
-					   data->div_freq[i]);
-
-	pllctl_reg_write(data->pll, cmd, 1);
-
-	/* Wait until pll "go" operation completes */
-	while (pllctl_reg_read(data->pll, stat) & 0x01);
-
-	pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLRST);
-	pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLEN);
-}
-
-void init_plls(int num_pll, struct pll_init_data *config)
-{
-	int i;
-
-	for (i = 0; i < num_pll; i++)
-		init_pll(&config[i]);
-}

arch/arm/cpu/arm1176/tnetv107x/init.c

@@ -1,22 +0,0 @@
-/*
- * TNETV107X: Architecture initialization
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-
-void chip_configuration_unlock(void)
-{
-       __raw_writel(TNETV107X_KICK0_MAGIC, TNETV107X_KICK0);
-       __raw_writel(TNETV107X_KICK1_MAGIC, TNETV107X_KICK1);
-}
-
-int arch_cpu_init(void)
-{
-       icache_enable();
-       chip_configuration_unlock();
-
-       return 0;
-}

arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S

@@ -1,10 +0,0 @@
-/*
- * TNETV107X: Low-level pre-relocation initialization
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-.globl lowlevel_init
-lowlevel_init:
-	/* nothing for now, maybe needed for more exotic boot modes */
-	mov	pc, lr

arch/arm/cpu/arm1176/tnetv107x/mux.c

@@ -1,319 +0,0 @@
-/*
- * TNETV107X: Pinmux configuration
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/mux.h>
-
-#define MUX_MODE_1		0x00
-#define MUX_MODE_2		0x04
-#define MUX_MODE_3		0x0c
-#define MUX_MODE_4		0x1c
-
-#define MUX_DEBUG		0
-
-static const struct pin_config pin_table[] = {
-	/*		  reg	shift	mode	*/
-	TNETV107X_MUX_CFG(0,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(0,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(0,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(0,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(0,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(0,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(0,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(1,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(1,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(2,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(2,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(3,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(3,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	10,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(3,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(3,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	20,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(3,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(3,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(3,	25,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(4,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(4,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(4,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(4,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	20,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(4,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(4,	25,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	10,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	20,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(5,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(5,	25,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	10,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	20,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(6,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(6,	25,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(7,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(7,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(7,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	10,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(7,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(7,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(7,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(7,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(8,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(8,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(8,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(8,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(8,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(8,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(8,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(9,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	0,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(9,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(9,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	5,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(9,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(9,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	10,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(9,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(9,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(9,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(9,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(9,	20,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(10,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(10,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(10,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(10,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(10,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(10,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(10,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(11,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(11,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(12,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(13,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(13,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(13,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(13,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(14,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(15,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(15,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(15,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(16,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(16,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(16,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(16,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(16,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(16,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(16,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(17,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(17,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(17,	0,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(17,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(17,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(17,	5,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(17,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(17,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(17,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(17,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(17,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(17,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(18,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(18,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(18,	0,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(18,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(18,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(18,	5,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(18,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(18,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(18,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(18,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(18,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(18,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(19,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(19,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(19,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(19,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(19,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(19,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(20,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(20,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(21,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	5,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(22,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(22,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(22,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(22,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	20,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(22,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(22,	25,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(23,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(23,	0,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(23,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(23,	5,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(23,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(23,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(24,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(24,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(24,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(24,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(24,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(24,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(24,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(24,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(24,	25,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(25,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(25,	0,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(25,	0,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(25,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(25,	5,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(25,	5,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(25,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(25,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(25,	10,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(25,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(25,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(25,	15,	MUX_MODE_3),
-	TNETV107X_MUX_CFG(25,	15,	MUX_MODE_4),
-	TNETV107X_MUX_CFG(26,	0,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	5,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	10,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	10,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(26,	15,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	15,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(26,	20,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	20,	MUX_MODE_2),
-	TNETV107X_MUX_CFG(26,	25,	MUX_MODE_1),
-	TNETV107X_MUX_CFG(26,	25,	MUX_MODE_2),
-};
-
-const int pin_table_size = sizeof(pin_table) / sizeof(pin_table[0]);
-
-int mux_select_pin(short index)
-{
-	const struct pin_config *cfg;
-	unsigned long mask, mode, reg;
-
-	if (index >= pin_table_size)
-		return 0;
-
-	cfg = &pin_table[index];
-
-	mask = 0x1f << cfg->mask_offset;
-	mode = cfg->mode << cfg->mask_offset;
-
-	reg = __raw_readl(TNETV107X_PINMUX(cfg->reg_index));
-	reg = (reg & ~mask) | mode;
-	__raw_writel(reg, TNETV107X_PINMUX(cfg->reg_index));
-
-	return 1;
-}
-
-int mux_select_pins(const short *pins)
-{
-	int i, ret = 1;
-
-	for (i = 0; pins[i] >= 0; i++)
-		ret &= mux_select_pin(pins[i]);
-
-	return ret;
-}

arch/arm/cpu/arm1176/tnetv107x/timer.c

@@ -1,93 +0,0 @@
-/*
- * TNETV107X: Timer implementation
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-
-struct timer_regs {
-	u_int32_t pid12;
-	u_int32_t pad[3];
-	u_int32_t tim12;
-	u_int32_t tim34;
-	u_int32_t prd12;
-	u_int32_t prd34;
-	u_int32_t tcr;
-	u_int32_t tgcr;
-	u_int32_t wdtcr;
-};
-
-#define regs ((struct timer_regs *)CONFIG_SYS_TIMERBASE)
-
-#define TIMER_LOAD_VAL	(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
-#define TIM_CLK_DIV	16
-
-static ulong timestamp;
-static ulong lastinc;
-
-int timer_init(void)
-{
-	clk_enable(TNETV107X_LPSC_TIMER0);
-
-	lastinc = timestamp = 0;
-
-	/* We are using timer34 in unchained 32-bit mode, full speed */
-	__raw_writel(0x0, &regs->tcr);
-	__raw_writel(0x0, &regs->tgcr);
-	__raw_writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &regs->tgcr);
-	__raw_writel(0x0, &regs->tim34);
-	__raw_writel(TIMER_LOAD_VAL, &regs->prd34);
-	__raw_writel(2 << 22, &regs->tcr);
-
-	return 0;
-}
-
-static ulong get_timer_raw(void)
-{
-	ulong now = __raw_readl(&regs->tim34);
-
-	if (now >= lastinc)
-		timestamp += now - lastinc;
-	else
-		timestamp += now + TIMER_LOAD_VAL - lastinc;
-
-	lastinc = now;
-
-	return timestamp;
-}
-
-ulong get_timer(ulong base)
-{
-	return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base;
-}
-
-unsigned long long get_ticks(void)
-{
-	return get_timer(0);
-}
-
-void __udelay(unsigned long usec)
-{
-	ulong tmo;
-	ulong endtime;
-	signed long diff;
-
-	tmo = CONFIG_SYS_HZ_CLOCK / 1000;
-	tmo *= usec;
-	tmo /= (1000 * TIM_CLK_DIV);
-
-	endtime = get_timer_raw() + tmo;
-
-	do {
-		ulong now = get_timer_raw();
-		diff = endtime - now;
-	} while (diff >= 0);
-}
-
-ulong get_tbclk(void)
-{
-	return CONFIG_SYS_HZ;
-}

arch/arm/cpu/arm720t/Makefile

@@ -1,11 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-extra-y	= start.o
-obj-y	= interrupts.o cpu.o
-
-obj-$(CONFIG_TEGRA) += tegra-common/

arch/arm/cpu/arm720t/config.mk

@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi