On Ubuntu 25.04 installing the dependency pyyaml 6.0 fails with
License classifiers are deprecated
Update PyYAML to the current release.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A recent change tried to speed up EFI booting by not calling dhcp_run
from eth_bootdev_hunt() every time. PXE so far relied on that dhcp_run
call to get an IP address.
Fix that by adding a dhcp_run call to the pxe bootflow, with autoload
disabled to only get the ip address and nothing else.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fixes: 1f68057e03 ("net: eth_bootdev_hunt() should not run DHCP")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
S/MIME Capabilities (OID: 1.2.840.113549.1.9.15) attributes are
expected to be algorithms but neither data nor MS Inderect Data,
thus the checker for data type is incorrect.
This patch fixes a capsule authentication failure with PKCS#7
message that contains S/MIME capabilities, which formed by the EDK2
GenerateCapsule tool.
S/MIME Capabilities are not common attributes in an EFI capsule,
thus this failure cannot be reproduced with the capsules generated
via mkeficapsule.
Fixes: 7de0d155cc ("mbedtls: add PKCS7 parser porting layer")
Reported-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Pull request efi-2025-04-rc6
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25491
Documentation:
* correct references to overlay-fdt-boot.txt
* build: docker: Fix code highlighting syntax
* build: docker: Use code-block for syntax highlighting
* Fix typo bootfloe to bootflow
UEFI:
* Correct the size of the AcpiReclaimMemory region for ACPI tables
when using QFW
doc/uImage.FIT/overlay-fdt-boot.txt does not exist anymore.
Reference the correct section of doc/usage/fit/overlay-fdt-boot.rst.
Fixes: 6f6e8bb695 ("doc: Bring in the FIT overlay information")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use ..code-block:: syntax highlighting instead of :: so all bash
commands use the same syntax highlighting.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Remove double :: before .. code-block:: bash to correctly highlight the
following commands.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
The end of the ACPI table is set to 'addr' instead of 'end'. The ACPI
code for QEMU relies on those values to mark memory as 'ACPI Reclaim'
and as a result the ACPI RSDP ends up in Boot services Data.
Reported-by: Björn Töpel <bjorn@kernel.org>
Fixes: commit 638cc36348 ("acpi: enable writing ACPI tables on QEMU")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since commit 61040097a9 ("reset: at91: Add reset driver for basic
assert/deassert operations") the "atmel,sama5d3-rstc" compatible for
the sama5d2 reset controller in sama5d2.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now.
This resulted in the following error, when trying to reset from the U-Boot
shell on a sama5d27_wlsom1 board:
=> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fix it by enabling the CONFIG_RESET_AT91 driver in all sama5d27 defconfigs.
Tested on a sama5d27_wlsom1 board.
Based on the fix in commit e1ee52ca56 ("configs: at91: sam9x60: Switch
to new reset driver")
Fixes: 61040097a9 ("reset: at91: Add reset driver for basic assert/deassert operations")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Pull request net-20250314.
kconfig:
* Fix submenu for network commands
net:
* Remove a useless (commented out) line in net-common.h
net-lwip:
* Remove error print on failed tx
* Fix return code of ping_loop() when no ethernet device is found
* Remove superfluous newline in help text for tftp
The Kconfig parser seems to get confused by the current if conditions
following CMD_NET and displays all network command options directly in
the "Command line interface" menu instead of in a "Network commands"
submenu.
To help out Kconfig we can simplify the if conditions, so that the
definition of CMD_NET is followed immediately by an if/endif block that
contains all network command options. We can also remove nested checks
for CMD_NET or (NET || NET_LWIP).
Fixes: 98ad145db6 ("net: lwip: add DHCP support and dhcp commmand")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
When an ethernet driver fails to send a frame we print an error in lwIP.
But depending on how often that error is it might significantly delay
transmissions.
For example downloading a big file with the rpi4 spams the console with
'send error: -101', but removing the print makes the file download with
an average speed of ~8.5MiB/s since the packets are retransmitted.
So let's move it to a 'debug' in lwIP and expect ethernet drivers to handle
the failure if it's severe.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Commit 1d5d292b79 ("net: split net into net{,-common,-legacy,-lwip}")
inadvertendly left a commented out declaration for do_wget() in
net-common.h. Remove it.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
do_ping() expects ping_loop() to return a negative value on error, so
that it can propagate it to the caller as CMD_RET_FAILURE. This is not
the case when no ethernet device is found, so fix that.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The help text has a newline at the end which will lead to an empty
line after the tftpboot when printing the help overview. Remove it.
Fixes: 4d4d783812 ("net: lwip: add TFTP support and tftpboot command")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
My preferred email address is mkorpershoek@kernel.org now.
This updates the MAINTAINERS files and adds an entry in the
.mailmap file.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Remove leftover code from Milk-V Mars CM and Mars CM Lite boards that do
not exist in upstream Linux Kernel devicetree-rebasing. These will be re-
introduced when submitted upstream for a future U-Boot release. Users of
these boards should use the previous stable release of U-Boot until then.
Signed-off-by: E Shattow <e@freeshell.de>
The BeagleBone Green board is a revision of the BoneBlack board.
Having BeagleBone Black devicetree listed before BeagleBone Green will
select always the BeagleBone Black devicetree following the functioning of
board_fit_config_name_match().
Fix it by changing the test condition and selecting BoneBlack board only
if it is not a revision of this board.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
A last minute fix from Vincent fixing the text representation
of device paths containing IPv4 device path nodes.
A missing break; ended up printing
IPv4(5.6.7.8,TCP,UDP,0x6,DHCP,1.2.3.4,9.10.11.12,255.255.255.0)
instead of
IPv4(5.6.7.8,TCP,DHCP,1.2.3.4,9.10.11.12,255.255.255.0)
When converting an IPv4 device path node to text, the
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL will produce the following string:
IPv4(5.6.7.8,TCP,UDP,0x6,DHCP,1.2.3.4,9.10.11.12,255.255.255.0)
This string erroneously contains multiple protocols: TCP, UDP and 0x6.
Add the missing `break' statements in the dp_msging() function to fix this
and obtain the following expected string instead:
IPv4(5.6.7.8,TCP,DHCP,1.2.3.4,9.10.11.12,255.255.255.0)
Fixes: aaf63429a1 ("efi_loader: add IPv4() to device path to text protocol")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Adriano Cordova <adrianox@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case, the option
SPL_RISCV_MMODE is the default.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tianrui Wei <tianrui-wei@outlook.com>
These helpers wrongly return the updated register value. As a non-zero
value indicates failure, this causes various clock operations are
considered failed.
Correct the return value to constant zero, since these simple MMIO
operations won't fail. This fixes clock enabling failures during booting
process,
In: serial@4140000
Out: serial@4140000
Err: serial@4140000
Net: Enable clock-controller@3002000 failed
failed to enable clock 0
No ethernet found.
which leads to misoperation of various peripherals.
Fixes: 5f364e072e ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC")
Tested-by: Yuguo Pei <purofle@gmail.com>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Ben reports a failure to boot the kernel on hardware that starts its
physical memory from 0x0.
The reason is that lmb_alloc_addr(), which is supposed to reserve a
specific address, takes the address as the first argument, but then also
returns the address for success or failure and treats 0 as a failure.
Since we already know the address change the prototype to return an int.
Reported-by: Ben Schneider <ben@bens.haus>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ben Schneider <ben@bens.haus>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise
it crashes. This is a result of the previous hard-coded EP setup in
drivers/usb/gadget/epautoconf.c which did special-case EP allocation
for SPL builds, and which was since converted to this callback, but
without the special-case EP allocation in SPL part.
This reinstates the SPL part in an isolated manner, only for NXP iMX
SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint.
Fixes: 1918b8010c ("usb: dwc3: gadget: Convert epautoconf workaround to match_ep callback")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250319220805.219001-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
spl_perform_fixups is redundant in the current implementation. SPLs call
dram_init during spl_enable_cache in arch/arm/mach-k3/common.c. In
U-Boot, dram_init and dram_init_banksize are automatically called in
init_sequence_f. Therefore, SPLs and U-Boot always determine the correct
RAM size. During Linux boot, fdt_fixup_memory_banks adjusts the RAM size
in the Linux device tree, ensuring correct RAM usage.
dram_init() calls get_ram_size() for the Verdin AM62, which determines
the correct RAM size through read/write operations. However, due to the
K3 bootflow placing ATF in RAM and requiring cache coherence, calling
get_ram_size() with caches enabled prevents ATF boot. Removing this call
restores ATF boot functionality.
This fixes a regression introduced in commit 4164289db8 ("board:
verdin-am62: fix missing memory fixup call") which prevents some of our
Verdin AM62 modules from booting.
Fixes: 4164289db8 ("board: verdin-am62: fix missing memory fixup call")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
The header of the StarFive U-Boot SPL file u-boot-spl.normal.out has a
field indicating the payload size. When copying U-Boot SPL from a
partition the copied file might be too long.
Currently in this situation a misleading error message 'Incorrect CRC32' is
written.
We must use the payload size and not the file size when calculating the
CRC32.
Write a warning if the file is too long indicating the correct size. This
enables the user to truncate the file accordingly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
U-Boot version command is no longer showing information about GCC and LD.
The reason is that version.h has been removed that's why CC_VERSION_STRING
and LD_VERSION_STRING are not pass.
Values are generated to generated/version_autogenerated.h which is sourced
in version.h.
Fixes: 54ecce2cbf ("version: Separate our version string from the version command")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Pull request efi-2025-04-rc5
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25196
UEFI:
* Export _start symbol from crt0_*_efi stubs
* Move .dynamic out of .text in EFI
* scripts/Makefile.lib: Preserve the .dynstr section as well
Documentation:
* net: miiphybb: Convert documentation to rst
These are mainly DBSC5 DRAM controller specific fixes and updates for
current release. There is the long overdue BL31 start V4H board code as
well, that should be in the current release to make the V4H White Hawk
board usable with SPL, and a fallback U-Boot PSCI implementation
enablement to make sure the board always boots. And finally, there are
two comment fixes.
This section is required by .dynamic and llvm-objcopy will exit with a
fatal error if it is not also preserved in the output.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
EFI applications need to be relocatable. Ordinarily, this is achieved
through a PE-format .reloc section, but since that requires toolchain
tricks to achieve, U-Boot's EFI applications instead embed ELF-flavored
relocation information and use it for self-relocation; thus, the
.dynamic section needs to be preserved.
Before this patch, it was tacked on to the end of .text, but this was
not proper: A .text section is SHT_PROGBITS, while the .dynamic section
is SHT_DYNAMIC. Attempting to combine them like this creates a section
type mismatch. While GNU ld doesn't seem to complain, LLVM's lld
considers this a fatal linking error.
This patch moves .dynamic out to its own section, so that the output ELF
has the correct types. (They're all mashed together when converting to
binary anyway, so this patch causes no change in the final .efi output.)
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.
However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.
This patch doesn't affect the final output binaries in any way.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Fixes: ec53fdee5b ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Fixes: c7d2d7f90a ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.
This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.
This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.
In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.
Signed-off-by: Marek Vasut <marex@denx.de>
Updates for RPi for 2025.04:
- Copy Bluetooth device address in DT
- Keep warnings from firmware in DT, if any
- Only add frame buffer node if CONFIG_FDT_SIMPLEFB is set
- Add identifiers for the new RPi 5 series
The firmware sets local-bd-address, copy it when loading a new DT.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The /chosen/user-warnings property is created by the RPi firmware if
there are warnings to report, keep it to make debugging easier.
For example, if the firmware config.txt contains
"dtoverlay=error-example" and that example references an undefined
symbol "&nosuchdev" the warning can be read after boot:
$ cat /proc/device-tree/chosen/user-warnings
dterror: can't find symbol 'nosuchdev'
Failed to resolve overlay 'error-example'
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv
are only available if CONFIG_FDT_SIMPLEFB is enabled.
Signed-off-by: Martin Stolpe <martin.stolpe@gmail.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The Raspberry Pi foundation have released the Raspberry
Pi 500, CM5 an CM5 lite devices so add the assoicated
revision identifers so we can detect them.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
The default PCA9451 BUCK2 volt is 0.6 V for LPDDR4x VDDQ. The codes
are actually used for reworking to LPDDR4 which needs VDDQ at 1.1 V.
So remove it to avoid LPDDR4x issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
On STM32MP15xx with 1 GiB of DRAM, the gd->ram_top becomes 0,
because DRAM base 0xc0000000 + DRAM size 0x40000000 leads to
gd->ram_top overflow which resets it to 0. Handle this special
case simply by checking for gd->ram_top being zero, and if it
is, assume there is no addr >= gd->ram_top .
This fixes boot hang on STM32MP15xx with 1 GiB of DRAM.
Fixes: 25fb58e88a ("ARM: stm32mp: Fix dram_bank_mmu_setup() for LMB located above ram_top")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
A problem we have today is that some instances of IS_ENABLED(FOO) have
crept in to the code. This is in turn because with checkpatch.pl this is
only a warning and not an error, so they were overlooked. And looking
deeper, in the Linux kernel this pattern is allowed because
IS_ENABLED(DEFINED_FLAG) is allowed if discouraged and a quick skim of
the instances I saw in the current kernel follow this pattern. In U-Boot
however, this is not allowed, so bump to an error.
Signed-off-by: Tom Rini <trini@konsulko.com>
In case MAX_SYMLINK_NEST is reached while determining the size
on a symlink node, the function returns immediately.
This would not free the resources after the free_strings: label
causing a memory leak.
Set the ret value and just break out of the switch to fix this.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
The GPL-2.1+ SPDX License Identifier doesn't exist, but luckily the full
license text was available which shows that GPL-2.1+ was a typo and it
should have been LGPL-2.1-or-later.
As the '+' in LGPL-2.1+ is deprecated in SPDX 3.0, use the preferred
identifier, which is '-or-later'.
Normally the full license header is removed when switching to SPDX
License Identifiers, so do that now.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
AMD/Xilinx changes for v2025.04-rc4
Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME
Versal*:
- Remove tftp block size 4096
Versal:
- Use clocks per DT binding
- Store driver data in data section
Versal Gen 2:
- Fix major/minor version decoding
Currently, Kconfig allows building CONFIG_DM_74X164 without
CONFIG_DM_SPI, which results in linker errors because this driver
actually uses dm_spi_* functions:
drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf':
undefined reference to `dm_spi_claim_bus'
undefined reference to `dm_spi_xfer'
undefined reference to `dm_spi_release_bus'
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
With a recent Binman change, the skip-at-start property is now honoured,
meaning that all image-pos values in the affected section start from
the skip-at-start value.
The x86 code works around the old behaviour at present, so update it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A discussion on the mailing list about dealing with block offsets and
binman symbols made me think that something is wrong with how Binman
deals with the skip-at-start property.
The feature was originally designed to handle x86 ROMs, which are mapped
at the top of the address space. That seemed too specific, whereas
skipping some space at the start seemed more generally useful.
It has proved useful. For example, rockchip images start at block 64,
so a skip-at-start of 0x8000 deals with this.
But it doesn't actually work correctly, since the image_pos value does
not give the actual position on the media.
Fix this and update the documentation, moving it into the 'section'
section.
Signed-off-by: Simon Glass <sjg@chromium.org>
Snow requires a fixed bloblist to operate, so re-enable this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 864106f3c4 ("bloblist: Make BLOBLIST_ALLOC the default")
Unfortunately this change was not safe as some devices are bound before
relocation, but we don't want to probe them.
It causes 'raise: Signal # 8 caught' on jerry.
Move the bootstage timer to after autoprobe in initf_dm() since the
trace test does not tolerate any variance.
This reverts commit 21dd873572.
Signed-off-by: Simon Glass <sjg@chromium.org>
The commit bc07851897 ("board: ti: Pull redundant DDR functions to a
common location and Fixup DDR size when ECC is enabled") broke DRAM
support for the Verdin AM62. This was partially fixed with commit
3f866c47b5 ("board: verdin-am62: add dram_init_banksize"). However,
because fixup_memory_node was not called, the Linux kernel was started
with the wrong memory size on modules with less memory available. This
resulted in boot failures. Fix this issue by calling fixup_memory_node
in the board file.
spl_perform_fixups will be called in the SPL and now sets the correct
memory size in the device tree of U-Boot by calling fixup_memory_node.
U-Boot will then adjust the memory sizes of Linux during bootm/booti in
fdt_fixup_memory_banks. This chain ensures that U-Boot and Linux only
use RAM that is actually available.
Fixes: 3f866c47b5 ("board: verdin-am62: add dram_init_banksize")
Fixes: bc07851897 ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
When enabling net console and console multiplexing, a boot crash was
observed using mtk_eth driver with stdin/stdout set to "serial,nc"
in persistent environment:
> CPU: MediaTek MT7981
> Model: OpenWrt One
> DRAM: 1 GiB
> Core: 35 devices, 15 uclasses, devicetree: separate
> spi-nand: spi_nand spi_nand@0: Winbond SPI NAND was found.
> spi-nand: spi_nand spi_nand@0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64
> Loading Environment from UBI... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
> mtd: partition "ubi" extends beyond the end of device "spi-nand0" -- size truncated to 0x7f00000
> Read 126976 bytes from volume ubootenv to 000000007f7bf0c0
> Read 126976 bytes from volume ubootenv2 to 000000007f7de100
> OK
> "Synchronous Abort" handler, esr 0x96000004, far 0xeafffffeea000018
> elr: 0000000041e63cd4 lr : 0000000041e1b844 (reloc)
> elr: 000000007ff9ecd4 lr : 000000007ff56844
> x0 : eafffffeea000018 x1 : 000000007fb552e0
> x2 : 00000000000000fe x3 : 0000000000000000
The cause is that "serial,nc" forced the console subsystem to
initialize the ethernet driver before ethernet subsystem
initialization (console_init_r() is called before initr_net()).
During the mtk_eth driver initialization, mdio_register() will be
called, and miiphy_get_dev_by_name() will then be called.
The miiphy_get_dev_by_name() will check the list "mii_devs" to see
if the passed device name exists. However the mii_devs is defined
without initialization:
> static struct list_head mii_devs;
and the actual initialization is done in the following chain:
initr_net -> eth_initialize -> eth_common_init -> miiphy_init
Since initr_net() hasn't be called, iterating over the mii_devs
will access to physical address 0 (mii_devs.next == NULL) and will
cause the crash.
The fix is to define mii_devs using:
> static LIST_HEAD(mii_devs);
As the "current_mii" is defined as a static variable, it will
always be NULL in board_r stage and initializing it will NULL is
unnecessary. So the entire miiphy_init() can be remove.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
My previous address is no longer accessible, but I will continue to be
involved in maintaining the ADI sc5xx platforms. This updates my contact
information and hopefully avoids bouncing emails from other developers.
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Line 171 in README is describing that before relocation
no code should use global variable because global variables
are placed to BSS section which is initialized to 0 after
relocation.
On Versal platforms clock driver is initialized before
relocation (via using dm,bootph-all flag in DT) and global
variables are initialized which works if this is used only
before relocation. But the variables are used after
relocation too but values are zeroed which is ending up
incorrect behavior.
That's why place variables to data section to ensure that
values are not cleared which is for now the quickest
temporary solution. The correct way to do it is to move
all global variables to private data to avoid it.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Fix build error "undefined reference to `is_warm_boot'" when
ls1021atsn and ls1021atwr boards are built with CONFIG_SPL=y and
CONFIG_DEEP_SLEEP=n.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When an error is detected in the TSEC receive path, the driver currently
prints an error message, but leaves the corresponding packet descriptor
in its old state (i.e. owned by the CPU side). As a result, the packet
queue can be starved of available buffers if enough errors happen.
To recover from errors, re-arm the packet buffer descriptor after an
error has been detected.
Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to
phy-mode = "rgmii".
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is necessary for the following patch. No functional change.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Check wget_info->buffer_size for overflow and do not clean the wget_info struct
on failure, let the owner of the struct handle the error. The latter is necesary
, e.g., for when a request fails because the provided buffer was too small.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
This commit fixes an use after free introduced in Commit e55a4acb54
(" efi_loader: net: set EFI bootdevice device path to HTTP when loaded
from wget"). The logic in efi_net_set_dp is reworked so that when the
function is invoked it not only changes the value of the static variable
net_dp (this is how the function was implemented in e55a4acb54) but also
updates the protocol interface of the device path protocol in case efi
has started.
Fixes: e55a4acb54 ("efi_loader: net: set EFI bootdevice device path to HTTP when loaded from wget")
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
This board does not have any NVMe slot, so disable unneeded
CONFIG_NVME_PCI option.
Fixes: bf4a33e725 ("board: rockchip: add FriendlyElec NanoPi R3S")
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The patch enables the second USB3.0 Type-A USB port on the NanoPi R4S
board, which prevents a crash when initializing the usb system in U-Boot
and allows both Type-A USB ports to be used for booting.
=> usb start
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: "Synchronous Abort" handler, esr 0x96000010, far 0x0
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
These two files were using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.
Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.
Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.
Fixes: 25438c40a0 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor the entire kconfig page for mbedtls, adapt mbedtls makefile
and default config file using 'XPL_', in order to have independent
mbedtls kconfig options in U-Boot Proper, SPL, TPL and VPL.
User can choose legacy or mbedtls libraries for them independently.
Set mbedtls native hashing libraries as default when MBEDTLS_LIB,
SPL_MBEDTLS_LIB, TPL_MBEDTLS_LIB or VPL_MBEDTLS_LIB is selected.
If users prefer using U-Boot legacy hashing libraries, please select
MBEDTLS_LIB_HASHING_ALT, SPL_MBEDTLS_LIB_HASHING_ALT,
TPL_MBEDTLS_LIB_HASHING_ALT or VPL_MBEDTLS_LIB_HASHING_ALT for U-Boot
Proper, SPL, TPL and VPL respectively.
Moreover, rename a few kconfig options and update their descriptions to
improve the consistency of terminology.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot requires to access x509_internal.h, mbedtls_sha256_context and
mbedtls_sha1_context in the porting layer, and this requires to
enable MBEDTLS_ALLOW_PRIVATE_ACCESS.
Enable it to mscode and pkcs7_parser to fix a mbedtls internal building
error when X509 is selected.
Moreover, Move it to a separate file to avoid enabling it in multiple
places.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Fixed the building failures when WGET_HTTPS,NET_LWIP and MBEDTLS_LIB
are selected due to a few incorrect kconfig dependencies.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Currently, booting via bootstd fails because the kernel cannot be retrieved.
The reason for this is the lack of 'kernel_addr_r'.
Pass 'kernel_addr_r' to fix booting via bootstd.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Currently, booting via bootstd fails because the kernel cannot be retrieved.
The reason for this is the lack of 'kernel_addr_r'.
Pass 'kernel_addr_r' to fix booting via bootstd.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The CONFIG_DEFAULT_FDT_FILE should be imx8mq_evk.dtb for this board
Fixes: 7050bd925f ("imx: imx8mq_evk: Switch to BOOTSTD")
Reported-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/24841
The clk_stub, regulator, and pinctrl fixes enable the sdcard on the RB5
dev board (and sm8250 devices broadly). clk_stub is only enabled in
qcom_defconfig and the others are qcom specific so these shouldn't
affect other platforms.
Lastly, a small ufetch fix from Sam which gets color rendering correctly
on U-Boots framebuffer video device.
Currently, the 8-bit escapes are being used, which aren't supported by
vidconsole_escape_char. Since the current usage maps directly to the
3-bit equivalents anyway, let's use those instead.
With this change, the fetch output looks as fetching in the vidconsole
as it does over serial!
Signed-off-by: Sam Day <me@samcday.com>
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Tested-by: Ferass El Hafidi <funderscore@postmarketos.org>
The pin count wasn't updated when the special pins were added, as a
result it was never possible to configure the special pins on SM8250
boards.
Fix the pin count and allow the special pins to be configured. This
fixes sdcard support on the RB5.
Fixes: 58fa520424 ("pinctr: qcom: sm8250: add special pins pins configuration data")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.
In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.
Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51
section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT
should not be used to determine device size, and instead device size
should be calculated from C_SIZE and C_SIZE_MULT.
This is not exactly accurate, the 2 GiB limit is not a hard line,
there are eMMC devices which are smaller than 2 GiB and still
require device size to be determined from EXT_CSD SEC_COUNT. The
hard line is instead OCR HCS bit, which indicates whether the device
is byte or sector addressed, the former applies to most devices
below 2 GiB, and the later applies mostly to devices above 2 GiB.
However, there are a couple of devices which are smaller than 2 GiB
and still set the OCR HCS bit to indicate they are sector addressed,
and therefore the size calculation for those devices should also
use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the
devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag
reflects the OCR HCS bit state.
Fixes: 639b7827d1 ("mmc: fix the condition for MMC version 4")
Signed-off-by: Marek Vasut <marex@denx.de>
The length of buffers used to read inode tables, directory tables, and
reading a file are calculated as: number of blocks * block size, and
such plain multiplication is prone to overflowing (thus unsafe).
Replace it by __builtin_mul_overflow, i.e. safe math.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Branch contains bringup of Acer Iconia Tab A500 (codename picasso), a
Tegra 2 Android device with decent Linux kernel support. Ondevice tests
and U-Boot test suit all passed.
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/24709
UEFI:
* create a parent device for all EFI block devices
* move lmb_map_update_notify() to EFI
* make efi_add_memory_map_pg() static
* remove comparisons to string literals from runtime
* ix potential deref-after-null
Other:
* avoid superfluous value check in lmb_map_update_notify()
* support more efi protocols in uuid_guid_get_str()
When building with qemu_arm64_defconfig with CONFIG_CC_OPTIMIZE_FOR_DEBUG=y
and CONFIG_EFI_LOADER=n an error undefined reference to efi_add_memory_map_pg
occurs.
Move the EFI dependent part of lmb_map_update_notify() to the EFI
sub-system.
Reported-by: Liya Huang <1425075683@qq.com>
Acked-by: Liya Huang <1425075683@qq.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Instead of testing the value of parameter op at runtime use an enum to
ensure that only valid values are used.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up to now root has been the parent device for all block devices created via
calling ConnectController(). This does not work well together with the
implementation of bootstd.
Add a dummy parent device for all EFI block devices.
With this change EFI block devices are also accessible via commands like
'cat', 'load', and 'ls'.
=> dm tree
Class Seq Probed Driver Name
-----------------------------------------------------------
efi 0 [ + ] EFI block driver `-- efi
blk 3 [ + ] efi_blk `-- efi.efiblk#0
partition 0 [ + ] blk_partition `-- efi.efiblk#0:1
=> ls efiloader 0:1
13 hello.txt
7 u-boot.txt
2 file(s), 0 dir(s)
=> cat efiloader 0:1 hello.txt
Hello world!
=> efidebug dh
0000000018df1700 (efi.efiblk#0:1)
/VenHw(dbca4c98-6cb0-694d-0872-819c650cb7b8)/HD(1,MBR,0xd1535d21,0x1,0x7f)
Block IO
Simple File System
Adjust the event dump unit test to consider the new event spy.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For EFI runtime services, we manage to preserve string literals
by placing the .efi_runtime section just before .data and preserving
it when marking the runtime memory by marking surrounding boottime
code as runtime. This is ok for now but will break if we update any
linker scripts and decouple .text and .runtime sections.
So let's define the strings we used to compare in the appropriate
section for runtime services
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
After having been compared to a NULL value at efi_disk.c:426,
pointer 'part_info' is dereferenced at efi_disk.c:534.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add more EFI protocols GUIDs to the translation table used by
uuid_guid_get_str().
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Use LwIP network stack and enable wget HTTP command. The tftpput command
is not currently supported by LwIP network stack so remove it.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Update the maintainer file and mark jh7110 / visionfive2 related files
with N: patterns.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Variable $fdtfile needs to be set for automatically loading a device-tree
from the ESP or boot partition.
* Set CONFIG_DEFAULT_FDT_FILE in the defconfig.
* Add $fdtfile to the default environment.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MCI
driver set PRWEN high on MMC_POWER_UP and low on MMC_POWER_OFF.
Similarly U-Boot also set PRWEN high before accessing mmc.
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.
Model an always-on active low fixed regulator using GPIO4_D6 to fix
use of sdmmc on older HW revisions of the board.
Fixes: adeb5d2a4ba4 ("arm64: dts: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20241119230838.4137130-1-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 26c100232b09ced0857306ac9831a4fa9c9aa231 ]
(cherry picked from commit ca8e0bedbc790b19b11efc223677d178b8eeb74e)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.
This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
clock/rk3288-cru.h in include/dt-bindings is almost identical to the
version in dts/upstream, remove the copy from include/dt-bindings to
only use the version from dts/upstream.
One clk, SCLK_MAC_PLL, is not part of the upstream bindings, this clk is
not used by upstream, in-tree or vendor DTs and can safely be dropped.
No functional change to board DTs is intended with this removal.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device tree for rk3036 combined is now
available in the /dts/upstream directory.
Use imply OF_UPSTREAM to migrate all rk3036 boards.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x60000000 and RK3576 use 0x40000000 as DRAM base address.
CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in setup_dest_addr().
SPL never assign any value to gd->ram_base and instead use the default,
0x0. Set correct gd->ram_base in dram_init() to ensure its correctness
in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot only works correctly when it uses RAM below the 4G address
boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allow the first bank to extend beyond 4 GiB when the blob of space for
peripheral is located before start of DRAM, e.g. when start of DRAM
is 0x40000000 and continue beyond the 4 GiB mark.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the GRF header file, some instances of UART2 pinmux are prefixed with
"GRF_UART2DBG" while others have "GRF_UART2DGB".
Since UART2 is the default console UART and used for debugging, it is
more likely the name should be UART2DBG.
Fix the ones that are wrong.
Fixes: a2c08df381 ("pinctrl: add driver for rk3399")
Fixes: fa72de1045 ("rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.h")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
These power rails must be on very early for the U-Boos TPL banner to be
show over debug UART.
This reverts commit 4576e65a5d.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The PP1500 and PP3000 power rails must be on very early for the U-Boot
TPL banner to be shown on debug UART.
Enable TPL_GPIO Kconfig option for bob and kevin to allow use of
spl_gpio.h functions in TPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
These power rails must be on very early for the U-Boos SPL banner to be
show over debug UART.
This reverts commit af518a1dfe.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the dram_init_banksize function to the board file to properly set
DRAM memory sizes during boot.
The commit bc07851897 ("board: ti: Pull redundant DDR functions to a
common location and Fixup DDR size when ECC is enabled") relocated the
dram_init_banksize function from architecture specific initialization to
the TI board initialization code. As a result, boards relying on the
previous setup now require this function to be defined within their
board file to handle DRAM sizing correctly.
Without this function defined the following error appears during boot:
ERROR: Failed to allocate 0x1000 bytes below 0x0.
Fixes: bc07851897 ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
The PRNG implementing the random() function only has 2^31 states and
therefore is unsafe to use for cryptography. Use arc4random() instead.
Fixes: cc34f04efd ("tools: image-host.c: use random instead of rand")
Addresses-Coverity-ID: 312953 Calling risky function
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout
bit 6-1, define the NVM voltage settings.
Along side table 8-4 of above TRM, shows voltage to value mapping.
Driver wrongly using bits 5-1 to calculate voltage, and to convert
voltage to value driver was using buck's calculation.
So fix those calculation.
[0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf
Fixes: 5d7dbd22cf ("power: regulator: tps65941: use function callbacks for conversion ops")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The struct contains an iomem pointer that we later remap and update.
Remove const from the struct definition.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When adding the symlink for the conf file so qemu_arm64_lwip uses
qemu_arm64 configuration information, the symlink for the boardenv file
was missed in Gitlab (but not Azure). Add that in now.
Fixes: fd10d156db ("CI: add qemu_arm64_lwip to the test matrix")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The Acer Iconia A500 is a tablet computer designed, developed and
marketed by Acer Inc. It is powered by 1 GHz Nvidia Tegra 2 processor
and 1GB DDR2 RAM. The A500 is sold with 64 GB, although both 16 GB
and 32 GB models are available.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add empty weak assembler function armv8_switch_to_el2_prep() which is
jumped to just before U-Boot determines which EL it is running in and
decides which path to take to boot the Linux kernel. Add
IH_TYPE_TFA_BL31 into supported images type, to allow implementation of
board specific U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TFA_BL31, ...) TFA
BL31 loadable handler for fitImages.
This PR contains common hooks which are noop, R-Car Gen4 board specific
implementation using these hooks is coming in next PR.
Add support for starting TFA from U-Boot running in EL3 as part of
fitImage boot, so the user can start U-Boot in the highest privilege
level on the platform, bundle TFA, Linux, DT into a single fitImage
and boot such a bundle as a whole.
There are two main benefits of this approach. First is the ability
to run U-Boot in EL3, where it has unrestricted access to the entire
system and can act as a useful debug tool, as it was always intended
to be used. Second is the ability to easily and safely update of any
component in the fitImage, be it TFA, Linux or DT.
The boot process is similar to regular Linux with DT fitImage boot
process, except the TFA has to be bundled into the fitImage. For the
bundling instructions, see below. The TFA is started as a 'loadables'
with custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling implemented in board code, and performing the handoff and
boot in case the TFA was loaded.
The loadables handler is optional and meant to set up any sort of
handoff structures used by the TFA BL31 or perform any other setup
that is needed by the blob. The custom armv8_switch_to_el2_prep()
has to implement the jump to TFA BL31 with return to U-Boot just
before booting the Linux kernel.
Example fitImage image and configuration section:
/dts-v1/;
/ {
description = "Linux kernel with FDT blob and TFA BL31";
images {
kernel-1 { ... };
fdt-1 { ... };
atf-1 { /* This is the TFA BL31 image */
description = "TFA BL31";
data = /incbin/("../build/plat/release/bl31.bin");
type = "tfa-bl31";
arch = "arm64";
os = "arm-trusted-firmware";
compression = "none";
load = <0x46400000>;
entry = <0x46400000>;
};
};
configurations {
default = "conf-1";
conf-1 {
description = "Boot Linux";
kernel = "kernel-1";
fdt = "fdt-1";
loadables = "atf-1"; /* This is the TFA BL31 loadable */
};
};
};
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add empty weak assembler function armv8_switch_to_el2_prep() which is
jumped to just before U-Boot determines which EL it is running in and
decides which path to take to boot the Linux kernel.
This weak function is meant to be used by architecture specific code
to implement jump to a firmware blob, which then returns right past
this weak function and continues execution of U-Boot code which then
boots the Linux kernel. One example of such use case is when U-Boot
jump tp TFA BL31, which switches from EL3 to EL2 and then returns to
U-Boot code newly running in EL2 and starts the Linux kernel.
The weak function is called with caches already disabled and DM shut
down. Any preparatory work or even loading of more data must be done
in board_prep_linux(), this hook is meant only for the final jump to
the firmware and return to U-Boot before booting Linux.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
When we squash imported mbedtls, the git submodule "framework" was
preserved in the commit. However, U-Boot itself does not use git
submodule, and provides no .gitmodules file to specify the submodule
repository.
This is normally not an issue when cloning U-Boot repository. However,
when U-Boot is imported as a submodule, this will break git option
`--recurse-submodules` as it fails to resolve "framework".
As we do not use the submodule, remove it to unbreak existing workflows.
Fixes: 12f1212e95 ("Merge commit '0344c602eadc0802776b65ff90f0a02c856cf53c' as 'lib/mbedtls/external/mbedtls'")
Signed-off-by: ZHANG Yuntian <yt@radxa.com>
PCBID1 seems to be high not only on TF600T, but on TF700T as well,
that caused boot failure for TF700T. Switching PCBID1 to PCBID7
should fix this issue.
Co-developed-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Implement library function strnstr().
Implement strstr() using strnstr().
Sort the includes.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[jf: replace <stdint.h> by <limits.h>, folded from next patch]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Find_option() is used to retrieve the block size value in an option
acknowledgment in response to a request containing a block size option
according to RFC2348.
The format of an OACK response is described in RFC2347 as
+-------+---~~---+---+---~~---+---+---~~---+---+---~~---+---+
| opc | opt1 | 0 | value1 | 0 | optN | 0 | valueN | 0 |
+-------+---~~---+---+---~~---+---+---~~---+---+---~~---+---+
The current implementation of find_option() only works if
* blksize is the first option
* lwip_strnstr() ignores the length parameter,
i.e. is implemented via strstr()
The OACK messages starts with 0x00 0x06. If 'blksize' is the first option,
strstr() reports a match when the first parameter points to 0x06. Adding
the string length of 'blksize' plus 2 to the location of the 0x06 byte
points to the value.
Find_option() would report a match for option 'blksize' if the response
contained an option called 'foo_blksize_bar'. In this case find_option()
would return 'bar' as the value string.
If 'blksize' were the second option, find_option() would return a pointer
to the second character of the value string.
Furthermore find_option() does not detect if the value string is NUL
terminated. This may lead to a buffer overrun.
Provide an implementation that correctly steps from option to option.
Fixes: 27d7ccda94 ("net: lwip: tftp: add support of blksize option to client")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_arm64_lwip)
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Move the initialization of the ethernet devices out of the new_netif()
function. Indeed, new_netif() accepts a struct device argument, which
is expected to be valid and active. The activation and selection of
this device are achieved by eth_init() (on first time the network
stack is used) and eth_set_current(). This is what takes care of the
ethrotate and ethact environment variables. Therefore, move these calls
to a new function: net_lwip_set_current(), and use it whenever a
net-lwip command is run.
This patch hopefully fixes the incorrect net-lwip behavior observed on
boards with multiple ethernet interfaces [1].
Tested on an i.MX8MPlus EVK equipped wih two ethernet ports. The dhcp
command succeeds whether the cable is plugged into the first or second
port.
[1] https://lists.denx.de/pipermail/u-boot/2025-January/576326.html
Reported-by: E Shattow <e@freeshell.de>
Tested-by: E Shattow <e@freeshell.de>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Pin detection on t20 depends on node name. With recent changes
in node naming, let's remove '_' to be safe about both '_' or
'-' use.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Bind SYSRESET child to parent node since it does not have
its own node in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Bind GPIO and SYSRESET children to parent node since they
do not have their own nodes in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Requesting of PMIC's GPIO child should be done by binding
GPIO driver to PMIC's node is GPIO driver does not have
its own node.
This reverts commit c03cd98d1a.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
u-boot-dfu-20250211:
CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556
Android:
- Handle boot images with missing DTB
Usb gadget:
- Fix nullptr in g_dnl when serial# is unset
- Add missing schedule() in f_mass_storage gadget
- Add support for STih407 in dwc3-generic
- Fix usb clocks on STih407
- Migrate STih407 to DM_USB_GADGET
Since commit 6aa8bde878 ("usb: host: ehci-generic: Remove DM_REGULATOR
flag") device_get_supply_regulator() returns -ENOSYS which is not handle
by ehci_enable_vbus_supply() and thus, ehci_usb_probe() return an error.
By enabling DM_REGULATOR flag, device_get_supply_regulator() return -ENOENT
which is handle and ehci_usb_probe() return 0.
This fixed the following issue:
stih410-b2260 =>usb start
starting USB...
Bus dwc3@9900000: Register 2000240 NbrPorts 2
Starting the controller
USB XHCI 1.00
Bus usb@9a03c00: USB OHCI 1.0
Bus usb@9a03e00: probe failed, error -38
Bus usb@9a83c00: USB OHCI 1.0
Bus usb@9a83e00: probe failed, error -38
scanning bus dwc3@9900000 for devices... 1 USB Device(s) found
scanning bus usb@9a03c00 for devices... data abort
pc : [<7df929b4>] lr : [<7df92918>]
reloc pc : [<7d6409b4>] lr : [<7d640918>]
sp : 7c73b848 ip : 9cf13c5c fp : 7c879d08
r10: 7c85d040 r9 : 7c74ded0 r8 : 09a03c00
r7 : 00000002 r6 : 7c85d080 r5 : 7c86a040 r4 : 00000000
r3 : 00000000 r2 : 00000000 r1 : 7c85d080 r0 : 7c85d040
Flags: nzCv IRQs off FIQs off Mode SVC_32
Code: 05853ae4 0affffe2 e59a2010 e59a300c (e5832010)
Resetting CPU ...
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250130163547.512990-3-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
On STi platforms, all clocks are enabled by BOOTROM, so CONFIG_CLK is
not set as no clock driver for STI exists.
As ehci-generic and ohci-generic drivers are used on platforms where
CONFIG_CLK is set, clk_get_bulk() returns-ENOSYS in case of
stih410-b2260.
To avoid this error, add fixed clocks for ehci and ohci nodes for
stih410-b2260 to fix the following errors:
Bus usb@9a03c00: ohci_generic usb@9a03c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a03e00: ehci_generic usb@9a03e00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83c00: ohci_generic usb@9a83c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83e00: ehci_generic usb@9a83e00: Failed to get clocks (ret=-19)
Port not available.
scanning bus dwc3@9900000 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250130163547.512990-2-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The rules part of the template makes sure that this doesn't run until
specifically requested. Drop the check in the script itself, so it is
possible to trigger a run manually without re-pushing the tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Judith Mendez <jm@ti.com> says:
This patch series enables ESM reset configuration in board_init_f
for am62x and am62px devices.
This is necessary in order for error events to reset the system.
This patches are tested using watchdog to reset the system via ESM.
Link: https://lore.kernel.org/r/20250129234403.574766-1-jm@ti.com
Enable CONFIG_SPL_DRIVERS_MISC, CONFIG_SPL_MISC, CONFIG_ESM_K3
to probe the Main ESM and MCU ESM nodes.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
On AM62A and AM62P devices, it is possible to route Main ESM error
events to MCU ESM. MCU ESM high error output can trigger the reset
logic to reset the device. So, for these devices we have Main ESM and
MCU ESM nodes in the device tree. Add functions to probe these nodes
if CONFIG_ESM_K3 is enabled.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Add the optargs variable so that we can set optional arguments while
booting.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
The env_fat_get_dev_part() function mostly returns a fixed string, set
via some Kconfig variable. However when the first character is a colon,
that means that the boot device number is determined at runtime, and
patched in. This requires altering the string.
So far this was done via some ugly and actually illegal direct write to
the .rodata string storage. We got away with this because U-Boot maps
everything as read/write/execute so far.
A proposed patch set actually enforces read-only (and no-execute)
permissions in the page tables, so this routine now causes an exception:
=======================
Loading Environment from FAT... "Synchronous Abort" handler, esr 0x9600004f, far 0xfffb7d4c
elr: 000000004a054228 lr : 000000004a05421c (reloc)
elr: 00000000fff7c228 lr : 00000000fff7c21c
.....
=======================
Rewrite the routine to do away with the dodgy string manipulation,
instead allocate the string in the r/w .data section, where we can
safely manipulate it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Siddharth Vadapalli <s-vadapalli@ti.com> says:
Hello,
This series re-enables MUX_MMIO at U-Boot proper on J721E and J7200
SoCs. The commits which introduced support for Hyperflash boot on both
of these SoCs disabled MUX_MMIO functionality at U-Boot proper, thereby
introducing a regression.
Series is based on commit
2b1c8d3b2d cmd: Fix Kconfig coding style
of the master branch of U-Boot.
Link: https://lore.kernel.org/r/20250201091809.1894892-1-s-vadapalli@ti.com
Commit under Fixes introduced support for Hyperflash boot but also disabled
MUX_MMIO support at U-Boot proper. MUX_MMIO is required at U-Boot proper
to setup the SERDES Lane Mapping as described by the device-tree. On J7200
SoC, PCIe functionality is broken since commit under fixes.
Fix this regression by re-enabling MUX_MMIO.
Fixes: 038f6faea9 ("configs: j7200_evm_*_defconfig: Add configs for Hyperflash boot")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Anurag Dutta <a-dutta@ti.com>
Commit under Fixes introduced support for Hyperflash boot but also disabled
MUX_MMIO support at U-Boot proper. MUX_MMIO is required at U-Boot proper
to setup the SERDES Lane Mapping as described by the device-tree.
Fix this regression by re-enabling MUX_MMIO.
Fixes: fd7fcd4098 ("configs: j721e_evm_*_defconfig: Add configs for Hyperflash boot")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
emul_rtc_probe() is not called from anywhere else that's why make it
static. Issue is reported by build with W=1.
Signed-off-by: Michal Simek <michal.simek@amd.com>
This patch enables switch auto-detction for mt7981 as some new mt7981
boards will use AN8855 ethernet switch.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Enable configs required for detecting and fixing up for different RAM variants.
Also resync after savedefconfig.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Detect RAM size via EEPROM and adjust DDR size and banks accordingly.
Include necessary fixups to handle ECC-enabled configurations.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
are accessible across all stages. This enables reading the SoM
configuration at any point during the boot process.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
USB tests on ext partitions can fail with the following output
test/py/tests/test_usb.py:245: in test_usb_part
'fstype usb %d:%d' % i, part_id
E TypeError: not enough arguments for format string
So add brackets around the format string arguments to prevent the
error.
Fixes: a730947974 ("test/py: usb: Distinguish b/w ext2/ext4 partitions")
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Love Kumar <love.kumar@amd.com>
The change from pinctrl to pio was missing in mt7986-u-boot.dtsi and will
cause build failure. Now fix it.
Fixes: f1775996ba (mediatek: mt7986: move gpio-controller up and rename pinctrl to pio)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add support to read register base address by name if
provided.
Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT
live tree.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The reg-names in mt7988.dtsi have no _base suffix. Remove the suffix
will also make it match upstream linux format.
Fixes: 8c2cb748ef (pinctrl: mediatek: mt7988: rename reg-names to upstream linux format)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Without setting the shell flag to exit immediately when a command exists
with a non-zero status we can have the situation where the htmldocs
target fails with an error but the job will succeed due to infodocs
passing and being the last build target.
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:
The setexpr.s command allows to concatenate two strings.
According to the description in doc/usage/cmd/setexpr.rst the parameters
value1 and value2 can be either direct values or pointers to a
memory location holding the values.
Unfortunately `setexpr.s <value1> + <value2>` fails if any of the values
is a direct value. $? is set to false.
* Add support for direct values in setexpr.s.
* Correct the unit test for "setexpr.s fred 0".
* Add a new unit test for "setexpr.s fred '1' + '3'" giving '13'.
* Remove invalid memory leak tests
Link: https://lore.kernel.org/r/20250203151029.60265-1-heinrich.schuchardt@canonical.com
The setexpr.s command allows to concatenate two strings.
According to the description in doc/usage/cmd/setexpr.rst the parameters
value1 and value2 can be either direct values or pointers to a
memory location holding the values.
Unfortunately `setexpr.s <value1> + <value2>` fails if any of the values
is a direct value. $? is set to false.
* Add support for direct values in setexpr.s.
* Correct the unit test for "setexpr.s fred 0".
* Add a new unit test for "setexpr.s fred '1' + '3'" giving '13'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
env_set() frees the previous value after allocating the new value.
As the free() may merge memory chunks the available memory is not
expected to stay constant.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
env_set() frees the previous value after allocating the new value.
As the free() may merge memory chunks the available memory is not
expected to stay constant.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heiko Schocher <hs@denx.de> says:
In linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This series adds support for parsing this properties if there
is no label property.
Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de
[trini: Document name parameter in led.h]
in linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This patch adds support for parsing this properties if there
is no label property.
The led name is created in led_post_bind() and we need some
storage place for it. Currently this patch prevents to use
malloc() instead it stores the name in new member :
char name[LED_MAX_NAME_SIZE];
of struct led_uc_plat. While at it append led tests for the
new feature.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
remove file doc/device-tree-bindings/leds/common.txt
as we have this now already in
dts/upstream/include/dt-bindings/leds/common.h
which is imported from linux.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
AM62x BOOTM_LEN is too small to contain OS images. Removing this sets the
size to a default 0x4000000 (for all arm64 devices).
It is unnecessary to specifically call the default size for the other
configs.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Aashvij Shenai <a-shenai@ti.com>
Kconfig should not display the STATIC_MACH_TYPE option when
SUPPORT_PASSING_ATAGS is not selected. For example, when using most
platforms with menuconfig, it shows the STATIC_MACH_TYPE option causing
confusion. As we know, this should not occur when SUPPORT_PASSING_ATAGS
is not selected
[trini: Reword commit message]
Signed-off-by: Liya Huang <1425075683@qq.com>
ARMv7-M architecture uses NVIC instead of GIC.
NVIC is an interrupt controller specially designed for
ARM Cortex-M series processors.
Signed-off-by: Liya Huang <1425075683@qq.com>
CONFIG_XILINX_OF_BOARD_DTB_ADDR holds DTB address which U-Boot is checking.
Currently address in binman match default value but macro can be used
directly.
Also sync node name (s/hash-1/hash/) and sync location to have the same
order load/hash/image.
All binman DTSes are compiled that's why also guard
CONFIG_XILINX_OF_BOARD_DTB_ADDR which depends on OF_BOARD || OF_SEPARATE
which is a problem for mini configurations which are using OF_EMBED.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a22c9671b965b222bfd419f5bfaee012929f3d88.1738659214.git.michal.simek@amd.com
The mini u-boot is hanging because of an initial stack
pointer address is used at half of the memory, when mini
u-boot is called reloc_fdt() function and doing memcpy()
for the fdt before relocation, and there is no sufficient
memory for the stack pointer. To fix, set an initial stack
pointer address to near the top of memory. The new stack
pointer address is assigned before calling the relocate
of u-boot based on the stack relocate calculation and
this new stack pointer is used while executing u-boot
from the relocated memory.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250203090409.844403-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Fixes annoying warnings of the following type when built with W=1 (for
each file including fpga.h):
CC drivers/fpga/fpga.o
In file included from /mnt/data/adahl/src/u-boot/include/xilinx.h:7,
from /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:10:
/mnt/data/adahl/src/u-boot/include/fpga.h:61:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
61 | const fpga_desc *const fpga_get_desc(int devnum);
| ^~~~~
/mnt/data/adahl/src/u-boot/include/fpga.h:81:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
81 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:36:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
36 | const fpga_desc *const fpga_get_desc(int devnum)
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:53:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
53 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
Do some type and cast cleanup on that fpga_desc type while at it.
Link: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wignored-qualifiers
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20250121162213.1477506-1-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add ethernet aliases to CC (Carrier card) description to create a
connection which is used by fdt_fixup_ethernet() for updating
local-mac-address in DT.
On Kria SOM MAC address is read from i2c eeprom at start and based on it
environment variables are created. Without creating aliases U-Boot is not
able to inject local-mac-address DT property and OS won't get the same MAC
address unless another i2c read is happening in OS.
Also aliases are using string not phandle that's why full path has to be
provided but that shouldn't be a big issue because location of ethernet
controller is fixed.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d360e71a0530d201578e27a6997dbd472772e39.1737466907.git.michal.simek@amd.com
Output images are generated via Binman only if SPL is enabled, as
there is no consumer for them otherwise. An #ifdef check ensures that
when SPL is enabled, Binman generates the U-Boot ITB. If SPL is disabled,
ITB generation is skipped since the ITB format is supported only by SPL.
Without SPL, generating such an image is unnecessary, as it would not be
used
The second reason is that when a DTB is passed, the current logic cannot
handle it without an additional step in U-Boot to parse an appended FIT
image and enable board-specific code to select the correct DTB config.
The MULTI_DTB_FIT configuration should be used if support for multiple
DTBs is required, but SPL is not being used.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7cba738ae36dacf7d1b0cfbaf13e0c9b3a0df225.1737462296.git.michal.simek@amd.com
Add default environment variables needed for Standard Boot enablement as
described in [1]. Also rework the eMMC partition table for Linux boot so
it only has two partitions:
1. EFI System Partition (EFI vars, GRUB efi app, firmware files)
2. rootfs partition (Debian rootfs, /boot, extlinux.conf, boot.scr)
Both partitions are made bootable so that 'bootflow' command can detect
all loader files (rootfs might contain extlinux.conf and boot.scr).
'ldfw' partition is removed too, as ldfw.bin can be loaded from ESP now
(from /EFI/firmware/ldfw.bin).
Android partitons will be added later, once Android boot is actually
enabled for E850-96.
Notes:
- $kernel_comp_addr_r uses the same address (0x88000000) as LDFW
buffer (in board/samsung/e850-96/fw.c), but that's fine, as LDFW
will be copied to another RAM location (Secure World) by SMC
command, so it's only used temporarily on startup
- addition assignment (+=) operation is used for $partitions to avoid
spaces added by newlines, so that $partitions can be used in the
shell with no quotes
Now it's possible to successfully automatically boot Debian rootfs:
=> env default -f -a
=> env save
=> gpt write mmc 0 $partitions
=> reset
[1] doc/develop/bootstd/overview.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
LDFW firmware loading can fail, e.g. in case if user forgot to upload
the binary to the appropriate location (/EFI/firmware/ldfw.bin on ESP
partition). Report such errors explicitly, so that the user can notice
it early and take necessary actions. But don't return error code from
board_init() in this case, as LDFW firmware is not mandatory for board
operation and is only required for some features like TRNG.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In case when EFI System Partition is present it can be used to store
firmware binaries, instead of keeping those on separate dedicated
partitions. That simplifies the partition table and makes it more
standard. Rework the firmware loader code to look for LDFW binary at
/EFI/firmware/ldfw.bin on ESP first, and if either the partition or the
file doesn't exist -- fallback to reading it from 'ldfw' partition. This
way backward compatibility can be kept, and Android partition tables
without ESP partition can be handled too.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Enable Standard Boot on E850-96 as documented in [1]. Along with
corresponding changes in the default environment and properly prepared
eMMC partitions (ESP and rootfs), it makes it possible to boot Debian
rootfs automatically. All boot methods were tested: efi_mgr, efi,
syslinux and script. The preferred boot method is efi_mgr, which relies
on the configured EFI variables (stored in /ubootefi.var file on ESP
partition), which boots either GRUB from /EFI/debian/grubaa64.efi, or
systemd-boot from /EFI/BOOT/BOOTAA64.EFI. Currently used boot sequence:
U-Boot -> bootcmd -> 'bootflow scan -lb' -> efi_mgr -> GRUB -> Debian
[1] doc/develop/bootstd/overview.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Store U-Boot environment in BOOT2 HW area of eMMC (/dev/mmcblk0boot1),
as it's currently unused. BOOT1 area will be probably used for storing
low-level bootloaders further, so let's not touch it.
Both primary and redundant environments work fine:
=> env default -f -a
## Resetting to default environment
=> env save
Saving Environment to MMC... Writing to redundant MMC(0)... OK
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The E850-96 default environment is going to be updated soon, requiring
next config options to be enabled:
- CONFIG_DEFAULT_FDT_FILE: $fdtfile will use this value
- CONFIG_PARTITION_TYPE_GUID: $partitions will rely on "type" feature
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Update the debug() print, use __func__ to always print matching
function name, and also print bus name in case there are multiple
busses.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Explicitly flush icache on the CR52 core before jumping to the next
stage software to make sure it does not contain any invalid content.
Explicitly flash and invalidate dcache on the CA76 core both over the
trampoline buffer and over the CR52 firmware, and then trigger full
system synchronization, to make sure the data surely land in DRAM,
from where the CR52 can surely pick them up.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Whereas with Azure the JUnit results file is available for download,
Gitlab doesn't default to including it as an artifact to download and
only makes it available via its own JUnit parser. Fix this by listing it
as an artifact to save as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we can run sandbox on arm64 hosts, have these jobs run on both
the fast arm64 and amd64 hosts to catch any issues.
Signed-off-by: Tom Rini <trini@konsulko.com>
Refer to the commit a3c101a613 ("examples: fix building on arm64")
fix for arm32. crt0.S does not even build with:
operating system and architecture:
5.15.0-130-generic x86_64
installed version of gcc and binutils:
gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.3)
GNU ld (GNU Binutils for Ubuntu) 2.34
used defconfig:
stm32h750-art-pi_defconfig
used commands for building:
export CROSS_COMPILE=arm-none-eabi- ARCH=arm
make stm32h750-art-pi_defconfig
make menuconfig # to add
make
examples/api/crt0.S: Assembler messages:
examples/api/crt0.S:32: Error: lo register required -- `ldr ip,=search_hint'
examples/api/crt0.S:33: Error: lo register required -- `str sp,[ip]'
examples/api/crt0.S:39: Error: lo register required -- `ldr ip,=syscall_ptr'
examples/api/crt0.S:40: Error: lo register required -- `ldr pc,[ip]'
make[2]: *** [scripts/Makefile.build:292：examples/api/crt0.o] Error 1
Use valid register names and instructions.
Signed-off-by: Liya Huang <1425075683@qq.com>
CONFIG_STANDALONE_LOAD_ADDR has been used for examples/standalone
but not for examples/api.
The suitability of an address to load an ELF binary and run it does
not only depend on the architecture but also on the memory layout of
the board which is not reflected in the default value of
CONFIG_STANDALONE_LOAD_ADDR.
Commit 32b7e39db4 ("Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig")
set the default on RISC-V to 0x0 though most boards used 0x80200000
before the patch.
On most boards we can assume 8 MiB of memory available above $loadaddr.
So we can safely use $loadaddr + 4 MiB as load address for the standalone
example and eliminate CONFIG_STANDALONE_LOAD_ADDR altogether.
Fixes: 32b7e39db4 ("Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The current load address for the 'demo' binary does not work for
qemu_arm_defconfig.
The suitability of an address to load an ELF binary and run it does
not only depend on the architecture but also on the memory layout of
the board.
On most boards we can assume that 8 MiB of memory is available above
$loadaddr. So $loadaddr + 0x400000 should work there.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A FIT image which is NOT using -E when created by mkimage - that is with
image data within the FIT - will fail to apply FDTO if the base FDT
image node does not specify a load property (which points to an address
in DRAM). This is because we check that the FDT address we want to apply
overlay to (i.e. modify and likely increase in size) is not inside the
FIT and give up otherwise. This is assumed necessary because we may then
overwrite other data when applying in-place.
However, we can do better than giving up: relocating the FDT in another
place in DRAM where it's safe to increase its size and apply FDTOs.
While at it, do not discriminate anymore on whether the data is within
the FIT data address space - that is FIT images created with mkimage -E
- as that still may be susceptible to unintended data overwrites as
mkimage -E simply concatenates all blobs after the FIT. If the FDT blob
isn't the last, it'll result in overwriting later blobs when resizing.
The side effect is that the load property in the FIT is only
temporarily used to load the FDT but then relocated right before we
start applying overlays.
Suggested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Christian Marangi <ansuelsmth@gmail.com> says:
This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.
The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.
This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.
All patch are the final changes after the pinctrl patch
merged previously.
All patch pass CI tests
Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
Add USB PHY nodes for MT7981. These are needed for USB support and also
for PCIe support as the u3 PHY can also be used for PHY.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.
Update any DTS that reference the pinctrl to follow the new naming and
structure.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
Simon Glass <sjg@chromium.org> says:
This includes the VBE ABrec (A/B/recovery) implementation as well as a
number of patches needed to make it work:
- marking some code as used by SPL_RELOC
- selection of images from a FIT based on the boot phase
- removal of unwanted hash code which increases code-size too much
- a few Kconfig-related additions for VPL
Note: The goal for the next series (part H) is to enable VBE on
rk3399-generic, i.e. able to boot on multiple rk3399-based boards with
only the TPL phase being different for each board.
Link: https://lore.kernel.org/r/20250126184333.4058848-1-sjg@chromium.org/
So far only VBE-simple is implemented in U-Boot. This supports a single
image which can be updated in situ.
It is often necessary to support two images (A and B) so that the board
is not bricked if the update is interrupted or is bad.
In some cases, a non-updatable recovery image is desirable, so that the
board can be returned to a known-good state in the event of a serious
failure.
Introduce ABrec which provides these features. It supports three
independent images and the logic to select the desired one on boot.
While we are here, fix a debug message to indicate the function it
called. Provide a maintainers entry for VBE.
Note that fwupdated only supports VBE-simple so far, but supports for
ABrec will appear in time.
Signed-off-by: Simon Glass <sjg@chromium.org>
When VBE operates within VPL it does not want the FDT to be changed.
Provide a way to disable this feature.
Move the FIT_IMAGE_TINY condition out of spl_fit_record_loadable() so
that both conditions are together. This makes the code easier to
understand.
Replace the existing fit_loaded member, which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Join the comment block for the fit_image_load() call back to where it
should be. Also fix a debug statement.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for moving from TPL->VPL->SPL so that the VPL build can fit
properly into the boot flow.
Use #ifdefs to avoid creating unwanted symbols which Binman would then
try (and perhaps fail) to provide.
Add debugging to indicate the next phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
Mark these functions as needed by relocation. These functions are used
to copy data while relocating the next-phase image.
Drop the 'safe' versions from SPL as they are not needed. Change the
static array to a local one, to avoid link errors when trying to access
the data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Mark the lz4 decompression code as needed by relocation. This is used to
decompress the next-phase image.
Drop the 'safe' versions from SPL as they are not needed. Change the
static array to a local one, to avoid a crash errors when trying to
access the data from relocated code. Make this conditional to avoid a
code-size increase when SPL_RELOC is not used/
Signed-off-by: Simon Glass <sjg@chromium.org>
Mark the crc8 code as needed by relocation. This is used as a simple
check against corruption of the code when copying.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a linker symbol which can be used to mark relocation code, so it can
be collected by the linker and copied into a suitable place and executed
when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some phases may wish to use full FIT-loading and others not, so allow
this to be controlled.
Add some debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
With SPL we want to specify the phase of the image to be loaded. Add
support for this.
This is the implementation of a FIT feature added to the spec a few
years ago and entails a small code-size increase, about 70 bytes on
Thumb2.
Signed-off-by: Simon Glass <sjg@chromium.org>
Link: https://docs.u-boot.org/en/latest/usage/fit/index.html
At present the simple FIT-loader always loads images, ignoring whether
they are intended for the next phase or not.
VBE packages up several images in the same FIT, some destined for VPL
and some for SPL. Add logic to check the phase before loading the
image. Return -EPERM in that case and handle it gracefully.
Fix a unnecessary re-computation of read_offset while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the build rule so that hash algorithms are only included in an
SPL build if they are requested. This helps to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The size of some malloc() fields has reduced on 64-bit machines, but
the spl_reloc code was not updated. Fix this to avoid a compiler
warning.
Also update for the new xPL naming.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This code is not necessarily needed in VPL, even if SPL uses it, so
adjust the rules to allow it to be dropped.
Do the same for the hash API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
VPL may want to use driver model for MMC even if TPL does not. Update
the rule in this driver to support that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
JH7110 SoC requires no specific handling before entering Linux kernel.
Let's drop the specific implementation to avoid duplication.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The current implementation is equivalent to the fallback one, so
this shouldn't change any behaviour but cleans the code up only.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Most RISC-V SoCs have similar cleanup_before_linux() functions. Let's
provide a weak symbol as fallback to reduce duplicated code.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The following diagram illustrates the boot flow for OP-TEE OS
initialization on RISC-V.
(1)-----------+
| U-Boot SPL |
+------------+
|
v
(2)-------------------------------------------------------------+
| OpenSBI (fw_dynamic.bin) |
| (4)------------------------+ |
| | optee dispatcher driver | |
+-----------------+-------^---------|-------+------------------+
M-mode | | |
---------+--[trusted domain]---+----.----+--[untrusted domain]-------
S-mode | (coldboot domain) | | |
v | | v
(3)---------------------------+ |(5)----------------------------+
| OP-TEE OS (tee.bin) | | | U-Boot (u-boot-nodtb.bin) |
+----------------------------+ | +-----------------------------+
| |
| v
|(6)----------------------------+
| | Linux |
| +-----------------------------+
This patch enables the inclusion of the OP-TEE binary within the
U-Boot ITB, allowing it to be loaded to a platform defined address
by U-Boot SPL.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Allow specifying load address of OP-TEE binary. It is
recommended that the specified address aligns with the
base address of an PMP-protected NAPOT region and matches
the CFG_TDDRAM_START configuration in OP-TEE.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
If CONFIG_AVAILABLE_HARTS=y, variable available_harts_lock is created in
the data section which will not be writable while executing from flash.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Implement functionality to probe and calculate the DRAM size
during the boot phase for the RISC-V spacemit K1 platform.
Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # BPI-F3 16G
Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch fixed the following coding style suggested by checkpatch.pl:
1. Use tab instead of space
2. Use BIT() instead of <<
3. Use mdelay for long time delay
4. Remove useless parenthesises
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The SCSI specification originally required that the second
Command Data Byte contain the LUN value in its high-order bits,
but this field has been marked as reserved since the SCSI-3 spec
from 1996.
Some vendors uses this byte to pass vendor specific data,
and specifying the LUN can trigger strange behaviors.
For the record, this happened on an UFS device where LUN0 was
working perfectly and reading the other LUNs would get the last
buffer data that was read for LUN0, making this issue very very
hard to debug.
It's sane to assume U-Boot will probably never encounter
an SCSI-2 multi-LUN device, if somehow it happens the enquiry
command would need to get the SCSI level to handle this case.
The Linux fix was added in [1] to fix the exact same issue.
[1] https://lore.kernel.org/all/Pine.LNX.4.44L0.1409021108380.2308-100000@iolanthe.rowland.org/
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Call 'phytec_ft_board_fixup' in the common K3 board code
to expose the product name and part number to Linux.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
ft_board_setup inside the board code allows to alter
device-tree during the boot process.
Introduce a new function for the PHYTEC SOM detection
to read the product name and part number from the EEPROM
content and include both into the device-tree as
* phytec,som-part-number
* phytec,som-product-name
This function can be called from the board code when those
values should be exposed to Linux.
This patch also updates the phytec_print_som_info
function and changes the output.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
As this fragment turns off MMC in both SPL and full U-Boot, we can turn
the whole symbol off rather than just the MMC driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
The Toradex configuration block is stored in the first boot partition of
the eMMC. After reading the configuration block, U-Boot switches back to
the user partition. Currently, this operation always targets mmc device
0, even when the configuration block is stored on mmc device 2.
This patch addresses the issue by switching the mmc device set in
CONFIG_TDX_CFG_BLOCK_DEV to the user partition, rather than using the
hardcoded device 0.
Fixes: a2777ecb9d ("toradex: config block handling")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2
STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
Spurious characters are displayed on U-Boot console.
Usart2 clock is ck_flexgen_08 and its frequency is set
to an incorrect value.
Update ck_flexgen_08 frequency from 100MHz to 64MHz.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
mmu_set_region_dcache_behaviour() parameters must be aligned
which is not always the case.
For example for STM32MP2, we stayed stuck inside
mmu_set_region_dcache_behaviour() in an infinite loop because
set_one_region() always return 0 due to start parameter which is
not aligned.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Updating the framebuffer takes quite a long time on this slow patform,
set CYCLIC_MAX_CPU_TIME_US to 50000 for stm32f469-disco to avoid
following cyclic warning:
"cyclic function video_init took too long: 46784us vs 5000us max"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Updating the framebuffer takes quite a long time on this slow patform,
set CYCLIC_MAX_CPU_TIME_US to 8000 for stm32f769-disco to avoid
following cyclic warning:
"cyclic function video_init took too long: 7280us vs 5000us max"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The clock ck_usbo_48m is a clock source for RCC, so the ck_usbo_48m
clock provided by usbphyc need to be probed when RCC clock driver is
required, in pre-reloc stage.
This patch allow to remove the following warning:
clk_register: failed to get ck_usbo_48m device (parent of usbo_k)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c, in init_device(),
in case of RAW_IMAGE, part->size = block_dev->lba * block_dev->blksz.
_ part->size is declared as u64.
_ block_dev->lba is declared as lbaint_t which is uint64_t
if CONFIG_SYS_64BIT_LBA is enable, otherwise ulong.
_ block_dev->blksz is declared as unsigned long.
For example, in case block_dev->lba = 0x1dacc00, block_dev->blksz = 0x200
then part->size 0x5980000 which is incorrect as both are declared as ulong.
To fix this overflow issue, enable CONFIG_SYS_64BIT_LBA, block_dev->lba is
then declared as uint64_t and part->size get the correct value 0x3b5980000.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
If CONFIG_SYS_64BIT_LBA flag is enable, following warning is triggered:
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c: In function 'init_device':
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:27: warning: format
'%ld' expects argument of type 'long int', but argument 8 has type
'lbaint_t' {aka 'long long unsigned int'} [-Wformat=]
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/log.h:157:21: note: in definition of macro 'pr_fmt'
157 | #define pr_fmt(fmt) fmt
| ^~~
../include/log.h:182:33: note: in expansion of macro 'log'
182 | #define log_debug(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
| ^~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:17: note: in expansion
of macro 'log_debug'
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ^~~~~~~~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:42: note: format string
is defined here
793 | log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
| ~~^
| |
| long int
| %lld
Cast block_dev->lba to u64 and set the length specifier to %lld which
is ok with or without CONFIG_SYS_64BIT_LBA flag.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
If CONFIG_SYS_64BIT_LBA is enable, following compilation warning is
triggered:
CC drivers/fastboot/fb_mmc.o
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_erase_mmc_hwpart':
../drivers/fastboot/fb_mmc.c:215:35: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
215 | printf("........ erased %lu bytes from mmc hwpart[%u]\n",
| ~~^
| |
| long unsigned int
| %llu
216 | dev_desc->lba * dev_desc->blksz, dev_desc->hwpart);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| |
| long long unsigned int
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_boot_ops':
../drivers/fastboot/fb_mmc.c:261:42: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
261 | printf("........ wrote %lu bytes to EMMC_BOOT%d\n",
| ~~^
| |
| long unsigned int
| %llu
262 | blkcnt * blksz, hwpart);
| ~~~~~~~~~~~~~~
| |
| long long unsigned int
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.
Remove these headers so our devicetree and binding headers will both be
in sync with upstream.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The TI DP83822 does have support for configurable RGMII RX/TX clock
shift, add support for parsing DT properties which describe the RX/TX
clock shift configuration and configuration of the matching bits in
RCSR register.
The shift is only configurable on DP83822, the other PHYs supported
by this PHY driver, namely DP83825/DP83826 variants, do not implement
this functionality and the RCSR bits used to configure the clock shift
are missing from those PHYs.
The shift is configurable separately for RX and TX path. Each path can
either enable the shift or disable the shift using single bit. In case
the shift is disabled, a delay of 0ns is added to the path, otherwise
a delay of 3.5ns is added to the path.
Note that the two RCSR bits 11 and 12 have inverted logic, RCSR bit 12
enables RX internal shift when SET, while RCSR bit 11 enables TX shift
when UNSET.
Signed-off-by: Marek Vasut <marex@denx.de>
Weijie Gao <weijie.gao@mediatek.com> says:
This patch series add support for MediaTek MT7987 SoC with its reference
boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these
boards. The clock, pinctrl drivers and the SoC initializaton code are also
included.
Link: https://lore.kernel.org/r/cover.1737621362.git.weijie.gao@mediatek.com
This patch adds general board files based on MT7987 SoC.
MT7987 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with one spi controller.
So three configs are need for these boot types:
1. mt7987_rfb_defconfig - SPI-NOR (spi2) and SPI-NAND (spi0)
2. mt7987_emmc_rfb_defconfig - eMMC + SPI-NOR (spi2)
3. mt7987_sd_rfb_defconfig - SD + SPI-NOR (spi2)
Note: spi2 also supports booting from SPI-NAND, but not the default option.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds basic support for MediaTek MT7987 SoC.
This includes files that will initialize the SoC after boot and
its device tree.
In order to maximize the continuous usable memory space, MT7987 has its
ATF BL31 loaded at the top of RAM. Since u-boot will also locate itself to
top of RAM, u-boot will read the actual memory region of BL31 and set
correct gd->ram_top to avoid u-boot overlapping with BL31.
As now support for mt7987 hasn't been submitted to linux kernel, all dts
filed will be put to arch/arm/dts. They'll be removed after successfully
being merged by linux kernel, and OF_UPSTREAM will also be switched on.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Execution time varies widely with the existing tests. Provides a way to
produce a summary of the time taken for each test, along with a
histogram.
This is enabled with the --timing flag.
Enable it for sandbox in CI.
Example:
Duration : Number of tests
======== : ========================================
<1ms : 1
<8ms : 1
<20ms : # 20
<30ms : ######## 127
<50ms : ######################################## 582
<75ms : ####### 102
<100ms : ## 39
<200ms : ##### 86
<300ms : # 29
<500ms : ## 42
<750ms : # 16
<1.0s : # 15
<2.0s : # 23
<3.0s : 13
<5.0s : 9
<7.5s : 1
<10.0s : 6
<20.0s : 12
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move R-Car Gen3 and Gen4 jump_to_image_no_args() into dedicated
rcar64-spl.c file. The implementation of jump_to_image_no_args()
is identical. No functional change.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Introduce common weak board_early_init_f() in rcar64-common.c
which is the default implementation in case there is no other
board specific board_early_init_f(). Remove board_early_init_f()
from Salvator-X, ULCB and Draak boards where this function is
empty.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
CONFIG_IS_ENABLED(SYS_I2C_LEGACY) is not set on this board,
remove the code and also remove all unnecessary headers that
are included in this file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The common.c content is specific to 64-bit R-Car SoCs, rename
the file to rcar64-common.c and remove R-Car 64-bit ifdeffery
in the file. No functional change.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Introduce board/renesas/common/Makefile and remove the multiple
duplicate copies of obj := ../common/*.o from board Makefiles.
Let the build system include the common Makefile using the
HAVE_VENDOR_COMMON_LIB and build the common objects that are
shared by all the boards that way. No functional change intended.
Some of the remaining board files which include board specific
settings have been updated to use obj-y += to avoid rewriting
the board obj-y target and avoid dropping object files from the
build.
The board/renesas/common/Makefile is now also used when building
RZG2L targets which also set CONFIG_RCAR_64 symbol and 32bit R-Car
Gen2 targets, however, this common code is specific to 64bit R-Car
only. Inhibit the build of this common code for RZG2L using extra
ifndef CONFIG_RZG2L and do not include any code for R-Car Gen2 so
far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Rename directory board/renesas/rcar-common to board/renesas/common and
move files. This allows the build system to use HAVE_VENDOR_COMMON_LIB
which automatically includes board/$(VENDOR)/common/Makefile . Create
temporarily empty board/renesas/common/Makefile to be extended with
actual content later in this series. This is a preparatory patch for
board Makefile simplification. No functional change so far.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Multiple drivers copy the MDIO instance name from struct mii_phy to
struct bb_miiphy_bus, but the name field in these two structs have
different lengths, the bb_miiphy_bus one is 16 bytes, the source one
is 32 bytes. Make sure these two lengths are always synchronized, use
MDIO_NAME_LEN for both.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
It seems that every remaining system which enables BITBANGMII also
enables BITBANGMII_MULTI . Remove the BITBANGMII_MULTI symbol and
assume it is always enabled. This allows removal of a bit of legacy
code. No functional change intended.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/24375
We have use cases where a previous stage boot loader doesn't have any
TPM drivers. Instead of extending the hardware PCRs it produces an
EventLog that U-Boot later replays on the hardware.
The only real example we have is TF-A, which produces the EventLog using
hashing algorithms created at compile time. This creates a problem to the
TPM since measurements need to extend all active PCR banks. Up to now
we were exiting refusing the extend measurements.
TPMs can be instructed to change their active PCR banks, as long as the
device resets immediately after a reconfiguration. This PR is adding
that functionality. U-Boot can now scan the currently active TPM PCR
banks, the ones it was compiled to support and the ones present in an
EventLog. It the reconfigures the TPM on the fly with the correct algorithms.
As explained in commit c2cd7bd3ec ("configs: use syntax CONFIG_FOO=n
in tools-only_defconfig") we need to not use the "# CONFIG_FOO is not
set" syntax here in order to work correctly on OSes where cpp comes
ffrom LLVM.
Fixes: 867e16ae05 ("configs: Resync with savedefconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=389&view=results
- kirkwood: Enable bootstd and other modernization for OpenRD boards
(Tony)
- board: solidrun: clearfog: enable ddr odt0 on write for both
chip-select (Josua)
- configs: mvebu_espressobin_ultra-88f3720_defconfig: enable full
bootflow functionality (Ben)
- Initial support for PXA1908 and samsung-coreprimevelte (Duje)
Samsung Galaxy Core Prime VE LTE is an entry-level PXA1908-based
smartphone. It has 1GB of DRAM, 8GB eMMC and USB connectivity.
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add initial support for Marvell PXA1908. The SoC has 4 Cortex-A53 cores,
a GC7000UL GPU and a variety of peripheral controllers.
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add compatible string for the Intel XScale variant of the 16550. Needed
to match upstream.
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
This appliance has multiple devices from which it can boot. Enable full
bootflow functionality so users can choose a non-default boot device.
Signed-off-by: Ben Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <sr@denx.de>
Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.
Enable ODT[0] for both chip-select during write only.
Original work by Baruch Siach [1] and Chris Packham [2].
[1] aba763a611
[2] dbaf09590d
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
bloblist_find function only returns the pointer of blob data,
which is fine for those self-describing data like FDT.
But as a common scenario, an interface is needed to retrieve both
the pointer and the size of the blob data.
Add a few ut test cases for the new api.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Get eventlog bank mask when parsing the eventlog from previous
boot stage and invoke PCR allocate function based on it.
PCR allocate will be proceeded if any dismatches observed among
the active, supportted and eventlog bank masks to re-configurate
the TPM with the proper algorithms and reboot the system.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add PCR allocate wrapper APIs for using in tcg2 protocol.
The wrapper proceeds a PCR allocate command, followed by a
shutdown command.
A system boot is required after two commands since TPM device needs
a HW reset to activate the new algorithms config.
Also, a helper function is included to determine the new bank mask
for PCR allocation by combining the status of current active,
supported and eventlog bank masks.
A new kconfig is created. PCR allocate and system reboot only
happens when the kconfig is selected, otherwise just exit with
errors.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
TPM2_PCR_Allocate command is required to reconfigure a TPM device
to enable or disable algorithms in run-time, thus this patch introduces
the implementation of PCR allocate APIs and adds related cmd functions
for testing.
To test the feature, ensure that TPM is started up.
Run pcr_allocate command to turn on/off an algorithm, multiple calls
are supported and all changes will be cached:
`tpm2 pcr_allocate <algorithm_name> <on|off>`
Run startup command with argument 'off' to shutdown the TPM.
`tpm2 startup TPM2_SU_CLEAR off`
Reboot the board via `reset` to activate the changes.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
TPM2_shutdown command is sharing same structure and logics with
TPM2_startup, thus this patch extends the existing startup APIs and
cmd functions to support shutdown instead of created new ones.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Variable self assignment has been found by clang. But Linux kernel already
fixed this problem by commit 2a068daf5742 ("ubifs: Remove unnecessary
assignment") and commit ae4c8081eb77 ("ubifs: remove unnecessary
assignment").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The SDRAM_IDX in DDRSS_V2A_CTL_REG describes the number of address bits
minus 16 that are used to determine the mask used to detect memory
rollover and prevent aliasing and false coherency issues.
Set SDRAM_IDX using the device private data, ddr_ram_size for K3 family
of SoCs.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The $loadaddr variable is a hexadecimal value, not a string, it must be
assigned using env_set_hex(). This may break follow up tests, like the
dm_test_cmd_hash_md5 in CI. To avoid any interference with other tests,
set $wgetaddr variable which is specific to this test and use it in the
test.
Fixes: 20f641987f ("test/cmd/wget.c: move net_test_wget() to the cmd test suite")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The ENETCv4 port DT nodes on i.MX95 may contain optional clock phandle
to IMX95_CLK_ENETREF "ref" clock. These "ref" clock must be enabled for
the ethernet to work. These "ref" clock are enabled after cold boot, but
when the system booted Linux and rebooted, those "ref" clock might have
been disabled in the process, which would make ethernet inoperable after
reboot. Make sure those "ref" clock are always correctly enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
The alignment hole caused by cmdidx in struct mmc_cmd cause strange
issues together with the peephole2 optimization on Amlogic SoCs.
Following was observed while working on SPL support for Amlogic SoCs.
sd_get_capabilities() normally issue a CMD55 followed by a CMD51.
However, on at least Amlogic S905 (Cortex-A53) and S905X3 (Cortex-A55),
CMD55 was instead followed by CMD8 (and a few reties) in SPL.
Code from the call site:
cmd.cmdidx = SD_CMD_APP_SEND_SCR; // 51
...
data.blocksize = 8;
...
err = mmc_send_cmd_retry(mmc, &cmd, &data, 3);
Running the code with MMC_TRACE enabled shows:
CMD_SEND:55
ARG 0x50480000
MMC_RSP_R1,5,6,7 0x00000920
CMD_SEND:8
ARG 0x00000000
RET -110
Removing the alignment hole by changing cmdidx from ushort to uint or
building with -fno-peephole2 flag seem to resolve this issue.
CMD_SEND:55
ARG 0x50480000
MMC_RSP_R1,5,6,7 0x00000920
CMD_SEND:51
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000920
Same issue was observed building U-Boot with gcc 8 - 13.
Remove this alignment hole by changing cmdidx from ushort to uint.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tom Rini <trini@konsulko.com>
Return value of function 'lseek', called at pblimage.c:211,
is not checked, but it is usually checked for this function.
This trigger was found using the Svace static analyzer.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When setting the time on the MAX31343, the time is not updated
for one second, and reading the time in this interval will give
the old time. Wait one second after writing so that the date
command will show the correct time when setting the clock.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Pull request efi-2025-04-rc1-2
Documentation:
* describe creating a pflash file for qemu-system-riscv64
UEFI:
* correct logging StartImage()
* use LOGC_EFI consistently
* reduce UEFI size if HAS_BOARD_SIZE_LIMIT=y
* Update efi_run_image() to accept image and device path
* Add a version of efi_binary_run() with more parameters
* Move the fallback code from efi_run_image()
* Pass in the required parameters from EFI bootmeth
* bootmeth_efi: Support PXE booting
Other:
* Enable log filtering by function name
Rather than setting up the global variables and then making the call,
pass them into function directly. This cleans up the code and makes it
all a bit easier to understand.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is only needed if an invalid image/device path is passed in.
Move the code out to a caller where this can be dealt with. The normal
flow will provide these parameters.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses a few global variables at present. With the bootflow we have
the required parameters, so add a function which accepts these. Update
the existing function to call the new one with the globals.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Provide these globals as parameters to this function, on the way to
making it possible to start an image without relying on the globals.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot can be executed in place from a flash device.
Describe how this can be emulated on RISC-V QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If a board has a strict size limit, disable
* Unicode capitalization and
* HII protocols
by default to reduce the image size.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up to now we could only use log level, category, and file for filtering.
Allow filtering on a list of functions.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Function log_has_file() is not used externally. Make it static.
Rename the function to log_has_member() as we can reuse for filtering
other strings.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When logging running an image, e.g. `bootefi hello` the indent is not
correctly reset.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
I have one of these boards loaded with Ubuntu 24.10 (64-bit). Add an
entry for it so that it can be used for testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-By: Heinrich Schuchardt <xypron.glpk@gmx.de>
Buildman has always treated the lack of a toolchain as an infrastructure
problem rather than a build failure.
However the logic for this is not correct, since it does not write a
'done' file in this case.
As a result, one of two things can happen.
1. If a previous build ran in the same (output) directory, the outcome
of *that* build is recorded as the outcome of this one
2. Otherwise, no outcome is recorded
Obviously this inconsistency is not ideal. While (2) is rare, it can be
very confusing as the build sort-of fails but does not produce any
summary output with 'buildman -s'
Overall it seems better to attribute a toolchain issue to the boards
that it affects. This results in clear failures which can be examined,
no matter what happened in the .bm-work directory previously.
So write a 'done' file for each build when a toolchain is missing.
The end result of this patch is to make missing toolchains much more
obvious. It should be things a bit easier for novice users.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not actually used but its presence suggests that it is the
filename for the board database. Drop it to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
This script can fail if there is no toolchain available for the board.
At present this is not handled very nicely, in that only the error
output is reported. It is much more useful to see everything, so
combine stdout and stderr and report them both.
Signed-off-by: Simon Glass <sjg@chromium.org>
The u-boot-test-getrole script runs before the normal environment
variables have been set up. This is unavoidable since the script is
providing necessary information to test.py
This means that U_BOOT_SOURCE_DIR is not set in the environment.
As a result, Labgrid uses its default source path, configured in its
environment variable. While this may happen to work, it is not correct.
Also, it causes problems when running from Gitlab, where the runner may
not have access to that source path.
Provide the required source path in U_BOOT_SOURCE_DIR so that Labgrid
does the right thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: bf89a8f1fc ("test: Introduce the concept of a role")
[1] https://patchwork.ozlabs.org/project/uboot/patch/20241211131858.520639-1-sjg@chromium.org/
Split MMIO accessors into pinctrl-imx-mmio.c and build this
file only if Kconfig symbol PINCTRL_IMX_MMIO is selected.
Select PINCTRL_IMX_MMIO Kconfig symbol for all but pinctrl-imx8.c
driver, which does not use the MMIO accessors. This reduces the
amount of code compiled on platforms which do not use the code.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
The only user of the SCU pinctrl code is pinctrl-imx8.c , fold
the entire pinctrl-scu.c code into pinctrl-imx8.c and remove the
matching Kconfig symbols and Makefile entries. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Call imx_pinctrl_set_state_common() from imx_pinctrl_scu_conf_pins(),
rename imx_pinctrl_scu_conf_pins() to imx_pinctrl_set_state_scu().
Get rid of the unnecessary ifdeffery in pinctrl-imx.h in the process.
Remove all SCU support from pinctrl-imx.c imx_pinctrl_set_state_mmio()
which makes that function a pure MMIO pinctrl configuration accessor.
Update pinctrl-imx8.c to call imx_pinctrl_set_state_scu directly.
No functional change.
This patch is best viewed with git show -w due to indent change.
Signed-off-by: Marek Vasut <marex@denx.de>
Split imx_pinctrl_set_state() into imx_pinctrl_set_state_common() and
imx_pinctrl_set_state_mmio(). The former does the common configuration
parsing, the later does call imx_pinctrl_set_state_common() and then
does pin configuration using either SCU or MMIO accesses. The SCU part
is going to be moved out in follow up patches.
This is a preparatory patch for follow up pinctrl drivers which
do not use the MMIO accessors, but some other means, like SCU or
otherwise. Those will call the common imx_pinctrl_set_state_common()
function wrapped into some other imx_pinctrl_set_state_*() function,
in a way similar to imx_pinctrl_set_state_mmio() does so for MMIO
accesses.
Update all imx_pinctrl_set_state_mmio() call sites to call
imx_pinctrl_set_state_mmio() instead.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
The current implementation of imx_pinctrl_remove() is specific
to the MMIO accessor implementation, rename the function to
imx_pinctrl_remove_mmio() to make this obvious. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
Split imx_pinctrl_probe() into imx_pinctrl_probe_common() and
imx_pinctrl_probe_mmio(). The former does the common setup, the
later does the common setup and MMIO access configuration. The
common setup can be used as-is for SCU based systems, update
the pinctrl-imx8 to call only the common setup, update all the
other pinctrl drivers to call imx_pinctrl_probe_mmio().
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
The probe function is identical across all the pinctrl drivers.
Inline the imx_pinctrl_soc_info access into imx_pinctrl_probe()
and drop all the duplicate probe functions. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
The return callback for SCU variant of the pinctrl drivers does
nothing but returns 0. Remove the return callback from the SCU
driver itself, that has the same effect. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Rename the structure instances to match driver names, so they
can be easily looked up e.g. in objdump and readelf outputs.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Move imx_pinctrl_ops into drivers and staticize. This is preparatory
patch for follow up pinctrl drivers which will not use this variant
of imx_pinctrl_ops content. This should not change size, as most of
the deployments compiled in one pinctrl driver anyway. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
tee-os node is guarded by CONFIG_OPTEE. Since OPTEE adds driver support
for OP-TEE, the binary should then be packaged in the bootable image.
Remove the optional property to enforce this requirement.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Simon Glass <sjg@chromium.org> says:
The current method of running unit tests relies on subcommands of the
ut command. Only the code in each subcommand knows how to find the tests
related to that subcomand.
This is not ideal and we now have quite a few subcommands which do
nothing but locate the relevant tests in a linker list, then call a
common function to run them.
This series adds a list of test suites, so that these subcommands can be
removed.
An issue with 'ut all' is that it doesn't record how many tests failed
overall, so it is necessary to examine copious amounts of output to look
for failures. This series adds a new 'total' feature allow recording the
total number of failed tests.
To help with 'ut all' a new pytest is created which runs it (as well as
'ut info') and makes sure that all is well. Due to the 'ut all' failures
this does not pass, so the test is disabled for now. It is here because
it provides security against misnaming a test suite and causing it not
to run.
Future work may:
- get 'ut all' passing
- enable test_suite() in CL, to ensure that 'ut all' keeps passing
- record duration of each suite
- allow running the tests in random order to tease out dependencies
- tweak the output to remove common prefixes
- getting rid of bootstd, optee and seame 'ut' subcommands
Link: https://lore.kernel.org/r/20250120212613.516664-1-sjg@chromium.org
Rather than having the help in the longhelp, put it in the suite info
so 'ut info -s' can show it. This is tidier, particular due to the
removal of #ifdefs
This means that the help text is present in the image (although not
displayed with 'ut info -s') so the image-size increases. But with
UNIT_TEST enabled, we expect large images so this doesn't seem
important.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put the suites in order by name, for easier code-maintenance. This also
helps find test results for a particular swuit in the 'ut all' output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function to show the stats, so we can decide when to print it.
This slightly adjusts the output, so that any 'test not found' message
appears on its own line after all other output.
The 'failures' message now appears in lower case so update pytest
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful information and is not always the same as the 'count' arg
to ut_run_list() so add it as a separate stat.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a struct to hold the stats, since we also want to have the same
stats for all runs as we have for each suite.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this function to access a unit-test state, so that the caller can
collect results from running multiple suites.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not needed anymore. If a test suite is not built, then it will
have no linker-list entries. So we can just check for that and know that
the suite is not present.
This allows removal of the #ifdefs and the need to keep them in sync
with the associated Makefile rules, which has actually failed, since the
help does not match what commands are actually present.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'info' test is not a real test. With the new suite array we can drop
this and the associated special-case code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new suite-runner to run these tests instead.
It is not clear that these actually work, since they are not enabled on
sandbox for some reason.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new suite-runner to run these tests instead.
It is not clear that these actually work, since they are not enabled on
sandbox for some reason.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The current cmd_ut_sub[] array was fine when there were only a few test
suites. But is quite unwieldy now:
- it requires a separate do_ut_xxx for each suite, even though the code
for most is almost identical
- running more than one suite requires running multiple commands, and
there is no record of which suites passed or failed
- 'ut all' runs all suites but reports their results individually
- we need lots of #ifdefs in the array, mirroring those in the makefile
but maintained in a separate place
In fact the tests are all in the same linker list. The suites are
grouped, so it is possible to access the information without a command.
Introduce a 'suite' array, which holds the cmd_ut_...() function to
call, but can also support running a suite without that function. This
means that the array of struct cmd_tbl is transformed into an array of
'struct suite'.
This will allow removal of many of the functions, particularly those
without test-specific init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most test suites have a _test suffix. This is not necessary as there is
also a ut_ prefix.
Drop the suffix so that (with future work) the suite name can be used as
the linker-list name.
Remove the suffix from the pytest regex as well, moving it to the top of
the file, as it is a constant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Python test which runs 'ut all' and then checks that the expected
suites are present and all tests in each suite are run.
This can help to check that nothing is missing.
Update 'ut info' to ignore the 'all' suite when counting the number of
suites, since that is really just a combination of all the other suites.
Adjust the message for skipped tests so that appears even if no
particular test was selected. This helps the new 'test_suite' test see
what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to see a list of available suites. At present this is
handled by the longhelp for the 'ut' command, but this is not in a
format which can be easily parsed by python tests.
Add a -s option to show this. At present it is not possible to show the
number of tests in each suite, but future work will address this. For
now, show a ?
Signed-off-by: Simon Glass <sjg@chromium.org>
Some suites have a different name from that used in the linker list.
That makes it hard to programmatically match the name printed when the
suite runs to the linker-list name it has.
Update the names so they are the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few messages lack a newline so the test output shows the next
test-name on the same line. For example:
Beware: this test sets local variable dollar_bar and dollar_quux
and they cannot be unset!Test: hush_test_env_dollar: dollar.c
This is confusing, so fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A limitation of most linker_list macros is that they cannot easily be
used in data structures. This is because they include code inside their
expressions.
Provide a way to support this, with new ll_start_decl() and
ll_end_decl() macros.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move these operations into separate functions so that it is clearer what
is needed. These functions can also be called from somewhere other than
ut_run_list().
Signed-off-by: Simon Glass <sjg@chromium.org>
The string conversion functions are implemented in lib/strto.c which is
only compiled if CONFIG_STRTO=y.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This config is causing conflicts with how fdtfile variable is
initialized.
For K3 devices, CONFIG_DEFAULT_DEVICE_TREE= "ti/k3-<board>.dtb".
With CONFIG_TI_FDT_FOLDER_PATH also prefixing "ti", fdtfile is then
"ti/ti/k3-<board>.dtb". This variable is updated when fitImage is
booted and fails to boot due to the parsing error "ti/ti/".
Given that there are no other users of this config other than K3 for
now, it is being removed.
Since am64x, j721e and j721s2 also define a DEFAULT_FDT_FILE, update
them to conform to the DEFAULT_DEVICE_TREE standard.
Signed-off-by: Aashvij Shenai <a-shenai@ti.com>
Replace Maximumm with Maximum in Kconfig symbol description, fix a typo.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24323
Android:
- Fix kcmdline null pointer dereference (reported by coverity and
multiple users)
- Move Igor to reviewers instead of maintainers for avb/ab
- Fix booting Android with AVB built-in, but disabled via
fastboot flash --disable-verity vbmeta vbmeta.img
1. Bug fixed for doorbell in secure device manager mailbox driver
2. Enhancement on SoCFPGA dwc_eth_xgmac driver
3. Enhancement on DW MAC driver
4. Improved the error message and status for SoC64 device FPGA
configuration driver
5. Updated existing watchdog in system manager to support new SM device
Currently the FPGA reconfig status only return a single error status
which make the debugging of FPGA reconfiguration hard.
This patch is to expose the error status, major error code and
minor error code, for the FPGA reconfig to upper layer app.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
This patch adds support for configuring the ethernet MAC mode independently
from the PHY mode on our SoC FPGA board. Specifically, this is necessary
for a scenario where the ethernet controller MAC is connected to the
FPGA HVIO with a different GMII interface, and the FPGA output is routed
to the PHY using a RGMII interface.
To support this configuration, a mechanism is introduced to handle
separate MAC mode settings, ensuring that the MAC controller and PHY
can operate correctly with their respective interface modes.
If mac-mode is not defined, the MAC mode will default to the PHY mode,
ensuring compatibility and proper operation between the MAC and PHY.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Agilex5 having several ethernet instance, adding the device
name at the error message to differentiate between which
instance is having issue.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
An issue was identified where selecting the phy-mode as
rgmii-id in the device tree source (DTS) would cause the
`dwc_eth_xgmac_socfpga` driver to raise an unsupported phy mode error.
From the MAC controller's perspective, the rgmii and rgmii-id
phy modes are effectively identical. To address this, both
modes will now be configured to rgmii in the MAC controller.
This change ensures that the rgmii-id phy mode is properly
supported without error.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
This patch adds support for the "rgmii-id", "rgmii-rxid", and
"rgmii-txid" modes for the dwmac_socfpga driver.
Signed-off-by: Rufus Segar <rhs@riseup.net>
The current write and notify SDM to read mechanism has a flaw where
SDM is not notified enough to be able to read all the data in the buffer.
This is caused by SDM doorbell will only be sent out once the command
buffer overflow check is satisfied. If the command buffer does not reach
overflow status, no SDM doorbell will be sent out, which may cause a
timeout as the mailbox driver will be waiting for the SDM to read the
buffer to empty even though SDM is not notified to do so.
The solution is to remove the command buffer overflow check
and set the SDM doorbell to always trigger at the end of the command
buffer.
This will ensure that the SDM is able to read all of the data.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
This commit is to fix the system manager watchdog mode setting to support
until mode_4 for Agilex5. This changes can refer to system manager register
map on wddbg fields.
In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog
until mode_3 and it is already been set correctly for it to halt on any CPU in
debug mode. However, in Agilex5 this fix is needed in order to enable the watchdog
pause feature for mode_4 when entering debug mode. If 0xF is not been set on mode_4,
the Watchdog Timers will not halt on any CPU. As by default value, the pause signal
does not assert when any CPU is in debug mode and the watchdog continue to count.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Michael Chang <zhang971090220@gmail.com> says:
I am resubmitting the patch titled "Add bitbang feature for npcm8xx
and driver" for review and inclusion in the upstream project.
Driver didn't support bitbang feature.
Add bb_miiphy_bus function for driver and open feature for npcm8xx
the log is as below:
-------------------------------------------------
U-Boot 2024.10-g30b9cdaf2df5-dirty (Jan 09 2025 - 00:57:37 +0000)
CPU-0: NPCM845 A1 @ Model: Nuvoton npcm845 Development Board (Device Tree)
DRAM: 1 GiB
RNG: NPCM RNG module bind OK
OTP: NPCM OTP module bind OK
AES: NPCM AES module bind OK
SHA: NPCM SHA module bind OK
I/TC: Reserved shared memory is enabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
Core: 649 devices, 28 uclasses, devicetree: separate
WDT: Not starting watchdog@901c
MMC: sdhci@f0842000: 0
Loading Environment from SPIFlash... SF:
Detected w25q512jvq with page size 256 Bytes, erase size 64 KiB,
total 64 MiB
OK
In: serial@0
Out: serial@0
Err: serial@0
Net: eth0: eth@f0802000, eth1: eth@f0804000, eth3: eth@f0808000
Hit any key to stop autoboot: 0
U-Boot>
U-Boot>
U-Boot>setenv ipaddr 192.168.16.3
U-Boot>ping 192.168.16.12
eth@f0802000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0802000
eth@f0804000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0804000
Speed: 100, full duplex
Using eth@f0808000 device
host 192.168.16.12 is alive
Link: https://lore.kernel.org/r/20250117104540.1580343-1-zhang971090220@gmail.com
This patch adds support for MediaTek MT7987.
MT7987 features MediaTek NETSYS v3, similar to MT7988, features three GMACs
which support 2.5Gb HSGMII. One 2.5Gb PHY is also embedded an can be
connected to a dedicated GMAC.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
mtk_eth.c contains not only the ethernet GMAC/DMA driver, but also
some ethernet switch initialization code. As we may add more switch
support in the future, it's better to move them out of mtk_eth.c to
avoid increasing the code complexity.
Since not all switches are supported for a particular board, Kconfig
options are added to allow user to select which switch should be
built into u-boot. If multiple switches are selected, auto-detecting
can also be enabled.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Enable ENV_OVERWRITE to allow environment variables to be
overwritten within the board code. This is required to add
MAC addresses during SOM detection.
Additionally, set ENV_IS_NOWHERE for boot sources other than MMC.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Enable the GPIO command to allow access to the GPIO pins.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The phyBOARD-Electra does not include a PCA953x I2C GPIO multiplexer.
Remove this configuration as it is a remnant from another
defconfig, and enable CONFIG_DA8XX_GPIO for the DA8XX DaVinci GPIO
controller instead.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Increase the malloc pool size for the SPL by additional 4kB from
0x7000 to 0x8000.
This fixes following error message:
...
alloc space exhausted ptr 7028 limit 7000
DRAM init failed: -12
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
With commit 22ce56a3eb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().
After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
1. Fix mmc clock order of mt7981 to match the clock name
2. Limit the max clock of SD to 50MHz to meet SD Card Spec 2.0
3. Increase the CLK pin driving strength to 8mA
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add driving settings for both SPI and SD/eMMC interfaces to support ensure
flash devices is accessible for ram-booting.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add all three GMACs nodes for mt7988. Each GMAC can be
configured to connect to different ethernet switches/PHYs.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
One MediaTek PCIe Gen3 controller has only one port, where PCI bus 0
on this port represents the controller itself and bus 1 represents
the external PCIe device.
If multiple PCIe controllers are probed in U-Boot, U-Boot will use
bus numbers greater than 2 as input parameters. Therefore, we should
convert the BDF bus number to either 0 or 1 by subtracting the
offset by controller->seq_.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Explicitly add quad mode capabilities or the SPI controller may
start transfer in single mode.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Update the image load address to ensure it matches the mt7629 NOR
controller's DMA alignment requirements.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds missing initialization of fields in INFRA_MUX struct
which caused uart broken after any other infra mux being enabled by
'clk_prepare_enable'
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
When booting an Android build with AVB enabled, it's still possible to
deactivate the check for development purposes if the bootloader state is
UNLOCKED.
This is very useful for development and can be done at flashing time via:
$ fastboot flash --disable-verity --disable-verification vbmeta vbmeta.img
However, with bootmeth_android, we cannot boot this way:
Scanning bootdev 'mmc@fa10000.bootdev':
0 android ready mmc 0 mmc@fa10000.bootdev.whole
** Booting bootflow 'mmc@fa10000.bootdev.whole' with android
avb_vbmeta_image.c:188: ERROR: Hash does not match!
avb_slot_verify.c:732: ERROR: vbmeta_a: Error verifying vbmeta image: HASH_MISMATCH
get_partition: can't find partition '_a'
avb_slot_verify.c:496: ERROR: _a: Error determining partition size.
Verification failed, reason: I/O error occurred while trying to load data
Boot failed (err=-5)
No more bootdevs
From the logs we can see that avb tries to read a partition named '_a'.
It's doing so because the last element of requested_partitions implicitly is
'\0', but the doc explicitly request it to be NULL instead.
Add NULL as last element to requested_partitions to avoid this problem.
Fixes: 125d9f3306 ("bootstd: Add a bootmeth for Android")
Reviewed-by: Julien Masson <jmasson@baylibre.com>
Link: https://lore.kernel.org/r/20250108-avb-disable-verif-v2-1-ba7d3b0d5b6a@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Following the move of the H616 family to OF_UPSTREAM in the last cycle,
now some older SoCs with identical DTs follow the lead: the F1C100s, A10,
A10s, A13. The remaining SoCs suffer from that IRQ cells incompatiblity,
breaking support for Linux < v5.13, so I am holding their move back still.
Otherwise we get proper support for the PinePhone v1.2, and PSTORE support
for all revisions of that device.
This is rounded up by a PMIC related fix for some A80 boards, and two
cleanup patches that are preparations for two new SoCs families, being
worked on as we speak. But they have to wait for the next cycle.
Gitlab CI passed, and I booted that briefly on some boards.
The ofnode_find_subnode() function currently processes things two
different ways, so the treatment of unit addresses differs depending on
whether OF_LIVE is enabled or not.
Add a new version which uses the ofnode API and add a test to check that
unit addresses can be matched correctly. Leave the old function in place
for the !OF_LIVE case, to avoid a code-size increase, e.g. on
firefly-rk3288
Signed-off-by: Simon Glass <sjg@chromium.org>
When a unit-address is provided, use it to match against the node
name.
Since this increases code size, put it into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add bloblist support so that tables can be generated and placed in a
bloblist, then passed to a payload using UPL
Signed-off-by: Simon Glass <sjg@chromium.org>
The add_u_boot_and_runtime() function paints with a broad brush,
considering all of the memory from the top of U-Boot stack to
gd->ram_top as EFI_RUNTIME_SERVICES_CODE
This is fine, but we need to make sure we don't add a separate entry for
any ACPI tables in this region (which happens when bloblist is used for
tables). Otherwise the memory map looks strange and we get a test
failure on qemu-x86 (only) for the 'virtual address map' test.
Good map:
Type Start End Attributes
================ ================ ================ ==========
CONVENTIONAL 0000000000000000-00000000000a0000 WB
RESERVED 00000000000a0000-00000000000f0000 WB
RUNTIME DATA 00000000000f0000-00000000000f2000 WB|RT
RESERVED 00000000000f2000-0000000000100000 WB
CONVENTIONAL 0000000000100000-0000000005cc7000 WB
BOOT DATA 0000000005cc7000-0000000005ccc000 WB
RUNTIME DATA 0000000005ccc000-0000000005ccd000 WB|RT
BOOT DATA 0000000005ccd000-0000000005cce000 WB
RUNTIME DATA 0000000005cce000-0000000005cf0000 WB|RT
BOOT DATA 0000000005cf0000-0000000006cf5000 WB
RESERVED 0000000006cf5000-0000000006cfa000 WB
ACPI RECLAIM MEM 0000000006cfa000-0000000006d1c000 WB
RESERVED 0000000006d1c000-0000000006f35000 WB
RUNTIME CODE 0000000006f35000-0000000006f37000 WB|RT
RESERVED 0000000006f37000-0000000008000000 WB
RESERVED 00000000e0000000-00000000f0000000 WB
Bad map: (with BLOBLIST_TABLES but without this patch):
Type Start End Attributes
================ ================ ================ ==========
CONVENTIONAL 0000000000000000-00000000000a0000 WB
RESERVED 00000000000a0000-00000000000f0000 WB
ACPI RECLAIM MEM 00000000000f0000-00000000000f1000 WB
RESERVED 00000000000f1000-0000000000100000 WB
CONVENTIONAL 0000000000100000-0000000005ca5000 WB
BOOT DATA 0000000005ca5000-0000000005caa000 WB
RUNTIME DATA 0000000005caa000-0000000005cab000 WB|RT
BOOT DATA 0000000005cab000-0000000005cac000 WB
RUNTIME DATA 0000000005cac000-0000000005cce000 WB|RT
BOOT DATA 0000000005cce000-0000000006cd3000 WB
RUNTIME DATA 0000000006cd3000-0000000006cd5000 WB|RT
BOOT DATA 0000000006cd5000-0000000006cf4000 WB
RESERVED 0000000006cf4000-0000000006cf9000 WB
ACPI RECLAIM MEM 0000000006cf9000-0000000006ce6000 WB
Signed-off-by: Simon Glass <sjg@chromium.org>
This isn't strictly needed, but with UPL we use the reserved-memory
nodes to indicate where the SMBIOS table is. Tianocore requires 4KB
alignment on these regions, so it is easier to adjust the alignment
to match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the tables to use linux/sizes rather than open-coped values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If video is enabled we expect it to work. Avoid silent failure by adding
a panic if things go wrong.
Expand the SPL malloc-area for qemu-x86_64 to avoid a panic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add this information to the handoff structure so that it is available to
U-Boot proper. Update bochs and the video handoff.
Signed-off-by: Simon Glass <sjg@chromium.org>
The space here is quite tight and there is plenty of room in the ROM.
Move SPL earlier to allow for expansion.
Signed-off-by: Simon Glass <sjg@chromium.org>
QEMU can have its own internal ACPI and SMBIOS tables. At present U-Boot
copies out the SMBIOS tables but points directly to the ACPI ones.
The ACPI tables are not aligned on a 4KB boundary, which means that UPL
cannot use them directly, since it uses a reserved-memory node for the
tables and that it assumed (by EDK2) to be 4KB-aligned.
On x86, QEMU provides the tables in a mapped memory region and U-Boot
makes use of these directly, thus making it difficult to use any common
code.
Adjust the logic to fit within the existing table-generation code. Use a
bloblist always and ensure that the ACPI tables is placed in an aligned
region. Set a size of 8K for QEMU. This does not actually put all the
tables in one place, for QEMU, since it currently adds a pointer to the
tables in QFW.
On ARM, enable bloblist so that SMBIOS tables can be added to the
bloblist.
Signed-off-by: Simon Glass <sjg@chromium.org>
QEMU always gets its devicetree from the OF_BOARD mechanism so we should
not depend on !BLOBLIST here.
It's not clear why we need to have any relationship with BLOBLIST so
let's remove the entire condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2b71470628 dts: OF_HAS_PRIOR_STAGE should depend on !BLOBLIST
Reviewed-by: Tom Rini <trini@konsulko.com>
In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner A10s/A13 SoCs (sun5i) between the U-Boot and the
Linux kernel repository.
Remove the old copies of the A10s/A13 related .dts and .dtsi files, and
switch most of sun5i boards over to use OF_UPSTREAM.
There are two boards for which we don't have DTs in the kernel tree.
Keep those two .dts files in the legacy U-Boot DT directory, and let
their defconfig opt out of OF_UPSTREAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner A10 SoCs (sun4i) between the U-Boot and the
Linux kernel repository.
Remove the old copies of the A10 related .dts and .dtsi files, and switch
most of sun4i boards over to use OF_UPSTREAM.
There are two boards for which we don't have DTs in the kernel tree.
Keep those two .dts files in the legacy U-Boot DT directory, and let
their defconfig opt out of OF_UPSTREAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
In contrast to some other Allwinner SoCs, there is no difference between
the DTs for the Allwinner F1C100/F1C200 SoCs (sunvi) between the U-Boot
and the Linux kernel repository.
Remove the old copies of the F1Cx00 related .dts and .dtsi files, and
switch the whole suniv SoC over to use OF_UPSTREAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
In newer 1.2 PinePhone board revisions LIS3MDL magnetometer was replaced by
AF8133J. They use the same PB1 pin in different modes.
LIS3MDL uses it as an gpio input to handle interrupt.
AF8133J uses it as an gpio output as a reset signal.
It wasn't possible at runtime to enable both device tree
nodes and detect supported sensor at probe time.
AF8133J has reset pin (PB1) connected to the SoC. By default AF8133J
is in a reset state and don't respond to probe request on I2C
bus. Extra code would be needed to handle reset signal. Therefore this
code uses LIS3MDL magnetometer instead of AF8133J.
Introducing new dts 1.2b with AF8133J sensor would require probing in
SPL. That would lead to pulling in into SPL I2C controller driver,
RSB controller driver, introducing new AXP803 driver to power-up
sensors for probe. It's working, but SPL is pretty size-constrained on
A64 and doesn't have much space. Therefore fdt fixup is done in U-Boot
proper without introducing new board revision and new dts.
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Link: https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.com/
Link: https://lists.denx.de/pipermail/u-boot/2024-February/545700.html
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: fix formatting]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
pstore will allow users to catch kernel crashes and report them to
developers. Modern (Android) phones have pstore usually enabled to get
information about kernel crash, since it's the simplest way to get
kernel backtrace on mobile device without serial console. Usually it's
enabled by default in distribution kernels like Debian.
CONFIG_PSTORE=y
CONFIG_PSTORE_RAM=m
systemd has service that automatically handles pstore and saves them
in /var/lib/pstore for later usage.
In general any DRAM address, that isn't overwritten during a boot is
suitable for pstore.
Range from 0x40000000 - 0x50000000 is heavily used by u-boot for
internal use and to load kernel, fdt, fdto, scripts, pxefile and ramdisk
later in the boot process. Ramdisk start address is 0x4FF00000,
initramfs for kernel with some hacking features and debug info enabled
can take more than 100Mb and final address will be around 0x58000000.
Address 0x61000000 will most likely not overlap with that.
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
So far all sunxi boards programming the DCDC1 power rail on the AXP PMIC
also set the DCDC5 rail, so we could handle both with the same DCDC1
guard.
Some boards using the AXP313 will need to set DCDC1 now as well, and
since the AXP313 only has three buck converters, there will be no DCDC5,
so this trick is not going to work anymore.
Don't try to be too clever, and just protect programming the two DCDC
rails with two separate guards.
This has the interesting side effect of fixing operation on A80 boards,
using the AXP809 PMIC. Apparently programming DCDC5 right after DCDC1,
but before the other three rails caused some glitch, which made the board
hang during Linux boot, during the PSCI handler in U-Boot. Just keeping
the old setup order (DCDC1,2,3,4,5) will make those boards boot to the
Linux prompt again.
Fixes: ffb02942fa ("sunxi: board: simplify early PMIC setup conditions")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
The H616 DRAM controller requires some board specific parameters, which
we declare in Kconfig, let each board specify in their defconfig, and
then use in the DRAM init code.
Other DRAM controllers now require a very similar, if not identical
parameter set, with so far the same parameter names used.
To help keep the Kconfig file at bay, rename the existing parameter
names to drop the H616_ part in there, to make them more naturally
reusable for other SoCs.
No functional change, just a rename.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
With each new SoC added to the clock_sun50i_h6.h header file, we add a
list of default values for the bus clock registers. This list gets a bit
hard to read, as the spacing between the lines looks confusing.
Tighten the lines by removing empty lines, to make it more obvious which
values belong together. Also remove those comments that were more or
less duplicating the next code line, and didn't add any information.
This makes it easier to find existing values and to add support for new
SoCs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Use this function instead of fit_image_get_emb_data() data, since it
works will FITs that use external data.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is really just getting the data. The size comes along for
the ride. In fact this function is only reliable way to obtain the data
for an image in a FIT, since the FIT may use external data.
Rename it to fit_image_get_data()
Signed-off-by: Simon Glass <sjg@chromium.org>
This function can only be used with FITs that use embedded data. Rename
it so this is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Update ofnode_add_subnode() and ofnode_add_prop() to return a suitable
error when space is exhausted in the FDT. This makes it easier to see
what is going wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At some point it would be nice to have the ofnode API automatically
expand the tree as required, to accommodate new nodes. For now, expand
the default size so that UPL can be supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the version of this function in mkimage so that it uses a const
pointer, as is done in the mapmem.h header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some header files included on the host are moving to use abuf, so adjust
the header-inclusion to bring in size_t correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
In many cases it is useful to get the address of a buffer, e.g. when
booting from it. Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to encourage people to use an allocated bloblist since it is
more flexible than a fixed one. Make this the default, being sure not to
change existing users.
The unit tests require BLOBLIST_FIXED so add a dependency in the
Makefile to avoid build errors.
All sandbox builds require BLOBLIST_FIXED so make that the default for
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
The highlights are:
* Fixed boot regression due to broken memory parsing
* Enable HW RNG and KASLR on all platforms
* Add support for Snapdragon X1 Elite hardware (clk/pinctrl)
* Add support for QCS9100 ride automotive development platform (clk/ufs)
* Add support for PCIe on SM8550, SM8650 and X1E
* Implement software debounce for PMIC buttons
Additionally, some minor improvements to "ufetch" have been pulled in:
* Show CPU architecture (arm/mips/etc)
* Make CONFIG_BLK optional
* Fix 32-bit support
Simon Glass <sjg@chromium.org> says:
This includes various patches towards implementing the VBE abrec
bootmeth in U-Boot. It mostly focuses on introducing a relocating
SPL-loader so that VBE can run in the limited amount of SRAM available
on many devices.
Another minor new feature is support in VBE for specifying the image
phase when loading from a FIT. This allows a single FIT to include
images for several boot phases, thus simplifying image-creation.
One lingering niggle in this series is that it has a different code path
for sandbox, since it does not support the relocating jump. It should be
possible to resolve this with additional work, but I have not attempted
this so far.
For v2, I have split the first patch into 5 pieces, to make it easier to
see the code-size impact, plus added a few tweaks to reduce code size.
Again, only MMC is supported so far.
Looking ahead, series G will have some more plumbing and H some rk3399
pieces. That should be enough to complete these feature.
Here is a run in my lab, with the VBE ABrec bootmeth. You can see that
VPL runs before memory is set up. SPL sets up memory and can be upgraded
in the field reliably.
$ ub-int vbe
Building U-Boot in sourcedir for rk3399-generic
Bootstrapping U-Boot from dir /tmp/b/rk3399-generic
Writing U-Boot using method rockchip
U-Boot TPL 2025.01-rc3-00345-gdfbdbf1eb56c-dirty (Jan 08 2025 - 10:47:58)
Trying to boot from vbe_abrec
load: Firefly-RK3399 Board
Using 'config-3' configuration
Trying 'image-vpl' firmware subimage
Using 'config-3' configuration
Trying 'fdt-3' fdt subimage
U-Boot VPL 2025.01-rc3-00345-gdfbdbf1eb56c-dirty (Jan 08 2025 - 10:47:58)
Trying to boot from vbe_abrec
load: Firefly-RK3399 Board
Starting with empty state
VBE: Firmware pick A at 800000
Using 'config-3' configuration
Trying 'spl' firmware subimage
Using 'config-3' configuration
Trying 'fdt-3' fdt subimage
Channel 0: DDR3, 800MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: DDR3, 800MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
U-Boot SPL 2025.01-rc3-00345-gdfbdbf1eb56c-dirty (Jan 08 2025 - 10:47:58 -0700)
Trying to boot from vbe_abrec
load: Firefly-RK3399 Board
VBE: Firmware pick A at 900000
load_simple_fit: Skip load 'atf-5': image size is 0!
Relocating bloblist ff8eff00 to 100000: done
ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
U-Boot 2025.01-rc3-00345-gdfbdbf1eb56c-dirty (Jan 08 2025 - 10:47:58 -0700)
SoC: Rockchip rk3399
Reset cause: POR
Model: Firefly-RK3399 Board
DRAM: 4 GiB (effective 3.9 GiB)
Core: 314 devices, 33 uclasses, devicetree: separate
MMC: mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
Loading Environment from SPIFlash... Invalid bus 0 (err=-19)
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
In: serial,usbkbd
Out: serial,vidconsole
Err: serial,vidconsole
Model: Firefly-RK3399 Board
Net: PMIC: RK808
eth0: ethernet@fe300000
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: USB EHCI 1.00
Bus usb@fe3e0000: USB OHCI 1.0
Bus usb@fe900000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 1 USB Device(s) found
scanning bus usb@fe900000 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Link: https://lore.kernel.org/r/20250116012723.2820301-1-sjg@chromium.org
When building without DHCP/PXE configurations (NET disabled),
compilation errors may occur due to mismatched bootargs.
Ensure bootargs related to DHCP/PXE are not enabled if the
corresponding commands are disabled.
include/config_distro_bootcmd.h:443:9: error: expected ‘}’ before
‘BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE’
443 | BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Chanho Park <parkch98@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The get_timer function returns an unsigned long which may be calculated
from the ARM system counter. This counter is reset only on a cold reset.
U-boot divides this counter down to a 1000 Hz counter that will cross
the 32bit barrier after a bit more than 49 days. Assigning the value to
an unsigned int will truncate it on 64bit systems.
Passing this truncated value back to the get_timer function will return
a very large value that is certainly larger than the timeout and so will
go down the error path and besides stopping U-Boot will lead to messages
like
"SPI: QSPI is still busy after poll for 5000 ms."
Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
We have a duplicate declaration of spi_mem_default_supports_op() which
was added twice, first with commit af6266c1c2 ("mem: spi-mem: add
declaration for spi_mem_default_supports_op") for v2021.04, and again
with commit 2299076e34 ("spi: spi-mem: export
spi_mem_default_supports_op()") for v2021.07.
The first commit is reverted here, because the second better matches the
definition and has a better place in the declaration order.
Note: Linux declares this in a different section of spi-mem.h which is
disabled in U-Boot through `#ifndef __UBOOT__`.
This reverts commit af6266c1c2.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
First try dropping this was with commit 37434db29b ("spi: atmel: Drop
atmel_spi.h") back in 2018 which was reverted not much later with commit
5270df2836 ("Revert "spi: atmel: Drop atmel_spi.h"").
Second try dropping this was in 2020 with commit beeb34ac0c ("spi:
atmel: Drop atmel_spi.h"), but that only moved all the definitions into
the source file and did not remove the header file.
Currently all of the definitions in the header file are (still)
contained in the source file, and the header file is include nowhere.
Fixes: beeb34ac0c ("spi: atmel: Drop atmel_spi.h")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
For a sandbox implementation, where code size is no object, it makes sense
to use the full bootstd drivers to load images.
For real boards, running from SRAM, this adds quite a bit of overhead.
Add a way to load the next phase using just the underlying storage
driver, to reduce code size. For now, only MMC is supported.
Change the log_debug() to show the load address and size in a more
neutral way, rather than suggesting that the load has already happened.
Signed-off-by: Simon Glass <sjg@chromium.org>
VBE needs to load different images from a FIT depending on the xPL phase
in use. The IH_PHASE value is used to select the image to load.
Add the required logic to handle this. For compatibility with the
SPL-loader driver, fill out a struct spl_image_info with the details
needed to boot the next phase.
This is good enough for VBE-simple but ABrec will need the full set of
bootstd features. So add a USE_BOOTMETH define to control this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add FDT support so that this can be copied down in memory after loading
and made available to the new image.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is fairly easy to use. The SPL loader sets up some fields in the
spl_image_info struct and calls spl_reloc_prepare(). When SPL is ready
to do the jump it must call spl_reloc_jump() instead of jump_to_image().
Add this logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
When one xPL phase wants to jump to the next, the next phase must be
loaded into its required address. This means that the TEXT_BASE for the
two phases must be different and there cannot be any memory overlap
between the code used by the two phases. It also can mean that phases
need to be moved around to accommodate any size growth.
Having two xPL phases in SRAM at the same time can be tricky if SRAM
is limited, which it often is. It would be better if the second phase
could be loaded somewhere else, then decompressed into place over the
top of the first phase.
Introduce a relocating jump for xPL to support this. This selects a
suitable place to load the (typically compressed) next phase, copies
some decompression code out of the first phase, then jumps to this code
to decompress and start the next phase.
This feature makes it much easier to support Verified Boot for Embedded
(VBE) on RK3399 boards, which have 192KB of SRAM.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function will be used by the relocating jumper too, so add a
typedef to the header file to avoid mismatches.
Signed-off-by: Simon Glass <sjg@chromium.org>
In many cases the FIT includes a devicetree. Add support for loading
this into a suitable place in memory.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases only the 'loadable' property is present in the FIT.
Handle this by loading the first such image.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no guarantee that an FIT image starts on a block boundary. When
it doesn't, the image starts part-way through the first block.
Add logic to detect this and copy the image down into place.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the VBE implementation is limited to sandbox only. Adjust the
call to fit_image_load() to remove this limitation.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient to use TEXT_BASE as a place to hold the FIT header, but
this does not work in VPL, since SDRAM is not inited yet.
Allocate the memory instead. Ensure the size is aligned to the media
block-size so that it can be read in directly. Improve the
error-checking for blk_read() and add some more debugging.
Keep the existing TEXT_BASE mechanism in sandbox to avoid an
'Exec format error' when trying to run the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Loading a FIT is useful for other VBE methods, such as ABrec. Create a
new function to handling reading it.
Signed-off-by: Simon Glass <sjg@chromium.org>
VBE is currently quite careful with function arguments because it is
used in VPL which cannot be updated after manufacture. Bugs can cause
security holes.
Unfortunately this adds to code size.
In several cases we are reading values from a devicetree which is part
of U-Boot (or at least VPL) and so known to be good. Also, in several
places, getting bad values does not matter.
So change a few checks to assert() to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pass the private data instead of the device, to help the compiler
optimise better. This saves 16 bytes of code on pinecube (rk3288)
Signed-off-by: Simon Glass <sjg@chromium.org>
Pass a struct udevice instead of the descriptor structure, since this is
the native argument for blk_read()
Signed-off-by: Simon Glass <sjg@chromium.org>
Move a few things into a new, common header file so that vbe-simple can
share code with the upcoming abrec.
Put struct simple_nvdata in it and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should not be using the old blk_d...() interface, is only there to
aid migration to driver model.
Move to blk_read() instead.
Changes in v2:
- Split patch into several pieces
Signed-off-by: Simon Glass <sjg@chromium.org>
commit fc37a73e66 ("fdt: Swap the signature for
board_fdt_blob_setup()") introduced a subtle change to the Snapdragon
implementation, removing the assignment to gd->fdt_blob partway through
the function.
This breaks qcom_parse_memory() which was also called during
board_fdt_blob_setup().
The underlying issue here is that qcom_parse_memory is using the of_ api
to traverse a devicetree, which relies on the fdt_blob in global data.
Rather than relying on this subtle behaviour, explicitly pass the FDT
that should be consulted for a /memory node.
Using the OF API is typically preferable because it's easier to read,
but using the lower level fdt_ methods instead here doesn't add too much
complexity, I think.
Finally, a minor tweak was made to board_fdt_blob_setup to use the
passed fdt blob pointer instead of gd->fdt_blob, which removes the last
of the references to global data in this area.
Fixes: fc37a73e66 (fdt: Swap the signature for board_fdt_blob_setup())
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250122-qcom-parse-memory-updates-v2-1-98dfcac821d7@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
On 32-bit architectures, LAST_LINE (_LAST_LINE - 1UL) is 64 bits long,
but size_t (from ARRAY_SIZE(...)) is 32 bits. This results in a warning
because the max() macro expects the same type on both sides:
cmd/ufetch.c: In function ‘do_ufetch’:
include/linux/kernel.h:179:24: warning: comparison of distinct pointer types lacks a cast [-Wcompare-distinct-pointer-types]
179 | (void) (&_max1 == &_max2); \
| ^~
cmd/ufetch.c:92:25: note: in expansion of macro ‘max’
92 | int num_lines = max(LAST_LINE + 1, ARRAY_SIZE(logo_lines));
| ^~~
Fix this by casting LAST_LINE to size_t.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/r/20241211-ufetch-v2-1-2b5432ffaeb1@posteo.net
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add support for the PCIe busses on Qualcomm platforms,
by using the pcie_dw_common infrastructure.
The driver is based on the Linux driver but only supporting
the "1_9_0" and compatible platforms like:
- sa8540p
- sc7280
- sc8180x
- sc8280xp
- sdm845
- sdx55
- sm8150
- sm8250
- sm8350
- sm8450
- sm8550
- sm8650
- x1e80100
But it has only been tested on:
- sc7280
- sm8550
- sm8650
- x1e80100
It supports setting the IOMMU SID table for supported platforms.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-controller-v1-2-45c20070dd53@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Replace delay_ns by delay_us which is the field name used into
struct cyclic_info.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
On 32 bits platforms, timer_get_us() returns an unsigned long which
is a 32 bits. timer_get_us() wraps around every 72 minutes
(2 ^ 32 / 1000000 =~ 4295 sec =~ 72 min).
So the test "if time_after_eq64(now, cyclic->next_call)" is no more
true when cyclic->next_call becomes above 32 bits max value (4294967295).
At this point after 72 min, no more cyclic function are
executed included watchdog one.
Instead of using timer_get_us(), use get_timer_us() which returns a
uint64_t, this allows a rollover every 584942 years.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Move differences in DT files between upstream Linux DT and U-Boot DT to
mt7629-rfb-u-boot.dtsi.
Remove old copies of mt7629-related clock bindings, .dts, and .dtsi files.
Update defconfig to switch the whole mt7629 SoC to use OF_UPSTREAM.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The clock definitions in mt7629-clk.h indicate that CLK_PERIBUS_SEL is the
first element in the pericfg clock tree and also serves as a clock mux,
unlike other clocks belonging to the clock gate in pericfg.
This make the clock consumer get a wrong clock gate during request a clock
from <&pericfg>.
Since CLK_PERIBUS_SEL clock is not required in U-Boot, add a clock gate
offset for the pericfg clock tree to resolve this problem.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Enable rudimentary nand read/write capability.
Changes in v2:
- New patch in series added enabling of nand functionality
Signed-off-by: david regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
Update bcmbca dts to current nand node naming convention.
Changes in v2:
- Removed addition of nand-on-flash-bbt parameter
Signed-off-by: david regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
OSPI flash writing was broken on am62x SKs as the OSPI flash device has a
256k sector size but was set to 20k. This breaks OSPI flash writes because
the current implementation of the SF DFU backend requires that the DFU data
buffer size be the same as the sector erase size, and the USB DFU config
fragment (for both A53 and R5) reduced the size of the DFU data buffer,
presumably so that it can fit into SPL's much smaller heap.
Change the SYS_DFU_DATA_BUF_SIZE to the erase sector size, which still fits
within the post-relocation heap size in SPL.
Fixes: dfc2dff5a8 ("configs: am62x_evm_*: Enable USB and DFU support")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
When using the ACPI tables supplied by QEMU, we don't need to build the
FADT and MADT tables in U-Boot.
This patch avoids a build failure
make qemu-riscv64_smode_defconfig acpi.config
riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o:
in function `acpi_write_fadt':
lib/acpi/acpi_table.c:265:(.text.acpi_write_fadt+0x15c):
undefined reference to `acpi_fill_fadt'
riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o:
in function `acpi_write_madt':
lib/acpi/acpi_table.c:294:(.text.acpi_write_madt+0x52):
undefined reference to `acpi_fill_madt'
Fixes: f5f7962091 ("acpi: x86: Write FADT in common code")
Fixes: 4a3fc0f525 ("acpi: x86: Move MADT to common code")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tom Rini <trini@konsulko.com> says:
One problem we have today is how the BLK symbol is set and used in
Kconfig files. Part of the challenge is that we use it as a gating
symbol for "we have a block device" and also for "enable block device
library code". What this series does is move to always use "select BLK"
by block drivers (a few were and a few others had it the inverse) and
then "depends on BLK" for functionality that needs a block device
present. The end result of this series is that a number of platforms
which had disabled EFI_LOADER now don't ask for it (they have no block
device) and espresso7420 has a regression about MMC support fixed. With
v2 of this I've picked up the review tags from v1 and also reworded the
body of the commit in the first patch.
Link: https://lore.kernel.org/r/20250115012322.215243-1-trini@konsulko.com
Now that block drivers are all selecting the BLK symbol, there's no need
for other options to be select'ing BLK so that other required
functionality can be enabled. Remove these places.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of MTD_BLOCK and UBI_BLOCK they should be select'ing BLK as
they provide block device functionality and not depending on some other
block device already being enabled too (as is the typical case).
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The BLK symbol has a few meanings, one of which is that it controls the
driver model portion of a "block device". Rather than having this hidden
symbol be "default y if ..." it should be select'd by the various block
subsystems. Symbols such as PVBLOCK which already select'd BLK are
unchanged".
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
In reworking the BLK usage in Kconfig, I found there's a few issues with
EFI_LOADER=y and BLK=n. In general, we can easily say that
lib/efi_loader/efi_file.c also should only be built with CONFIG_BLK.
That however leaves the bootmgr code, eficonfig code and then parts of
efi_device_path.c, efi_boottime.c and efi_setup.c which functionally
depend on BLK. While these calls can be if'd out, I'm unsure if the
result is usable. So rather than leave that buildable and imply that it
is, I'm leaving that combination non-buildable and commenting that
EFI_LOADER depends on BLK in the Kconfig currently.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point in time, DM is always enabled. So if MMC is enabled, it
should select DM_MMC. No drivers need to depend on DM_MMC being enabled
now, so remove that from dependency lists. This now means that a number
of platforms which select'd DM_MMC need to select MMC instead. This also
fixes a migration problem with espresso7420 in that MMC is built again
with the platform.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point in time, we know that with the MMC symbol enabled we will
always also have the BLK symbol enabled, so we do not need to list that
as a dependency for MMC drivers.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Delete tifs DT node as part of fixup.
TISCI API reported msmc_size, does not include 64KB reserved size for
tifs aka MSMC comms memory, see documentation[0].
As part of fixup, original code uses TISCI API reported msmc_size as
size for SRAM DT node.
tifs node is similar to l3-cache, which should hold address above
msmc_size, and should be deleted before passing control to OS.
[0] https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html?highlight=msmc#tisci-msg-query-msmc
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Include k3_rproc.env to access rproc boot commands and specify rproc
firmware names for adding remoteproc support in J722S SoCs.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
The default value for the mux to select the parent clock,
AUDIO_REFCLK1_CTRL_CLK_SEL is '11111' (31) but the mux input for 31
is marked as 'Reserved' so the ti-sci-clk call for get-parent fails.
Mark it to a valid value, '11100' (28) for MAIN_PLL4_HSDIV2_CLKOUT
to get rid of the linux failures during boot-time like:
"[ 1.573193] ti-sci-clk 44083000.system-controller:clock-controller:
get-parent failed for dev=157, clk=34, ret=-19"
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
When converting to ofnode `ofnode_read_u32` was accedentally used to
replace `fdtdec_get_int` instead of `ofnode_read_u32_default`.
Use `ofnode_read_u32_default` to fix this.
Fixes: 59382d2 ("pinctrl: imx: Convert to use livetree API for fdt access")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Guard binman nodes with CONFIG_OPTEE to fix the following error
when building without optee support:
BINMAN .binman_stamp
Image 'image' has faked external blobs and is non-functional: tee.bin
Image 'image' is missing optional external blobs but is still functional: tee-os
/binman/section/fit/images/tee/tee-os (tee.bin):
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Some images are invalid
make: *** [Makefile:1135: .binman_stamp] Error 103
While at it, only pass tee to the loadables lines when CONFIG_OPTEE is
defined.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Yannic Moog <y.moog@phytec.de>
i.MX95 uses enetc version 4.1 controller. Update the enetc for i.MX95.
Add ARM-specific cache handling and i.MX95 specific register layout
handling.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Clean up
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
The verdor ID and device ID of i.MX95 EMDIO are different from LS1028A
EMDIO, so add new vendor ID and device ID to pci_device_id table to
support i.MX95 EMDIO.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Clean up
Signed-off-by: Ye Li <ye.li@nxp.com>
The netc-blk-ctrl driver is used to configure Integrated Endpoint
Register Block (IERB) and Privileged Register Block (PRB) of NETC.
For i.MX platforms, it is also used to configure the NETCMIX block.
The IERB contains registers that are used for pre-boot initialization,
debug, and non-customer configuration. The PRB controls global reset
and global error handling for NETC. The NETCMIX block is mainly used
to set MII protocol and PCS protocol of the links, it also contains
settings for some other functions.
Note the IERB configuration registers can only be written after being
unlocked by PRB, otherwise, all write operations are inhibited. A warm
reset is performed when the IERB is unlocked, and it results in an FLR
to all NETC devices. Therefore, all NETC device drivers must be probed
or initialized after the warm reset is finished.
Ported from Linux 6.13-rc as of commit
fe5ba6bf91b3 ("net: enetc: add initial netc-blk-ctrl driver support")
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into the register accessors, so the accessors can reach
driver data, which contain device specific register offsets.
Signed-off-by: Marek Vasut <marex@denx.de>
Introduce driver data for each PCI device. The driver data carry
offsets of registers which differ between different SoCs.
Signed-off-by: Marek Vasut <marex@denx.de>
Split register accessors to the port base/station interface/port/mac
registers as those are at different offsets on different SoCs. This
is a preparatory patch which will allow addition of adjusted offsets
for new SoCs easily.
Signed-off-by: Marek Vasut <marex@denx.de>
Move register accessors from header files and turn them into proper
inline functions, so typechecking can be done on them. Drop no longer
enetc_port_regs() and unused enetc_read() and enetc_bdr_read().
Signed-off-by: Marek Vasut <marex@denx.de>
Introduce mapping function enetc_dev_id(), which converts PCIe BDF of
the ENETC into linear incrementing index usable e.g. as interface index.
This replaces the current ad-hoc calculation used in the code with a
dedicated function. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Rename the current driver structure and matching ops and PCI IDs
and add _ls suffix to indicate this content is LS specific. This
is done in preparation for addition of i.MX95 ENETCv4 which will
require slightly different structure content.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass udevice pointer into enetc_enable_si_port() so tests like
enetc_is_ls1028a() an be used in the function. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
The entire content of the loop can be folded into enetc_set_ierb_primary_mac(),
do it. This changes the behavior slightly such that the DT is only updated in
case of a LS1028A, which is the only SoC with ethernet MAC path in DT matching
"/soc/pcie@1f0000000/ethernet@%x,%x" anyway, so this slight change should have
no impact.
Signed-off-by: Marek Vasut <marex@denx.de>
Use enetc_is_ls1028() instead of ifdef around enetc_set_ierb_primary_mac()
and clean up the function. No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Introduce accurate test for LS1028A compatibility based both on
IS_ENABLED(CONFIG_ARCH_LS1028A) and PCI vendor ID. This is done
in preparation for adding ENETCv4 support, which has a different
PCI vendor ID.
Signed-off-by: Marek Vasut <marex@denx.de>
The function sha256_csum_wd is defined in lib/sha256.c
and in lib/mbedtls/sha256.c. To avoid duplicating this
function (and future function), we move this function
to the file lib/sha256_common.c
Reviewed-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The attribute __packed was defined in the file
tools/renesas_spkgimage.h but this attribute is
already defined in linux/compiler_attributes.h.
So we include <linux/compiler_attributes.h.h>
and do not define __packed.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The attribute __packed was defined in the file
tools/kwbimage.h but this attribute is already
defined in linux/compiler_attributes.h. So we
include <linux/compiler_attributes.h.h> and
do not define __packed.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Pull request efi-2025-04-rc1
Documentation:
* Correct the defconfig name in the coolpi documentation
UEFI:
* Carve out the biggest part of the RISC-V and ARM linker scripts for EFI
binary into a common include.
* Correct the values of SizeOfCode and SizeOfInitializedData in generated
EFI binaries for RISC-V and ARM.
* Avoid gaps between sections in EFI binaries causing a failure in secure
boot.
* Makefile: let clean remove capsule_in.capsule*.efi-capsule
* Refactor some of the code used for launching EFI binaries.
Upon further consideration, we should have both DEFAULT_FAST_ARM64_TAG
and DEFAULT_ARM64_TAG values available. This will allow us to later run
a matrix of some jobs, such as sandbox, on any arm64 host and still keep
the world build to only fast arm64 hosts.
Signed-off-by: Tom Rini <trini@konsulko.com>
A squashfs filesystem with extended attributes (xattrs) may have
inodes of type SQFS_LSYMLINK_TYPE. This might cause u-boot to fail to
handle the filesystem since it assumes a SYMLINK_TYPE and LSYMLINK_TYPE
inode are the same size. This is wrong, see:
https://github.com/plougher/squashfs-tools/blob/master/squashfs-tools/read_fs.c#L421
Using the mksquashfs '-no-xattrs' argument is probably best, but the
mksquashfs '-xattrs' argument is the default.
This patch fixes squashfs image handling by making sure parsing the
uncompressed inode_table (with sqfs_find_inode) succeeeds. The only change
needed is correctly determining the size of a SQFS_LSYMLINK_TYPE inode.
Signed-off-by: Norbert van Bolhuis <nvbolhuis@gmail.com>
When using qconfig.py to resync defconfig files and commit the result,
update it to say:
Resync all defconfig files using qconfig.py
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
In case the build system builds a directory with empty Makefile,
one which does not contain any obj-y entries, the build fails to
link due to missing built-in.o .
This happens because of this part of scripts/Makefile.build
81 ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
82 builtin-target := $(obj)/built-in.o
83 endif
which does not assign builtin-target in case obj-y is empty. The
built-in target is then not built at all, and built-in.o is not
generated by this part of scripts/Makefile.build
325 ifdef builtin-target
326 quiet_cmd_link_o_target = AR $@
327 # If the list of objects to link is empty, just create an empty built-in.o
...
335 targets += $(builtin-target)
336 endif # builtin-target
This is the correct behavior.
The final link however expects the built-in.o to exist in every directory
included in the build, even in those where the aforementioned code skipped
generation of built-in.o . Make sure the built-in.o does exist for every
directory used in final link simply by doing touch on every built-in.o used
for the link, which will create empty built-in.o in case any built-in.o is
missing.
A possible alternative fix is the always define the builtin-target
and always generate built-in.o .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Most R-Car Gen3 and Gen4 systems require extalr_clk very early
in the boot process. Currently the extalr_clk { bootph-all } DT
property to indicate this clock should be available early is set
in each SoC U-Boot DT extras file. Deduplicate this assignment to
new common r8a779x-rcar64-u-boot.dtsi file.
Note that R-Car Gen3 R8A77990 E3 and R8A77995 D3 and RZ R8A774C0
do not require extalr_clk early, therefore these SoCs still include
plain r8a779x-u-boot.dtsi in their U-Boot DT extras .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The flash_writer tool and previous recovery tools require the SREC load
address to be 0x5000_0000 . The PIE U-Boot build sets the address to 0x0
instead, so override the address back to make u-boot-elf.srec compatible
with the recovery tools.
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This function is not called from outside this file and has no entry in
the header file, so mark it static.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Move this code into a function so it can be called from elsewhere.
Note that the recently added network code uses the same
'global variable' approach. It could use a separate clean-up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use the same include as arm64 for the linker script.
Adjust the 32-bit ARM PE-COFF header accordingly and harmonize it with the
64-bit ARM header.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The fields SizeOfCode, SizeOfInitializedData, and SizeOfUninitializedData
are define in the PE-COFF specification [1].
* SizeOfCode must match the size of all .text sections.
* SizeOfInitializedData must match the size of all .data sections.
* SizeOfUninitializedData must match the size of all .bss sections.
We only have one .text and one .data section. SizeOfCode and
SizeOfInitializedData have to be calculated as the difference between
the end and the start of the respective section.
As we don't have any .bss sections in the generated EFI binaries.
SizeOfUninitializedData must remain 0.
[1] https://learn.microsoft.com/en-us/windows/win32/debug/pe-format
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Except for the architecture specific lines ARM and RISC-V can use the same
linker script. Move the common lines to an include.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The linker uses the path specified with -L to search for linker scripts
and for linker script includes.
For out-of-tree builds specify the build directory with -L instead of
the absolute path of the linker script. This allows using an INCLUDE
statement.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When creating EFI binaries, the alignment of the text section isn't
correctly factored in. As a result trying to load signed EFI binaries
throws an error with:
efi_image_region_add() efi_image_region_add: new region already part of another
Image not authenticated
Running the binary through sbverify has a similar warning
sbverify ./lib/efi_loader/helloworld.efi
warning: gap in section table:
.text : 0x00001000 - 0x00001c00,
.data : 0x00002000 - 0x00002200,
gaps in the section table may result in different checksums
warning: data remaining[7680 vs 12720]: gaps between PE/COFF sections?
.....
If we include the alignment in the text section, the signed binary boots
fine, and the relevant sbverify warning goes away
sbverify ./lib/efi_loader/helloworld.efi
warning: data remaining[8704 vs 12720]: gaps between PE/COFF sections?
.....
We should look into the remaining warning at some point as well
regarding the gaps between PE/COFF sections.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The function disable_thermal_cpu_nodes() corrupts the cooling-device
property.
For example, booting an i.MX93 devices with only one A55 core (IMX93x1)
with the cooling-device property set to:
$ dtc -I dtb foo.dtb | grep cooling-device
cooling-device = <0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
Linux shows the following error at boot:
[ 1.715189] OF: /thermal-zones/cpu-thermal/cooling-maps/map0: could not find phandle 1083699869
[ 1.723977] thermal_sys: Add a cooling_device property with at least one device
[ 1.731285] thermal thermal_zone0: binding zone cpu-thermal with cdev thermal-devfreq-0 failed:-2
because the cooling-device property in the device tree passed to the
kernel is
$ dtc -I dtb /sys/firmware/fdt | grep cooling-device
cooling-device = <0x4097f29d 0x00 0xb05aef9d>;
The issue is because the wrong variable type is passed to the function
fdt_setprop() called in the function disable_thermal_cpu_nodes(). With
the variable type fixed, the error at boot is gone and the property is
properly set:
$ dtc -I dtb /sys/firmware/fdt | grep cooling-device
cooling-device = <0x08 0xffffffff 0xffffffff>;
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Capricorn boards have WDT (WDT_SIEMENS_PMIC) and U-Boot is not configured
to trigger the WDT. Enable the "wdt" command to be able to stop the WDT
from the command line.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add instructions on how to build and package OP-TEE for the
phycore-imx8mm based boards. The build instructions are identical for
phyGATE-Tauri-L and phyBOARD-Polis.
Also fix missig '-' for TF-A build instructions.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Add documentation for the phyBOARD-Pollux i.MX 8M Plus on OP-TEE
integration.
Also add missing '-' to TF-A build instruction while at it.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Add tee node in SoC u-boot device trees. Use a kconfig entry to specify
load and entry addresses for the op-tee image in the respective
defconfig.
Default IMX8M_OPTEE_LOAD_ADDR is supplied. To keep it simple, the same
addresses are used for each SoC as are defined in upstream tf-a
(BL32_BASE) [1].
[1] https://github.com/ARM-software/arm-trusted-firmware/tree/master/plat/imx/imx8m
Signed-off-by: Yannic Moog <y.moog@phytec.de>
i.MX93-11x11-EVK has switched to use upstream device tree, and use
"adi,adp5585". Since i.MX93-11x11-EVK is the only user of this driver,
so it is safe to drop "adp5585".
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable dynamic settings to mmcdev and mmcroot for i.MX8MQ-EVK
Since we are here, clean up the including headers
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for K230 CanMV board with serial console and usb otg
support. It can boot via vendor's u-boot-spl and boot into Linux
via tftp through the onboard RTL8152.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add Canaan K230 SoC with sysreset support, running without cache
enabled.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Canaan Kendryte K230 SoC instantiates a dwc2 v4.30a core. This patch
adds the compatible for it.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The RISC-V ISA profile RVA23U64 requires extension Zic64b (Cache blocks
must be 64 bytes in size, naturally aligned in the address space).
Some RISC-V platforms do not define the d-cache line size through SYS_CACHE_SHIFT_n.
Set a default value of 64 bytes for such cases.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Update the cpu probing to fallback to "riscv,isa" property if
"riscv,isa-extensions" is not available and modify the riscv CMO code
to use the block size that was probed during cpu setup.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enhance the existing extension probing mechanism by adding support for
more extensions and probing using the "riscv,isa" property. This patch
is ported from the latest upstream linux.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Split out StarFive VisionFive2 multi-board target specific configuration
into starfive-visionfive2-binman.dtsi in preparation for removal of
jh7110-u-boot and jh7110-common-u-boot in part or whole as sent upstream.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Simon Glass <sjg@chromium.org> says:
This series provides a way to keep track of the images used in bootstd,
including the type of each image.
At present this is sort-of handled by struct bootflow but in quite an
ad-hoc way. The structure has become quite large and is hard to query.
Future work will be able to reduce its size.
Ultimately the 'bootflow info' command may change to also show images as
a list, but that is left for later, as this series is already fairly
long. So for now, just introduce the concept and adjust bootstd to use
it, with a simple command to list the images.
This series includes various alist enhancements, to make use of this new
data structure a little easier.
[trini: Drop patch 18 and 19 for now due to size considerations]
Link: https://lore.kernel.org/r/20241115231926.211999-1-sjg@chromium.org
Add a new 'bootstd images' command, which lists the images which have
been loaded.
Update some existing tests to use it. Provide some documentation about
images in general and this command in particular.
Use a more realistic kernel command-line to make the test easier to
follow.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a file-type parameter to this function and update all users. Add a
proper comment to the function which we are here.
This will allow tracking of the file types loaded by the extlinux
bootmeth.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to record the type of each file which is loaded. Add an new
parameter for this, to the read_file() method. Update all users.
Make bootmeth_common_read_file() store information about the image that
is read.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The efiload_read_file() does similar things to a common function, so
update it to use that instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
As a first step to recording images and where they came from, update
this function to do so, since it is used by two bootmeths
Create a helper function in the bootflow system, since recorded
images are always associated with bootflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to keep track of images which are loaded, or those which could
perhaps be loaded. This will make it easier to manage memory allocation,
as well as permit removal of the EFI set_efi_bootdev() feature.
Add a list of these, attached to the bootflow. For now the list is
empty.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an alist for this data structure as it is somewhat simpler to
manage. This means that bootstd holds a simple list of bootflow structs
and can drop it at will, without chasing down lists.
Signed-off-by: Simon Glass <sjg@chromium.org>
This list is only used by two functions, which can be updated to iterate
through the global list. Take this approach, which allows the bootdev
list to be dropped.
Overall this makes the code slightly more complicated, but will allow
moving the bootflow list into an alist
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a function which is safe to call in the 'unbind' path, which
returns the bootstd priv data if available.
Signed-off-by: Simon Glass <sjg@chromium.org>
This relates to more than just the bootdev, since there is a global list
of bootflows. Move the function to the bootstd file and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This relates to more than just the bootdev, since there is a global list
of bootflows. Move the function to the bootstd file and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The maximum frequency of the A53 CPU on the AM62P depends on the speed
grade of the SoC. This value is hardcoded in the DT for all AM62P
variants, potentially causing specifications to be exceeded. Moreover,
setting a common lower frequency for all variants increases boot time.
To prevent these issues, modify the DT at runtime from the R5 core to
adjust the A53 CPU frequency.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
AM62P SoC has multiple speed grades. Add function to delete
non-relevant CPU frequency nodes, based on the information
retrieved from hardware registers. Fastest grade's maximum
frequency also depends on PMIC voltage, hence to simplify
implementation use the smaller value.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Read the max temperature for the SoC temperature grade from the hardware
and modify the critical trip nodes on each thermal zone of FDT at
runtime so they are correct with the hardware value for its grade.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
AM62P SOC is available in multiple variants:
-CPU cores (Cortex-A) AM62Px1 (1 core),
AM62Px2 (2 cores), AM62Px4 (4 cores)
-With and without CAN-FD & Video-codec support
Remove the relevant FDT nodes by reading the actual configuration
from the SoC registers, with that change it is possible to have a single
dts/dtb file handling the different variant at runtime.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Also call dram_init_banksize() after every call to
fixup_ddr_driver_for_ecc() is made so that gd->bd is populated
correctly.
Ensure that fixup_ddr_driver_for_ecc() is agnostic to the number of DDR
controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
memory/ node for lower and higher addressible DDR regions.
This allows use of FDT functions from fdt_support.c to set up and fix up
the memory/ node correctly.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
The functionality of enabling Inline ECC is now controlled by
CONFIG_K3_INLINE_ECC. So, remove the support for 'ti,ecc-enable'
property to avoid redundancy and to ensure the Inline ECC feature is
mananged through build-time config.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's banks from the device tree memory node, and store in a
64 bit device private data which can be used for ECC reserved memory
calculation, Setting ECC range and Fixing up bank size in device tree
when ECC is enabled.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory, for example. Memset can cut the time in half
and using DMA currently yields a similar result.
The BIST engine of DDR controller provides support for
initializing any memory region with a pattern. This
bypasses the DDRSS bridge, so the required inline ECC
data is not computed and populated in the memory. For
some values like zero, the computed ECC syndrome is also
zero and we can use these values to preload the memory
from the DDR controller, without the assistance of the
bridge.
The registers involved in the process are described in the
'DDR controller registers' topic in [1] AM62 and [2] J721E
reference manuals.
The patch replaces the 'for' loop memory fill function with
the BIST memory initialization procedure. This cuts the time
to preload the 2GB memory from 10 seconds down to 1 second.
The bist preload function uses the lpddr4 APIs in the k3-ddrss,
so this is compatible with devices with both 16-bit LPDDR4 and
32-bit LPDDR4 interfaces (e.g J721E).
[1] AM62x: https://www.ti.com/lit/pdf/spruiv7
[2] DRA829/TDA4VM: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Neha Malcom Francis <n-francis@ti.com>
Dmitry Rokosov <ddrokosov@salutedevices.com> says:
This series consists of three patches.
The first patch modifies the function documentation style in the
include/fdt_support.h file to comply with kernel-doc requirements.
The second patch modifies the board_fdt_chosen_bootargs() function to
return a const char* type. This change clarifies to the caller that the
returned string should neither be freed nor modified. It aligns with the
existing fdt_setprop() function, which already utilizes a const char*
parameter. This promotes consistency within the codebase and enhances
code safety by preventing unintended modifications to the returned
string.
The third patch addresses the need for flexibility in providing kernel
command line arguments (bootargs) for different kernel images within the
same U-Boot environment. It introduces a read-only (RO) fdt_property
argument to the board_fdt_chosen_bootargs() function, allowing access to
the original chosen/bootargs data. This is crucial for scenarios where
different kernel versions require distinct console setups (e.g., ttyS0
for vendor kernels and ttyAML0 for upstream kernels). By enabling board
developers to either merge or replace the original bootargs, this
patch enhances the configurability of U-Boot for various kernel
images without relying on outdated configurations like CMDLINE_EXTEND.
CI/CD results: https://github.com/u-boot/u-boot/pull/716/checks
Link: https://lore.kernel.org/r/20241220-board_fdt_chosen_bootargs_improvements-v1-0-f6a7181787c5@salutedevices.com
Sometimes, it is necessary to provide an additional bootargs string to
the kernel command line.
We have a real scenario where one U-Boot blob needs to boot several
kernel images: the vendor-patched kernel image and the latest upstream
kernel image. The Amlogic (Meson architecture) tty driver has different
tty suffixes in these kernels: the vendor uses 'ttySx', while the
upstream implementation uses 'ttyAMLx'. The initial console setup is
provided to the kernel using the kernel command line (bootargs). For the
vendor kernel, we should use 'console=ttyS0,115200', while for the
upstream kernel, it must be 'console=ttyAML0,115200'. This means we have
to use different command line strings depending on the kernel version.
To resolve this issue, we cannot use the CMDLINE_EXTEND kernel
configuration because it is considered legacy and is not supported for
the arm64 architecture. CMDLINE_EXTEND is outdated primarily because we
can provide additional command line strings through the
'chosen/bootargs' FDT node. However, U-Boot uses this node to inject the
U-Boot bootargs environment variable content, which results in U-Boot
silently overriding all data in the 'chosen/bootargs' node. While we do
have the board_fdt_chosen_bootargs() board hook to address such issues,
this function lacks any FDT context, such as the original value of the
'chosen/bootargs' node.
This patch introduces a read-only (RO) fdt_property argument to
board_fdt_chosen_bootargs() to share the original 'chosen/bootargs' data
with the board code. Consequently, the board developer can decide how to
handle this information for their board setup: whether to drop it or
merge it with the bootargs environment.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
It should be structured this way to demonstrate to the caller that
freeing the return value is unnecessary and that the caller cannot
modify it.
The function fdt_setprop() includes a parameter with a const char*
prototype, so it is better to use the const qualifier.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reading doc/board/google/chromebook_coral.rst we can see that at some
point it was intended to put the bloblist in CAR, rather than DRAM, at
some point during development. This is fine for TPL/SPL stages where we
have very minimal information stored in the bloblist and so we can set
the limit there to 4KiB and then expand it to 196KiB in U-Boot proper so
there's room for ACPI tables and so forth. We also update the
documentation to use the same location for CONFIG_BLOBLIST_ADDR in both
references.
Signed-off-by: Tom Rini <trini@konsulko.com>
Raymond Mao <raymond.mao@linaro.org> says:
Motivations for changes:
Current SMBIOS library and command-line tool is not fully matching with
the requirements:
1. Missing support for other mandatory types (#7, #9, #16, #17, #19).
2. Only a few platforms support SMBIOS node from the device tree.
3. Values of some fields are hardcoded in the library other than fetching
from the device hardware.
4. Embedded data with dynamic length is not supported (E.g. Contained
Object Handles in Type #2 and Contained Elements in Type #3)
Changes:
1. Refactor the SMBIOS library and command-line tool to better align with
the SMBIOS spec.
2. Create an arch-specific driver for all aarch64-based platforms to fetch
SMBIOS private data from the device hardware (processor and cache).
3. Create a sysinfo driver to poppulate platform SMBIOS private data.
4. Add generic SMBIOS DTS file for arm64 platforms for those common strings
and values which cannot be retrieved from the system registers.
Vendors can create their own SMBIOS node using this as an example.
For those boards without SMBIOS nodes, this DTS file can be included to
have a generic SMBIOS information of the system.
5. Add support for Type #7 (Cache Information) and link its handles to
Type #4.
6. To minimize size-growth for those platforms which have not sufficient
ROM spaces or the platforms which don't need detailed SMBIOS
information, new added fields are only being built when kconfig
GENERATE_SMBIOS_TABLE_VERBOSE is selected.
Once this patch is acceptted, subsequent patch sets will add other missing
types (#9, #16, #17, #19).
Tests:
To test this with QEMU arm64, please follow the guide on dt_qemu.rst to
get a merged DT to run with.
```
qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | grep -v /dts-v1/) \
| dtc - -o merged.dtb
qemu-system-aarch64 -machine virt -nographic -bios u-boot.bin \
-dtb merged.dtb
```
Link: https://lore.kernel.org/r/20241206225438.13866-1-raymond.mao@linaro.org
Enable sysinfo smbios by default for arm64.
When SYSINFO_SMBIOS is enabled, disable QFW_SMBIOS.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the cmd according to the changes of the smbios library:
1. Refactor smbios cmd print functions to match the content defined
by the specification.
2. Add new print functions for Type 3, 4 and 7.
3. Remove the fallback string "Not specified" from smbios_get_string,
as the spec requires a NULL output for those undefined strings.
4. Update the test_cmd_smbios_sandbox pytest expected result to
align with the smbios library changes and add new pytest
test_cmd_smbios_sysinfo_verbose to test the verbose smbios
output.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Add common smbios information that can be used by all armv8
platforms and set it as default for qemu-arm64.
>From now smbios library can load values from here for those fields
doesn't exist in the sysinfo driver.
To run this with QEMU arm64, we need to dump the generated DTB
from QEMU first, merge it with the one we build and then re-run
QEMU with the merged DTB.
```
qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | \
grep -v /dts-v1/) | dtc - -o merged.dtb
qemu-system-aarch64 -machine virt -nographic -bios u-boot.bin \
-dtb merged.dtb
```
For details please take reference on dt_qemu.rst
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Add sysinfo platform driver for all armv8 platforms to retrieve
hardware information on processor and cache.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add detailed SMBIOS information as following:
1. Missing fields in Type #3 and #4
2. Type #7
Add support to dynamic length of contained object handles and
elements.
As SMBIOS is a fundamental feature which is enabled for all
boards, in order to avoid increasing rom size, all detailed SMBIOS
information is under kconfig GENERATE_SMBIOS_TABLE_VERBOSE.
Board maintainers can determine whether to select this feature.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Current smbios library does not fully match to the specification.
It hardcodes values instead of exposing values from the device.
It does not reserve the space to support dynamic length for
contained object handles or elements and misses the handling of
a few of fields.
The refactoring of this patch includes:
1. Expose values from device via sysinfo interface.
2. Replace smbios_add_prop with smbios_add_prop_si to allow getting
string values from sysinfo.
3. Add smbios_get_val_si to get values from sysinfo or device tree.
4. Use sysinfo_get_data to get data area.
5. Reserve the space of contained object handles and elements.
6. Miscellaneous fixes in smbios.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Add sysinfo driver to retrieve smbios information (Type 4 and 7).
So that the smbios library can use it for getting values from the
hardware platform instead of device tree.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Add interface for sysinfo to access a data area from the platform.
This is useful to save/read a memory region of platform-specific
data.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Move the smbios field definitions to a separated simple headfile,
which is a prerequisite to be included by dts files.
Add new definitions for cache information.
This patch also includes a few of code optimizations in smbios.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There is no point in checking the pre_reloc flag, since devices not
marked as pre-reloc will not have been bound, so won't exist yet.
There doesn't seem to be any point in checking if the device has a
valid devicetree node either, so drop that too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than doing autoprobe within the driver model code, move it out to
the board-init code. This makes it clear that it is a separate step from
binding devices.
For now this is always done twice, before and after relocation, but we
should discuss whether it might be possible to drop the post-relocation
probe.
For boards with SPL, the autoprobe is still done there as well.
Note that with this change, autoprobe happens after the
EVT_DM_POST_INIT_R/F events are sent, rather than before.
Link: https://lore.kernel.org/u-boot/20240626235717.272219-1-marex@denx.de/
Signed-off-by: Simon Glass <sjg@chromium.org>
This releases the DP configuration from reset early on during the boot process
for K26 SOM. It will also avoid the boot hang situation should any attempt be
made to configure the DP registers while it is still in reset.
Fixes the same issue as described by the commit 8b81010a2f ("video:
zynqmp: Add support for reset").
Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/20241218130129.687650-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The main reason for this change is that upstream QEMU has no multiboot
register implemented that's why access to it fails which ends up in CI
failure for our target.
That's why in JTAG bootmode returns 0 which is correct behaviour because
multiboot register is not used in this mode and value should be ignored and
as a side effect it is also fixing CI/Qemu issue.
Also move versal_get_bootmode() to avoid function declaration.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/484b9cafc45e72308a1a29a3ab772020f96784cc.1736155238.git.michal.simek@amd.com
Fix compatiable name for TPS65224 PMIC as defined in
dts/upstream/Bindings/mfd/ti,tps6594.yaml bindings.
Fixes: 1468fbba6d55("power: pmic: tps65941: Add TI TPS65224 PMIC")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Replace magic numbers in buckval2votl() & buckvolt2val() with macros to
help with clarity and correlate what the numbers correspond to in the
TPS65219 datasheet.
Signed-off-by: Shree Ramamoorthy <s-ramamoorthy@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Replace printf() with pr_err() because pr_err() has a uniform print format
and takes into consideration the log levels supported.
Signed-off-by: Shree Ramamoorthy <s-ramamoorthy@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
i.MX95 uses the same USB IP as i.MX8MM. It can then reuse the ehci-mx6
driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Turn the core type check macros into inline functions to perform
better type checking on them. The inline functions get optimized
out in case they are not used. Indent the MIDR_PARTNUM_CORTEX_An
macros in preparation for addition of future three-digit cores
and use MIDR_PARTNUM_SHIFT in MIDR_PARTNUM_MASK to be consistent.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Implement checkboard() to print current SoC variant used by a board,
e.g. one of:
SoC: RK3308
SoC: RK3308B
SoC: RK3308B-S
when U-Boot proper is running.
U-Boot 2025.01-rc1 (Nov 02 2024 - 20:26:25 +0000)
Model: Radxa ROCK Pi S
SoC: RK3308B
DRAM: 512 MiB (effective 510 MiB)
Information about the SoC variant is read from GRF.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Implement checkboard() to print current SoC model used by a board,
e.g. one of:
SoC: RK3582
SoC: RK3588
SoC: RK3588J
SoC: RK3588S
SoC: RK3588S2
when U-Boot proper is running.
U-Boot 2025.01-rc1 (Nov 10 2024 - 00:31:29 +0000)
Model: Generic RK3588S/RK3588
SoC: RK3588S2
DRAM: 8 GiB
Information about the SoC model and variant is read from OTP.
Also update rk3588s-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
where checkboard() is called.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Implement checkboard() to print current SoC model used by a board,
e.g. one of:
SoC: RK3566
SoC: RK3566T
SoC: RK3568
SoC: RK3568B2
SoC: RK3568J
when U-Boot proper is running.
U-Boot 2025.01-rc1 (Nov 10 2024 - 00:39:37 +0000)
Model: Generic RK3566/RK3568
SoC: RK3568J
DRAM: 8 GiB (effective 7.7 GiB)
Information about the SoC model and variant is read from OTP.
Also update rk356x-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
where checkboard() is called.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The mask for aclk_vop_root is 3-bit wide, not 2-bit wide according
to the TRM, so set the mask accordingly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The commit 7cec3e7019 ("rockchip: rk3588-nanopc-t6: Add support for
NanoPC-T6 LTS") added support for the LTS variant of NanoPC T6. However,
a board specific -u-boot.dtsi file was never added.
Due to the missing -u-boot.dtsi file the LTS fdt included in the FIT is
never tagged with bootph props.
When ENV_IS_IN_SPI_FLASH is enabled, not enabled in defconfig, the env
can successfully load from SPI flash on the non-LTS variant, something
that does not work on the LTS variant due to missing bootph-some-ram
props in the LTS fdt.
Fix this by adding a LTS -u-boot.dtsi file that just include the non-LTS
-u-boot.dtsi file.
Reported-by: Ricardo Pardini <ricardo@pardini.net>
Fixes: 7cec3e7019 ("rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The IO-domain driver will configure io_vsel and always-on/boot-on
regulators will be enabled based on the board device tree now that
required nodes and Kconfig options is enabled for SPL.
Remove the bob and kevin board specific code from the common rk3399.c,
the IO-domain and regulator driver provide similar functionality.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Add bootph props and enable related Kconfig options to include vital
regulators in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable use of SDMA mode when reading from eMMC to speed up boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With TPL being used to init DRAM, SPL being used to load FIT and the
adjusted FIT payload offset it is now possible to increase the size
limit of SPL to 256 KB and enable uses of dcache and FIT signature
validation.
Drop SPL_SYS_DCACHE_OFF=y to enable use of dcache in SPL.
Drop SPL_FIT_SIGNATURE=n to enable signature validation of FIT in SPL.
Change SPL_MAX_SIZE to 256 KB now that payload offset has moved in SPI
and TF-A may be loaded to 0x40000 in DRAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The eMMC PHY and SPI flash is not used in all xPL phases.
Change to no longer include emmc_phy and spi_flash in all xPL phases.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The last two RK3399 boards, chromebook bob and kevin, have now migraded
to use common bss and stack addresses.
Cleanup and remove Kconfig options no longer needed in rk3399/Kconfig
when all boards now use common bss and stack addresses.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The u-boot.rom image contain u-boot.img FIT instead of the FIT generated
by binman for the u-boot-rockchip.bin image.
Change to include the binman generated FIT for the u-boot.rom image.
This change result in TF-A being included and the use sha256 instead of
crc32 checksum in the u-boot.rom FIT.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate to use TPL, common bss, stack and malloc heap size and addresses
to unify memory use in TPL, SPL and pre-reloc with other RK3399 boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Disable TPL_BLOBLIST)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The chromebook specific u-boot.rom image does not include TPL when
building with TPL=y or ROCKCHIP_EXTERNAL_TPL=y.
Fix this by adding rockchip-tpl and u-boot-tpl nodes to the mkimage node
for the u-boot.rom binman image.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The BootROM on RK3399 only read the first 2 KB of each 4 KB page from
SPI flash. With current FIT payload offset of 0x40000 this limits the
supported TPL+SPL size to only 128 KB.
Change to use 0xE0000 as FIT payload offset, similar to other RK3399
boards, to allow a maximum size for TPL of 192 KB and SPL of 256 KB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use the offset configured with SYS_SPI_U_BOOT_OFFS Kconfig option
instead of a hardcoded 0x40000 for the FIT payload offset.
This has no intended impact as SYS_SPI_U_BOOT_OFFS=0x40000.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Building chromebook_bob/kevin with TPL=y ends with a linking error:
arch/arm/mach-rockchip/rk3399/rk3399.o: in function `board_debug_uart_init':
arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34):
undefined reference to `spl_gpio_output'
arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34):
relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `spl_gpio_output'
make[2]: *** [scripts/Makefile.xpl:542: tpl/u-boot-tpl] Error 1
make[1]: *** [Makefile:2134: tpl/u-boot-tpl] Error 2
make: *** [Makefile:568: __build_one_by_one] Error 2
Change to only use spl_gpio functions in SPL to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ddrbin_tool interface has been changed. Additional chip_name argument
is now required to modify ddr binary file. Update documentation
to be consistent with the new interface.
Update BL31 and ROCKCHIP_TPL file paths to match current version
of binaries available in the rkbin repository.
Signed-off-by: Daniel Semkowicz <dse@thaumatec.com>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
The clock and power DT includes for rk3066a and rk3188 are now
available in the dts/upstream directory, so remove the ones that
are now redundant.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device tree for rk3066a/rk3188 combined is now
available in the /dts/upstream directory.
Use imply OF_UPSTREAM to migrate all rk3066a/rk3188 boards.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa ROCK 5C is a 8K computer for everything[1] using the Rockchip
RK3588S2 chip:
- Rockchip RK3588S2
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- eMMC / SPI flash connector
- Micro SD Card slot
- Gigabit ethernet port (supports PoE with add-on PoE HAT)
- WiFi6 / BT5.4
- 1x USB 3.0 Type-A HOST port
- 1x USB 3.0 Type-A OTG port
- 2x USB 2.0 Type-A HOST port
- 1x USB Type-C 5V power port
[1] https://radxa.com/products/rock5/5c
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20241021090548.1052-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 ]
(cherry picked from commit f80689fcef4b9b07a97b629b4075cc1a4c21a68e)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
These pinctrls manage the low-speed PCIe signals:
- CLKREQ#: An output on the RK3588 (both RC or EP modes), used to
request that external clock-generation circuitry provide a clock.
- PERST#: An input on the RK3588 in EP mode, used to detect a reset
signal from the RC. In RC mode, the hardware does not use this signal:
Linux itself generates it by putting the pin in GPIO mode.
- WAKE#: In EP mode, this is an output; in RC mode, this is an input.
Each of these signals serves a distinct purpose, and more importantly,
PERST# should not be muxed when the RK3588 is in the RC role. Bundling
them together in pinctrl groups prevents proper use: indeed, almost none
of the current board-specific .dts files make any use of them.
(Exception: Rock 5A recently had a patch land that misuses _pins; this
patch corrects that.)
However, on some RK3588 boards, the PCIe 3 controller will indefinitely
stall the boot if CLKREQ# is not muxed (details in the next patch).
This patch unbundles the signals to allow them to be used.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20240912025034.180233-2-CFSworks@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 4294e32111781b3de4d73b944cbd1bc1662a9a7a ]
(cherry picked from commit 8713425fa162b61bcf5f7a6dcd171fddfb12be36)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps
Ethernet ports designed and developed by FriendlyElec for IoT
applications.
Specification:
- Rockchip RK3566
- 2GB LPDDR4X RAM
- optional 32GB eMMC module
- SD card slot
- 2x 1000 Base-T
- 3x LEDs (POWER, LAN, WAN)
- 2x Buttons (Reset, MaskROM)
- 1x USB 3.0 Port
- Type-C 5V 2A Power
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Typically any non-removable storage (emmc) is listed before removable
storage (sd-card) options. Also U-Boot will try to override and use
mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: b7cd1115456d312f8c5e60c80fdc35fd35ea6eab ]
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After the migration to use standard boot, storage media should
automatically be initialized in the order listed in boot_targets env.
Drop USE_PREBOOT to speed up boot with ~12 seconds when booting from
e.g. SD-card or eMMC.
Before:
3,048,599 2,056 main_loop
3,050,717 2,118 usb_start
15,070,499 12,019,782 cli_loop
After:
3,058,244 2,054 main_loop
3,063,260 5,016 cli_loop
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Current use of SILENT_CONSOLE hide valuable information when something
goes wrong during boot, drop this Kconfig option to allow user to see
e.g. from what media U-Boot proper is loaded from.
A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE,
drop this Kconfig option to remove the second redundant line.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to
allow checksum validation and fallback loading of FIT from a different
mmc device.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate to use common bss, stack and malloc heap size and addresses to
unify memory use in TPL, SPL and pre-reloc.
Ensure SYS_MALLOC_F_LEN and TPL variant stay at 0x2000 and is unaffected
on other boards not changed to use common malloc heap size.
ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For some reason the Ethernet PHY reset delay is set to 1 second, this
cause an unneccecery long boot delay.
Firefly-RK3288 use RTL8211 Ethernet PHY, datasheet list an initial 10ms
delay and then a 30-76ms delay before accessing registers.
Change to use 80ms delay instead of a full second to speed up Ethernet
initializion in U-Boot.
Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY
support in U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing Kconfig options used by the rk3288-tinker-s variant.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device tree for Firefly-RK3288 in dts/upstream can be used as-is by
U-Boot, migrate board to use OF_UPSTREAM.
Add chosen stdout-path prop to board u-boot.dtsi as it is missing in DT
from dts/upstream. Also change to use the upstream power_led symbol.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable MISC_INIT_R and ROCKCHIP_EFUSE to read cpuid from efuse and set
the cpuid# and serial# env vars.
Change to read mac address from eeprom in rockchip_early_misc_init_r()
to ensure the ethaddr env var is set before rockchip_setup_macaddr() try
to set ethaddr based on cpuid.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After the migration to use standard boot, storage media devices should
automatically be initialized in the order listed in boot_targets env.
Drop USE_PREBOOT to speed up boot when booting from SD-card or eMMC.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Include mmc related nodes in U-Boot proper pre-reloc phase to ensure
environment can be loaded from mmc devices.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Current use of SILENT_CONSOLE hide valuable information when something
goes wrong during boot, drop this Kconfig option to allow user to see
e.g. from what media U-Boot proper is loaded from.
A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE,
drop this Kconfig option to remove the second redundant line.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The sdmmc power come from vcc33_sd pmic regulator and not from the
vcc_sd fixed regulator, as currently defined in the in-tree DT.
Drop vcc_sd and the related gpio7 and sdmmc_pwr nodes from being
included in SPL along with any related Kconfig option. Also enable
SPL_DM_SEQ_ALIAS to ensure aliases is handled correctly in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph props and enable related Kconfig options to include the sdmmc
regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is
handled correctly in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Drop the unneeded bootph-all prop from dmc node, it is already defined
in soc u-boot.dtsi.
Remove booth-all prop from gpio7 node, this node is not needed in TPL.
Adjust bootph props to include pinctrl related nodes for UART2.
Remove the explicit bootph-all prop from the pinctrl node, any bootph-
prop will automatically be propagated to the pinctrl node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph- props to emmc, sdmmc, uart and related pinctrl nodes to
ensure devices and pinctrl can be used in xPL and U-Boot pre-reloc.
Remove the explicit bootph-all prop from the pinctrl node, any bootph-
prop will automatically be propagated to the pinctrl node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort the nodes in rk3288-tinker u-boot.dtsi files in alphabetical order.
This has no intended change to board DTs and only rearrange nodes in
preparation for future changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate to use common bss, stack and malloc heap size and addresses to
unify memory use in TPL, SPL and pre-reloc.
ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add myself as a reviewer for Tinker Board and S variant so that I can
help with review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable Kconfig options to read cpuid from efuse and set cpuid#, serial#
and ethaddr env vars based on the value read from efuse.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The vop nodes does not need to be included in xPL control FDT, they only
need to be included at U-Boot proper pre-reloc phase.
Change to use bootph-some-ram prop to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort the nodes in rk3288-firefly-u-boot.dtsi in alphabetical order.
This has no intended change to board DT, this only rearrange nodes in
preparation for future changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3288.dtsi from arch/arm/dts is almost identical to the rk3288.dtsi
from dts/upstream, it differs only with a minor change in hdmi port
nodes, something that does not affect U-Boot.
Remove arch/arm/dts/rk3288.dtsi to use rk3288.dtsi from dts/upstream.
Also drop gpio aliases from -u-boot.dtsi that has been part of
rk3288.dtsi for some time.
No functional change to board DTs is intended with this removal.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The firefly-rk3288_defconfig build target does not enable the SPL_LED
Kconfig option.
Drop the unused SPL_LED related code and replace it with a default-state
prop to ensure the LED driver enable the LED at U-Boot proper phase.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The boot timing and reporting (bootstage) infrastructure is useful for
performance analysis and debug but adds overhead and console noise when
using the device normally. Remove it from the device config.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The reset mechanism used by Linux to reset the SoC is known to only
partially reset the logic. A mechanism is implemented in
rk3399_force_power_on_reset to use a GPIO connected to the PMIC's
over-temperature (OTP) reset pin, which fully resets all logic.
Hook the associated GPIO where the function expects it to enable this
reset mechanism and avoid any possible side-effect of partially-reset
units.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
The reset mechanism used by Linux to reset the SoC is known to only
partially reset the logic. A mechanism is implemented in
rk3399_force_power_on_reset to use a GPIO connected to the PMIC's
over-temperature (OTP) reset pin, which fully resets all logic.
Hook the associated GPIO where the function expects it to enable this
reset mechanism and avoid any possible side-effect of partially-reset
units.
Without this patch, reading from the micro sd slot fails after a reset.
With this mechanism, U-Boot is able to boot from it reliably.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Khadas Edge2 is a Rockchip RK3588S based SBC (Single Board Computer)
by Khadas.
There are tree variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MP4 GPU
3x MIPI CSI 4x lanes
2x MIPI-DSI DPHY 4x lanes
32/64GB eMMC
1x USB 2.0, 1x USB 3.0, 2x USB-Type-C
1x HDMI 2.1 output, 1x DP 1.4 output
USB PD over USB Type-C
Kernel commit:
04d552993522 ("arm64: dts: rockchip: Add Khadas edge2 board")
Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com>
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to
allow checksum validation and fallback loading of FIT from a different
mmc device.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For some reason the Ethernet PHY reset delay is set to 1 second, this
cause an unneccecery long boot delay.
MiQi use RTL8211 Ethernet PHY, datasheet list an initial 10ms delay and
then a 30-76ms delay before accessing registers.
Change to use 80ms delay instead of a full second to speed up Ethernet
initializion in U-Boot.
Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY
support in U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device tree for mqmaker MiQi in dts/upstream can be used as-is by
U-Boot, migrate board to OF_UPSTREAM.
The change to use DT from dts/upstream will include minor changes and
fixes related to work led and usb otg.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After the migration to use standard boot, storage media devices should
automatically be initialized in the order listed in boot_targets env.
Drop USE_PREBOOT to speed up boot when booting from SD-card or eMMC.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Current use of SILENT_CONSOLE hide valuable information when something
goes wrong during boot, drop this Kconfig option to allow user to see
e.g. from what media U-Boot proper is loaded from.
A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE,
drop this Kconfig option to remove the second redundant line.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph props and enable related Kconfig options to include the sdmmc
regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is
handled correctly in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph- props to emmc, sdmmc, uart and related pinctrl nodes to
ensure devices and pinctrl can be used in xPL and U-Boot pre-reloc.
Remove the explicit bootph-all prop from the pinctrl node, any bootph-
prop will automatically be propagated to the pinctrl node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate to use TPL, common bss, stack and malloc heap size and addresses
to unify memory use in TPL, SPL and pre-reloc.
ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable Kconfig options to read cpuid from efuse and set cpuid#, serial#
and ethaddr env vars based on the value read from efuse.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The work led is not used in xPL on rk3288-miqi, remove bootph props from
the work led node to exclude it from xPL control FDT.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort the nodes in rk3288-miqi-u-boot.dtsi in alphabetical order.
This has no intended change to board DT, this only rearrange nodes in
preparation for future changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to
allow checksum validation and fallback loading of FIT from a different
mmc device.
Checksum validation of FIT adds around 140 ms to boot time:
Before:
Mark Elapsed Stage
0 0 reset
13 13 TPL
6,957 6,944 end tpl
25,102 18,145 SPL
131,932 106,830 end phase
132,137 205 board_init_f
444,277 312,140 board_init_r
1,404,987 960,710 eth_common_init
1,519,110 114,123 eth_initialize
1,524,734 5,624 main_loop
1,525,452 718 cli_loop
After:
Mark Elapsed Stage
0 0 reset
13 13 TPL
6,957 6,944 end tpl
35,744 28,787 SPL
271,220 235,476 end phase
271,420 200 board_init_f
588,474 317,054 board_init_r
1,548,950 960,476 eth_common_init
1,663,105 114,155 eth_initialize
1,668,734 5,629 main_loop
1,669,417 683 cli_loop
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For some reason the Ethernet PHY reset delay is set to 1 second, this
cause an unneccecery long boot delay.
Tinker Board use RTL8211E or RTL8211F Ethernet PHY, datasheet list an
initial 10ms delay and then a 30-76ms delay before accessing registers.
Change to use 80ms delay instead of a full second to speed up Ethernet
initializion in U-Boot.
Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY
support in U-Boot.
Before:
1,404,971 960,924 eth_common_init
2,438,830 1,033,859 eth_initialize
2,444,449 5,619 main_loop
2,445,153 704 cli_loop
After:
1,404,987 960,710 eth_common_init
1,519,110 114,123 eth_initialize
1,524,734 5,624 main_loop
1,525,452 718 cli_loop
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device tree for ASUS Tinker Board and S variant in dts/upstream can
be used as-is by U-Boot, migrate board to OF_UPSTREAM.
The change to use DT from dts/upstream will include minor changes and
fixes related to leds and regulators.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SCLK_MAC_PLL id is not exported or referenced upstream. It is also
not referenced in vendor U-Boot or vendor kernel 4.4, 4.19, 5.10 or 6.1.
Relax the check for parent id SCLK_MAC_PLL when using internal clock
source for gmac to allow use of clock/rk3288-cru.h from dts/upstream.
All in-tree and upstream rk3288 DTs use an external clock as parent,
so no functional change to boards is expected with this change.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
power/rk3288-power.h in include/dt-bindings is identical to the version
in dts/upstream, remove the copy from include/dt-bindings to only use
the version from dts/upstream.
No functional change to board DTs is intended with this removal.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Based on 335799b725 ("usb: dwc2: Use regulator_set_enable_if_allowed")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Based on 335799b725 ("usb: dwc2: Use regulator_set_enable_if_allowed")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
A few changes for the TPM subsystem wrt to EventLong creation and measurements.
Generally speaking it's insecure for a TPM to not cap all the active PCRs
when performing measurements.
Up to now we had code querying the active PCR banks on the fly and reason
whether it should perform a measurement or not. Since a TPM requires a reset
to change the active PCR banks, it's easier and faster to store them in an
array in the device private data and check against that.
This relates to an interesting feature some bootloaders have. For example
TF-A can't extend a PCR since it has no TPM drivers, but can produce an
EventLog that U-Boot can replay on the hardware once that comes up.
The supported hash algorithms of the TF-A generated Eventlog are generated
at compile time. When trying to replay an EventLog the TPM active PCR banks
and the created EventLog algorithms must agree. We used to report an error
but that changed in commit 97707f12fd ("tpm: Support boot measurements").
This PR also brings up the old behavior and an error is reported now while
printing a human readable list of the mismatched algorithms.
* Provide a link to 'TPM 2.0 Library Specification'
* Remove outdated comment for TPM2_NUM_PCR_BANKS.
The value 16 can be found in the current standard
TCG TSS 2.0 Overview and Common Structures Specification 1.0, rev 10
* Describe some of the structures in Sphinx style.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pull request efi-next-20250105
Documentation:
* doc: develop: Fix typos and wording in binman/binman.rst
* doc: develop: Fix typos and wording in gdb.rst
* doc: sandbox: Fix the "sb" command name
* doc/develop/distro.rst: Better document upstream definition of extlinux.conf
UEFI:
* efi_loader: avoid writing message in Exit() boot service
* efi_loader: update EFI specification version
* cmd: efidebug: update output of memory attributes
* efi_loader: Don't warn if the TCG2 FinalEvents table is not installed
* cmd: bootmenu: add parameter -e for UEFI boot options
* efi_loader: Update startimage_exit self-test to check error
* efi: Correct ECPT table GUID
Others:
Building the API demo application for riscv64 is supported.
* API: unify platform_sys_info() implementations
* examples: implement _start and syscall for RISC-V
* examples: use architecture specific memset() on RISC-V
* examples: use QEMU compatible LOAD_ADDR on RISC-V
* test: fix test_extension.py
* configs: sandbox_deconfig: remove CONFIG_AMIGA_PARTITION
* CI: xilinx_versal_virt: disable USB_DWC3
* net: eth_bootdev_hunt() should not run DHCP
Judith Mendez <jm@ti.com> says:
This patch series adds config options for Sitara K3 boards
to support MMC UHS modes.
While testing with SD card boot and eMMC boot,
found missing eMMC boot support for am62ax in am62a7_init,
patch 1/7, and missing config option to support eMMC boot.
While we are here, for am62ax, enable config option to
change MMC bus modes and enable r5 SDHCI ADMA for faster boot
time.
Also for all k3 Sitara boards, cleanup MMC ENV configs that
are no longer needed since we no longer load env from MMC
device.
Link: https://lore.kernel.org/r/20241220203704.2076499-1-jm@ti.com
To allow disabling algorithms for tcg2, in function
tcg2_create_digest(), each hash algorithm operations should under
the hash kconfig control to avoid building errors when the algorithm
is disabled.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We used to stop replaying an EventLog if parsing failed, but that got
lost in commit 97707f12fd ("tpm: Support boot measurements").
When an EventLog is passed yo us from a previous bootloader, we want to
validate it as much as we can and make sure the defined PCR banks of
the log exist in our TPM and firmware so we can replay it if needed or
use it as-in, in case the PCRs are already extended.
So let's add the checks back and while at it simplify the logic of
rejecting an EventLog.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A previous patch is storing the active PCR banks on the TPM private
data. Instead of parsing them on the fly use the stored values.
This allows us to simplify our checks during the log creation and
parsing.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A previous patch is storing the active PCR banks on the TPM private
data. Instead of parsing them on the fly use the stored values.
This allows us to simplify our checks during the log creation and
parsing.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We have a lot of code trying to reason about the active TPM PCRs
when creating an EventLog. Since changing the active banks can't
be done on the fly and requires a TPM reset, let's store them
in the chip private data instead.
Upcoming patches will use this during the EventLog creation.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We already check the active banks vs what U-Boot was compiled with when
trying to extend a PCR and we refuse to do so if the TPM active ones
don't match the ones U-Boot supports.
Do the same thing for the EventLog creation since extending will fail
anyway and print a message so the user can figure out the missing
algorithms.
Co-developed-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a bool var into hash_algo_list to indicate whether the algorithm
is supported or not and move the IS_ENABLED to only cover this var.
So that we can have the name, hash, mask and size no matter the
digest kconfigs are enabled or not.
In before, tpm2_algorithm_to_len() and tcg2_algorithm_to_mask() are used to
identify an unsupported algorithm when they return 0.
It is not the case now when hash_algo_list always provides algorithm size
and mask, thus a new API is introduced to check if an algorithm is
supported by U-Boot.
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Rename the arguments of tcg2_get_pcr_info() to clarify
they are bank masks, not PCR mask.
Remove the unused local variable.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When that function was introduced we were only using it to check if
extending a PCR was allowed, so the name made sense. A few patches ago
we used that function to reason about the EventLog creation and general
usage of PCRs , so let's rename it to something more generic that makes
more sense in all contexts.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This function is checking for active PCR banks, so rename it
to something that's easier to read and closer to what the function
does.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The hack itself seems to be copied from Linux rti_wdt.c, but the WDT reset
principle is different in U-Boot. While Linux relies on correct frequencies
and timers and doesn't check the actual WDT counter value U-Boot driver
seems to be more robust: it does compare RTIDWDCNTR vs RTIDWDPRLD.
Now the root cause of the original motivation to manipulate the clock rate
is said to be understood and fixed in Linux commit cae58516534e
("watchdog: rti_wdt: Set min_hw_heartbeat_ms to accommodate a safety margin")
which simultaneously removed the hack itself.
While is fix part of the mentioned patch is neither applicable nor requried
for the U-Boot driver just drop the hack setting WDT clock rate to 90% of
the real rate. This has a nice effect that the WDT timeout is now as
requested and not 10% shorter.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Stefan Roese <sr@denx.de>
If the RTI watchdog has been enabled in SPL, enabling it in U-Boot proper
fails because it can only be enabled once in HW and never stopped. This
however leads to a situation that wdt_cyclic() watchdog trigger is not
being started any longer and the WDT fires at some point.
Allow for WDT re-start by not bailing out if the [previously] configured
period matches the one to be configured.
Enabling in [A53] SPL has been tested on AM62x-based HW (where [A53] SPL is
responsible for loading R5 DM firmware and not this driver).
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Stefan Roese <sr@denx.de>
First, the "Boot Loader Specification" link has moved to a new location,
so link to that directly. Second, that link does not document as much of
the extlinux.conf format as I recall the old version doing at least.
However, the Syslinux Project wiki is the current location of the documentation
linked to in doc/README.pxe and also has a reference for SYSLINUX. Link
to both of these.
Signed-off-by: Tom Rini <trini@konsulko.com>
UEFI specification 2.11 has been published.
There are no changes relevant for the U-Boot scope.
So let us update the supported specification version.
Change the comment for the constant to Sphinx style.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This is done so that the device path protocol interface of the network
device can be changed internally by u-boot when a new bootfile gets
downloaded.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The command name was "sbi" instead of "sb" in "doc/usage/cmd/sb.rst",
the file documenting the "sb" command. It is annoying, because the
index in the left panel on the
<https://docs.u-boot.org/en/latest/usage/cmd/sb.html> page shows no
"sb" command, which makes difficult to navigate to the "sb"
documentation.
Fixed the command name: "sbi" -> "sb".
Fixes: ec6d30649c (doc: sandbox: Add docs for the sb command, 2024-10-28)
Signed-off-by: Olivier L'Heureux <olivier.lheureux@mind.be>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fix provided by 997fc12ec9 is actually introducing
a buffer overrun, and the overrun is effective if the
memory after the reloc section is not zeroed.
Probably that's why this bug is not always noticeable.
The problem is that 8-bytes 'rel' pointer can be 4-bytes aligned
according to the PE Format, so the actual relocate function can
take values after the reloc section.
One example is the following dump from the reloc section:
bce26000: 3000 0000 000c 0000 0000 0000 0000 0000
bce26010: 7c00 9340 67e0 f900 1c00 0ea1 a400 0f20
This section has two relocations at offset bce26008 and bce2600a,
however the given size (rel_size) for this relocation is 16-bytes
and this is coming form the efi image Misc.VirtualSize, so in this
case the 'reloc' pointer ends at affset bce2600c and is taken as
valid and this is where the overflow is.
In our system we see this problem when we are starting the
Boot Guard efi image.
This patch is fixing the overrun while preserving the fix done
by 997fc12ec9.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@belden.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When the TCG2 protocol installation fails, we are trying to remove
all the objects we created in tcg2_uninit().
However, there are cases when this function runs before the config
table was installed. So instead of printing an error unconditionally
check against EFI_NOT_FOUND and don't print anything if the table wasn't
installed to begin with.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The bootmenu command can display
* menu entries defined by environment variables
* menu entries defined by UEFI boot options
Not in all cases showing the UEFI boot options is desired.
Provide a new parameter '-e' to select the display of UEFI boot options.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently when booting dhcp_run() may be executed multiple times:
once in eth_bootdev_hunt() and once in the network booting bootmeth.
We need to call eth_bootdev_hunt() when setting up the EFI sub-system to
supply the simple network protocol. We don't need an IP address set up.
We can reduce the bootime by not executing dhcp_run() in
eth_bootdev_hunt().
Furthermore eth_bootdev_hunt() with autostart=yes leads on the legacy
network stack leads to downloading a file via TFTP and to booting the
downloaded file.
Instead of running dchp_run() just check that there is a network device
in eth_bootdev_hunt().
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The CI uses the following command to launch xilinx_versal_virt_defconfig:
qemu-system-aarch64 -M xlnx-versal-virt \
-display none -m 4G -serial mon:stdio \
-device loader,file=u-boot,cpu-num=0
'usb start' or invoking eth_bootdev_hunt leads to a crash when function
dwc3_core_init() tries to access a register at offset 0xc704 (DWC3_DCTL)
relative to the register start address 0xfe20c100.
Disable CONFIG_USB_DWC3 in the CI until the driver problem is fixed.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We do not actually test the code.
Scanning for Amiga partitions of the sandbox is extremely slow,
especially on the partially implemented USB device.
For build testing the other sandbox defconfigs are good enough.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
test_extension.py assumes that no extension is known at test start.
This assumption is wrong because we do not come out of reboot.
A prior test may have already hunted for the extension bootdev.
Remove the invalid assert.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We should not write messages in UEFI API functions. This may lead to
incorrect screen layout in UEFI application.
For single statements after if clause we don't need braces.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On some RISC-V including QEMU $loadaddr is 0x80200000.
For bootelf to work choose a different LOAD_ADDR to which the demo ELF
binary is relocated.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To build the API examples on RISC-V we need to
implement _start and syscall for RISC-V.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
ARM, MIPS, and RISCV can use the same implementation of
platform_sys_info(). PPC provides some extra information.
So keep it separate.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add the basic 'hello world ta' command which increment
of the value passed. This provides easy test for
establishing a session with OP-TEE TA and verify.
It includes following "hello world ta" subcommands:
optee hello; default value '0' is passed and gets incremented.
optee hello <value>; value to increment via OP-TEE HELLO
WORLD TA.
To enable the OP-TEE side HELLO WORLD example please refer
https://optee.readthedocs.io/en/latest/building/gits/optee_examples/optee_examples.html
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Enable MMC_SPEED_MODE_SET config option in defconfig to enable
changing MMC bus modes with mmc rescan for am62ax device.
Signed-off-by: Judith Mendez <jm@ti.com>
When a successful neighbor advertisement is received, the ethernet
address should be saved for later use to avoid having to redo the
neighbor discovery process.
For example, with TFTP the address should get saved into
"net_server_ethaddr". This is being done correctly with ARP for IPv4,
but not for neighbor discovery with IPv6.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
timeout_count is never reset once a tftpput transfer has started. If for
whatever reason timeouts occur frequently, but the server keeps replying
nonetheless, the transfer may be needlessly aborted.
Reset timer_count on reception of an ACK to avoid this situation.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Linux DTS compatible MDIO bitbanging driver.
Both clause 22 and clause 45 MDIO supported and validated.
Heavily based on the Linux drivers (more or less the same code base).
Signed-off-by: Markus Gothe <markus.gothe@genexis.eu>
This reverts commit 431be621c6.
Section 3.3 of Reduced Gigabit Media Independent Interface (RGMII)
Version 2.0 (4/1/2002) details that a PHYs using a ~2ns internal delay
are referred to as RGMII-ID. This internal delay is optional.
Page 147-148 of the Marvell Doc. No. MV-S107146-U0 Rev. F details
timings of the RX/TX delays. We see that with the TX/RX_CLK delay
enabled, our RX/TX_CTL signal is shifted w.r.t CLK to reflect the delay
added.
In 431be62 there is no timing difference between RGMII and RGMII-ID, and
so programmers wanting to explicitly set their PHY to RGMII will find
that delay added anyway. This could throw off timing if that internal
delay is undesired.
We should be handling all 4 possible RGMII cases of PHY_INTERFACE_MODE:
RGMII, RGMII_ID, RGMII_TXID, and RGMII_RXID. Reverting 431be62
implements this.
See also m88e1111_config_init_rgmii_delays in the equivalent driver in
Linux (drivers/net/phy/marvell.c), which does not set these delays in
RGMII mode.
68e6eca was tested out on an 88E1512 PHY in RGMII-ID mode. This
reversion has been tested by myself on an 88E1518 in RGMII-ID mode. This
patch affects boards using this driver in "rgmii" mode, as the internal
delay will no longer be enabled. Namely kikwood-nsa310s.
Signed-off-by: Rufus Segar <rhs@riseup.net>
We have a some boards that rarely starts networking abnormally, so there are
many timeouts during file transfer. In the same time there is a normal transfer
between timeouts. In this case we can continue transfer (instead of connection
aborting) by just clearing timeout counter on every successful block.
This patch does not affect the case when several timeouts happen one after
another. The transfer will be aborted. Thus the transfer will be
continued in the case of unstable link, but will be aborted in the case
of inaccessible server.
Feature downside: it may greatly slowdown (instead of abort) file transfer
in the case of unstable link.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
When converting a U-Boot trace records file to ftrace function graph
format for use by trace-cmd ('proftool -f funcgraph dump-ftrace'), the
time associated to each function is incorrectly saved in microseconds
instead of nanoseconds. Multuply the value by 1000 to fix the issue.
With this change, the trace-cmd output looks consistent. Here is an
example with udelay(25) added to mem_malloc_init() as a test case:
$ ./tools/proftool -m System.map -t /tmp/trace.bin -f funcgraph \
dump-ftrace -o /tmp/trace.dat
$ trace-cmd report /tmp/trace.dat >/tmp/trace.log
$ vi /tmp/trace.log
[...]
u-boot-1 [000] 6.719659: funcgraph_entry: | mem_malloc_init() {
u-boot-1 [000] 6.719659: funcgraph_entry: | udelay() {
u-boot-1 [000] 6.719660: funcgraph_entry: | schedule() {
u-boot-1 [000] 6.719660: funcgraph_entry: | cyclic_run() {
u-boot-1 [000] 6.719660: funcgraph_entry: 1.000 us | cyclic_get_list();
u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | }
u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | }
u-boot-1 [000] 6.719661: funcgraph_entry: | __udelay() {
u-boot-1 [000] 6.719662: funcgraph_entry: 0.000 us | usec_to_tick();
u-boot-1 [000] 6.719687: funcgraph_exit: + 26.000 us | }
u-boot-1 [000] 6.719687: funcgraph_exit: + 28.000 us | }
u-boot-1 [000] 6.719687: funcgraph_entry: # 37971.000 us | memset();
u-boot-1 [000] 6.757658: funcgraph_exit: # 37999.000 us | }
u-boot-1 [000] 6.757658: funcgraph_exit: # 38000.000 us | }
In the above dump, the udelay() call is reported as taking 26 us which
is consistent with the timestamps (6.719687 - 6.719659 = 0.000026).
Without this patch we would have "0.026 us" instead of "+ 26.000 us".
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Move to using OF_UPSTREAM config and thus using the devicetree
subtree and remove unused device tree files.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Currently the driver relies on bootph flag to probe it during PRE_RELOC
stage but with the upcoming cleanup of v6.13, we don't have the bootph
property in the parent nodes anymore and ti_sci driver being one of the
parent nodes required during SPL stage would end up hampering the probe
model [0].
Add DM_FLAG_PRE_RELOC to ti_sci driver for mitigating this issue.
[0]: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/21
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
The Texas Instruments Foundational Security (TIFS) firmware must match
the security level configured on the SoC. To boot Security Enforced (SE)
variants of the AM62Px, add another tiboot3 build which packages the
Security Enforced (SE) firmware variant for AM62Px SoCs.
Signed-off-by: Bryan Brattlof <bb@ti.com>
OSPI Boot requires overrides specific to R5 and also
to use DMA in R5 SPL stage the DM_TIFS needs to be used.
Add the corresponding overrides for R5 SPL stage.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
The wget command currently cannot work correctly with mtk_eth driver.
This patch fixed this by increase DMA ring size and invalidate ring data
after use.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Enable GDMA cpu bridge only when 10Gb interface is enabled for GMAC other
than GMAC0, or when MT7988 internal switch is used.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Not all platforms supports sgmii and/or usxgmii. So we add Kconfig
options for these features and enable them only for supported
platforms.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
MT7629 need extra setting for gmac2 to work. So additional
capability is added for mt7629 to handle this case.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Unlike other platforms, mt7622 has only one SGMII and it can be
attached to either gmac1 or gmac2. So the register field of the
sgmii selection differs from other platforms as newer platforms can
control each sgmii individually.
This patch adds a new capability for mt7622 to handle this case.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The register field for SGMII speed selection is a 2-bit field with
value 0 for 1Gbps and 1 for 2.5Gbps (2/3 are reserved).
So it's necessary to set both bits instead of just setting/clearing
only the lower bit.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
According to the mt7629 programming guide, the CLK_TOP_F10M_REF_SEL
shares the same parent selection with CLK_TOP_IRRX_SEL, while the
present parent selection for CLK_TOP_F10M_REF_SEL is actually used
for CLK_TOP_SGMII_REF_1_SEL.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Andrew Goodbody <andrew.goodbody@linaro.org> says:
Picking up a series from Dan Carpenter and applying requested
changes for v2.
I had previously set CONFIG_64BIT for arm64. This patchset does the
same thing for sandbox and x86_64. (Mips and riscv were already
doing it). This CONFIG option is used in the Makefile to determine
if it's a 32 or 64 bit system for the CHECKER.
Makefile
1052 # the checker needs the correct machine size
1053 CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)
Link: https://lore.kernel.org/r/20241216180736.1933807-1-andrew.goodbody@linaro.org
Should use CONFIG_64BIT to detect a 64 bit compile and not
CONFIG_PHYS_64BIT. This allows more platforms to run the
full test code.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to
static analysis tools.
Introduce CONFIG_SPL_64BIT and select it for architectures other than
x86 with 64 bit builds. Do not select it for x86 builds as x86 uses
a 32 bit SPL.
Ensure that when limits are set they use CONFIG_64BIT for U-Boot
proper and CONFIG_SPL_64BIT for SPL. This is to allow for the 32 bit
SPL build used by x86.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In include/linux/io.h the declarations of ioread64 and iowrite64
which make use of readq/writeq are guarded with CONFIG_64BIT so
guard the sandbox declarations of readq and writeq also with
CONFIG_64BIT.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Patch keeps the access to dtb_dt_embedded() within fdtdec API,
by means of new API function introduction. This new function is a
common place for updating appropriate global_data fields for
OF_EMBED case.
Also, the consequence of the patch is movement of '___dtb_dt_*begin'
symbols' declaration from header file, because nobody used symbols
outside the lib/fdtdec.c.
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In commit 399f739be6 ("CI: allow jobs to be run in merge requests") we
added "rules:when: always" to many stages of the pipeline to allow for merge
requests to trigger a run. However based on current Gitlab
documentation, we should still be triggered on merge requests without
this. Furthermore the way we have things written today we always run all
stages of the CI rather than failing out early on problems, which is not
always useful. Remove these as we should still be fine with merge
requests triggering a run.
Link: https://docs.gitlab.com/ee/ci/yaml/#rules
Signed-off-by: Tom Rini <trini@konsulko.com>
Our Gitlab pipeline is currently broken up in to several stages. This
was done with the thought process of "we should test tools and if
they're good test emulated targets and if they're good test real
hardware and if they're good test the world". However, in terms of that
first stage it only really matters that binman, et al are still
functional. And for a few years now Gitlab has had a "needs" keyword
that lets you refine pipeline dependencies. Use this to perform the
minor optimization of having test.py only require that tool testing job.
This will become more useful later when we add long running testsuites
that we do not want to block later jobs.
Signed-off-by: Tom Rini <trini@konsulko.com>
It is annoying to have sandbox enter a boot loop when an assertion
fails. Hang instead, since then the error message is only printed once
and Ctrl-C can be used to quit, as per normal.
Signed-off-by: Simon Glass <sjg@chromium.org>
The mpc8xxx_gpio driver contains a workaround for certain chips
where the previously written state of outputs cannot be read back
from the GPIO data (GPDAT) register (MPC8572/MPC8536). This workaround
consists of tracking the state of GPDAT in a "shadow register" (i.e. a
software variable). The shadow register is initialized to zero.
This results in a problem w.r.t. outputs that are configured to a
high (1) state before U-Boot runs, but not touched by U-Boot itself:
Due to the zero-initialization, these GPIOs end up being set to zero,
the first time that any other output is set.
To avoid such issues initialize the GPDAT shadow register to the value
previously held by any outputs, if possible. On MPC8572/MPC8536 this
should make no difference, i.e. the shadow register should be
initialized to zero on these chips.
This patch has been tested on a MPC8314E-based board.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
To increase readability, use the defined constant instead of specifying
SPCR[TBEN] as a number.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Globals defined in headers can result in multiple-definition errors
while linking, if they are visible beyond the current translation unit.
This hasn't been a problem for initreg.h so far, but would become a
problem in the next patch, where I use a constant from initreg.h in a
second C file.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
TBU and TBL are specified as two 32-bit registers that form a 64-bit
value, but the calculation only shifted TBU by 16 bits.
Fix this by actually shifting 32 bits.
Reviewed-by: Sinan Akman <sinan@writeme.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
PowerPC general-purpose registers are historically specified as plain
numbers (0-31), which makes them hard to distinguish from immediates.
For this reason, include/ppc_asm.tmpl defines aliases named r0-r31.
This can still lead to uncaught mistakes if a register is used in place
of a number.
Instead of (e.g.) 5 use %r5, which will result in an assembler warning
if used as a number. Turn these warnings into errors by passing
`--fatal-warnings` to the assembler.
I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Instructions such as dcbi are in the X-form; they have RA and RB fields
and the effective address (EA) is computed as (RA|0)+(RB). In words,
this means that if RA is zero, the left-hand side of the addition is
zero, otherwise the corresponding GPR is used. r0 can never be used on
the left-hand side of a X-form instruction.
For D-form instructions such as addis, the Power ISA illustrates this in
the instruction pseudo-code:
if RA = 0 then RT <- EXTS(SI || 0x0000)
else RT <- (RA) + EXIS(SI || 0x0000)
In all of these cases, RA=0 indicates the value zero, not register r0.
I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Ilias Apalodimas <ilias.apalodimas@linaro.org> says:
The LMB subsystem was used opportunistically for a number of years.
A while back Sughosh merged it with the EFI subsystem in order to have a
common allocator and avoid subsystems overwriting memory they shouldn't.
This is an initial cleanup of all the crud we gathered over the years.
There's no functional change expected from the patches as they just cleanup
some abstraction functions and rename a few variables to make more
sense.
I plan to make even bigger changes -- e.g I don't see the point of
having *_alloc() and *_reserve() versions of the functions since they
do the same thing and just cause confusion. lmb_alloc_addr_flags()
returning the base address on success makes little sense since we
already *request* the address on the function arguments, etc.
Since this patchset grew enough already, I'd like to get it in
before more refactoring happens.
It's worth noting that although some patches slightly increase the code
size due to an extra flags argument being carried around, the final
result is eventually smaller.
# qemu_arm64_lwip_defconfig (version string adds another 20b)
add/remove: 0/5 grow/shrink: 15/1 up/down: 568/-628 (-60)
Function old new delta
lmb_alloc_base 80 324 +244
lmb_alloc_addr 8 144 +136
lmb_reserve 8 96 +88
version_string 50 70 +20
boot_relocate_fdt 488 508 +20
boot_ramdisk_high 268 284 +16
lmb_add_region_flags 696 704 +8
boot_fdt_reserve_region 100 108 +8
load_serial 548 552 +4
lmb_alloc 8 12 +4
image_setup_libfdt 368 372 +4
do_load 728 732 +4
do_bootz 332 336 +4
do_booti 520 524 +4
bootm_run_states 2176 2180 +4
lmb_alloc_addr_flags 4 - -4
boot_fdt_add_mem_rsv_regions 284 280 -4
lmb_alloc_base_flags 76 - -76
lmb_reserve_flags 96 - -96
_lmb_alloc_addr 144 - -144
_lmb_alloc_base 304 - -304
Total: Before=1020102, After=1020042, chg -0.01%
# sandbox_defconfig (version string adds another 20b)
add/remove: 0/3 grow/shrink: 24/3 up/down: 523/-501 (22)
Function old new delta
lmb_alloc_base 48 299 +251
lmb_alloc_addr 4 92 +88
lmb_reserve 4 58 +54
test_alloc_addr 2933 2963 +30
version_string 50 70 +20
lib_test_lmb_overlapping_reserve 1018 1030 +12
lmb_add_region_flags 600 610 +10
test_multi_alloc.constprop 3034 3042 +8
test_get_unreserved_size 1032 1038 +6
boot_relocate_fdt 599 605 +6
boot_fdt_reserve_region 67 73 +6
lmb_alloc 4 9 +5
lmb_free_flags 190 194 +4
wget_handler 1530 1533 +3
tftp_handler 1190 1192 +2
test_noreserved 1207 1209 +2
test_bigblock 911 913 +2
load_serial 946 948 +2
lib_test_lmb_flags 2101 2103 +2
do_spi_flash 3150 3152 +2
do_bootz 526 528 +2
do_bootm_linux 2067 2069 +2
bootm_run_states 5275 5277 +2
_fs_read.lto_priv 331 333 +2
lmb_dump_region.lto_priv 356 353 -3
lmb_add 59 52 -7
efi_allocate_pages.part 303 249 -54
lmb_reserve_flags 65 - -65
_lmb_alloc_addr.lto_priv 92 - -92
_lmb_alloc_base.lto_priv 280 - -280
Total: Before=2492722, After=2492744, chg +0.00%
Link: https://lore.kernel.org/r/20241218070251.686383-1-ilias.apalodimas@linaro.org
lmb_alloc_addr_flags() is a wrapper for _lmb_alloc_addr() and it's the
only function using it. Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()
and remove the wrapper.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
lmb_alloc_base() is just calling lmb_alloc_base_flags() with LMB_NONE.
There's not much we gain from this abstraction, so let's remove the
former add the flags argument to lmb_alloc_base() and make the code
a bit easier to follow.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
lmb_alloc_addr() is just calling lmb_alloc_addr_flags() with LMB_NONE
There's not much we gain from this abstraction, so let's remove the
latter, add a flags argument to lmb_alloc_addr() and make the code a
bit easier to follow.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
free_mem is a misnomer. We never update it with the free memory for
LMB. Instead, it describes all available memory and is checked against
used_mem to decide whether an area is free or not.
So let's rename this field to better match its usage.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE.
There's not much we gain from this abstraction.
So let's remove the latter, add the flags argument to lmb_reserve()
and make the code a bit easier to follow.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
LMB flags is not an enum anymore. It's currently used as a bitmask
in various places of our code. So make it a u32 which is more
appropriate when dealing with masks.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Fix warnings from kernel-doc script. Improve and unify overall style of
kernel-doc comments in lmb source files. Move all kernel-doc comments
for public functions into the header, as recommended in U-Boot
documentation [1]:
Non-trivial functions should have a comment which describes what
they do. If it is an exported function, put the comment in the
header file so the API is in one place. If it is a static function,
put it in the C file.
This also takes care of existing duplication. While at it, do a bit of
cosmetic cleanups as well.
No functional change.
[1] doc/develop/codingstyle.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
flag_str[] is a pointer to const. Make it also a const pointer. Improve
a style a bit while a it, to make this line fit 80 characters limit.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
rgnflags variable in lmb_add_region_flags() has incorrect type: it's
declared as phys_size_t when it should be enum lmb_flags. That
copy-paste mistake was firstly introduced in commit 59c0ea5df3 ("lmb:
Add support of flags for no-map properties"), and then copied further
into commit ed17a33fed ("lmb: make LMB memory map persistent and
global"). Fix it by using the correct type to match struct lmb_region
field.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for mapping C22 register access to C45-only PHYs.
This is mainly useful for 'mii info' command, which performs
C22 only access to determine PHY ID and link state and does
not work well with this driver so far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Implement C22 PHY access support in addition to C45 PHY access
support which is already present. This is used for PHYs which
do not support C45 access or which are C22 only.
The C22 access can be recognized when devad is set to -1 or
0xffffffff hex, which also matches MDIO_DEVAD_NONE macro. Test
for this special devad value and if it is set this way, perform
C22 access, otherwise perform C45 access.
Based on work by LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Set Station Management Mode : Clause 45 setting of MFF bit in MPSM
register can be done in rswitch_mii_access_c45() once, instead of this
being done before each rswitch_mii_access_c45() call. Deduplicate the
bit setting into rswitch_mii_access_c45(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Replace enum rswitch_reg with plain #define REGISTER OFFSET macros.
The enum rswitch_reg was not referenced anywhere, so there was no
benefit of keeping it around. Include register block labels. Turn
all register offsets into lowercase hex values. No functional change.
Rename EATDQDC to EATDQDCR, GWTRC to GWTRCR, GWDCC to GWDCCR, FWPC0
to FWPC, FWPBFC to FWPBFCR, FWPBFCSDC to FWPBFCSDCR because there
are both register names which used to be part of this enum and also
macros with the same name, each used for slightly different purpose.
Make sure there is no collission.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Enable remoteproc command and APMU remoteproc driver to start Cortex-R52
cores from U-Boot command line. Code on the Cortex-R52 #0 can be started
as follows, code on other cores can be started by passing the correct ID
to 'rproc load' and 'rproc start' to select the core:
"
=> rproc init
=> rproc list
0 - Name:'rcar-apmu-cr52.0-apmu@e6170000' type:'internal memory mapped' supports: load start stop reset is_running
1 - Name:'rcar-apmu-cr52.1-apmu@e6170000' type:'internal memory mapped' supports: load start stop reset is_running
2 - Name:'rcar-apmu-cr52.2-apmu@e6170000' type:'internal memory mapped' supports: load start stop reset is_running
=> rproc load 0 0xeb200000 0x10000
Load Remote Processor 0 with data@addr=0xeb200000 65536 bytes: Success!
=> rproc start 0
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Describe APMU controller as a remoteproc device capable of starting
the Cortex-R52 cores in Renesas R8A779G0 V4H SoC DT. The APMU IP is
in fact a power management unit capable of additional operations, but
those are not used by U-Boot so far.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add R-Car Gen4 APMU controller remoteproc driver capable of starting
the Cortex-R52 cores in Renesas R8A779G0 V4H/V4M SoC. The APMU IP is
in fact a power management unit capable of additional operations, but
those are not used by U-Boot so far.
This requires slight adjustment to the SPL entry point code, as that
is being executed on the Cortex-R52 #0 and the Cortex-R52 #0 enters an
endless loop once it starts the rest of the SPL on Cortex-A76 core.
The endless loop now checks for content of APMU CRBARP registers and
tests whether valid VLD_BARP and BAREN_VALID bits are set, if so, the
Cortex-R52 core exits the endless loop and jumps to address started
in CRBARP[31:18] register in ARM mode, which is a trampoline code to
jump to the final entry point.
The trampoline code is in place to avoid limitation of CRBARP[31:18]
address field, which limits the core start address to memory addresses
aligned to 0x40000 or 256 kiB . The trampoline is placed at 0x40000
aligned address and jumps to the final entry point, which can be at
an address with arbitrary alignment at instruction granularity.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This DTC_FLAGS assignment is no longer necessary as all R-Car Gen2/Gen3/Gen4
platforms have been converted to OF_UPSTREAM and matching DTC_FLAGS assignment
is present in dts/upstream/src/arm64/Makefile . Drop the remnant.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Align R-Car Gen2/Gen3/Gen4 configuration header file to look
basically the same way across these three SoC generations.
There are subtle difference between the remaining bits in
those files across SoC generations, but the common bits are
now aligned. There is not much left in those headers either,
most of the configuration is now converted to Kconfig.
Specifically for R-Car Gen3, GIC registers have been moved
to architecture specific header file rcar-gen3-base.h , the
rest of the changes here are comment changes and indentation
changes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support for building U-Boot SPL for Renesas R-Car Gen4 R8A779G0 V4H SoC.
The SPL initializes the DBSC5 DRAM controller, RT-VRAM and loads and starts
U-Boot proper on the Cortex-A76 core.
The SoC BootROM can not boot the CA76 core directly, instead the SPL starts
on the CR52 core which immediately brings up the CA76 core, which in turn
starts executing the actual SPL. This is achieved by placing a tiny bit of
precompiled Aarch32 code at the very beginning of the SPL. The code consists
of some 32 instructions, uses APMU to configure CA76 start address to offset
0x80 Bytes from start of the SPL, and uses APMU to start the CA76 core. The
code parts the CR52 core in an endless loop once the CA76 core got started.
The 32 instructions are completely arbitrary number, so is the offset 0x80
Bytes from start of SPL, because 0x80 = 128 decimal and 128 / 4 bytes per
instruction is 32 instructions. The 32 instructions turned out to be enough
to started the CA76 and 0x80 is nicely aligned.
Once the SPL completes hardware initialization, the SPL loads U-Boot proper.
The u-boot.itb proper fitImage contains 64bit build on u-boot-nodtb.bin and
a DT for R8A779G0 V4H White Hawk board and is generated by binman. The
u-boot.itb is loaded from SPI NOR offset 0x80000.
In order to install this setup on an existing R8A779G0 V4H White Hawk board,
build using r8a779g0_whitehawk_defconfig, generate SPI NOR image flash.bin
and write flash.bin to SPI NOR offset 0x0 . Finally, configure board MD pin
switches according to the R8A779G0 V4H White Hawk board documentation for
40 MHz SPI NOR boot using DMA and restart the board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
In case U-Boot runs in EL3, which is the highest privilege level on ARM64,
there can be no firmware running that would restrict access to the bottom
128 MiB of DRAM. In fact, it is likely that U-Boot would have to load that
firmware into those bottom 128 MiB of DRAM and start that firmware.
Make those bottom 128 MiB of DRAM available in case U-Boot runs in EL3 to
allow loading the firmware to that area.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Split common board code for R-Car Gen3 and Gen4 into separate files.
The R-Car Gen3 board code contains fixups specific to TFA which are
no longer required on R-Car Gen4, keep those fixups in its own file
so they would not interfere with Gen4.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
All R-Car Gen4 board files are copies of one another at this point.
Deduplicate them into single board/renesas/rcar-common/gen4-common.c
and remove all the duplicates. The one exception is R-Car V3U Falcon
board, which enables RWDT reset in board_init(), conditionally build
RWDT enablement in board_init() in the new common code for V3U.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Make the R-Car V3U stub PSCI implementation available on 64bit R-Car SoCs.
This implementation is useful during early board bring up, where it can
supplant missing fully-featured PSCI implementation. Note that this PSCI
implementation is very basic and offers only SoC reset functionality. It
is unable to enable or disable secondary CPU cores nor does it offer any
suspend/resume functionality.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Describe DBSC5 DRAM controller and RT-VRAM configuration interface
as two new DT nodes in R-Car Gen4 R8A779G0 U-Boot DT extras file.
This node is used by the U-Boot SPL for R8A779G0 SoC, where the
DBSC5 and RT-VRAM drivers bind to these nodes and bring up the
DRAM controller and RT-VRAM settings respectively, so U-Boot
proper can be loaded into DRAM and started on Cortex A76 core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add Renesas R-Car Gen4 DBSC5 DRAM controller driver. This driver is currently
capable of bringing LPDDR5 DRAM on Renesas R-Car V4H Whitehawk board. Further
boards can be supported by supplying board specific DRAM configuration data
via dbsc5_get_board_data(). Support for R-Car V4M is not implemented, however
the driver is already mostly prepared to support this SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use the IS_ENABLED() macro to reduce amount of #ifdef use in the driver
and improve code coverage. With IS_ENABLED() macro, the code is compiled
and then optimized out, which prevents bitrot.
In case no PFC table matches the SoC in use, do not probe the driver
and instead exit with -ENODEV. This should never happen under normal
conditions, because this would mean the driver DT compatible string
match happened, but the list in probe() cannot match the model listed
in match data associated with the compatible string on which the match
did happen.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> says:
Legacy TCP stack is bad. Here are some of the known issues:
* tcp packet from other connection can break a current one
* tcp send sequence always starts from zero
* bad tcp options processing
* strange assumptions on packet size for selective acknowledge
* tcp interface assumes one of the two scenarios:
- data downloading from remote host to a board
- request-response exchange with a small packets
so it's not possible to upload large amount of data from the
board to remote host.
* wget test generate bad tcp stream, test should fail but it passes instead
This series of patches fixes all of the above issues.
The benefits:
* A lot of bug was fixed
* Better and more reliable TCP state machine
* Tcp clients becomes smaller/simpler
* Data uploading was fixed (now it's possible to transmit a huge amount of
data from the board to remote host)
Modification was verified with
* firmware downloading via u-boot wget command
* fastboot over tcp
* netcat linux client using test netcat implementation (not included
to this patch series)
* Firefox/Chrome/Edge using test web-server implementation (not included
to this patch series)
[trini: snip]
WARNING: The v16 patch series does NOT fix lib/efi_selftest/efi_selftest_http.c
issue. It looks like the efi_selftest_http test is wrong by itself. The
following issues were detected during efi_selftest_http test study:
* The test should fail with HTTP status code 404 because:
* nowday most web-servers requires the presence of "HOST:" request header
* wget does not support sending "HOST:" request header
* web-server of "http://example.com/" site does NOT provide "default server"
configuration, so it answer 404 on any request without "HOST:" header.
* The test states that:
* test send HTTP HEAD request to a server,
* then test send HTTP GET request to a server,
* reads the actual bytes sent by the server and compare it with
the value from "Contents-Length:" responce header of the HEAD request
But actually it
* does not send HTTP HEAD request, only a single HTTP GET request
is performed
* the test reads the responce twice from the same request. It looks
very suspictiuos
Link: https://lore.kernel.org/r/20241228104637.4173913-1-mikhail.kshevetskiy@iopsys.eu
Some driver implements it's own network packet pool, so PKTBUFSRX is zero.
This results in zero-size TCP receive window, so data transfer doesn't
work. Avoid it by setting a reasonable fallback value.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch:
* remove useless code,
* use a special function for pretty printing of tcp flags,
* simplify the code
The behavior should not be changed.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
According to HTTP/1.0 standard the HTTP reply consist of
* Status Line + CRLF
* Zero or more Response Header Fields (each ended with CRLF)
* CRLF on new line (Response Header Fields end marker)
* Optional Entity Body.
Thus in response headers we state:
Content-Length = 30
but actual transferred file data is:
"\r\n<html><body>Hi</body></html>\r\n".
This is 32 bytes of data.
So we get and check for correctness 32 bytes of data, but
* The response we are used is incorrect, real server will
set Content-Length to 32.
* default_wget_info->hdr_cont_len will be set to wrong
value 30 (used for efi http booting).
Fix an issue by:
* replace bogus response with an actual response from the HTTP server
* format response to show HTTP response structure
* recalculate md5sum as transferred file data has been changed.
The server response was captured with the commands
echo -ne "<html><body>Hi</body></html>\n" > ~/public_html/test.html
echo -ne "GET /~${USER}/test.html HTTP/1.0\r\n\r\n" | netcat localhost 80 >reply.txt
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Changes:
* update to new tcp stack
* fix zero values for ISS and IRS issue (see RFC 9293)
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changes:
* Fix initial send sequence always zero issue
* Use state machine close to RFC 9293. This should make TCP
transfers more reliable (now we can upload a huge array
of data from the board to external server)
* Improve TCP framework a lot. This should make tcp client
code much more simple.
* rewrite wget with new tcp stack
* rewrite fastboot_tcp with new tcp stack
It's quite hard to fix the initial send sequence (ISS) issue
with the separate patch. A naive attempt to fix an issue
inside the tcp_set_tcp_header() function will break tcp packet
retransmit logic in wget and other clients.
Example:
Wget stores tcp_seq_num value before tcp_set_tcp_header() will
be called and (on failure) retransmit the packet with the stored
tcp_seq_num value. Thus:
* the same ISS must allways be used (current case)
* or tcp clients needs to generate a proper ISS when
required.
A proper ISS fix will require a big redesing comparable with
a this one.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changes:
* Avoid use net_server_ip in tcp code, use tcp_stream data instead
* Ignore packets from other connections if connection already created.
This prevents us from connection break caused by other tcp stream.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Current code assume that all (except last) packets are of the same size.
This is definitely wrong. Replace SACK code with a new one, that does
not rely on this assumption. Also this code uses less memory.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Current TCP code may miss an option if TCP_O_NOP option was used before
it for proper aligning.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
VBE uses a crc8 checksum to verify that the nvdata is valid, so make
sure it is available if VBE is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
With VBE we want to use FIT in all phases of the boot. Add Kconfig
options to support this.
Disable the options for sandbox_vpl for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The variable 'ret' is defined twice, which is not intended. This may
have been a local merge error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2eefeb6d893 ("spl: Report a loader failure")
U-Boot uses ulong for addresses. It is confusing to use uintptr_t in a
few places, since it makes people wonder if the types are compatible.
Change the few occurences in SPL to use ulong
Signed-off-by: Simon Glass <sjg@chromium.org>
The current check looks only at SPL, but TPL or VPL might have a
different setting. Update the condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current check looks only at SPL, but TPL or VPL might have a
different setting. Update the condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a loader returns an error code it is silently ignored. Show a message
to at least provide some feedback to the user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some code has crept in which ignores this parameter. Fix this and add a
little debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: b1307f884a ("fit: Support compression for non-kernel components (e.g. FDT)")
The name of the bootdev device is not that important, particular in SPL.
Save a little code space by using a simpler name.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the best-match feature fails to find something, use the provided
config name as a fallback. The allows SPL to select a suitable config
when best-match is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
The for() loop ends up being in the code even if the log_debug() does
nothing. Add a condition to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The GW7905 was renamed to GW7500 before release. Change the various
names in the dt files and references.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- INTC/INTC-EX
- MSIOF
- PWM
- SSI
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- INTC-EX
- MSIOF
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- INTC/INTC-EX
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- CAN
- DU
- INTC
- MSIOF
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
By default the pin multiplexing tables used by U-Boot are reduced
to keep the size of the bootloader low. This option allows build of
full pin multiplexing tables the same way they are included in the
Linux kernel. This includes pin multiplexing options for Audio, CAN,
CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no
U-Boot driver. This option is disabled by default.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23987
- imx8m: Remove global ddrphy_trained_csr as it is a per board
configuration.
- Add DM_FLAG_ACTIVE_DMA flag for FEC network driver to avoid potential
kernel crash.
- Miscellaneous improvements for i.MX8M Venice Gateworks platforms.
Drop global ddrphy_trained_csr which maybe different with per board
ddrphy_trained_csr. DDR TOOL generates ddrphy_trained_csr for each
board, using the global ddrphy_trained_csr has risk that values may
be not up to date.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When FEC network card works as the prime one in u-boot, and is in
active status, kernel might crash during booting up stage, especially
working with grub. Because the DMA of FEC is still in active status, and
copy data into memory if there is network data received. In this case, if
kernel allocated a part of memory that has overlay with the memory
used by DMA, kernel memory may be destroyed and cause kernel crashes.
Because before kernel boots up really, u-boot dm_remove_devices_flags()
can call the remove callback of FEC driver with DM_FLAG_ACTIVE_DMA
flag. In fecmxc_remove(), phy power is disabled, so there is no data
received. In this way, it makes sure that there is no DMA action, so
that avoid kernel crashing occurs.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
define a suitable default address for CONFIG_SPL_LOAD_FIT_ADDRESS
to make it easier on folks enabling HABv4.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The mxc_get_clock function is around for compatibility with older
drivers that are not clock aware. In this case asking for the clk for
MXC_CSPI_CLK does not take into account there are multiple SPI busses on
modern IMX SoC's and it will return the clock for the first bus which
may not be used or configured.
In the case you are not using the first bus you will not get the proper
clock. Fix this by obtaining the clock rate from the bus clock.
This resolves an invalid SPI clock frequency configuration for SPI2 on a
board where SPI1 is not used.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
First, thanks to Simon Glass and also Linaro, we now have access to a
few fast arm64 host machines in our Gitlab instance, to use as CI
runners. This series finishes the work that I pushed earlier and Simon
had started that enables arm64 hosts to be used for most things now.
The first notable change, especially if you use this on your own Gitlab
instance is that "DEFAULT_TAG" is now unused and we instead have:
- DEFAULT_ALL_TAG:
- DEFAULT_ARM64_TAG:
- DEFAULT_AMD64_TAG:
- DEFAULT_FAST_AMD64_TAG:
This lets us say that some jobs can be run on all runners, because they
are small enough that anything we'd connect to CI is fast enough and it
also does not depend on the underlying host architecture. Next we have
tags for any arm64 host, or any amd64 host. Finally, we have a tag for
fast amd64 hosts. What these last three are for is that we have a few
jobs that need to run on amd64 hosts and so we have to restrict them
there, but we also have now reworked the world build jobs to build
(almost) everything in a single job and on the fast amd64 machines this
is still as quick as the old way was, in practice.
To reach this point, we say that the Xtensa jobs can only run on amd64
hosts. Our targets only work with the binary-only toolchain and so this
is a reasonable limit and we exclude them from the world build jobs. We
also need to deal with ensuring the right toolchain is used regardless
what the host architecture is and that we don't use the host toolchain
by accident. Finally, because some of these changes needed to be worked
out in the linter, fix some of the general warnings that notes as well.
First, try and be slightly clearer about what "buildx" is with respect
to the docker build process.
Second, now that we build the container for both amd64 and arm64, we
should document how to make a docker "builder" that has multiple nodes.
With this one node should be amd64 and one node arm64, and with
reasonably fast arm64 hardware this will be much quicker than using
QEMU.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We should always look in our downloaded toolchains first and then for
host-provided toolchains.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We do not want to use the host toolchain for building our platforms in
CI (it is both too old, and would be inconsistent with our CI
practices). To do this we need to set the toolchain-prefix so that we
don't end up guessing "/opt/.../aarch64-linux-aarch64-linux-" as the
prefix.
Link: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/32
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the test.py stage of the build we mark the pytest results as
artifacts to save, so that they can be used for reports. This however
leads to all of the artifacts being downloaded (and then not used) in
later stages. Optimize this out by using an empty list of dependencies
here (which is the keyword for which artifacts are needed).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When validating our current pipeline, a warning is produced about a lack
of a default workflow. For how we use it, we can add a simple default of
"always".
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
First, introduce DEFAULT_ALL_TAG, DEFAULT_ARM64_TAG, DEFAULT_AMD64_TAG
and DEFAULT_FAST_AMD64_TAG and remove the previous DEFAULT_TAG (as
anyone making use of that will need to adjust their jobs). This allows
us to say that some jobs can run on amd64 or arm64 hosts under the all
tag, while some jobs must run on amd64 (the Xtensa jobs due to
binary-only toolchains and sandbox for now) Then we rework the world
build stage to only run on our very fast amd64 hosts, or our arm64 hosts
(which are also very fast). This should result in a similar overall
build time but also a much more consistent overall build time as we
won't have the two big world jobs possibly run on our slower build
nodes.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove the rest of the places where we hard-code the version of the
toolchain we're using.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The xtensa architecture is interesting in that the platforms we support
are only valid on the binary-only toolchains as the DC233C instruction
set requires those toolchains (and not the FSF instruction set). Only
install the binary toolchain on amd64 hosts and only run the tests on
them as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When specifying a directory containing DTBs with 'fit,fdt-list-dir', it can be
handy not to have to also specify this directory to the input directories of
binman with '-I' option and use the method tools.append_input_dirs() append it.
This avoids to have to specify the DTB directory in both the device tree
provided to binman and through '-I' option to binman.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
append_input_dirs() can be used to append a list of input directories to indir
global list.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change allows to replace both 'SEQ' and 'NAME' keywords by respectively a
sequence number and the name of the FDT to provide more flexibility in the node
name for the device trees included in the FIT.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Input directories can be passed to binman using the '-I' option and those
input directories are now also passed to 'dtc' when run by binman.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
An optional list of input directories can be passed to EnsureCompiled() which
allows to pass a list of directories where input files can be searched.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mkimage can be used for both signing the FIT or encrypt its content and the
option '-k' can be used to pass a directory where both signing and encryption
keys can be retrieved. Adding 'fit,encrypt' property to the 'fit' node, leads to
try to find keys directory among binman include directories.
_get_priv_keys_dir() is renamed as _get_keys_dir() and adapted to support both
signing and encryption nodes in the FIT.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the initialisation vector is randomly generated, its value shall be
stored in the FIT together with the encrypted data. The changes allow to
store the IV in the FIT also in the case where the key is not stored in
the DTB but retrieved somewhere else at runtime.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For new PowerPC developments, it will be useful to borrow devicetrees
from Linux. This patch makes it possible.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
In generic_phy_get_bulk(), if 'phys' property is absent in
the device node then it is not an error condition.
Change print message verbosity to debug to avoid spamming
console in such cases.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The current value of CONFIG_FASTBOOT_BUF_ADDR is incorrect for hardware
with 512MB and 1GB of RAM. The RAM address ranges for these devices are:
- 512MB:
- Start: 0x80000000
- End: 0xA0000000
- 1GB:
- Start: 0x80000000
- End: 0xC0000000
The current buffer address makes fastboot downloads work only on
hardware with 2GB of RAM.
To fix this issue:
1. Lower CONFIG_FASTBOOT_BUF_ADDR to 0x88200000. This makes the buffer
to be equal ot CONFIG_SYS_LOAD_ADDR, which is a safe address to
download files using fastboot.
2. Reduce the size of the download buffer to 128MB, avoiding overlaps
with RAMDISK_ADDR_R. This is a good enough value for individual
downloads.
These changes make fastboot downloads work with 512MB and 1GB devices.
Fixes: defe30a78b ("verdin-am62: add DFU, USB and UUU fastboot support")
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Support of legacy 64-bit entry point was already present when booting a bzimage
with 'zboot' but not supported with 'bootm' when the x86_64 Linux kernel is
embedded in a FIT image.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Evgeny Bachinin <EABachinin@salutedevices.com> says:
This patch-set repairs ability to use sandbox with CONFIG_OF_EMBED=y.
For now, to use OF_EMBED, the following must be done
1) sandbox64_defconfig should have:
```
-CONFIG_OF_LIVE=y
+CONFIG_OF_EMBED=y
```
2) On sandbox when CONFIG_OF_EMBED=y, the u-boot process can't start
due to:
```
Bloblist at b000 not found (err=-2)
initcall failed at call 000000000011829c (err=-2: No such file or \
directory)
### ERROR ### Please RESET the board ###
```
So, it is natural desire to disable CONFIG_BLOBLIST just to test
sandbox with OF_EMBED=y (disable it one way or another):
```
config SANDBOX
- select BLOBLIST
+ select BLOBLIST if SOME_NON_EXISTING_OPTION
```
3) As a result, having such changes (CONFIG_OF_EMBED=y &&
CONFIG_BLOBLIST=n) leads to the link & run-time errors, being fixed
by this patch series.
Link: https://lore.kernel.org/r/20241202-sandbox_repair_of_embed-v1-0-05aff4b0ccf7@salutedevices.com
[trini: The final patch is dropped as no longer relevant with Simon's
rework to that function which is now applied.]
This series is from Simon Glass <sjg@chromium.org>.
It first corrects the test for checking if a bloblist could have come
from TPL and so we check for a device tree, and then changes the
argument order for board_fdt_blob_setup() to be more inline with our
usual argument ordering.
Link: https://lore.kernel.org/r/20241102174944.412088-1-sjg@chromium.org
Having CONFIG_OF_EMBED=y && CONFIG_BLOBLIST=n leads to the link
error:
```
ld: /tmp/ccwtRVty.ltrans28.ltrans.o:(.data.rel+0x4b0): undefined \
reference to `do_ut_bloblist'
```
Fixes: 6ea5df39e8 ("test: Only enable bloblist test when supported")
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Having CONFIG_OF_EMBED=y && CONFIG_BLOBLIST=n leads to the link
error:
```
ld: /tmp/ccRVty.ltrans40.ltrans.o: in function `lib_test_is_enabled':
test/lib/kconfig.c:24: undefined reference to \
`invalid_use_of_IF_ENABLED_INT'
ld: test/lib/kconfig.c:26: undefined reference to \
`invalid_use_of_CONFIG_IF_ENABLED_INT'
```
Fixes: 29784d62ed ("test: Add some tests for kconfig.h")
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Having CONFIG_OF_EMBED=y && CONFIG_BLOBLIST=n leads to the link
error:
```
ld: /tmp/ccwtRVty.ltrans0.ltrans.o: in function `state_uninit':
arch/sandbox/cpu/state.c:508: undefined reference to `bloblist_finish'
```
Fixes: 1c52fcca72 ("sandbox: Write out bloblist when exiting")
Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This returns a devicetree and updates a parameter with an error code.
Swap it, since this fits better with the way U-Boot normally works. It
also (more easily) allows leaving the existing pointer unchanged.
No yaks were harmed in this change, but there is a very small code-size
reduction.
For sifive, the OF_BOARD option must be set for the function to be
called, so there is no point in checking it again. Also OF_SEPARATE is
defined always.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
[trini: Update total_compute]
Signed-off-by: Tom Rini <trini@konsulko.com>
The condition for receiving a bloblist from TPL is reversed. This was
only noticed are the other fixes landed. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
The FIT name in RISC-V Falcon mode should be different from that in
normal boot mode; it is called linux.itb. If the setting is missing
in common/spl, the normal boot file name will be used.
Signed-off-by: Randolph <randolph@andestech.com>
Enable driver for DesignWare MSHC. TH1520 supports all
speed modes up to HS400ES and UHS SDR105.
Also enable ADMA and mmc command.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Add SDHCI and EMMC controlles nodes on TH-1520 SoC. And enable them for
Lichee module 4A.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
There are difference between upstream DT and the old DT
in terms of reg base, reset gpio and syscon. Make the driver
compatible with upstream DT.
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Enable OF_UPSTREAM to use upstream DT and add starfive/ prefix to
the DEFAULT_DEVICE_TREE. Rename jh7110-starfive-visionfive-2-u-boot.dtsi
to jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi and set the v1.3b
device tree as the default device tree.
Drop redundant DT files from arch/riscv/dts/ and redundant clock and
reset definitions from include/dt-bindings/.
Since the old clock definitions is a little different from those in
upstream Linux, update the clock definitions in clock drivers
accordingly.
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: E Shattow <lucent@gmail.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Import a slightly modified version of the LicheeRV Nano and SG2002
device trees from the Linux Kernel. The current supported IPs are UART,
MMC, Timer, PLIC and CLINT.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Provide a page describing the usage of U-Boot on the LicheeRV Nano and a
description of the board.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This is a debug command to monitor the retention state of the data on
the array. The command needs a duplication of the mtd_read_oob()
function to actually return the maximum number of bitflips encountered
while reading the page. We could write a specific implementation for the
Sunxi driver but this is probably enough.
nand watch <off> <size> - check an area for bitflips
nand watch.part <part> - check a partition for bitflips
nand watch.chip - check the whole device for bitflips
The output may be a bit verbose and could look like:
=> nand watch.chip
device 0 whole chip
size adjusted to 0xff60000 (5 bad blocks)
NAND watch for bitflips in area 0x0-0xff60000:
Page 0 (0x00000000) -> error -74
Page 1 (0x00000800) -> error -74
Page 2 (0x00001000) -> error -74
Page 3 (0x00001800) -> error -74
Page 4 (0x00002000) -> error -74
Page 5 (0x00002800) -> error -74
Page 6 (0x00003000) -> error -74
Page 7 (0x00003800) -> error -74
Page 8 (0x00004000) -> error -74
Page 9 (0x00004800) -> error -74
Page 10 (0x00005000) -> error -74
Page 11 (0x00005800) -> error -74
Page 12 (0x00006000) -> error -74
Page 13 (0x00006800) -> error -74
Page 14 (0x00007000) -> error -74
Page 15 (0x00007800) -> error -74
Page 16 (0x00008000) -> error -74
Page 17 (0x00008800) -> error -74
Page 18 (0x00009000) -> error -74
Page 19 (0x00009800) -> error -74
Page 20 (0x0000a000) -> error -74
Page 21 (0x0000a800) -> error -74
Page 22 (0x0000b000) -> error -74
Page 23 (0x0000b800) -> error -74
Page 1110 (0x0022b000) -> up to 1 bf/chunk
Page 1122 (0x00231000) -> up to 1 bf/chunk
Page 1132 (0x00236000) -> up to 1 bf/chunk
Page 1362 (0x002a9000) -> up to 1 bf/chunk
Page 4990 (0x009bf000) -> up to 1 bf/chunk
Page 5728 (0x00b30000) -> up to 1 bf/chunk
Page 7116 (0x00de6000) -> up to 1 bf/chunk
Page 7160 (0x00dfc000) -> up to 1 bf/chunk
Page 7494 (0x00ea3000) -> up to 1 bf/chunk
Page 10842 (0x0152d000) -> up to 1 bf/chunk
Page 11614 (0x016af000) -> up to 1 bf/chunk
Page 11970 (0x01761000) -> up to 1 bf/chunk
Page 12536 (0x0187c000) -> up to 1 bf/chunk
Page 12687 (0x018c7800) -> up to 1 bf/chunk
Page 14298 (0x01bed000) -> up to 1 bf/chunk
Page 18268 (0x023ae000) -> up to 1 bf/chunk
Page 18760 (0x024a4000) -> up to 1 bf/chunk
Page 21440 (0x029e0000) -> up to 1 bf/chunk
Page 22336 (0x02ba0000) -> up to 1 bf/chunk
Page 22592 (0x02c20000) -> up to 1 bf/chunk
Page 23872 (0x02ea0000) -> up to 1 bf/chunk
Page 27584 (0x035e0000) -> up to 1 bf/chunk
Page 35008 (0x04460000) -> up to 1 bf/chunk
Page 37184 (0x048a0000) -> up to 1 bf/chunk
Page 41728 (0x05180000) -> up to 1 bf/chunk
Page 42176 (0x05260000) -> up to 1 bf/chunk
Page 43200 (0x05460000) -> up to 1 bf/chunk
Page 43328 (0x054a0000) -> up to 1 bf/chunk
Page 45376 (0x058a0000) -> up to 1 bf/chunk
Page 47040 (0x05be0000) -> up to 1 bf/chunk
Page 47552 (0x05ce0000) -> up to 1 bf/chunk
Page 49344 (0x06060000) -> up to 1 bf/chunk
Page 49856 (0x06160000) -> up to 1 bf/chunk
Page 62784 (0x07aa0000) -> up to 1 bf/chunk
Page 65153 (0x07f40800) -> up to 1 bf/chunk
Page 65228 (0x07f66000) -> up to 1 bf/chunk
Page 65382 (0x07fb3000) -> up to 1 bf/chunk
Page 98624 (0x0c0a0000) -> up to 1 bf/chunk
Page 101952 (0x0c720000) -> up to 1 bf/chunk
Page 107584 (0x0d220000) -> up to 1 bf/chunk
Page 118208 (0x0e6e0000) -> up to 1 bf/chunk
Page 126656 (0x0f760000) -> up to 1 bf/chunk
Page 127680 (0x0f960000) -> up to 1 bf/chunk
Page 129920 (0x0fdc0000) -> up to 1 bf/chunk
Maximum number of bitflips: 1
Pages with bitflips: 44/130752
It is also possible to reduce the output with the .quiet suffix in order
to just show the summary.
=> nand watch.chip
device 0 whole chip
size adjusted to 0xff60000 (5 bad blocks)
NAND watch for bitflips in area 0x0-0xff60000:
Maximum number of bitflips: 1
Pages with bitflips: 44/130752
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The condition 'ret' is always true as it is never set to other than
-EIO.
Remove 'ret' and the condition for copy.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Reviewed-by: Michael Trimarchi <micheal@amarulasolutions.com>
The srktool option -c does not allow spaces between certificate
filenames. Only commas (',') should separate the filenames. If spaces
are incorrectly included, srktool will not display an error or warning
message but will only process the first certificate in the list.
So adapt documentation accordingly.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
include display_options.h to address build warning:
lib/smbios.c: In function ‘smbios_update_version’:
lib/smbios.c:305:9: warning: implicit declaration of function ‘print_buffer’
[-Wimplicit-function-declaration]
print_buffer((ulong)ptr, ptr, 1, old_len + 1, 0);
^~~~~~~~~~~~
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Fix spelling mistake in the board init files of j721e and j721s2.
s/WKUP_DEVSTAT_MCU_OMLY_MASK/WKUP_DEVSTAT_MCU_ONLY_MASK
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
In the x86emuOp_jump_call_near_IMM() function the target address is
printed incorrectly when jumping backwards. For example instead of
"jmp 0xe8bc" the string "jmp ffffe8bc" is printed. That's because
of the following macro:
DECODE_PRINTF2("%04x\n", ip);
while it should be
DECODE_PRINTF2("%04x\n", (u16)ip);
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
In the x86emuOp_call_near_IMM() function the address of CALL is
printed incorrectly when jumping backwards. For example, the correct
disassemble of the bytes below would be:
0000E8DE E8DBFF call 0xe8bc
(verified by ndisasm). But instead the address is printed as "ffffe8bc".
That's because of the following macro:
DECODE_PRINTF2("%04x\n", ip);
while it should be
DECODE_PRINTF2("%04x\n", (u16)ip);
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
When DEBUG_DECODE_F is enabled in bios_emulator, the printing of
SET{O,NO,B,NB,Z,NZ,BE,NBE,S,NS,P,TP,L,NL,LE,NLE} instructions
is not followed by newline and is, therefore, immediately followed
by the printed address of a new instruction. This garbles the output
and makes it very difficult to read.
This patch adds missing DECODE_PRINTF("\n") calls to print newlines.
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
When DEBUG_DECODE_F is enabled in bios_emulator, the printing of BSF
instructions is garbled because the '\n' symbol is used instead of
the correct '\t'. Fix that.
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
Currently if a gigabit-capable PHY is connected to FEC via RMII or MII, it
will advertise 1000FULL and 1000HALF to a link partner.
Different problems may arise here:
- usually with (R)MII between MAC and PHY the PHY's connection to magnetics
would have only 2 pairs routed as well, otherwise a PHY can negotiate 1000
speed and there will be no traffic possible;
- but even if there is no way to negotiate 1000 speed in HW (only 2 signal
pairs routed), it may take a lot of time for PHY to figure this out; in
case of AD1300 it takes 17-20 seconds, which is waay longer than default
4s PHY_ANEG_TIMEOUT.
Use phy_set_supported() in such cases to disable gigabit advertised
options.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Set correct CPU and GPU frequencies for the industrial i.MX8 SoC
variant.
Ensure that the CPU and GPU frequencies are properly configured for the
industrial variant of the SoC. According to the "i.MX 8QuadMax
Industrial Applications Processors" datasheet, the frequency limits for
this variant are as follows:
- Cortex-A72: 1.296 GHz
- Cortex-A53: 1.104 GHz
- GPU core: 625 MHz
- GPU shader: 625 MHz
The CPU clock is enforced by the System Controller Firmware (SCFW), but
the cpufreq driver is unaware of this enforcement. By removing
unsupported frequencies from the operating points, we ensure that the
cpufreq driver aligns correctly with the SCFW's settings.
The GPU frequency, on the other hand, is not enforced by the SCFW. As a
result, the GPU could potentially be overclocked. To prevent this, we
set the correct clock frequency and update the operating points
accordingly, ensuring compliance with the datasheet specifications.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Simplify module version handling by removing the special case for the
Apalis iMX8QM.
The Apalis iMX8QM has been treated as a special case in module version
handling, but was always the default. By removing this special handling,
the code is simplified and easier to maintain.
We will not print the message "Unknown Apalis iMX8 module" anymore.
However, we still handle this because if the config block is missing we
show "MISSING TORADEX CONFIG BLOCK" and if the serial number is unknown
we show "Model: Toradex 0000 UNKNOWN MODULE V1.1A". Therefore, it is
still possible to detect such issues.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Add new PIDs for the Apalis iMX8 modules featuring the industrial
variant of the SoC, which supports a maximum CPU frequency of 1300 MHz.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
This preparation step ensures that the first column has sufficient space
to handle longer defines. This is necessary for the new Apalis iMX8
defines.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Apalis iMX8DXP 1GB is currently set to enable when compiling for Apalis
iMX8. This is a mistake the Apalis iMX8DXP 1GB was never released and is
not compatible to the Apalis iMX8 series.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
The HBMC_AM654 driver was dependent on SYSCON because syscon APIs were
being used to select the multiplexer state. Change the dependency to
MULTIPLEXER and MUX_MMIO because mux APIs are now being used to
select mux state.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
The size of J7200 tiboot3.bin is 516KB but the memory reserved for it in
HyperFlash was 512KB. This led to overlap of tiboot3.bin over tispl.bin
region and break in HyperFlash boot mode.
Therefore, fix this by increasing the memory allocated for tiboot3.bin
to 1MB for J7200.
Fixes: cf1d6867f7 ("board: ti: j7200: Introduce support for j7200 build targets")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Add 32-bit address overrides for Hyper Bus Memory Controller
for Hyperflash to be functional in R5 SPL.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Add 32-bit address overrides for Hyper Bus Memory Controller
for Hyperflash to be functional in R5 SPL.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
The syscon APIs were used for selecting the state of the mux
device because the mmio-mux driver in u-boot did not support
the mux functionality when the parent device is not a syscon.
Change to mux APIs which utilizes the reg-mux driver to select the
state of the multiplexer.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Instead of bloating the defconfig with CONFIG_CMD_*, move J7 devices to
start using TI_COMMON_CMD_OPTIONS.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Add CMD_NFS to list of configs implied by CONFIG_TI_COMMON_CMD_OPTIONS.
This allows network booting via the NFS protocol from the U-Boot prompt.
Fixes: 10de125707 ("disable NFS support by default")
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Gokul Praveen <g-praveen@ti.com> says:
The OMAP specific UART driver is changed from a generic implementation of
certain ops functions to an OMAP specific implementation of it to add
support for higher baudrates for OMAP devices.
Hence to support the above change, static functionality of ops functions
in generic ns16550 UART U-Boot driver is removed and also migrated certain
macros to its header file for usage in device-specific drivers.
Boot logs link :
https://gist.github.com/GOKU-THUG/8b90117c963e5da5c1b6caeee427c82c
Link: https://lore.kernel.org/r/20241126105131.43359-1-g-praveen@ti.com
Move to OMAP specific implementation of certain ops functions as the UART
prints on the serial console fail for baudrates greater than 460800.
The MDR1 register is responsible for determining the speed mode at which
the UART should operate for OMAP specific devices. The baud divisor is used
to set the UART_DLL register which is used for generation of the baud
clock in the baud rate generator. The implementation logic is similar to
how it is implemented in omap_8250_get_divisor function of 8250_omap UART
linux driver.
Signed-off-by: Gokul Praveen <g-praveen@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Increase scope of ops functions and do some clean up for usage in device
-specific UART drivers.
Remove the static functionality of ops functions and migrate certain macros
to header file for usage in device-specific drivers.
Signed-off-by: Gokul Praveen <g-praveen@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Garrett Giordano <ggiordano@phytec.com> says:
This patch set adds the phyCORE AM62Ax board support and documenation to
u-boot.
The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can
be used in combination with different carrier boards. This module can come
with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs
from the AM62x family.
A development Kit, called phyBOARD-Lyra is used as a carrier board reference
design around the AM62x SoM.
This series depends on the following two patches:
- [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL
https://lists.denx.de/pipermail/u-boot/2024-October/570156.html
- [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
https://lists.denx.de/pipermail/u-boot/2024-November/571543.html
Link: https://lore.kernel.org/r/20241118231606.3161665-1-ggiordano@phytec.com
[trini: Fix warning in board/phytec/common/k3/board.c when
CONFIG_EFI_HAVE_CAPSULE_SUPPORT is not enabled]
Signed-off-by: Tom Rini <trini@konsulko.com>
Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
The module pid4 currently corresponds to the index of the toradex_module
array. If a new pid4 is introduced that does not follow the sequence of
the previous entries, it will create a gap in the array.
To address this, embed pid4 within the toradex_som structure and
implement a function to retrieve the index corresponding to pid4.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Enable raw & on disk capsule updates and provide configs required
for updating MTD devices. Also resync after savedefconfig.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Siddharth Vadapalli <s-vadapalli@ti.com> says:
Hello,
This series adds support for USB DFU boot on TI's AM62A SoC which has
two instances of DWC3 USB Controllers namely USB0 and USB1. The USB0
instance of the USB Controller supports USB DFU boot:
ROM => tiboot3.bin => tispl.bin => u-boot.img
USB DFU Boot requires the USB Controller to be configured for Gadget
mode of operation. Since the USB0 instance of the DWC3 USB Controller
supports both Host and Gadget modes of operation via the Type-C interface
on the AM62A7-SK board, the device-tree specifies the "dr_mode" as "OTG".
However, there is currently no support for dynamically switching the "mode"
from Host to Gadget and vice-versa with the help of a state-machine.
The OTG mode is treated as a separate mode in itself rather than being
treated as an intermediate stage before assuming the Host/Gadget mode.
Due to this, USB DFU boot via the Type-C interface doesn't work as the
USB Controller hasn't been appropriately configured for Device/Gadget
mode of operation. One option is to change the device-tree to specify
"dr_mode" as "peripheral" and force the controller to assume the Device
role. This will imply that the U-Boot device-tree for AM62A diverges
from its Linux counterpart. Therefore, with the intent of keeping the
device-tree uniform across Linux and U-Boot, and at the same time, in
order to enable USB DFU boot in "OTG" mode with the DWC3 Controller,
the first patch in this series sets the "mode" on the basis of the
caller function, rather than using the "dr_mode" property in the
device-tree. There are only two callers of "dwc3_generic_probe()",
each of which clearly specify the expected mode of configuration.
This will enable both Host and Device mode of operation based on the
command executed by the user, thereby truly supporting "OTG"
functionality when the USB Controller supports it.
The second patch in this series adds USB DFU environment for AM62A,
enabling USB DFU Boot and USB DFU flash on AM62A.
In addition to the patches in this series, the following device-tree
changes will be required to test USB DFU on AM62A (bootph-all property
to be added to ensure that USB Controller is present at all stages
for DFU Boot):
https://gist.github.com/Siddharth-Vadapalli-at-TI/53ba02cb0ff4a09c47e920d08247065f
The above device-tree changes will be made to the Linux device-tree,
which shall ensure that the same shall be a part of U-Boot device-tree
eventually.
The USB DFU config fragments for AM62x have been used for enabling
USB DFU boot on AM62a as follows:
R5 => am62ax_evm_r5_defconfig + am62x_r5_usbdfu.config
A53 => am62ax_evm_a53_defconfig + am62x_a53_usbdfu.config
Logs validating USB DFU boot with this series:
https://gist.github.com/Siddharth-Vadapalli-at-TI/daa71da1b0e478a51afea42605fb2d2c
Link: https://lore.kernel.org/r/20241126120322.1760862-1-s-vadapalli@ti.com
Include the TI K3 DFU environment to support DFU Boot and DFU Flash.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
There are only two callers of "dwc3_generic_probe()", namely:
1. dwc3_generic_peripheral_probe()
2. dwc3_generic_host_probe()
Currently, the "mode" is set based on the device-tree node of the
platform device. Also, the DWC3 core doesn't support updating the "mode"
dynamically at runtime if it is set to "OTG", i.e. "OTG" is treated as a
separate mode in itself, rather than being treated as a mode which should
eventually lead to "host"/"peripheral".
Given that the callers of "dwc3_generic_probe()" clarify the expected
"mode" of the USB Controller, use that "mode" instead of the one
specified in the device-tree. This shall allow the USB Controller to
function both as a "Host" and as a "Peripheral" when the "mode" is "otg"
in the device-tree, based on the caller of "dwc3_generic_probe()".
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Enables ESM configs for j721s2 and disables them for AM68 as AM68
includes J721s2 configs by default.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Initialize the 3 instances of SOC ESM & PMIC ESM.
This is needed for watchdog functionality.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
DDR intensive software applications can overwhelm the DSS's access to
the DDR because of their higher frequency DDR accesses. This can cause
flickering in display with certain applications running parallely if
the DSS traffic is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
The C7x and VPAC can overwhelm the DSS's access to the DDR because of
their higher frequency DDR accesses. This can cause flickering in
display with certain edgeAI models running parallely if the DSS traffic
is being serviced through non-RT queue.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
This reverts commit 1fdf53ace1, reversing
changes made to e5aef1bbf1.
I had missed that this caused too much size growth on rcar3_salvator-x.
Signed-off-by: Tom Rini <trini@konsulko.com>
VBE uses a crc8 checksum to verify that the nvdata is valid, so make
sure it is available if VBE is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
With VBE we want to use FIT in all phases of the boot. Add Kconfig
options to support this.
Disable the options for sandbox_vpl for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The variable 'ret' is defined twice, which is not intended. This may
have been a local merge error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2eefeb6d893 ("spl: Report a loader failure")
U-Boot uses ulong for addresses. It is confusing to use uintptr_t in a
few places, since it makes people wonder if the types are compatible.
Change the few occurences in SPL to use ulong
Signed-off-by: Simon Glass <sjg@chromium.org>
The current check looks only at SPL, but TPL or VPL might have a
different setting. Update the condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current check looks only at SPL, but TPL or VPL might have a
different setting. Update the condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a loader returns an error code it is silently ignored. Show a message
to at least provide some feedback to the user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some code has crept in which ignores this parameter. Fix this and add a
little debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: b1307f884a ("fit: Support compression for non-kernel components (e.g. FDT)")
The name of the bootdev device is not that important, particular in SPL.
Save a little code space by using a simpler name.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the best-match feature fails to find something, use the provided
config name as a fallback. The allows SPL to select a suitable config
when best-match is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
The for() loop ends up being in the code even if the log_debug() does
nothing. Add a condition to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sometimes clocks provided to a consumer might not have .set_rate
operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag
set. In that case it's usually possible to find a parent up the tree
which is capable of setting the rate (div, pll, etc). Implement a simple
lookup procedure for such cases, to traverse the clock tree until
.set_rate capable parent is found, and use that parent to actually
change the rate. The search will stop once the first .set_rate capable
clock is found, which is usually enough to handle most cases.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
The env variable "SN" is used to store the serial number on DH electronics
SoMs. New SoMs will use the variable "dh_som_serial_number". To ensure
compatibility, these env variables are synchronized. This is achieved
using callback functions.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
In case there are two variables which each implement env callback
that performs env_set() on the other variable, the callbacks will
call each other recursively until the stack runs out. Prevent such
a recursion from happening.
Example which triggers this behavior:
static int on_foo(...) { env_set("bar", 0); ... }
static int on_bar(...) { env_set("foo", 0); ... }
U_BOOT_ENV_CALLBACK(foo, on_foo);
U_BOOT_ENV_CALLBACK(bar, on_bar);
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Suggested-by: Marek Vasut <marex@denx.de>
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
that contains an additional write-lockable page called ID page, which
is populated with a structure containing ethernet MAC addresses, DH
item number and DH serial number.
Because the write-lockable page is not present on rev.100 i.MX8MP DHCOM
SoM, test whether EEPROM ID page exists by setting up the i2c driver.
There may be multiple EEPROMs with an ID page on this platform, always
use the first one. The evaluation of the EEPROM ID page is done in two
steps. First, the content is read and checked. This is done to cache
the content of the EEPROM ID page. Second, the content is extracted
from the EEPROM buffer by requesting it.
For the ethernet MAC address the i.MX8M Plus DHCOM currently supports
parsing address from multiple sources in the following priority order:
1) U-Boot environment 'ethaddr'/'eth1addr' environment variable
2) SoC OTP fuses
3) On-SoM EEPROM
Add support for parsing the content of this new EEPROM ID page and place
it between 2) and 3) on the priority list. The new entry is 2.5) On-SoM
EEPROM write-lockable page.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
that contains an additional write-lockable page called ID page. Add
aliases eeprom0wl and eeprom1wl for the access to the EEPROM ID
page node.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
iMX91 reuses iMX93 controller and PHY, but with lower speed,
so add new DDR rates for i.MX91.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX91 is a derived from i.MX93, and most clocks could be reused from
i.MX93. Also Update imx93-clock.h to sync with linux next.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.
i.MX9131:
- Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
- A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
- Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
- Support 800Mhz ARM clock
- Support 1.6GT/s DDR and HWFFC at 800MT/s
- No parallel display, eQOS, flexcan
Updated Clock/Container/CPU and etc for i.MX91
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to iMX93 fuse burn plan, all 9x9 parts will have USB2,
ENET1 (FEC), LVDS1, CSI1 and DSI1 disabled. The codes missed ENET1
fuse when detecting 9x9. Although it still can detect 9x9 correctly,
we add the ENET1 fuse to the check to be more accurate.
Fixes: 58da865e27 ("imx9: add i.MX93 variants support")
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Replace '#if DEBUG' with '#ifdef DEBUG', otherwise '#define DEBUG 1'
should be used and conflict with '#define DEBUG' in include/log.h
Fixes: 5fda95fb94 ("imx: imx9: Add TRDC driver for TRDC init")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
have_dual_base is set to false, so the 8ulp_data will be put in BSS
section which conflicts with the area of u-boot.dtb which padded just
after u-boot-nodtb.bin. So move 8ulp_data to data section to avoid
its content being corrupted by dtb.
Fixes: 51cfa66f2c ("gpio: imx_rgpio2p: support one address")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the environment into the board directory and convert header to a
txt file. In addition, this patch also applies following changes:
- Change default nfsroot path to /srv/nfs due to compliance with Linux
FHS 3.0.
- Rename specific variables as stated in the bootstd documentation.
Renamed variables:
fdt_addr => fdt_addr_r
fdt_file => fdtfile
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Bryan Brattlof <bb@ti.com> says:
Hello Everyone!
This small series converts TI's AM65x reference board to use
CONFIG_OF_UPSTREAM and removes the unused device tree files from
arch/arm/dts.
Because it's the last board using a AM65x without enabling OF_UPSTREAM
it allows us to also remove all the SoC FDT files as well and keep a
single version of the SoC's DT files in the dts/upstream directory going
forward.
Link: https://lore.kernel.org/r/20241121-am65x-v1-0-fe87aff1b5fc@ti.com
Rather than rely on manual updates from the arch/arm/dts directory,
enable CONFIG_OF_UPSTREAM to receive automatic device tree updates for
the am65x reference board.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Based on the recommendation from HW team make modifications to
the sequence for more robustness.
- Unlock the PLL registers
- Enable external bypass
- Disable the PLL
- Program pllm and pllf
- Program Ref divider
- Enable other PLL controls like DSM_EN, DAC_EN,etc
- Enable calibration if available
- Enable PLL
- Wait for PLL lock and Calibration lock
- Remove external bypass
Re-write the full sequence from scratch as the previous sequence was way
off and keep it in a single commit for bisectability.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
base is more appropriate for the usage as the variable stores the base
address and seems more accurate w.r.t reg. Change reg to base.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Updated PLL driver sequencing requires us to use udelay in the PLL
driver as there is no poll bit to get the status of operations.
tick-timer(mcu_timer0/main_timer0) setting up the clocks for itself is
something that won't work as the PLL driver will be using udelay and
PLLs are configured during clock probe which would end up in a recursive
probe.
tick-timer being used by K3 devices are configured by ROM and we really
don't need to configure any of the clocks.
Remove the clock dependency from R5 stage as we don't need to setup
clocks for it.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Switch the callback static list from the board configuration variable
CFG_ENV_CALLBACK_LIST_STATIC to Kconfig CONFIG_ENV_CALLBACK_LIST_STATIC.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Those debug() calls might be useful, but beware. They can cause the DDR
controller to hang if we do not run the sequence quickly enough.
They usually are not an issue with upstream U-Boot and the default DDR
config, but they have become troublesome with custom DDR configs.
Drop those debug() statements that shouldn't be present in
time-sensitive code, to avoid anyone else falling into the trap.
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Christian Marangi <ansuelsmth@gmail.com> says:
This series is split in 2 part.
While adapting the LED boot and activity code to the new property
accepted by Rob in dt-schema repository, a big BUG was discovered.
The reason wasn't clear at start and took me some days to figure it
out.
This was triggered by adding a new phandle in the test.dts to
introduce test for the new OPs.
This single addition caused the sandbox CI test to fail in the
dm_test_ofnode_phandle_ot test.
This doesn't make sense as reverting the change made the CI test
to correctly finish. Also moving the uboot node down
after the first phandle (in test.dts the gpio one) also made
the CI test to correctly finish.
A little bit of searching and debugging made me realize the
parse phandle OPs didn't support other.dts at all and they
were still referencing phandle index from test.dts.
(more info in the related commit)
In short the test was broken all along and was working by
pure luck. The first 4 patch address and fix the problem for good.
The other 4 patch expand and address the property change for
LED boot/activity.
Posting in a single series as changes are trivial and just
to speedup review process. (and also because the second
part depends on the first)
All CI tested with azure pipeline.
Link: https://lore.kernel.org/r/20241110115054.2555-1-ansuelsmth@gmail.com
Update test for LED activity and boot to follow new implementation with
property set to the LED node phandle.
Also update a copy-paste error in the function name for the activity
tests and actually enable the test with the DM_TEST macro.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update LED boot/activity to reference by phandle instead of label and
add to period property the "-ms" suffix.
This is a followup request by dt-schema maintainers that required LED
node to be referenced by a phandle to the node instead of indirectly by
the LED label and for timevalue to have a suffix.
While at it generalize the LED node label parsing since the logic is
common for generic LED bind and LED activity/boot.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add test for ofnode options phandle helper and add new property in the
sandbox test dts.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement ofnode_options phandle helper to get an ofnode from a phandle
option in /options/u-boot.
This helper can be useful since new DT yaml usually require to link a
phandle of a node instead of referencing it by name or other indirect
way.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Expand dm_test_ofnode_phandle(_ot) with new ofnode/tree_parse_phandle() op.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement ofnode/tree_parse_phandle() helper as an equivalent of
of_parse_phandle to handle simple single value phandle.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix broken dm_test_ofnode_phandle_ot test. They never actually worked
and were passing test by pure luck by having the same phandle index of
test.dts that coincicentally had #gpio-cells in the same index node.
It was sufficient to add a phandle to test.dts to make the test fail.
To correctly test these feature, make use oif the new OPs oftree to
parse phandle.
For consistency with the dm_test_ofnode_phandle, rework the test and
other.dts to use the same property with the other- prefix to every
node.
Also fix dm_test_ofnode_get_by_phandle_ot by making it more robust and
renaming the phandle property to other-phandle.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement oftree variant of parse_phandle OPs.
There is currently a very hidden and laten BUG with parse_phandle OPs
that doesn't permit the support of multiple DTS in a system. One usage
example if sandbox with the usage of other.dts
The BUG is only present on live scenario where of_... OPs are used and
it's not present when fdt... OPs are used.
This is caused by an assumption made in __of_parse_phandle_with_args,
with the of_find_node_by_phandle call that pass the first arg as NULL.
This makes of_find_node_by_phandle use the default root node of the
system and doesn't permit the usage of alternative tree. This is correct
for normal system and also for the linux kernel where it's assumed a
single device tree.
It's problematic if other device tree needs to be used.
To fix this, introduce __of_root_parse_phandle_with_args to define a
root device tree for of_find_node_by_phandle.
Introduce all the variant OPs for this and in ofnode, the oftree OPs
following how it's done for other OPs with similar task.
For FDT scenario, ofnode_from_fdtdec_phandle_args is reworked to accept
a new variable, node and noffset_to_ofnode is used instead of
offset_to_ofnode. This is required to support multiple FDB blob to
calculate the correct of_offset of the ofnode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Aniket Limaye <a-limaye@ti.com> says:
This series adds OPP_LOW spec data in k3_avs driver and enables a config
option to select the OPP_LOW performance point.
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage (though OPP_LOW voltage is recommended to reduce power
consumption).
The actual OPP voltage for the device is read from the efuse and
updated in k3_avs_probe().
The default j7200 devicetree and k3_avs driver set OPP_NOM spec
frequency and voltage.
In the board init file, if K3_OPP_LOW config is enabled, Check if
OPP_LOW AVS voltage read from efuse is valid and update frequency (A72
and MSMC) and voltage (VDD_CPU) as per the OPP_LOW spec.
[0]: https://www.ti.com/lit/gpn/dra821u (J7200 Datasheet)
Test logs:
https://gist.github.com/aniket-l/328ad93ed60c2419ed7be9f85e6b6075
- With series applied on master and CONFIG_K3_OPP_LOW enabled in
j7200_evm_r5_defconfig
- Logs shown with and without efuse register programmed for OPP_0
(Errors out if OPP_0 not found, programs OPP_LOW spec if found)
- Voltage update verified using 'i2c md 0x4c 0xe' in u-boot
- Frequency update verified using 'k3conf clock dump' in linux
Link: https://lore.kernel.org/r/20241119003617.1871183-1-a-limaye@ti.com
Define new CONFIG_K3_OPP_LOW under arm/mach-k3/r5/Kconfig and add
default value to j7200_evm_r5_defconfig
Signed-off-by: Reid Tonking <reidt@ti.com>
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
The default j7200 devicetree and k3_avs driver set 2GHz/1GHz frequency
for A72/MSMC clks and the OPP_NOM voltage.
J7200 SOCs may support OPP_LOW Operating Performance Point:
1GHz/500MHz clks for A72/MSMC and OPP_LOW AVS voltage read from efuse.
Hence, add a config check in board_init_f() to select OPP_LOW specs:
- Check if OPP_LOW AVS voltage read from efuse is valid.
- Use the device IDs and clock IDs (TISCI docs [0]) to find the A72 and
MSMC clock frequencies in the devicetree.
- Fixup the clock frequencies in devicetree as per OPP_LOW spec.
k3_avs driver programs the OPP_LOW AVS voltage for VDD_CPU through
k3_avs_notify_freq() callback from clk_k3.
[0]: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
k3_avs driver checks opp_ids when probing and overwrites the voltage
values in vd_data for the respective board. The new k3_avs_check_opp()
can be called from board files to check the efuse data and returns 0 if
valid.
Also add the same check in k3_avs_program_voltage() to error out if
the efuse data was not valid.
Signed-off-by: Reid Tonking <reidt@ti.com>
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage (though OPP_LOW voltage is recommended to reduce power
consumption).
Add OPP_LOW frequency->voltage entry to vd_data.
The actual OPP voltage for the device is read from the efuse and
updated in k3_avs_probe().
OPP_NOM corresponds to OPP_1 and OPP_LOW to OPP_0 efuse register
fields, as described in the Datasheet [0]
The register offsets and fields are described in the TRM (5.2.6.1.5
WKUP_VTM_VD_OPPVID_j Register) [1].
[0]: https://www.ti.com/lit/gpn/dra821u (J7200 Datasheet)
[1]: https://www.ti.com/lit/pdf/spruiu1 (J7200 TRM)
Signed-off-by: Reid Tonking <reidt@ti.com>
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Enable AVS support on J784S4 along with regulator.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Add the VTM node to the R5 boot stage so that AVS is correctly
configured for AM68 SK.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Add VTM node to R5 boot stage so that AVS gets correctly configured for
J784S4 EVM and AM69 SK.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Currently in _dm_gpio_set_flags() when set_flags ops is not implemented
direction_output()/_input() is used, but pull up/down is not supported by
these ops.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Avoid crashing U-Boot when the GPIO controller for a button is disabled
or failed to probe. We also need to check the priv data for each button
since even if a button fails to probe it will still be polled by the
core code.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.
Also enable the feature by default for PHYCORE_AM62X_R5.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The ST M24256E behaves as a regular M24C256, except for the E variant
which uses up another I2C address for Additional Write lockable page.
This page is 64 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C256 area separately as that is on separate
I2C address from this page.
Unlike M24C32-D and M24C64-D, this part is specifically ST and does not
have any comparable M24* counterparts from other vendors, hence the st,
vendor prefix. Furthermore, the part name is M24256E without C between
the 24 and 256, this is not a typo. Finally, there is M24C256-D part,
which does contain 32 Bytes long Additional Write lockable page, which
is a different part and not supported by this patch.
Datasheet: https://www.st.com/resource/en/datasheet/m24256e-f.pdf
From Linux kernel commit:
339cb28b9ee6 ("eeprom: at24: add ST M24256E Additional Write lockable page support")
Signed-off-by: Marek Vasut <marex@denx.de>
Given that ARCH_SUNXI already implies that USB_GADGET should be enable,
we should also imply USB being enabled.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Given that OF_LIBFDT is library functionality, the feature of EFI_LOADER
needs to select OF_LIBFDT rather than depend on it being already
enabled.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
It is not the case that we can only pick ASPEED_AST2500 if DM_RESET
is enabled, but rather choosing ASPEED_AST2500 means we must select
DM_RESET.
Signed-off-by: Tom Rini <trini@konsulko.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/23707
With this pull request support for the EFI_HTTP_PROTOCOL and
EFI_IP4_CONFIG2 protocols are added. This allows EFI applications
to load files via HTTP.
UEFI:
add efi_dp_from_ipv4 function
add efi_net_set_addr, efi_net_get_addr functions
add support for HTTP device path
set EFI bootdevice device path to HTTP when loaded from wget
add support to send http requests and parse http headers
provide EFI_IP4_CONFIG2_PROTOCOL
provide EFI_HTTP_PROTOCOL
support IPv4() in device path to text protocol
provide unit tests for the HTTP and IPv4 Config2 protocols
Network:
zero terminate string with headers in wget_fill_info()
zero terminate string with headers in wget_lwip_fill_info()
pass port and server_name via wget_ctx in lwIP network stack
let wget_with_dns work with dns disabled
Others:
Add HTTP and IPV4 Config II protocols to UUID library functions.
Add a test for the EFI_IP4_CONFIG2_PROTOCOL. The test sets the ip
policy to static, adds an ip address, and then reads the current
ip address and checks for it to be the same as the one that was set.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Add an EFI HTTP driver. This commit implements the
EFI_HTTP_PROTOCOL and the EFI_HTTP_SERVICE_BINDING_PROTOCOL.
The latter is attached to the handle of th efi network
device. This is the same handle where snp, pxe, and ipconfig
are attached to.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Add an implementation of the EFI_IP4_CONFIG2_PROTOCOL. The protocol
is attached to the handle of the efi network device. This is the same
handle where snp and pxe are attached to.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Add network-stack agnostic way to send an http request and
parse http headers from efi drivers. This uses wget as a
backend and communicates with it via efi_wget_info.
The function efi_net_do_request allocates a buffer on behalf of an
efi application using efi_alloc and passes it to wget to receive
the data. If the method is GET and the buffer is too small, it
re-allocates the buffer based on the last received Content-Length
header and tries again. If the method is HEAD it just issues one
request. So issuing a HEAD request (to update Content-Length) and
then a GET request is preferred but not required.
The function efi_net_parse_headers parses a raw buffer containing
an http header into an array of EFI specific 'http_header' structs.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Set the device path of the efi boot device to an HTTP device path
(as formed by efi_dp_from_http) when the next boot stage is loaded
using wget (i.e., when wget is used with wget_info.set_bootdev=1).
When loaded from HTTP, the device path should account for it so that
the next boot stage is aware (e.g. grub only loads its http stack if
it itself was loaded from http, and it checks this from its device path).
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add efi_dp_from_http to form a device path from HTTP. The
device path is the concatenation of the device path returned
by efi_dp_from_ipv4 together with an URI node and an END node.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add the functions efi_net_set_addr and efi_net_get_addr to set
and get the ip address from efi code in a network agnostic way.
This could also go in net_common, or be compiled conditionally
for each network stack.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This was marked as TODO in the code:
- Enable use of wget_with_dns even if CMD_DNS is disabled if
the given uri has the ip address for the http server.
- Move the check for CMD_DNS inside wget_with_dns.
- Rename wget_with_dns to wget_do_request
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
This patch comes as a companion to the same patch but for the legacy
net stack. Commit 1327c2a8d6 ("net/lwip: wget: integrate struct wget_info
into wget code") introduced function wget_fill_info() which retrieves
the headers from the HTTP server response. As we want to parse the
string in later patches we need to ensure that it is NUL terminated.
We must further check that wget_info->headers in not NULL.
Otherwise a crash occurs.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Commit 2dd076a9c1 ("net: wget: integrate struct wget_info into legacy
wget code") introduced function wget_fill_info() which retrieves the
headers from the HTTP server response. As we want to parse the string in
later patches we need to ensure that it is NUL terminated.
We must further check that wget_info->headers in not NULL.
Otherwise a crash occurs.
Fixes: 2dd076a9c1 ("net: wget: integrate struct wget_info into legacy wget code")
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Commit 5907c81 ("net: lwip: Enable https:// support for wget") was not
correctly rebased on top of the changes introduced by Commit 6cc4d04
("net/lwip: wget: put server_name and port into wget_ctx") in next.
This commit re-applies a couple of lines from 6cc4d04.
Fixes: Commit 5907c81 ("net: lwip: Enable https:// support for wget")
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
AMD/Xilinx changes for v2025.04-rc1
binman:
- Separate binman description from main DT
zynqmp:
- Enable binman for ZynqMP platforms
- DT sync with Linux v6.12
- Update usb5744 hub for SOMs
common:
- Drop SPL_FIT_GENERATOR support
versal2
- Enable OPTEE layers
ospi:
- Refactor the flash reset functionality
pytest:
- Fix tcminit mode handling
Tom Rini <trini@konsulko.com> says:
Hey all,
This is picking up Simon's v5 of the above-named series and making a few
more changes so that the follow-up series I have leads to arm64 being
supported for almost all jobs. To quote Simon's cover letter:
All gitlab runners are currently amd64 machines. This series attempts to
create a docker image which can also support arm64 so that sandbox tests
can be run on it.
The TARGET_... environment variables for grub could perhaps be adjusted,
using the new variables, but I have not done that for now.
Adding to what Simon said, we now build grub for all architectures as
the reason to install it was to be able to use the binaries in QEMU.
That won't provide us with amd64 binaries on arm64 hosts so we can't use
that shortcut anymore.
Link: https://lore.kernel.org/r/20241127172247.1488685-1-trini@konsulko.com
Refactor the code to support downloading toolchains for arm64 as well as
x86_64
There doesn't seem to be an xtensa toolchain for arm64 at the same
location, so download that only on x86
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fix a warning due to the syntax used for PYTHONPATH:
LegacyKeyValueFormat: "ENV key=value" should be used instead of
legacy "ENV key value" format (line 304)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
We no longer need to install libc6-i386 so we can drop that. Switch to
installing linux-image-generic as that will be available on all hosts,
to provide the /boot/vmlinu* file that's requires for various tools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add instructions on how to build the file for multiple architectures.
Add a message indicating what is happening.
Update the documentation as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Instead of deleting /var/lib/apt/lists after each relevant RUN line, use
a cache mount as is the current best practices.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
For consistency now, and future ease of testing with non-amd64 hosts,
build grub for all architectures rather than relying on host binaries
for i386/x86_64.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The current release of grub is 2.12 and it will be good to pick this up
now so that we can update other parts of our stack.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
We had a few places that were not using "make -j$(nproc)" but instead
just plain "make" and so slowing down the overall build.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Add in the x86_64 toolchain, but do not enforce using it for sandbox.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Since char is unsigned on arm64, this test currently fails. It seems
better to use unsigned anyway, since 0xff is written into the string at
the start. Update the terminator-assert to use a character instead of a
byte.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Changes in v6:
- Re-introduce
Changes in v2:
- Use '\0' instead of 0
test/print_ut.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
The cache-flush function is incorrect which causes a crash in the
remoteproc tests with arm64.
Fix both problems by using map_sysmem() to convert an address to a
pointer and map_to_sysmem() to convert a pointer to an address.
Also update the image-loader's cache-flushing logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 3286d223fd ("sandbox: implement invalidate_icache_all()")
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Changes in v6:
- Re-introduce
Changes in v2:
- Drop message about EFI_LOADER
arch/sandbox/cpu/cache.c | 8 +++++++-
drivers/remoteproc/rproc-elf-loader.c | 18 +++++++++++-------
lib/efi_loader/efi_image_loader.c | 3 ++-
3 files changed, 20 insertions(+), 9 deletions(-)
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When a timeout occurs while executing a command a 'Boot fail' message is
written and testing is stopped. The user is left in the dark about the
failure cause.
! _pytest.outcomes.Exit: Boot fail: Marking connection bad - no other tests will run !
Add the executed command to the message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When a timeout occurs while executing a command a 'Lab failure' message is
written and testing is stopped. The user is left in the dark about the
failure cause.
! _pytest.outcomes.Exit: Lab failure: Marking connection bad - no other tests will run !
Add the word 'Timeout' and the executed command to the message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a small utility for displaying some information about U-Boot and the
hardware it's running on in a similar fashion to the popular neofetch
tool for Linux [1].
While the output is meant to be useful, it should also be pleasing to
look at and perhaps entertaining. The ufetch command aims to bring this
to U-Boot, featuring a colorful ASCII art version of the U-Boot logo.
[1]: https://en.wikipedia.org/wiki/Neofetch
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # vim3
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8560-QRD
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We don't need the fallback anymore. Remove the code which uses these
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
We don't need the fallback anymore. As a first step to removing it,
drop the try...except clauses and unindent the code.
This produces a large diff but there are no other code changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Like for test_fs, no need to mess with loop mounts.
Tweaks to reduce diff (keep mnt variable):
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a parameter to indicate the size of the image to build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
Since no mounting happens anymore, rename the "mnt"
directory to "scratch" and the related variables.
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no need to mount the filesystem on the host side.
All filesystem tools offer some way to fill the fs without mounting.
So, create the content on the host side, create and fill the fs
without mounting.
No more sudo or guestmount needed.
This new approach works because the tests don't care about user IDs
and no device files are needed.
If user IDs start to matter it's still possible to use wrapper
tools like fakeroot in future while filling the fs.
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
As the flash reset is handled in spi nor core, removing the
flash reset functionality. As the configuration like tristate
and hysterisis need to be enabled by the cdo. Handle the flash
reset only for mini u-boot case.
Rename the "cadence_qspi_versal_flash_reset" to generic name
"cadence_qspi_flash_reset" as this can be used by other platforms
as well.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241108063537.13180-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Always probing pmecc in the generic nand controller probe function and
bailing out if pmecc is missing, prevents the driver to be usable for
SoCs which do not have a pmecc hardware ecc engine like older sam9 SoCs,
for example at91sam9g20. Tested on sam9x60 that the call, which the
comment was moved to, is sufficient to probe the pmecc.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
The bad CRC error message has transposed characters, which render the
output useless:
"bad CRC at record 213: #08x, not #08x" instead of
"bad CRC at record 213: #00000000, not #4be31f4d"
Fix the error message.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
Reviewed-by: John Ogness <john.ogness@linutronix.de>
A NULL pointer argument to %s causes a NULL pointer dereference in the
fixed width numerical printout code, since p is overwritten with NULL.
In case of %s width is 0. Check width before dereferencing the pointer.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
Reviewed-by: John Ogness <john.ogness@linutronix.de>
There is necessary to do some steps to compose boot images. These steps
were in scripts in layers for a while. That's why introduce description via
binman to simplify wiring and remove all scripting around.
This should make sure that everybody is up2date with the latest versions.
The first step is to create fit image with DTBs with descriptions in
configuration node which is written as regular expression to match all SOM
versions.
Description is there for k24 and k26 in spite of low level psu_init
configuration is different. The reason is that it goes to u-boot.itb image
which is the same for k24 and k26.
u-boot.itb is another image which is generated. It is normally generated
via arch/arm/mach-zynqmp/mkimage_fit_atf.sh but this script is supposed to
be deprecated.
FIT image by purpose is using 64bit addresses to have default option to
move images to high DDR (above 4GB). TF-A and TEE are optional components
but in the most cases TF-A is present all the time and TEE(OP-TEE) is used
by some configurations too.
3rd generated image is boot.bin with updated user field which contains
version number. This image can be used with updated Image Selector
which supports A/B update mechanisms with rollback protection.
4th image is image.bin which binary file which contains boot.bin and
u-boot.itb together and can be programmed via origin Image Selector.
This image can be also used for creating one capsule which contains both
boot images (in SPL boot flow).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/35bc47a4a4799c5f5dbea56a45340a2810538330.1730452668.git.michal.simek@amd.com
We don't need the fallback anymore. Remove the code which uses these
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
We don't need the fallback anymore. As a first step to removing it,
drop the try...except clauses and unindent the code.
This produces a large diff but there are no other code changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Like for test_fs, no need to mess with loop mounts.
Signed-off-by: Richard Weinberger <richard@nod.at>
Tweaks to reduce diff (keep mnt variable):
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a parameter to indicate the size of the image to build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Richard Weinberger <richard@nod.at>
Since no mounting happens anymore, rename the "mnt"
directory to "scratch" and the related variables.
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no need to mount the filesystem on the host side.
All filesystem tools offer some way to fill the fs without mounting.
So, create the content on the host side, create and fill the fs
without mounting.
No more sudo or guestmount needed.
This new approach works because the tests don't care about user IDs
and no device files are needed.
If user IDs start to matter it's still possible to use wrapper
tools like fakeroot in future while filling the fs.
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/23573
Android:
- bootstd: Implement bootimage v2 support
- bootstd: Support non-A/B in bootmeth_android
- Migrate VIM3 and VIM3L to use bootmeth_android
- bootstd: Additional test for bootimage v2
- bootstd: Optimize load time when reading partitions
The current implementation is reading the whole partition for boot and
vendor_boot image which can be long following the size of the
partition or the time to read blocks (driver/SoC specific).
For example with mediatek mt8365 EVK board, we have a 64MiB boot
partition and the boot image flashed in this partition is only 42MiB.
It takes ~8-9 secs to read the boot partition.
Instead we can retrieved the boot image and vendor boot image size
with these new functions:
- android_image_get_bootimg_size
- android_image_get_vendor_bootimg_size
Use these information and read only the necessary.
By doing this with mt8365 EVK board, we read boot image in ~5 secs.
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20241121-bootmeth-android-part-sizes-v1-1-25760bbd0f08@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Rename actual android bootmethod test to specify it's for boot image
version 4.
Add a unit test for testing the Android bootmethod with boot image
version 2.
This requires another mmc image (mmc8) to contain the following
partitions:
- misc: contains the Bootloader Control Block (BCB)
- boot_a: contains a fake generic kernel image
we can test this with:
$ ./test/py/test.py --bd sandbox --build -k test_ut # build the mmc8.img
$ ./test/py/test.py --bd sandbox --build -k bootflow_android
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20241126-adnroidv2-v4-5-11636106dc69@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The phyCORE-i.MX 93 is available in various variants (e.g. different ram
sizes, eMMC HS400 yes/no). Enable hardware introspection for the
imx93-phyboard-segin_defconfig, so that during startup the SOM module
variant can be detected, and the hardware can be configured accordingly.
The resulting SPL and u-boot binary shall able to boot each
phyCORE-i.MX 93 module variant on each carrier board. Finally rename
imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight
its SOM scope.
Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip
The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.
Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
The phyCORE-i.MX 93 is available with a 1GB ram chip or a 2GB ram chip.
Add the ram timings for the 2GB chip, in form of a diff compared
to the existing LPDDR4X 1GB timings. With that, the SPL can select the
appropriate timings at startup.
Update also the 1GB ram timings with new version of the DDR Tool.
Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
The signal integrity test generates pattern on DDR lines
for certification. The signals must be as fast as possible
and unidirectional.
The test is required from our HW team. The available
u-boot memory test doesn't full fill the our requirements.
The test is planed to be used in all new siemens boards.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Add siemens specific memory test. Enable it through Kconfig option
SPL_CMT. The test is required from our HW team. It runs over
temperature during many days:
* must run indefinitively through the *whole* DDR area,
so we cannot use linux memtest for example.
* must write/read/check all values
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
The eeprom contains the information on which module
we are running, so read it from the eeprom and print
it on the console.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Get the memory region information from system controller to reduce the
number of platform specific headers. We were aligned on NXP mek board
implementation. This need at least 1 header per memory configuration.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Add the HW version read directly from EEPROM.
EEPROM chip data structure is now in a .h file common to draco
and capricorn.
Therefore move out the definitions in draco board to siemens
common place.
From: Alessandro Zini <alessandro.zini@siemens.com>
Signed-off-by: Alessandro Zini <alessandro.zini@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
with newest SCFW build_info() works now, so call it
from checkboard() now.
As we only use uart2 as console, do not init uart0.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
make savedefconfig and add SCU_WDT and fix environment
offsets, as since silicon c0 the boot container takes place
at offset 0 and so the u-boot-env must be moved outside of
the boot container area.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Boards which use DCD data in SCFW can drop SPL.
We tried in our mainline rework to use this approach
too as other imx8qxp boards do in mainline. But we
failed ... it was a hard way to understand the
reason!
We cannot use DCD image in container as the SCFW
from siemens, does the RAM init on boot itself!
Siemens SCFW reads the RAM config from i2c eeprom and
dependent on this settings, initializes the RAM.
Adding DCD data to the bootcontainer will result in
hang of the SCFW, also DCD data in container image is
static which do not fit our needs.
So we must drop DCD data image, and this has the side
effect that we need SPL, as the task which loads the images
from the container only loads the images to addresses,
and if executed bit is set, starts them.
As now RAM is not initialized from it, and there is no
option to "wait until SCFW has setup RAM", we can only
load SPL into internal RAM at this point, as than SPL
and SCFW boot parallel.
The SPL itself then uses the SCU API to communicate
with the SCFW and it seems that SCFW only responds to
this API requests when RAM setup is already done by the
SCFW, which has a side-effect of a "sync" for the RAM
setup is done by SCFW!
We checked if SPL is always save in accessing RAM for
loading images to it! For tests, we added in our RAM
init part in the SCFW long delays (10 seconds and more)
as we thought there is such a sync missing, and we can
break the board through delaying RAM setup... but we
did not managed to fail booting U-Boot from SPL!
Signed-off-by: Heiko Schocher <hs@denx.de>
current generated flash.bin image does not longer
boot on cxg3 board.
Rename bootph-pre-ram to bootph-all so flash.bin
boots again!
Add u-boot specific change (add bootph-all property)
in A35_0 node to imx8qxp-capricorn-u-boot.dtsi
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
We have many HW with capricorn i.MX8X boards. The difference in u-boot is
at all by the display of the LEDs.
* put upstream a reference project & board for DT and defconfig
* use the capricorn prefix outside the board/siemens/capricorn folder
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
imx8qxp based boards which use SPL drop error when
calling make all:
"""
Writing image to './flash.bin'
Node '/binman/imx-boot/spl': GetData: size 0x0
Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
Node '/binman/imx-boot': GetData: 1 entries, total size 0x0
Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
Wrote 0x0 bytes
Image 'imx-boot' is missing external blobs and is non-functional: spl
/binman/imx-boot/spl (spl.bin):
Missing blob
Some images are invalid
"""
Guard creation of flash.bin with CONFIG_XPL_BUILD option.
Signed-off-by: Heiko Schocher <hs@denx.de>
Fixes: c9713c1551 ("imx8-u-boot: Fix SPL guard option")
when building U-Boot on imx8qxp and the board port uses
SPL, U-boot build shows
WARNING '.../spl/u-boot-spl.bin' not found, resulting binary is not-functional
This is because U-Boot binary is build first and Makefile
calls script imx_cntr_image.sh which checks if files
exists... but of course as spl is not yet build the
file `spl/u-boot-spl.bin` does not exist yet, so prevent
this warning.
Signed-off-by: Heiko Schocher <hs@denx.de>
Improve error message "header tag mismatched"
Add filename to error message to see, which file
is wrong.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
probing on capricorn board (imx8qxp based) brings:
Can't find FEC0 clk rate: -19
Cause is that when probing fec_mxc driver, fec_mii_setspeed()
is called which calls fec_get_clk_rate().
fec_mii_setspeed() calls fec_get_clk_rate with NULL pointer
for udev and so as in IMX8QXP case CLK_CCF is enabled
udev gets searched with:
uclass_get_device_by_seq(UCLASS_ETH, idx, &dev);
but we do not have yet a UCLASS_ETH ! as we just probing it!
Prevent this by passing udev to fec_get_clk_rate()
Signed-off-by: Heiko Schocher <hs@denx.de>
Driver for a PMIC watchdog timer controlled via Siemens SCU firmware
extensions. Only useful on some Siemens i.MX8-based platforms as
special SCFW is needed which provides the needed SCU API.
Signed-off-by: Andrej Valek <andrej.valek@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is used by some boards in U-Boot and is a convenient way to deal
with common settings where using a Kconfig files is not desirable.
Detect #include files and process them as if they were part of the
original file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/30
This code is tested by test_scan_defconfigs() but it is useful to have
some specific tests for the KconfigScanner's operation in U-Boot. Add
a test which checks that the values are obtained correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/23430
- Prepare for implementing the EFI_HTTP_PROTOCOL:
- Make wget functionality callable even if the wget command is not
built (add CONFIG_WGET symbol).
- Ensure that wget_with_dns() works the same with the old network
stack and with lwIP.
- Put server_name and port into wget_ctx.
- Integrate struct wget_info into wget code.
- Move ip_to_string to lib/net_utils.c
The function string_to_ip is already in net_utils, which is
compiled unconditionally, but ip_to_string is currently only
accessible if the legacy network stack is selected. This
commit puts ip_to_string in net_utils.c and removes it from the
legacy network code.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently, MMC test runs on default mmc modes, adding a provision to
support multiple mmc modes through user defined parameters.
Signed-off-by: Love Kumar <love.kumar@amd.com>
'usb part' command shows the partition maps and shows the partition type
by displaying number such as 0c, 83 etc. Observed that ext2 and ext4
partitions shows the same number, i.e, 83, so, using the fstype command
to distiniguish between ext2 and ext4 partitions.
Signed-off-by: Love Kumar <love.kumar@amd.com>
'mmc part' command shows the partition maps and shows the partition type
by displaying number such as 0c, 83 etc. Observed that ext2 and ext4
partitions shows the same number, i.e, 83, so, using the fstype command
to distiniguish between ext2 and ext4 partitions.
Signed-off-by: Love Kumar <love.kumar@amd.com>
The lowlevel debug with CONFIG_DEBUG_UART has printascii for string
print, and no need to convert to use printch now.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Usually ARMv8 platforms allow unaligned access for Normal memory. But
some chips might not allow it by default, having SCTLR.A bit set to 1
before U-Boot execution. One such example is Exynos850 SoC. As
allow_unaligned() is not implemented for ARMv8 at the moment, its __weak
implementation is used, which does nothing. That might lead to unaligned
access abort, for example when running EFI selftest. Fix that by
implementing allow_unaligned() for ARMv8.
The issue was found when running EFI selftest on E850-96 board
(Exynos850 based):
=> bootefi selftest $fdtcontroladdr
...
Executing 'HII database protocols'
"Synchronous Abort" handler, esr 0x96000021, far 0xbaac0991
...
resetting ...
Unaligned abort happens in u16_strnlen(), which is called from
efi_hii_sibt_string_ucs2_block_next():
u16_strlen(blk->string_text)
where 'blk' type is struct efi_hii_sibt_string_ucs2_block. Because this
struct is packed, doing "->string_text" makes 'blk' address incremented
by 1 byte, which makes it unaligned. Although allow_unaligned() was
called in efi_init_early() before EFI selftest execution, it wasn't
implemented for ARMv8 CPUs, so data abort happened.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Some of the bootm tests rely on state that is assumed to be
correct but is changed by the tests. This means that running
'ut bootm' twice will result in failures on the second run
as the state left by the first run is not what the tests
expect.
Fix this by ensuring the state is as expected by explicitly
setting that state.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
We are about to add a large number of new entries. Update the prefix to
be a little shorter.
For SMBIOS items, use SYSID_SM_ (for System Management) which is enough
to distinguish it. For now at least, it seems that most items will be
for SMBIOS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Raymond Mao <raymond.mao@linaro.org>
When compiling with X86EMU_DEBUG, the compiler complains that debug.c misses
two include files. Fix that.
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
Currently the PM_{inp,outp}* macros are completely broken on non-x86 architectures,
because they will essentially access random memory locations if called (and produce
a lot of rightful compilation warnings too). For now, replace those macros with
warnings (until the code is fixed), so the user at least knows that the emulator
attempted to access some x86 I/O port.
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
These fields are currently set on exactly two platforms today, and used
by only one of them. Update pic32mzdask to use CFG_SYS_SRAM* in the one
location it needs it and otherwise drop this field from the bd_info
struct.
Signed-off-by: Tom Rini <trini@konsulko.com>
We don't have audio support in U-Boot, but we do have boot menus. Add an
option to re-map the volume and power buttons to up/down/enter so that
in situations where these are the only available buttons (such as on
mobile phones) it's still possible to navigate menus built in U-Boot or
an external EFI app like GRUB or systemd-boot.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Each wget request now fills the struct wget_info. Also, the
efi bootdevice is now set conditionally to the set_bootdevice
variable in wget_info and a buffer size check is performed if
check_buffer_size is set.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Currently server_name and port are local variables in wget_loop.
This commit puts them inside ctx, so that they are accessible
from the http callbacks.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
There are two wget_with_dns functions, one in the legacy network
stack and one in lwip, but the return values are not compatible.
This commit modifies the legacy version of wget_with_dns so that
the return values are compatible: 0 on success, otherwise a negative
error. This way wget_with_dns can be called in a network stack
agnostic way.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Each wget request now fills the struct wget_info. The efi
bootdevice is now set conditionally to the set_bootdevice
variable in wget_info, and the same holds for lmb memory check.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Declare and define a global default struct wget_http_info
and an interface to issue wget requests providing a custom
struct wget_http_info. This code is common to legacy wget
and lwip wget. The idea is that the command wget should use
the default wget_http_info and other internal u-boot code
can call wget_request with their own wget_http_info struct.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
The struct wget_http_info exposes the HTTP information of the last HTTP
request issued by wget, and it controls whether the efi bootdevice is set,
and whether the buffer size needs to be checked (lwip stack only). This
information is otherwise discarded. The wget_http_info struct can be used
by HTTP drivers to have more control over HTTP requests.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Let net/wget.c and net/lwip/wget.c depend on CONFIG_WGET, and
cmd/wget.c depend on CONFIG_CMD_WGET. This way, the wget code
can be used regardless of whether the wget command is available.
Signed-off-by: Adriano Cordova <adrianox@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rasmus Villemoes <ravi@prevas.dk> says:
Doing bringup of a board, part of my bootstrap logic is in U-Boot. So
when tweaking that logic, I was bitten by a previous completed
bootstrap having left a copy of the environment on the device, which
was imported and thus overrided the new logic.
So I thought, "ok, I'll just make sure to put 'env default -a' as the
first part of the bootstrap logic so I'm not bitten again". Alas, my
logic also relies on certain variables that are set by C code
(e.g. for detecting board variant), and doing 'env default -a' also
eliminates those.
Looking around, the hashtab code already supports a flag that does
exactly what I need, and exposing that is (morally) a one-liner.
Link: https://lore.kernel.org/r/20241030213404.2894247-1-ravi@prevas.dk
Check that the new -k flag works as expected.
This also adds a test of the -a flag, which was previously missing,
and as the comment says, perhaps for a good reason. At least now we
have a test for it in combination with -k (and -f, because the ethaddr
variables otherwise cause complaining).
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Instead of testing the same expected behaviour for both
non_default_varX, test that when var1 is not in the default env but is
mentioned in the "env default" cmdline, it is removed, while var2 is
untouched.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
It can be useful to set all variables defined in the default
environment to the value they have there, but without removing
variables that are only defined at runtime. This can sort-of be done
today, by using the "env default var1 var2 ..." variant, but that
requires listing all variables defined in the default
environment. It's much more convenient to be able to say
env default -k -a
The -k flag is also meaningful in the other case: If var1 is not
defined in the default environment, but var2 is,
env default var1 var2
would emit a warning about var1 not being in the default env and thus
being deleted. With -k, there's no warning, and var1 is kept as-is.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
For Amlogic A1, we have to use dtsi from dts/upstream folder.
The only difference between this two files is the added cpu temperature
node definition in upstream version and additional assigned-clock for
USB. This patch is tested on a device with A113L SoC (AD401-like) and
everything is okay.
So, we can remove legacy arch/arm/dts/meson-a1.dtsi file.
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Link: https://lore.kernel.org/r/20241112125836.3239832-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Some files were not shown because too many files have changed in this diff
Show More
Reference in New Issue
Block a user
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.
