Prepare v2016.09.01

Signed-off-by: Tom Rini <trini@konsulko.com>

.azure-pipelines.yml

@@ -1,423 +0,0 @@
-variables:
-  windows_vm: vs2015-win2012r2
-  ubuntu_vm: ubuntu-18.04
-  ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20191010-20Oct2019
-  # Add '-u 0' options for Azure pipelines, otherwise we get "permission
-  # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
-  # since our $(ci_runner_image) user is not root.
-  container_option: -u 0
-  work_dir: /u
-
-jobs:
-  - job: tools_only_windows
-    displayName: 'Ensure host tools build for Windows'
-    pool:
-      vmImage: $(windows_vm)
-    strategy:
-      matrix:
-        i686:
-          MSYS_DIR: msys32
-          BASE_REPO: msys2-ci-base-i686
-        x86_64:
-          MSYS_DIR: msys64
-          BASE_REPO: msys2-ci-base
-    steps:
-      - script: |
-          git clone https://github.com/msys2/$(BASE_REPO).git %CD:~0,2%\$(MSYS_DIR)
-        displayName: 'Install MSYS2'
-      - script: |
-          set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
-          %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm -Syyuu
-        displayName: 'Update MSYS2'
-      - script: |
-          set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
-          %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm --needed -S make gcc bison diffutils openssl-devel
-        displayName: 'Install Toolchain'
-      - script: |
-          set PATH=C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
-          echo make tools-only_defconfig tools-only NO_SDL=1 > build-tools.sh
-          %CD:~0,2%\$(MSYS_DIR)\usr\bin\bash -lc "bash build-tools.sh"
-        displayName: 'Build Host Tools'
-        env:
-          # Tell MSYS2 we need a POSIX emulation layer
-          MSYSTEM: MSYS
-          # Tell MSYS2 not to ‘cd’ our startup directory to HOME
-          CHERE_INVOKING: yes
-
-  - job: cppcheck
-    displayName: 'Static code analysis with cppcheck'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: cppcheck --force --quiet --inline-suppr .
-
-  - job: todo
-    displayName: 'Search for TODO within source tree'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: grep -r TODO .
-      - script: grep -r FIXME .
-      - script: grep -r HACK . | grep -v HACKKIT
-
-  - job: sloccount
-    displayName: 'Some statistics about the code base'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: sloccount .
-
-  - job: maintainers
-    displayName: 'Ensure all configs have MAINTAINERS entries'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: |
-          if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
-
-  - job: tools_only
-    displayName: 'Ensure host tools build'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: |
-          make tools-only_config tools-only -j$(nproc)
-
-  - job: envtools
-    displayName: 'Ensure env tools build'
-    pool:
-      vmImage: $(ubuntu_vm)
-    container:
-      image: $(ci_runner_image)
-      options: $(container_option)
-    steps:
-      - script: |
-          make tools-only_config envtools -j$(nproc)
-
-  - job: utils
-    displayName: 'Run binman, buildman, dtoc and patman testsuites'
-    pool:
-      vmImage: $(ubuntu_vm)
-    steps:
-      - script: |
-          cat << EOF > build.sh
-          set -ex
-          cd ${WORK_DIR}
-          EOF
-          cat << "EOF" >> build.sh
-          git config --global user.name "Azure Pipelines"
-          git config --global user.email bmeng.cn@gmail.com
-          export USER=azure
-          virtualenv /tmp/venv
-          . /tmp/venv/bin/activate
-          pip install pyelftools
-          export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl
-          export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
-          export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
-          ./tools/buildman/buildman -o /tmp -P sandbox_spl
-          ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
-          ./tools/buildman/buildman -t
-          ./tools/dtoc/dtoc -t
-          ./tools/patman/patman --test
-          EOF
-          cat build.sh
-          # We cannot use "container" like other jobs above, as buildman
-          # seems to hang forever with pre-configured "container" environment
-          docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh
-
-  - job: test_py
-    displayName: 'test.py'
-    pool:
-      vmImage: $(ubuntu_vm)
-    strategy:
-      matrix:
-        sandbox:
-          TEST_PY_BD: "sandbox"
-          BUILDMAN: "^sandbox$"
-        sandbox_clang:
-          TEST_PY_BD: "sandbox"
-          BUILDMAN: "^sandbox$"
-          OVERRIDE: "-O clang-7"
-        sandbox_spl:
-          TEST_PY_BD: "sandbox_spl"
-          TEST_PY_TEST_SPEC: "test_ofplatdata"
-          BUILDMAN: "^sandbox_spl$"
-        sandbox_flattree:
-          TEST_PY_BD: "sandbox_flattree"
-          BUILDMAN: "^sandbox_flattree$"
-        evb_ast2500:
-          TEST_PY_BD: "evb-ast2500"
-          TEST_PY_ID: "--id qemu"
-          BUILDMAN: "^evb-ast2500$"
-        vexpress_ca15_tc2:
-          TEST_PY_BD: "vexpress_ca15_tc2"
-          TEST_PY_ID: "--id qemu"
-          BUILDMAN: "^vexpress_ca15_tc2$"
-        vexpress_ca9x4:
-          TEST_PY_BD: "vexpress_ca9x4"
-          TEST_PY_ID: "--id qemu"
-          BUILDMAN: "^vexpress_ca9x4$"
-        integratorcp_cm926ejs:
-          TEST_PY_BD: "integratorcp_cm926ejs"
-          TEST_PY_ID: "--id qemu"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^integratorcp_cm926ejs$"
-        qemu_arm:
-          TEST_PY_BD: "qemu_arm"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_arm$"
-        qemu_arm64:
-          TEST_PY_BD: "qemu_arm64"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_arm64$"
-        qemu_mips:
-          TEST_PY_BD: "qemu_mips"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_mips$"
-        qemu_mipsel:
-          TEST_PY_BD: "qemu_mipsel"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_mipsel$"
-        qemu_mips64:
-          TEST_PY_BD: "qemu_mips64"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_mips64$"
-        qemu_mips64el:
-          TEST_PY_BD: "qemu_mips64el"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu_mips64el$"
-        qemu_ppce500:
-          TEST_PY_BD: "qemu-ppce500"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu-ppce500$"
-        qemu_riscv64:
-          TEST_PY_BD: "qemu-riscv64"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu-riscv64$"
-        qemu_x86:
-          TEST_PY_BD: "qemu-x86"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu-x86$"
-        qemu_x86_64:
-          TEST_PY_BD: "qemu-x86_64"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^qemu-x86_64$"
-        zynq_zc702:
-          TEST_PY_BD: "zynq_zc702"
-          TEST_PY_ID: "--id qemu"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^zynq_zc702$"
-        xilinx_versal_virt:
-          TEST_PY_BD: "xilinx_versal_virt"
-          TEST_PY_ID: "--id qemu"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^xilinx_versal_virt$"
-        xtfpga:
-          TEST_PY_BD: "xtfpga"
-          TEST_PY_ID: "--id qemu"
-          TEST_PY_TEST_SPEC: "not sleep"
-          BUILDMAN: "^xtfpga$"
-    steps:
-      - script: |
-          cat << EOF > test.sh
-          set -ex
-          # make environment variables available as tests are running inside a container
-          export WORK_DIR="${WORK_DIR}"
-          export TEST_PY_BD="${TEST_PY_BD}"
-          export TEST_PY_ID="${TEST_PY_ID}"
-          export TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}"
-          export BUILDMAN="${BUILDMAN}"
-          export OVERRIDE="${OVERRIDE}"
-          EOF
-          cat << "EOF" >> test.sh
-          # the below corresponds to .gitlab-ci.yml "before_script"
-          cd ${WORK_DIR}
-          git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
-          ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
-          ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
-          grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
-          grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
-          mkdir ~/grub2-arm
-          cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di
-          mkdir ~/grub2-arm64
-          cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di
-          # the below corresponds to .gitlab-ci.yml "script"
-          cd ${WORK_DIR}
-          if [[ "${BUILDMAN}" != "" ]]; then
-              ret=0;
-              tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
-              if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-                  tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
-                  exit $ret;
-              fi;
-          fi
-          virtualenv -p /usr/bin/python3 /tmp/venv
-          . /tmp/venv/bin/activate
-          pip install -r test/py/requirements.txt
-          export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
-          export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
-          export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
-          if [[ "${TEST_PY_BD}" != "" ]]; then
-              ./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}" --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
-              ret=$?;
-              if [[ $ret -ne 0 ]]; then
-                  exit $ret;
-              fi;
-          fi
-          # the below corresponds to .gitlab-ci.yml "after_script"
-          rm -rf ~/grub2* /tmp/uboot-test-hooks /tmp/venv
-          EOF
-          cat test.sh
-          # make current directory writeable to uboot user inside the container
-          # as sandbox testing need create files like spi flash images, etc.
-          # (TODO: clean up this in the future)
-          chmod 777 .
-          docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/test.sh
-
-  - job: build_the_world
-    displayName: 'Build the World'
-    pool:
-      vmImage: $(ubuntu_vm)
-    strategy:
-      # Use almost the same target division in .travis.yml, only merged
-      # 4 small build jobs (arc/microblaze/nds32/xtensa) into one.
-      matrix:
-        arc_microblaze_nds32_xtensa:
-          BUILDMAN: "arc microblaze nds32 xtensa"
-        arm11_arm7_arm920t_arm946es:
-          BUILDMAN: "arm11 arm7 arm920t arm946es"
-        arm926ejs:
-          BUILDMAN: "arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
-        at91_non_armv7:
-          BUILDMAN: "at91 -x armv7"
-        at91_non_arm926ejs:
-          BUILDMAN: "at91 -x arm926ejs"
-        boundary_engicam_toradex:
-          BUILDMAN: "boundary engicam toradex"
-        arm_bcm:
-          BUILDMAN: "bcm -x mips"
-        nxp_arm32:
-          BUILDMAN: "freescale -x powerpc,m68k,aarch64,ls101,ls102,ls104,ls108,ls20,lx216"
-        nxp_ls101x:
-          BUILDMAN: "freescale&ls101"
-        nxp_ls102x:
-          BUILDMAN: "freescale&ls102"
-        nxp_ls104x:
-          BUILDMAN: "freescale&ls104"
-        nxp_ls108x:
-          BUILDMAN: "freescale&ls108"
-        nxp_ls20xx:
-          BUILDMAN: "freescale&ls20"
-        nxp_lx216x:
-          BUILDMAN: "freescale&lx216"
-        imx6:
-          BUILDMAN: "mx6 -x boundary,engicam,freescale,technexion,toradex"
-        imx:
-          BUILDMAN: "mx -x mx6,freescale,technexion,toradex"
-        keystone2_keystone3:
-          BUILDMAN: "k2 k3"
-        samsung_socfpga:
-          BUILDMAN: "samsung socfpga"
-        spear:
-          BUILDMAN: "spear"
-        sun4i:
-          BUILDMAN: "sun4i"
-        sun5i:
-          BUILDMAN: "sun5i"
-        sun6i:
-          BUILDMAN: "sun6i"
-        sun7i:
-          BUILDMAN: "sun7i"
-        sun8i_32bit:
-          BUILDMAN: "sun8i&armv7"
-        sun8i_64bit:
-          BUILDMAN: "sun8i&aarch64"
-        sun9i:
-          BUILDMAN: "sun9i"
-        sun50i:
-          BUILDMAN: "sun50i"
-        arm_catch_all:
-          BUILDMAN: "arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq"
-        sandbox_x86:
-          BUILDMAN: "sandbox x86"
-        technexion:
-          BUILDMAN: "technexion"
-        kirkwood:
-          BUILDMAN: "kirkwood"
-        mvebu:
-          BUILDMAN: "mvebu"
-        m68k:
-          BUILDMAN: "m68k"
-        mips:
-          BUILDMAN: "mips"
-        non_fsl_ppc:
-          BUILDMAN: "powerpc -x freescale"
-        mpc85xx_freescale:
-          BUILDMAN: "mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
-        t208xrdb_corenet_ds:
-          BUILDMAN: "t208xrdb corenet_ds"
-        fsl_ppc:
-          BUILDMAN: "t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
-        t102x:
-          BUILDMAN: "t102*"
-        p1_p2_rdb_pc:
-          BUILDMAN: "p1_p2_rdb_pc"
-        p1010rdb_bsc91:
-          BUILDMAN: "p1010rdb bsc91"
-        siemens:
-          BUILDMAN: "siemens"
-        tegra:
-          BUILDMAN: "tegra -x toradex"
-        am33xx_no_siemens:
-          BUILDMAN: "am33xx -x siemens"
-        omap:
-          BUILDMAN: "omap"
-        uniphier:
-          BUILDMAN: "uniphier"
-        aarch64_catch_all:
-          BUILDMAN: "aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq"
-        rockchip:
-          BUILDMAN: "rockchip"
-        sh:
-          BUILDMAN: "sh -x arm"
-        zynq:
-          BUILDMAN: "zynq&armv7"
-        zynqmp_versal:
-          BUILDMAN: "versal|zynqmp&aarch64"
-        riscv:
-          BUILDMAN: "riscv"
-    steps:
-      - script: |
-          cat << EOF > build.sh
-          set -ex
-          cd ${WORK_DIR}
-          # make environment variables available as tests are running inside a container
-          export BUILDMAN="${BUILDMAN}"
-          EOF
-          cat << "EOF" >> build.sh
-          if [[ "${BUILDMAN}" != "" ]]; then
-              ret=0;
-              tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
-              if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-                  tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
-                  exit $ret;
-              fi;
-          fi
-          EOF
-          cat build.sh
-          docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh

.checkpatch.conf

@@ -25,6 +25,3 @@
 # Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
 # addresses are __aligned(2)".
 --ignore PREFER_ETHER_ADDR_COPY
-
-# A bit shorter of a description is OK with us.
---min-conf-desc-length=2

.gitattributes

@@ -1,5 +0,0 @@
-# Declare files that always have LF line endings on checkout
-* text eol=lf
-# Denote all files that are truly binary and should not be modified
-*.bmp binary
-*.ttf binary

.github/pull_request_template.md

@@ -1,3 +0,0 @@
-Please do not submit a Pull Request via github.  Our project makes use of
-mailing lists for patch submission and review.  For more details please
-see https://www.denx.de/wiki/U-Boot/Patches

.gitignore

@@ -3,33 +3,26 @@
 # subdirectories here. Add them in the ".gitignore" file
 # in that subdirectory instead.
 #
-# Normal rules (sorted alphabetically)
+# Normal rules
 #
 .*
-*.a
-*.asn1.[ch]
-*.bin
-*.cfgout
-*.dtb
-*.dtbo
-*.dtb.S
-*.elf
-*.exe
-*.gcda
-*.gcno
-*.i
-*.img
-*.lex.c
-*.lst
-*.mod.c
 *.o
 *.o.*
-*.order
-*.patch
+*.a
 *.s
 *.su
+*.mod.c
+*.i
+*.lst
+*.order
+*.elf
 *.swp
-*.tab.[ch]
+*.bin
+*.patch
+*.cfgtmp
+
+# host programs on Cygwin
+*.exe
 
 # Build tree
 /build-*
@@ -37,13 +30,11 @@
 #
 # Top-level generic files
 #
-fit-dtb.blob*
 /MLO*
-/SPL*
+/SPL
 /System.map
 /u-boot*
 /boards.cfg
-/*.log
 
 #
 # git files that we don't want to ignore even it they are dot-files
@@ -54,6 +45,7 @@ fit-dtb.blob*
 #
 # Generated files
 #
+/LOG
 /spl/
 /tpl/
 /defconfig

.gitlab-ci.yml

@@ -1,342 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-# Grab our configured image.  The source for this is found at:
-# https://gitlab.denx.de/u-boot/gitlab-ci-runner
-image: trini/u-boot-gitlab-ci-runner:bionic-20191010-20Oct2019
-
-# We run some tests in different order, to catch some failures quicker.
-stages:
-  - testsuites
-  - test.py
-  - world build
-
-.buildman_and_testpy_template: &buildman_and_testpy_dfn
-  tags: [ 'all' ]
-  stage: test.py
-  before_script:
-    # Clone uboot-test-hooks
-    - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
-    - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
-    - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
-    - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
-    - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
-    - mkdir ~/grub2-arm
-    - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
-    - mkdir ~/grub2-arm64
-    - ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
-
-  after_script:
-    - rm -rf ~/grub2* /tmp/uboot-test-hooks /tmp/venv
-  script:
-    # From buildman, exit code 129 means warnings only.  If we've been asked to
-    # use clang only do one configuration.
-    - if [[ "${BUILDMAN}" != "" ]]; then
-        ret=0;
-        tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
-        if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-          tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
-          exit $ret;
-        fi;
-      fi
-    # "not a_test_which_does_not_exist" is a dummy -k parameter which will
-    # never prevent any test from running. That way, we can always pass
-    # "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
-    # value.
-    - virtualenv -p /usr/bin/python3 /tmp/venv
-    - . /tmp/venv/bin/activate
-    - pip install -r test/py/requirements.txt
-    - export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
-      export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
-      export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
-      if [[ "${TEST_PY_BD}" != "" ]]; then
-        ./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-          -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
-          --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
-        ret=$?;
-        if [[ $ret -ne 0 ]]; then
-          exit $ret;
-        fi;
-      fi;
-
-build all 32bit ARM platforms:
-  tags: [ 'all' ]
-  stage: world build
-  script:
-    - ret=0;
-      ./tools/buildman/buildman -o /tmp -P -E arm -x aarch64 || ret=$?;
-      if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-        ./tools/buildman/buildman -o /tmp -sdeP;
-        exit $ret;
-      fi;
-
-build all 64bit ARM platforms:
-  tags: [ 'all' ]
-  stage: world build
-  script:
-    - virtualenv /tmp/venv
-    - . /tmp/venv/bin/activate
-    - pip install pyelftools
-    - ret=0;
-      ./tools/buildman/buildman -o /tmp -P -E aarch64 || ret=$?;
-      if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-        ./tools/buildman/buildman -o /tmp -sdeP;
-        exit $ret;
-      fi;
-
-build all PowerPC platforms:
-  tags: [ 'all' ]
-  stage: world build
-  script:
-    - ret=0;
-      ./tools/buildman/buildman -o /tmp -P -E powerpc || ret=$?;
-      if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-        ./tools/buildman/buildman -o /tmp -sdeP;
-        exit $ret;
-      fi;
-
-build all other platforms:
-  tags: [ 'all' ]
-  stage: world build
-  script:
-    - ret=0;
-      ./tools/buildman/buildman -o /tmp -P -E -x arm,powerpc || ret=$?;
-      if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-        ./tools/buildman/buildman -o /tmp -sdeP;
-        exit $ret;
-      fi;
-
-# QA jobs for code analytics
-# static code analysis with cppcheck (we can add --enable=all later)
-cppcheck:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - cppcheck --force --quiet --inline-suppr .
-
-# search for TODO within source tree
-grep TODO/FIXME/HACK:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - grep -r TODO .
-    - grep -r FIXME .
-    # search for HACK within source tree and ignore HACKKIT board
-    - grep -r HACK . | grep -v HACKKIT
-
-# some statistics about the code base
-sloccount:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - sloccount .
-
-# ensure all configs have MAINTAINERS entries
-Check for configs without MAINTAINERS entry:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
-
-# Ensure host tools build
-Build tools-only:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - make tools-only_config tools-only -j$(nproc)
-
-# Ensure env tools build
-Build envtools:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - make tools-only_config envtools -j$(nproc)
-
-Run binman, buildman, dtoc and patman testsuites:
-  tags: [ 'all' ]
-  stage: testsuites
-  script:
-    - git config --global user.name "GitLab CI Runner";
-      git config --global user.email trini@konsulko.com;
-      export USER=gitlab;
-      virtualenv /tmp/venv;
-      . /tmp/venv/bin/activate;
-      pip install pyelftools;
-      export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl;
-      export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
-      export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
-      ./tools/buildman/buildman -o /tmp -P sandbox_spl;
-      ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
-      ./tools/buildman/buildman -t;
-      ./tools/dtoc/dtoc -t;
-      ./tools/patman/patman --test
-
-# Test sandbox with test.py
-sandbox test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "sandbox"
-    BUILDMAN: "^sandbox$"
-  <<: *buildman_and_testpy_dfn
-
-sandbox with clang test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "sandbox"
-    BUILDMAN: "^sandbox$"
-    OVERRIDE: "-O clang-7"
-  <<: *buildman_and_testpy_dfn
-
-sandbox_spl test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "sandbox_spl"
-    BUILDMAN: "^sandbox_spl$"
-    TEST_PY_TEST_SPEC: "test_ofplatdata"
-  <<: *buildman_and_testpy_dfn
-
-evb-ast2500 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "evb-ast2500"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^evb-ast2500$"
-  <<: *buildman_and_testpy_dfn
-
-sandbox_flattree test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "sandbox_flattree"
-    BUILDMAN: "^sandbox_flattree$"
-  <<: *buildman_and_testpy_dfn
-
-vexpress_ca15_tc2 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "vexpress_ca15_tc2"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^vexpress_ca15_tc2$"
-  <<: *buildman_and_testpy_dfn
-
-vexpress_ca9x4 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "vexpress_ca9x4"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^vexpress_ca9x4$"
-  <<: *buildman_and_testpy_dfn
-
-integratorcp_cm926ejs test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "integratorcp_cm926ejs"
-    TEST_PY_TEST_SPEC: "not sleep"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^integratorcp_cm926ejs$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_arm test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_arm"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_arm$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_arm64 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_arm64"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_arm64$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_mips test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_mips"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_mips$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_mipsel test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_mipsel"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_mipsel$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_mips64 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_mips64"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_mips64$"
-  <<: *buildman_and_testpy_dfn
-
-qemu_mips64el test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu_mips64el"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu_mips64el$"
-  <<: *buildman_and_testpy_dfn
-
-qemu-ppce500 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu-ppce500"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu-ppce500$"
-  <<: *buildman_and_testpy_dfn
-
-qemu-riscv64 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu-riscv64"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu-riscv64$"
-  <<: *buildman_and_testpy_dfn
-
-qemu-x86 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu-x86"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu-x86$"
-  <<: *buildman_and_testpy_dfn
-
-qemu-x86_64 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "qemu-x86_64"
-    TEST_PY_TEST_SPEC: "not sleep"
-    BUILDMAN: "^qemu-x86_64$"
-  <<: *buildman_and_testpy_dfn
-
-zynq_zc702 test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "zynq_zc702"
-    TEST_PY_TEST_SPEC: "not sleep"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^zynq_zc702$"
-  <<: *buildman_and_testpy_dfn
-
-xilinx_versal_virt test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "xilinx_versal_virt"
-    TEST_PY_TEST_SPEC: "not sleep"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^xilinx_versal_virt$"
-  <<: *buildman_and_testpy_dfn
-
-xtfpga test.py:
-  tags: [ 'all' ]
-  variables:
-    TEST_PY_BD: "xtfpga"
-    TEST_PY_TEST_SPEC: "not sleep"
-    TEST_PY_ID: "--id qemu"
-    BUILDMAN: "^xtfpga$"
-  <<: *buildman_and_testpy_dfn

.mailmap

@@ -4,24 +4,14 @@
 # and/or not always written the same way, making contributions from the
 # same person appearing not to be so or badly displayed.
 #
-# This file is also used by scripts/get_maintainer.pl.
-#
 # This file can be modified by hand or updated by the following command:
 #  scripts/mailmapper > tmp; mv tmp .mailmap
 #
-# Entries in this file take one of the following forms:
-# Proper Name <commit@email.xx>
-# <proper@email.xx> <commit@email.xx>
-# Proper Name <proper@email.xx> <commit@email.xx>
-# Proper Name <proper@email.xx> Commit Name <commit@email.xx>
 
-Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
 Allen Martin <amartin@nvidia.com>
 Andreas Bießmann <andreas.devel@googlemail.com>
 Andreas Bießmann <andreas@biessmann.org>
 Aneesh V <aneesh@ti.com>
-Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
-Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
 Dirk Behme <dirk.behme@googlemail.com>
 Fabio Estevam <fabio.estevam@nxp.com>
 Jagan Teki <402jagan@gmail.com>
@@ -29,13 +19,11 @@ Jagan Teki <jaganna@gmail.com>
 Jagan Teki <jaganna@xilinx.com>
 Jagan Teki <jagannadh.teki@gmail.com>
 Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
-Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
 Markus Klotzbuecher <mk@denx.de>
-Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
 Prabhakar Kushwaha <prabhakar@freescale.com>
 Rajeshwari Shinde <rajeshwari.s@samsung.com>
-Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@uam.es>
-Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@gmail.com>
+Ricardo Ribalda <ricardo.ribalda@uam.es>
+Ricardo Ribalda <ricardo.ribalda@gmail.com>
 Sandeep Paulraj <s-paulraj@ti.com>
 Shaohui Xie <Shaohui.Xie@freescale.com>
 Stefan Roese <stroese>
@@ -45,5 +33,3 @@ Wolfgang Denk <wdenk>
 York Sun <yorksun@freescale.com>
 York Sun <york.sun@nxp.com>
 Łukasz Majewski <l.majewski@samsung.com>
-Lukasz Majewski <lukma@denx.de>
-Mirza <Taimoor_Mirza@mentor.com>

.travis.yml

@@ -1,18 +1,14 @@
-# SPDX-License-Identifier: GPL-2.0+
 # Copyright Roger Meier <r.meier@siemens.com>
+# SPDX-License-Identifier:	GPL-2.0+
 
 # build U-Boot on Travis CI - https://travis-ci.org/
 
-sudo: required
-dist: bionic
+sudo: true
 
 language: c
 
 addons:
   apt:
-    sources:
-    - ubuntu-toolchain-r-test
-    - llvm-toolchain-bionic-7
     packages:
     - cppcheck
     - sloccount
@@ -21,508 +17,173 @@ addons:
     - build-essential
     - libsdl1.2-dev
     - python
-    - python-pyelftools
-    - python3-virtualenv
-    - python3-pip
-    - swig
-    - libpython-dev
-    - iasl
-    - grub-efi-ia32-bin
-    - grub-efi-amd64-bin
-    - rpm2cpio
-    - wget
-    - device-tree-compiler
-    - lzop
-    - liblz4-tool
-    - lzma-alone
-    - libisl15
-    - clang-7
-    - srecord
+    - python-virtualenv
+
+cache:
+ - apt
 
 install:
- # Clone uboot-test-hooks
- - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
- - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
+ # install latest device tree compiler
+ - git clone --depth=1 https://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
+ - make -j4 -C /tmp/dtc
  # prepare buildman environment
- - echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- - echo -e "arc = /tmp/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- - echo -e "\n[toolchain-alias]\nsh = sh2" >> ~/.buildman
- - echo -e "x86 = i386" >> ~/.buildman;
- - echo -e "riscv = riscv64" >> ~/.buildman;
+ - export BUILDMAN_ROOT="root:"
+ - export BUILDMAN_PPC="ppc:"
+ - export BUILDMAN_ARM="arm:"
+ - export BUILDMAN_SANDBOX="sandbox:"
+ - echo -e "[toolchain]\n${BUILDMAN_ROOT} /\n" > ~/.buildman
+ - echo -e "${BUILDMAN_PPC} /opt/eldk-5.4/powerpc/sysroots/i686-eldk-linux/usr/bin/powerpc-linux/\n" >> ~/.buildman
+ - echo -e "${BUILDMAN_ARM} /opt/eldk-5.4/armv5te/sysroots/i686-eldk-linux/usr/bin/armv5te-linux-gnueabi/\n" >> ~/.buildman
+ - echo -e "${BUILDMAN_SANDBOX} /usr/bin/gcc\n" >> ~/.buildman
+ - export BUILDMAN_ALIAS="x86:"
+ - export BUILDMAN_ALIAS_ARM="arm:"
+ - echo -e "\n\n[toolchain-alias]\n${BUILDMAN_ALIAS} i386\n" >> ~/.buildman
+ - echo -e "${BUILDMAN_ALIAS_ARM} armv5te\n" >> ~/.buildman
  - cat ~/.buildman
- - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal  echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- - mkdir ~/grub2-arm
- - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- - mkdir ~/grub2-arm64
- - ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
- - wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
+ - virtualenv /tmp/venv
+ - . /tmp/venv/bin/activate
+ - pip install pytest
 
 env:
   global:
-    - PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin:/usr/local/bin
-    - PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
+    - PATH=/tmp/dtc:$PATH
     - BUILD_DIR=build
     - HOSTCC="cc"
     - HOSTCXX="c++"
-    - QEMU_VERSION="v3.1.0"
 
 before_script:
   # install toolchains based on TOOLCHAIN} variable
+  - if [[ "${TOOLCHAIN}" == *aarch64* ]]; then ./tools/buildman/buildman --fetch-arch aarch64 ; fi
+  - if [[ "${TOOLCHAIN}" == *arm* ]]; then wget ftp://ftp.denx.de/pub/eldk/5.4/targets/armv5te/eldk-eglibc-i686-arm-toolchain-gmae-5.4.sh ; fi
+  - if [[ "${TOOLCHAIN}" == *arm* ]]; then sh eldk-eglibc-i686-arm-toolchain-gmae-5.4.sh -y ; fi
+  - if [[ "${TOOLCHAIN}" == *avr32* ]]; then ./tools/buildman/buildman --fetch-arch avr32 ; fi
+  - if [[ "${TOOLCHAIN}" == *i386* ]]; then ./tools/buildman/buildman sandbox --fetch-arch i386 ; fi
   - if [[ "${TOOLCHAIN}" == *m68k* ]]; then ./tools/buildman/buildman --fetch-arch m68k ; fi
-  - if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi
   - if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi
-  - if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi
-  - if [[ "${TOOLCHAIN}" == *i386* ]]; then
-      ./tools/buildman/buildman --fetch-arch i386;
-    fi
-  - if [[ "${TOOLCHAIN}" == arc ]]; then
-       wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2018.09-release/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
-       tar -C /tmp -xf arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
-    fi
-  - if [[ "${TOOLCHAIN}" == "nds32" ]]; then
-       wget https://github.com/vincentzwc/prebuilt-nds32-toolchain/releases/download/20180521/nds32le-linux-glibc-v3-upstream.tar.gz &&
-       tar -C /tmp -xf nds32le-linux-glibc-v3-upstream.tar.gz &&
-       echo -e "\n[toolchain-prefix]\nnds32 = /tmp/nds32le-linux-glibc-v3-upstream/bin/nds32le-linux-" >> ~/.buildman;
-    fi
-  - if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
-       wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
-       tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
-       echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
-    fi
-  # If TOOLCHAIN is unset, we're on some flavour of ARM.
-  - if [[ "${TOOLCHAIN}" == "" ]]; then
-       ./tools/buildman/buildman --fetch-arch arm &&
-       ./tools/buildman/buildman --fetch-arch aarch64;
-    fi
-  - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
-  - if [[ "${TOOLCHAIN}" == "riscv" ]]; then
-       ./tools/buildman/buildman --fetch-arch riscv64;
-    fi
-  - if [[ "${QEMU_TARGET}" != "" ]]; then
-       git clone git://git.qemu.org/qemu.git /tmp/qemu;
-       pushd /tmp/qemu;
-       git submodule update --init dtc &&
-       git checkout ${QEMU_VERSION} &&
-       ./configure --prefix=/tmp/qemu-install --target-list=${QEMU_TARGET} &&
-       make -j4 all install;
-       popd;
-    fi
+  - if [[ "${TOOLCHAIN}" == *ppc* ]]; then wget ftp://ftp.denx.de/pub/eldk/5.4/targets/powerpc/eldk-eglibc-i686-powerpc-toolchain-gmae-5.4.sh ; fi
+  - if [[ "${TOOLCHAIN}" == *ppc* ]]; then sh eldk-eglibc-i686-powerpc-toolchain-gmae-5.4.sh -y ; fi
 
 script:
- # Comments must be outside the command strings below, or the Travis parser
- # will get confused.
- #
- # From buildman, exit code 129 means warnings only.  If we've been asked to
- # use clang only do one configuration.
- - if [[ "${BUILDMAN}" != "" ]]; then
-     ret=0;
-     tools/buildman/buildman -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
-     if [[ $ret -ne 0 && $ret -ne 129 ]]; then
-       tools/buildman/buildman -sdeP ${BUILDMAN};
-       exit $ret;
-     fi;
+ # the execution sequence for each test
+ - if [[ "${TEST_CMD}" != "" ]]; then
+     ${TEST_CMD};
    fi
- # "not a_test_which_does_not_exist" is a dummy -k parameter which will
- # never prevent any test from running. That way, we can always pass
- # "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
- # value.
- - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
-   cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
-   cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
-   cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
-   cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
-   if [[ -n "${TEST_PY_TOOLS}" ]]; then
-     PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
-     PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
-     ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test &&
-     ./tools/patman/patman --test &&
-     ./tools/buildman/buildman -t &&
-     PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
-     PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
-     ./tools/dtoc/dtoc -t;
-   fi;
-   if [[ "${TEST_PY_BD}" != "" ]]; then
-     virtualenv -p /usr/bin/python3 /tmp/venv;
-     . /tmp/venv/bin/activate;
-     pip install -r test/py/requirements.txt;
-     ./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-       -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
-       --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
-     ret=$?;
-     if [[ $ret -ne 0 ]]; then
-       exit $ret;
-     fi;
+ - if [[ "${BUILDMAN}" != "" ]]; then
+     tools/buildman/buildman ${BUILDMAN};
    fi
 
 matrix:
   include:
   # we need to build by vendor due to 50min time limit for builds
   # each env setting here is a dedicated build
-    - name: "buildman arc"
-      env:
-        - BUILDMAN="arc"
-          TOOLCHAIN="arc"
-    - name: "buildman arm11 arm7 arm920t arm946es"
-      env:
-        - BUILDMAN="arm11 arm7 arm920t arm946es"
-    - name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)"
-      env:
-        - JOB="arm926ejs"
-          BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
-    - name: "buildman at91 (non arm v7)"
-      env:
-        - BUILDMAN="at91 -x armv7"
-    - name: "buildman at91 (non arm926ejs)"
-      env:
-        - BUILDMAN="at91 -x arm926ejs"
-    - name: "buildman boundary engicam toradex"
-      env:
-        - BUILDMAN="boundary engicam toradex"
-    - name: "buildman ARM bcm"
-      env:
-        - BUILDMAN="bcm -x mips"
-    - name: "buildman NXP ARM32 (catch-all)"
-      env:
-        - BUILDMAN="freescale -x powerpc,m68k,aarch64,ls101,ls102,ls104,ls108,ls20,lx216"
-    - name: "buildman NXP LS101x"
-      env:
-        - BUILDMAN="freescale&ls101"
-    - name: "buildman NXP LS102x"
-      env:
-        - BUILDMAN="freescale&ls102"
-    - name: "buildman NXP LS104x"
-      env:
-        - BUILDMAN="freescale&ls104"
-    - name: "buildman NXP LS108x"
-      env:
-        - BUILDMAN="freescale&ls108"
-    - name: "buildman NXP LS20xx"
-      env:
-        - BUILDMAN="freescale&ls20"
-    - name: "buildman NXP LX216x"
-      env:
-        - BUILDMAN="freescale&lx216"
-    - name: "buildman i.MX6 tqc"
-      env:
-        - BUILDMAN="mx6&tqc"
-    - name: "buildman i.MX6 (catch-all)"
-      env:
-        - BUILDMAN="mx6 -x boundary,engicam,freescale,technexion,toradex,tqc"
-    - name: "buildman i.MX (non-i.MX6 catch-all)"
-      env:
-        - BUILDMAN="mx -x freescale,mx6,toradex,technexion"
-    - name: "buildman keystone 2/3"
-      env:
-        - BUILDMAN="k2 k3"
-    - name: "buildman samsung socfpga"
-      env:
-        - BUILDMAN="samsung socfpga"
-    - name: "buildman spear"
-      env:
-        - BUILDMAN="spear"
-    - name: "buildman sun4i"
-      env:
-        - BUILDMAN="sun4i"
-    - name: "buildman sun5i"
-      env:
-        - BUILDMAN="sun5i"
-    - name: "buildman sun6i"
-      env:
-        - BUILDMAN="sun6i"
-    - name: "buildman sun7i"
-      env:
-        - BUILDMAN="sun7i"
-    - name: "buildman 64bit sun8i"
-      env:
-        - BUILDMAN="sun8i&aarch64 -x orangepi"
-    - name: "buildman 32bit sun8i"
-      env:
-        - BUILDMAN="sun8i&armv7 -x orangepi"
-    - name: "buildman sun9i"
-      env:
-        - BUILDMAN="sun9i"
-    - name: "buildman sun50i"
-      env:
-        - BUILDMAN="sun50i -x orangepi"
-    - name: "buildman catch-all ARM"
-      env:
-        - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq"
-    - name: "buildman sandbox x86"
-      env:
+    - env:
+        - BUILDMAN="arm1136"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="arm1136"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="arm1176"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="arm720t"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="arm920t"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="atmel -x avr32"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="avr32"
+          TOOLCHAIN="avr32"
+    - env:
+        - BUILDMAN="davinci"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="denx"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="freescale -x powerpc,m68k,aarch64"
+          TOOLCHAIN="arm"
+    - env:
         - BUILDMAN="sandbox x86"
           TOOLCHAIN="i386"
-    - name: "buildman technexion"
-      env:
-        - BUILDMAN="technexion"
-    - name: "buildman kirkwood"
-      env:
+    - env:
         - BUILDMAN="kirkwood"
-    - name: "buildman mvebu"
-      env:
-        - BUILDMAN="mvebu"
-    - name: "buildman m68k"
-      env:
+          TOOLCHAIN="arm"
+    - env:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
-    - name: "buildman microblaze"
-      env:
-        - BUILDMAN="microblaze"
-          TOOLCHAIN="microblaze"
-    - name: "buildman mips"
-      env:
+    - env:
         - BUILDMAN="mips"
           TOOLCHAIN="mips"
-    - name: "buildman non-Freescale PowerPC"
-      env:
-        - BUILDMAN="powerpc -x freescale"
-          TOOLCHAIN="powerpc"
-    - name: "buildman mpc85xx&freescale (excluding many)"
-      env:
-        - BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
-          TOOLCHAIN="powerpc"
-    - name: "buildman t208xrdb corenet_ds"
-      env:
-        - BUILDMAN="t208xrdb corenet_ds"
-          TOOLCHAIN="powerpc"
-    - name: "buildman Freescale PowerPC"
-      env:
-        - BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
-          TOOLCHAIN="powerpc"
-    - name: "buildman t102*"
-      env:
-        - BUILDMAN="t102*"
-          TOOLCHAIN="powerpc"
-    - name: "buildman p1_p2_rdb_pc"
-      env:
-        - BUILDMAN="p1_p2_rdb_pc"
-          TOOLCHAIN="powerpc"
-    - name: "buildman p1010rdb bsc91"
-      env:
-        - BUILDMAN="p1010rdb bsc91"
-          TOOLCHAIN="powerpc"
-    - name: "buildman siemens"
-      env:
+    - env:
+        - BUILDMAN="mpc512x"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc5xx"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc5xxx"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc8260"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc83xx"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc85xx -x freescale"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc85xx -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x sbc8548 -x bsc91*"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="t208xrdb t4qds t102*"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="p1_p2_rdb_pc p1010rdb"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc86xx"
+          TOOLCHAIN="ppc"
+    - env:
+        - BUILDMAN="mpc8xx"
+          TOOLCHAIN="ppc"
+    - env:
         - BUILDMAN="siemens"
-    - name: "buildman tegra"
-      env:
-        - BUILDMAN="tegra -x toradex"
-    - name: "buildman am33xx (no siemens)"
-      env:
-        - BUILDMAN="am33xx -x siemens"
-    - name: "buildman omap"
-      env:
-        - BUILDMAN="omap"
-    - name: "buildman orangepi"
-      env:
-        - BUILDMAN="orangepi"
-    - name: "buildman uniphier"
-      env:
-        - BUILDMAN="uniphier"
-    - name: "buildman catch-all AArch64"
-      env:
-        - BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq"
-    - name: "buildman rockchip"
-      env:
-        - BUILDMAN="rockchip -x orangepi"
-    - name: "buildman sh"
-      env:
-        - BUILDMAN="sh -x arm"
-          TOOLCHAIN="sh"
-    - name: "buildman Zynq* (ARMv7)"
-      env:
-        - BUILDMAN="zynq&armv7"
-    - name: "buildman ZynqMP and Versal"
-      env:
-        - BUILDMAN="versal|zynqmp&aarch64"
-    - name: "buildman xtensa"
-      env:
-        - BUILDMAN="xtensa"
-          TOOLCHAIN="xtensa-dc233c-elf"
-    - name: "buildman riscv"
-      env:
-        - BUILDMAN="riscv"
-          TOOLCHAIN="riscv"
-    - name: "buildman nds32"
-      env:
-        - BUILDMAN="nds32"
-          TOOLCHAIN="nds32"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="ti"
+          TOOLCHAIN="arm"
+    - env:
+        - BUILDMAN="aarch64"
+          TOOLCHAIN="aarch64"
 
     # QA jobs for code analytics
     # static code analysis with cppcheck (we can add --enable=all later)
-    - name: "cppcheck"
-      script:
-        - cppcheck --force --quiet --inline-suppr .
+    - env:
+        - TEST_CMD="cppcheck --force --quiet --inline-suppr ."
     # search for TODO within source tree
-    - name: "grep TODO"
-      script:
-        - grep -r TODO .
+    - env:
+        - TEST_CMD="grep -r TODO ."
     # search for FIXME within source tree
-    - name: "grep FIXME HACK"
-      script:
-        - grep -r FIXME .
+    - env:
+        - TEST_CMD="grep -r FIXME ."
     # search for HACK within source tree and ignore HACKKIT board
+    - env:
+        - TEST_CMD="grep -r HACK . | grep -v HACKKIT"
       script:
         - grep -r HACK . | grep -v HACKKIT
     # some statistics about the code base
-    - name: "sloccount"
-      script:
-        - sloccount .
-    # ensure all configs have MAINTAINERS entries
-    - name: "Check for configs without MAINTAINERS entry"
-      script:
-        - if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
-    # Ensure host tools build
-    - name: "Build tools-only"
-      script:
-        - make tools-only_config tools-only -j$(nproc)
-    # Ensure env tools build
-    - name: "Build envtools"
-      script:
-        - make tools-only_config envtools -j$(nproc)
-
+    - env:
+        - TEST_CMD="sloccount ."
     # test/py
-    - name: "test/py sandbox"
-      env:
-        - TEST_PY_BD="sandbox"
-          BUILDMAN="^sandbox$"
-          TOOLCHAIN="i386"
-    - name: "test/py sandbox with clang"
-      env:
-        - TEST_PY_BD="sandbox"
-          BUILDMAN="^sandbox$"
-          OVERRIDE="-O clang-7"
-    - name: "test/py sandbox_spl"
-      env:
-        - TEST_PY_BD="sandbox_spl"
-          TEST_PY_TEST_SPEC="test_ofplatdata"
-          BUILDMAN="^sandbox$"
-          TOOLCHAIN="i386"
-          TEST_PY_TOOLS="yes"
-    - name: "test/py sandbox_flattree"
-      env:
-        - TEST_PY_BD="sandbox_flattree"
-          BUILDMAN="^sandbox_flattree$"
-          TOOLCHAIN="i386"
-    - name: "test/py evb-ast2500"
-      env:
-        - TEST_PY_BD="evb-ast2500"
-          TEST_PY_ID="--id qemu"
-          QEMU_TARGET="arm-softmmu"
-          QEMU_VERSION="506179e42112be77bfd071f050b15762d3b2cd43"
-          BUILDMAN="^evb-ast2500$"
-    - name: "test/py vexpress_ca15_tc2"
-      env:
-        - TEST_PY_BD="vexpress_ca15_tc2"
-          TEST_PY_ID="--id qemu"
-          QEMU_TARGET="arm-softmmu"
-          QEMU_VERSION="v3.0.0"
-          BUILDMAN="^vexpress_ca15_tc2$"
-    - name: "test/py vexpress_ca9x4"
-      env:
-        - TEST_PY_BD="vexpress_ca9x4"
-          TEST_PY_ID="--id qemu"
-          QEMU_TARGET="arm-softmmu"
-          BUILDMAN="^vexpress_ca9x4$"
-    - name: "test/py integratorcp_cm926ejs"
-      env:
-        - TEST_PY_BD="integratorcp_cm926ejs"
-          TEST_PY_TEST_SPEC="not sleep"
-          TEST_PY_ID="--id qemu"
-          QEMU_TARGET="arm-softmmu"
-          BUILDMAN="^integratorcp_cm926ejs$"
-    - name: "test/py qemu_arm"
-      env:
-        - TEST_PY_BD="qemu_arm"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="arm-softmmu"
-          BUILDMAN="^qemu_arm$"
-    - name: "test/py qemu_arm64"
-      env:
-        - TEST_PY_BD="qemu_arm64"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="aarch64-softmmu"
-          BUILDMAN="^qemu_arm64$"
-    - name: "test/py qemu_mips"
-      env:
-        - TEST_PY_BD="qemu_mips"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="mips-softmmu"
-          BUILDMAN="^qemu_mips$"
-          TOOLCHAIN="mips"
-    - name: "test/py qemu_mipsel"
-      env:
-        - TEST_PY_BD="qemu_mipsel"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="mipsel-softmmu"
-          BUILDMAN="^qemu_mipsel$"
-          TOOLCHAIN="mips"
-    - name: "test/py qemu_mips64"
-      env:
-        - TEST_PY_BD="qemu_mips64"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="mips64-softmmu"
-          BUILDMAN="^qemu_mips64$"
-          TOOLCHAIN="mips"
-    - name: "test/py qemu_mips64el"
-      env:
-        - TEST_PY_BD="qemu_mips64el"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="mips64el-softmmu"
-          BUILDMAN="^qemu_mips64el$"
-          TOOLCHAIN="mips"
-    - name: "test/py qemu-ppce500"
-      env:
-        - TEST_PY_BD="qemu-ppce500"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="ppc-softmmu"
-          BUILDMAN="^qemu-ppce500$"
-          TOOLCHAIN="powerpc"
-    - name: "test/py qemu-riscv64"
-      env:
-        - TEST_PY_BD="qemu-riscv64"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="riscv64-softmmu"
-          BUILDMAN="^qemu-riscv64$"
-          TOOLCHAIN="riscv"
-    - name: "test/py qemu-x86"
-      env:
-        - TEST_PY_BD="qemu-x86"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="i386-softmmu"
-          BUILDMAN="^qemu-x86$"
-          TOOLCHAIN="i386"
-          BUILD_ROM="yes"
-    - name: "test/py qemu-x86_64"
-      env:
-        - TEST_PY_BD="qemu-x86_64"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="x86_64-softmmu"
-          BUILDMAN="^qemu-x86_64$"
-          TOOLCHAIN="i386"
-          BUILD_ROM="yes"
-    - name: "test/py zynq_zc702"
-      env:
-        - TEST_PY_BD="zynq_zc702"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="arm-softmmu"
-          TEST_PY_ID="--id qemu"
-          BUILDMAN="^zynq_zc702$"
-    - name: "test/py xilinx_versal_virt"
-      env:
-        - TEST_PY_BD="xilinx_versal_virt"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="aarch64-softmmu"
-          TEST_PY_ID="--id qemu"
-          BUILDMAN="^xilinx_versal_virt$"
-    - name: "test/py xtfpga"
-      env:
-        - TEST_PY_BD="xtfpga"
-          TEST_PY_TEST_SPEC="not sleep"
-          QEMU_TARGET="xtensa-softmmu"
-          TEST_PY_ID="--id qemu"
-          BUILDMAN="^xtfpga$"
-          TOOLCHAIN="xtensa-dc233c-elf"
+    - env:
+        - TEST_CMD="./test/py/test.py --bd sandbox --build"
 
 # TODO make it perfect ;-r

Kconfig

@@ -14,19 +14,6 @@ source "arch/Kconfig"
 
 menu "General setup"
 
-config BROKEN
-	bool
-	help
-	  This option cannot be enabled. It is used as dependency
-	  for broken and incomplete features.
-
-config DEPRECATED
-	bool
-	help
-	  This option cannot be enabled.  It it used as a dependency for
-	  code that relies on deprecated features that will be removed and
-	  the conversion deadline has passed.
-
 config LOCALVERSION
 	string "Local version - append to U-Boot release"
 	help
@@ -66,75 +53,27 @@ config CC_OPTIMIZE_FOR_SIZE
 
 	  This option is enabled by default for U-Boot.
 
-config CC_COVERAGE
-	bool "Enable code coverage analysis"
-	depends on SANDBOX
-	help
-	  Enabling this option will pass "--coverage" to gcc to compile
-	  and link code instrumented for coverage analysis.
-
 config DISTRO_DEFAULTS
 	bool "Select defaults suitable for booting general purpose Linux distributions"
-	select AUTO_COMPLETE
-	select CMDLINE_EDITING
-	select CMD_BOOTI if ARM64
+	default y if ARCH_SUNXI
+	default n
 	select CMD_BOOTZ if ARM && !ARM64
-	select CMD_DHCP if CMD_NET
-	select CMD_ENV_EXISTS
+	select CMD_BOOTI if ARM64
+	select CMD_DHCP
 	select CMD_EXT2
 	select CMD_EXT4
 	select CMD_FAT
 	select CMD_FS_GENERIC
-	select CMD_PART if PARTITIONS
-	select CMD_PING if CMD_NET
-	select CMD_PXE if NET
-	select CMD_SYSBOOT
-	select ENV_VARS_UBOOT_CONFIG
+	select CMD_MII
+	select CMD_PING
 	select HUSH_PARSER
-	select SUPPORT_RAW_INITRD
-	select SYS_LONGHELP
-	imply CMD_MII if NET
-	imply USB_STORAGE
-	imply USE_BOOTCOMMAND
 	help
 	  Select this to enable various options and commands which are suitable
 	  for building u-boot for booting general purpose Linux distributions.
 
-config ENV_VARS_UBOOT_CONFIG
-	bool "Add arch, board, vendor and soc variables to default environment"
-	help
-	  Define this in order to add variables describing the
-	  U-Boot build configuration to the default environment.
-	  These will be named arch, cpu, board, vendor, and soc.
-	  Enabling this option will cause the following to be defined:
-	  - CONFIG_SYS_ARCH
-	  - CONFIG_SYS_CPU
-	  - CONFIG_SYS_BOARD
-	  - CONFIG_SYS_VENDOR
-	  - CONFIG_SYS_SOC
-
-config NR_DRAM_BANKS
-	int "Number of DRAM banks"
-	default 4
-	help
-	  This defines the number of DRAM banks.
-
-config SYS_BOOT_GET_CMDLINE
-	bool "Enable kernel command line setup"
-	help
-	  Enables allocating and saving kernel cmdline in space between
-	  "bootm_low" and "bootm_low" + BOOTMAPSZ.
-
-config SYS_BOOT_GET_KBD
-	bool "Enable kernel board information setup"
-	help
-	  Enables allocating and saving a kernel copy of the bd_info in
-	  space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
-
 config SYS_MALLOC_F
 	bool "Enable malloc() pool before relocation"
 	default y if DM
-
 	help
 	  Before relocation, memory is very limited on many platforms. Still,
 	  we can provide a small malloc() pool if needed. Driver model in
@@ -144,10 +83,6 @@ config SYS_MALLOC_F
 config SYS_MALLOC_F_LEN
 	hex "Size of malloc() pool before relocation"
 	depends on SYS_MALLOC_F
-	default 0x1000 if AM33XX
-	default 0x2800 if SANDBOX
-	default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
-			   ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5)
 	default 0x400
 	help
 	  Before relocation, memory is very limited on many platforms. Still,
@@ -155,35 +90,6 @@ config SYS_MALLOC_F_LEN
 	  particular needs this to operate, so that it can allocate the
 	  initial serial device and any others that are needed.
 
-config SYS_MALLOC_LEN
-	hex "Define memory for Dynamic allocation"
-	depends on ARCH_ZYNQ || ARCH_VERSAL || ARCH_STM32MP || ARCH_ROCKCHIP
-	default 0x2000000 if ARCH_ROCKCHIP
-	help
-	  This defines memory to be allocated for Dynamic allocation
-	  TODO: Use for other architectures
-
-config SPL_SYS_MALLOC_F_LEN
-	hex "Size of malloc() pool in SPL before relocation"
-	depends on SYS_MALLOC_F && SPL
-	default 0x2800 if RCAR_GEN3
-	default SYS_MALLOC_F_LEN
-	help
-	  Before relocation, memory is very limited on many platforms. Still,
-	  we can provide a small malloc() pool if needed. Driver model in
-	  particular needs this to operate, so that it can allocate the
-	  initial serial device and any others that are needed.
-
-config TPL_SYS_MALLOC_F_LEN
-	hex "Size of malloc() pool in TPL before relocation"
-	depends on SYS_MALLOC_F && TPL
-	default SYS_MALLOC_F_LEN
-	help
-	  Before relocation, memory is very limited on many platforms. Still,
-	  we can provide a small malloc() pool if needed. Driver model in
-	  particular needs this to operate, so that it can allocate the
-	  initial serial device and any others that are needed.
-
 menuconfig EXPERT
 	bool "Configure standard U-Boot features (expert users)"
 	default y
@@ -218,181 +124,136 @@ config TOOLS_DEBUG
 	  it is possible to set breakpoints on particular lines, single-step
 	  debug through the source code, etc.
 
-endif # EXPERT
+endif
 
 config PHYS_64BIT
 	bool "64bit physical address support"
 	help
 	  Say Y here to support 64bit physical memory address.
 	  This can be used not only for 64bit SoCs, but also for
-	  large physical address extension on 32bit SoCs.
-
-config BUILD_ROM
-	bool "Build U-Boot as BIOS replacement"
-	depends on X86
-	help
-	  This option allows to build a ROM version of U-Boot.
-	  The build process generally requires several binary blobs
-	  which are not shipped in the U-Boot source tree.
-	  Please, see doc/README.x86 for details.
-
-config SPL_IMAGE
-	string "SPL image used in the combined SPL+U-Boot image"
-	default "spl/boot.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
-	default "spl/u-boot-spl.bin"
-	depends on SPL
-	help
-	  Select the SPL build target that shall be generated by the SPL
-	  build process (default spl/u-boot-spl.bin). This image will be
-	  used to generate a combined image with SPL and main U-Boot
-	  proper as one single image.
-
-config BUILD_TARGET
-	string "Build target special images"
-	default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
-	default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
-	default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
-	default "u-boot-elf.srec" if RCAR_GEN3
-	default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
-				ARCH_SUNXI || RISCV)
-	default "u-boot.kwb" if KIRKWOOD
-	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
-	default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
-	help
-	  Some SoCs need special image types (e.g. U-Boot binary
-	  with a special header) as build targets. By defining
-	  CONFIG_BUILD_TARGET in the SoC / board header, this
-	  special image will be automatically built upon calling
-	  make / buildman.
-
-config SYS_CUSTOM_LDSCRIPT
-	bool "Use a custom location for the U-Boot linker script"
-	help
-	  Normally when linking U-Boot we will look in the board directory,
-	  the CPU directory and finally the "cpu" directory of the architecture
-	  for the ile "u-boot.lds" and use that as our linker.  However, in
-	  some cases we need to provide a different linker script.  To do so,
-	  enable this option and then provide the location under
-	  CONFIG_SYS_LDSCRIPT.
-
-config SYS_LDSCRIPT
-	depends on SYS_CUSTOM_LDSCRIPT
-	string "Custom ldscript location"
-	help
-	  Path within the source tree to the linker script to use for the
-	  main U-Boot binary.
-
-config ERR_PTR_OFFSET
-	hex
-	default 0x0
-	help
-	  Some U-Boot pointers have redundant information, so we can use a
-	  scheme where we can return either an error code or a pointer with the
-	  same return value. The default implementation just casts the pointer
-	  to a number, however, this may fail on platforms where the end of the
-	  address range is used for valid pointers (e.g. 0xffffff00 is a valid
-	  heap pointer in socfpga SPL).
-	  For such platforms, this value provides an upper range of those error
-	  pointer values - up to 'MAX_ERRNO' bytes below this value must be
-	  unused/invalid addresses.
+	  large physical address extention on 32bit SoCs.
 
 endmenu		# General setup
 
 menu "Boot images"
 
-config ANDROID_BOOT_IMAGE
-	bool "Enable support for Android Boot Images"
-	default y if FASTBOOT
+config SUPPORT_SPL
+	bool
+
+config SUPPORT_TPL
+	bool
+
+config SPL
+	bool
+	depends on SUPPORT_SPL
+	prompt "Enable SPL"
 	help
-	  This enables support for booting images which use the Android
-	  image format header.
+	  If you want to build SPL as well as the normal image, say Y.
+
+config SPL_SYS_MALLOC_SIMPLE
+	bool
+	depends on SPL
+	prompt "Only use malloc_simple functions in the SPL"
+	help
+	  Say Y here to only use the *_simple malloc functions from
+	  malloc_simple.c, rather then using the versions from dlmalloc.c;
+	  this will make the SPL binary smaller at the cost of more heap
+	  usage as the *_simple malloc functions do not re-use free-ed mem.
+
+config SPL_STACK_R
+	depends on SPL
+	bool "Enable SDRAM location for SPL stack"
+	help
+	  SPL starts off execution in SRAM and thus typically has only a small
+	  stack available. Since SPL sets up DRAM while in its board_init_f()
+	  function, it is possible for the stack to move there before
+	  board_init_r() is reached. This option enables a special SDRAM
+	  location for the SPL stack. U-Boot SPL switches to this after
+	  board_init_f() completes, and before board_init_r() starts.
+
+config SPL_STACK_R_ADDR
+	depends on SPL_STACK_R
+	hex "SDRAM location for SPL stack"
+	help
+	  Specify the address in SDRAM for the SPL stack. This will be set up
+	  before board_init_r() is called.
+
+config SPL_STACK_R_MALLOC_SIMPLE_LEN
+	depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
+	hex "Size of malloc_simple heap after switching to DRAM SPL stack"
+	default 0x100000
+	help
+	  Specify the amount of the stack to use as memory pool for
+	  malloc_simple after switching the stack to DRAM. This may be set
+	  to give board_init_r() a larger heap then the initial heap in
+	  SRAM which is limited to SYS_MALLOC_F_LEN bytes.
+
+config SPL_SEPARATE_BSS
+	depends on SPL
+	bool "BSS section is in a different memory region from text"
+	help
+	  Some platforms need a large BSS region in SPL and can provide this
+	  because RAM is already set up. In this case BSS can be moved to RAM.
+	  This option should then be enabled so that the correct device tree
+	  location is used. Normally we put the device tree at the end of BSS
+	  but with this option enabled, it goes at _image_binary_end.
+
+config TPL
+	bool
+	depends on SPL && SUPPORT_TPL
+	prompt "Enable TPL"
+	help
+	  If you want to build TPL as well as the normal image and SPL, say Y.
 
 config FIT
 	bool "Support Flattened Image Tree"
-	select MD5
-	select SHA1
 	help
-	  This option allows you to boot the new uImage structure,
+	  This option allows to boot the new uImage structrure,
 	  Flattened Image Tree.  FIT is formally a FDT, which can include
 	  images of various types (kernel, FDT blob, ramdisk, etc.)
 	  in a single blob.  To boot this new uImage structure,
 	  pass the address of the blob to the "bootm" command.
 	  FIT is very flexible, supporting compression, multiple images,
 	  multiple configurations, verification through hashing and also
-	  verified boot (secure boot using RSA).
+	  verified boot (secure boot using RSA). This option enables that
+	  feature.
 
-if FIT
+config SPL_FIT
+	bool "Support Flattened Image Tree within SPL"
+	depends on FIT
+	depends on SPL
 
-config FIT_EXTERNAL_OFFSET
-	hex "FIT external data offset"
-	default 0x0
-	help
-	  This specifies a data offset in fit image.
-	  The offset is from data payload offset to the beginning of
-	  fit image header. When specifies a offset, specific data
-	  could be put in the hole between data payload and fit image
-	  header, such as CSF data on i.MX platform.
-
-config FIT_ENABLE_SHA256_SUPPORT
-	bool "Support SHA256 checksum of FIT image contents"
-	default y
-	select SHA256
-	help
-	  Enable this to support SHA256 checksum of FIT image contents. A
-	  SHA256 checksum is a 256-bit (32-byte) hash value used to check that
-	  the image contents have not been corrupted. SHA256 is recommended
-	  for use in secure applications since (as at 2016) there is no known
-	  feasible attack that could produce a 'collision' with differing
-	  input data. Use this for the highest security. Note that only the
-	  SHA256 variant is supported: SHA512 and others are not currently
-	  supported in U-Boot.
+config FIT_VERBOSE
+	bool "Display verbose messages on FIT boot"
+	depends on FIT
 
 config FIT_SIGNATURE
 	bool "Enable signature verification of FIT uImages"
+	depends on FIT
 	depends on DM
-	select HASH
 	select RSA
 	help
 	  This option enables signature verification of FIT uImages,
 	  using a hash signed and verified using RSA. If
 	  CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
-	  hashing is available using hardware, then the RSA library will use
+	  hashing is available using hardware, then then RSA library will use
 	  it. See doc/uImage.FIT/signature.txt for more details.
 
 	  WARNING: When relying on signed FIT images with a required signature
 	  check the legacy image format is disabled by default, so that
 	  unsigned images cannot be loaded. If a board needs the legacy image
 	  format support in this case, enable it using
-	  CONFIG_LEGACY_IMAGE_FORMAT.
+	  CONFIG_IMAGE_FORMAT_LEGACY.
 
-config FIT_SIGNATURE_MAX_SIZE
-	hex "Max size of signed FIT structures"
-	depends on FIT_SIGNATURE
-	default 0x10000000
-	help
-	  This option sets a max size in bytes for verified FIT uImages.
-	  A sane value of 256MB protects corrupted DTB structures from overlapping
-	  device memory. Assure this size does not extend past expected storage
-	  space.
-
-config FIT_ENABLE_RSASSA_PSS_SUPPORT
-	bool "Support rsassa-pss signature scheme of FIT image contents"
-	depends on FIT_SIGNATURE
-	default n
-	help
-	  Enable this to support the pss padding algorithm as described
-	  in the rfc8017 (https://tools.ietf.org/html/rfc8017).
-
-config FIT_VERBOSE
-	bool "Show verbose messages when FIT images fail"
-	help
-	  Generally a system will have valid FIT images so debug messages
-	  are a waste of code space. If you are debugging your images then
-	  you can enable this option to get more verbose information about
-	  failures.
+config SPL_FIT_SIGNATURE
+	bool "Enable signature verification of FIT firmware within SPL"
+	depends on SPL_FIT
+	depends on SPL_DM
+	select SPL_RSA
 
 config FIT_BEST_MATCH
 	bool "Select the best match for the kernel device tree"
+	depends on FIT
 	help
 	  When no configuration is explicitly selected, default to the
 	  one whose fdt's compatibility field best matches that of
@@ -400,108 +261,14 @@ config FIT_BEST_MATCH
 	  most specific compatibility entry of U-Boot's fdt's root node.
 	  The order of entries in the configuration's fdt is ignored.
 
-config FIT_IMAGE_POST_PROCESS
-	bool "Enable post-processing of FIT artifacts after loading by U-Boot"
-	depends on TI_SECURE_DEVICE
+config FIT_VERBOSE
+	bool "Show verbose messages when FIT images fails"
+	depends on FIT
 	help
-	  Allows doing any sort of manipulation to blobs after they got extracted
-	  from FIT images like stripping off headers or modifying the size of the
-	  blob, verification, authentication, decryption etc. in a platform or
-	  board specific way. In order to use this feature a platform or board-
-	  specific implementation of board_fit_image_post_process() must be
-	  provided. Also, anything done during this post-processing step would
-	  need to be comprehended in how the images were prepared before being
-	  injected into the FIT creation (i.e. the blobs would have been pre-
-	  processed before being added to the FIT image).
-
-if SPL
-
-config SPL_FIT
-	bool "Support Flattened Image Tree within SPL"
-	depends on SPL
-	select SPL_OF_LIBFDT
-
-config SPL_FIT_PRINT
-	bool "Support FIT printing within SPL"
-	depends on SPL_FIT
-	help
-	  Support printing the content of the fitImage in a verbose manner in SPL.
-
-config SPL_FIT_SIGNATURE
-	bool "Enable signature verification of FIT firmware within SPL"
-	depends on SPL_DM
-	select SPL_FIT
-	select SPL_RSA
-
-config SPL_LOAD_FIT
-	bool "Enable SPL loading U-Boot as a FIT (basic fitImage features)"
-	select SPL_FIT
-	help
-	  Normally with the SPL framework a legacy image is generated as part
-	  of the build. This contains U-Boot along with information as to
-	  where it should be loaded. This option instead enables generation
-	  of a FIT (Flat Image Tree) which provides more flexibility. In
-	  particular it can handle selecting from multiple device tree
-	  and passing the correct one to U-Boot.
-
-config SPL_LOAD_FIT_FULL
-	bool "Enable SPL loading U-Boot as a FIT (full fitImage features)"
-	select SPL_FIT
-	help
-	  Normally with the SPL framework a legacy image is generated as part
-	  of the build. This contains U-Boot along with information as to
-	  where it should be loaded. This option instead enables generation
-	  of a FIT (Flat Image Tree) which provides more flexibility. In
-	  particular it can handle selecting from multiple device tree
-	  and passing the correct one to U-Boot.
-
-config SPL_FIT_IMAGE_POST_PROCESS
-	bool "Enable post-processing of FIT artifacts after loading by the SPL"
-	depends on SPL_LOAD_FIT
-	help
-	  Allows doing any sort of manipulation to blobs after they got extracted
-	  from the U-Boot FIT image like stripping off headers or modifying the
-	  size of the blob, verification, authentication, decryption etc. in a
-	  platform or board specific way. In order to use this feature a platform
-	  or board-specific implementation of board_fit_image_post_process() must
-	  be provided. Also, anything done during this post-processing step would
-	  need to be comprehended in how the images were prepared before being
-	  injected into the FIT creation (i.e. the blobs would have been pre-
-	  processed before being added to the FIT image).
-
-config SPL_FIT_SOURCE
-	string ".its source file for U-Boot FIT image"
-	depends on SPL_FIT
-	help
-	  Specifies a (platform specific) FIT source file to generate the
-	  U-Boot FIT image. This could specify further image to load and/or
-	  execute.
-
-config SPL_FIT_GENERATOR
-	string ".its file generator script for U-Boot FIT image"
-	depends on SPL_FIT
-	default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
-	default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP
-	default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV
-	help
-	  Specifies a (platform specific) script file to generate the FIT
-	  source file used to build the U-Boot FIT image file. This gets
-	  passed a list of supported device tree file stub names to
-	  include in the generated image.
-
-endif # SPL
-
-endif # FIT
-
-config LEGACY_IMAGE_FORMAT
-	bool "Enable support for the legacy image format"
-	default y if !FIT_SIGNATURE
-	help
-	  This option enables the legacy image format. It is enabled by
-	  default for backward compatibility, unless FIT_SIGNATURE is
-	  set where it is disabled so that unsigned images cannot be
-	  loaded. If a board needs the legacy image format support in this
-	  case, enable it here.
+	  Generally a system will have valid FIT images so debug messages
+	  are a waste of code space. If you are debugging your images then
+	  you can enable this option to get more verbose information about
+	  failures.
 
 config OF_BOARD_SETUP
 	bool "Set up board-specific details in device tree before boot"
@@ -546,26 +313,61 @@ config SYS_EXTRA_OPTIONS
 	  new boards should not use this option.
 
 config SYS_TEXT_BASE
-	depends on !NIOS2 && !XTENSA
+	depends on SPARC || ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
+		(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS
 	depends on !EFI_APP
-	default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
-	default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
-	default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
-	default 0x42e00000 if ARCH_SUNXI && MACH_SUN8I_V3S
 	hex "Text Base"
 	help
-	  The address in memory that U-Boot will be running from, initially.
+	  TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
 
+config SPL_LOAD_FIT
+	bool "Enable SPL loading U-Boot as a FIT"
+	depends on FIT
+	help
+	  Normally with the SPL framework a legacy image is generated as part
+	  of the build. This contains U-Boot along with information as to
+	  where it should be loaded. This option instead enables generation
+	  of a FIT (Flat Image Tree) which provides more flexibility. In
+	  particular it can handle selecting from multiple device tree
+	  and passing the correct one to U-Boot.
 
+config SPL_FIT_IMAGE_POST_PROCESS
+	bool "Enable post-processing of FIT artifacts after loading by the SPL"
+	depends on SPL_LOAD_FIT && TI_SECURE_DEVICE
+	help
+	  Allows doing any sort of manipulation to blobs after they got extracted
+	  from the U-Boot FIT image like stripping off headers or modifying the
+	  size of the blob, verification, authentication, decryption etc. in a
+	  platform or board specific way. In order to use this feature a platform
+	  or board-specific implementation of board_fit_image_post_process() must
+	  be provided. Also, anything done during this post-processing step would
+	  need to be comprehended in how the images were prepared before being
+	  injected into the FIT creation (i.e. the blobs would have been pre-
+	  processed before being added to the FIT image).
+
+config FIT_IMAGE_POST_PROCESS
+	bool "Enable post-processing of FIT artifacts after loading by U-Boot"
+	depends on FIT && TI_SECURE_DEVICE
+	help
+	  Allows doing any sort of manipulation to blobs after they got extracted
+	  from FIT images like stripping off headers or modifying the size of the
+	  blob, verification, authentication, decryption etc. in a platform or
+	  board specific way. In order to use this feature a platform or board-
+	  specific implementation of board_fit_image_post_process() must be
+	  provided. Also, anything done during this post-processing step would
+	  need to be comprehended in how the images were prepared before being
+	  injected into the FIT creation (i.e. the blobs would have been pre-
+	  processed before being added to the FIT image).
 
 config SYS_CLK_FREQ
-	depends on ARC || ARCH_SUNXI || MPC83xx
+	depends on ARC || ARCH_SUNXI
 	int "CPU clock frequency"
 	help
 	  TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
 
-config ARCH_FIXUP_FDT_MEMORY
-	bool "Enable arch_fixup_memory_banks() call"
+config ARCH_FIXUP_FDT
+	bool "Enable arch_fixup_fdt() call"
+	depends on ARM || MIPS
 	default y
 	help
 	  Enable FDT memory map syncup before OS boot. This feature can be
@@ -574,18 +376,12 @@ config ARCH_FIXUP_FDT_MEMORY
 
 endmenu		# Boot images
 
-source "api/Kconfig"
-
 source "common/Kconfig"
 
 source "cmd/Kconfig"
 
-source "disk/Kconfig"
-
 source "dts/Kconfig"
 
-source "env/Kconfig"
-
 source "net/Kconfig"
 
 source "drivers/Kconfig"

Licenses/README

@@ -1,5 +1,3 @@
-SPDX-License-Identifier: GPL-2.0
-
   U-Boot is Free Software.  It is copyrighted by Wolfgang Denk and
 many others who contributed code (see the actual source code and the
 git commit messages for details).  You can redistribute U-Boot and/or
@@ -33,107 +31,27 @@ information, ...) which makes automatic processing a nightmare.
 
 To make this easier, such license headers in the source files will be
 replaced with a single line reference to Unique License Identifiers
-as defined by the Linux Foundation's SPDX project [1].
+as defined by the Linux Foundation's SPDX project [1].  For example,
+in a source file the full "GPL v2.0 or later" header text will be
+replaced by a single line:
+
+	SPDX-License-Identifier:	GPL-2.0+
+
+Ideally, the license terms of all files in the source tree should be
+defined by such License Identifiers; in no case a file can contain
+more than one such License Identifier list.
 
 If a "SPDX-License-Identifier:" line references more than one Unique
 License Identifier, then this means that the respective file can be
 used under the terms of either of these licenses, i. e. with
 
-	SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+	SPDX-License-Identifier:	GPL-2.0+	BSD-3-Clause
 
 you can choose between GPL-2.0+ and BSD-3-Clause licensing.
 
 We use the SPDX Unique License Identifiers here; these are available
 at [2].
 
-License identifier syntax
--------------------------
-
-1. Placement:
-
-   The SPDX license identifier in U-Boot files shall be added at the first
-   possible line in a file which can contain a comment.  For the majority
-   or files this is the first line, except for scripts which require the
-   '#!PATH_TO_INTERPRETER' in the first line.  For those scripts the SPDX
-   identifier goes into the second line.
-
-|
-
-2. Style:
-
-   The SPDX license identifier is added in form of a comment.  The comment
-   style depends on the file type::
-
-      C source:	// SPDX-License-Identifier: <SPDX License Expression>
-      C header:	/* SPDX-License-Identifier: <SPDX License Expression> */
-      ASM:	/* SPDX-License-Identifier: <SPDX License Expression> */
-      scripts:	# SPDX-License-Identifier: <SPDX License Expression>
-      .rst:	.. SPDX-License-Identifier: <SPDX License Expression>
-      .dts{i}:	// SPDX-License-Identifier: <SPDX License Expression>
-
-   If a specific tool cannot handle the standard comment style, then the
-   appropriate comment mechanism which the tool accepts shall be used. This
-   is the reason for having the "/\* \*/" style comment in C header
-   files. There was build breakage observed with generated .lds files where
-   'ld' failed to parse the C++ comment. This has been fixed by now, but
-   there are still older assembler tools which cannot handle C++ style
-   comments.
-
-|
-
-3. Syntax:
-
-   A <SPDX License Expression> is either an SPDX short form license
-   identifier found on the SPDX License List, or the combination of two
-   SPDX short form license identifiers separated by "WITH" when a license
-   exception applies. When multiple licenses apply, an expression consists
-   of keywords "AND", "OR" separating sub-expressions and surrounded by
-   "(", ")" .
-
-   License identifiers for licenses like [L]GPL with the 'or later' option
-   are constructed by using a "+" for indicating the 'or later' option.::
-
-      // SPDX-License-Identifier: GPL-2.0+
-      // SPDX-License-Identifier: LGPL-2.1+
-
-   WITH should be used when there is a modifier to a license needed.
-   For example, the linux kernel UAPI files use the expression::
-
-      // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
-      // SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note
-
-   Other examples using WITH exceptions found in the linux kernel are::
-
-      // SPDX-License-Identifier: GPL-2.0 WITH mif-exception
-      // SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
-
-   Exceptions can only be used with particular License identifiers. The
-   valid License identifiers are listed in the tags of the exception text
-   file.
-
-   OR should be used if the file is dual licensed and only one license is
-   to be selected.  For example, some dtsi files are available under dual
-   licenses::
-
-      // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
-
-   Examples from U-Boot for license expressions in dual licensed files::
-
-      // SPDX-License-Identifier: GPL-2.0 OR MIT
-      // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-
-   AND should be used if the file has multiple licenses whose terms all
-   apply to use the file. For example, if code is inherited from another
-   project and permission has been given to put it in U-Boot, but the
-   original license terms need to remain in effect::
-
-      // SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT
-
-   Another other example where both sets of license terms need to be
-   adhered to is::
-
-      // SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+
-
 [1] http://spdx.org/
 [2] http://spdx.org/licenses/
 

Licenses/r8a779x_usb3.txt

@@ -1,26 +0,0 @@
-Copyright (c) 2014, Renesas Electronics Corporation
-All rights reserved.
-
-Redistribution and use in binary form, without modification, are permitted
-provided that the following conditions are met:
-
-1. Redistribution in binary form must reproduce the above copyright notice,
-   this list of conditions and the following disclaimer in the documentation
-   and/or other materials provided with the distribution.
-2. The name of Renesas Electronics Corporation may not be used to endorse or
-   promote products derived from this software without specific prior written
-   permission.
-3. Reverse engineering, decompilation, or disassembly of this software is
-   not permitted.
-
-THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND
-NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS
-CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
-OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.

api/Kconfig

@@ -1,9 +0,0 @@
-menu "API"
-
-config API
-	bool "Enable U-Boot API"
-	default n
-	help
-	  This option enables the U-Boot API. See api/README for more information.
-
-endmenu

api/Makefile

@@ -1,6 +1,8 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2007 Semihalf
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj-y += api.o api_display.o api_net.o api_storage.o
 obj-$(CONFIG_ARM) += api_platform-arm.o

api/api.c

@@ -1,19 +1,18 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 #include <command.h>
 #include <common.h>
-#include <env.h>
 #include <malloc.h>
-#include <env_internal.h>
+#include <environment.h>
 #include <linux/types.h>
 #include <api_public.h>
-#include <u-boot/crc.h>
 
 #include "api_private.h"
 
@@ -296,31 +295,27 @@ static int API_dev_close(va_list ap)
 
 
 /*
+ * Notice: this is for sending network packets only, as U-Boot does not
+ * support writing to storage at the moment (12.2007)
+ *
  * pseudo signature:
  *
  * int API_dev_write(
  *	struct device_info *di,
  *	void *buf,
- *	int *len,
- *	unsigned long *start
+ *	int *len
  * )
  *
  * buf:	ptr to buffer from where to get the data to send
  *
- * len: ptr to length to be read
- *      - network: len of packet to be sent (in bytes)
- *      - storage: # of blocks to write (can vary in size depending on define)
+ * len: length of packet to be sent (in bytes)
  *
- * start: ptr to start block (only used for storage devices, ignored for
- *        network)
  */
 static int API_dev_write(va_list ap)
 {
 	struct device_info *di;
 	void *buf;
-	lbasize_t *len_stor, act_len_stor;
-	lbastart_t *start;
-	int *len_net;
+	int *len;
 	int err = 0;
 
 	/* 1. arg is ptr to the device_info struct */
@@ -338,36 +333,23 @@ static int API_dev_write(va_list ap)
 	if (buf == NULL)
 		return API_EINVAL;
 
-	if (di->type & DEV_TYP_STOR) {
-		/* 3. arg - ptr to var with # of blocks to write */
-		len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
-		if (!len_stor)
-			return API_EINVAL;
-		if (*len_stor <= 0)
-			return API_EINVAL;
+	/* 3. arg is length of buffer */
+	len = (int *)va_arg(ap, uintptr_t);
+	if (len == NULL)
+		return API_EINVAL;
+	if (*len <= 0)
+		return API_EINVAL;
 
-		/* 4. arg - ptr to var with start block */
-		start = (lbastart_t *)va_arg(ap, uintptr_t);
+	if (di->type & DEV_TYP_STOR)
+		/*
+		 * write to storage is currently not supported by U-Boot:
+		 * no storage device implements block_write() method
+		 */
+		return API_ENODEV;
 
-		act_len_stor = dev_write_stor(di->cookie, buf, *len_stor, *start);
-		if (act_len_stor != *len_stor) {
-			debugf("write @ %llu: done %llu out of %llu blocks",
-				   (uint64_t)blk, (uint64_t)act_len_stor,
-				   (uint64_t)len_stor);
-			return API_EIO;
-		}
-
-	} else if (di->type & DEV_TYP_NET) {
-		/* 3. arg points to the var with length of packet to write */
-		len_net = (int *)va_arg(ap, uintptr_t);
-		if (!len_net)
-			return API_EINVAL;
-		if (*len_net <= 0)
-			return API_EINVAL;
-
-		err = dev_write_net(di->cookie, buf, *len_net);
-
-	} else
+	else if (di->type & DEV_TYP_NET)
+		err = dev_write_net(di->cookie, buf, *len);
+	else
 		err = API_ENODEV;
 
 	return err;
@@ -476,7 +458,7 @@ static int API_env_get(va_list ap)
 	if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
 		return API_EINVAL;
 
-	*value = env_get(name);
+	*value = getenv(name);
 
 	return 0;
 }
@@ -499,7 +481,7 @@ static int API_env_set(va_list ap)
 	if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
 		return API_EINVAL;
 
-	env_set(name, value);
+	setenv(name, value);
 
 	return 0;
 }
@@ -513,47 +495,45 @@ static int API_env_set(va_list ap)
  */
 static int API_env_enum(va_list ap)
 {
-	int i, buflen;
-	char *last, **next, *s;
-	struct env_entry *match, search;
-	static char *var;
+	int i, n;
+	char *last, **next;
 
 	last = (char *)va_arg(ap, unsigned long);
 
 	if ((next = (char **)va_arg(ap, uintptr_t)) == NULL)
 		return API_EINVAL;
 
-	if (last == NULL) {
-		var = NULL;
-		i = 0;
-	} else {
-		var = strdup(last);
-		s = strchr(var, '=');
-		if (s != NULL)
-			*s = 0;
-		search.key = var;
-		i = hsearch_r(search, ENV_FIND, &match, &env_htab, 0);
-		if (i == 0) {
-			i = API_EINVAL;
-			goto done;
+	if (last == NULL)
+		/* start over */
+		*next = ((char *)env_get_addr(0));
+	else {
+		*next = last;
+
+		for (i = 0; env_get_char(i) != '\0'; i = n + 1) {
+			for (n = i; env_get_char(n) != '\0'; ++n) {
+				if (n >= CONFIG_ENV_SIZE) {
+					/* XXX shouldn't we set *next = NULL?? */
+					return 0;
+				}
+			}
+
+			if (envmatch((uchar *)last, i) < 0)
+				continue;
+
+			/* try to get next name */
+			i = n + 1;
+			if (env_get_char(i) == '\0') {
+				/* no more left */
+				*next = NULL;
+				return 0;
+			}
+
+			*next = ((char *)env_get_addr(i));
+			return 0;
 		}
 	}
 
-	/* match the next entry after i */
-	i = hmatch_r("", i, &match, &env_htab);
-	if (i == 0)
-		goto done;
-	buflen = strlen(match->key) + strlen(match->data) + 2;
-	var = realloc(var, buflen);
-	snprintf(var, buflen, "%s=%s", match->key, match->data);
-	*next = var;
 	return 0;
-
-done:
-	free(var);
-	var = NULL;
-	*next = NULL;
-	return i;
 }
 
 /*
@@ -643,7 +623,7 @@ int syscall(int call, int *retval, ...)
 
 void api_init(void)
 {
-	struct api_signature *sig;
+	struct api_signature *sig = NULL;
 
 	/* TODO put this into linker set one day... */
 	calls_table[API_RSVD] = NULL;
@@ -681,7 +661,7 @@ void api_init(void)
 		return;
 	}
 
-	env_set_hex("api_address", (unsigned long)sig);
+	setenv_hex("api_address", (unsigned long)sig);
 	debugf("API sig @ 0x%lX\n", (unsigned long)sig);
 	memcpy(sig->magic, API_SIG_MAGIC, 8);
 	sig->version = API_SIG_VERSION;

api/api_display.c

@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2011 The Chromium OS Authors.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>

api/api_net.c

@@ -1,8 +1,9 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
@@ -11,6 +12,8 @@
 #include <linux/types.h>
 #include <api_public.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define DEBUG
 #undef DEBUG
 

api/api_platform-arm.c

@@ -1,9 +1,10 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
  * This file contains routines that fetch data from ARM-dependent sources
  * (bd_info etc.)
  */

api/api_platform-mips.c

@@ -1,7 +1,8 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com>
  *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
  * This file contains routines that fetch data from bd_info sources
  */
 

api/api_platform-powerpc.c

@@ -1,9 +1,10 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
  *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
  * This file contains routines that fetch data from PowerPC-dependent sources
  * (bd_info etc.)
  */
@@ -29,8 +30,11 @@ int platform_sys_info(struct sys_info *si)
 	si->clk_bus = gd->bus_clk;
 	si->clk_cpu = gd->cpu_clk;
 
-#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
+    defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 #define bi_bar	bi_immr_base
+#elif defined(CONFIG_MPC5xxx)
+#define bi_bar	bi_mbar_base
 #elif defined(CONFIG_MPC83xx)
 #define bi_bar	bi_immrbar
 #endif

api/api_private.h

@@ -1,8 +1,9 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2007 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _API_PRIVATE_H_
@@ -22,7 +23,6 @@ int	dev_close_stor(void *);
 int	dev_close_net(void *);
 
 lbasize_t	dev_read_stor(void *, void *, lbasize_t, lbastart_t);
-lbasize_t	dev_write_stor(void *, void *, lbasize_t, lbastart_t);
 int		dev_read_net(void *, void *, int);
 int		dev_write_net(void *, void *, int);
 

api/api_storage.c

@@ -1,8 +1,9 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007-2008 Semihalf
  *
  * Written by: Rafal Jaworowski <raj@semihalf.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
@@ -36,19 +37,16 @@ struct stor_spec {
 	int		max_dev;
 	int		enum_started;
 	int		enum_ended;
-	int		type;	/* "external" type: DT_STOR_{IDE,USB,etc} */
+	int		type;		/* "external" type: DT_STOR_{IDE,USB,etc} */
 	char		*name;
 };
 
-static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, NULL }, };
+static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
 
-#ifndef CONFIG_SYS_MMC_MAX_DEVICE
-#define CONFIG_SYS_MMC_MAX_DEVICE	1
-#endif
 
 void dev_stor_init(void)
 {
-#if defined(CONFIG_IDE)
+#if defined(CONFIG_CMD_IDE)
 	specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
 	specs[ENUM_IDE].enum_started = 0;
 	specs[ENUM_IDE].enum_ended = 0;
@@ -62,7 +60,7 @@ void dev_stor_init(void)
 	specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
 	specs[ENUM_MMC].name = "mmc";
 #endif
-#if defined(CONFIG_SATA)
+#if defined(CONFIG_CMD_SATA)
 	specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
 	specs[ENUM_SATA].enum_started = 0;
 	specs[ENUM_SATA].enum_ended = 0;
@@ -90,72 +88,88 @@ void dev_stor_init(void)
  *
  * type:	storage group type - ENUM_IDE, ENUM_SCSI etc.
  *
+ * first:	if 1 the first device in the storage group is returned (if
+ *              exists), if 0 the next available device is searched
+ *
  * more:	returns 0/1 depending if there are more devices in this group
  *		available (for future iterations)
  *
  * returns:	0/1 depending if device found in this iteration
  */
-static int dev_stor_get(int type, int *more, struct device_info *di)
+static int dev_stor_get(int type, int first, int *more, struct device_info *di)
 {
-	struct blk_desc *dd;
 	int found = 0;
-	int found_last = 0;
-	int i = 0;
+	*more = 0;
 
-	/* Wasn't configured for this type, return 0 directly */
-	if (specs[type].name == NULL)
-		return 0;
+	int i;
 
-	if (di->cookie != NULL) {
-		/* Find the last device we've returned  */
-		for (i = 0; i < specs[type].max_dev; i++) {
+	struct blk_desc *dd;
+
+	if (first) {
+		di->cookie = (void *)blk_get_dev(specs[type].name, 0);
+		if (di->cookie == NULL)
+			return 0;
+		else
+			found = 1;
+
+		/* provide hint if there are more devices in
+		 * this group to enumerate */
+		if (1 < specs[type].max_dev)
+			*more = 1;
+
+	} else {
+		for (i = 0; i < specs[type].max_dev; i++)
 			if (di->cookie ==
 			    (void *)blk_get_dev(specs[type].name, i)) {
-				i += 1;
-				found_last = 1;
+				/* previous cookie found -- advance to the
+				 * next device, if possible */
+
+				if (++i >= specs[type].max_dev) {
+					/* out of range, no more to enum */
+					di->cookie = NULL;
+					break;
+				}
+
+				di->cookie = (void *)blk_get_dev(
+							specs[type].name, i);
+				if (di->cookie == NULL)
+					return 0;
+				else
+					found = 1;
+
+				/* provide hint if there are more devices in
+				 * this group to enumerate */
+				if ((i + 1) < specs[type].max_dev)
+					*more = 1;
+
 				break;
 			}
-		}
-
-		if (!found_last)
-			i = 0;
 	}
 
-	for (; i < specs[type].max_dev; i++) {
-		di->cookie = (void *)blk_get_dev(specs[type].name, i);
-
-		if (di->cookie != NULL) {
-			found = 1;
-			break;
-		}
-	}
-
-	if (i == specs[type].max_dev)
-		*more = 0;
-	else
-		*more = 1;
-
 	if (found) {
 		di->type = specs[type].type;
 
-		dd = (struct blk_desc *)di->cookie;
-		if (dd->type == DEV_TYPE_UNKNOWN) {
-			debugf("device instance exists, but is not active..");
-			found = 0;
-		} else {
-			di->di_stor.block_count = dd->lba;
-			di->di_stor.block_size = dd->blksz;
+		if (di->cookie != NULL) {
+			dd = (struct blk_desc *)di->cookie;
+			if (dd->type == DEV_TYPE_UNKNOWN) {
+				debugf("device instance exists, but is not active..");
+				found = 0;
+			} else {
+				di->di_stor.block_count = dd->lba;
+				di->di_stor.block_size = dd->blksz;
+			}
 		}
-	} else {
+
+	} else
 		di->cookie = NULL;
-	}
 
 	return found;
 }
 
 
-/* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc */
-
+/*
+ * returns:	ENUM_IDE, ENUM_USB etc. based on struct blk_desc
+ */
 static int dev_stor_type(struct blk_desc *dd)
 {
 	int i, j;
@@ -169,8 +183,9 @@ static int dev_stor_type(struct blk_desc *dd)
 }
 
 
-/* returns: 0/1 whether cookie points to some device in this group */
-
+/*
+ * returns:	0/1 whether cookie points to some device in this group
+ */
 static int dev_is_stor(int type, struct device_info *di)
 {
 	return (dev_stor_type(di->cookie) == type) ? 1 : 0;
@@ -201,16 +216,18 @@ static int dev_enum_stor(int type, struct device_info *di)
 	 */
 
 	if (di->cookie == NULL) {
+
 		debugf("group%d - enum restart\n", type);
 
 		/*
 		 * 1. Enumeration (re-)started: take the first available
 		 * device, if exists
 		 */
-		found = dev_stor_get(type, &more, di);
+		found = dev_stor_get(type, 1, &more, di);
 		specs[type].enum_started = 1;
 
 	} else if (dev_is_stor(type, di)) {
+
 		debugf("group%d - enum continued for the next device\n", type);
 
 		if (specs[type].enum_ended) {
@@ -219,9 +236,10 @@ static int dev_enum_stor(int type, struct device_info *di)
 		}
 
 		/* 2a. Attempt to take a next available device in the group */
-		found = dev_stor_get(type, &more, di);
+		found = dev_stor_get(type, 0, &more, di);
 
 	} else {
+
 		if (specs[type].enum_ended) {
 			debugf("group %d - already enumerated, skipping\n", type);
 			return 0;
@@ -233,7 +251,7 @@ static int dev_enum_stor(int type, struct device_info *di)
 			/*
 			 * 2b.  If enumerating devices in this group did not
 			 * happen before, it means the cookie pointed to a
-			 * device from some other group (another storage
+			 * device frome some other group (another storage
 			 * group, or network); in this case try to take the
 			 * first available device from our group
 			 */
@@ -243,7 +261,7 @@ static int dev_enum_stor(int type, struct device_info *di)
 			 * Attempt to take the first device in this group:
 			 *'first element' flag is set
 			 */
-			found = dev_stor_get(type, &more, di);
+			found = dev_stor_get(type, 1, &more, di);
 
 		} else {
 			errf("group%d - out of order iteration\n", type);
@@ -260,7 +278,7 @@ static int dev_enum_stor(int type, struct device_info *di)
 
 	if (found)
 		debugf("device found, returning cookie 0x%08x\n",
-		       (u_int32_t)di->cookie);
+			(u_int32_t)di->cookie);
 	else
 		debugf("no device found\n");
 
@@ -281,7 +299,9 @@ int dev_enum_storage(struct device_info *di)
 {
 	int i;
 
-	/* check: ide, usb, scsi, mmc */
+	/*
+	 * check: ide, usb, scsi, mmc
+	 */
 	for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
 		if (dev_enum_stor(i, di))
 			return 1;
@@ -338,38 +358,10 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start
 	if (!dev_stor_is_valid(type, dd))
 		return 0;
 
-#ifdef CONFIG_BLK
-	return blk_dread(dd, start, len, buf);
-#else
 	if ((dd->block_read) == NULL) {
 		debugf("no block_read() for device 0x%08x\n", cookie);
 		return 0;
 	}
 
 	return dd->block_read(dd, start, len, buf);
-#endif	/* defined(CONFIG_BLK) */
-}
-
-
-lbasize_t dev_write_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
-{
-	struct blk_desc *dd = (struct blk_desc *)cookie;
-	int type = dev_stor_type(dd);
-
-	if (type == ENUM_MAX)
-		return 0;
-
-	if (!dev_stor_is_valid(type, dd))
-		return 0;
-
-#ifdef CONFIG_BLK
-	return blk_dwrite(dd, start, len, buf);
-#else
-	if (dd->block_write == NULL) {
-		debugf("no block_write() for device 0x%08x\n", cookie);
-		return 0;
-	}
-
-	return dd->block_write(dd, start, len, buf);
-#endif	/* defined(CONFIG_BLK) */
 }

arch/Kconfig

@@ -10,12 +10,8 @@ choice
 
 config ARC
 	bool "ARC architecture"
-	select ARCH_EARLY_INIT_R
-	select ARC_TIMER
-	select CLK
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
-	select TIMER
 
 config ARM
 	bool "ARM architecture"
@@ -23,17 +19,20 @@ config ARM
 	select HAVE_PRIVATE_LIBGCC if !ARM64
 	select SUPPORT_OF_CONTROL
 
+config AVR32
+	bool "AVR32 architecture"
+	select CREATE_ARCH_SYMLINK
+
+config BLACKFIN
+	bool "Blackfin architecture"
+
 config M68K
 	bool "M68000 architecture"
 	select HAVE_PRIVATE_LIBGCC
-	select SYS_BOOT_GET_CMDLINE
-	select SYS_BOOT_GET_KBD
-	select SUPPORT_OF_CONTROL
 
 config MICROBLAZE
 	bool "MicroBlaze architecture"
 	select SUPPORT_OF_CONTROL
-	imply CMD_IRQ
 
 config MIPS
 	bool "MIPS architecture"
@@ -43,175 +42,51 @@ config MIPS
 
 config NDS32
 	bool "NDS32 architecture"
-	select SUPPORT_OF_CONTROL
 
 config NIOS2
 	bool "Nios II architecture"
-	select CPU
-	select DM
-	select OF_CONTROL
 	select SUPPORT_OF_CONTROL
-	imply CMD_DM
+	select OF_CONTROL
+	select DM
+	select CPU
+
+config OPENRISC
+	bool "OpenRISC architecture"
 
 config PPC
 	bool "PowerPC architecture"
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
-	select SYS_BOOT_GET_CMDLINE
-	select SYS_BOOT_GET_KBD
-
-config RISCV
-	bool "RISC-V architecture"
-	select CREATE_ARCH_SYMLINK
-	select SUPPORT_OF_CONTROL
-	select OF_CONTROL
-	select DM
-	imply DM_SERIAL
-	imply DM_ETH
-	imply DM_MMC
-	imply DM_SPI
-	imply DM_SPI_FLASH
-	imply BLK
-	imply CLK
-	imply MTD
-	imply TIMER
-	imply CMD_DM
-	imply SPL_DM
-	imply SPL_OF_CONTROL
-	imply SPL_LIBCOMMON_SUPPORT
-	imply SPL_LIBGENERIC_SUPPORT
-	imply SPL_SERIAL_SUPPORT
-	imply SPL_TIMER
 
 config SANDBOX
 	bool "Sandbox"
-	select BOARD_LATE_INIT
-	select DM
-	select DM_GPIO
-	select DM_I2C
-	select DM_KEYBOARD
-	select DM_MMC
-	select DM_SERIAL
-	select DM_SPI
-	select DM_SPI_FLASH
-	select HAVE_BLOCK_DEVICE
-	select LZO
-	select PCI_ENDPOINT
-	select SPI
 	select SUPPORT_OF_CONTROL
-	select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
-	imply BITREVERSE
-	select BLOBLIST
-	imply CMD_DM
-	imply CMD_GETTIME
-	imply CMD_HASH
-	imply CMD_IO
-	imply CMD_IOTRACE
-	imply CMD_LZMADEC
-	imply CMD_SATA
-	imply CMD_SF
-	imply CMD_SF_TEST
-	imply CRC32_VERIFY
-	imply FAT_WRITE
-	imply FIRMWARE
-	imply HASH_VERIFY
-	imply LZMA
-	imply SCSI
-	imply TEE
-	imply AVB_VERIFY
-	imply LIBAVB
-	imply CMD_AVB
-	imply UDP_FUNCTION_FASTBOOT
-	imply VIRTIO_MMIO
-	imply VIRTIO_PCI
-	imply VIRTIO_SANDBOX
-	imply VIRTIO_BLK
-	imply VIRTIO_NET
-	imply DM_SOUND
-	imply PCI_SANDBOX_EP
-	imply PCH
-	imply PHYLIB
-	imply DM_MDIO
-	imply DM_MDIO_MUX
+	select DM
+	select DM_SPI_FLASH
+	select DM_SERIAL
+	select DM_I2C
+	select DM_SPI
+	select DM_GPIO
+	select DM_MMC
 
 config SH
 	bool "SuperH architecture"
 	select HAVE_PRIVATE_LIBGCC
-	select SUPPORT_OF_CONTROL
+
+config SPARC
+	bool "SPARC architecture"
+	select CREATE_ARCH_SYMLINK
 
 config X86
 	bool "x86 architecture"
-	select SUPPORT_SPL
-	select SUPPORT_TPL
 	select CREATE_ARCH_SYMLINK
-	select DM
-	select DM_PCI
-	select HAVE_ARCH_IOMAP
 	select HAVE_PRIVATE_LIBGCC
-	select OF_CONTROL
-	select PCI
 	select SUPPORT_OF_CONTROL
-	select TIMER
-	select USE_PRIVATE_LIBGCC
-	select X86_TSC_TIMER
-	imply BLK
-	imply CMD_DM
-	imply CMD_FPGA_LOADMK
-	imply CMD_GETTIME
-	imply CMD_IO
-	imply CMD_IRQ
-	imply CMD_PCI
-	imply CMD_SF
-	imply CMD_SF_TEST
-	imply CMD_ZBOOT
-	imply DM_ETH
-	imply DM_GPIO
-	imply DM_KEYBOARD
-	imply DM_MMC
-	imply DM_RTC
-	imply DM_SCSI
-	imply DM_SERIAL
-	imply DM_SPI
-	imply DM_SPI_FLASH
-	imply DM_USB
-	imply DM_VIDEO
-	imply SYSRESET
-	imply SPL_SYSRESET
-	imply SYSRESET_X86
-	imply USB_ETHER_ASIX
-	imply USB_ETHER_SMSC95XX
-	imply USB_HOST_ETHER
-	imply PCH
-	imply RTC_MC146818
-
-	# Thing to enable for when SPL/TPL are enabled: SPL
-	imply SPL_DM
-	imply SPL_OF_LIBFDT
-	imply SPL_DRIVERS_MISC_SUPPORT
-	imply SPL_GPIO_SUPPORT
-	imply SPL_LIBCOMMON_SUPPORT
-	imply SPL_LIBGENERIC_SUPPORT
-	imply SPL_SERIAL_SUPPORT
-	imply SPL_SPI_FLASH_SUPPORT
-	imply SPL_SPI_SUPPORT
-	imply SPL_OF_CONTROL
-	imply SPL_TIMER
-	imply SPL_REGMAP
-	imply SPL_SYSCON
-	# TPL
-	imply TPL_DM
-	imply TPL_OF_LIBFDT
-	imply TPL_DRIVERS_MISC_SUPPORT
-	imply TPL_GPIO_SUPPORT
-	imply TPL_LIBCOMMON_SUPPORT
-	imply TPL_LIBGENERIC_SUPPORT
-	imply TPL_SERIAL_SUPPORT
-	imply TPL_SPI_FLASH_SUPPORT
-	imply TPL_SPI_SUPPORT
-	imply TPL_OF_CONTROL
-	imply TPL_TIMER
-	imply TPL_REGMAP
-	imply TPL_SYSCON
+	select DM
+	select DM_SERIAL
+	select DM_GPIO
+	select DM_SPI
+	select DM_SPI_FLASH
 
 config XTENSA
 	bool "Xtensa architecture"
@@ -276,25 +151,19 @@ config SYS_CONFIG_NAME
 	  The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
 	  should be included from include/config.h.
 
-config SYS_DISABLE_DCACHE_OPS
-	bool
-	help
-	 This option disables dcache flush and dcache invalidation
-	 operations. For example, on coherent systems where cache
-	 operatios are not required, enable this option to avoid them.
-	 Note that, its up to the individual architectures to implement
-	 this functionality.
-
 source "arch/arc/Kconfig"
 source "arch/arm/Kconfig"
+source "arch/avr32/Kconfig"
+source "arch/blackfin/Kconfig"
 source "arch/m68k/Kconfig"
 source "arch/microblaze/Kconfig"
 source "arch/mips/Kconfig"
 source "arch/nds32/Kconfig"
 source "arch/nios2/Kconfig"
+source "arch/openrisc/Kconfig"
 source "arch/powerpc/Kconfig"
 source "arch/sandbox/Kconfig"
 source "arch/sh/Kconfig"
+source "arch/sparc/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
-source "arch/riscv/Kconfig"

arch/arc/Kconfig

@@ -31,36 +31,36 @@ choice
 
 config CPU_ARC750D
 	bool "ARC 750D"
-	depends on ISA_ARCOMPACT
 	select ARC_MMU_V2
+	depends on ISA_ARCOMPACT
 	help
 	  Choose this option to build an U-Boot for ARC750D CPU.
 
 config CPU_ARC770D
 	bool "ARC 770D"
-	depends on ISA_ARCOMPACT
 	select ARC_MMU_V3
+	depends on ISA_ARCOMPACT
 	help
 	  Choose this option to build an U-Boot for ARC770D CPU.
 
 config CPU_ARCEM6
 	bool "ARC EM6"
-	depends on ISA_ARCV2
 	select ARC_MMU_ABSENT
+	depends on ISA_ARCV2
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
 
 config CPU_ARCHS36
 	bool "ARC HS36"
-	depends on ISA_ARCV2
 	select ARC_MMU_ABSENT
+	depends on ISA_ARCV2
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
 
 config CPU_ARCHS38
 	bool "ARC HS38"
-	depends on ISA_ARCV2
 	select ARC_MMU_V4
+	depends on ISA_ARCV2
 	help
 	  Next Generation ARC Core based on ISA-v2 ISA with MMU.
 
@@ -109,52 +109,16 @@ config CPU_BIG_ENDIAN
 	  Build kernel for Big Endian Mode of ARC CPU
 
 config SYS_ICACHE_OFF
-	bool "Do not enable icache"
+	bool "Do not use Instruction Cache"
 	default n
-	help
-	  Do not enable instruction cache in U-Boot.
-
-config SPL_SYS_ICACHE_OFF
-	bool "Do not enable icache in SPL"
-	depends on SPL
-	default SYS_ICACHE_OFF
-	help
-	  Do not enable instruction cache in SPL.
 
 config SYS_DCACHE_OFF
-	bool "Do not enable dcache"
+	bool "Do not use Data Cache"
 	default n
-	help
-	  Do not enable data cache in U-Boot.
-
-config SPL_SYS_DCACHE_OFF
-	bool "Do not enable dcache in SPL"
-	depends on SPL
-	default SYS_DCACHE_OFF
-	help
-	  Do not enable data cache in SPL.
-
-menuconfig ARC_DBG
-	bool "ARC debugging"
-	default n
-
-if ARC_DBG
-
-config ARC_DBG_IOC_ENABLE
-	bool "Enable IO coherency unit"
-	depends on CPU_ARCHS38
-	default n
-	help
-	  Enable IO coherency unit to debug problems with caches and
-	  DMA peripherals.
-	  NOTE: as of today linux will not work properly if this option
-	  is enabled in u-boot!
-
-endif
 
 choice
 	prompt "Target select"
-	default TARGET_AXS103
+	default TARGET_AXS10X
 
 config TARGET_TB100
 	bool "Support tb100"
@@ -162,32 +126,13 @@ config TARGET_TB100
 config TARGET_NSIM
 	bool "Support standalone nSIM & Free nSIM"
 
-config TARGET_AXS101
-	bool "Support Synopsys Designware SDP board AXS101"
-	select BOUNCE_BUFFER if CMD_NAND
-
-config TARGET_AXS103
-	bool "Support Synopsys Designware SDP board AXS103"
-	select BOUNCE_BUFFER if CMD_NAND
-
-config TARGET_EMSDP
-	bool "Synopsys EM Software Development Platform"
-	select CPU_ARCEM6
-
-config TARGET_HSDK
-	bool "Support Synpsys HS DevelopmentKit board"
-
-config TARGET_IOT_DEVKIT
-	bool "Synopsys Brite IoT Development kit"
-	select CPU_ARCEM6
+config TARGET_AXS10X
+	bool "Support Synopsys Designware SDP board (AXS101 & AXS103)"
 
 endchoice
 
 source "board/abilis/tb100/Kconfig"
 source "board/synopsys/Kconfig"
 source "board/synopsys/axs10x/Kconfig"
-source "board/synopsys/emsdp/Kconfig"
-source "board/synopsys/hsdk/Kconfig"
-source "board/synopsys/iot_devkit/Kconfig"
 
 endmenu

arch/arc/Makefile

@@ -1,4 +1,6 @@
-# SPDX-License-Identifier: GPL-2.0+
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 libs-y += arch/arc/cpu/$(CPU)/
 libs-y += arch/arc/lib/

arch/arc/config.mk

@@ -1,6 +1,8 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 ifndef CONFIG_CPU_BIG_ENDIAN
 CONFIG_SYS_LITTLE_ENDIAN = 1
@@ -9,29 +11,35 @@ CONFIG_SYS_BIG_ENDIAN = 1
 endif
 
 ifdef CONFIG_SYS_LITTLE_ENDIAN
+ARC_CROSS_COMPILE := arc-linux-
 PLATFORM_LDFLAGS += -EL
 PLATFORM_CPPFLAGS += -mlittle-endian
 endif
 
 ifdef CONFIG_SYS_BIG_ENDIAN
+ARC_CROSS_COMPILE := arceb-linux-
 PLATFORM_LDFLAGS += -EB
 PLATFORM_CPPFLAGS += -mbig-endian
 endif
 
+ifeq ($(CROSS_COMPILE),)
+CROSS_COMPILE := $(ARC_CROSS_COMPILE)
+endif
+
 ifdef CONFIG_ARC_MMU_VER
 CONFIG_MMU = 1
 endif
 
 ifdef CONFIG_CPU_ARC750D
-PLATFORM_CPPFLAGS += -mcpu=arc700
+PLATFORM_CPPFLAGS += -marc700
 endif
 
 ifdef CONFIG_CPU_ARC770D
-PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape
+PLATFORM_CPPFLAGS += -marc700 -mlock -mswape
 endif
 
 ifdef CONFIG_CPU_ARCEM6
-PLATFORM_CPPFLAGS += -mcpu=arcem
+PLATFORM_CPPFLAGS += -marcem
 endif
 
 ifdef CONFIG_CPU_ARCHS34
@@ -42,11 +50,10 @@ ifdef CONFIG_CPU_ARCHS38
 PLATFORM_CPPFLAGS += -mcpu=archs
 endif
 
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
-PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
 
 # Needed for relocation
-LDFLAGS_FINAL += -pie --gc-sections
+LDFLAGS_FINAL += -pie
 
 # Load address for standalone apps
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

arch/arc/cpu/arcv1/Makefile

@@ -1,5 +1,7 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj-y += ivt.o

arch/arc/cpu/arcv1/ivt.S

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "ax",@progbits

arch/arc/cpu/arcv2/Makefile

@@ -1,5 +1,7 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj-y += ivt.o

arch/arc/cpu/arcv2/ivt.S

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 .section .ivt, "a",@progbits

arch/arc/cpu/u-boot.lds

@@ -1,26 +1,18 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 
-OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
+OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
 OUTPUT_ARCH(arc)
 ENTRY(_start)
 SECTIONS
 {
 	. = CONFIG_SYS_TEXT_BASE;
 	__image_copy_start = .;
-	. = ALIGN(1024);
-	__ivt_start = .;
-	.ivt :
-	{
-		KEEP(*(.ivt))
-	}
-	__ivt_end = .;
-
-	. = ALIGN(1024);
 	__text_start = .;
 	.text :	{
 		arch/arc/lib/start.o (.text*)
@@ -28,6 +20,14 @@ SECTIONS
 	}
 	__text_end = .;
 
+	. = ALIGN(1024);
+	__ivt_start = .;
+	.ivt :
+	{
+		*(.ivt)
+	}
+	__ivt_end = .;
+
 	. = ALIGN(4);
 	.rodata : {
 		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

arch/arc/dts/.gitignore

@@ -0,0 +1 @@
+*.dtb

arch/arc/dts/Makefile

@@ -1,12 +1,10 @@
-# SPDX-License-Identifier: GPL-2.0+
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
-dtb-$(CONFIG_TARGET_AXS101) +=  axs101.dtb
-dtb-$(CONFIG_TARGET_AXS103) +=  axs103.dtb
+dtb-$(CONFIG_TARGET_AXS10X) +=  axs10x.dtb
 dtb-$(CONFIG_TARGET_NSIM) +=  nsim.dtb
 dtb-$(CONFIG_TARGET_TB100) +=  abilis_tb100.dtb
-dtb-$(CONFIG_TARGET_EMSDP) +=  emsdp.dtb
-dtb-$(CONFIG_TARGET_HSDK) +=  hsdk.dtb
-dtb-$(CONFIG_TARGET_IOT_DEVKIT) +=  iot_devkit.dtb
 
 targets += $(dtb-y)
 

arch/arc/dts/abilis_tb100.dts

@@ -1,27 +1,20 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 
 #include "skeleton.dtsi"
 
 / {
-	model = "abilis,tb100";
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	aliases {
 		console = &uart0;
 	};
 
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <500000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-
 	uart0: serial@ff100000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff100000 0x1000>;

arch/arc/dts/axc001.dtsi

@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <750000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-};
-

arch/arc/dts/axc003.dtsi

@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <100000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-};
-

arch/arc/dts/axs101.dts

@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-/dts-v1/;
-
-/include/ "axc001.dtsi"
-/include/ "axs10x_mb.dtsi"
-
-
-/ {
-	model = "snps,axs101";
-
-	chosen {
-		stdout-path = &uart0;
-	};
-};
-

arch/arc/dts/axs103.dts

@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-/dts-v1/;
-
-/include/ "axc003.dtsi"
-/include/ "axs10x_mb.dtsi"
-
-
-/ {
-	model = "snps,axs103";
-
-	chosen {
-		stdout-path = &uart0;
-	};
-};
-

arch/arc/dts/axs10x.dts

@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		console = &uart0;
+	};
+
+	clocks {
+		apbclk: apbclk {
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	uart0: serial0@e0022000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0xe0022000 0x1000>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+
+	ethernet@e0018000 {
+		#interrupt-cells = <1>;
+		compatible = "altr,socfpga-stmmac";
+		reg = < 0xe0018000 0x2000 >;
+		interrupts = < 25 >;
+		interrupt-names = "macirq";
+		phy-mode = "gmii";
+		snps,pbl = < 32 >;
+		clocks = <&apbclk>;
+		clock-names = "stmmaceth";
+		max-speed = <100>;
+	};
+
+	ehci@0xe0040000 {
+		compatible = "generic-ehci";
+		reg = < 0xe0040000 0x100 >;
+		interrupts = < 8 >;
+	};
+
+	ohci@0xe0060000 {
+		compatible = "generic-ohci";
+		reg = < 0xe0060000 0x100 >;
+		interrupts = < 8 >;
+	};
+};

arch/arc/dts/axs10x_mb.dtsi

@@ -1,122 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-
-/ {
-	aliases {
-		spi0 = &spi0;
-	};
-
-	axs10x_mb@e0000000 {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0x00000000 0xe0000000 0x10000000>;
-		u-boot,dm-pre-reloc;
-
-		clocks {
-			compatible = "simple-bus";
-			u-boot,dm-pre-reloc;
-
-			apbclk: apbclk {
-				compatible = "fixed-clock";
-				clock-frequency = <50000000>;
-				#clock-cells = <0>;
-			};
-
-			uartclk: uartclk {
-				compatible = "fixed-clock";
-				clock-frequency = <33333333>;
-				#clock-cells = <0>;
-				u-boot,dm-pre-reloc;
-			};
-
-			mmcclk_ciu: mmcclk-ciu {
-				compatible = "fixed-clock";
-				/*
-				 * DW sdio controller has external ciu clock divider
-				 * controlled via register in SDIO IP. It divides
-				 * sdio_ref_clk (which comes from CGU) by 16 for
-				 * default. So default mmcclk clock (which comes
-				 * to sdk_in) is 25000000 Hz.
-				 */
-				clock-frequency = <25000000>;
-				#clock-cells = <0>;
-			};
-
-			mmcclk_biu: mmcclk-biu {
-				compatible = "fixed-clock";
-				clock-frequency = <50000000>;
-				#clock-cells = <0>;
-			};
-		};
-
-		ethernet@18000 {
-			compatible = "snps,arc-dwmac-3.70a";
-			reg = < 0x18000 0x2000 >;
-			phy-mode = "gmii";
-			snps,pbl = < 32 >;
-			clocks = <&apbclk>;
-			clock-names = "stmmaceth";
-			max-speed = <100>;
-		};
-
-		ehci@0x40000 {
-			compatible = "generic-ehci";
-			reg = < 0x40000 0x100 >;
-		};
-
-		ohci@0x60000 {
-			compatible = "generic-ohci";
-			reg = < 0x60000 0x100 >;
-		};
-
-		mmc: mmc@15000 {
-			compatible = "snps,dw-mshc";
-			reg = <0x15000 0x400>;
-			bus-width = <4>;
-			clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
-			clock-names = "biu", "ciu";
-			max-frequency = <25000000>;
-		};
-
-		uart0: serial0@22000 {
-			compatible = "snps,dw-apb-uart";
-			reg = <0x22000 0x100>;
-			clocks = <&uartclk>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-		};
-
-		spi0: spi@0 {
-			compatible = "snps,dw-apb-ssi";
-			reg = <0x0 0x100>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spi-max-frequency = <4000000>;
-			clocks = <&apbclk>;
-			clock-names = "spi_clk";
-			cs-gpio = <&cs_gpio 0>;
-			spi_flash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0>;
-				spi-max-frequency = <4000000>;
-			};
-		};
-
-		cs_gpio: gpio@11218 {
-			compatible = "snps,creg-gpio";
-			reg = <0x11218 0x4>;
-			gpio-controller;
-			#gpio-cells = <1>;
-			gpio-bank-name = "axs-spi-cs";
-			gpio-count = <1>;
-			gpio-first-shift = <0>;
-			gpio-bit-per-line = <2>;
-			gpio-activate-val = <1>;
-			gpio-deactivate-val = <3>;
-			gpio-default-val = <1>;
-		};
-	};
-};

arch/arc/dts/emsdp.dts

@@ -1,58 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
- */
-/dts-v1/;
-
-#include "skeleton.dtsi"
-
-/ {
-	model = "snps,emsdp";
-
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		console = &uart0;
-	};
-
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <40000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-
-	uart0: serial0@f0004000 {
-		compatible = "snps,dw-apb-uart";
-		clock-frequency = <100000000>;
-		reg = <0xf0004000 0x1000>;
-		reg-shift = <2>;
-		reg-io-width = <4>;
-	};
-
-	mmcclk_biu: mmcclk-biu {
-		compatible = "fixed-clock";
-		clock-frequency = <50000000>;
-		#clock-cells = <0>;
-	};
-
-	mmcclk_ciu: mmcclk-ciu {
-		compatible = "fixed-clock";
-		clock-frequency = <100000000>;
-		#clock-cells = <0>;
-	};
-
-	mmc: mmc0@f0010000 {
-		compatible = "snps,dw-mshc";
-		reg = <0xf0010000 0x400>;
-		bus-width = <4>;
-		fifo-depth = <256>;
-		clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
-		clock-names = "biu", "ciu";
-		max-frequency = <25000000>;
-	};
-
-};

arch/arc/dts/hsdk.dts

@@ -1,144 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
- */
-/dts-v1/;
-
-#include "skeleton.dtsi"
-#include "dt-bindings/clock/snps,hsdk-cgu.h"
-
-/ {
-	model = "snps,hsdk";
-
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		console = &uart0;
-		spi0 = &spi0;
-	};
-
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <500000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-
-	clk-fmeas {
-		clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
-			 <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
-			 <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
-			 <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
-			 <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
-			 <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
-			 <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
-			 <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
-			 <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
-			 <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
-			 <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
-			 <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
-			 <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
-		clock-names = "cpu-pll", "sys-pll",
-			      "tun-pll", "ddr-clk",
-			      "cpu-clk", "hdmi-pll",
-			      "tun-clk", "hdmi-clk",
-			      "apb-clk", "axi-clk",
-			      "eth-clk", "usb-clk",
-			      "sdio-clk", "hdmi-sys-clk",
-			      "gfx-core-clk", "gfx-dma-clk",
-			      "gfx-cfg-clk", "dmac-core-clk",
-			      "dmac-cfg-clk", "sdio-ref-clk",
-			      "spi-clk", "i2c-clk",
-			      "uart-clk", "ebi-clk",
-			      "rom-clk", "pwm-clk";
-	};
-
-	cgu_clk: cgu-clk@f0000000 {
-		compatible = "snps,hsdk-cgu-clock";
-		reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
-		#clock-cells = <1>;
-	};
-
-	uart0: serial0@f0005000 {
-		compatible = "snps,dw-apb-uart";
-		reg = <0xf0005000 0x1000>;
-		reg-shift = <2>;
-		reg-io-width = <4>;
-	};
-
-	ethernet@f0008000 {
-		#interrupt-cells = <1>;
-		compatible = "snps,arc-dwmac-3.70a";
-		reg = <0xf0008000 0x2000>;
-		phy-mode = "gmii";
-	};
-
-	ehci@0xf0040000 {
-		compatible = "generic-ehci";
-		reg = <0xf0040000 0x100>;
-	};
-
-	ohci@0xf0060000 {
-		compatible = "generic-ohci";
-		reg = <0xf0060000 0x100>;
-	};
-
-	mmcclk_ciu: mmcclk-ciu {
-		compatible = "fixed-clock";
-		/*
-		 * DW sdio controller has external ciu clock divider
-		 * controlled via register in SDIO IP. Due to its
-		 * unexpected default value (it should divide by 1
-		 * but it divides by 8) SDIO IP uses wrong clock and
-		 * works unstable (see STAR 9001204800)
-		 * We switched to the minimum possible value of the
-		 * divisor (div-by-2) in HSDK platform code.
-		 * So default mmcclk ciu clock is 50000000 Hz.
-		 */
-		clock-frequency = <50000000>;
-		#clock-cells = <0>;
-	};
-
-	mmc: mmc0@f000a000 {
-		compatible = "snps,dw-mshc";
-		reg = <0xf000a000 0x400>;
-		bus-width = <4>;
-		fifo-depth = <256>;
-		clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>;
-		clock-names = "biu", "ciu";
-		max-frequency = <25000000>;
-	};
-
-	spi0: spi@f0020000 {
-		compatible = "snps,dw-apb-ssi";
-		reg = <0xf0020000 0x1000>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		spi-max-frequency = <4000000>;
-		clocks = <&cgu_clk CLK_SYS_SPI_REF>;
-		clock-names = "spi_clk";
-		cs-gpio = <&cs_gpio 0>;
-		spi_flash@0 {
-			compatible = "jedec,spi-nor";
-			reg = <0>;
-			spi-max-frequency = <4000000>;
-		};
-	};
-
-	cs_gpio: gpio@f00014b0 {
-		compatible = "snps,creg-gpio";
-		reg = <0xf00014b0 0x4>;
-		gpio-controller;
-		#gpio-cells = <1>;
-		gpio-bank-name = "hsdk-spi-cs";
-		gpio-count = <1>;
-		gpio-first-shift = <0>;
-		gpio-bit-per-line = <2>;
-		gpio-activate-val = <2>;
-		gpio-deactivate-val = <3>;
-		gpio-default-val = <1>;
-	};
-};

arch/arc/dts/iot_devkit.dts

@@ -1,67 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
- */
-/dts-v1/;
-
-#include "skeleton.dtsi"
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		console = &uart0;
-	};
-
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <144000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-
-	uart0: serial0@80014000 {
-		compatible = "snps,dw-apb-uart";
-		clock-frequency = <16000000>;
-		reg = <0x80014000 0x1000>;
-		reg-shift = <2>;
-		reg-io-width = <4>;
-	};
-
-	usb: usb@f0040000 {
-		compatible = "snps,dwc2";
-		reg = <0xf0040000 0x10000>;
-		phys = <&usbphy>;
-		phy-names = "usb2-phy";
-	};
-
-	usbphy: phy {
-		compatible = "nop-phy";
-		#phy-cells = <0>;
-	};
-
-	mmcclk_biu: mmcclk-biu {
-		compatible = "fixed-clock";
-		clock-frequency = <50000000>;
-		#clock-cells = <0>;
-	};
-
-	mmcclk_ciu: mmcclk-ciu {
-		compatible = "fixed-clock";
-		clock-frequency = <50000000>;
-		#clock-cells = <0>;
-	};
-
-	mmc: mmc0@f000b000 {
-		compatible = "snps,dw-mshc";
-		reg = <0xf000b000 0x400>;
-		bus-width = <4>;
-		fifo-depth = <128>;
-		clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
-		clock-names = "biu", "ciu";
-		max-frequency = <25000000>;
-	};
-};

arch/arc/dts/nsim.dts

@@ -1,31 +1,24 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 /dts-v1/;
 
 #include "skeleton.dtsi"
 
 / {
-	model = "snps,nsim";
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	aliases {
 		console = &arcuart0;
 	};
 
-	cpu_card {
-		core_clk: core_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <70000000>;
-			u-boot,dm-pre-reloc;
-		};
-	};
-
 	arcuart0: serial@0xc0fc1000 {
 		compatible = "snps,arc-uart";
 		reg = <0xc0fc1000 0x100>;
-		clock-frequency = <70000000>;
+		clock-frequency = <80000000>;
 	};
 
 };

arch/arc/dts/skeleton.dtsi

@@ -9,22 +9,5 @@
 	#size-cells = <1>;
 	chosen { };
 	aliases { };
-
-	cpu_card {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		u-boot,dm-pre-reloc;
-
-		timer@0 {
-			compatible = "snps,arc-timer";
-			clocks = <&core_clk>;
-			reg = <0 1>;
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x10000000>; /* 256M */
-	};
+	memory { device_type = "memory"; reg = <0 0>; };
 };

arch/arc/include/asm/arc-bcr.h

@@ -1,77 +0,0 @@
-/*
- * ARC Build Configuration Registers, with encoded hardware config
- *
- * Copyright (C) 2018 Synopsys
- * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ARC_BCR_H
-#define __ARC_BCR_H
-#ifndef __ASSEMBLY__
-
-#include <config.h>
-
-union bcr_di_cache {
-	struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-		unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
-#else
-		unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
-#endif
-	} fields;
-	unsigned int word;
-};
-
-union bcr_slc_cfg {
-	struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-		unsigned int pad:24, way:2, lsz:2, sz:4;
-#else
-		unsigned int sz:4, lsz:2, way:2, pad:24;
-#endif
-	} fields;
-	unsigned int word;
-};
-
-union bcr_generic {
-	struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-		unsigned int pad:24, ver:8;
-#else
-		unsigned int ver:8, pad:24;
-#endif
-	} fields;
-	unsigned int word;
-};
-
-union bcr_clust_cfg {
-	struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-		unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
-#else
-		unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
-#endif
-	} fields;
-	unsigned int word;
-};
-
-union bcr_mmu_4 {
-	struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-	unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
-		     n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
-#else
-	/*           DTLB      ITLB      JES        JE         JA      */
-	unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
-		     pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
-#endif
-	} fields;
-	unsigned int word;
-};
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ARC_BCR_H */

arch/arc/include/asm/arcregs.h

@@ -1,13 +1,13 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _ASM_ARC_ARCREGS_H
 #define _ASM_ARC_ARCREGS_H
 
 #include <asm/cache.h>
-#include <config.h>
 
 /*
  * ARC architecture has additional address space - auxiliary registers.
@@ -16,26 +16,9 @@
  * access: "lr"/"sr".
  */
 
-/*
- * Typically 8 least significant bits of Build Configuration Register (BCR)
- * describe version of the HW block in question. Moreover if decoded version
- * is 0 this means given HW block is absent - this is especially useful because
- * we may safely read BRC regardless HW block existence while an attempt to
- * access any other AUX regs associated with this HW block lead to imediate
- * "instruction error" exception.
- *
- * I.e. before using any cofigurable HW block it's required to make sure it
- * exists at all, and for that we introduce a special macro below.
- */
-#define ARC_BCR_VERSION_MASK	GENMASK(7, 0)
-#define ARC_FEATURE_EXISTS(bcr)	!!(__builtin_arc_lr(bcr) & ARC_BCR_VERSION_MASK)
-
 #define ARC_AUX_IDENTITY	0x04
 #define ARC_AUX_STATUS32	0x0a
 
-/* STATUS32 Bits Positions */
-#define STATUS_AD_BIT		19	/* Enable unaligned access */
-
 /* Instruction cache related auxiliary registers */
 #define ARC_AUX_IC_IVIC		0x10
 #define ARC_AUX_IC_CTRL		0x11
@@ -44,22 +27,12 @@
 #define ARC_AUX_IC_PTAG		0x1E
 #endif
 #define ARC_BCR_IC_BUILD	0x77
-#define AUX_AUX_CACHE_LIMIT		0x5D
-#define ARC_AUX_NON_VOLATILE_LIMIT	0x5E
-
-/* ICCM and DCCM auxiliary registers */
-#define ARC_AUX_DCCM_BASE	0x18	/* DCCM Base Addr ARCv2 */
-#define ARC_AUX_ICCM_BASE	0x208	/* ICCM Base Addr ARCv2 */
 
 /* Timer related auxiliary registers */
 #define ARC_AUX_TIMER0_CNT	0x21	/* Timer 0 count */
 #define ARC_AUX_TIMER0_CTRL	0x22	/* Timer 0 control */
 #define ARC_AUX_TIMER0_LIMIT	0x23	/* Timer 0 limit */
 
-#define ARC_AUX_TIMER1_CNT	0x100	/* Timer 1 count */
-#define ARC_AUX_TIMER1_CTRL	0x101	/* Timer 1 control */
-#define ARC_AUX_TIMER1_LIMIT	0x102	/* Timer 1 limit */
-
 #define ARC_AUX_INTR_VEC_BASE	0x25
 
 /* Data cache related auxiliary registers */
@@ -80,30 +53,14 @@
 #define ARC_AUX_SLC_INVALIDATE	0x905
 #define ARC_AUX_SLC_IVDL	0x910
 #define ARC_AUX_SLC_FLDL	0x912
-#define ARC_AUX_SLC_RGN_START	0x914
-#define ARC_AUX_SLC_RGN_START1	0x915
-#define ARC_AUX_SLC_RGN_END	0x916
-#define ARC_AUX_SLC_RGN_END1	0x917
 #define ARC_BCR_CLUSTER		0xcf
 
-/* MMU Management regs */
-#define ARC_AUX_MMU_BCR		0x6f
-
 /* IO coherency related auxiliary registers */
 #define ARC_AUX_IO_COH_ENABLE	0x500
 #define ARC_AUX_IO_COH_PARTIAL	0x501
 #define ARC_AUX_IO_COH_AP0_BASE	0x508
 #define ARC_AUX_IO_COH_AP0_SIZE	0x509
 
-/* XY-memory related */
-#define ARC_AUX_XY_BUILD	0x79
-
-/* DSP-extensions related auxiliary registers */
-#define ARC_AUX_DSP_BUILD	0x7A
-
-/* ARC Subsystems related auxiliary registers */
-#define ARC_AUX_SUBSYS_BUILD	0xF0
-
 #ifndef __ASSEMBLY__
 /* Accessors for auxiliary registers */
 #define read_aux_reg(reg)	__builtin_arc_lr(reg)
@@ -111,19 +68,6 @@
 /* gcc builtin sr needs reg param to be long immediate */
 #define write_aux_reg(reg_immed, val)		\
 		__builtin_arc_sr((unsigned int)val, reg_immed)
-
-/* ARCNUM [15:8] - field to identify each core in a multi-core system */
-#define CPU_ID_GET()	((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
-
-static const inline int is_isa_arcv2(void)
-{
-	return IS_ENABLED(CONFIG_ISA_ARCV2);
-}
-
-static const inline int is_isa_arcompact(void)
-{
-	return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
-}
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_ARC_ARCREGS_H */

arch/arc/include/asm/bitops.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_BITOPS_H

arch/arc/include/asm/byteorder.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_BYTEORDER_H

arch/arc/include/asm/cache.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_CACHE_H
@@ -16,9 +17,6 @@
  */
 #define ARCH_DMA_MINALIGN	128
 
-/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */
-#define CONFIG_SYS_CACHELINE_SIZE	ARCH_DMA_MINALIGN
-
 #if defined(ARC_MMU_ABSENT)
 #define CONFIG_ARC_MMU_VER 0
 #elif defined(CONFIG_ARC_MMU_V2)
@@ -32,13 +30,6 @@
 #ifndef __ASSEMBLY__
 
 void cache_init(void);
-void flush_n_invalidate_dcache_all(void);
-void sync_n_cleanup_cache_all(void);
-
-static const inline int is_ioc_enabled(void)
-{
-	return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
-}
 
 #endif /* __ASSEMBLY__ */
 

arch/arc/include/asm/config.h

@@ -1,12 +1,14 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_CONFIG_H_
 #define __ASM_ARC_CONFIG_H_
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#define CONFIG_ARCH_EARLY_INIT_R
 
 #define CONFIG_LMB
 

arch/arc/include/asm/errno.h

@@ -0,0 +1 @@
+#include <asm-generic/errno.h>

arch/arc/include/asm/global_data.h

@@ -1,20 +1,15 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef	__ASM_ARC_GLOBAL_DATA_H
 #define __ASM_ARC_GLOBAL_DATA_H
 
-#include <config.h>
-
 #ifndef __ASSEMBLY__
 /* Architecture-specific global data */
 struct arch_global_data {
-	int l1_line_sz;
-#if defined(CONFIG_ISA_ARCV2)
-	int slc_line_sz;
-#endif
 };
 #endif /* __ASSEMBLY__ */
 

arch/arc/include/asm/gpio.h

@@ -1 +0,0 @@
-#include <asm-generic/gpio.h>

arch/arc/include/asm/init_helpers.h

@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_INIT_HELPERS_H
+#define _ASM_ARC_INIT_HELPERS_H
+
+int init_cache_f_r(void);
+
+#endif	/* _ASM_ARC_INIT_HELPERS_H */

arch/arc/include/asm/io.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_IO_H
@@ -9,7 +10,7 @@
 #include <linux/types.h>
 #include <asm/byteorder.h>
 
-#ifdef __ARCHS__
+#ifdef CONFIG_ISA_ARCV2
 
 /*
  * ARCv2 based HS38 cores are in-order issue, but still weakly ordered
@@ -41,14 +42,38 @@
 #define mb()	asm volatile("sync\n" : : : "memory")
 #endif
 
-#ifdef __ARCHS__
+#ifdef CONFIG_ISA_ARCV2
 #define __iormb()		rmb()
 #define __iowmb()		wmb()
 #else
-#define __iormb()		asm volatile("" : : : "memory")
-#define __iowmb()		asm volatile("" : : : "memory")
+#define __iormb()		do { } while (0)
+#define __iowmb()		do { } while (0)
 #endif
 
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE	(0)
+#define MAP_WRCOMBINE	(0)
+#define MAP_WRBACK	(0)
+#define MAP_WRTHROUGH	(0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+	return (void *)((unsigned long)paddr);
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
 static inline void sync(void)
 {
 	/* Not yet implemented */
@@ -277,6 +302,9 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-#include <asm-generic/io.h>
+static inline phys_addr_t virt_to_phys(void *vaddr)
+{
+	return (phys_addr_t)((unsigned long)vaddr);
+}
 
 #endif	/* __ASM_ARC_IO_H */

arch/arc/include/asm/linkage.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_LINKAGE_H

arch/arc/include/asm/posix_types.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_POSIX_TYPES_H

arch/arc/include/asm/processor.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _ASM_ARC_PROCESSOR_H

arch/arc/include/asm/ptrace.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_PTRACE_H

arch/arc/include/asm/relocate.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_RELOCATE_H
+#define _ASM_ARC_RELOCATE_H
+
+#include <common.h>
+
+int copy_uboot_to_ram(void);
+int clear_bss(void);
+int do_elf_reloc_fixups(void);
+
+#endif	/* _ASM_ARC_RELOCATE_H */

arch/arc/include/asm/sections.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_SECTIONS_H

arch/arc/include/asm/string.h

@@ -1 +1,27 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
 
+#ifndef __ASM_ARC_STRING_H
+#define __ASM_ARC_STRING_H
+
+#define __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMCPY
+#define __HAVE_ARCH_MEMCMP
+#define __HAVE_ARCH_STRCHR
+#define __HAVE_ARCH_STRCPY
+#define __HAVE_ARCH_STRCMP
+#define __HAVE_ARCH_STRLEN
+
+extern void *memset(void *ptr, int, __kernel_size_t);
+extern void *memcpy(void *, const void *, __kernel_size_t);
+extern void memzero(void *ptr, __kernel_size_t n);
+extern int memcmp(const void *, const void *, __kernel_size_t);
+extern char *strchr(const char *s, int c);
+extern char *strcpy(char *dest, const char *src);
+extern int strcmp(const char *cs, const char *ct);
+extern __kernel_size_t strlen(const char *);
+
+#endif /* __ASM_ARC_STRING_H */

arch/arc/include/asm/types.h

@@ -1,15 +1,48 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_TYPES_H
 #define __ASM_ARC_TYPES_H
 
-#include <asm-generic/int-ll64.h>
-
 typedef unsigned short umode_t;
 
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
 #define BITS_PER_LONG 32
 
 /* Dma addresses are 32-bits wide. */

arch/arc/include/asm/u-boot-arc.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_U_BOOT_ARC_H__

arch/arc/include/asm/u-boot.h

@@ -1,13 +1,13 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_ARC_U_BOOT_H__
 #define __ASM_ARC_U_BOOT_H__
 
 #include <asm-generic/u-boot.h>
-#include <asm/u-boot-arc.h>
 
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_ARC

arch/arc/lib/Makefile

@@ -1,6 +1,8 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 extra-y	= start.o
 head-y := start.o
@@ -8,7 +10,15 @@ obj-y += cache.o
 obj-y += cpu.o
 obj-y += interrupts.o
 obj-y += relocate.o
+obj-y += strchr-700.o
+obj-y += strcmp.o
+obj-y += strcpy-700.o
+obj-y += strlen.o
+obj-y += memcmp.o
+obj-y += memcpy-700.o
+obj-y += memset.o
 obj-y += reset.o
+obj-y += timer.o
 obj-y += ints_low.o
 obj-y += init_helpers.o
 

arch/arc/lib/_millicodethunk.S

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
  /* ANSI concatenation macros.  */

arch/arc/lib/bootm.c

@@ -1,10 +1,9 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <irq_func.h>
-#include <asm/cache.h>
 #include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -41,64 +40,54 @@ void arch_lmb_reserve(struct lmb *lmb)
 static int cleanup_before_linux(void)
 {
 	disable_interrupts();
-	sync_n_cleanup_cache_all();
+	flush_dcache_all();
+	invalidate_icache_all();
 
 	return 0;
 }
 
-__weak int board_prep_linux(bootm_headers_t *images) { return 0; }
-
 /* Subcommand: PREP */
-static int boot_prep_linux(bootm_headers_t *images)
+static void boot_prep_linux(bootm_headers_t *images)
 {
-	int ret;
-
-	ret = image_setup_linux(images);
-	if (ret)
-		return ret;
-
-	return board_prep_linux(images);
+	if (image_setup_linux(images))
+		hang();
 }
 
-/* Generic implementation for single core CPU */
-__weak void board_jump_and_run(ulong entry, int zero, int arch, uint params)
-{
-	void (*kernel_entry)(int zero, int arch, uint params);
-
-	kernel_entry = (void (*)(int, int, uint))entry;
-
-	kernel_entry(zero, arch, params);
-}
+__weak void smp_set_core_boot_addr(unsigned long addr, int corenr) {}
+__weak void smp_kick_all_cpus(void) {}
 
 /* Subcommand: GO */
 static void boot_jump_linux(bootm_headers_t *images, int flag)
 {
-	ulong kernel_entry;
+	void (*kernel_entry)(int zero, int arch, uint params);
 	unsigned int r0, r2;
 	int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
 
-	kernel_entry = images->ep;
+	kernel_entry = (void (*)(int, int, uint))images->ep;
 
 	debug("## Transferring control to Linux (at address %08lx)...\n",
-	      kernel_entry);
+	      (ulong) kernel_entry);
 	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
 
 	printf("\nStarting kernel ...%s\n\n", fake ?
 	       "(fake run for tracing)" : "");
 	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
 
+	cleanup_before_linux();
+
 	if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
 		r0 = 2;
 		r2 = (unsigned int)images->ft_addr;
 	} else {
 		r0 = 1;
-		r2 = (unsigned int)env_get("bootargs");
+		r2 = (unsigned int)getenv("bootargs");
 	}
 
-	cleanup_before_linux();
+	smp_set_core_boot_addr((unsigned long)kernel_entry, -1);
+	smp_kick_all_cpus();
 
 	if (!fake)
-		board_jump_and_run(kernel_entry, r0, 0, r2);
+		kernel_entry(r0, 0, r2);
 }
 
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
@@ -107,13 +96,17 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 	if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
 		return -1;
 
-	if (flag & BOOTM_STATE_OS_PREP)
-		return boot_prep_linux(images);
+	if (flag & BOOTM_STATE_OS_PREP) {
+		boot_prep_linux(images);
+		return 0;
+	}
 
 	if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
 		boot_jump_linux(images, flag);
 		return 0;
 	}
 
-	return -1;
+	boot_prep_linux(images);
+	boot_jump_linux(images, flag);
+	return 0;
 }

arch/arc/lib/cache.c

@@ -1,537 +1,283 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 #include <common.h>
-#include <cpu_func.h>
 #include <linux/compiler.h>
 #include <linux/kernel.h>
-#include <linux/log2.h>
 #include <asm/arcregs.h>
-#include <asm/arc-bcr.h>
 #include <asm/cache.h>
 
-/*
- * [ NOTE 1 ]:
- * Data cache (L1 D$ or SL$) entire invalidate operation or data cache disable
- * operation may result in unexpected behavior and data loss even if we flush
- * data cache right before invalidation. That may happens if we store any context
- * on stack (like we store BLINK register on stack before function call).
- * BLINK register is the register where return address is automatically saved
- * when we do function call with instructions like 'bl'.
- *
- * There is the real example:
- * We may hang in the next code as we store any BLINK register on stack in
- * invalidate_dcache_all() function.
- *
- * void flush_dcache_all() {
- *     __dc_entire_op(OP_FLUSH);
- *     // Other code //
- * }
- *
- * void invalidate_dcache_all() {
- *     __dc_entire_op(OP_INV);
- *     // Other code //
- * }
- *
- * void foo(void) {
- *     flush_dcache_all();
- *     invalidate_dcache_all();
- * }
- *
- * Now let's see what really happens during that code execution:
- *
- * foo()
- *   |->> call flush_dcache_all
- *     [return address is saved to BLINK register]
- *     [push BLINK] (save to stack)              ![point 1]
- *     |->> call __dc_entire_op(OP_FLUSH)
- *         [return address is saved to BLINK register]
- *         [flush L1 D$]
- *         return [jump to BLINK]
- *     <<------
- *     [other flush_dcache_all code]
- *     [pop BLINK] (get from stack)
- *     return [jump to BLINK]
- *   <<------
- *   |->> call invalidate_dcache_all
- *     [return address is saved to BLINK register]
- *     [push BLINK] (save to stack)               ![point 2]
- *     |->> call __dc_entire_op(OP_FLUSH)
- *         [return address is saved to BLINK register]
- *         [invalidate L1 D$]                 ![point 3]
- *         // Oops!!!
- *         // We lose return address from invalidate_dcache_all function:
- *         // we save it to stack and invalidate L1 D$ after that!
- *         return [jump to BLINK]
- *     <<------
- *     [other invalidate_dcache_all code]
- *     [pop BLINK] (get from stack)
- *     // we don't have this data in L1 dcache as we invalidated it in [point 3]
- *     // so we get it from next memory level (for example DDR memory)
- *     // but in the memory we have value which we save in [point 1], which
- *     // is return address from flush_dcache_all function (instead of
- *     // address from current invalidate_dcache_all function which we
- *     // saved in [point 2] !)
- *     return [jump to BLINK]
- *   <<------
- *   // As BLINK points to invalidate_dcache_all, we call it again and
- *   // loop forever.
- *
- * Fortunately we may fix that by using flush & invalidation of D$ with a single
- * one instruction (instead of flush and invalidation instructions pair) and
- * enabling force function inline with '__attribute__((always_inline))' gcc
- * attribute to avoid any function call (and BLINK store) between cache flush
- * and disable.
- *
- *
- * [ NOTE 2 ]:
- * As of today we only support the following cache configurations on ARC.
- * Other configurations may exist in HW (for example, since version 3.0 HS
- * supports SL$ (L2 system level cache) disable) but we don't support it in SW.
- * Configuration 1:
- *        ______________________
- *       |                      |
- *       |   ARC CPU            |
- *       |______________________|
- *        ___|___        ___|___
- *       |       |      |       |
- *       | L1 I$ |      | L1 D$ |
- *       |_______|      |_______|
- *        on/off         on/off
- *        ___|______________|____
- *       |                      |
- *       |   main memory        |
- *       |______________________|
- *
- * Configuration 2:
- *        ______________________
- *       |                      |
- *       |   ARC CPU            |
- *       |______________________|
- *        ___|___        ___|___
- *       |       |      |       |
- *       | L1 I$ |      | L1 D$ |
- *       |_______|      |_______|
- *        on/off         on/off
- *        ___|______________|____
- *       |                      |
- *       |   L2 (SL$)           |
- *       |______________________|
- *          always must be on
- *        ___|______________|____
- *       |                      |
- *       |   main memory        |
- *       |______________________|
- *
- * Configuration 3:
- *        ______________________
- *       |                      |
- *       |   ARC CPU            |
- *       |______________________|
- *        ___|___        ___|___
- *       |       |      |       |
- *       | L1 I$ |      | L1 D$ |
- *       |_______|      |_______|
- *        on/off        must be on
- *        ___|______________|____      _______
- *       |                      |     |       |
- *       |   L2 (SL$)           |-----|  IOC  |
- *       |______________________|     |_______|
- *          always must be on          on/off
- *        ___|______________|____
- *       |                      |
- *       |   main memory        |
- *       |______________________|
- */
-
-DECLARE_GLOBAL_DATA_PTR;
-
 /* Bit values in IC_CTRL */
-#define IC_CTRL_CACHE_DISABLE	BIT(0)
+#define IC_CTRL_CACHE_DISABLE	(1 << 0)
 
 /* Bit values in DC_CTRL */
-#define DC_CTRL_CACHE_DISABLE	BIT(0)
-#define DC_CTRL_INV_MODE_FLUSH	BIT(6)
-#define DC_CTRL_FLUSH_STATUS	BIT(8)
+#define DC_CTRL_CACHE_DISABLE	(1 << 0)
+#define DC_CTRL_INV_MODE_FLUSH	(1 << 6)
+#define DC_CTRL_FLUSH_STATUS	(1 << 8)
+#define CACHE_VER_NUM_MASK	0xF
+#define SLC_CTRL_SB		(1 << 2)
 
-#define OP_INV			BIT(0)
-#define OP_FLUSH		BIT(1)
-#define OP_FLUSH_N_INV		(OP_FLUSH | OP_INV)
-
-/* Bit val in SLC_CONTROL */
-#define SLC_CTRL_DIS		0x001
-#define SLC_CTRL_IM		0x040
-#define SLC_CTRL_BUSY		0x100
-#define SLC_CTRL_RGN_OP_INV	0x200
-
-#define CACHE_LINE_MASK		(~(gd->arch.l1_line_sz - 1))
+#define OP_INV		0x1
+#define OP_FLUSH	0x2
+#define OP_INV_IC	0x3
 
 /*
- * We don't want to use '__always_inline' macro here as it can be redefined
- * to simple 'inline' in some cases which breaks stuff. See [ NOTE 1 ] for more
- * details about the reasons we need to use always_inline functions.
+ * By default that variable will fall into .bss section.
+ * But .bss section is not relocated and so it will be initilized before
+ * relocation but will be used after being zeroed.
  */
-#define inlined_cachefunc	 inline __attribute__((always_inline))
+int l1_line_sz __section(".data");
+int dcache_exists __section(".data");
+int icache_exists __section(".data");
 
-static inlined_cachefunc void __ic_entire_invalidate(void);
-static inlined_cachefunc void __dc_entire_op(const int cacheop);
+#define CACHE_LINE_MASK		(~(l1_line_sz - 1))
 
-static inline bool pae_exists(void)
-{
-	/* TODO: should we compare mmu version from BCR and from CONFIG? */
-#if (CONFIG_ARC_MMU_VER >= 4)
-	union bcr_mmu_4 mmu4;
-
-	mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
-
-	if (mmu4.fields.pae)
-		return true;
-#endif /* (CONFIG_ARC_MMU_VER >= 4) */
-
-	return false;
-}
-
-static inlined_cachefunc bool icache_exists(void)
-{
-	union bcr_di_cache ibcr;
-
-	ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
-	return !!ibcr.fields.ver;
-}
-
-static inlined_cachefunc bool icache_enabled(void)
-{
-	if (!icache_exists())
-		return false;
-
-	return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE);
-}
-
-static inlined_cachefunc bool dcache_exists(void)
-{
-	union bcr_di_cache dbcr;
-
-	dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
-	return !!dbcr.fields.ver;
-}
-
-static inlined_cachefunc bool dcache_enabled(void)
-{
-	if (!dcache_exists())
-		return false;
-
-	return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE);
-}
-
-static inlined_cachefunc bool slc_exists(void)
-{
-	if (is_isa_arcv2()) {
-		union bcr_generic sbcr;
-
-		sbcr.word = read_aux_reg(ARC_BCR_SLC);
-		return !!sbcr.fields.ver;
-	}
-
-	return false;
-}
-
-static inlined_cachefunc bool slc_data_bypass(void)
-{
-	/*
-	 * If L1 data cache is disabled SL$ is bypassed and all load/store
-	 * requests are sent directly to main memory.
-	 */
-	return !dcache_enabled();
-}
-
-static inline bool ioc_exists(void)
-{
-	if (is_isa_arcv2()) {
-		union bcr_clust_cfg cbcr;
-
-		cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
-		return cbcr.fields.c;
-	}
-
-	return false;
-}
-
-static inline bool ioc_enabled(void)
-{
-	/*
-	 * We check only CONFIG option instead of IOC HW state check as IOC
-	 * must be disabled by default.
-	 */
-	if (is_ioc_enabled())
-		return ioc_exists();
-
-	return false;
-}
-
-static inlined_cachefunc void __slc_entire_op(const int op)
-{
-	unsigned int ctrl;
-
-	if (!slc_exists())
-		return;
-
-	ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
-
-	if (!(op & OP_FLUSH))		/* i.e. OP_INV */
-		ctrl &= ~SLC_CTRL_IM;	/* clear IM: Disable flush before Inv */
-	else
-		ctrl |= SLC_CTRL_IM;
-
-	write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
-
-	if (op & OP_INV)	/* Inv or flush-n-inv use same cmd reg */
-		write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
-	else
-		write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
-
-	/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
-	read_aux_reg(ARC_AUX_SLC_CTRL);
-
-	/* Important to wait for flush to complete */
-	while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
-}
-
-static void slc_upper_region_init(void)
-{
-	/*
-	 * ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
-	 * only if PAE exists in current HW. So we had to check pae_exist
-	 * before using them.
-	 */
-	if (!pae_exists())
-		return;
-
-	/*
-	 * ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
-	 * as we don't use PAE40.
-	 */
-	write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
-	write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
-}
-
-static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
-{
 #ifdef CONFIG_ISA_ARCV2
+int slc_line_sz __section(".data");
+int slc_exists __section(".data");
+int ioc_exists __section(".data");
 
-	unsigned int ctrl;
-	unsigned long end;
-
-	if (!slc_exists())
-		return;
-
-	/*
-	 * The Region Flush operation is specified by CTRL.RGN_OP[11..9]
-	 *  - b'000 (default) is Flush,
-	 *  - b'001 is Invalidate if CTRL.IM == 0
-	 *  - b'001 is Flush-n-Invalidate if CTRL.IM == 1
-	 */
-	ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
-
-	/* Don't rely on default value of IM bit */
-	if (!(op & OP_FLUSH))		/* i.e. OP_INV */
-		ctrl &= ~SLC_CTRL_IM;	/* clear IM: Disable flush before Inv */
-	else
-		ctrl |= SLC_CTRL_IM;
-
-	if (op & OP_INV)
-		ctrl |= SLC_CTRL_RGN_OP_INV;	/* Inv or flush-n-inv */
-	else
-		ctrl &= ~SLC_CTRL_RGN_OP_INV;
-
-	write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
-
-	/*
-	 * Lower bits are ignored, no need to clip
-	 * END needs to be setup before START (latter triggers the operation)
-	 * END can't be same as START, so add (l2_line_sz - 1) to sz
-	 */
-	end = paddr + sz + gd->arch.slc_line_sz - 1;
-
-	/*
-	 * Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
-	 * are always == 0 as we don't use PAE40, so we only setup lower ones
-	 * (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
-	 */
-	write_aux_reg(ARC_AUX_SLC_RGN_END, end);
-	write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
-
-	/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
-	read_aux_reg(ARC_AUX_SLC_CTRL);
-
-	while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
-
-#endif /* CONFIG_ISA_ARCV2 */
-}
-
-static void arc_ioc_setup(void)
+static unsigned int __before_slc_op(const int op)
 {
-	/* IOC Aperture start is equal to DDR start */
-	unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
-	/* IOC Aperture size is equal to DDR size */
-	long ap_size = CONFIG_SYS_SDRAM_SIZE;
+	unsigned int reg = reg;
 
-	/* Unsupported configuration. See [ NOTE 2 ] for more details. */
-	if (!slc_exists())
-		panic("Try to enable IOC but SLC is not present");
+	if (op == OP_INV) {
+		/*
+		 * IM is set by default and implies Flush-n-inv
+		 * Clear it here for vanilla inv
+		 */
+		reg = read_aux_reg(ARC_AUX_SLC_CTRL);
+		write_aux_reg(ARC_AUX_SLC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
+	}
 
-	/* Unsupported configuration. See [ NOTE 2 ] for more details. */
-	if (!dcache_enabled())
-		panic("Try to enable IOC but L1 D$ is disabled");
-
-	if (!is_power_of_2(ap_size) || ap_size < 4096)
-		panic("IOC Aperture size must be power of 2 and bigger 4Kib");
-
-	/* IOC Aperture start must be aligned to the size of the aperture */
-	if (ap_base % ap_size != 0)
-		panic("IOC Aperture start must be aligned to the size of the aperture");
-
-	flush_n_invalidate_dcache_all();
-
-	/*
-	 * IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
-	 * so setting 0x11 implies 512M, 0x12 implies 1G...
-	 */
-	write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
-		      order_base_2(ap_size / 1024) - 2);
-
-	write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
-	write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
-	write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
+	return reg;
 }
 
+static void __after_slc_op(const int op, unsigned int reg)
+{
+	if (op & OP_FLUSH)	/* flush / flush-n-inv both wait */
+		while (read_aux_reg(ARC_AUX_SLC_CTRL) &
+		       DC_CTRL_FLUSH_STATUS)
+			;
+
+	/* Switch back to default Invalidate mode */
+	if (op == OP_INV)
+		write_aux_reg(ARC_AUX_SLC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
+}
+
+static inline void __slc_line_loop(unsigned long paddr, unsigned long sz,
+				   const int op)
+{
+	unsigned int aux_cmd;
+	int num_lines;
+
+#define SLC_LINE_MASK	(~(slc_line_sz - 1))
+
+	aux_cmd = op & OP_INV ? ARC_AUX_SLC_IVDL : ARC_AUX_SLC_FLDL;
+
+	sz += paddr & ~SLC_LINE_MASK;
+	paddr &= SLC_LINE_MASK;
+
+	num_lines = DIV_ROUND_UP(sz, slc_line_sz);
+
+	while (num_lines-- > 0) {
+		write_aux_reg(aux_cmd, paddr);
+		paddr += slc_line_sz;
+	}
+}
+
+static inline void __slc_entire_op(const int cacheop)
+{
+	int aux;
+	unsigned int ctrl_reg = __before_slc_op(cacheop);
+
+	if (cacheop & OP_INV)	/* Inv or flush-n-inv use same cmd reg */
+		aux = ARC_AUX_SLC_INVALIDATE;
+	else
+		aux = ARC_AUX_SLC_FLUSH;
+
+	write_aux_reg(aux, 0x1);
+
+	__after_slc_op(cacheop, ctrl_reg);
+}
+
+static inline void __slc_line_op(unsigned long paddr, unsigned long sz,
+				 const int cacheop)
+{
+	unsigned int ctrl_reg = __before_slc_op(cacheop);
+	__slc_line_loop(paddr, sz, cacheop);
+	__after_slc_op(cacheop, ctrl_reg);
+}
+#else
+#define __slc_entire_op(cacheop)
+#define __slc_line_op(paddr, sz, cacheop)
+#endif
+
+#ifdef CONFIG_ISA_ARCV2
 static void read_decode_cache_bcr_arcv2(void)
 {
-#ifdef CONFIG_ISA_ARCV2
+	union {
+		struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+			unsigned int pad:24, way:2, lsz:2, sz:4;
+#else
+			unsigned int sz:4, lsz:2, way:2, pad:24;
+#endif
+		} fields;
+		unsigned int word;
+	} slc_cfg;
 
-	union bcr_slc_cfg slc_cfg;
+	union {
+		struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+			unsigned int pad:24, ver:8;
+#else
+			unsigned int ver:8, pad:24;
+#endif
+		} fields;
+		unsigned int word;
+	} sbcr;
 
-	if (slc_exists()) {
+	sbcr.word = read_aux_reg(ARC_BCR_SLC);
+	if (sbcr.fields.ver) {
 		slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
-		gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
-
-		/*
-		 * We don't support configuration where L1 I$ or L1 D$ is
-		 * absent but SL$ exists. See [ NOTE 2 ] for more details.
-		 */
-		if (!icache_exists() || !dcache_exists())
-			panic("Unsupported cache configuration: SLC exists but one of L1 caches is absent");
+		slc_exists = 1;
+		slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
 	}
 
-#endif /* CONFIG_ISA_ARCV2 */
+	union {
+		struct bcr_clust_cfg {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+			unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
+#else
+			unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
+#endif
+		} fields;
+		unsigned int word;
+	} cbcr;
+
+	cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
+	if (cbcr.fields.c)
+		ioc_exists = 1;
 }
+#endif
 
 void read_decode_cache_bcr(void)
 {
 	int dc_line_sz = 0, ic_line_sz = 0;
-	union bcr_di_cache ibcr, dbcr;
 
-	/*
-	 * We don't care much about I$ line length really as there're
-	 * no per-line ops on I$ instead we only do full invalidation of it
-	 * on occasion of relocation and right before jumping to the OS.
-	 * Still we check insane config with zero-encoded line length in
-	 * presense of version field in I$ BCR. Just in case.
-	 */
+	union {
+		struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+			unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
+#else
+			unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
+#endif
+		} fields;
+		unsigned int word;
+	} ibcr, dbcr;
+
 	ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
 	if (ibcr.fields.ver) {
-		ic_line_sz = 8 << ibcr.fields.line_len;
+		icache_exists = 1;
+		l1_line_sz = ic_line_sz = 8 << ibcr.fields.line_len;
 		if (!ic_line_sz)
 			panic("Instruction exists but line length is 0\n");
 	}
 
 	dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
-	if (dbcr.fields.ver) {
-		gd->arch.l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
+	if (dbcr.fields.ver){
+		dcache_exists = 1;
+		l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
 		if (!dc_line_sz)
 			panic("Data cache exists but line length is 0\n");
 	}
+
+	if (ic_line_sz && dc_line_sz && (ic_line_sz != dc_line_sz))
+		panic("Instruction and data cache line lengths differ\n");
 }
 
 void cache_init(void)
 {
 	read_decode_cache_bcr();
 
-	if (is_isa_arcv2())
-		read_decode_cache_bcr_arcv2();
+#ifdef CONFIG_ISA_ARCV2
+	read_decode_cache_bcr_arcv2();
 
-	if (is_isa_arcv2() && ioc_enabled())
-		arc_ioc_setup();
+	if (ioc_exists) {
+		flush_dcache_all();
+		invalidate_dcache_all();
 
-	if (is_isa_arcv2() && slc_exists())
-		slc_upper_region_init();
+		/* IO coherency base - 0x8z */
+		write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, 0x80000);
+		/* IO coherency aperture size - 512Mb: 0x8z-0xAz */
+		write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE, 0x11);
+		/* Enable partial writes */
+		write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
+		/* Enable IO coherency */
+		write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
+	}
+#endif
 }
 
 int icache_status(void)
 {
-	return icache_enabled();
+	if (!icache_exists)
+		return 0;
+
+	if (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE)
+		return 0;
+	else
+		return 1;
 }
 
 void icache_enable(void)
 {
-	if (icache_exists())
+	if (icache_exists)
 		write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
 			      ~IC_CTRL_CACHE_DISABLE);
 }
 
 void icache_disable(void)
 {
-	if (!icache_exists())
-		return;
-
-	__ic_entire_invalidate();
-
-	write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
-		      IC_CTRL_CACHE_DISABLE);
-}
-
-/* IC supports only invalidation */
-static inlined_cachefunc void __ic_entire_invalidate(void)
-{
-	if (!icache_enabled())
-		return;
-
-	/* Any write to IC_IVIC register triggers invalidation of entire I$ */
-	write_aux_reg(ARC_AUX_IC_IVIC, 1);
-	/*
-	 * As per ARC HS databook (see chapter 5.3.3.2)
-	 * it is required to add 3 NOPs after each write to IC_IVIC.
-	 */
-	__builtin_arc_nop();
-	__builtin_arc_nop();
-	__builtin_arc_nop();
-	read_aux_reg(ARC_AUX_IC_CTRL);  /* blocks */
+	if (icache_exists)
+		write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
+			      IC_CTRL_CACHE_DISABLE);
 }
 
+#ifndef CONFIG_SYS_DCACHE_OFF
 void invalidate_icache_all(void)
 {
-	__ic_entire_invalidate();
-
-	/*
-	 * If SL$ is bypassed for data it is used only for instructions,
-	 * so we need to invalidate it too.
-	 * TODO: HS 3.0 supports SLC disable so we need to check slc
-	 * enable/disable status here.
-	 */
-	if (is_isa_arcv2() && slc_data_bypass())
-		__slc_entire_op(OP_INV);
+	/* Any write to IC_IVIC register triggers invalidation of entire I$ */
+	if (icache_status()) {
+		write_aux_reg(ARC_AUX_IC_IVIC, 1);
+		read_aux_reg(ARC_AUX_IC_CTRL);	/* blocks */
+	}
 }
+#else
+void invalidate_icache_all(void)
+{
+}
+#endif
 
 int dcache_status(void)
 {
-	return dcache_enabled();
+	if (!dcache_exists)
+		return 0;
+
+	if (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE)
+		return 0;
+	else
+		return 1;
 }
 
 void dcache_enable(void)
 {
-	if (!dcache_exists())
+	if (!dcache_exists)
 		return;
 
 	write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
@@ -540,77 +286,84 @@ void dcache_enable(void)
 
 void dcache_disable(void)
 {
-	if (!dcache_exists())
+	if (!dcache_exists)
 		return;
 
-	__dc_entire_op(OP_FLUSH_N_INV);
-
-	/*
-	 * As SLC will be bypassed for data after L1 D$ disable we need to
-	 * flush it first before L1 D$ disable. Also we invalidate SLC to
-	 * avoid any inconsistent data problems after enabling L1 D$ again with
-	 * dcache_enable function.
-	 */
-	if (is_isa_arcv2())
-		__slc_entire_op(OP_FLUSH_N_INV);
-
 	write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
 		      DC_CTRL_CACHE_DISABLE);
 }
 
-/* Common Helper for Line Operations on D-cache */
-static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
-				      const int cacheop)
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * Common Helper for Line Operations on {I,D}-Cache
+ */
+static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
+				     const int cacheop)
 {
 	unsigned int aux_cmd;
+#if (CONFIG_ARC_MMU_VER == 3)
+	unsigned int aux_tag;
+#endif
 	int num_lines;
 
-	/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
-	aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
+	if (cacheop == OP_INV_IC) {
+		aux_cmd = ARC_AUX_IC_IVIL;
+#if (CONFIG_ARC_MMU_VER == 3)
+		aux_tag = ARC_AUX_IC_PTAG;
+#endif
+	} else {
+		/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
+		aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
+#if (CONFIG_ARC_MMU_VER == 3)
+		aux_tag = ARC_AUX_DC_PTAG;
+#endif
+	}
 
 	sz += paddr & ~CACHE_LINE_MASK;
 	paddr &= CACHE_LINE_MASK;
 
-	num_lines = DIV_ROUND_UP(sz, gd->arch.l1_line_sz);
+	num_lines = DIV_ROUND_UP(sz, l1_line_sz);
 
 	while (num_lines-- > 0) {
 #if (CONFIG_ARC_MMU_VER == 3)
-		write_aux_reg(ARC_AUX_DC_PTAG, paddr);
+		write_aux_reg(aux_tag, paddr);
 #endif
 		write_aux_reg(aux_cmd, paddr);
-		paddr += gd->arch.l1_line_sz;
+		paddr += l1_line_sz;
 	}
 }
 
-static inlined_cachefunc void __before_dc_op(const int op)
+static unsigned int __before_dc_op(const int op)
 {
-	unsigned int ctrl;
+	unsigned int reg;
 
-	ctrl = read_aux_reg(ARC_AUX_DC_CTRL);
+	if (op == OP_INV) {
+		/*
+		 * IM is set by default and implies Flush-n-inv
+		 * Clear it here for vanilla inv
+		 */
+		reg = read_aux_reg(ARC_AUX_DC_CTRL);
+		write_aux_reg(ARC_AUX_DC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
+	}
 
-	/* IM bit implies flush-n-inv, instead of vanilla inv */
-	if (op == OP_INV)
-		ctrl &= ~DC_CTRL_INV_MODE_FLUSH;
-	else
-		ctrl |= DC_CTRL_INV_MODE_FLUSH;
-
-	write_aux_reg(ARC_AUX_DC_CTRL, ctrl);
+	return reg;
 }
 
-static inlined_cachefunc void __after_dc_op(const int op)
+static void __after_dc_op(const int op, unsigned int reg)
 {
 	if (op & OP_FLUSH)	/* flush / flush-n-inv both wait */
-		while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
+		while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
+			;
+
+	/* Switch back to default Invalidate mode */
+	if (op == OP_INV)
+		write_aux_reg(ARC_AUX_DC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
 }
 
-static inlined_cachefunc void __dc_entire_op(const int cacheop)
+static inline void __dc_entire_op(const int cacheop)
 {
 	int aux;
-
-	if (!dcache_enabled())
-		return;
-
-	__before_dc_op(cacheop);
+	unsigned int ctrl_reg = __before_dc_op(cacheop);
 
 	if (cacheop & OP_INV)	/* Inv or flush-n-inv use same cmd reg */
 		aux = ARC_AUX_DC_IVDC;
@@ -619,54 +372,45 @@ static inlined_cachefunc void __dc_entire_op(const int cacheop)
 
 	write_aux_reg(aux, 0x1);
 
-	__after_dc_op(cacheop);
+	__after_dc_op(cacheop, ctrl_reg);
 }
 
 static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
 				const int cacheop)
 {
-	if (!dcache_enabled())
-		return;
-
-	__before_dc_op(cacheop);
-	__dcache_line_loop(paddr, sz, cacheop);
-	__after_dc_op(cacheop);
+	unsigned int ctrl_reg = __before_dc_op(cacheop);
+	__cache_line_loop(paddr, sz, cacheop);
+	__after_dc_op(cacheop, ctrl_reg);
 }
+#else
+#define __dc_entire_op(cacheop)
+#define __dc_line_op(paddr, sz, cacheop)
+#endif /* !CONFIG_SYS_DCACHE_OFF */
 
 void invalidate_dcache_range(unsigned long start, unsigned long end)
 {
-	if (start >= end)
-		return;
-
-	/*
-	 * ARCv1                                 -> call __dc_line_op
-	 * ARCv2 && L1 D$ disabled               -> nothing
-	 * ARCv2 && L1 D$ enabled && IOC enabled -> nothing
-	 * ARCv2 && L1 D$ enabled && no IOC      -> call __dc_line_op; call __slc_rgn_op
-	 */
-	if (!is_isa_arcv2() || !ioc_enabled())
+#ifdef CONFIG_ISA_ARCV2
+	if (!ioc_exists)
+#endif
 		__dc_line_op(start, end - start, OP_INV);
 
-	if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
-		__slc_rgn_op(start, end - start, OP_INV);
+#ifdef CONFIG_ISA_ARCV2
+	if (slc_exists && !ioc_exists)
+		__slc_line_op(start, end - start, OP_INV);
+#endif
 }
 
 void flush_dcache_range(unsigned long start, unsigned long end)
 {
-	if (start >= end)
-		return;
-
-	/*
-	 * ARCv1                                 -> call __dc_line_op
-	 * ARCv2 && L1 D$ disabled               -> nothing
-	 * ARCv2 && L1 D$ enabled && IOC enabled -> nothing
-	 * ARCv2 && L1 D$ enabled && no IOC      -> call __dc_line_op; call __slc_rgn_op
-	 */
-	if (!is_isa_arcv2() || !ioc_enabled())
+#ifdef CONFIG_ISA_ARCV2
+	if (!ioc_exists)
+#endif
 		__dc_line_op(start, end - start, OP_FLUSH);
 
-	if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
-		__slc_rgn_op(start, end - start, OP_FLUSH);
+#ifdef CONFIG_ISA_ARCV2
+	if (slc_exists && !ioc_exists)
+		__slc_line_op(start, end - start, OP_FLUSH);
+#endif
 }
 
 void flush_cache(unsigned long start, unsigned long size)
@@ -674,47 +418,22 @@ void flush_cache(unsigned long start, unsigned long size)
 	flush_dcache_range(start, start + size);
 }
 
-/*
- * As invalidate_dcache_all() is not used in generic U-Boot code and as we
- * don't need it in arch/arc code alone (invalidate without flush) we implement
- * flush_n_invalidate_dcache_all (flush and invalidate in 1 operation) because
- * it's much safer. See [ NOTE 1 ] for more details.
- */
-void flush_n_invalidate_dcache_all(void)
+void invalidate_dcache_all(void)
 {
-	__dc_entire_op(OP_FLUSH_N_INV);
+	__dc_entire_op(OP_INV);
 
-	if (is_isa_arcv2() && !slc_data_bypass())
-		__slc_entire_op(OP_FLUSH_N_INV);
+#ifdef CONFIG_ISA_ARCV2
+	if (slc_exists)
+		__slc_entire_op(OP_INV);
+#endif
 }
 
 void flush_dcache_all(void)
 {
 	__dc_entire_op(OP_FLUSH);
 
-	if (is_isa_arcv2() && !slc_data_bypass())
+#ifdef CONFIG_ISA_ARCV2
+	if (slc_exists)
 		__slc_entire_op(OP_FLUSH);
-}
-
-/*
- * This is function to cleanup all caches (and therefore sync I/D caches) which
- * can be used for cleanup before linux launch or to sync caches during
- * relocation.
- */
-void sync_n_cleanup_cache_all(void)
-{
-	__dc_entire_op(OP_FLUSH_N_INV);
-
-	/*
-	 * If SL$ is bypassed for data it is used only for instructions,
-	 * and we shouldn't flush it. So invalidate it instead of flush_n_inv.
-	 */
-	if (is_isa_arcv2()) {
-		if (slc_data_bypass())
-			__slc_entire_op(OP_INV);
-		else
-			__slc_entire_op(OP_FLUSH_N_INV);
-	}
-
-	__ic_entire_invalidate();
+#endif
 }

arch/arc/lib/cpu.c

@@ -1,11 +1,10 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
-#include <malloc.h>
-#include <vsprintf.h>
 #include <asm/arcregs.h>
 #include <asm/cache.h>
 
@@ -29,201 +28,3 @@ int arch_early_init_r(void)
 	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
 	return 0;
 }
-
-/* This is a dummy function on arc */
-int dram_init(void)
-{
-	return 0;
-}
-
-#ifdef CONFIG_DISPLAY_CPUINFO
-const char *arc_700_version(int arcver, char *name, int name_len)
-{
-	const char *arc_ver;
-
-	switch (arcver) {
-	case 0x32:
-		arc_ver = "v4.4-4.5";
-		break;
-	case 0x33:
-		arc_ver = "v4.6-v4.9";
-		break;
-	case 0x34:
-		arc_ver = "v4.10";
-		break;
-	case 0x35:
-		arc_ver = "v4.11";
-		break;
-	default:
-		arc_ver = "unknown version";
-	}
-
-	snprintf(name, name_len, "ARC 700 %s", arc_ver);
-
-	return name;
-}
-
-struct em_template_t {
-	const bool cache;
-	const bool dsp;
-	const bool xymem;
-	const char name[8];
-};
-
-static const struct em_template_t em_versions[] = {
-	{false,	false,	false,	"EM4"},
-	{true,	false,	false,	"EM6"},
-	{false,	true,	false,	"EM5D"},
-	{true,	true,	false,	"EM7D"},
-	{false,	true,	true,	"EM9D"},
-	{true,	true,	true,	"EM11D"},
-};
-
-const char *arc_em_version(int arcver, char *name, int name_len)
-{
-	const char *arc_name = "EM";
-	const char *arc_ver;
-	bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
-	bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
-	bool xymem = ARC_FEATURE_EXISTS(ARC_AUX_XY_BUILD);
-	int i;
-
-	for (i = 0; i < sizeof(em_versions) / sizeof(struct em_template_t); i++) {
-		if (em_versions[i].cache == cache &&
-		    em_versions[i].dsp == dsp &&
-		    em_versions[i].xymem == xymem) {
-			arc_name = em_versions[i].name;
-			break;
-		}
-	}
-
-	switch (arcver) {
-	case 0x41:
-		arc_ver = "v1.1a";
-		break;
-	case 0x42:
-		arc_ver = "v3.0";
-		break;
-	case 0x43:
-		arc_ver = "v4.0";
-		break;
-	case 0x44:
-		arc_ver = "v5.0";
-		break;
-	default:
-		arc_ver = "unknown version";
-	}
-
-	snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
-
-	return name;
-}
-
-struct hs_template_t {
-	const bool cache;
-	const bool mmu;
-	const bool dual_issue;
-	const bool dsp;
-	const char name[8];
-};
-
-static const struct hs_template_t hs_versions[] = {
-	{false,	false,	false,	false,	"HS34"},
-	{true,	false,	false,	false,	"HS36"},
-	{true,	true,	false,	false,	"HS38"},
-	{false,	false,	true,	false,	"HS44"},
-	{true,	false,	true,	false,	"HS46"},
-	{true,	true,	true,	false,	"HS48"},
-	{false,	false,	true,	true,	"HS45D"},
-	{true,	false,	true,	true,	"HS47D"},
-};
-
-const char *arc_hs_version(int arcver, char *name, int name_len)
-{
-	const char *arc_name = "HS";
-	const char *arc_ver;
-	bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
-	bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
-	bool mmu = !!read_aux_reg(ARC_AUX_MMU_BCR);
-	bool dual_issue = arcver == 0x54 ? true : false;
-	int i;
-
-	for (i = 0; i < sizeof(hs_versions) / sizeof(struct hs_template_t); i++) {
-		if (hs_versions[i].cache == cache &&
-		    hs_versions[i].mmu == mmu &&
-		    hs_versions[i].dual_issue == dual_issue &&
-		    hs_versions[i].dsp == dsp) {
-			arc_name = hs_versions[i].name;
-			break;
-		}
-	}
-
-	switch (arcver) {
-	case 0x50:
-		arc_ver = "v1.0";
-		break;
-	case 0x51:
-		arc_ver = "v2.0";
-		break;
-	case 0x52:
-		arc_ver = "v2.1c";
-		break;
-	case 0x53:
-		arc_ver = "v3.0";
-		break;
-	case 0x54:
-		arc_ver = "v4.0";
-		break;
-	default:
-		arc_ver = "unknown version";
-	}
-
-	snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
-
-	return name;
-}
-
-const char *decode_identity(void)
-{
-#define MAX_CPU_NAME_LEN	64
-
-	int arcver = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
-	char *name = malloc(MAX_CPU_NAME_LEN);
-
-	if (arcver >= 0x50)
-		return arc_hs_version(arcver, name, MAX_CPU_NAME_LEN);
-	else if (arcver >= 0x40)
-		return arc_em_version(arcver, name, MAX_CPU_NAME_LEN);
-	else if (arcver >= 0x30)
-		return arc_700_version(arcver, name, MAX_CPU_NAME_LEN);
-	else
-		return "Unknown ARC core";
-}
-
-const char *decode_subsystem(void)
-{
-	int subsys_type = read_aux_reg(ARC_AUX_SUBSYS_BUILD) & GENMASK(3, 0);
-
-	switch (subsys_type) {
-	case 0: return NULL;
-	case 2: return "ARC Sensor & Control IP Subsystem";
-	case 3: return "ARC Data Fusion IP Subsystem";
-	case 4: return "ARC Secure Subsystem";
-	default: return "Unknown subsystem";
-	};
-}
-
-__weak int print_cpuinfo(void)
-{
-	const char *subsys_name = decode_subsystem();
-	char mhz[8];
-
-	printf("CPU:   %s at %s MHz\n", decode_identity(),
-	       strmhz(mhz, gd->cpu_clk));
-
-	if (subsys_name)
-		printf("Subsys:%s\n", subsys_name);
-
-	return 0;
-}
-#endif /* CONFIG_DISPLAY_CPUINFO */

arch/arc/lib/init_helpers.c

@@ -1,14 +1,17 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <asm/cache.h>
 #include <common.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int init_cache_f_r(void)
 {
-	sync_n_cleanup_cache_all();
-
+#ifndef CONFIG_SYS_DCACHE_OFF
+	flush_dcache_all();
+#endif
 	return 0;
 }

arch/arc/lib/interrupts.c

@@ -1,10 +1,10 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
-#include <irq_func.h>
 #include <asm/arcregs.h>
 #include <asm/ptrace.h>
 

arch/arc/lib/ints_low.S

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <linux/linkage.h>

arch/arc/lib/libgcc2.c

@@ -1,6 +1,7 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 1989-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include "libgcc2.h"
@@ -158,78 +159,3 @@ __umodsi3(long a, long b)
 {
 	return udivmodsi4(a, b, 1);
 }
-
-UDWtype
-__udivmoddi4(UDWtype n, UDWtype d, UDWtype *rp)
-{
-	UDWtype q = 0, r = n, y = d;
-	UWtype lz1, lz2, i, k;
-
-	/*
-	 * Implements align divisor shift dividend method. This algorithm
-	 * aligns the divisor under the dividend and then perform number of
-	 * test-subtract iterations which shift the dividend left. Number of
-	 * iterations is k + 1 where k is the number of bit positions the
-	 * divisor must be shifted left  to align it under the dividend.
-	 * quotient bits can be saved in the rightmost positions of the
-	 * dividend as it shifts left on each test-subtract iteration.
-	 */
-
-	if (y <= r) {
-		lz1 = __builtin_clzll(d);
-		lz2 = __builtin_clzll(n);
-
-		k = lz1 - lz2;
-		y = (y << k);
-
-		/*
-		 * Dividend can exceed 2 ^ (width - 1) - 1 but still be less
-		 * than the aligned divisor. Normal iteration can drops the
-		 * high order bit of the dividend. Therefore, first
-		 * test-subtract iteration is a special case, saving its
-		 * quotient bit in a separate location and not shifting
-		 * the dividend.
-		 */
-
-		if (r >= y) {
-			r = r - y;
-			q = (1ULL << k);
-		}
-
-		if (k > 0) {
-			y = y >> 1;
-
-			/*
-			 * k additional iterations where k regular test
-			 * subtract shift dividend iterations are done.
-			 */
-			i = k;
-			do {
-				if (r >= y)
-					r = ((r - y) << 1) + 1;
-				else
-					r = (r << 1);
-				i = i - 1;
-			} while (i != 0);
-
-			/*
-			 * First quotient bit is combined with the quotient
-			 * bits resulting from the k regular iterations.
-			 */
-			q = q + r;
-			r = r >> k;
-			q = q - (r << k);
-		}
-	}
-
-	if (rp)
-		*rp = r;
-
-	return q;
-}
-
-UDWtype
-__udivdi3(UDWtype n, UDWtype d)
-{
-	return __udivmoddi4(n, d, (UDWtype *)0);
-}

arch/arc/lib/libgcc2.h

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 1989-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __ASM_LIBGCC_H

arch/arc/lib/memcmp.S

@@ -0,0 +1,123 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifdef __LITTLE_ENDIAN__
+#define WORD2 r2
+#define SHIFT r3
+#else /* __BIG_ENDIAN__ */
+#define WORD2 r3
+#define SHIFT r2
+#endif /* _ENDIAN__ */
+
+.global memcmp
+.align 4
+memcmp:
+	or	%r12, %r0, %r1
+	asl_s	%r12, %r12, 30
+	sub	%r3, %r2, 1
+	brls	%r2, %r12, .Lbytewise
+	ld	%r4, [%r0, 0]
+	ld	%r5, [%r1, 0]
+	lsr.f	%lp_count, %r3, 3
+	lpne	.Loop_end
+	ld_s	WORD2, [%r0, 4]
+	ld_s	%r12, [%r1, 4]
+	brne	%r4, %r5, .Leven
+	ld.a	%r4, [%r0, 8]
+	ld.a	%r5, [%r1, 8]
+	brne	WORD2, %r12, .Lodd
+	nop
+.Loop_end:
+	asl_s	SHIFT, SHIFT, 3
+	bhs_s	.Last_cmp
+	brne	%r4, %r5, .Leven
+	ld	%r4, [%r0, 4]
+	ld	%r5, [%r1, 4]
+#ifdef __LITTLE_ENDIAN__
+	nop_s
+	/* one more load latency cycle */
+.Last_cmp:
+	xor	%r0, %r4, %r5
+	bset	%r0, %r0, SHIFT
+	sub_s	%r1, %r0, 1
+	bic_s	%r1, %r1, %r0
+	norm	%r1, %r1
+	b.d	.Leven_cmp
+	and	%r1, %r1, 24
+.Leven:
+	xor	%r0, %r4, %r5
+	sub_s	%r1, %r0, 1
+	bic_s	%r1, %r1, %r0
+	norm	%r1, %r1
+	/* slow track insn */
+	and	%r1, %r1, 24
+.Leven_cmp:
+	asl	%r2, %r4, %r1
+	asl	%r12, %r5, %r1
+	lsr_s	%r2, %r2, 1
+	lsr_s	%r12, %r12, 1
+	j_s.d	[%blink]
+	sub	%r0, %r2, %r12
+	.balign	4
+.Lodd:
+	xor	%r0, WORD2, %r12
+	sub_s	%r1, %r0, 1
+	bic_s	%r1, %r1, %r0
+	norm	%r1, %r1
+	/* slow track insn */
+	and	%r1, %r1, 24
+	asl_s	%r2, %r2, %r1
+	asl_s	%r12, %r12, %r1
+	lsr_s	%r2, %r2, 1
+	lsr_s	%r12, %r12, 1
+	j_s.d	[%blink]
+	sub	%r0, %r2, %r12
+#else /* __BIG_ENDIAN__ */
+.Last_cmp:
+	neg_s	SHIFT, SHIFT
+	lsr	%r4, %r4, SHIFT
+	lsr	%r5, %r5, SHIFT
+	/* slow track insn */
+.Leven:
+	sub.f	%r0, %r4, %r5
+	mov.ne	%r0, 1
+	j_s.d	[%blink]
+	bset.cs	%r0, %r0, 31
+.Lodd:
+	cmp_s	WORD2, %r12
+
+	mov_s	%r0, 1
+	j_s.d	[%blink]
+	bset.cs	%r0, %r0, 31
+#endif /* _ENDIAN__ */
+	.balign	4
+.Lbytewise:
+	breq	%r2, 0, .Lnil
+	ldb	%r4, [%r0, 0]
+	ldb	%r5, [%r1, 0]
+	lsr.f	%lp_count, %r3
+	lpne	.Lbyte_end
+	ldb_s	%r3, [%r0, 1]
+	ldb	%r12, [%r1, 1]
+	brne	%r4, %r5, .Lbyte_even
+	ldb.a	%r4, [%r0, 2]
+	ldb.a	%r5, [%r1, 2]
+	brne	%r3, %r12, .Lbyte_odd
+	nop
+.Lbyte_end:
+	bcc	.Lbyte_even
+	brne	%r4, %r5, .Lbyte_even
+	ldb_s	%r3, [%r0, 1]
+	ldb_s	%r12, [%r1, 1]
+.Lbyte_odd:
+	j_s.d	[%blink]
+	sub	%r0, %r3, %r12
+.Lbyte_even:
+	j_s.d	[%blink]
+	sub	%r0, %r4, %r5
+.Lnil:
+	j_s.d	[%blink]
+	mov	%r0, 0

arch/arc/lib/memcpy-700.S

@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+.global memcpy
+.align 4
+memcpy:
+	or	%r3, %r0, %r1
+	asl_s	%r3, %r3, 30
+	mov_s	%r5, %r0
+	brls.d	%r2, %r3, .Lcopy_bytewise
+	sub.f	%r3, %r2, 1
+	ld_s	%r12, [%r1, 0]
+	asr.f	%lp_count, %r3, 3
+	bbit0.d	%r3, 2, .Lnox4
+	bmsk_s	%r2, %r2, 1
+	st.ab	%r12, [%r5, 4]
+	ld.a	%r12, [%r1, 4]
+.Lnox4:
+	lppnz	.Lendloop
+	ld_s	%r3, [%r1, 4]
+	st.ab	%r12, [%r5, 4]
+	ld.a	%r12, [%r1, 8]
+	st.ab	%r3, [%r5, 4]
+.Lendloop:
+	breq	%r2, 0, .Last_store
+	ld	%r3, [%r5, 0]
+#ifdef __LITTLE_ENDIAN__
+	add3	%r2, -1, %r2
+	/* uses long immediate */
+	xor_s	%r12, %r12, %r3
+	bmsk	%r12, %r12, %r2
+	xor_s	%r12, %r12, %r3
+#else /* __BIG_ENDIAN__ */
+	sub3	%r2, 31, %r2
+	/* uses long immediate */
+	xor_s	%r3, %r3, %r12
+	bmsk	%r3, %r3, %r2
+	xor_s	%r12, %r12, %r3
+#endif /* _ENDIAN__ */
+.Last_store:
+	j_s.d	[%blink]
+	st	%r12, [%r5, 0]
+
+	.balign	4
+.Lcopy_bytewise:
+	jcs	[%blink]
+	ldb_s	%r12, [%r1, 0]
+	lsr.f	%lp_count, %r3
+	bhs_s	.Lnox1
+	stb.ab	%r12, [%r5, 1]
+	ldb.a	%r12, [%r1, 1]
+.Lnox1:
+	lppnz	.Lendbloop
+	ldb_s	%r3, [%r1, 1]
+	stb.ab	%r12, [%r5, 1]
+	ldb.a	%r12, [%r1, 2]
+	stb.ab	%r3, [%r5, 1]
+.Lendbloop:
+	j_s.d	[%blink]
+	stb	%r12, [%r5, 0]

arch/arc/lib/memset.S

@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#define SMALL	7 /* Must be at least 6 to deal with alignment/loop issues.  */
+
+.global memset
+.align 4
+memset:
+	mov_s	%r4, %r0
+	or	%r12, %r0, %r2
+	bmsk.f	%r12, %r12, 1
+	extb_s	%r1, %r1
+	asl	%r3, %r1, 8
+	beq.d	.Laligned
+	or_s	%r1, %r1, %r3
+	brls	%r2, SMALL, .Ltiny
+	add	%r3, %r2, %r0
+	stb	%r1, [%r3, -1]
+	bclr_s	%r3, %r3, 0
+	stw	%r1, [%r3, -2]
+	bmsk.f	%r12, %r0, 1
+	add_s	%r2, %r2, %r12
+	sub.ne	%r2, %r2, 4
+	stb.ab	%r1, [%r4, 1]
+	and	%r4, %r4, -2
+	stw.ab	%r1, [%r4, 2]
+	and	%r4, %r4, -4
+
+	.balign	4
+.Laligned:
+	asl	%r3, %r1, 16
+	lsr.f	%lp_count, %r2, 2
+	or_s	%r1, %r1, %r3
+	lpne	.Loop_end
+	st.ab	%r1, [%r4, 4]
+.Loop_end:
+	j_s	[%blink]
+
+	.balign	4
+.Ltiny:
+	mov.f	%lp_count, %r2
+	lpne	.Ltiny_end
+	stb.ab	%r1, [%r4, 1]
+.Ltiny_end:
+	j_s	[%blink]
+
+/*
+ * memzero: @r0 = mem, @r1 = size_t
+ * memset:  @r0 = mem, @r1 = char, @r2 = size_t
+ */
+
+.global memzero
+.align 4
+memzero:
+	/* adjust bzero args to memset args */
+	mov	%r2, %r1
+	mov	%r1, 0
+	/* tail call so need to tinker with blink */
+	b	memset

arch/arc/lib/relocate.c

@@ -1,6 +1,7 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -8,9 +9,7 @@
 #include <asm-generic/sections.h>
 
 extern ulong __image_copy_start;
-extern ulong __ivt_start;
 extern ulong __ivt_end;
-extern ulong __text_end;
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -18,9 +17,6 @@ int copy_uboot_to_ram(void)
 {
 	size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
 
-	if (gd->flags & GD_FLG_SKIP_RELOC)
-		return 0;
-
 	memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
 
 	return 0;
@@ -44,13 +40,10 @@ int do_elf_reloc_fixups(void)
 	Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
 	Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
 
-	if (gd->flags & GD_FLG_SKIP_RELOC)
-		return 0;
-
 	debug("Section .rela.dyn is located at %08x-%08x\n",
 	      (unsigned int)re_src, (unsigned int)re_end);
 
-	Elf32_Addr *offset_ptr_rom;
+	Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
 	Elf32_Addr *offset_ptr_ram;
 
 	do {
@@ -59,28 +52,15 @@ int do_elf_reloc_fixups(void)
 
 		/* Check that the location of the relocation is in .text */
 		if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
-		    offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
-			unsigned int val, do_swap = 0;
+		    offset_ptr_rom > last_offset) {
+			unsigned int val;
 			/* Switch to the in-RAM version */
 			offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
 							gd->reloc_off);
 
-#ifdef __LITTLE_ENDIAN__
-			/* If location in ".text" section swap value */
-			if (((u32)offset_ptr_rom >= (u32)&__text_start &&
-			     (u32)offset_ptr_rom <= (u32)&__text_end)
-#if defined(__ARC700__) || defined(__ARC600__)
-			    || ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
-				(u32)offset_ptr_rom <= (u32)&__ivt_end)
-#endif
-			   )
-				do_swap = 1;
-#endif
-
-			debug("Patching value @ %08x (relocated to %08x)%s\n",
+			debug("Patching value @ %08x (relocated to %08x)\n",
 			      (unsigned int)offset_ptr_rom,
-			      (unsigned int)offset_ptr_ram,
-			      do_swap ? ", middle-endian encoded" : "");
+			      (unsigned int)offset_ptr_ram);
 
 			/*
 			 * Use "memcpy" because target location might be
@@ -90,45 +70,28 @@ int do_elf_reloc_fixups(void)
 			 */
 			memcpy(&val, offset_ptr_ram, sizeof(int));
 
-			if (do_swap)
+#ifdef __LITTLE_ENDIAN__
+			/* If location in ".text" section swap value */
+			if ((unsigned int)offset_ptr_rom <
+			    (unsigned int)&__ivt_end)
 				val = (val << 16) | (val >> 16);
+#endif
 
 			/* Check that the target points into executable */
-			if (val < (unsigned int)&__image_copy_start ||
-			    val > (unsigned int)&__image_copy_end) {
-				/* TODO: Use panic() instead of debug()
-				 *
-				 * For some reason GCC might generate
-				 * fake relocation even for LD/SC of constant
-				 * inderectly. See an example below:
-				 * ----------------------->8--------------------
-				 * static int setup_mon_len(void)
-				 * {
-				 *         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
-				 *         return 0;
-				 * }
-				 * ----------------------->8--------------------
-				 *
-				 * And that's what we get in the binary:
-				 * ----------------------->8--------------------
-				 * 10005cb4 <setup_mon_len>:
-				 * 10005cb4:       193c 3f80 0003 2f80     st      0x32f80,[r25,60]
-				 *                         10005cb8: R_ARC_RELATIVE        *ABS*-0x10000000
-				 * 10005cbc:       7fe0                    j_s.d   [blink]
-				 * 10005cbe:       700c                    mov_s   r0,0
-				 * ----------------------->8--------------------
-				 */
-				debug("Relocation target %08x points outside of image\n",
-				      val);
+			if (val >= (unsigned int)&__image_copy_start && val <=
+			    (unsigned int)&__image_copy_end) {
+				val += gd->reloc_off;
+#ifdef __LITTLE_ENDIAN__
+				/* If location in ".text" section swap value */
+				if ((unsigned int)offset_ptr_rom <
+				    (unsigned int)&__ivt_end)
+					val = (val << 16) | (val >> 16);
+#endif
+				memcpy(offset_ptr_ram, &val, sizeof(int));
 			}
-
-			val += gd->reloc_off;
-
-			if (do_swap)
-				val = (val << 16) | (val >> 16);
-
-			memcpy(offset_ptr_ram, &val, sizeof(int));
 		}
+		last_offset = offset_ptr_rom;
+
 	} while (++re_src < re_end);
 
 	return 0;

arch/arc/lib/reset.c

@@ -1,22 +1,19 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <command.h>
 #include <common.h>
 
-__weak void reset_cpu(ulong addr)
-{
-	/* Stop debug session here */
-	__builtin_arc_brk();
-}
-
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
-	printf("Resetting the board...\n");
-
-	reset_cpu(0);
+	printf("Put your restart handler here\n");
 
+#ifdef DEBUG
+	/* Stop debug session here */
+	__asm__("brk");
+#endif
 	return 0;
 }

arch/arc/lib/start.S

@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <asm-offsets.h>
@@ -16,38 +17,26 @@ ENTRY(_start)
 	lr	r5, [ARC_BCR_IC_BUILD]
 	breq	r5, 0, 1f		; I$ doesn't exist
 	lr	r5, [ARC_AUX_IC_CTRL]
-#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#ifndef CONFIG_SYS_ICACHE_OFF
 	bclr	r5, r5, 0		; 0 - Enable, 1 is Disable
 #else
 	bset	r5, r5, 0		; I$ exists, but is not used
 #endif
 	sr	r5, [ARC_AUX_IC_CTRL]
 
-	mov	r5, 1
-	sr	r5, [ARC_AUX_IC_IVIC]
-	; As per ARC HS databook (see chapter 5.3.3.2)
-	; it is required to add 3 NOPs after each write to IC_IVIC.
-	nop
-	nop
-	nop
-
 1:
 	; Disable/enable D-cache according to configuration
 	lr	r5, [ARC_BCR_DC_BUILD]
 	breq	r5, 0, 1f		; D$ doesn't exist
 	lr	r5, [ARC_AUX_DC_CTRL]
 	bclr	r5, r5, 6		; Invalidate (discard w/o wback)
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+#ifndef CONFIG_SYS_DCACHE_OFF
 	bclr	r5, r5, 0		; Enable (+Inv)
 #else
 	bset	r5, r5, 0		; Disable (+Inv)
 #endif
 	sr	r5, [ARC_AUX_DC_CTRL]
 
-	mov	r5, 1
-	sr	r5, [ARC_AUX_DC_IVDC]
-
-
 1:
 #ifdef CONFIG_ISA_ARCV2
 	; Disable System-Level Cache (SLC)
@@ -61,15 +50,6 @@ ENTRY(_start)
 1:
 #endif
 
-#ifdef __ARC_UNALIGNED__
-	/*
-	 * Enable handling of unaligned access in the CPU as by default
-	 * this HW feature is disabled while GCC starting from 8.1.0
-	 * unconditionally uses it for ARC HS cores.
-	 */
-	flag	1 << STATUS_AD_BIT
-#endif
-
 	/* Establish C runtime stack and frame */
 	mov	%sp, CONFIG_SYS_INIT_SP_ADDR
 	mov	%fp, %sp
@@ -84,20 +64,9 @@ ENTRY(_start)
 	/* Initialize reserved area - note: r0 already contains address */
 	bl	board_init_f_init_reserve
 
-#ifdef CONFIG_DEBUG_UART
-	/* Earliest point to set up early debug uart */
-	bl	debug_uart_init
-#endif
-
 	/* Zero the one and only argument of "board_init_f" */
 	mov_s	%r0, 0
-	bl	board_init_f
-
-	/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
-	/* Make sure we don't lose GD overwritten by zero new GD */
-	mov	%r0, %r25
-	mov	%r1, 0
-	bl	board_init_r
+	j	board_init_f
 ENDPROC(_start)
 
 /*

arch/arc/lib/strchr-700.S

@@ -0,0 +1,141 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * ARC700 has a relatively long pipeline and branch prediction, so we want
+ * to avoid branches that are hard to predict.  On the other hand, the
+ * presence of the norm instruction makes it easier to operate on whole
+ * words branch-free.
+ */
+
+.global strchr
+.align 4
+strchr:
+	extb_s	%r1, %r1
+	asl	%r5, %r1, 8
+	bmsk	%r2, %r0, 1
+	or	%r5, %r5, %r1
+	mov_s	%r3, 0x01010101
+	breq.d	%r2, %r0, .Laligned
+	asl	%r4, %r5, 16
+	sub_s	%r0, %r0, %r2
+	asl	%r7, %r2, 3
+	ld_s	%r2, [%r0]
+#ifdef __LITTLE_ENDIAN__
+	asl	%r7, %r3, %r7
+#else /* __BIG_ENDIAN__ */
+	lsr	%r7, %r3, %r7
+#endif /* _ENDIAN__ */
+	or	%r5, %r5, %r4
+	ror	%r4, %r3
+	sub	%r12, %r2, %r7
+	bic_s	%r12, %r12, %r2
+	and	%r12, %r12, %r4
+	brne.d	%r12, 0, .Lfound0_ua
+	xor	%r6, %r2, %r5
+	ld.a	%r2, [%r0, 4]
+	sub	%r12, %r6, %r7
+	bic	%r12, %r12, %r6
+#ifdef __LITTLE_ENDIAN__
+	and	%r7, %r12, %r4
+	/* For speed, we want this branch to be unaligned. */
+	breq	%r7, 0, .Loop
+	/* Likewise this one */
+	b	.Lfound_char
+#else /* __BIG_ENDIAN__ */
+	and	%r12, %r12, %r4
+	/* For speed, we want this branch to be unaligned. */
+	breq	%r12, 0, .Loop
+	lsr_s	%r12, %r12, 7
+	bic 	%r2, %r7, %r6
+	b.d	.Lfound_char_b
+	and_s	%r2, %r2, %r12
+#endif /* _ENDIAN__ */
+	/* We require this code address to be unaligned for speed...  */
+.Laligned:
+	ld_s	%r2, [%r0]
+	or	%r5, %r5, %r4
+	ror	%r4, %r3
+	/* ... so that this code address is aligned, for itself and ...  */
+.Loop:
+	sub	%r12, %r2, %r3
+	bic_s	%r12, %r12, %r2
+	and	%r12, %r12, %r4
+	brne.d	%r12, 0, .Lfound0
+	xor	%r6, %r2, %r5
+	ld.a	%r2, [%r0, 4]
+	sub	%r12, %r6, %r3
+	bic	%r12, %r12, %r6
+	and	%r7, %r12, %r4
+	breq	%r7, 0, .Loop
+	/*
+	 *... so that this branch is unaligned.
+	 * Found searched-for character.
+	 * r0 has already advanced to next word.
+	 */
+#ifdef __LITTLE_ENDIAN__
+	/*
+	 * We only need the information about the first matching byte
+	 * (i.e. the least significant matching byte) to be exact,
+	 * hence there is no problem with carry effects.
+	 */
+.Lfound_char:
+	sub	%r3, %r7, 1
+	bic	%r3, %r3, %r7
+	norm	%r2, %r3
+	sub_s	%r0, %r0, 1
+	asr_s	%r2, %r2, 3
+	j.d	[%blink]
+	sub_s	%r0, %r0, %r2
+
+	.balign	4
+.Lfound0_ua:
+	mov	%r3, %r7
+.Lfound0:
+	sub	%r3, %r6, %r3
+	bic	%r3, %r3, %r6
+	and	%r2, %r3, %r4
+	or_s	%r12, %r12, %r2
+	sub_s	%r3, %r12, 1
+	bic_s	%r3, %r3, %r12
+	norm	%r3, %r3
+	add_s	%r0, %r0, 3
+	asr_s	%r12, %r3, 3
+	asl.f	0, %r2, %r3
+	sub_s	%r0, %r0, %r12
+	j_s.d	[%blink]
+	mov.pl	%r0, 0
+#else /* __BIG_ENDIAN__ */
+.Lfound_char:
+	lsr	%r7, %r7, 7
+
+	bic	%r2, %r7, %r6
+.Lfound_char_b:
+	norm	%r2, %r2
+	sub_s	%r0, %r0, 4
+	asr_s	%r2, %r2, 3
+	j.d	[%blink]
+	add_s	%r0, %r0, %r2
+
+.Lfound0_ua:
+	mov_s	%r3, %r7
+.Lfound0:
+	asl_s	%r2, %r2, 7
+	or	%r7, %r6, %r4
+	bic_s	%r12, %r12, %r2
+	sub	%r2, %r7, %r3
+	or	%r2, %r2, %r6
+	bic	%r12, %r2, %r12
+	bic.f	%r3, %r4, %r12
+	norm	%r3, %r3
+
+	add.pl	%r3, %r3, 1
+	asr_s	%r12, %r3, 3
+	asl.f	0, %r2, %r3
+	add_s	%r0, %r0, %r12
+	j_s.d	[%blink]
+	mov.mi	%r0, 0
+#endif /* _ENDIAN__ */

arch/arc/lib/strcmp.S

@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * This is optimized primarily for the ARC700.
+ * It would be possible to speed up the loops by one cycle / word
+ * respective one cycle / byte by forcing double source 1 alignment, unrolling
+ * by a factor of two, and speculatively loading the second word / byte of
+ * source 1; however, that would increase the overhead for loop setup / finish,
+ * and strcmp might often terminate early.
+ */
+
+.global strcmp
+.align 4
+strcmp:
+	or	%r2, %r0, %r1
+	bmsk_s	%r2, %r2, 1
+	brne	%r2, 0, .Lcharloop
+	mov_s	%r12, 0x01010101
+	ror	%r5, %r12
+.Lwordloop:
+	ld.ab	%r2, [%r0, 4]
+	ld.ab	%r3, [%r1, 4]
+	nop_s
+	sub	%r4, %r2, %r12
+	bic	%r4, %r4, %r2
+	and	%r4, %r4, %r5
+	brne	%r4, 0, .Lfound0
+	breq	%r2 ,%r3, .Lwordloop
+#ifdef	__LITTLE_ENDIAN__
+	xor	%r0, %r2, %r3	/* mask for difference */
+	sub_s	%r1, %r0, 1
+	bic_s	%r0, %r0, %r1	/* mask for least significant difference bit */
+	sub	%r1, %r5, %r0
+	xor	%r0, %r5, %r1	/* mask for least significant difference byte */
+	and_s	%r2, %r2, %r0
+	and_s	%r3, %r3, %r0
+#endif /* _ENDIAN__ */
+	cmp_s	%r2, %r3
+	mov_s	%r0, 1
+	j_s.d	[%blink]
+	bset.lo	%r0, %r0, 31
+
+	.balign	4
+#ifdef __LITTLE_ENDIAN__
+.Lfound0:
+	xor	%r0, %r2, %r3	/* mask for difference */
+	or	%r0, %r0, %r4	/* or in zero indicator */
+	sub_s	%r1, %r0, 1
+	bic_s	%r0, %r0, %r1	/* mask for least significant difference bit */
+	sub	%r1, %r5, %r0
+	xor	%r0, %r5, %r1	/* mask for least significant difference byte */
+	and_s	%r2, %r2, %r0
+	and_s	%r3, %r3, %r0
+	sub.f	%r0, %r2, %r3
+	mov.hi	%r0, 1
+	j_s.d	[%blink]
+	bset.lo	%r0, %r0, 31
+#else /* __BIG_ENDIAN__ */
+	/*
+	 * The zero-detection above can mis-detect 0x01 bytes as zeroes
+	 * because of carry-propagateion from a lower significant zero byte.
+	 * We can compensate for this by checking that bit0 is zero.
+	 * This compensation is not necessary in the step where we
+	 * get a low estimate for r2, because in any affected bytes
+	 * we already have 0x00 or 0x01, which will remain unchanged
+	 * when bit 7 is cleared.
+	 */
+	.balign	4
+.Lfound0:
+	lsr	%r0, %r4, 8
+	lsr_s	%r1, %r2
+	bic_s	%r2, %r2, %r0	/* get low estimate for r2 and get ... */
+	bic_s	%r0, %r0, %r1	/* <this is the adjusted mask for zeros> */
+	or_s	%r3, %r3, %r0	/* ... high estimate r3 so that r2 > r3 will */
+	cmp_s	%r3, %r2	/* ... be independent of trailing garbage */
+	or_s	%r2, %r2, %r0	/* likewise for r3 > r2 */
+	bic_s	%r3, %r3, %r0
+	rlc	%r0, 0		/* r0 := r2 > r3 ? 1 : 0 */
+	cmp_s	%r2, %r3
+	j_s.d	[%blink]
+	bset.lo	%r0, %r0, 31
+#endif /* _ENDIAN__ */
+
+	.balign	4
+.Lcharloop:
+	ldb.ab	%r2,[%r0,1]
+	ldb.ab	%r3,[%r1,1]
+	nop_s
+	breq	%r2, 0, .Lcmpend
+	breq	%r2, %r3, .Lcharloop
+.Lcmpend:
+	j_s.d	[%blink]
+	sub	%r0, %r2, %r3

arch/arc/lib/strcpy-700.S

@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * If dst and src are 4 byte aligned, copy 8 bytes at a time.
+ * If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
+ * it 8 byte aligned.  Thus, we can do a little read-ahead, without
+ * dereferencing a cache line that we should not touch.
+ * Note that short and long instructions have been scheduled to avoid
+ * branch stalls.
+ * The beq_s to r3z could be made unaligned & long to avoid a stall
+ * there, but it is not likely to be taken often, and it would also be likely
+ * to cost an unaligned mispredict at the next call.
+ */
+
+.global strcpy
+.align 4
+strcpy:
+	or	%r2, %r0, %r1
+	bmsk_s	%r2, %r2, 1
+	brne.d	%r2, 0, charloop
+	mov_s	%r10, %r0
+	ld_s	%r3, [%r1, 0]
+	mov	%r8, 0x01010101
+	bbit0.d	%r1, 2, loop_start
+	ror	%r12, %r8
+	sub	%r2, %r3, %r8
+	bic_s	%r2, %r2, %r3
+	tst_s	%r2,%r12
+	bne	r3z
+	mov_s	%r4,%r3
+	.balign 4
+loop:
+	ld.a	%r3, [%r1, 4]
+	st.ab	%r4, [%r10, 4]
+loop_start:
+	ld.a	%r4, [%r1, 4]
+	sub	%r2, %r3, %r8
+	bic_s	%r2, %r2, %r3
+	tst_s	%r2, %r12
+	bne_s	r3z
+	st.ab	%r3, [%r10, 4]
+	sub	%r2, %r4, %r8
+	bic	%r2, %r2, %r4
+	tst	%r2, %r12
+	beq	loop
+	mov_s	%r3, %r4
+#ifdef __LITTLE_ENDIAN__
+r3z:	bmsk.f	%r1, %r3, 7
+	lsr_s	%r3, %r3, 8
+#else /* __BIG_ENDIAN__ */
+r3z:	lsr.f	%r1, %r3, 24
+	asl_s	%r3, %r3, 8
+#endif /* _ENDIAN__ */
+	bne.d	r3z
+	stb.ab	%r1, [%r10, 1]
+	j_s	[%blink]
+
+	.balign	4
+charloop:
+	ldb.ab	%r3, [%r1, 1]
+	brne.d	%r3, 0, charloop
+	stb.ab	%r3, [%r10, 1]
+	j	[%blink]

arch/arc/lib/strlen.S

@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+.global strlen
+.align 4
+strlen:
+	or	%r3, %r0, 7
+	ld	%r2, [%r3, -7]
+	ld.a	%r6, [%r3, -3]
+	mov	%r4, 0x01010101
+	/* uses long immediate */
+#ifdef __LITTLE_ENDIAN__
+	asl_s	%r1, %r0, 3
+	btst_s	%r0, 2
+	asl	%r7, %r4, %r1
+	ror	%r5, %r4
+	sub	%r1, %r2, %r7
+	bic_s	%r1, %r1, %r2
+	mov.eq	%r7, %r4
+	sub	%r12, %r6, %r7
+	bic	%r12, %r12, %r6
+	or.eq	%r12, %r12, %r1
+	and	%r12, %r12, %r5
+	brne	%r12, 0, .Learly_end
+#else /* __BIG_ENDIAN__ */
+	ror	%r5, %r4
+	btst_s	%r0, 2
+	mov_s	%r1, 31
+	sub3	%r7, %r1, %r0
+	sub	%r1, %r2, %r4
+	bic_s	%r1, %r1, %r2
+	bmsk	%r1, %r1, %r7
+	sub	%r12, %r6, %r4
+	bic	%r12, %r12, %r6
+	bmsk.ne	%r12, %r12, %r7
+	or.eq	%r12, %r12, %r1
+	and	%r12, %r12, %r5
+	brne	%r12, 0, .Learly_end
+#endif /* _ENDIAN__ */
+
+.Loop:
+	ld_s	%r2, [%r3, 4]
+	ld.a	%r6, [%r3, 8]
+	/* stall for load result */
+	sub	%r1, %r2, %r4
+	bic_s	%r1, %r1, %r2
+	sub	%r12, %r6, %r4
+	bic	%r12, %r12, %r6
+	or	%r12, %r12, %r1
+	and	%r12, %r12, %r5
+	breq	%r12, 0, .Loop
+.Lend:
+	and.f	%r1, %r1, %r5
+	sub.ne	%r3, %r3, 4
+	mov.eq	%r1, %r12
+#ifdef __LITTLE_ENDIAN__
+	sub_s	%r2, %r1, 1
+	bic_s	%r2, %r2, %r1
+	norm	%r1, %r2
+	sub_s	%r0, %r0, 3
+	lsr_s	%r1, %r1, 3
+	sub	%r0, %r3, %r0
+	j_s.d	[%blink]
+	sub	%r0, %r0, %r1
+#else /* __BIG_ENDIAN__ */
+	lsr_s	%r1, %r1, 7
+	mov.eq	%r2, %r6
+	bic_s	%r1, %r1, %r2
+	norm	%r1, %r1
+	sub	%r0, %r3, %r0
+	lsr_s	%r1, %r1, 3
+	j_s.d	[%blink]
+	add	%r0, %r0, %r1
+#endif /* _ENDIAN */
+.Learly_end:
+	b.d	.Lend
+	sub_s.ne %r1, %r1, %r1

arch/arc/lib/timer.c

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arcregs.h>
+
+#define NH_MODE	(1 << 1)	/* Disable timer if CPU is halted */
+
+int timer_init(void)
+{
+	write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
+	/* Set max value for counter/timer */
+	write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
+	/* Set initial count value and restart counter/timer */
+	write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
+	return 0;
+}
+
+unsigned long timer_read_counter(void)
+{
+	return read_aux_reg(ARC_AUX_TIMER0_CNT);
+}

arch/arm/Makefile

@@ -1,7 +1,9 @@
-# SPDX-License-Identifier: GPL-2.0+
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
-CONFIG_CPU_V7A=
+CONFIG_CPU_V7=
 CONFIG_CPU_ARM720T=y
 endif
 
@@ -12,12 +14,10 @@ arch-$(CONFIG_CPU_ARM926EJS)	=-march=armv5te
 arch-$(CONFIG_CPU_ARM946ES)	=-march=armv5te
 arch-$(CONFIG_CPU_SA1100)	=-march=armv4
 arch-$(CONFIG_CPU_PXA)		=
-arch-$(CONFIG_CPU_ARM1136)	=-march=armv5t
+arch-$(CONFIG_CPU_ARM1136)	=-march=armv5
 arch-$(CONFIG_CPU_ARM1176)	=-march=armv5t
-arch-$(CONFIG_CPU_V7A)		=$(call cc-option, -march=armv7-a, \
-				 $(call cc-option, -march=armv7))
-arch-$(CONFIG_CPU_V7M)		=-march=armv7-m
-arch-$(CONFIG_CPU_V7R)		=-march=armv7-r
+arch-$(CONFIG_CPU_V7)		=$(call cc-option, -march=armv7-a, \
+				 $(call cc-option, -march=armv7, -march=armv5))
 arch-$(CONFIG_ARM64)		=-march=armv8-a
 
 # On Tegra systems we must build SPL for the armv4 core on the device
@@ -40,8 +40,7 @@ tune-$(CONFIG_CPU_SA1100)	=-mtune=strongarm1100
 tune-$(CONFIG_CPU_PXA)		=-mcpu=xscale
 tune-$(CONFIG_CPU_ARM1136)	=
 tune-$(CONFIG_CPU_ARM1176)	=
-tune-$(CONFIG_CPU_V7A)		=-mtune=generic-armv7-a
-tune-$(CONFIG_CPU_V7R)		=
+tune-$(CONFIG_CPU_V7)		=
 tune-$(CONFIG_ARM64)		=
 
 # Evaluate tune cc-option calls now
@@ -51,25 +50,19 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
 
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
-machine-$(CONFIG_ARCH_ASPEED)		+= aspeed
 machine-$(CONFIG_ARCH_AT91)		+= at91
 machine-$(CONFIG_ARCH_BCM283X)		+= bcm283x
-machine-$(CONFIG_ARCH_BCMSTB)		+= bcmstb
 machine-$(CONFIG_ARCH_DAVINCI)		+= davinci
 machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
 machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
-machine-$(CONFIG_ARCH_K3)		+= k3
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
-machine-$(CONFIG_ARCH_MEDIATEK)		+= mediatek
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
 machine-$(CONFIG_ORION5X)		+= orion5x
-machine-$(CONFIG_ARCH_OMAP2PLUS)	+= omap2
-machine-$(CONFIG_ARCH_OWL)		+= owl
 machine-$(CONFIG_ARCH_S5PC1XX)		+= s5pc1xx
 machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
 machine-$(CONFIG_ARCH_SNAPDRAGON)	+= snapdragon
@@ -77,13 +70,9 @@ machine-$(CONFIG_ARCH_SOCFPGA)		+= socfpga
 machine-$(CONFIG_ARCH_RMOBILE)		+= rmobile
 machine-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip
 machine-$(CONFIG_STM32)			+= stm32
-machine-$(CONFIG_ARCH_STM32MP)		+= stm32mp
 machine-$(CONFIG_TEGRA)			+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)		+= uniphier
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
-machine-$(CONFIG_ARCH_ZYNQMP)		+= zynqmp
-machine-$(CONFIG_ARCH_VERSAL)		+= versal
-machine-$(CONFIG_ARCH_ZYNQMP_R5)	+= zynqmp-r5
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
@@ -104,12 +93,12 @@ libs-y += arch/arm/cpu/
 libs-y += arch/arm/lib/
 
 ifeq ($(CONFIG_SPL_BUILD),y)
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 imx8m imx8))
-libs-y += arch/arm/mach-imx/
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx31 mx35))
+libs-y += arch/arm/imx-common/
 endif
 else
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8 vf610))
-libs-y += arch/arm/mach-imx/
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx31 mx35 mxs vf610))
+libs-y += arch/arm/imx-common/
 endif
 endif
 

arch/arm/config.mk

@@ -1,19 +1,18 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2000-2002
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifneq ($(CONFIG_ARCH_OMAP2PLUS),)
+ifneq ($(CONFIG_OMAP_COMMON),)
 CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
 else
 CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
 endif
 endif
 
-CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections
-CFLAGS_EFI := -fpic -fshort-wchar
-
 LDFLAGS_FINAL += --gc-sections
 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
 		     -fno-common -ffixed-r9
@@ -21,20 +20,15 @@ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
       $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
 
 # LLVM support
-LLVM_RELFLAGS		:= $(call cc-option,-mllvm,) \
-			$(call cc-option,-mno-movt,)
+LLVMS_RELFLAGS		:= $(call cc-option,-mllvm,) \
+			$(call cc-option,-target arm-none-eabi,) \
+			$(call cc-option,-arm-use-movt=0,)
 PLATFORM_RELFLAGS	+= $(LLVM_RELFLAGS)
 
 PLATFORM_CPPFLAGS += -D__ARM__
 
-ifdef CONFIG_ARM64
-PLATFORM_ELFFLAGS += -B aarch64 -O elf64-littleaarch64
-else
-PLATFORM_ELFFLAGS += -B arm -O elf32-littlearm
-endif
-
 # Choose between ARM/Thumb instruction sets
-ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
 AFLAGS_IMPLICIT_IT	:= $(call as-option,-Wa$(comma)-mimplicit-it=always)
 PF_CPPFLAGS_ARM		:= $(AFLAGS_IMPLICIT_IT) \
 			$(call cc-option, -mthumb -mthumb-interwork,\
@@ -47,8 +41,9 @@ PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
 endif
 
 # Only test once
-ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
-archprepare: checkthumb checkgcc6
+ifneq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
+archprepare: checkthumb
 
 checkthumb:
 	@if test "$(call cc-name)" = "gcc" -a \
@@ -58,17 +53,8 @@ checkthumb:
 		echo '*** Your board is configured for THUMB mode.'; \
 		false; \
 	fi
-else
-archprepare: checkgcc6
 endif
-
-checkgcc6:
-	@if test "$(call cc-name)" = "gcc" -a \
-			"$(call cc-version)" -lt "0600"; then \
-		echo '*** Your GCC is older than 6.0 and is not supported'; \
-		false; \
-	fi
-
+endif
 
 # Try if EABI is supported, else fall back to old API,
 # i. e. for example:
@@ -110,7 +96,7 @@ LDFLAGS_u-boot += -pie
 #
 # http://sourceware.org/bugzilla/show_bug.cgi?id=12532
 #
-ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
+ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
 ifeq ($(GAS_BUG_12532),)
 export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
 	then echo y; else echo n; fi)
@@ -132,20 +118,15 @@ endif
 
 # limit ourselves to the sections we want in the .bin.
 ifdef CONFIG_ARM64
-OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-		-j .u_boot_list -j .rela.dyn -j .got -j .got.plt \
-		-j .binman_sym_table -j .text_rest
+OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
 else
 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
-		-j .binman_sym_table -j .text_rest
+		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn
 endif
 
-# if a dtb section exists we always have to include it
-# there are only two cases where it is generated
-# 1) OF_EMBEDED is turned on
-# 2) unit tests include device tree blobs
+ifdef CONFIG_OF_EMBED
 OBJCOPYFLAGS += -j .dtb.init.rodata
+endif
 
 ifdef CONFIG_EFI_LOADER
 OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
@@ -163,11 +144,4 @@ else
 ALL-y += u-boot.imx
 endif
 endif
-ifneq ($(CONFIG_VF610),)
-ALL-y += u-boot.vyb
 endif
-endif
-
-EFI_LDS := elf_arm_efi.lds
-EFI_CRT0 := crt0_arm_efi.o
-EFI_RELOC := reloc_arm_efi.o

arch/arm/cpu/Makefile

@@ -1,3 +1,5 @@
-# SPDX-License-Identifier: GPL-2.0+
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj- += dummy.o

arch/arm/cpu/arm11/Makefile

@@ -1,10 +1,8 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2000-2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj-y	= cpu.o
-
-ifneq ($(CONFIG_SPL_BUILD),y)
-obj-$(CONFIG_EFI_LOADER) += sctlr.o
-endif

arch/arm/cpu/arm11/cpu.c

@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2004 Texas Insturments
  *
@@ -8,6 +7,8 @@
  *
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -16,8 +17,6 @@
 
 #include <common.h>
 #include <command.h>
-#include <cpu_func.h>
-#include <irq_func.h>
 #include <asm/system.h>
 
 static void cache_flush(void);
@@ -31,7 +30,7 @@ int cleanup_before_linux (void)
 	 * we turn off caches etc ...
 	 */
 
-	disable_interrupts();
+	disable_interrupts ();
 
 	/* turn off I/D-cache */
 	icache_disable();
@@ -53,7 +52,7 @@ static void cache_flush(void)
 	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
 }
 
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+#ifndef CONFIG_SYS_DCACHE_OFF
 void invalidate_dcache_all(void)
 {
 	asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
@@ -89,7 +88,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 	asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
 }
 
-#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
+#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
 void invalidate_dcache_all(void)
 {
 }
@@ -97,15 +96,15 @@ void invalidate_dcache_all(void)
 void flush_dcache_all(void)
 {
 }
-#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
+#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
 
-#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
 void enable_caches(void)
 {
-#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#ifndef CONFIG_SYS_ICACHE_OFF
 	icache_enable();
 #endif
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+#ifndef CONFIG_SYS_DCACHE_OFF
 	dcache_enable();
 #endif
 }

arch/arm/cpu/arm11/sctlr.S

@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier:	GPL-2.0+ */
-/*
- *  Routines to access the system control register
- *
- *  Copyright (c) 2019 Heinrich Schuchardt
- */
-
-#include <linux/linkage.h>
-
-/*
- * void allow_unaligned(void) - allow unaligned access
- *
- * This routine sets the enable unaligned data support flag and clears the
- * aligned flag in the system control register.
- * After calling this routine unaligned access does no longer leads to a
- * data abort or undefined behavior but is handled by the CPU.
- * For details see the "ARM Architecture Reference Manual" for ARMv6.
- */
-ENTRY(allow_unaligned)
-	mrc	p15, 0, r0, c1, c0, 0	@ load system control register
-	orr	r0, r0, #1 << 22	@ set unaligned data support flag
-	bic	r0, r0, #2		@ clear aligned flag
-	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
-	bx	lr			@ return
-ENDPROC(allow_unaligned)

arch/arm/cpu/arm1136/Makefile

@@ -1,7 +1,9 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2000-2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 extra-y	= start.o
 

arch/arm/cpu/arm1136/mx31/Makefile

@@ -1,9 +1,14 @@
-# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2000-2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
 
 obj-y	+= generic.o
 obj-y	+= timer.o
 obj-y	+= devices.o
-obj-y	+= relocate.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y  += relocate.o
+endif

arch/arm/cpu/arm1136/mx31/devices.c

@@ -1,9 +1,10 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  *
  * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
  *
  * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>

arch/arm/cpu/arm1136/mx31/generic.c

@@ -1,7 +1,8 @@
-// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007
  * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>