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3 Commits

Author SHA1 Message Date
Tom Rini
f3363c0604 Prepare v2016.09.01
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-19 10:45:12 -04:00
Tom Rini
44e3dd1402 Revert "image-fit: switch ENOLINK to ENOENT"
As while I want to support OpenBSD hosts, this change broke FIT images
as in the image checking code we care about ENOLINK and on further
review we need to think about what to change ENOLINK to so we can be
sure to handle the different cases here.

This reverts commit bac17b78da.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-19 10:43:12 -04:00
Tom Rini
6baa904ad2 Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
This increase is too large and causes other problems, and we're still
discussing things.

This reverts commit 90c08d9e08.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-19 10:42:32 -04:00
14048 changed files with 529677 additions and 767782 deletions

View File

@@ -25,6 +25,3 @@
# Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
# addresses are __aligned(2)".
--ignore PREFER_ETHER_ADDR_COPY
# A bit shorter of a description is OK with us.
--min-conf-desc-length=2

34
.gitignore vendored
View File

@@ -3,30 +3,26 @@
# subdirectories here. Add them in the ".gitignore" file
# in that subdirectory instead.
#
# Normal rules (sorted alphabetically)
# Normal rules
#
.*
*.a
*.bin
*.cfgtmp
*.dtb
*.dtb.S
*.elf
*.exe
*.gcda
*.gcno
*.i
*.lex.c
*.lst
*.mod.c
*.o
*.o.*
*.order
*.patch
*.a
*.s
*.su
*.mod.c
*.i
*.lst
*.order
*.elf
*.swp
*.tab.[ch]
*.bin
*.patch
*.cfgtmp
# host programs on Cygwin
*.exe
# Build tree
/build-*
@@ -34,9 +30,8 @@
#
# Top-level generic files
#
fit-dtb.blob
/MLO*
/SPL*
/SPL
/System.map
/u-boot*
/boards.cfg
@@ -50,6 +45,7 @@ fit-dtb.blob
#
# Generated files
#
/LOG
/spl/
/tpl/
/defconfig

View File

@@ -20,7 +20,6 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Markus Klotzbuecher <mk@denx.de>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Ricardo Ribalda <ricardo.ribalda@uam.es>

View File

@@ -1,10 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright Roger Meier <r.meier@siemens.com>
# SPDX-License-Identifier: GPL-2.0+
# build U-Boot on Travis CI - https://travis-ci.org/
sudo: required
dist: trusty
sudo: true
language: c
@@ -19,127 +18,58 @@ addons:
- libsdl1.2-dev
- python
- python-virtualenv
- swig
- libpython-dev
- iasl
- grub-efi-ia32-bin
- rpm2cpio
- wget
- device-tree-compiler
- lzop
before_install:
- sudo add-apt-repository ppa:ubuntu-toolchain-r/test -y
- sudo apt-get update -q
- sudo apt-get install libisl15 -y
cache:
- apt
install:
# Clone uboot-test-hooks
- git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# install latest device tree compiler
- git clone --depth=1 https://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- make -j4 -C /tmp/dtc
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh2\n" >> ~/.buildman
- export BUILDMAN_ROOT="root:"
- export BUILDMAN_PPC="ppc:"
- export BUILDMAN_ARM="arm:"
- export BUILDMAN_SANDBOX="sandbox:"
- echo -e "[toolchain]\n${BUILDMAN_ROOT} /\n" > ~/.buildman
- echo -e "${BUILDMAN_PPC} /opt/eldk-5.4/powerpc/sysroots/i686-eldk-linux/usr/bin/powerpc-linux/\n" >> ~/.buildman
- echo -e "${BUILDMAN_ARM} /opt/eldk-5.4/armv5te/sysroots/i686-eldk-linux/usr/bin/armv5te-linux-gnueabi/\n" >> ~/.buildman
- echo -e "${BUILDMAN_SANDBOX} /usr/bin/gcc\n" >> ~/.buildman
- export BUILDMAN_ALIAS="x86:"
- export BUILDMAN_ALIAS_ARM="arm:"
- echo -e "\n\n[toolchain-alias]\n${BUILDMAN_ALIAS} i386\n" >> ~/.buildman
- echo -e "${BUILDMAN_ALIAS_ARM} armv5te\n" >> ~/.buildman
- cat ~/.buildman
- virtualenv /tmp/venv
- . /tmp/venv/bin/activate
- pip install pytest
- grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- mkdir ~/grub2-arm
- ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- mkdir ~/grub2-arm64
- ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
env:
global:
- PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
- PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
- PATH=/tmp/dtc:$PATH
- BUILD_DIR=build
- HOSTCC="cc"
- HOSTCXX="c++"
before_script:
# install toolchains based on TOOLCHAIN} variable
- if [[ "${TOOLCHAIN}" == *aarch64* ]]; then ./tools/buildman/buildman --fetch-arch aarch64 ; fi
- if [[ "${TOOLCHAIN}" == *arm* ]]; then wget ftp://ftp.denx.de/pub/eldk/5.4/targets/armv5te/eldk-eglibc-i686-arm-toolchain-gmae-5.4.sh ; fi
- if [[ "${TOOLCHAIN}" == *arm* ]]; then sh eldk-eglibc-i686-arm-toolchain-gmae-5.4.sh -y ; fi
- if [[ "${TOOLCHAIN}" == *avr32* ]]; then ./tools/buildman/buildman --fetch-arch avr32 ; fi
- if [[ "${TOOLCHAIN}" == *i386* ]]; then ./tools/buildman/buildman sandbox --fetch-arch i386 ; fi
- if [[ "${TOOLCHAIN}" == *m68k* ]]; then ./tools/buildman/buildman --fetch-arch m68k ; fi
- if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi
- if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi
- if [[ "${TOOLCHAIN}" == *or32* ]]; then ./tools/buildman/buildman --fetch-arch or32 ; fi
- if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi
- if [[ "${TOOLCHAIN}" == *x86_64* ]]; then
./tools/buildman/buildman --fetch-arch x86_64;
echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-7.3.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == arc ]]; then
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2017.09-release/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
./tools/buildman/buildman --fetch-arch arm &&
./tools/buildman/buildman --fetch-arch aarch64;
fi
- if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
wget https://github.com/andestech/prebuilt/releases/download/20180530/riscv64-unknown-linux-gnu.tar.gz &&
tar -C /tmp -xf riscv64-unknown-linux-gnu.tar.gz &&
echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-" >> ~/.buildman;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
git submodule update --init dtc &&
git checkout v2.8.0-rc3 &&
./configure --prefix=/tmp/qemu-install --target-list=${QEMU_TARGET} &&
make -j4 all install;
popd;
fi
- if [[ "${TOOLCHAIN}" == *ppc* ]]; then wget ftp://ftp.denx.de/pub/eldk/5.4/targets/powerpc/eldk-eglibc-i686-powerpc-toolchain-gmae-5.4.sh ; fi
- if [[ "${TOOLCHAIN}" == *ppc* ]]; then sh eldk-eglibc-i686-powerpc-toolchain-gmae-5.4.sh -y ; fi
script:
# Comments must be outside the command strings below, or the Travis parser
# will get confused.
#
# Exit code 129 means warnings only.
- if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -P -E ${BUILDMAN} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -sdeP ${BUILDMAN};
exit $ret;
fi;
# the execution sequence for each test
- if [[ "${TEST_CMD}" != "" ]]; then
${TEST_CMD};
fi
# "not a_test_which_does_not_exist" is a dummy -k parameter which will
# never prevent any test from running. That way, we can always pass
# "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
# value.
- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/binman/binman -t &&
./tools/patman/patman --test &&
./tools/buildman/buildman -t &&
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/dtoc/dtoc -t;
- if [[ "${BUILDMAN}" != "" ]]; then
tools/buildman/buildman ${BUILDMAN};
fi
matrix:
@@ -147,237 +77,113 @@ matrix:
# we need to build by vendor due to 50min time limit for builds
# each env setting here is a dedicated build
- env:
- BUILDMAN="arc"
TOOLCHAIN="arc"
- BUILDMAN="arm1136"
TOOLCHAIN="arm"
- env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- BUILDMAN="arm1136"
TOOLCHAIN="arm"
- env:
- JOB="arm926ejs"
BUILDMAN="arm926ejs -x mx,siemens,atmel"
- BUILDMAN="arm1176"
TOOLCHAIN="arm"
- env:
- BUILDMAN="atmel"
- BUILDMAN="arm720t"
TOOLCHAIN="arm"
- env:
BUILDMAN="boundary engicam toradex"
- BUILDMAN="arm920t"
TOOLCHAIN="arm"
- env:
- JOB="Freescale ARM32"
BUILDMAN="freescale -x powerpc,m68k,aarch64"
- BUILDMAN="atmel -x avr32"
TOOLCHAIN="arm"
- env:
- JOB="Freescale AArch64"
BUILDMAN="freescale&aarch64"
- BUILDMAN="avr32"
TOOLCHAIN="avr32"
- env:
- JOB="i.MX6 (non-Freescale)"
BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"
- BUILDMAN="davinci"
TOOLCHAIN="arm"
- env:
- JOB="i.MX (non-Freescale, non-i.MX6)"
BUILDMAN="mx -x freescale,mx6,toradex"
- BUILDMAN="denx"
TOOLCHAIN="arm"
- env:
- BUILDMAN="k2"
- env:
- BUILDMAN="samsung socfpga"
- env:
- BUILDMAN="sun4i"
- env:
- BUILDMAN="sun5i"
- env:
- BUILDMAN="sun6i"
- env:
- BUILDMAN="sun7i"
- env:
- BUILDMAN="sun8i"
- env:
- BUILDMAN="sun9i"
- env:
- BUILDMAN="sun50i"
- env:
- JOB="Catch-all ARM"
BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
- BUILDMAN="freescale -x powerpc,m68k,aarch64"
TOOLCHAIN="arm"
- env:
- BUILDMAN="sandbox x86"
TOOLCHAIN="x86_64"
TOOLCHAIN="i386"
- env:
- BUILDMAN="kirkwood"
- env:
- BUILDMAN="mvebu"
- env:
- JOB="PXA"
- BUILDMAN="pxa -x toradex"
TOOLCHAIN="arm"
- env:
- BUILDMAN="m68k"
TOOLCHAIN="m68k"
- env:
- BUILDMAN="microblaze"
TOOLCHAIN="microblaze"
- env:
- BUILDMAN="mips"
TOOLCHAIN="mips"
- env:
- JOB="Non-Freescale PowerPC"
BUILDMAN="powerpc -x freescale"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc512x"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc5xx"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="t208xrdb corenet_ds"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc5xxx"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc8260"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="t102*"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc83xx"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="p1_p2_rdb_pc"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc85xx -x freescale"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="p1010rdb bsc91"
TOOLCHAIN="powerpc"
- BUILDMAN="mpc85xx -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x sbc8548 -x bsc91*"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="t208xrdb t4qds t102*"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="p1_p2_rdb_pc p1010rdb"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="mpc86xx"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="mpc8xx"
TOOLCHAIN="ppc"
- env:
- BUILDMAN="siemens"
TOOLCHAIN="arm"
- env:
- JOB="tegra"
BUILDMAN="tegra -x toradex"
- BUILDMAN="ti"
TOOLCHAIN="arm"
- env:
- JOB="am33xx"
BUILDMAN="am33xx -x siemens"
- env:
- BUILDMAN="omap"
- env:
- BUILDMAN="uniphier"
- env:
- JOB="Catch-all AArch64"
BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx"
- env:
- BUILDMAN="rockchip"
- env:
- JOB="sh"
BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- env:
- JOB="Xilinx (ARM)"
BUILDMAN="xilinx -x microblaze"
- env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
- BUILDMAN="aarch64"
TOOLCHAIN="aarch64"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
- env:
- JOB="cppcheck"
script:
- cppcheck --force --quiet --inline-suppr .
- TEST_CMD="cppcheck --force --quiet --inline-suppr ."
# search for TODO within source tree
- env:
- JOB="grep TODO"
script:
- grep -r TODO .
- TEST_CMD="grep -r TODO ."
# search for FIXME within source tree
- env:
- JOB="grep FIXME HACK"
script:
- grep -r FIXME .
- TEST_CMD="grep -r FIXME ."
# search for HACK within source tree and ignore HACKKIT board
- env:
- TEST_CMD="grep -r HACK . | grep -v HACKKIT"
script:
- grep -r HACK . | grep -v HACKKIT
# some statistics about the code base
- env:
- JOB="sloccount"
script:
- sloccount .
- TEST_CMD="sloccount ."
# test/py
- env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
- env:
- TEST_PY_BD="sandbox_spl"
TEST_PY_TEST_SPEC="test_ofplatdata"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
TEST_PY_TOOLS="yes"
- env:
- TEST_PY_BD="sandbox_flattree"
BUILDMAN="^sandbox_flattree$"
TOOLCHAIN="x86_64"
- env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca15_tc2$"
- env:
- TEST_PY_BD="vexpress_ca9x4"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca9x4$"
- env:
- TEST_PY_BD="integratorcp_cm926ejs"
TEST_PY_TEST_SPEC="not sleep"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^integratorcp_cm926ejs$"
- env:
- TEST_PY_BD="qemu_arm"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^qemu_arm$"
- env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
BUILDMAN="^qemu_arm64$"
- env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips-softmmu"
BUILDMAN="^qemu_mips$"
TOOLCHAIN="mips"
- env:
- TEST_PY_BD="qemu_mipsel"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mipsel-softmmu"
BUILDMAN="^qemu_mipsel$"
TOOLCHAIN="mips"
- env:
- TEST_PY_BD="qemu_mips64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64-softmmu"
BUILDMAN="^qemu_mips64$"
TOOLCHAIN="mips"
- env:
- TEST_PY_BD="qemu_mips64el"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
BUILDMAN="^qemu_mips64el$"
TOOLCHAIN="mips"
- env:
- TEST_PY_BD="qemu-ppce500"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="ppc-softmmu"
BUILDMAN="^qemu-ppce500$"
TOOLCHAIN="powerpc"
- env:
- TEST_PY_BD="qemu-x86"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="i386-softmmu"
BUILDMAN="^qemu-x86$"
TOOLCHAIN="x86_64"
BUILD_ROM="yes"
- env:
- TEST_PY_BD="zynq_zc702"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
- TEST_CMD="./test/py/test.py --bd sandbox --build"
# TODO make it perfect ;-r

View File

@@ -1,16 +0,0 @@
NOP PHY driver
This driver is used to stub PHY operations in a driver (USB, SATA).
This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
and there is no actual PHY harwdare to drive.
Required properties:
- compatible : must contain "nop-phy"
- #phy-cells : must contain <0>
Example:
nop_phy {
compatible = "nop-phy";
#phy-cells = <0>;
};

View File

@@ -1,73 +0,0 @@
STMicroelectronics STM32 USB HS PHY controller
The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
switch. It controls PHY configuration and status, and the UTMI+ switch that
selects either OTG or HOST controller for the second PHY port. It also sets
PLL configuration.
USBPHYC
|_ PLL
|
|_ PHY port#1 _________________ HOST controller
| _ |
| / 1|________________|
|_ PHY port#2 ----| |________________
| \_0| |
|_ UTMI switch_______| OTG controller
Phy provider node
=================
Required properties:
- compatible: must be "st,stm32mp1-usbphyc"
- reg: address and length of the usb phy control register set
- clocks: phandle + clock specifier for the PLL phy clock
- #address-cells: number of address cells for phys sub-nodes, must be <1>
- #size-cells: number of size cells for phys sub-nodes, must be <0>
Optional properties:
- assigned-clocks: phandle + clock specifier for the PLL phy clock
- assigned-clock-parents: the PLL phy clock parent
- resets: phandle + reset specifier
Required nodes: one sub-node per port the controller provides.
Phy sub-nodes
==============
Required properties:
- reg: phy port index
- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
see phy-bindings.txt in the same directory.
- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
port#1 and must be <1> for PHY port#2, to select USB controller
Example:
usbphyc: usb-phy@5a006000 {
compatible = "st,stm32mp1-usbphyc";
reg = <0x5a006000 0x1000>;
clocks = <&rcc_clk USBPHY_K>;
resets = <&rcc_rst USBPHY_R>;
#address-cells = <1>;
#size-cells = <0>;
usbphyc_port0: usb-phy@0 {
reg = <0>;
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>
#phy-cells = <0>;
};
usbphyc_port1: usb-phy@1 {
reg = <1>;
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>
#phy-cells = <1>;
};
};

View File

@@ -1,22 +0,0 @@
Broadcom STB wake-up Timer
The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
ability to wake up the system from low-power suspend/standby modes.
Required properties:
- compatible : should contain "brcm,brcmstb-waketimer"
- reg : the register start and length for the WKTMR block
- interrupts : The TIMER interrupt
- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
interrupt controller node
- clocks : The phandle to the UPG fixed clock (27Mhz domain)
Example:
waketimer@f0411580 {
compatible = "brcm,brcmstb-waketimer";
reg = <0xf0411580 0x14>;
interrupts = <0x3>;
interrupt-parent = <&aon_pm_l2_intc>;
clocks = <&upg_fixed>;
};

366
Kconfig
View File

@@ -14,12 +14,6 @@ source "arch/Kconfig"
menu "General setup"
config BROKEN
bool
help
This option cannot be enabled. It is used as dependency
for broken and incomplete features.
config LOCALVERSION
string "Local version - append to U-Boot release"
help
@@ -59,63 +53,24 @@ config CC_OPTIMIZE_FOR_SIZE
This option is enabled by default for U-Boot.
config CC_COVERAGE
bool "Enable code coverage analysis"
depends on SANDBOX
help
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux distributions"
imply USE_BOOTCOMMAND
default y if ARCH_SUNXI
default n
select CMD_BOOTZ if ARM && !ARM64
select CMD_BOOTI if ARM64
select CMD_DHCP if CMD_NET
select CMD_PING if CMD_NET
select CMD_PXE if NET
select CMD_ENV_EXISTS
select CMD_DHCP
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
imply CMD_MII if NET
select CMD_PART if PARTITIONS
select CMD_MII
select CMD_PING
select HUSH_PARSER
select CMDLINE_EDITING
select AUTO_COMPLETE
select SYS_LONGHELP
select SUPPORT_RAW_INITRD
select ENV_VARS_UBOOT_CONFIG
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
@@ -128,7 +83,6 @@ config SYS_MALLOC_F
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
default 0x1000 if AM33XX
default 0x400
help
Before relocation, memory is very limited on many platforms. Still,
@@ -136,26 +90,6 @@ config SYS_MALLOC_F_LEN
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config TPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in TPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
@@ -190,7 +124,7 @@ config TOOLS_DEBUG
it is possible to set breakpoints on particular lines, single-step
debug through the source code, etc.
endif # EXPERT
endif
config PHYS_64BIT
bool "64bit physical address support"
@@ -199,66 +133,110 @@ config PHYS_64BIT
This can be used not only for 64bit SoCs, but also for
large physical address extention on 32bit SoCs.
config BUILD_ROM
bool "Build U-Boot as BIOS replacement"
depends on X86
help
This option allows to build a ROM version of U-Boot.
The build process generally requires several binary blobs
which are not shipped in the U-Boot source tree.
Please, see doc/README.x86 for details.
endmenu # General setup
menu "Boot images"
config ANDROID_BOOT_IMAGE
bool "Enable support for Android Boot Images"
default y if FASTBOOT
config SUPPORT_SPL
bool
config SUPPORT_TPL
bool
config SPL
bool
depends on SUPPORT_SPL
prompt "Enable SPL"
help
This enables support for booting images which use the Android
image format header.
If you want to build SPL as well as the normal image, say Y.
config SPL_SYS_MALLOC_SIMPLE
bool
depends on SPL
prompt "Only use malloc_simple functions in the SPL"
help
Say Y here to only use the *_simple malloc functions from
malloc_simple.c, rather then using the versions from dlmalloc.c;
this will make the SPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
config SPL_STACK_R
depends on SPL
bool "Enable SDRAM location for SPL stack"
help
SPL starts off execution in SRAM and thus typically has only a small
stack available. Since SPL sets up DRAM while in its board_init_f()
function, it is possible for the stack to move there before
board_init_r() is reached. This option enables a special SDRAM
location for the SPL stack. U-Boot SPL switches to this after
board_init_f() completes, and before board_init_r() starts.
config SPL_STACK_R_ADDR
depends on SPL_STACK_R
hex "SDRAM location for SPL stack"
help
Specify the address in SDRAM for the SPL stack. This will be set up
before board_init_r() is called.
config SPL_STACK_R_MALLOC_SIMPLE_LEN
depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
hex "Size of malloc_simple heap after switching to DRAM SPL stack"
default 0x100000
help
Specify the amount of the stack to use as memory pool for
malloc_simple after switching the stack to DRAM. This may be set
to give board_init_r() a larger heap then the initial heap in
SRAM which is limited to SYS_MALLOC_F_LEN bytes.
config SPL_SEPARATE_BSS
depends on SPL
bool "BSS section is in a different memory region from text"
help
Some platforms need a large BSS region in SPL and can provide this
because RAM is already set up. In this case BSS can be moved to RAM.
This option should then be enabled so that the correct device tree
location is used. Normally we put the device tree at the end of BSS
but with this option enabled, it goes at _image_binary_end.
config TPL
bool
depends on SPL && SUPPORT_TPL
prompt "Enable TPL"
help
If you want to build TPL as well as the normal image and SPL, say Y.
config FIT
bool "Support Flattened Image Tree"
select MD5
select SHA1
help
This option allows you to boot the new uImage structure,
This option allows to boot the new uImage structrure,
Flattened Image Tree. FIT is formally a FDT, which can include
images of various types (kernel, FDT blob, ramdisk, etc.)
in a single blob. To boot this new uImage structure,
pass the address of the blob to the "bootm" command.
FIT is very flexible, supporting compression, multiple images,
multiple configurations, verification through hashing and also
verified boot (secure boot using RSA).
verified boot (secure boot using RSA). This option enables that
feature.
if FIT
config SPL_FIT
bool "Support Flattened Image Tree within SPL"
depends on FIT
depends on SPL
config FIT_ENABLE_SHA256_SUPPORT
bool "Support SHA256 checksum of FIT image contents"
select SHA256
default y
help
Enable this to support SHA256 checksum of FIT image contents. A
SHA256 checksum is a 256-bit (32-byte) hash value used to check that
the image contents have not been corrupted. SHA256 is recommended
for use in secure applications since (as at 2016) there is no known
feasible attack that could produce a 'collision' with differing
input data. Use this for the highest security. Note that only the
SHA256 variant is supported: SHA512 and others are not currently
supported in U-Boot.
config FIT_VERBOSE
bool "Display verbose messages on FIT boot"
depends on FIT
config FIT_SIGNATURE
bool "Enable signature verification of FIT uImages"
depends on FIT
depends on DM
select RSA
select HASH
help
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA. If
CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
hashing is available using hardware, then the RSA library will use
hashing is available using hardware, then then RSA library will use
it. See doc/uImage.FIT/signature.txt for more details.
WARNING: When relying on signed FIT images with a required signature
@@ -267,16 +245,15 @@ config FIT_SIGNATURE
format support in this case, enable it using
CONFIG_IMAGE_FORMAT_LEGACY.
config FIT_VERBOSE
bool "Show verbose messages when FIT images fail"
help
Generally a system will have valid FIT images so debug messages
are a waste of code space. If you are debugging your images then
you can enable this option to get more verbose information about
failures.
config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_FIT
depends on SPL_DM
select SPL_RSA
config FIT_BEST_MATCH
bool "Select the best match for the kernel device tree"
depends on FIT
help
When no configuration is explicitly selected, default to the
one whose fdt's compatibility field best matches that of
@@ -284,106 +261,14 @@ config FIT_BEST_MATCH
most specific compatibility entry of U-Boot's fdt's root node.
The order of entries in the configuration's fdt is ignored.
config FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by U-Boot"
depends on TI_SECURE_DEVICE
config FIT_VERBOSE
bool "Show verbose messages when FIT images fails"
depends on FIT
help
Allows doing any sort of manipulation to blobs after they got extracted
from FIT images like stripping off headers or modifying the size of the
blob, verification, authentication, decryption etc. in a platform or
board specific way. In order to use this feature a platform or board-
specific implementation of board_fit_image_post_process() must be
provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
if SPL
config SPL_FIT
bool "Support Flattened Image Tree within SPL"
depends on SPL
select SPL_OF_LIBFDT
config SPL_FIT_PRINT
bool "Support FIT printing within SPL"
depends on SPL_FIT
help
Support printing the content of the fitImage in a verbose manner in SPL.
config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
select SPL_FIT
select SPL_RSA
config SPL_LOAD_FIT
bool "Enable SPL loading U-Boot as a FIT"
select SPL_FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_LOAD_FIT_FULL
bool "Enable SPL loading U-Boot as a FIT"
select SPL_FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by the SPL"
depends on SPL_LOAD_FIT
help
Allows doing any sort of manipulation to blobs after they got extracted
from the U-Boot FIT image like stripping off headers or modifying the
size of the blob, verification, authentication, decryption etc. in a
platform or board specific way. In order to use this feature a platform
or board-specific implementation of board_fit_image_post_process() must
be provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
config SPL_FIT_SOURCE
string ".its source file for U-Boot FIT image"
depends on SPL_FIT
help
Specifies a (platform specific) FIT source file to generate the
U-Boot FIT image. This could specify further image to load and/or
execute.
config SPL_FIT_GENERATOR
string ".its file generator script for U-Boot FIT image"
depends on SPL_FIT
default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
help
Specifies a (platform specific) script file to generate the FIT
source file used to build the U-Boot FIT image file. This gets
passed a list of supported device tree file stub names to
include in the generated image.
endif # SPL
endif # FIT
config IMAGE_FORMAT_LEGACY
bool "Enable support for the legacy image format"
default y if !FIT_SIGNATURE
help
This option enables the legacy image format. It is enabled by
default for backward compatibility, unless FIT_SIGNATURE is
set where it is disabled so that unsigned images cannot be
loaded. If a board needs the legacy image format support in this
case, enable it here.
Generally a system will have valid FIT images so debug messages
are a waste of code space. If you are debugging your images then
you can enable this option to get more verbose information about
failures.
config OF_BOARD_SETUP
bool "Set up board-specific details in device tree before boot"
@@ -428,17 +313,51 @@ config SYS_EXTRA_OPTIONS
new boards should not use this option.
config SYS_TEXT_BASE
depends on !NIOS2 && !XTENSA
depends on SPARC || ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS
depends on !EFI_APP
default 0x80800000 if ARCH_OMAP2PLUS
default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
default 0x42e00000 if ARCH_SUNXI && MACH_SUN8I_V3S
hex "Text Base"
help
The address in memory that U-Boot will be running from, initially.
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
config SPL_LOAD_FIT
bool "Enable SPL loading U-Boot as a FIT"
depends on FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by the SPL"
depends on SPL_LOAD_FIT && TI_SECURE_DEVICE
help
Allows doing any sort of manipulation to blobs after they got extracted
from the U-Boot FIT image like stripping off headers or modifying the
size of the blob, verification, authentication, decryption etc. in a
platform or board specific way. In order to use this feature a platform
or board-specific implementation of board_fit_image_post_process() must
be provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
config FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by U-Boot"
depends on FIT && TI_SECURE_DEVICE
help
Allows doing any sort of manipulation to blobs after they got extracted
from FIT images like stripping off headers or modifying the size of the
blob, verification, authentication, decryption etc. in a platform or
board specific way. In order to use this feature a platform or board-
specific implementation of board_fit_image_post_process() must be
provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
@@ -446,8 +365,9 @@ config SYS_CLK_FREQ
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
config ARCH_FIXUP_FDT_MEMORY
bool "Enable arch_fixup_memory_banks() call"
config ARCH_FIXUP_FDT
bool "Enable arch_fixup_fdt() call"
depends on ARM || MIPS
default y
help
Enable FDT memory map syncup before OS boot. This feature can be
@@ -456,18 +376,12 @@ config ARCH_FIXUP_FDT_MEMORY
endmenu # Boot images
source "api/Kconfig"
source "common/Kconfig"
source "cmd/Kconfig"
source "disk/Kconfig"
source "dts/Kconfig"
source "env/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"

View File

@@ -1,5 +1,3 @@
SPDX-License-Identifier: GPL-2.0
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code and the
git commit messages for details). You can redistribute U-Boot and/or
@@ -33,107 +31,27 @@ information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique License Identifiers
as defined by the Linux Foundation's SPDX project [1].
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
Ideally, the license terms of all files in the source tree should be
defined by such License Identifiers; in no case a file can contain
more than one such License Identifier list.
If a "SPDX-License-Identifier:" line references more than one Unique
License Identifier, then this means that the respective file can be
used under the terms of either of these licenses, i. e. with
SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
you can choose between GPL-2.0+ and BSD-3-Clause licensing.
We use the SPDX Unique License Identifiers here; these are available
at [2].
License identifier syntax
-------------------------
1. Placement:
The SPDX license identifier in U-Boot files shall be added at the first
possible line in a file which can contain a comment. For the majority
or files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX
identifier goes into the second line.
|
2. Style:
The SPDX license identifier is added in form of a comment. The comment
style depends on the file type::
C source: // SPDX-License-Identifier: <SPDX License Expression>
C header: /* SPDX-License-Identifier: <SPDX License Expression> */
ASM: /* SPDX-License-Identifier: <SPDX License Expression> */
scripts: # SPDX-License-Identifier: <SPDX License Expression>
.rst: .. SPDX-License-Identifier: <SPDX License Expression>
.dts{i}: // SPDX-License-Identifier: <SPDX License Expression>
If a specific tool cannot handle the standard comment style, then the
appropriate comment mechanism which the tool accepts shall be used. This
is the reason for having the "/\* \*/" style comment in C header
files. There was build breakage observed with generated .lds files where
'ld' failed to parse the C++ comment. This has been fixed by now, but
there are still older assembler tools which cannot handle C++ style
comments.
|
3. Syntax:
A <SPDX License Expression> is either an SPDX short form license
identifier found on the SPDX License List, or the combination of two
SPDX short form license identifiers separated by "WITH" when a license
exception applies. When multiple licenses apply, an expression consists
of keywords "AND", "OR" separating sub-expressions and surrounded by
"(", ")" .
License identifiers for licenses like [L]GPL with the 'or later' option
are constructed by using a "+" for indicating the 'or later' option.::
// SPDX-License-Identifier: GPL-2.0+
// SPDX-License-Identifier: LGPL-2.1+
WITH should be used when there is a modifier to a license needed.
For example, the linux kernel UAPI files use the expression::
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
// SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note
Other examples using WITH exceptions found in the linux kernel are::
// SPDX-License-Identifier: GPL-2.0 WITH mif-exception
// SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
Exceptions can only be used with particular License identifiers. The
valid License identifiers are listed in the tags of the exception text
file.
OR should be used if the file is dual licensed and only one license is
to be selected. For example, some dtsi files are available under dual
licenses::
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Examples from U-Boot for license expressions in dual licensed files::
// SPDX-License-Identifier: GPL-2.0 OR MIT
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
AND should be used if the file has multiple licenses whose terms all
apply to use the file. For example, if code is inherited from another
project and permission has been given to put it in U-Boot, but the
original license terms need to remain in effect::
// SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT
Another other example where both sets of license terms need to be
adhered to is::
// SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+
[1] http://spdx.org/
[2] http://spdx.org/licenses/

View File

@@ -1,26 +0,0 @@
Copyright (c) 2014, Renesas Electronics Corporation
All rights reserved.
Redistribution and use in binary form, without modification, are permitted
provided that the following conditions are met:
1. Redistribution in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
2. The name of Renesas Electronics Corporation may not be used to endorse or
promote products derived from this software without specific prior written
permission.
3. Reverse engineering, decompilation, or disassembly of this software is
not permitted.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND
NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS
CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

View File

@@ -55,26 +55,9 @@ Maintainers List (try to look for most precise areas first)
-----------------------------------
ARC
M: Alexey Brodkin <alexey.brodkin@synopsys.com>
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
F: board/synopsys/
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/clk/clk-hsdk-cgu.c
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
@@ -86,7 +69,8 @@ ARM ALTERA SOCFPGA
M: Marek Vasut <marex@denx.de>
S: Maintainted
T: git git://git.denx.de/u-boot-socfpga.git
F: arch/arm/mach-socfpga/
F: arch/arm/cpu/armv7/socfpga/
F: board/altera/socfpga/
ARM ATMEL AT91
M: Andreas Bießmann <andreas@biessmann.org>
@@ -95,38 +79,36 @@ T: git git://git.denx.de/u-boot-atmel.git
F: arch/arm/mach-at91/
ARM BROADCOM BCM283X
M: Alexander Graf <agraf@suse.de>
M: Stephen Warren <swarren@wwwdotorg.org>
S: Maintained
F: arch/arm/mach-bcm283x/
F: drivers/gpio/bcm2835_gpio.c
F: drivers/mmc/bcm2835_sdhci.c
F: drivers/mmc/bcm2835_sdhost.c
F: drivers/serial/serial_bcm283x_mu.c
F: drivers/serial/serial_bcm283x_pl011.c
F: drivers/video/bcm2835.c
F: include/dm/platform_data/serial_bcm283x_mu.h
F: drivers/pinctrl/broadcom/
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
T: git git://git.denx.de/u-boot-imx.git
F: arch/arm/cpu/arm1136/mx*/
F: arch/arm/cpu/arm926ejs/mx*/
F: arch/arm/cpu/arm926ejs/imx/
F: arch/arm/cpu/armv7/mx*/
F: arch/arm/cpu/armv7/vf610/
F: arch/arm/mach-imx/
F: arch/arm/cpu/imx-common/
F: arch/arm/include/asm/arch-imx/
F: arch/arm/include/asm/arch-mx*/
F: arch/arm/include/asm/arch-vf610/
F: arch/arm/include/asm/mach-imx/
F: arch/arm/include/asm/imx-common/
F: board/freescale/*mx*/
ARM HISILICON
M: Peter Griffin <peter.griffin@linaro.org>
S: Maintained
F: arch/arm/cpu/armv8/hisilicon
F: arch/arm/include/asm/arch-hi6220/
F: arm/include/asm/arch-hi6220/
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X
M: Prafulla Wadaskar <prafulla@marvell.com>
@@ -136,7 +118,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-marvell.git
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mvebu/
F: drivers/ata/ahci_mvebu.c
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
@@ -147,53 +128,31 @@ F: arch/arm/include/asm/arch-pxa/
ARM RENESAS RMOBILE/R-CAR
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
M: Marek Vasut <marek.vasut+renesas@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-sh.git
F: arch/arm/mach-rmobile/
ARM ROCKCHIP
M: Simon Glass <sjg@chromium.org>
M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
S: Maintained
T: git git://git.denx.de/u-boot-rockchip.git
F: arch/arm/include/asm/arch-rockchip/
F: arch/arm/mach-rockchip/
F: board/rockchip/
F: drivers/clk/rockchip/
F: drivers/gpio/rk_gpio.c
F: drivers/misc/rockchip-efuse.c
F: drivers/mmc/rockchip_sdhci.c
F: drivers/mmc/rockchip_dw_mmc.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
F: tools/rksd.c
F: tools/rkspi.c
ARM SAMSUNG
M: Minkyu Kang <mk7.kang@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-samsung.git
F: arch/arm/cpu/arm920t/s3c24x0/
F: arch/arm/mach-exynos/
F: arch/arm/mach-s5pc1xx/
F: arch/arm/cpu/armv7/s5p-common/
F: arch/arm/include/asm/arch-s3c24x0/
ARM SNAPDRAGON
M: Ramon Fried <ramon.fried@gmail.com>
M: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Orphaned (Since 2016-02)
@@ -201,14 +160,6 @@ T: git git://git.denx.de/u-boot-stm.git
F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
ARM STM STM32MP
M: Patrick Delaunay <patrick.delaunay@st.com>
S: Maintained
F: arch/arm/mach-stm32mp
F: drivers/clk/clk_stm32mp1.c
F: drivers/misc/stm32mp_fuse.c
F: drivers/ram/stm32mp1/
ARM STM STV0991
M: Vikas Manocha <vikas.manocha@st.com>
S: Maintained
@@ -216,14 +167,12 @@ F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
ARM SUNXI
M: Jagan Teki <jagan@openedev.com>
M: Maxime Ripard <maxime.ripard@bootlin.com>
M: Ian Campbell <ijc@hellion.org.uk>
M: Hans De Goede <hdegoede@redhat.com>
S: Maintained
T: git git://git.denx.de/u-boot-sunxi.git
F: arch/arm/cpu/armv7/sunxi/
F: arch/arm/include/asm/arch-sunxi/
F: arch/arm/mach-sunxi/
F: board/sunxi/
ARM TEGRA
M: Tom Warren <twarren@nvidia.com>
@@ -238,6 +187,8 @@ S: Maintained
T: git git://git.denx.de/u-boot-ti.git
F: arch/arm/mach-davinci/
F: arch/arm/mach-keystone/
F: arch/arm/cpu/arm926ejs/omap/
F: arch/arm/cpu/armv7/omap*/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
@@ -252,57 +203,26 @@ N: uniphier
ARM ZYNQ
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/mach-zynq/
F: drivers/clk/clk_zynq.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqpl.h
F: tools/zynqimage.c
N: zynq
F: arch/arm/cpu/armv7/zynq/
F: arch/arm/include/asm/arch-zynq/
ARM ZYNQMP
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/cpu/armv8/zynqmp/
F: drivers/clk/clk_zynqmp.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/timer/cadence-ttc.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmppl.h
F: tools/zynqmp*
N: zynqmp
F: arch/arm/include/asm/arch-zynqmp/
ARM ZYNQMP R5
M: Michal Simek <michal.simek@xilinx.com>
AVR32
M: Andreas Bießmann <andreas@biessmann.org>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/mach-zynqmp-r5/
T: git git://git.denx.de/u-boot-avr32.git
F: arch/avr32/
BLACKFIN
M: Sonic Zhang <sonic.adi@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-blackfin.git
F: arch/blackfin/
BUILDMAN
M: Simon Glass <sjg@chromium.org>
@@ -317,14 +237,14 @@ F: drivers/mtd/cfi_flash.c
F: drivers/mtd/jedec_flash.c
COLDFIRE
M: Huan Wang <alison.wang@nxp.com>
M: Huan Wang <alison.wang@freescale.com>
M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git git://git.denx.de/u-boot-coldfire.git
F: arch/m68k/
DFU
M: Lukasz Majewski <lukma@denx.de>
M: Lukasz Majewski <l.majewski@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
F: drivers/dfu/
@@ -341,17 +261,9 @@ F: test/dm/
EFI PAYLOAD
M: Alexander Graf <agraf@suse.de>
S: Maintained
T: git git://github.com/agraf/u-boot.git
F: doc/DocBook/efi.tmpl
F: doc/README.uefi
F: doc/README.iscsi
F: include/efi*
F: include/pe.h
F: include/asm-generic/pe.h
F: lib/efi*/
F: test/py/tests/test_efi*
F: include/efi_loader.h
F: lib/efi_loader/
F: cmd/bootefi.c
F: tools/file2include.c
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>
@@ -360,8 +272,8 @@ T: git git://git.denx.de/u-boot-fdt.git
F: lib/fdtdec*
F: lib/libfdt/
F: include/fdt*
F: include/linux/libfdt*
F: cmd/fdt.c
F: include/libfdt*
F. common/cmd_fdt.c
F: common/fdt_support.c
FREEBSD
@@ -380,28 +292,11 @@ S: Maintained
T: git git://git.denx.de/u-boot-i2c.git
F: drivers/i2c/
LOGGING
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git git://git.denx.de/u-boot.git
F: common/log.c
F: cmd/log.c
F: test/log/log_test.c
F: test/py/tests/test_log.py
MICROBLAZE
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/microblaze/
F: cmd/mfsl.c
F: drivers/gpio/xilinx_gpio.c
F: drivers/net/xilinx_axi_emac.c
F: drivers/net/xilinx_emaclite.c
F: drivers/serial/serial_xuartlite.c
F: drivers/spi/xilinx_spi.c
F: drivers/watchdog/xilinx_tb_wdt.c
N: xilinx
MIPS
M: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
@@ -415,62 +310,42 @@ S: Maintained
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
M: Scott Wood <oss@buserror.net>
OPENRISC
M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
F: arch/openrisc/
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
F: arch/powerpc/
POWERPC MPC5XXX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc5xxx.git
F: arch/powerpc/cpu/mpc5*/
POWERPC MPC8XX
M: Christophe Leroy <christophe.leroy@c-s.fr>
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc8xx.git
F: arch/powerpc/cpu/mpc8xx/
POWERPC MPC83XX
M: Mario Six <mario.six@gdsys.cc>
POWERPC MPC82XX
M: Wolfgang Denk <wd@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-mpc82xx.git
F: arch/powerpc/cpu/mpc82*/
POWERPC MPC83XX
#M: Kim Phillips <kim.phillips@freescale.com>
S: Orphaned (Since 2016-02)
T: git git://git.denx.de/u-boot-mpc83xx.git
F: arch/powerpc/cpu/mpc83xx/
F: arch/powerpc/include/asm/arch-mpc83xx/
@@ -487,19 +362,42 @@ S: Maintained
T: git git://git.denx.de/u-boot-mpc86xx.git
F: arch/powerpc/cpu/mpc86xx/
RISC-V
M: Rick Chen <rick@andestech.com>
POWERPC PPC4XX
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-riscv.git
F: arch/riscv/
F: tools/prelink-riscv.c
T: git git://git.denx.de/u-boot-ppc4xx.git
F: arch/powerpc/cpu/ppc4xx/
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
M: Lukasz Majewski <l.majewski@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
SANDBOX
M: Simon Glass <sjg@chromium.org>
@@ -512,8 +410,14 @@ S: Maintained
T: git git://git.denx.de/u-boot-sh.git
F: arch/sh/
SPARC
#M: Francois Retief <fgretief@spaceteq.co.za>
S: Orphaned (Since 2016-02)
T: git git://git.denx.de/u-boot-sparc.git
F: arch/sparc/
SPI
M: Jagan Teki <jagan@openedev.com>
M: Jagan Teki <jteki@openedev.com>
S: Maintained
T: git git://git.denx.de/u-boot-spi.git
F: drivers/mtd/spi/
@@ -526,22 +430,6 @@ S: Maintained
F: drivers/spmi/
F: include/spmi/
TI SYSTEM SECURITY
M: Andrew F. Davis <afd@ti.com>
S: Supported
F: arch/arm/mach-omap2/omap5/sec_entry_cpu1.S
F: arch/arm/mach-omap2/sec-common.c
F: arch/arm/mach-omap2/config_secure.mk
F: configs/am335x_hs_evm_defconfig
F: configs/am335x_hs_evm_uart_defconfig
F: configs/am43xx_hs_evm_defconfig
F: configs/am57xx_hs_evm_defconfig
F: configs/dra7xx_hs_evm_defconfig
F: configs/k2hk_hs_evm_defconfig
F: configs/k2e_hs_evm_defconfig
F: configs/k2g_hs_evm_defconfig
F: configs/k2l_hs_evm_defconfig
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
S: Orphaned (Since 2016-02)
@@ -560,23 +448,14 @@ S: Maintained
T: git git://git.denx.de/u-boot-usb.git
F: drivers/usb/
USB xHCI
M: Bin Meng <bmeng.cn@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-usb.git topic-xhci
F: drivers/usb/host/xhci*
VIDEO
M: Anatolij Gustschin <agust@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-video.git
F: drivers/video/
F: common/lcd*.c
F: include/lcd*.h
X86
M: Simon Glass <sjg@chromium.org>
M: Bin Meng <bmeng.cn@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-x86.git
F: arch/x86/

404
Makefile
View File

@@ -1,8 +1,10 @@
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
#
VERSION = 2018
PATCHLEVEL = 07
SUBLEVEL =
VERSION = 2016
PATCHLEVEL = 09
SUBLEVEL = 01
EXTRAVERSION =
NAME =
@@ -258,16 +260,6 @@ HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
$(if $(CONFIG_TOOLS_DEBUG),-g)
HOSTCXXFLAGS = -O2
# With the move to GCC 6, we have implicitly upgraded our language
# standard to GNU11 (see https://gcc.gnu.org/gcc-5/porting_to.html).
# Some Linux distributions (including RHEL7, SLES13, Debian 8) still
# have older compilers as their default, so we make it explicit for
# these that our host tools are GNU11 (i.e. C11 w/ GNU extensions).
CSTD_FLAG := -std=gnu11
ifeq ($(HOSTOS),linux)
HOSTCFLAGS += $(CSTD_FLAG)
endif
ifeq ($(HOSTOS),cygwin)
HOSTCFLAGS += -ansi
endif
@@ -354,14 +346,10 @@ LDR = $(CROSS_COMPILE)ldr
STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
LEX = flex
YACC = bison
AWK = awk
PERL = perl
PYTHON ?= python
PYTHON2 = python2
PYTHON3 = python3
DTC ?= $(objtree)/scripts/dtc/dtc
PYTHON = python
DTC = dtc
CHECK = sparse
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
@@ -371,8 +359,7 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
KBUILD_CFLAGS := -Wall -Wstrict-prototypes \
-Wno-format-security \
-fno-builtin -ffreestanding $(CSTD_FLAG)
KBUILD_CFLAGS += -fshort-wchar
-fno-builtin -ffreestanding
KBUILD_AFLAGS := -D__ASSEMBLY__
# Read UBOOTRELEASE from include/config/uboot.release (if it exists)
@@ -383,8 +370,8 @@ export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR
export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3
export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
export MAKE AWK PERL PYTHON
export HOSTCXX HOSTCXXFLAGS DTC CHECK CHECKFLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS
export KBUILD_CFLAGS KBUILD_AFLAGS
@@ -435,7 +422,6 @@ endif
version_h := include/generated/version_autogenerated.h
timestamp_h := include/generated/timestamp_autogenerated.h
defaultenv_h := include/generated/defaultenv_autogenerated.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
@@ -496,13 +482,6 @@ else
# Build targets only - this includes vmlinux, arch specific targets, clean
# targets and others. In general all targets except *config targets.
# Additional helpers built in scripts/
# Carefully list dependencies so we do not try to build scripts twice
# in parallel
PHONY += scripts
scripts: scripts_basic include/config/auto.conf
$(Q)$(MAKE) $(build)=$(@)
ifeq ($(dot-config),1)
# Read in config
-include include/config/auto.conf
@@ -519,7 +498,7 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# if auto.conf.cmd is missing then we are probably in a cleaned tree so
# we execute the config step to be sure to catch updated Kconfig files
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile syncconfig
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
@# If the following part fails, include/config/auto.conf should be
@# deleted so "make silentoldconfig" will be re-run on the next build.
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \
@@ -530,9 +509,6 @@ include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
@# Otherwise, 'make silentoldconfig' would be invoked twice.
$(Q)touch include/config/auto.conf
u-boot.cfg spl/u-boot.cfg tpl/u-boot.cfg: include/config.h FORCE
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf $(@)
-include include/autoconf.mk
-include include/autoconf.mk.dep
@@ -551,15 +527,6 @@ endif
endif
endif
# These are set by the arch-specific config.mk. Make sure they are exported
# so they can be used when building an EFI application.
export EFI_LDS # Filename of EFI link script in arch/$(ARCH)/lib
export EFI_CRT0 # Filename of EFI CRT0 in arch/$(ARCH)/lib
export EFI_RELOC # Filename of EFU relocation code in arch/$(ARCH)/lib
export CFLAGS_EFI # Compiler flags to add when building EFI app
export CFLAGS_NON_EFI # Compiler flags to remove when building EFI app
export EFI_TARGET # binutils target if EFI is natively supported
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
# standard location.
@@ -607,31 +574,17 @@ endif
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
# change __FILE__ to the relative path from the srctree
KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
KBUILD_CFLAGS += -g
# $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g<format>
# option to the assembler.
KBUILD_AFLAGS += -g
# Report stack usage if supported
# ARC tools based on GCC 7.1 has an issue with stack usage
# with naked functions, see commit message for more details
ifndef CONFIG_ARC
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y)
KBUILD_CFLAGS += -fstack-usage
endif
endif
KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral)
ifeq ($(cc-name),clang)
KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,)
KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier)
KBUILD_CFLAGS += $(call cc-disable-warning, gnu)
KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)
KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
endif
# turn jbsr into jsr for m68k
ifeq ($(ARCH),m68k)
@@ -655,9 +608,8 @@ KBUILD_CFLAGS += $(KCFLAGS)
UBOOTINCLUDE := \
-Iinclude \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
$(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2),, \
-I$(srctree)/arch/$(ARCH)/thumb1/include),) \
$(if $(CONFIG_SYS_THUMB_BUILD), $(if $(CONFIG_HAS_THUMB2),, \
-I$(srctree)/arch/$(ARCH)/thumb1/include),) \
-I$(srctree)/arch/$(ARCH)/include \
-include $(srctree)/include/linux/kconfig.h
@@ -684,6 +636,7 @@ libs-y += drivers/
libs-y += drivers/dma/
libs-y += drivers/gpio/
libs-y += drivers/i2c/
libs-y += drivers/mmc/
libs-y += drivers/mtd/
libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
libs-y += drivers/mtd/onenand/
@@ -702,7 +655,6 @@ libs-y += drivers/power/ \
libs-y += drivers/spi/
libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
libs-$(CONFIG_SYS_FSL_MMDC) += drivers/ddr/fsl/
libs-$(CONFIG_ALTERA_SDRAM) += drivers/ddr/altera/
libs-y += drivers/serial/
libs-y += drivers/usb/dwc3/
@@ -718,7 +670,6 @@ libs-y += drivers/usb/phy/
libs-y += drivers/usb/ulpi/
libs-y += cmd/
libs-y += common/
libs-y += env/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
@@ -747,12 +698,6 @@ else
PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc
endif
PLATFORM_LIBS += $(PLATFORM_LIBGCC)
ifdef CONFIG_CC_COVERAGE
KBUILD_CFLAGS += --coverage
PLATFORM_LIBGCC += -lgcov
endif
export PLATFORM_LIBS
export PLATFORM_LIBGCC
@@ -784,9 +729,6 @@ BOARD_SIZE_CHECK =
endif
# Statically apply RELA-style relocations (currently arm64 only)
# This is useful for arm64 where static relocation needs to be performed on
# the raw binary, but certain simulators only accept an ELF file (but don't
# do the relocation).
ifneq ($(CONFIG_STATIC_RELA),)
# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
DO_STATIC_RELA = \
@@ -798,7 +740,7 @@ DO_STATIC_RELA =
endif
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map u-boot.cfg binary_size_check
ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
ifeq ($(CONFIG_SPL_FSL_PBL),y)
@@ -811,15 +753,7 @@ ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
endif
endif
ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
ifeq ($(CONFIG_MX6)$(CONFIG_SECURE_BOOT), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ifeq ($(CONFIG_MX7)$(CONFIG_SECURE_BOOT), yy)
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img
else
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
endif
endif
ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb
ifeq ($(CONFIG_SPL_FRAMEWORK),y)
@@ -833,15 +767,10 @@ ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
ALL-$(CONFIG_EFI_APP) += u-boot-app.efi
ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),)
ifneq ($(BUILD_ROM),)
ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
endif
# Build a combined spl + u-boot image for sunxi
ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
ALL-y += u-boot-sunxi-with-spl.bin
endif
# enable combined SPL/u-boot/dtb rules for tegra
ifeq ($(CONFIG_TEGRA)$(CONFIG_SPL),yy)
ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -853,16 +782,8 @@ ifneq ($(CONFIG_BUILD_TARGET),)
ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
endif
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ALL-y += init_sp_bss_offset_check
endif
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
ifneq ($(CONFIG_SYS_TEXT_BASE),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
@@ -878,15 +799,9 @@ cmd_zobjcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
quiet_cmd_efipayload = OBJCOPY $@
cmd_efipayload = $(OBJCOPY) -I binary -O $(EFIPAYLOAD_BFDTARGET) -B $(EFIPAYLOAD_BFDARCH) $< $@
MKIMAGEOUTPUT ?= /dev/null
quiet_cmd_mkimage = MKIMAGE $@
cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_mkfitimage = MKIMAGE $@
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -E $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
quiet_cmd_cat = CAT $@
cmd_cat = cat $(filter-out $(PHONY), $^) > $@
@@ -896,13 +811,7 @@ append = cat $(filter-out $< $(PHONY), $^) >> $@
quiet_cmd_pad_cat = CAT $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
cfg: u-boot.cfg
quiet_cmd_cfgcheck = CFGCHK $2
cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
$(srctree)/scripts/config_whitelist.txt $(srctree)
all: $(ALL-y) cfg
all: $(ALL-y)
ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo "===================== WARNING ======================"
@echo "This board uses CONFIG_DM_I2C_COMPAT. Please remove"
@@ -910,35 +819,17 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo "before sending patches to the mailing list."
@echo "===================================================="
endif
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@# options are whitelisted, so new ones should not be added.
$(call cmd,cfgcheck,u-boot.cfg)
PHONY += dtbs
dtbs: dts/dt.dtb
@:
dts/dt.dtb: u-boot
dts/dt.dtb: checkdtc u-boot
$(Q)$(MAKE) $(build)=dts dtbs
quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
ifeq ($(CONFIG_MULTI_DTB_FIT),y)
fit-dtb.blob: dts/dt.dtb FORCE
$(call if_changed,mkimage)
MKIMAGEFLAGS_fit-dtb.blob = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a 0 -e 0 -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null
u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
$(call if_changed,cat)
u-boot.bin: u-boot-fit-dtb.bin FORCE
$(call if_changed,copy)
else ifeq ($(CONFIG_OF_SEPARATE),y)
ifeq ($(CONFIG_OF_SEPARATE),y)
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
$(call if_changed,cat)
@@ -950,13 +841,7 @@ u-boot.bin: u-boot-nodtb.bin FORCE
endif
%.imx: %.bin
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
%.vyb: %.imx
$(Q)$(MAKE) $(build)=arch/arm/cpu/armv7/vf610 $@
quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
u-boot.dtb: dts/dt.dtb
$(call cmd,copy)
@@ -968,18 +853,8 @@ OBJCOPYFLAGS_u-boot.srec := -O srec
u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-elf.srec := $(OBJCOPYFLAGS_u-boot.srec)
u-boot-elf.srec: u-boot.elf FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-spl.srec = $(OBJCOPYFLAGS_u-boot.srec)
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_RESET_VECTOR),-R .start16 -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
@@ -995,33 +870,6 @@ binary_size_check: u-boot-nodtb.bin FORCE
fi \
fi
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ifneq ($(CONFIG_SYS_MALLOC_F_LEN),)
subtract_sys_malloc_f_len = space=$$(($${space} - $(CONFIG_SYS_MALLOC_F_LEN)))
else
subtract_sys_malloc_f_len = true
endif
# The 1/4 margin below is somewhat arbitrary. The likely initial SP usage is
# so low that the DTB could probably use 90%+ of the available space, for
# current values of CONFIG_SYS_INIT_SP_BSS_OFFSET at least. However, let's be
# safe for now and tweak this later if space becomes tight.
# A rejected alternative would be to check that some absolute minimum stack
# space was available. However, since CONFIG_SYS_INIT_SP_BSS_OFFSET is
# deliberately build-specific, to take account of build-to-build stack usage
# differences due to different feature sets, there is no common absolute value
# to check against.
init_sp_bss_offset_check: u-boot.dtb FORCE
@dtb_size=$(shell wc -c u-boot.dtb | awk '{print $$1}') ; \
space=$(CONFIG_SYS_INIT_SP_BSS_OFFSET) ; \
$(subtract_sys_malloc_f_len) ; \
quarter_space=$$(($${space} / 4)) ; \
if [ $${dtb_size} -gt $${quarter_space} ]; then \
echo "u-boot.dtb is larger than 1 quarter of " >&2 ; \
echo "(CONFIG_SYS_INIT_SP_BSS_OFFSET - CONFIG_SYS_MALLOC_F_LEN)" >&2 ; \
exit 1 ; \
fi
endif
u-boot-nodtb.bin: u-boot FORCE
$(call if_changed,objcopy)
$(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
@@ -1032,12 +880,6 @@ u-boot.ldr: u-boot
$(LDR) -T $(CONFIG_CPU) -c $@ $< $(LDR_FLAGS)
$(BOARD_SIZE_CHECK)
# binman
# ---------------------------------------------------------------------------
quiet_cmd_binman = BINMAN $@
cmd_binman = $(srctree)/tools/binman/binman -d u-boot.dtb -O . \
-I . -I $(srctree)/board/$(BOARDDIR) $<
OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec
@@ -1058,19 +900,6 @@ quiet_cmd_cpp_cfg = CFG $@
cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
-DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
# Boards with more complex image requirments can provide an .its source file
# or a generator script
ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
else
ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
U_BOOT_ITS := u-boot.its
$(U_BOOT_ITS): FORCE
$(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
endif
endif
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
@@ -1080,11 +909,6 @@ else
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
MKIMAGEFLAGS_u-boot-ivt.img = -A $(ARCH) -T firmware_ivt -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot-ivt.img: MKIMAGEOUTPUT = u-boot-ivt.img.log
CLEAN_FILES += u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log
endif
MKIMAGEFLAGS_u-boot-dtb.img = $(MKIMAGEFLAGS_u-boot.img)
@@ -1093,20 +917,15 @@ MKIMAGEFLAGS_u-boot.kwb = -n $(srctree)/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
MKIMAGEFLAGS_u-boot-spl.kwb = -n $(srctree)/$(CONFIG_SYS_KWD_CONFIG:"%"=%) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
$(if $(KEYDIR),-k $(KEYDIR))
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl: \
$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE
$(call if_changed,mkimage)
u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)
u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
@@ -1116,6 +935,9 @@ u-boot.sha1: u-boot.bin
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
u-boot.cfg: include/config.h FORCE
$(call if_changed,cpp_cfg)
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
else
@@ -1153,10 +975,10 @@ tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
$(call if_changed,pad_cat)
SPL: spl/u-boot-spl.bin FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)
@@ -1205,11 +1027,50 @@ endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
# the middle. This is handled by binman based on an image description in the
# board's device tree.
# the middle.
ifneq ($(CONFIG_X86_RESET_VECTOR),)
rom: u-boot.rom FORCE
IFDTOOL=$(objtree)/tools/ifdtool
IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb
IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1)
IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-nodtb.bin
IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
IFDTOOL_FLAGS += -C
ifneq ($(CONFIG_HAVE_INTEL_ME),)
IFDTOOL_ME_FLAGS = -D $(srctree)/board/$(BOARDDIR)/descriptor.bin
IFDTOOL_ME_FLAGS += -i ME:$(srctree)/board/$(BOARDDIR)/me.bin
endif
ifneq ($(CONFIG_HAVE_MRC),)
IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin
endif
ifneq ($(CONFIG_HAVE_FSP),)
IFDTOOL_FLAGS += -w $(CONFIG_FSP_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_FSP_FILE)
endif
ifneq ($(CONFIG_HAVE_CMC),)
IFDTOOL_FLAGS += -w $(CONFIG_CMC_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_CMC_FILE)
endif
ifneq ($(CONFIG_HAVE_VGA_BIOS),)
IFDTOOL_FLAGS += -w $(CONFIG_VGA_BIOS_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_VGA_BIOS_FILE)
endif
ifneq ($(CONFIG_HAVE_REFCODE),)
IFDTOOL_FLAGS += -w $(CONFIG_X86_REFCODE_ADDR):refcode.bin
endif
quiet_cmd_ifdtool = IFDTOOL $@
cmd_ifdtool = $(IFDTOOL) -c -r $(CONFIG_ROM_SIZE) u-boot.tmp;
ifneq ($(CONFIG_HAVE_INTEL_ME),)
cmd_ifdtool += $(IFDTOOL) $(IFDTOOL_ME_FLAGS) u-boot.tmp;
endif
cmd_ifdtool += $(IFDTOOL) $(IFDTOOL_FLAGS) u-boot.tmp;
cmd_ifdtool += mv u-boot.tmp $@
refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE
$(call if_changed,copy)
@@ -1217,32 +1078,23 @@ quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
$(filter-out FORCE,$^) -o $@
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE
$(call if_changed,binman)
u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE \
$(if $(CONFIG_HAVE_REFCODE),refcode.bin)
$(call if_changed,ifdtool)
OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
u-boot-x86-16bit.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
ifneq ($(CONFIG_ARCH_SUNXI),)
ifeq ($(CONFIG_ARM64),)
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
$(call if_changed,binman)
else
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
$(call if_changed,cat)
endif
ifneq ($(CONFIG_SUNXI),)
OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
$(call if_changed,pad_cat)
endif
ifneq ($(CONFIG_TEGRA),)
ifneq ($(CONFIG_BINMAN),)
u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin: \
spl/u-boot-spl u-boot.bin FORCE
$(call if_changed,binman)
else
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot-nodtb.bin FORCE
$(call if_changed,pad_cat)
@@ -1253,7 +1105,6 @@ u-boot-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
u-boot-dtb-tegra.bin: u-boot-tegra.bin FORCE
$(call if_changed,copy)
endif # binman
endif
OBJCOPYFLAGS_u-boot-app.efi := $(OBJCOPYFLAGS_EFI)
@@ -1271,7 +1122,7 @@ quiet_cmd_u-boot_payload ?= LD $@
cmd_u-boot_payload ?= $(LD) $(LDFLAGS_EFI_PAYLOAD) -o $@ \
-T u-boot-payload.lds arch/x86/cpu/call32.o \
lib/efi/efi.o lib/efi/efi_stub.o u-boot.bin.o \
$(addprefix arch/$(ARCH)/lib/,$(EFISTUB))
$(addprefix arch/$(ARCH)/lib/efi/,$(EFISTUB))
u-boot-payload: u-boot.bin.o u-boot-payload.lds FORCE
$(call if_changed,u-boot_payload)
@@ -1316,19 +1167,17 @@ OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
$(call if_changed,pad_cat)
# Create a new ELF from a raw binary file.
ifndef PLATFORM_ELFENTRY
PLATFORM_ELFENTRY = "_start"
endif
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
--defsym=$(PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
# Create a new ELF from a raw binary file. This is useful for arm64
# where static relocation needs to be performed on the raw binary,
# but certain simulators only accept an ELF file (but don't do the
# relocation).
# FIXME refactor dts/Makefile to share target/arch detection
u-boot.elf: u-boot.bin
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
@$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \
$< u-boot-elf.o
@$(LD) u-boot-elf.o -o $@ \
--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
# Rule to link u-boot
# May be overridden by arch/$(ARCH)/config.mk
@@ -1336,8 +1185,7 @@ quiet_cmd_u-boot__ ?= LD $@
cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
-T u-boot.lds $(u-boot-init) \
--start-group $(u-boot-main) --end-group \
$(PLATFORM_LIBS) -Map u-boot.map; \
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
$(PLATFORM_LIBS) -Map u-boot.map
quiet_cmd_smap = GEN common/system_map.o
cmd_smap = \
@@ -1347,16 +1195,12 @@ cmd_smap = \
-c $(srctree)/common/system_map.c -o common/system_map.o
u-boot: $(u-boot-init) $(u-boot-main) u-boot.lds FORCE
+$(call if_changed,u-boot__)
$(call if_changed,u-boot__)
ifeq ($(CONFIG_KALLSYMS),y)
$(call cmd,smap)
$(call cmd,u-boot__) common/system_map.o
endif
ifeq ($(CONFIG_RISCV),y)
@tools/prelink-riscv $@ 0
endif
quiet_cmd_sym ?= SYM $@
cmd_sym ?= $(OBJDUMP) -t $< > $@
u-boot.sym: u-boot FORCE
@@ -1424,10 +1268,6 @@ ifeq ($(wildcard $(LDSCRIPT)),)
@/bin/false
endif
ifeq ($(CONFIG_USE_DEFAULT_ENV_FILE),y)
prepare1: $(defaultenv_h)
endif
archprepare: prepare1 scripts_basic
prepare0: archprepare FORCE
@@ -1462,7 +1302,6 @@ define filechk_timestamp.h
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
else \
return 42; \
fi; \
@@ -1471,27 +1310,15 @@ define filechk_timestamp.h
LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C date +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C date +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
LC_ALL=C date +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
fi)
endef
define filechk_defaultenv.h
(grep -v '^#' | \
grep -v '^$$' | \
tr '\n' '\0' | \
sed -e 's/\\\x0/\n/' | \
xxd -i ; echo ", 0x00" ; )
endef
$(version_h): include/config/uboot.release FORCE
$(call filechk,version.h)
$(timestamp_h): $(srctree)/Makefile FORCE
$(call filechk,timestamp.h)
$(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE
$(call filechk,defaultenv.h)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds = LDS $@
cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \
@@ -1503,24 +1330,19 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE
spl/u-boot-spl.bin: spl/u-boot-spl
@:
spl/u-boot-spl: tools prepare \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
spl/sunxi-spl.bin: spl/u-boot-spl
@:
spl/sunxi-spl-with-ecc.bin: spl/sunxi-spl.bin
@:
spl/u-boot-spl.sfp: spl/u-boot-spl
@:
spl/boot.bin: spl/u-boot-spl
@:
tpl/u-boot-tpl.bin: tools prepare \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
tpl/u-boot-tpl.bin: tools prepare
$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
@@ -1548,6 +1370,12 @@ SYSTEM_MAP = \
System.map: u-boot
@$(call SYSTEM_MAP,$<) > $@
checkdtc:
@if test $(call dtc-version) -lt 0104; then \
echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \
false; \
fi
#########################################################################
# ARM relocations should all be R_ARM_RELATIVE (32-bit) or
@@ -1561,14 +1389,14 @@ checkarmreloc: u-boot
false; \
fi
envtools: scripts_basic $(version_h) $(timestamp_h)
$(Q)$(MAKE) $(build)=tools/env
env: scripts_basic
$(Q)$(MAKE) $(build)=tools/$@
tools-only: scripts_basic $(version_h) $(timestamp_h)
$(Q)$(MAKE) $(build)=tools
tools-all: export HOST_TOOLS_ALL=y
tools-all: envtools tools ;
tools-all: env tools ;
cross_tools: export CROSS_BUILD_TOOLS=y
cross_tools: tools ;
@@ -1592,8 +1420,8 @@ CLEAN_DIRS += $(MODVERDIR) \
$(foreach d, spl tpl, $(patsubst %,$d/%, \
$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
boot* u-boot* MLO* SPL System.map fit-dtb.blob
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h include/license.h \
boot* u-boot* MLO* SPL System.map
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl \
@@ -1622,12 +1450,10 @@ clean: $(clean-dirs)
\( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
-o -name '*.ko.*' -o -name '*.su' -o -name '*.cfgtmp' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.lex.c' -o -name '*.tab.[ch]' \
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f
-o -name '*.gcno' \) -type f -print | xargs rm -f
# mrproper - Delete all generated files, including .config
#
@@ -1683,12 +1509,9 @@ help:
@echo ' cscope - Generate cscope index'
@echo ' ubootrelease - Output the release version string (use with make -s)'
@echo ' ubootversion - Output the version stored in Makefile (use with make -s)'
@echo " cfg - Don't build, just create the .cfg files"
@echo " envtools - Build only the target-side environment tools"
@echo ''
@echo 'Static analysers'
@echo ' checkstack - Generate a list of stack hogs'
@echo ' coccicheck - Execute static code analysis with Coccinelle'
@echo ''
@echo 'Documentation targets:'
@$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp
@@ -1717,6 +1540,11 @@ tests:
$(Q)$(MAKE) $(build)=scripts build_docproc
$(Q)$(MAKE) $(build)=doc/DocBook $@
# Dummies...
PHONY += prepare scripts
prepare: ;
scripts: ;
endif #ifeq ($(config-targets),1)
endif #ifeq ($(mixed-targets),1)
@@ -1781,14 +1609,6 @@ endif
$(build)=$(build-dir) $(@:.ko=.o)
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
# Consistency checks
# ---------------------------------------------------------------------------
PHONY += coccicheck
coccicheck:
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/$@
# FIXME Should go into a make.lib or something
# ===========================================================================

1674
README

File diff suppressed because it is too large Load Diff

View File

@@ -1,9 +0,0 @@
menu "API"
config API
bool "Enable U-Boot API"
default n
help
This option enables the U-Boot API. See api/README for more information.
endmenu

View File

@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2007 Semihalf
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += api.o api_display.o api_net.o api_storage.o
obj-$(CONFIG_ARM) += api_platform-arm.o

View File

@@ -1,8 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
@@ -457,7 +458,7 @@ static int API_env_get(va_list ap)
if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*value = env_get(name);
*value = getenv(name);
return 0;
}
@@ -480,7 +481,7 @@ static int API_env_set(va_list ap)
if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
env_set(name, value);
setenv(name, value);
return 0;
}
@@ -494,47 +495,45 @@ static int API_env_set(va_list ap)
*/
static int API_env_enum(va_list ap)
{
int i, buflen;
char *last, **next, *s;
ENTRY *match, search;
static char *var;
int i, n;
char *last, **next;
last = (char *)va_arg(ap, unsigned long);
if ((next = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if (last == NULL) {
var = NULL;
i = 0;
} else {
var = strdup(last);
s = strchr(var, '=');
if (s != NULL)
*s = 0;
search.key = var;
i = hsearch_r(search, FIND, &match, &env_htab, 0);
if (i == 0) {
i = API_EINVAL;
goto done;
if (last == NULL)
/* start over */
*next = ((char *)env_get_addr(0));
else {
*next = last;
for (i = 0; env_get_char(i) != '\0'; i = n + 1) {
for (n = i; env_get_char(n) != '\0'; ++n) {
if (n >= CONFIG_ENV_SIZE) {
/* XXX shouldn't we set *next = NULL?? */
return 0;
}
}
if (envmatch((uchar *)last, i) < 0)
continue;
/* try to get next name */
i = n + 1;
if (env_get_char(i) == '\0') {
/* no more left */
*next = NULL;
return 0;
}
*next = ((char *)env_get_addr(i));
return 0;
}
}
/* match the next entry after i */
i = hmatch_r("", i, &match, &env_htab);
if (i == 0)
goto done;
buflen = strlen(match->key) + strlen(match->data) + 2;
var = realloc(var, buflen);
snprintf(var, buflen, "%s=%s", match->key, match->data);
*next = var;
return 0;
done:
free(var);
var = NULL;
*next = NULL;
return i;
}
/*
@@ -624,7 +623,7 @@ int syscall(int call, int *retval, ...)
void api_init(void)
{
struct api_signature *sig;
struct api_signature *sig = NULL;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
@@ -662,7 +661,7 @@ void api_init(void)
return;
}
env_set_hex("api_address", (unsigned long)sig);
setenv_hex("api_address", (unsigned long)sig);
debugf("API sig @ 0x%lX\n", (unsigned long)sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,8 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
@@ -11,6 +12,8 @@
#include <linux/types.h>
#include <api_public.h>
DECLARE_GLOBAL_DATA_PTR;
#define DEBUG
#undef DEBUG

View File

@@ -1,9 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from ARM-dependent sources
* (bd_info etc.)
*/

View File

@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from bd_info sources
*/

View File

@@ -1,9 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* This file contains routines that fetch data from PowerPC-dependent sources
* (bd_info etc.)
*/
@@ -29,8 +30,11 @@ int platform_sys_info(struct sys_info *si)
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx)
#define bi_bar bi_mbar_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#endif

View File

@@ -1,8 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _API_PRIVATE_H_

View File

@@ -1,8 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
@@ -36,19 +37,16 @@ struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, NULL }, };
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
#ifndef CONFIG_SYS_MMC_MAX_DEVICE
#define CONFIG_SYS_MMC_MAX_DEVICE 1
#endif
void dev_stor_init(void)
{
#if defined(CONFIG_IDE)
#if defined(CONFIG_CMD_IDE)
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
specs[ENUM_IDE].enum_started = 0;
specs[ENUM_IDE].enum_ended = 0;
@@ -62,7 +60,7 @@ void dev_stor_init(void)
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_SATA)
#if defined(CONFIG_CMD_SATA)
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
@@ -90,67 +88,88 @@ void dev_stor_init(void)
*
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
*
* first: if 1 the first device in the storage group is returned (if
* exists), if 0 the next available device is searched
*
* more: returns 0/1 depending if there are more devices in this group
* available (for future iterations)
*
* returns: 0/1 depending if device found in this iteration
*/
static int dev_stor_get(int type, int *more, struct device_info *di)
static int dev_stor_get(int type, int first, int *more, struct device_info *di)
{
struct blk_desc *dd;
int found = 0;
int i = 0;
*more = 0;
/* Wasn't configured for this type, return 0 directly */
if (specs[type].name == NULL)
return 0;
int i;
if (di->cookie != NULL) {
/* Find the last device we've returned */
for (i = 0; i < specs[type].max_dev; i++) {
struct blk_desc *dd;
if (first) {
di->cookie = (void *)blk_get_dev(specs[type].name, 0);
if (di->cookie == NULL)
return 0;
else
found = 1;
/* provide hint if there are more devices in
* this group to enumerate */
if (1 < specs[type].max_dev)
*more = 1;
} else {
for (i = 0; i < specs[type].max_dev; i++)
if (di->cookie ==
(void *)blk_get_dev(specs[type].name, i)) {
i += 1;
/* previous cookie found -- advance to the
* next device, if possible */
if (++i >= specs[type].max_dev) {
/* out of range, no more to enum */
di->cookie = NULL;
break;
}
di->cookie = (void *)blk_get_dev(
specs[type].name, i);
if (di->cookie == NULL)
return 0;
else
found = 1;
/* provide hint if there are more devices in
* this group to enumerate */
if ((i + 1) < specs[type].max_dev)
*more = 1;
break;
}
}
}
for (; i < specs[type].max_dev; i++) {
di->cookie = (void *)blk_get_dev(specs[type].name, i);
if (di->cookie != NULL) {
found = 1;
break;
}
}
if (i == specs[type].max_dev)
*more = 0;
else
*more = 1;
if (found) {
di->type = specs[type].type;
dd = (struct blk_desc *)di->cookie;
if (dd->type == DEV_TYPE_UNKNOWN) {
debugf("device instance exists, but is not active..");
found = 0;
} else {
di->di_stor.block_count = dd->lba;
di->di_stor.block_size = dd->blksz;
if (di->cookie != NULL) {
dd = (struct blk_desc *)di->cookie;
if (dd->type == DEV_TYPE_UNKNOWN) {
debugf("device instance exists, but is not active..");
found = 0;
} else {
di->di_stor.block_count = dd->lba;
di->di_stor.block_size = dd->blksz;
}
}
} else {
} else
di->cookie = NULL;
}
return found;
}
/* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc */
/*
* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc
*/
static int dev_stor_type(struct blk_desc *dd)
{
int i, j;
@@ -164,8 +183,9 @@ static int dev_stor_type(struct blk_desc *dd)
}
/* returns: 0/1 whether cookie points to some device in this group */
/*
* returns: 0/1 whether cookie points to some device in this group
*/
static int dev_is_stor(int type, struct device_info *di)
{
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
@@ -196,16 +216,18 @@ static int dev_enum_stor(int type, struct device_info *di)
*/
if (di->cookie == NULL) {
debugf("group%d - enum restart\n", type);
/*
* 1. Enumeration (re-)started: take the first available
* device, if exists
*/
found = dev_stor_get(type, &more, di);
found = dev_stor_get(type, 1, &more, di);
specs[type].enum_started = 1;
} else if (dev_is_stor(type, di)) {
debugf("group%d - enum continued for the next device\n", type);
if (specs[type].enum_ended) {
@@ -214,9 +236,10 @@ static int dev_enum_stor(int type, struct device_info *di)
}
/* 2a. Attempt to take a next available device in the group */
found = dev_stor_get(type, &more, di);
found = dev_stor_get(type, 0, &more, di);
} else {
if (specs[type].enum_ended) {
debugf("group %d - already enumerated, skipping\n", type);
return 0;
@@ -228,7 +251,7 @@ static int dev_enum_stor(int type, struct device_info *di)
/*
* 2b. If enumerating devices in this group did not
* happen before, it means the cookie pointed to a
* device from some other group (another storage
* device frome some other group (another storage
* group, or network); in this case try to take the
* first available device from our group
*/
@@ -238,7 +261,7 @@ static int dev_enum_stor(int type, struct device_info *di)
* Attempt to take the first device in this group:
*'first element' flag is set
*/
found = dev_stor_get(type, &more, di);
found = dev_stor_get(type, 1, &more, di);
} else {
errf("group%d - out of order iteration\n", type);
@@ -255,7 +278,7 @@ static int dev_enum_stor(int type, struct device_info *di)
if (found)
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
(u_int32_t)di->cookie);
else
debugf("no device found\n");
@@ -276,7 +299,9 @@ int dev_enum_storage(struct device_info *di)
{
int i;
/* check: ide, usb, scsi, mmc */
/*
* check: ide, usb, scsi, mmc
*/
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
if (dev_enum_stor(i, di))
return 1;
@@ -333,14 +358,10 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start
if (!dev_stor_is_valid(type, dd))
return 0;
#ifdef CONFIG_BLK
return blk_dread(dd, start, len, buf);
#else
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}
return dd->block_read(dd, start, len, buf);
#endif /* defined(CONFIG_BLK) */
}

View File

@@ -12,10 +12,6 @@ config ARC
bool "ARC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select ARCH_EARLY_INIT_R
select CLK
select TIMER
select ARC_TIMER
config ARM
bool "ARM architecture"
@@ -23,16 +19,20 @@ config ARM
select HAVE_PRIVATE_LIBGCC if !ARM64
select SUPPORT_OF_CONTROL
config AVR32
bool "AVR32 architecture"
select CREATE_ARCH_SYMLINK
config BLACKFIN
bool "Blackfin architecture"
config M68K
bool "M68000 architecture"
select HAVE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_OF_CONTROL
imply CMD_IRQ
config MIPS
bool "MIPS architecture"
@@ -42,7 +42,6 @@ config MIPS
config NDS32
bool "NDS32 architecture"
select SUPPORT_OF_CONTROL
config NIOS2
bool "Nios II architecture"
@@ -51,83 +50,43 @@ config NIOS2
select DM
select CPU
config OPENRISC
bool "OpenRISC architecture"
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config RISCV
bool "riscv architecture"
select SUPPORT_OF_CONTROL
config SANDBOX
bool "Sandbox"
select BOARD_LATE_INIT
select SUPPORT_OF_CONTROL
select DM
select DM_KEYBOARD
select DM_SPI_FLASH
select DM_SERIAL
select DM_I2C
select DM_SPI
select DM_GPIO
select DM_MMC
select HAVE_BLOCK_DEVICE
select SPI
select LZO
imply CMD_GETTIME
imply CMD_HASH
imply CMD_IO
imply CMD_IOTRACE
imply CMD_LZMADEC
imply CRC32_VERIFY
imply FAT_WRITE
imply HASH_VERIFY
imply LZMA
imply SCSI
imply CMD_SATA
imply CMD_SF_TEST
config SH
bool "SuperH architecture"
select HAVE_PRIVATE_LIBGCC
config SPARC
bool "SPARC architecture"
select CREATE_ARCH_SYMLINK
config X86
bool "x86 architecture"
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC
select USE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
select DM_PCI
select PCI
select TIMER
select X86_TSC_TIMER
imply BLK
imply DM_ETH
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply DM_SERIAL
imply DM_SCSI
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
imply DM_VIDEO
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
imply CMD_IRQ
imply CMD_PCI
imply CMD_SF_TEST
imply CMD_ZBOOT
imply USB_HOST_ETHER
imply USB_ETHER_ASIX
imply USB_ETHER_SMSC95XX
select DM_SERIAL
select DM_GPIO
select DM_SPI
select DM_SPI_FLASH
config XTENSA
bool "Xtensa architecture"
@@ -194,14 +153,17 @@ config SYS_CONFIG_NAME
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/avr32/Kconfig"
source "arch/blackfin/Kconfig"
source "arch/m68k/Kconfig"
source "arch/microblaze/Kconfig"
source "arch/mips/Kconfig"
source "arch/nds32/Kconfig"
source "arch/nios2/Kconfig"
source "arch/openrisc/Kconfig"
source "arch/powerpc/Kconfig"
source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/sparc/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"

View File

@@ -116,27 +116,9 @@ config SYS_DCACHE_OFF
bool "Do not use Data Cache"
default n
menuconfig ARC_DBG
bool "ARC debugging"
default n
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
default n
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.
NOTE: as of today linux will not work properly if this option
is enabled in u-boot!
endif
choice
prompt "Target select"
default TARGET_AXS103
default TARGET_AXS10X
config TARGET_TB100
bool "Support tb100"
@@ -144,25 +126,13 @@ config TARGET_TB100
config TARGET_NSIM
bool "Support standalone nSIM & Free nSIM"
config TARGET_AXS101
bool "Support Synopsys Designware SDP board AXS101"
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
config TARGET_EMDK
bool "Synopsys EM Development kit"
select CPU_ARCEM6
config TARGET_HSDK
bool "Support Synpsys HS DevelopmentKit board"
config TARGET_AXS10X
bool "Support Synopsys Designware SDP board (AXS101 & AXS103)"
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs10x/Kconfig"
source "board/synopsys/emdk/Kconfig"
source "board/synopsys/hsdk/Kconfig"
endmenu

View File

@@ -1,4 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
#
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/

View File

@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
ifndef CONFIG_CPU_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
@@ -29,15 +31,15 @@ CONFIG_MMU = 1
endif
ifdef CONFIG_CPU_ARC750D
PLATFORM_CPPFLAGS += -mcpu=arc700
PLATFORM_CPPFLAGS += -marc700
endif
ifdef CONFIG_CPU_ARC770D
PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape
PLATFORM_CPPFLAGS += -marc700 -mlock -mswape
endif
ifdef CONFIG_CPU_ARCEM6
PLATFORM_CPPFLAGS += -mcpu=arcem
PLATFORM_CPPFLAGS += -marcem
endif
ifdef CONFIG_CPU_ARCHS34
@@ -48,11 +50,10 @@ ifdef CONFIG_CPU_ARCHS38
PLATFORM_CPPFLAGS += -mcpu=archs
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation
LDFLAGS_FINAL += -pie --gc-sections
LDFLAGS_FINAL += -pie
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

View File

@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += ivt.o

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "ax",@progbits

View File

@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += ivt.o

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "a",@progbits

View File

@@ -1,26 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = CONFIG_SYS_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
KEEP(*(.ivt))
}
__ivt_end = .;
. = ALIGN(1024);
__text_start = .;
.text : {
arch/arc/lib/start.o (.text*)
@@ -28,6 +20,14 @@ SECTIONS
}
__text_end = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
*(.ivt)
}
__ivt_end = .;
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

1
arch/arc/dts/.gitignore vendored Normal file
View File

@@ -0,0 +1 @@
*.dtb

View File

@@ -1,11 +1,10 @@
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
#
dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_AXS10X) += axs10x.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMDK) += emdk.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
targets += $(dtb-y)

View File

@@ -1,25 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <750000000>;
u-boot,dm-pre-reloc;
};
};
};

View File

@@ -1,18 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
};
};
};

View File

@@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc001.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
chosen {
stdout-path = &uart0;
};
};

View File

@@ -1,16 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc003.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
chosen {
stdout-path = &uart0;
};
};

57
arch/arc/dts/axs10x.dts Normal file
View File

@@ -0,0 +1,57 @@
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
clocks {
apbclk: apbclk {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
};
uart0: serial0@e0022000 {
compatible = "snps,dw-apb-uart";
reg = <0xe0022000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@e0018000 {
#interrupt-cells = <1>;
compatible = "altr,socfpga-stmmac";
reg = < 0xe0018000 0x2000 >;
interrupts = < 25 >;
interrupt-names = "macirq";
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
};
ehci@0xe0040000 {
compatible = "generic-ehci";
reg = < 0xe0040000 0x100 >;
interrupts = < 8 >;
};
ohci@0xe0060000 {
compatible = "generic-ohci";
reg = < 0xe0060000 0x100 >;
interrupts = < 8 >;
};
};

View File

@@ -1,60 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/ {
axs10x_mb@e0000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>;
u-boot,dm-pre-reloc;
clocks {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
apbclk: apbclk {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
uartclk: uartclk {
compatible = "fixed-clock";
clock-frequency = <33333333>;
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
};
ethernet@18000 {
compatible = "altr,socfpga-stmmac";
reg = < 0x18000 0x2000 >;
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
};
ehci@0x40000 {
compatible = "generic-ehci";
reg = < 0x40000 0x100 >;
};
ohci@0x60000 {
compatible = "generic-ohci";
reg = < 0x60000 0x100 >;
};
uart0: serial0@22000 {
compatible = "snps,dw-apb-uart";
reg = <0x22000 0x100>;
clocks = <&uartclk>;
reg-shift = <2>;
reg-io-width = <4>;
};
};
};

View File

@@ -1,33 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial0@f0004000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <100000000>;
reg = <0xf0004000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

View File

@@ -1,111 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <1000000000>;
u-boot,dm-pre-reloc;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@f0008000 {
#interrupt-cells = <1>;
compatible = "altr,socfpga-stmmac";
reg = <0xf0008000 0x2000>;
phy-mode = "gmii";
};
ehci@0xf0040000 {
compatible = "generic-ehci";
reg = <0xf0040000 0x100>;
};
ohci@0xf0060000 {
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,hsdk-creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
};
};

View File

@@ -1,29 +1,24 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &arcuart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <70000000>;
u-boot,dm-pre-reloc;
};
};
arcuart0: serial@0xc0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
clock-frequency = <70000000>;
clock-frequency = <80000000>;
};
};

View File

@@ -9,22 +9,5 @@
#size-cells = <1>;
chosen { };
aliases { };
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
timer@0 {
compatible = "snps,arc-timer";
clocks = <&core_clk>;
reg = <0 1>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256M */
};
memory { device_type = "memory"; reg = <0 0>; };
};

View File

@@ -1,77 +0,0 @@
/*
* ARC Build Configuration Registers, with encoded hardware config
*
* Copyright (C) 2018 Synopsys
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ARC_BCR_H
#define __ARC_BCR_H
#ifndef __ASSEMBLY__
#include <config.h>
union bcr_di_cache {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
};
union bcr_slc_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_generic {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_clust_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
};
union bcr_mmu_4 {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else
/* DTLB ITLB JES JE JA */
unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
#endif
} fields;
unsigned int word;
};
#endif /* __ASSEMBLY__ */
#endif /* __ARC_BCR_H */

View File

@@ -1,13 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
#include <asm/cache.h>
#include <config.h>
/*
* ARC architecture has additional address space - auxiliary registers.
@@ -27,22 +27,12 @@
#define ARC_AUX_IC_PTAG 0x1E
#endif
#define ARC_BCR_IC_BUILD 0x77
#define AUX_AUX_CACHE_LIMIT 0x5D
#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E
/* ICCM and DCCM auxiliary registers */
#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
#define ARC_AUX_TIMER1_CNT 0x100 /* Timer 1 count */
#define ARC_AUX_TIMER1_CTRL 0x101 /* Timer 1 control */
#define ARC_AUX_TIMER1_LIMIT 0x102 /* Timer 1 limit */
#define ARC_AUX_INTR_VEC_BASE 0x25
/* Data cache related auxiliary registers */
@@ -63,15 +53,8 @@
#define ARC_AUX_SLC_INVALIDATE 0x905
#define ARC_AUX_SLC_IVDL 0x910
#define ARC_AUX_SLC_FLDL 0x912
#define ARC_AUX_SLC_RGN_START 0x914
#define ARC_AUX_SLC_RGN_START1 0x915
#define ARC_AUX_SLC_RGN_END 0x916
#define ARC_AUX_SLC_RGN_END1 0x917
#define ARC_BCR_CLUSTER 0xcf
/* MMU Management regs */
#define ARC_AUX_MMU_BCR 0x06f
/* IO coherency related auxiliary registers */
#define ARC_AUX_IO_COH_ENABLE 0x500
#define ARC_AUX_IO_COH_PARTIAL 0x501
@@ -85,19 +68,6 @@
/* gcc builtin sr needs reg param to be long immediate */
#define write_aux_reg(reg_immed, val) \
__builtin_arc_sr((unsigned int)val, reg_immed)
/* ARCNUM [15:8] - field to identify each core in a multi-core system */
#define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
static const inline int is_isa_arcv2(void)
{
return IS_ENABLED(CONFIG_ISA_ARCV2);
}
static const inline int is_isa_arcompact(void)
{
return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARC_ARCREGS_H */

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BITOPS_H

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_BYTEORDER_H

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CACHE_H
@@ -29,13 +30,6 @@
#ifndef __ASSEMBLY__
void cache_init(void);
void flush_n_invalidate_dcache_all(void);
void sync_n_cleanup_cache_all(void);
static const inline int is_ioc_enabled(void)
{
return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
}
#endif /* __ASSEMBLY__ */

View File

@@ -1,12 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_LMB

View File

@@ -0,0 +1 @@
#include <asm-generic/errno.h>

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@@ -1,20 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
#include <config.h>
#ifndef __ASSEMBLY__
/* Architecture-specific global data */
struct arch_global_data {
int l1_line_sz;
#if defined(CONFIG_ISA_ARCV2)
int slc_line_sz;
#endif
};
#endif /* __ASSEMBLY__ */

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@@ -1 +0,0 @@
#include <asm-generic/gpio.h>

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@@ -0,0 +1,12 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_INIT_HELPERS_H
#define _ASM_ARC_INIT_HELPERS_H
int init_cache_f_r(void);
#endif /* _ASM_ARC_INIT_HELPERS_H */

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_IO_H
@@ -9,7 +10,7 @@
#include <linux/types.h>
#include <asm/byteorder.h>
#ifdef __ARCHS__
#ifdef CONFIG_ISA_ARCV2
/*
* ARCv2 based HS38 cores are in-order issue, but still weakly ordered
@@ -41,14 +42,38 @@
#define mb() asm volatile("sync\n" : : : "memory")
#endif
#ifdef __ARCHS__
#ifdef CONFIG_ISA_ARCV2
#define __iormb() rmb()
#define __iowmb() wmb()
#else
#define __iormb() asm volatile("" : : : "memory")
#define __iowmb() asm volatile("" : : : "memory")
#define __iormb() do { } while (0)
#define __iowmb() do { } while (0)
#endif
/*
* Given a physical address and a length, return a virtual address
* that can be used to access the memory range with the caching
* properties specified by "flags".
*/
#define MAP_NOCACHE (0)
#define MAP_WRCOMBINE (0)
#define MAP_WRBACK (0)
#define MAP_WRTHROUGH (0)
static inline void *
map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
{
return (void *)((unsigned long)paddr);
}
/*
* Take down a mapping set up by map_physmem().
*/
static inline void unmap_physmem(void *vaddr, unsigned long flags)
{
}
static inline void sync(void)
{
/* Not yet implemented */
@@ -277,6 +302,9 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
#include <asm-generic/io.h>
static inline phys_addr_t virt_to_phys(void *vaddr)
{
return (phys_addr_t)((unsigned long)vaddr);
}
#endif /* __ASM_ARC_IO_H */

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_LINKAGE_H

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_POSIX_TYPES_H

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_PROCESSOR_H

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_PTRACE_H

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@@ -0,0 +1,16 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_RELOCATE_H
#define _ASM_ARC_RELOCATE_H
#include <common.h>
int copy_uboot_to_ram(void);
int clear_bss(void);
int do_elf_reloc_fixups(void);
#endif /* _ASM_ARC_RELOCATE_H */

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_SECTIONS_H

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@@ -1 +1,27 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_STRING_H
#define __ASM_ARC_STRING_H
#define __HAVE_ARCH_MEMSET
#define __HAVE_ARCH_MEMCPY
#define __HAVE_ARCH_MEMCMP
#define __HAVE_ARCH_STRCHR
#define __HAVE_ARCH_STRCPY
#define __HAVE_ARCH_STRCMP
#define __HAVE_ARCH_STRLEN
extern void *memset(void *ptr, int, __kernel_size_t);
extern void *memcpy(void *, const void *, __kernel_size_t);
extern void memzero(void *ptr, __kernel_size_t n);
extern int memcmp(const void *, const void *, __kernel_size_t);
extern char *strchr(const char *s, int c);
extern char *strcpy(char *dest, const char *src);
extern int strcmp(const char *cs, const char *ct);
extern __kernel_size_t strlen(const char *);
#endif /* __ASM_ARC_STRING_H */

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_TYPES_H

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_ARC_H__

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@@ -1,13 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARC_U_BOOT_H__
#define __ASM_ARC_U_BOOT_H__
#include <asm-generic/u-boot.h>
#include <asm/u-boot-arc.h>
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_ARC

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@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o
head-y := start.o
@@ -8,7 +10,15 @@ obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += relocate.o
obj-y += strchr-700.o
obj-y += strcmp.o
obj-y += strcpy-700.o
obj-y += strlen.o
obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
obj-y += timer.o
obj-y += ints_low.o
obj-y += init_helpers.o

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* ANSI concatenation macros. */

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@@ -1,9 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/cache.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -40,64 +40,54 @@ void arch_lmb_reserve(struct lmb *lmb)
static int cleanup_before_linux(void)
{
disable_interrupts();
sync_n_cleanup_cache_all();
flush_dcache_all();
invalidate_icache_all();
return 0;
}
__weak int board_prep_linux(bootm_headers_t *images) { return 0; }
/* Subcommand: PREP */
static int boot_prep_linux(bootm_headers_t *images)
static void boot_prep_linux(bootm_headers_t *images)
{
int ret;
ret = image_setup_linux(images);
if (ret)
return ret;
return board_prep_linux(images);
if (image_setup_linux(images))
hang();
}
/* Generic implementation for single core CPU */
__weak void board_jump_and_run(ulong entry, int zero, int arch, uint params)
{
void (*kernel_entry)(int zero, int arch, uint params);
kernel_entry = (void (*)(int, int, uint))entry;
kernel_entry(zero, arch, params);
}
__weak void smp_set_core_boot_addr(unsigned long addr, int corenr) {}
__weak void smp_kick_all_cpus(void) {}
/* Subcommand: GO */
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
ulong kernel_entry;
void (*kernel_entry)(int zero, int arch, uint params);
unsigned int r0, r2;
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = images->ep;
kernel_entry = (void (*)(int, int, uint))images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
kernel_entry);
(ulong) kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
cleanup_before_linux();
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
r2 = (unsigned int)env_get("bootargs");
r2 = (unsigned int)getenv("bootargs");
}
cleanup_before_linux();
smp_set_core_boot_addr((unsigned long)kernel_entry, -1);
smp_kick_all_cpus();
if (!fake)
board_jump_and_run(kernel_entry, r0, 0, r2);
kernel_entry(r0, 0, r2);
}
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
@@ -106,13 +96,17 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
if (flag & BOOTM_STATE_OS_PREP)
return boot_prep_linux(images);
if (flag & BOOTM_STATE_OS_PREP) {
boot_prep_linux(images);
return 0;
}
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
boot_jump_linux(images, flag);
return 0;
}
return -1;
boot_prep_linux(images);
boot_jump_linux(images, flag);
return 0;
}

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@@ -1,536 +1,283 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/log2.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
/*
* [ NOTE 1 ]:
* Data cache (L1 D$ or SL$) entire invalidate operation or data cache disable
* operation may result in unexpected behavior and data loss even if we flush
* data cache right before invalidation. That may happens if we store any context
* on stack (like we store BLINK register on stack before function call).
* BLINK register is the register where return address is automatically saved
* when we do function call with instructions like 'bl'.
*
* There is the real example:
* We may hang in the next code as we store any BLINK register on stack in
* invalidate_dcache_all() function.
*
* void flush_dcache_all() {
* __dc_entire_op(OP_FLUSH);
* // Other code //
* }
*
* void invalidate_dcache_all() {
* __dc_entire_op(OP_INV);
* // Other code //
* }
*
* void foo(void) {
* flush_dcache_all();
* invalidate_dcache_all();
* }
*
* Now let's see what really happens during that code execution:
*
* foo()
* |->> call flush_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 1]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [flush L1 D$]
* return [jump to BLINK]
* <<------
* [other flush_dcache_all code]
* [pop BLINK] (get from stack)
* return [jump to BLINK]
* <<------
* |->> call invalidate_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 2]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [invalidate L1 D$] ![point 3]
* // Oops!!!
* // We lose return address from invalidate_dcache_all function:
* // we save it to stack and invalidate L1 D$ after that!
* return [jump to BLINK]
* <<------
* [other invalidate_dcache_all code]
* [pop BLINK] (get from stack)
* // we don't have this data in L1 dcache as we invalidated it in [point 3]
* // so we get it from next memory level (for example DDR memory)
* // but in the memory we have value which we save in [point 1], which
* // is return address from flush_dcache_all function (instead of
* // address from current invalidate_dcache_all function which we
* // saved in [point 2] !)
* return [jump to BLINK]
* <<------
* // As BLINK points to invalidate_dcache_all, we call it again and
* // loop forever.
*
* Fortunately we may fix that by using flush & invalidation of D$ with a single
* one instruction (instead of flush and invalidation instructions pair) and
* enabling force function inline with '__attribute__((always_inline))' gcc
* attribute to avoid any function call (and BLINK store) between cache flush
* and disable.
*
*
* [ NOTE 2 ]:
* As of today we only support the following cache configurations on ARC.
* Other configurations may exist in HW (for example, since version 3.0 HS
* supports SL$ (L2 system level cache) disable) but we don't support it in SW.
* Configuration 1:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 2:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | L2 (SL$) |
* |______________________|
* always must be on
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 3:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off must be on
* ___|______________|____ _______
* | | | |
* | L2 (SL$) |-----| IOC |
* |______________________| |_______|
* always must be on on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*/
DECLARE_GLOBAL_DATA_PTR;
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE BIT(0)
#define IC_CTRL_CACHE_DISABLE (1 << 0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE BIT(0)
#define DC_CTRL_INV_MODE_FLUSH BIT(6)
#define DC_CTRL_FLUSH_STATUS BIT(8)
#define DC_CTRL_CACHE_DISABLE (1 << 0)
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
#define CACHE_VER_NUM_MASK 0xF
#define SLC_CTRL_SB (1 << 2)
#define OP_INV BIT(0)
#define OP_FLUSH BIT(1)
#define OP_FLUSH_N_INV (OP_FLUSH | OP_INV)
/* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001
#define SLC_CTRL_IM 0x040
#define SLC_CTRL_BUSY 0x100
#define SLC_CTRL_RGN_OP_INV 0x200
#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
#define OP_INV 0x1
#define OP_FLUSH 0x2
#define OP_INV_IC 0x3
/*
* We don't want to use '__always_inline' macro here as it can be redefined
* to simple 'inline' in some cases which breaks stuff. See [ NOTE 1 ] for more
* details about the reasons we need to use always_inline functions.
* By default that variable will fall into .bss section.
* But .bss section is not relocated and so it will be initilized before
* relocation but will be used after being zeroed.
*/
#define inlined_cachefunc inline __attribute__((always_inline))
int l1_line_sz __section(".data");
int dcache_exists __section(".data");
int icache_exists __section(".data");
static inlined_cachefunc void __ic_entire_invalidate(void);
static inlined_cachefunc void __dc_entire_op(const int cacheop);
#define CACHE_LINE_MASK (~(l1_line_sz - 1))
static inline bool pae_exists(void)
{
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
union bcr_mmu_4 mmu4;
mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
if (mmu4.fields.pae)
return true;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
return false;
}
static inlined_cachefunc bool icache_exists(void)
{
union bcr_di_cache ibcr;
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
return !!ibcr.fields.ver;
}
static inlined_cachefunc bool icache_enabled(void)
{
if (!icache_exists())
return false;
return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool dcache_exists(void)
{
union bcr_di_cache dbcr;
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
return !!dbcr.fields.ver;
}
static inlined_cachefunc bool dcache_enabled(void)
{
if (!dcache_exists())
return false;
return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool slc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
return !!sbcr.fields.ver;
}
return false;
}
static inlined_cachefunc bool slc_data_bypass(void)
{
/*
* If L1 data cache is disabled SL$ is bypassed and all load/store
* requests are sent directly to main memory.
*/
return !dcache_enabled();
}
static inline bool ioc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_clust_cfg cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
return cbcr.fields.c;
}
return false;
}
static inline bool ioc_enabled(void)
{
/*
* We check only CONFIG option instead of IOC HW state check as IOC
* must be disabled by default.
*/
if (is_ioc_enabled())
return ioc_exists();
return false;
}
static inlined_cachefunc void __slc_entire_op(const int op)
{
unsigned int ctrl;
if (!slc_exists())
return;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
else
write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
static void slc_upper_region_init(void)
{
/*
* ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
* only if PAE exists in current HW. So we had to check pae_exist
* before using them.
*/
if (!pae_exists())
return;
/*
* ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
* as we don't use PAE40.
*/
write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
}
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{
#ifdef CONFIG_ISA_ARCV2
int slc_line_sz __section(".data");
int slc_exists __section(".data");
int ioc_exists __section(".data");
unsigned int ctrl;
unsigned long end;
if (!slc_exists())
return;
/*
* The Region Flush operation is specified by CTRL.RGN_OP[11..9]
* - b'000 (default) is Flush,
* - b'001 is Invalidate if CTRL.IM == 0
* - b'001 is Flush-n-Invalidate if CTRL.IM == 1
*/
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
/* Don't rely on default value of IM bit */
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
if (op & OP_INV)
ctrl |= SLC_CTRL_RGN_OP_INV; /* Inv or flush-n-inv */
else
ctrl &= ~SLC_CTRL_RGN_OP_INV;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
/*
* Lower bits are ignored, no need to clip
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end = paddr + sz + gd->arch.slc_line_sz - 1;
/*
* Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
* are always == 0 as we don't use PAE40, so we only setup lower ones
* (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
*/
write_aux_reg(ARC_AUX_SLC_RGN_END, end);
write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
#endif /* CONFIG_ISA_ARCV2 */
}
static void arc_ioc_setup(void)
static unsigned int __before_slc_op(const int op)
{
/* IOC Aperture start is equal to DDR start */
unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
/* IOC Aperture size is equal to DDR size */
long ap_size = CONFIG_SYS_SDRAM_SIZE;
unsigned int reg = reg;
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!slc_exists())
panic("Try to enable IOC but SLC is not present");
if (op == OP_INV) {
/*
* IM is set by default and implies Flush-n-inv
* Clear it here for vanilla inv
*/
reg = read_aux_reg(ARC_AUX_SLC_CTRL);
write_aux_reg(ARC_AUX_SLC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
}
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!dcache_enabled())
panic("Try to enable IOC but L1 D$ is disabled");
if (!is_power_of_2(ap_size) || ap_size < 4096)
panic("IOC Aperture size must be power of 2 and bigger 4Kib");
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");
flush_n_invalidate_dcache_all();
/*
* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size / 1024) - 2);
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
return reg;
}
static void __after_slc_op(const int op, unsigned int reg)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_SLC_CTRL) &
DC_CTRL_FLUSH_STATUS)
;
/* Switch back to default Invalidate mode */
if (op == OP_INV)
write_aux_reg(ARC_AUX_SLC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
}
static inline void __slc_line_loop(unsigned long paddr, unsigned long sz,
const int op)
{
unsigned int aux_cmd;
int num_lines;
#define SLC_LINE_MASK (~(slc_line_sz - 1))
aux_cmd = op & OP_INV ? ARC_AUX_SLC_IVDL : ARC_AUX_SLC_FLDL;
sz += paddr & ~SLC_LINE_MASK;
paddr &= SLC_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, slc_line_sz);
while (num_lines-- > 0) {
write_aux_reg(aux_cmd, paddr);
paddr += slc_line_sz;
}
}
static inline void __slc_entire_op(const int cacheop)
{
int aux;
unsigned int ctrl_reg = __before_slc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_SLC_INVALIDATE;
else
aux = ARC_AUX_SLC_FLUSH;
write_aux_reg(aux, 0x1);
__after_slc_op(cacheop, ctrl_reg);
}
static inline void __slc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int ctrl_reg = __before_slc_op(cacheop);
__slc_line_loop(paddr, sz, cacheop);
__after_slc_op(cacheop, ctrl_reg);
}
#else
#define __slc_entire_op(cacheop)
#define __slc_line_op(paddr, sz, cacheop)
#endif
#ifdef CONFIG_ISA_ARCV2
static void read_decode_cache_bcr_arcv2(void)
{
#ifdef CONFIG_ISA_ARCV2
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
} slc_cfg;
union bcr_slc_cfg slc_cfg;
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
} sbcr;
if (slc_exists()) {
sbcr.word = read_aux_reg(ARC_BCR_SLC);
if (sbcr.fields.ver) {
slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
/*
* We don't support configuration where L1 I$ or L1 D$ is
* absent but SL$ exists. See [ NOTE 2 ] for more details.
*/
if (!icache_exists() || !dcache_exists())
panic("Unsupported cache configuration: SLC exists but one of L1 caches is absent");
slc_exists = 1;
slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
}
#endif /* CONFIG_ISA_ARCV2 */
union {
struct bcr_clust_cfg {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
} cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c)
ioc_exists = 1;
}
#endif
void read_decode_cache_bcr(void)
{
int dc_line_sz = 0, ic_line_sz = 0;
union bcr_di_cache ibcr, dbcr;
/*
* We don't care much about I$ line length really as there're
* no per-line ops on I$ instead we only do full invalidation of it
* on occasion of relocation and right before jumping to the OS.
* Still we check insane config with zero-encoded line length in
* presense of version field in I$ BCR. Just in case.
*/
union {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
} ibcr, dbcr;
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
if (ibcr.fields.ver) {
ic_line_sz = 8 << ibcr.fields.line_len;
icache_exists = 1;
l1_line_sz = ic_line_sz = 8 << ibcr.fields.line_len;
if (!ic_line_sz)
panic("Instruction exists but line length is 0\n");
}
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
if (dbcr.fields.ver) {
gd->arch.l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (dbcr.fields.ver){
dcache_exists = 1;
l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (!dc_line_sz)
panic("Data cache exists but line length is 0\n");
}
if (ic_line_sz && dc_line_sz && (ic_line_sz != dc_line_sz))
panic("Instruction and data cache line lengths differ\n");
}
void cache_init(void)
{
read_decode_cache_bcr();
if (is_isa_arcv2())
read_decode_cache_bcr_arcv2();
#ifdef CONFIG_ISA_ARCV2
read_decode_cache_bcr_arcv2();
if (is_isa_arcv2() && ioc_enabled())
arc_ioc_setup();
if (ioc_exists) {
flush_dcache_all();
invalidate_dcache_all();
if (is_isa_arcv2() && slc_exists())
slc_upper_region_init();
/* IO coherency base - 0x8z */
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, 0x80000);
/* IO coherency aperture size - 512Mb: 0x8z-0xAz */
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE, 0x11);
/* Enable partial writes */
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
/* Enable IO coherency */
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
#endif
}
int icache_status(void)
{
return icache_enabled();
if (!icache_exists)
return 0;
if (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE)
return 0;
else
return 1;
}
void icache_enable(void)
{
if (icache_exists())
if (icache_exists)
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
if (!icache_exists())
return;
__ic_entire_invalidate();
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
/* IC supports only invalidation */
static inlined_cachefunc void __ic_entire_invalidate(void)
{
if (!icache_enabled())
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
if (icache_exists)
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
#ifndef CONFIG_SYS_DCACHE_OFF
void invalidate_icache_all(void)
{
__ic_entire_invalidate();
/*
* If SL$ is bypassed for data it is used only for instructions,
* so we need to invalidate it too.
* TODO: HS 3.0 supports SLC disable so we need to check slc
* enable/disable status here.
*/
if (is_isa_arcv2() && slc_data_bypass())
__slc_entire_op(OP_INV);
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
if (icache_status()) {
write_aux_reg(ARC_AUX_IC_IVIC, 1);
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
}
#else
void invalidate_icache_all(void)
{
}
#endif
int dcache_status(void)
{
return dcache_enabled();
if (!dcache_exists)
return 0;
if (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE)
return 0;
else
return 1;
}
void dcache_enable(void)
{
if (!dcache_exists())
if (!dcache_exists)
return;
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
@@ -539,77 +286,84 @@ void dcache_enable(void)
void dcache_disable(void)
{
if (!dcache_exists())
if (!dcache_exists)
return;
__dc_entire_op(OP_FLUSH_N_INV);
/*
* As SLC will be bypassed for data after L1 D$ disable we need to
* flush it first before L1 D$ disable. Also we invalidate SLC to
* avoid any inconsistent data problems after enabling L1 D$ again with
* dcache_enable function.
*/
if (is_isa_arcv2())
__slc_entire_op(OP_FLUSH_N_INV);
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
/* Common Helper for Line Operations on D-cache */
static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
#ifndef CONFIG_SYS_DCACHE_OFF
/*
* Common Helper for Line Operations on {I,D}-Cache
*/
static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int aux_cmd;
#if (CONFIG_ARC_MMU_VER == 3)
unsigned int aux_tag;
#endif
int num_lines;
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
if (cacheop == OP_INV_IC) {
aux_cmd = ARC_AUX_IC_IVIL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_IC_PTAG;
#endif
} else {
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
#if (CONFIG_ARC_MMU_VER == 3)
aux_tag = ARC_AUX_DC_PTAG;
#endif
}
sz += paddr & ~CACHE_LINE_MASK;
paddr &= CACHE_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, gd->arch.l1_line_sz);
num_lines = DIV_ROUND_UP(sz, l1_line_sz);
while (num_lines-- > 0) {
#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_DC_PTAG, paddr);
write_aux_reg(aux_tag, paddr);
#endif
write_aux_reg(aux_cmd, paddr);
paddr += gd->arch.l1_line_sz;
paddr += l1_line_sz;
}
}
static inlined_cachefunc void __before_dc_op(const int op)
static unsigned int __before_dc_op(const int op)
{
unsigned int ctrl;
unsigned int reg;
ctrl = read_aux_reg(ARC_AUX_DC_CTRL);
if (op == OP_INV) {
/*
* IM is set by default and implies Flush-n-inv
* Clear it here for vanilla inv
*/
reg = read_aux_reg(ARC_AUX_DC_CTRL);
write_aux_reg(ARC_AUX_DC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
}
/* IM bit implies flush-n-inv, instead of vanilla inv */
if (op == OP_INV)
ctrl &= ~DC_CTRL_INV_MODE_FLUSH;
else
ctrl |= DC_CTRL_INV_MODE_FLUSH;
write_aux_reg(ARC_AUX_DC_CTRL, ctrl);
return reg;
}
static inlined_cachefunc void __after_dc_op(const int op)
static void __after_dc_op(const int op, unsigned int reg)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
;
/* Switch back to default Invalidate mode */
if (op == OP_INV)
write_aux_reg(ARC_AUX_DC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
}
static inlined_cachefunc void __dc_entire_op(const int cacheop)
static inline void __dc_entire_op(const int cacheop)
{
int aux;
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
unsigned int ctrl_reg = __before_dc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_DC_IVDC;
@@ -618,54 +372,45 @@ static inlined_cachefunc void __dc_entire_op(const int cacheop)
write_aux_reg(aux, 0x1);
__after_dc_op(cacheop);
__after_dc_op(cacheop, ctrl_reg);
}
static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
__dcache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop);
unsigned int ctrl_reg = __before_dc_op(cacheop);
__cache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop, ctrl_reg);
}
#else
#define __dc_entire_op(cacheop)
#define __dc_line_op(paddr, sz, cacheop)
#endif /* !CONFIG_SYS_DCACHE_OFF */
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
__dc_line_op(start, end - start, OP_INV);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_INV);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_INV);
#endif
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
__dc_line_op(start, end - start, OP_FLUSH);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_FLUSH);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_FLUSH);
#endif
}
void flush_cache(unsigned long start, unsigned long size)
@@ -673,47 +418,22 @@ void flush_cache(unsigned long start, unsigned long size)
flush_dcache_range(start, start + size);
}
/*
* As invalidate_dcache_all() is not used in generic U-Boot code and as we
* don't need it in arch/arc code alone (invalidate without flush) we implement
* flush_n_invalidate_dcache_all (flush and invalidate in 1 operation) because
* it's much safer. See [ NOTE 1 ] for more details.
*/
void flush_n_invalidate_dcache_all(void)
void invalidate_dcache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
__dc_entire_op(OP_INV);
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH_N_INV);
#ifdef CONFIG_ISA_ARCV2
if (slc_exists)
__slc_entire_op(OP_INV);
#endif
}
void flush_dcache_all(void)
{
__dc_entire_op(OP_FLUSH);
if (is_isa_arcv2() && !slc_data_bypass())
#ifdef CONFIG_ISA_ARCV2
if (slc_exists)
__slc_entire_op(OP_FLUSH);
}
/*
* This is function to cleanup all caches (and therefore sync I/D caches) which
* can be used for cleanup before linux launch or to sync caches during
* relocation.
*/
void sync_n_cleanup_cache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
/*
* If SL$ is bypassed for data it is used only for instructions,
* and we shouldn't flush it. So invalidate it instead of flush_n_inv.
*/
if (is_isa_arcv2()) {
if (slc_data_bypass())
__slc_entire_op(OP_INV);
else
__slc_entire_op(OP_FLUSH_N_INV);
}
__ic_entire_invalidate();
#endif
}

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -27,9 +28,3 @@ int arch_early_init_r(void)
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* This is a dummy function on arc */
int dram_init(void)
{
return 0;
}

View File

@@ -1,14 +1,17 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/cache.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
int init_cache_f_r(void)
{
sync_n_cleanup_cache_all();
#ifndef CONFIG_SYS_DCACHE_OFF
flush_dcache_all();
#endif
return 0;
}

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "libgcc2.h"

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_LIBGCC_H

123
arch/arc/lib/memcmp.S Normal file
View File

@@ -0,0 +1,123 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifdef __LITTLE_ENDIAN__
#define WORD2 r2
#define SHIFT r3
#else /* __BIG_ENDIAN__ */
#define WORD2 r3
#define SHIFT r2
#endif /* _ENDIAN__ */
.global memcmp
.align 4
memcmp:
or %r12, %r0, %r1
asl_s %r12, %r12, 30
sub %r3, %r2, 1
brls %r2, %r12, .Lbytewise
ld %r4, [%r0, 0]
ld %r5, [%r1, 0]
lsr.f %lp_count, %r3, 3
lpne .Loop_end
ld_s WORD2, [%r0, 4]
ld_s %r12, [%r1, 4]
brne %r4, %r5, .Leven
ld.a %r4, [%r0, 8]
ld.a %r5, [%r1, 8]
brne WORD2, %r12, .Lodd
nop
.Loop_end:
asl_s SHIFT, SHIFT, 3
bhs_s .Last_cmp
brne %r4, %r5, .Leven
ld %r4, [%r0, 4]
ld %r5, [%r1, 4]
#ifdef __LITTLE_ENDIAN__
nop_s
/* one more load latency cycle */
.Last_cmp:
xor %r0, %r4, %r5
bset %r0, %r0, SHIFT
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
b.d .Leven_cmp
and %r1, %r1, 24
.Leven:
xor %r0, %r4, %r5
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
.Leven_cmp:
asl %r2, %r4, %r1
asl %r12, %r5, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
.balign 4
.Lodd:
xor %r0, WORD2, %r12
sub_s %r1, %r0, 1
bic_s %r1, %r1, %r0
norm %r1, %r1
/* slow track insn */
and %r1, %r1, 24
asl_s %r2, %r2, %r1
asl_s %r12, %r12, %r1
lsr_s %r2, %r2, 1
lsr_s %r12, %r12, 1
j_s.d [%blink]
sub %r0, %r2, %r12
#else /* __BIG_ENDIAN__ */
.Last_cmp:
neg_s SHIFT, SHIFT
lsr %r4, %r4, SHIFT
lsr %r5, %r5, SHIFT
/* slow track insn */
.Leven:
sub.f %r0, %r4, %r5
mov.ne %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
.Lodd:
cmp_s WORD2, %r12
mov_s %r0, 1
j_s.d [%blink]
bset.cs %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lbytewise:
breq %r2, 0, .Lnil
ldb %r4, [%r0, 0]
ldb %r5, [%r1, 0]
lsr.f %lp_count, %r3
lpne .Lbyte_end
ldb_s %r3, [%r0, 1]
ldb %r12, [%r1, 1]
brne %r4, %r5, .Lbyte_even
ldb.a %r4, [%r0, 2]
ldb.a %r5, [%r1, 2]
brne %r3, %r12, .Lbyte_odd
nop
.Lbyte_end:
bcc .Lbyte_even
brne %r4, %r5, .Lbyte_even
ldb_s %r3, [%r0, 1]
ldb_s %r12, [%r1, 1]
.Lbyte_odd:
j_s.d [%blink]
sub %r0, %r3, %r12
.Lbyte_even:
j_s.d [%blink]
sub %r0, %r4, %r5
.Lnil:
j_s.d [%blink]
mov %r0, 0

63
arch/arc/lib/memcpy-700.S Normal file
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@@ -0,0 +1,63 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.global memcpy
.align 4
memcpy:
or %r3, %r0, %r1
asl_s %r3, %r3, 30
mov_s %r5, %r0
brls.d %r2, %r3, .Lcopy_bytewise
sub.f %r3, %r2, 1
ld_s %r12, [%r1, 0]
asr.f %lp_count, %r3, 3
bbit0.d %r3, 2, .Lnox4
bmsk_s %r2, %r2, 1
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 4]
.Lnox4:
lppnz .Lendloop
ld_s %r3, [%r1, 4]
st.ab %r12, [%r5, 4]
ld.a %r12, [%r1, 8]
st.ab %r3, [%r5, 4]
.Lendloop:
breq %r2, 0, .Last_store
ld %r3, [%r5, 0]
#ifdef __LITTLE_ENDIAN__
add3 %r2, -1, %r2
/* uses long immediate */
xor_s %r12, %r12, %r3
bmsk %r12, %r12, %r2
xor_s %r12, %r12, %r3
#else /* __BIG_ENDIAN__ */
sub3 %r2, 31, %r2
/* uses long immediate */
xor_s %r3, %r3, %r12
bmsk %r3, %r3, %r2
xor_s %r12, %r12, %r3
#endif /* _ENDIAN__ */
.Last_store:
j_s.d [%blink]
st %r12, [%r5, 0]
.balign 4
.Lcopy_bytewise:
jcs [%blink]
ldb_s %r12, [%r1, 0]
lsr.f %lp_count, %r3
bhs_s .Lnox1
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 1]
.Lnox1:
lppnz .Lendbloop
ldb_s %r3, [%r1, 1]
stb.ab %r12, [%r5, 1]
ldb.a %r12, [%r1, 2]
stb.ab %r3, [%r5, 1]
.Lendbloop:
j_s.d [%blink]
stb %r12, [%r5, 0]

62
arch/arc/lib/memset.S Normal file
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@@ -0,0 +1,62 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */
.global memset
.align 4
memset:
mov_s %r4, %r0
or %r12, %r0, %r2
bmsk.f %r12, %r12, 1
extb_s %r1, %r1
asl %r3, %r1, 8
beq.d .Laligned
or_s %r1, %r1, %r3
brls %r2, SMALL, .Ltiny
add %r3, %r2, %r0
stb %r1, [%r3, -1]
bclr_s %r3, %r3, 0
stw %r1, [%r3, -2]
bmsk.f %r12, %r0, 1
add_s %r2, %r2, %r12
sub.ne %r2, %r2, 4
stb.ab %r1, [%r4, 1]
and %r4, %r4, -2
stw.ab %r1, [%r4, 2]
and %r4, %r4, -4
.balign 4
.Laligned:
asl %r3, %r1, 16
lsr.f %lp_count, %r2, 2
or_s %r1, %r1, %r3
lpne .Loop_end
st.ab %r1, [%r4, 4]
.Loop_end:
j_s [%blink]
.balign 4
.Ltiny:
mov.f %lp_count, %r2
lpne .Ltiny_end
stb.ab %r1, [%r4, 1]
.Ltiny_end:
j_s [%blink]
/*
* memzero: @r0 = mem, @r1 = size_t
* memset: @r0 = mem, @r1 = char, @r2 = size_t
*/
.global memzero
.align 4
memzero:
/* adjust bzero args to memset args */
mov %r2, %r1
mov %r1, 0
/* tail call so need to tinker with blink */
b memset

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -8,9 +9,7 @@
#include <asm-generic/sections.h>
extern ulong __image_copy_start;
extern ulong __ivt_start;
extern ulong __ivt_end;
extern ulong __text_end;
DECLARE_GLOBAL_DATA_PTR;
@@ -18,9 +17,6 @@ int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
return 0;
@@ -44,13 +40,10 @@ int do_elf_reloc_fixups(void)
Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
debug("Section .rela.dyn is located at %08x-%08x\n",
(unsigned int)re_src, (unsigned int)re_end);
Elf32_Addr *offset_ptr_rom;
Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
Elf32_Addr *offset_ptr_ram;
do {
@@ -59,28 +52,15 @@ int do_elf_reloc_fixups(void)
/* Check that the location of the relocation is in .text */
if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
unsigned int val, do_swap = 0;
offset_ptr_rom > last_offset) {
unsigned int val;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd->reloc_off);
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if (((u32)offset_ptr_rom >= (u32)&__text_start &&
(u32)offset_ptr_rom <= (u32)&__text_end)
#if defined(__ARC700__) || defined(__ARC600__)
|| ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
(u32)offset_ptr_rom <= (u32)&__ivt_end)
#endif
)
do_swap = 1;
#endif
debug("Patching value @ %08x (relocated to %08x)%s\n",
debug("Patching value @ %08x (relocated to %08x)\n",
(unsigned int)offset_ptr_rom,
(unsigned int)offset_ptr_ram,
do_swap ? ", middle-endian encoded" : "");
(unsigned int)offset_ptr_ram);
/*
* Use "memcpy" because target location might be
@@ -90,45 +70,28 @@ int do_elf_reloc_fixups(void)
*/
memcpy(&val, offset_ptr_ram, sizeof(int));
if (do_swap)
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__ivt_end)
val = (val << 16) | (val >> 16);
#endif
/* Check that the target points into executable */
if (val < (unsigned int)&__image_copy_start ||
val > (unsigned int)&__image_copy_end) {
/* TODO: Use panic() instead of debug()
*
* For some reason GCC might generate
* fake relocation even for LD/SC of constant
* inderectly. See an example below:
* ----------------------->8--------------------
* static int setup_mon_len(void)
* {
* gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
* return 0;
* }
* ----------------------->8--------------------
*
* And that's what we get in the binary:
* ----------------------->8--------------------
* 10005cb4 <setup_mon_len>:
* 10005cb4: 193c 3f80 0003 2f80 st 0x32f80,[r25,60]
* 10005cb8: R_ARC_RELATIVE *ABS*-0x10000000
* 10005cbc: 7fe0 j_s.d [blink]
* 10005cbe: 700c mov_s r0,0
* ----------------------->8--------------------
*/
debug("Relocation target %08x points outside of image\n",
val);
if (val >= (unsigned int)&__image_copy_start && val <=
(unsigned int)&__image_copy_end) {
val += gd->reloc_off;
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__ivt_end)
val = (val << 16) | (val >> 16);
#endif
memcpy(offset_ptr_ram, &val, sizeof(int));
}
val += gd->reloc_off;
if (do_swap)
val = (val << 16) | (val >> 16);
memcpy(offset_ptr_ram, &val, sizeof(int));
}
last_offset = offset_ptr_rom;
} while (++re_src < re_end);
return 0;

View File

@@ -1,22 +1,19 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <command.h>
#include <common.h>
__weak void reset_cpu(ulong addr)
{
/* Stop debug session here */
__builtin_arc_brk();
}
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
printf("Resetting the board...\n");
reset_cpu(0);
printf("Put your restart handler here\n");
#ifdef DEBUG
/* Stop debug session here */
__asm__("brk");
#endif
return 0;
}

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
@@ -23,14 +24,6 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_IC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_IC_IVIC]
; As per ARC HS databook (see chapter 5.3.3.2)
; it is required to add 3 NOPs after each write to IC_IVIC.
nop
nop
nop
1:
; Disable/enable D-cache according to configuration
lr r5, [ARC_BCR_DC_BUILD]
@@ -44,10 +37,6 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_DC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_DC_IVDC]
1:
#ifdef CONFIG_ISA_ARCV2
; Disable System-Level Cache (SLC)
@@ -75,20 +64,9 @@ ENTRY(_start)
/* Initialize reserved area - note: r0 already contains address */
bl board_init_f_init_reserve
#ifdef CONFIG_DEBUG_UART
/* Earliest point to set up early debug uart */
bl debug_uart_init
#endif
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
bl board_init_f
/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
/* Make sure we don't lose GD overwritten by zero new GD */
mov %r0, %r25
mov %r1, 0
bl board_init_r
j board_init_f
ENDPROC(_start)
/*

141
arch/arc/lib/strchr-700.S Normal file
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@@ -0,0 +1,141 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* ARC700 has a relatively long pipeline and branch prediction, so we want
* to avoid branches that are hard to predict. On the other hand, the
* presence of the norm instruction makes it easier to operate on whole
* words branch-free.
*/
.global strchr
.align 4
strchr:
extb_s %r1, %r1
asl %r5, %r1, 8
bmsk %r2, %r0, 1
or %r5, %r5, %r1
mov_s %r3, 0x01010101
breq.d %r2, %r0, .Laligned
asl %r4, %r5, 16
sub_s %r0, %r0, %r2
asl %r7, %r2, 3
ld_s %r2, [%r0]
#ifdef __LITTLE_ENDIAN__
asl %r7, %r3, %r7
#else /* __BIG_ENDIAN__ */
lsr %r7, %r3, %r7
#endif /* _ENDIAN__ */
or %r5, %r5, %r4
ror %r4, %r3
sub %r12, %r2, %r7
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0_ua
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r7
bic %r12, %r12, %r6
#ifdef __LITTLE_ENDIAN__
and %r7, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r7, 0, .Loop
/* Likewise this one */
b .Lfound_char
#else /* __BIG_ENDIAN__ */
and %r12, %r12, %r4
/* For speed, we want this branch to be unaligned. */
breq %r12, 0, .Loop
lsr_s %r12, %r12, 7
bic %r2, %r7, %r6
b.d .Lfound_char_b
and_s %r2, %r2, %r12
#endif /* _ENDIAN__ */
/* We require this code address to be unaligned for speed... */
.Laligned:
ld_s %r2, [%r0]
or %r5, %r5, %r4
ror %r4, %r3
/* ... so that this code address is aligned, for itself and ... */
.Loop:
sub %r12, %r2, %r3
bic_s %r12, %r12, %r2
and %r12, %r12, %r4
brne.d %r12, 0, .Lfound0
xor %r6, %r2, %r5
ld.a %r2, [%r0, 4]
sub %r12, %r6, %r3
bic %r12, %r12, %r6
and %r7, %r12, %r4
breq %r7, 0, .Loop
/*
*... so that this branch is unaligned.
* Found searched-for character.
* r0 has already advanced to next word.
*/
#ifdef __LITTLE_ENDIAN__
/*
* We only need the information about the first matching byte
* (i.e. the least significant matching byte) to be exact,
* hence there is no problem with carry effects.
*/
.Lfound_char:
sub %r3, %r7, 1
bic %r3, %r3, %r7
norm %r2, %r3
sub_s %r0, %r0, 1
asr_s %r2, %r2, 3
j.d [%blink]
sub_s %r0, %r0, %r2
.balign 4
.Lfound0_ua:
mov %r3, %r7
.Lfound0:
sub %r3, %r6, %r3
bic %r3, %r3, %r6
and %r2, %r3, %r4
or_s %r12, %r12, %r2
sub_s %r3, %r12, 1
bic_s %r3, %r3, %r12
norm %r3, %r3
add_s %r0, %r0, 3
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
sub_s %r0, %r0, %r12
j_s.d [%blink]
mov.pl %r0, 0
#else /* __BIG_ENDIAN__ */
.Lfound_char:
lsr %r7, %r7, 7
bic %r2, %r7, %r6
.Lfound_char_b:
norm %r2, %r2
sub_s %r0, %r0, 4
asr_s %r2, %r2, 3
j.d [%blink]
add_s %r0, %r0, %r2
.Lfound0_ua:
mov_s %r3, %r7
.Lfound0:
asl_s %r2, %r2, 7
or %r7, %r6, %r4
bic_s %r12, %r12, %r2
sub %r2, %r7, %r3
or %r2, %r2, %r6
bic %r12, %r2, %r12
bic.f %r3, %r4, %r12
norm %r3, %r3
add.pl %r3, %r3, 1
asr_s %r12, %r3, 3
asl.f 0, %r2, %r3
add_s %r0, %r0, %r12
j_s.d [%blink]
mov.mi %r0, 0
#endif /* _ENDIAN__ */

97
arch/arc/lib/strcmp.S Normal file
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@@ -0,0 +1,97 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* This is optimized primarily for the ARC700.
* It would be possible to speed up the loops by one cycle / word
* respective one cycle / byte by forcing double source 1 alignment, unrolling
* by a factor of two, and speculatively loading the second word / byte of
* source 1; however, that would increase the overhead for loop setup / finish,
* and strcmp might often terminate early.
*/
.global strcmp
.align 4
strcmp:
or %r2, %r0, %r1
bmsk_s %r2, %r2, 1
brne %r2, 0, .Lcharloop
mov_s %r12, 0x01010101
ror %r5, %r12
.Lwordloop:
ld.ab %r2, [%r0, 4]
ld.ab %r3, [%r1, 4]
nop_s
sub %r4, %r2, %r12
bic %r4, %r4, %r2
and %r4, %r4, %r5
brne %r4, 0, .Lfound0
breq %r2 ,%r3, .Lwordloop
#ifdef __LITTLE_ENDIAN__
xor %r0, %r2, %r3 /* mask for difference */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
#endif /* _ENDIAN__ */
cmp_s %r2, %r3
mov_s %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
.balign 4
#ifdef __LITTLE_ENDIAN__
.Lfound0:
xor %r0, %r2, %r3 /* mask for difference */
or %r0, %r0, %r4 /* or in zero indicator */
sub_s %r1, %r0, 1
bic_s %r0, %r0, %r1 /* mask for least significant difference bit */
sub %r1, %r5, %r0
xor %r0, %r5, %r1 /* mask for least significant difference byte */
and_s %r2, %r2, %r0
and_s %r3, %r3, %r0
sub.f %r0, %r2, %r3
mov.hi %r0, 1
j_s.d [%blink]
bset.lo %r0, %r0, 31
#else /* __BIG_ENDIAN__ */
/*
* The zero-detection above can mis-detect 0x01 bytes as zeroes
* because of carry-propagateion from a lower significant zero byte.
* We can compensate for this by checking that bit0 is zero.
* This compensation is not necessary in the step where we
* get a low estimate for r2, because in any affected bytes
* we already have 0x00 or 0x01, which will remain unchanged
* when bit 7 is cleared.
*/
.balign 4
.Lfound0:
lsr %r0, %r4, 8
lsr_s %r1, %r2
bic_s %r2, %r2, %r0 /* get low estimate for r2 and get ... */
bic_s %r0, %r0, %r1 /* <this is the adjusted mask for zeros> */
or_s %r3, %r3, %r0 /* ... high estimate r3 so that r2 > r3 will */
cmp_s %r3, %r2 /* ... be independent of trailing garbage */
or_s %r2, %r2, %r0 /* likewise for r3 > r2 */
bic_s %r3, %r3, %r0
rlc %r0, 0 /* r0 := r2 > r3 ? 1 : 0 */
cmp_s %r2, %r3
j_s.d [%blink]
bset.lo %r0, %r0, 31
#endif /* _ENDIAN__ */
.balign 4
.Lcharloop:
ldb.ab %r2,[%r0,1]
ldb.ab %r3,[%r1,1]
nop_s
breq %r2, 0, .Lcmpend
breq %r2, %r3, .Lcharloop
.Lcmpend:
j_s.d [%blink]
sub %r0, %r2, %r3

67
arch/arc/lib/strcpy-700.S Normal file
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@@ -0,0 +1,67 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* If dst and src are 4 byte aligned, copy 8 bytes at a time.
* If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
* it 8 byte aligned. Thus, we can do a little read-ahead, without
* dereferencing a cache line that we should not touch.
* Note that short and long instructions have been scheduled to avoid
* branch stalls.
* The beq_s to r3z could be made unaligned & long to avoid a stall
* there, but it is not likely to be taken often, and it would also be likely
* to cost an unaligned mispredict at the next call.
*/
.global strcpy
.align 4
strcpy:
or %r2, %r0, %r1
bmsk_s %r2, %r2, 1
brne.d %r2, 0, charloop
mov_s %r10, %r0
ld_s %r3, [%r1, 0]
mov %r8, 0x01010101
bbit0.d %r1, 2, loop_start
ror %r12, %r8
sub %r2, %r3, %r8
bic_s %r2, %r2, %r3
tst_s %r2,%r12
bne r3z
mov_s %r4,%r3
.balign 4
loop:
ld.a %r3, [%r1, 4]
st.ab %r4, [%r10, 4]
loop_start:
ld.a %r4, [%r1, 4]
sub %r2, %r3, %r8
bic_s %r2, %r2, %r3
tst_s %r2, %r12
bne_s r3z
st.ab %r3, [%r10, 4]
sub %r2, %r4, %r8
bic %r2, %r2, %r4
tst %r2, %r12
beq loop
mov_s %r3, %r4
#ifdef __LITTLE_ENDIAN__
r3z: bmsk.f %r1, %r3, 7
lsr_s %r3, %r3, 8
#else /* __BIG_ENDIAN__ */
r3z: lsr.f %r1, %r3, 24
asl_s %r3, %r3, 8
#endif /* _ENDIAN__ */
bne.d r3z
stb.ab %r1, [%r10, 1]
j_s [%blink]
.balign 4
charloop:
ldb.ab %r3, [%r1, 1]
brne.d %r3, 0, charloop
stb.ab %r3, [%r10, 1]
j [%blink]

80
arch/arc/lib/strlen.S Normal file
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@@ -0,0 +1,80 @@
/*
* Copyright (C) 2004, 2007-2010, 2011-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.global strlen
.align 4
strlen:
or %r3, %r0, 7
ld %r2, [%r3, -7]
ld.a %r6, [%r3, -3]
mov %r4, 0x01010101
/* uses long immediate */
#ifdef __LITTLE_ENDIAN__
asl_s %r1, %r0, 3
btst_s %r0, 2
asl %r7, %r4, %r1
ror %r5, %r4
sub %r1, %r2, %r7
bic_s %r1, %r1, %r2
mov.eq %r7, %r4
sub %r12, %r6, %r7
bic %r12, %r12, %r6
or.eq %r12, %r12, %r1
and %r12, %r12, %r5
brne %r12, 0, .Learly_end
#else /* __BIG_ENDIAN__ */
ror %r5, %r4
btst_s %r0, 2
mov_s %r1, 31
sub3 %r7, %r1, %r0
sub %r1, %r2, %r4
bic_s %r1, %r1, %r2
bmsk %r1, %r1, %r7
sub %r12, %r6, %r4
bic %r12, %r12, %r6
bmsk.ne %r12, %r12, %r7
or.eq %r12, %r12, %r1
and %r12, %r12, %r5
brne %r12, 0, .Learly_end
#endif /* _ENDIAN__ */
.Loop:
ld_s %r2, [%r3, 4]
ld.a %r6, [%r3, 8]
/* stall for load result */
sub %r1, %r2, %r4
bic_s %r1, %r1, %r2
sub %r12, %r6, %r4
bic %r12, %r12, %r6
or %r12, %r12, %r1
and %r12, %r12, %r5
breq %r12, 0, .Loop
.Lend:
and.f %r1, %r1, %r5
sub.ne %r3, %r3, 4
mov.eq %r1, %r12
#ifdef __LITTLE_ENDIAN__
sub_s %r2, %r1, 1
bic_s %r2, %r2, %r1
norm %r1, %r2
sub_s %r0, %r0, 3
lsr_s %r1, %r1, 3
sub %r0, %r3, %r0
j_s.d [%blink]
sub %r0, %r0, %r1
#else /* __BIG_ENDIAN__ */
lsr_s %r1, %r1, 7
mov.eq %r2, %r6
bic_s %r1, %r1, %r2
norm %r1, %r1
sub %r0, %r3, %r0
lsr_s %r1, %r1, 3
j_s.d [%blink]
add %r0, %r0, %r1
#endif /* _ENDIAN */
.Learly_end:
b.d .Lend
sub_s.ne %r1, %r1, %r1

24
arch/arc/lib/timer.c Normal file
View File

@@ -0,0 +1,24 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arcregs.h>
#define NH_MODE (1 << 1) /* Disable timer if CPU is halted */
int timer_init(void)
{
write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
/* Set max value for counter/timer */
write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
/* Set initial count value and restart counter/timer */
write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
return 0;
}
unsigned long timer_read_counter(void)
{
return read_aux_reg(ARC_AUX_TIMER0_CNT);
}

File diff suppressed because it is too large Load Diff

View File

@@ -1,7 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
CONFIG_CPU_V7A=
CONFIG_CPU_V7=
CONFIG_CPU_ARM720T=y
endif
@@ -14,10 +16,8 @@ arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7, -march=armv5))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
arch-$(CONFIG_ARM64) =-march=armv8-a
# On Tegra systems we must build SPL for the armv4 core on the device
@@ -40,8 +40,7 @@ tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =
tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_CPU_V7) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
@@ -51,7 +50,6 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_DAVINCI) += davinci
@@ -65,7 +63,6 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu
# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
machine-$(CONFIG_ORION5X) += orion5x
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx
machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
@@ -73,11 +70,9 @@ machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_RMOBILE) += rmobile
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
machine-$(CONFIG_STM32) += stm32
machine-$(CONFIG_ARCH_STM32MP) += stm32mp
machine-$(CONFIG_TEGRA) += tegra
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
@@ -98,12 +93,12 @@ libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 mx8m))
libs-y += arch/arm/mach-imx/
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx31 mx35))
libs-y += arch/arm/imx-common/
endif
else
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs mx8m vf610))
libs-y += arch/arm/mach-imx/
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx31 mx35 mxs vf610))
libs-y += arch/arm/imx-common/
endif
endif

View File

@@ -1,19 +1,18 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
ifndef CONFIG_STANDALONE_LOAD_ADDR
ifneq ($(CONFIG_ARCH_OMAP2PLUS),)
ifneq ($(CONFIG_OMAP_COMMON),)
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections
CFLAGS_EFI := -fpic -fshort-wchar
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
-fno-common -ffixed-r9
@@ -21,20 +20,15 @@ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# LLVM support
LLVM_RELFLAGS := $(call cc-option,-mllvm,) \
$(call cc-option,-mno-movt,)
LLVMS_RELFLAGS := $(call cc-option,-mllvm,) \
$(call cc-option,-target arm-none-eabi,) \
$(call cc-option,-arm-use-movt=0,)
PLATFORM_RELFLAGS += $(LLVM_RELFLAGS)
PLATFORM_CPPFLAGS += -D__ARM__
ifdef CONFIG_ARM64
PLATFORM_ELFFLAGS += -B aarch64 -O elf64-littleaarch64
else
PLATFORM_ELFFLAGS += -B arm -O elf32-littlearm
endif
# Choose between ARM/Thumb instruction sets
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
AFLAGS_IMPLICIT_IT := $(call as-option,-Wa$(comma)-mimplicit-it=always)
PF_CPPFLAGS_ARM := $(AFLAGS_IMPLICIT_IT) \
$(call cc-option, -mthumb -mthumb-interwork,\
@@ -47,8 +41,9 @@ PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
endif
# Only test once
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
archprepare: checkthumb checkgcc6
ifneq ($(CONFIG_SPL_BUILD),y)
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
archprepare: checkthumb
checkthumb:
@if test "$(call cc-name)" = "gcc" -a \
@@ -58,17 +53,8 @@ checkthumb:
echo '*** Your board is configured for THUMB mode.'; \
false; \
fi
else
archprepare: checkgcc6
endif
checkgcc6:
@if test "$(call cc-name)" = "gcc" -a \
"$(call cc-version)" -lt "0600"; then \
echo '*** Your GCC is older than 6.0 and is not supported'; \
false; \
fi
endif
# Try if EABI is supported, else fall back to old API,
# i. e. for example:
@@ -110,7 +96,7 @@ LDFLAGS_u-boot += -pie
#
# http://sourceware.org/bugzilla/show_bug.cgi?id=12532
#
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
ifeq ($(GAS_BUG_12532),)
export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
then echo y; else echo n; fi)
@@ -132,20 +118,15 @@ endif
# limit ourselves to the sections we want in the .bin.
ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-j .u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j .binman_sym_table
OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
else
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
-j .binman_sym_table
-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn
endif
# if a dtb section exists we always have to include it
# there are only two cases where it is generated
# 1) OF_EMBEDED is turned on
# 2) unit tests include device tree blobs
ifdef CONFIG_OF_EMBED
OBJCOPYFLAGS += -j .dtb.init.rodata
endif
ifdef CONFIG_EFI_LOADER
OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
@@ -163,11 +144,4 @@ else
ALL-y += u-boot.imx
endif
endif
ifneq ($(CONFIG_VF610),)
ALL-y += u-boot.vyb
endif
endif
EFI_LDS := elf_arm_efi.lds
EFI_CRT0 := crt0_arm_efi.o
EFI_RELOC := reloc_arm_efi.o

View File

@@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# SPDX-License-Identifier: GPL-2.0+
#
obj- += dummy.o

View File

@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y = cpu.o

View File

@@ -1,4 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2004 Texas Insturments
*
@@ -8,6 +7,8 @@
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*

View File

@@ -1,7 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o

View File

@@ -1,9 +1,14 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o
obj-y += relocate.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif

View File

@@ -1,9 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
*
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
*
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>

View File

@@ -1,8 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* relocate - i.MX31-specific vector relocation
*
* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>

View File

@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -22,6 +23,8 @@
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
DECLARE_GLOBAL_DATA_PTR;
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
int timer_init(void)
{

View File

@@ -1,11 +1,16 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o
obj-y += relocate.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif

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