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14 Commits

Author SHA1 Message Date
Tom Rini
30b77f6aa1 CI: Sage: Drop rpi_arm64 lwIP variants
With commit 17ceb774a1 ("rpi_arm64: Enable MBEDTLS/LWIP/WGET and
WGET_HTTPS"), we can drop the tests for switching from the legacy stack
to lwIP.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-29 11:03:25 -06:00
Tom Rini
2f87266d56 Merge tag 'rpi-2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.07-rc4:

- mmc: bcmstb: Fix non-removable check in bcm2712 init
- mmc: bcm2835_sdhci: Parse generic MMC device tree properties
- rpi_arm64: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS
- video: arm: rpi: Add brcm,bcm2712-hdmi0 compatible
2026-05-29 08:32:13 -06:00
Jan Čermák
8de24e226d mmc: bcmstb: Fix non-removable check in bcm2712 init
sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether
to force card-detect for a non-removable eMMC, or to route the CD signal
for a removable SD card. At the time this function runs from
sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that
field is only populated later by the MMC uclass, after the driver's
probe returns. mmc_of_parse() has already filled plat->cfg.host_caps
from the device tree by this point, so check that field instead.

Without the fix, every BCM2712 SDHCI instance takes the else branch and
writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including
the non-removable eMMC on boards such as CM5 on Home Assistant Yellow.
The SDIO_CFG block lies outside the SDHCI core's reset scope, so this
value persists across SDHCI_RESET_ALL into the next stage. On the
BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs
its first set_power(MMC_POWER_UP) write racily prevents the SDHCI
POWER_ON bit from latching (see [1] for the whole backstory) - the
voltage bits stick but POWER_ON drops - which wedges the first CMD0 the
full 10 s software timeout. On Home Assistant Yellow this manifested as
a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot
was the previous stage. Booting directly from the Pi firmware (no U-Boot
in between) left SD_PIN_SEL at its default and did not exhibit the race.

Reading plat->cfg.host_caps lets init_2712 see the "non-removable"
property and take the correct branch, leaving SD_PIN_SEL untouched for
the eMMC.

[1] https://github.com/home-assistant/operating-system/pull/3700#issuecomment-4430229511

Fixes: 10127cdbab ("mmc: bcmstb: Add support for bcm2712 SD controller")
Signed-off-by: Jan Čermák <sairon@sairon.cz>
Reviewed-by: Ivan T. Ivanov <iivanov@suse.de>
2026-05-28 20:55:57 +01:00
Tom Rini
987907ae4b Merge tag 'u-boot-stm32-20260526' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/30256

- Add support dynamic A/B bank bootup for STM32MP15
- Increase SYS_MALLOC_F_LEN for stm32mp15_defconfig to fix boot with optee-4.10.0
- Enable Arm SMC watchdog for STM32MP1
- Update part number for TM32MP251/3 SoC's family
2026-05-26 08:22:05 -06:00
Patrice Chotard
0c035ff60c stm32mp2: update part number for STM32MP251/3
update part number for STM32MP251/3 for last cut revision.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-05-26 13:46:30 +02:00
Yann Gautier
d6ddbbb000 ARM: dts: stm32: enable SMC watchdog for STM32MP15 SCMI config
For this configuration, the watchdog (iwdg1) is secured and managed by
OP-TEE. Add an watchdog node with arm,smc-wdt compatible, and disable
iwdg2 node which is then no more used.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Yann Gautier
a3a09d28d5 configs: stm32mp13: activate watchdog
No watchdog was enabled for STM32MP13 platform. Add the required flags to
support it. As done for STM32MP15 (in SCMI config) and STM32MP2x, we use
the Arm SMC watchdog. The required nodes were already present in Linux
imported DT files (stm32mp13.dtsi & stm32mp135f-dk.dts).
To enable this SMC watchdog on other platforms based on STM32MP13, check
that both the following flags are enabled in the dedicated config file:
CONFIG_WDT=y
CONFIG_WDT_ARM_SMC=y
And that there is a node in Linux board DT that enables the feature, as
it is done in stm32mp135f-dk.dts:
&arm_wdt {
	timeout-sec = <32>;
	status = "okay";
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Lionel Debieve
5b2e264a77 configs: stm32mp15: enable WDT_ARM_SMC driver
Enable the arm watchdog over SMC driver. This allows using a secure
watchdog, based on IWDG1 peripheral and managed by OP-TEE.
The driver will be probed if a watchdog node with "arm,smc-wdt"
compatible is enabled.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Patrice Chotard
70456905ec configs: stm32mp15: Increase SYS_MALLOC_F_LEN
Using stm32mp15_defconfig with stm32mp157c-dk2-scmi.dtsi device tree
with optee-4.10.0, we got:

U-Boot 2026.07-rc2-00052-g215496fec59b (May 18 2026 - 15:05:34 +0200)

CPU: STM32MP157CAC Rev.B
Model: STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board
Board: stm32mp1 in trusted mode (st,stm32mp157c-dk2-scmi)
alloc space exhausted ptr 80060 limit 80000
optee optee: PTA_BSEC invoke failed TEE err: 0, err:fffffff4
alloc space exhausted ptr 80040 limit 80000
alloc space exhausted ptr 80020 limit 80000
DRAM:  alloc space exhausted ptr 80040 limit 80000
RAM init failed: -12
initcall_run_f(): initcall dram_init() failed

CONFIG_SYS_MALLOC_F_LEN need to be increased to fix this issue

Reported-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-05-26 13:46:30 +02:00
Dario Binacchi
4369c6a050 board: st: factorize STM32MP FWU multi-bank support
Factorize FWU multi-bank support code common to STM32MP1 and
STM32MP2 platforms into a dedicated shared source file.

No functional change intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Dario Binacchi
560d8f3270 board: st: stm32mp15: support dynamic A/B bank bootup
Following commit 4300f9f4c5 ("board: st: stm32mp25: support dynamic
A/B bank bootup"), this patch enables automatic detection of the active
A/B bank on STM32MP15 platforms by retrieving partition GUIDs from FWU
metadata.

This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.

To enable A/B bank bootup on STM32MP15 boards, add the following Kconfig
options to the  stm32mp15[_basic]_defconfig:

 CONFIG_FWU_MULTI_BANK_UPDATE=y
 CONFIG_FWU_MDATA=y
 CONFIG_FWU_NUM_BANKS=2
 CONFIG_FWU_NUM_IMAGES_PER_BANK=3
 CONFIG_CMD_FWU_METADATA=y
 CONFIG_FWU_MDATA_V2=y

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Liel Harel
29c7796a71 mmc: bcm2835_sdhci: Parse generic MMC device tree properties
The bcm2835 SDHCI driver sets up the MMC host configuration via
sdhci_setup_cfg(), but does not parse generic MMC device tree
properties.

As a result, properties such as bus-width are ignored. On Raspberry Pi
Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot
initialized the device as 4-bit.

Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC
properties are folded into the host configuration before the MMC core
selects the bus width.

Before this change, mmc info reported:

    Bus Speed: 52000000
    Bus Width: 4-bit

After this change, mmc info reports:

    Bus Speed: 52000000
    Bus Width: 8-bit

Tested on Raspberry Pi Compute Module 4 with onboard eMMC.

Signed-off-by: Liel Harel <liel.harel@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> # on the CM4 as well
2026-05-26 12:11:50 +01:00
Peter Robinson
17ceb774a1 rpi_arm64: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS
Enable LWIP and HTTPS on the Raspberry Pi arm64 platform to be able to
use it in the boot process.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2026-05-26 12:11:50 +01:00
Peter Robinson
812aca5791 video: arm: rpi: Add brcm,bcm2712-hdmi0 compatible
The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5.
There appears to be no change that impacts early boot output
on the display controller so add the RPi5 compatible string.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2026-05-26 12:11:50 +01:00
14 changed files with 112 additions and 110 deletions

View File

@@ -153,20 +153,13 @@ Raspberry Pi 4 (rpi_arm64):
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
TEST_PY_TEST_SPEC: "not test_efi_helloworld_net_http"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_4_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64, lwIP)" ]
needs: [ "Raspberry Pi 4 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
@@ -197,20 +190,13 @@ Raspberry Pi 3 (rpi_arm64):
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
TEST_PY_TEST_SPEC: "not test_efi_helloworld_net_http"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_3_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64, lwIP)" ]
needs: [ "Raspberry Pi 3 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"

View File

@@ -21,6 +21,13 @@
pinctrl1 = &pinctrl_z;
};
arm_wdt: watchdog {
compatible = "arm,smc-wdt";
arm,smc-id = <0xbc000000>;
timeout-sec = <32>;
status = "okay";
};
binman: binman {
multiple-images;
};
@@ -103,7 +110,7 @@
};
&iwdg2 {
bootph-all;
status = "disabled";
};
/* pre-reloc probe = reserve video frame buffer in video_reserve() */

View File

@@ -61,20 +61,20 @@
/* ID for STM32MP25x = Device Part Number (RPN) (bit31:0) */
#define CPU_STM32MP257Cxx 0x00002000
#define CPU_STM32MP255Cxx 0x00082000
#define CPU_STM32MP253Cxx 0x000B2004
#define CPU_STM32MP251Cxx 0x000B3065
#define CPU_STM32MP253Cxx 0x000B300C
#define CPU_STM32MP251Cxx 0x000B306D
#define CPU_STM32MP257Axx 0x40002E00
#define CPU_STM32MP255Axx 0x40082E00
#define CPU_STM32MP253Axx 0x400B2E04
#define CPU_STM32MP251Axx 0x400B3E65
#define CPU_STM32MP253Axx 0x400B3E0C
#define CPU_STM32MP251Axx 0x400B3E6D
#define CPU_STM32MP257Fxx 0x80002000
#define CPU_STM32MP255Fxx 0x80082000
#define CPU_STM32MP253Fxx 0x800B2004
#define CPU_STM32MP251Fxx 0x800B3065
#define CPU_STM32MP253Fxx 0x800B300C
#define CPU_STM32MP251Fxx 0x800B306D
#define CPU_STM32MP257Dxx 0xC0002E00
#define CPU_STM32MP255Dxx 0xC0082E00
#define CPU_STM32MP253Dxx 0xC00B2E04
#define CPU_STM32MP251Dxx 0xC00B3E65
#define CPU_STM32MP253Dxx 0xC00B3E0C
#define CPU_STM32MP251Dxx 0xC00B3E6D
/* return CPU_STMP32MP...Xxx constants */
u32 get_cpu_type(void);

View File

@@ -9,6 +9,7 @@ obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o
ifeq ($(CONFIG_ARCH_STM32MP),y)
obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o
obj-$(CONFIG_$(PHASE_)DFU_VIRT) += stm32mp_dfu_virt.o
obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += stm32mp_fwu.o
endif
obj-$(CONFIG_TYPEC_STUSB160X) += stusb160x.o

View File

@@ -0,0 +1,55 @@
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2026 Amarula Solutions, Dario Binacchi <dario.binacchi@amarulasolutions.com>
*/
#include <fwu.h>
#include <part_efi.h>
#include <asm/io.h>
/**
* fwu_plat_get_bootidx() - Get the value of the boot index
* @boot_idx: Boot index value
*
* Get the value of the bank(partition) from which the platform
* has booted. This value is passed to U-Boot from the earlier
* stage bootloader which loads and boots all the relevant
* firmware images
*
*/
void fwu_plat_get_bootidx(uint *boot_idx)
{
*boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
}
int fwu_platform_hook(struct udevice *dev, struct fwu_data *data)
{
uint boot_idx;
efi_guid_t boot_uuid, root_uuid;
const efi_guid_t boot_type_guid = PARTITION_XBOOTLDR;
const efi_guid_t root_type_guid =
PARTITION_LINUX_FILE_SYSTEM_DATA_GUID;
char uuidbuf[UUID_STR_LEN + 1];
int retb, retr;
fwu_plat_get_bootidx(&boot_idx);
retb = fwu_mdata_get_image_guid(&boot_uuid, &boot_type_guid, boot_idx);
retr = fwu_mdata_get_image_guid(&root_uuid, &root_type_guid, boot_idx);
if (!retb && !retr) {
uuid_bin_to_str(boot_uuid.b, uuidbuf, UUID_STR_FORMAT_GUID);
env_set("boot_partuuid", uuidbuf);
uuid_bin_to_str(root_uuid.b, uuidbuf, UUID_STR_FORMAT_GUID);
env_set("root_partuuid", uuidbuf);
} else if (!retb && retr) {
log_warning("%s: found boot GUID but missing root GUID (%d)\n",
__func__, retr);
} else if (!retr && retb) {
log_warning("%s: found root GUID but missing boot GUID (%d)\n",
__func__, retb);
}
return 0;
}

View File

@@ -837,24 +837,3 @@ static void board_copro_image_process(ulong fw_image, size_t fw_size)
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
#include <fwu.h>
/**
* fwu_plat_get_bootidx() - Get the value of the boot index
* @boot_idx: Boot index value
*
* Get the value of the bank(partition) from which the platform
* has booted. This value is passed to U-Boot from the earlier
* stage bootloader which loads and boots all the relevant
* firmware images
*
*/
void fwu_plat_get_bootidx(uint *boot_idx)
{
*boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
}
#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */

View File

@@ -188,56 +188,3 @@ void board_quiesce_devices(void)
{
led_boot_off();
}
#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
#include <fwu.h>
/**
* fwu_plat_get_bootidx() - Get the value of the boot index
* @boot_idx: Boot index value
*
* Get the value of the bank(partition) from which the platform
* has booted. This value is passed to U-Boot from the earlier
* stage bootloader which loads and boots all the relevant
* firmware images
*
*/
void fwu_plat_get_bootidx(uint *boot_idx)
{
*boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
}
int fwu_platform_hook(struct udevice *dev, struct fwu_data *data)
{
uint boot_idx;
efi_guid_t boot_uuid, root_uuid;
const efi_guid_t boot_type_guid = PARTITION_XBOOTLDR;
const efi_guid_t root_type_guid =
PARTITION_LINUX_FILE_SYSTEM_DATA_GUID;
char uuidbuf[UUID_STR_LEN + 1];
int retb, retr;
fwu_plat_get_bootidx(&boot_idx);
retb = fwu_mdata_get_image_guid(&boot_uuid, &boot_type_guid, boot_idx);
retr = fwu_mdata_get_image_guid(&root_uuid, &root_type_guid, boot_idx);
if (!retb && !retr) {
uuid_bin_to_str(boot_uuid.b, uuidbuf, UUID_STR_FORMAT_GUID);
env_set("boot_partuuid", uuidbuf);
uuid_bin_to_str(root_uuid.b, uuidbuf, UUID_STR_FORMAT_GUID);
env_set("root_partuuid", uuidbuf);
} else if (!retb && retr) {
log_warning("%s: found boot GUID but missing root GUID (%d)\n",
__func__, retr);
} else if (!retr && retb) {
log_warning("%s: found root GUID but missing boot GUID (%d)\n",
__func__, retb);
}
return 0;
}
#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */

View File

@@ -11,6 +11,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_PCI=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_HTTP_BOOT=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
@@ -26,11 +27,13 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_SNTP=y
CONFIG_WGET_HTTPS=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_FS_UUID=y
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_TFTP_TSIZE=y
CONFIG_NET_LWIP=y
CONFIG_DM_DMA=y
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
@@ -64,4 +67,5 @@ CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_BCM2835=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_PHYS_TO_BUS=y
CONFIG_MBEDTLS_LIB=y
# CONFIG_HEXDUMP is not set

View File

@@ -113,4 +113,6 @@ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
CONFIG_USB_GADGET_VENDOR_NUM=0x0483
CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_WDT=y
CONFIG_WDT_ARM_SMC=y
CONFIG_ERRNO_STR=y

View File

@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SYS_MALLOC_F_LEN=0x90000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_ENV_OFFSET=0x900000
CONFIG_ENV_SECT_SIZE=0x40000
@@ -169,5 +169,6 @@ CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
CONFIG_WDT_ARM_SMC=y
# CONFIG_BINMAN_FDT is not set
CONFIG_ERRNO_STR=y

View File

@@ -219,6 +219,10 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
host->mmc = &plat->mmc;
host->mmc->dev = dev;
ret = mmc_of_parse(dev, &plat->cfg);
if (ret)
return ret;
ret = sdhci_setup_cfg(&plat->cfg, host, emmc_freq, MIN_FREQ);
if (ret) {
debug("%s: Failed to setup SDHCI (err=%d)\n", __func__, ret);

View File

@@ -56,7 +56,7 @@ struct sdhci_brcmstb_dev_priv {
static int sdhci_brcmstb_init_2712(struct udevice *dev)
{
struct sdhci_host *host = dev_get_priv(dev);
struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
void *cfg_regs;
u32 reg;
@@ -65,8 +65,8 @@ static int sdhci_brcmstb_init_2712(struct udevice *dev)
if (!cfg_regs)
return -ENOENT;
if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) ||
(host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) {
if ((plat->cfg.host_caps & MMC_CAP_NONREMOVABLE) ||
(plat->cfg.host_caps & MMC_CAP_NEEDS_POLL)) {
/* Force presence */
reg = readl(cfg_regs + SDIO_CFG_CTRL);
reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV;

View File

@@ -66,6 +66,7 @@ static int bcm2835_video_probe(struct udevice *dev)
static const struct udevice_id bcm2835_video_ids[] = {
{ .compatible = "brcm,bcm2835-hdmi" },
{ .compatible = "brcm,bcm2711-hdmi0" },
{ .compatible = "brcm,bcm2712-hdmi0" },
{ .compatible = "brcm,bcm2708-fb" },
#if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB)
{ .compatible = "simple-framebuffer" },

View File

@@ -8,7 +8,22 @@
#ifndef __CONFIG_STM32MP15_ST_COMMON_H__
#define __CONFIG_STM32MP15_ST_COMMON_H__
#ifdef CONFIG_FWU_MULTI_BANK_UPDATE
#define SCAN_DEV_FOR_BOOT_PARTS \
"setenv devplist; " \
"env exists boot_partuuid && " \
"part number ${devtype} ${devnum} ${boot_partuuid} devplist; " \
"env exists devplist || " \
"part list ${devtype} ${devnum} -bootable devplist; "
#define ST_STM32MP15_FWU_ENV \
"altbootcmd=${bootcmd}\0"
#else
#define ST_STM32MP15_FWU_ENV
#endif
#define STM32MP_BOARD_EXTRA_ENV \
ST_STM32MP15_FWU_ENV \
"usb_pgood_delay=2000\0" \
"console=ttySTM0\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \