With commit 17ceb774a1 ("rpi_arm64: Enable MBEDTLS/LWIP/WGET and
WGET_HTTPS"), we can drop the tests for switching from the legacy stack
to lwIP.
Signed-off-by: Tom Rini <trini@konsulko.com>
sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether
to force card-detect for a non-removable eMMC, or to route the CD signal
for a removable SD card. At the time this function runs from
sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that
field is only populated later by the MMC uclass, after the driver's
probe returns. mmc_of_parse() has already filled plat->cfg.host_caps
from the device tree by this point, so check that field instead.
Without the fix, every BCM2712 SDHCI instance takes the else branch and
writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including
the non-removable eMMC on boards such as CM5 on Home Assistant Yellow.
The SDIO_CFG block lies outside the SDHCI core's reset scope, so this
value persists across SDHCI_RESET_ALL into the next stage. On the
BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs
its first set_power(MMC_POWER_UP) write racily prevents the SDHCI
POWER_ON bit from latching (see [1] for the whole backstory) - the
voltage bits stick but POWER_ON drops - which wedges the first CMD0 the
full 10 s software timeout. On Home Assistant Yellow this manifested as
a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot
was the previous stage. Booting directly from the Pi firmware (no U-Boot
in between) left SD_PIN_SEL at its default and did not exhibit the race.
Reading plat->cfg.host_caps lets init_2712 see the "non-removable"
property and take the correct branch, leaving SD_PIN_SEL untouched for
the eMMC.
[1] https://github.com/home-assistant/operating-system/pull/3700#issuecomment-4430229511
Fixes: 10127cdbab ("mmc: bcmstb: Add support for bcm2712 SD controller")
Signed-off-by: Jan Čermák <sairon@sairon.cz>
Reviewed-by: Ivan T. Ivanov <iivanov@suse.de>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/30256
- Add support dynamic A/B bank bootup for STM32MP15
- Increase SYS_MALLOC_F_LEN for stm32mp15_defconfig to fix boot with optee-4.10.0
- Enable Arm SMC watchdog for STM32MP1
- Update part number for TM32MP251/3 SoC's family
For this configuration, the watchdog (iwdg1) is secured and managed by
OP-TEE. Add an watchdog node with arm,smc-wdt compatible, and disable
iwdg2 node which is then no more used.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
No watchdog was enabled for STM32MP13 platform. Add the required flags to
support it. As done for STM32MP15 (in SCMI config) and STM32MP2x, we use
the Arm SMC watchdog. The required nodes were already present in Linux
imported DT files (stm32mp13.dtsi & stm32mp135f-dk.dts).
To enable this SMC watchdog on other platforms based on STM32MP13, check
that both the following flags are enabled in the dedicated config file:
CONFIG_WDT=y
CONFIG_WDT_ARM_SMC=y
And that there is a node in Linux board DT that enables the feature, as
it is done in stm32mp135f-dk.dts:
&arm_wdt {
timeout-sec = <32>;
status = "okay";
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable the arm watchdog over SMC driver. This allows using a secure
watchdog, based on IWDG1 peripheral and managed by OP-TEE.
The driver will be probed if a watchdog node with "arm,smc-wdt"
compatible is enabled.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Factorize FWU multi-bank support code common to STM32MP1 and
STM32MP2 platforms into a dedicated shared source file.
No functional change intended.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Following commit 4300f9f4c5 ("board: st: stm32mp25: support dynamic
A/B bank bootup"), this patch enables automatic detection of the active
A/B bank on STM32MP15 platforms by retrieving partition GUIDs from FWU
metadata.
This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.
To enable A/B bank bootup on STM32MP15 boards, add the following Kconfig
options to the stm32mp15[_basic]_defconfig:
CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_FWU_MDATA=y
CONFIG_FWU_NUM_BANKS=2
CONFIG_FWU_NUM_IMAGES_PER_BANK=3
CONFIG_CMD_FWU_METADATA=y
CONFIG_FWU_MDATA_V2=y
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The bcm2835 SDHCI driver sets up the MMC host configuration via
sdhci_setup_cfg(), but does not parse generic MMC device tree
properties.
As a result, properties such as bus-width are ignored. On Raspberry Pi
Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot
initialized the device as 4-bit.
Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC
properties are folded into the host configuration before the MMC core
selects the bus width.
Before this change, mmc info reported:
Bus Speed: 52000000
Bus Width: 4-bit
After this change, mmc info reports:
Bus Speed: 52000000
Bus Width: 8-bit
Tested on Raspberry Pi Compute Module 4 with onboard eMMC.
Signed-off-by: Liel Harel <liel.harel@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> # on the CM4 as well
Enable LWIP and HTTPS on the Raspberry Pi arm64 platform to be able to
use it in the boot process.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5.
There appears to be no change that impacts early boot output
on the display controller so add the RPi5 compatible string.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
A file like rm-cfg.yaml accidentally left in the source tree root
shadows the board-specific copy. binman builds the wrong YAML, the
resulting rm-cfg.bin may match a different SoC, and we end up with
the following error:
k3_system_controller sysctrler: k3_sysctrler_start:
Boot Notification response failed. ret = -110
Move the board directory ahead of the srctree root so that the
most-specific match wins.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Our official domain is now u-boot-project.org, so update all in-tree
references to use the correct domain.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently the sequence to enable caches for the A53/A72 core on K3
devices looks as follows:
1. Map entire DDR banks
2. Setup page tables (done by mmu_setup)
3. Enable MMU
4. Unmap reserved-memory regions
5. Enable caches
However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.
A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:
1. Map entire DDR banks
2. Setup page tables
3. Unmap reserved-memory regions
4. Enable MMU
5. Enable caches
Fixes: f1c694b8fd ("mach-k3: map all banks using mem_map_from_dram_banks")
Reported-by: Suhaas Joshi <s-joshi@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently mmu_setup for ARMv8 performs two functions, first it sets up
the page tables based the memory map provided by the board and then it
enables the MMU.
However for some platforms runtime fixes to the generated page tables
are required before the MMU can be enabled, such as K3 family of SoCs.
Therefore this patch moves the enablement of the MMU out of mmu_setup
and to a standalone mmu_enable function to give more granular control to
the platforms.
Note that no functional changes are intended from this patch.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
babae80169 removed bootm_size from ti_common.env to allow K3 boards
to process images larger than 256MB, but preserved it in
ti_armv7_keystone2.env for ARMv7 Keystone2 boards. AM57xx (also ARMv7)
was not covered by that preservation.
Without bootm_size, env_get_bootm_size() falls back to gd->ram_size,
causing initrd_high to be computed as the top of all RAM. On ARM32
boards with more RAM than the DMA zone (e.g. AM572x IDK with 2GiB),
this places the ramdisk above 0xafe00000 (HighMem), which is not
directly accessible by the kernel after MMU setup, causing a silent
crash.
With bootm_size=0x10000000, initrd_high is constrained to
0x80000000 + 0x10000000 = 0x90000000, keeping the ramdisk in the
DMA zone and allowing the kernel to access it correctly.
Fixes: babae80169 ("include: env: ti_common: remove bootm_size")
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Moteen Shah <m-shah@ti.com>
When fpga load is called with a misaligned buffer address, the
versal_align_dma_buffer() function shifts the pointer forward to the
next aligned boundary and uses memcpy() to copy the data. Since the
destination is ahead of the source and the regions overlap, memcpy()
produces undefined behavior; in practice U-Boot's generic memcpy()
copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk
throughout the buffer.
Replace memcpy() with memmove() which correctly handles overlapping
regions by copying backwards when the destination is ahead of the
source.
Fixes: 26e054c943 ("arm64: versal: fpga: Add PL bit stream load support")
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260507113359.3665220-1-pranav.vinaytilak@amd.com
This is Renesas R-Car X5H support for U-Boot on its RSIP Cortex-M33 core
in addition to already support U-Boot on Cortex-A720AE core. The first
two patches also switch X5H to OF_UPSTREAM.
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.
The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.
The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add target to generate u-boot-elf.shdr for R-Car Gen5 Cortex-M33
RSIP core. The resulting .shdr SREC file can be written into the
HF at offset 0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33
RSIP core. The resulting .scif SREC file can be loaded using the
SCIF loader to start U-Boot on the RSIP core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Point every direct user of SCMI clock protocol at CPG node instead
of SCMI clock protocol node. Point every direct user of SCMI reset
and power domain protocol at a matching newly introduced MDLC node
instead of the SCMI reset and power domain protocol nodes.
This allows the CPG and MDLC remap drivers bound to CPG node and MDLC
nodes to remap between DT clock, reset and power domain IDs and SCMI
clock, reset and power domain IDs. This makes U-Boot on R-Car X5H
compatible with multiple SCP firmware versions. Currently supported
versions of SCP firmware are 4.28, 4.31 and 4.32.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H
SoC by default. The power domain and reset driver is used to remap
DT power domain and reset IDs to SCMI power domain and reset IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver,
which serves as a remap driver between DT power domain and reset IDs
and SCMI power domain and reset IDs in case U-Boot runs on Cortex-A,
and as a direct hardware access driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI power domain and
reset IDs in different versions of the SCP firmware, which makes
this remapping necessary. The SCMI base protocol version is updated
for each new SCP firmware version, it is therefore possible to
determine which SCP firmware version is running on the platform
from the base protocol and then determine which remapping table to
use for DT power domain and reset ID to SCMI power domain and reset
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT power domain and reset ID to SCMI power domain and reset ID
remap and call mechanism is simple. Unlike SCMI clock protocol driver,
the SCMI reset and power domain protocol drivers register only a single
device. This driver looks up that single device, obtains its reset or
power domain ops, sets up struct reset_ctl or struct power_domain with
remapped SCMI ID, and invokes operations directly on the device.
In case of RSIP, all power domains are already enabled by BootROM or
early SoC initialization code, the driver therefore only acts as a
stub for the power domain part. The reset part operates as a direct
hardware access reset driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default.
The clock driver is used to remap DT clock IDs to SCMI clock IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a
remap driver between DT clock IDs and SCMI clock IDs in case U-Boot
runs on the Cortex-A, and as a trivial clock driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI clock IDs in different
versions of the SCP firmware, which makes this remapping necessary.
The SCMI base protocol version is updated for each new SCP firmware
version, it is therefore possible to determine which SCP firmware
version is running on the platform from the base protocol and then
determine which remapping table to use for DT clock ID to SCMI clock
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT clock ID to SCMI clock ID remap and call mechanism is a bit
complex. The driver looks up the SCMI clock protocol device on probe
and stores pointer to it in private data. On each clock request which
has to be remapped, the device sequence ID of this SCMI clock protocol
device is incremented by the remapped SCMI clock ID + 1 and used to
look up matching clock device by sequence number. If the device is
found, it is converted to clock, which can be used in regular clock
operations. This look up has to be done because the SCMI clock driver
registers a subdevice for each clock, and this look up is the only way
to find the correct SCMI clock subdevice. Since the SCMI device and
the clock subdevices are registered in the same function, we can depend
on the device sequence numbers to be monotonically incrementing, with
SCMI clock protocol device being sequence number N, the first SCMI
clock subdevice being sequence number N+1 and so on.
In case of RSIP, all clocks are already enabled by BootROM or early
SoC initialization code, the driver therefore only acts as a stub.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The R-Car Gen5 R8A78000 X5H uses HSCIF as default serial console
interface. Select CFG_HSCIF to make debug UART code also configure
serial console interface as HSCIF instead of SCIF in case the
CONFIG_DEBUG_UART would be enabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691
instead of hardcoding the number in DT. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base
for U-Boot control DT. Retain currently present parts of the DT which
are not yet part of upstream Linux kernel DT in -u-boot.dtsi files
until they get replaced by upstream equivalents. Add renesas/ prefix
to the DEFAULT_DEVICE_TREE as part of the switch.
Unused i2c2..i2c8 nodes have been removed, and will become available
once upstream Linux kernel DT adds those nodes.
The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM,
which are reserved for firmware and other use.
Note that all DT parts in -u-boot.dtsi are not considered stable DT
bindings and may change before they land in Linux kernel and become
stable DT ABI.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
- Add myself as Maintainer of NVMe
- fix command ID wraparound handling
- apple: Check memalign return value
- Staticize and constify driver ops
- Fix PRP list pointer arithmetic for chained transfers
Endpoints should not be disabled on bus reset inside UDC driver,
otherwise a race condition will happen between gadget driver. Gadget
driver will free the requests and disable endpoints in disconnect ops.
Also remove outdated comment about it in usba_ep_disable().
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Fixes: 59310d1ecb ("usb: gadget: introduce 'enabled' flag in struct usb_ep")
Link: https://patch.msgid.link/20260515-udc_ep-v2-1-cd335b4e62e4@hifiphile.com
[mkorpershoek: removed empty newline between Fixes: and sob]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
The PRP setup code advances prp_pool using u64 pointer
arithmetic:
prp_pool += page_size;
This increments the pointer by page_size * sizeof(u64)
bytes instead of page_size bytes, resulting in invalid
PRP list addresses when multiple PRP list pages are
required.
The issue becomes visible for large transfers, typically
above 2 MiB when MDTS > 9.
Fix it by using byte-wise pointer arithmetic when
advancing to the next PRP list page.
Signed-off-by: Prashant Kamble <prashant.kamble223@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260518022535.17197-1-prashant.kamble223@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Pull request efi-2026-07-rc3
CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/30152
Documentation:
* For reset command describe when the -edl option is available and fix a
typo.
UEFI:
* If efi_allocate_pages() is with EFI_ALLOCATE_ADDRESS fails, return
EFI_NOT_FOUND.
* Fix HII keyboard layout pointer computation and extend HII keyboard
layout tests.
Others:
* In reset command online help show -edl option only when enabled.
UBI updates for 2026.07-rc3
Fix from Peter:
- fs: ubifs: remove dead code
Fixes: d5888d509c ("fs: ubifs: fix bugs involving symlinks in ubifs_findfile")
(hs. correct the commit ID)
This code is dead because it appears after an infinite loop; remove it.
Fixes: d5888d509c ("fs: ubifs: fix bugs involving symlinks in ubifs_findfile")
Signed-off-by: Peter Collingbourne <peter@pcc.me.uk>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
hs: corrected the commit ID
The HII database test for keyboard layouts register two package lists with
two keyboard layouts each, but the test verifies only the GUID of the first
keyboard layout.
This does not catch the bugs happening with the keyboard layouts after the
first one in a package.
Verify all the keyboard layout GUIDs in the unit test to prevent this.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
The EFI_HII_KEYBOARD_LAYOUT field `layout_length' is expressed in bytes,
but we add it to the `layout' pointer with (scaled) pointer arithmetic.
When adding an HII keyboard package with multiple keyboard layouts, this
results in only the first layout being added correctly; fix it.
Fixes: 8d3b77e36e ("efi: hii: add keyboard layout package support")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: AKASHI Takahiro <akashi.tkhro@gmail.com>
The option is only available when CONFIG_SYSRESET_QCOM_PSCI is enabled,
so let's make that explicit in the boot cmd documentation.
Due to the implementation in drivers/sysreset/sysreset-uclass.c
do_reset() function, all options to the reset command are passed to all
sysreset drivers' sysreset_ops.request_arg callback (including -w) which
is only available when CONFIG_SYSRESET_CMD_RESET_ARGS=y. -w, however,
works also without this option.
Fixes: ef06c5d76f ("cmd: boot: Add '-edl' option to reset command documentation")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
"Do warm WARM" doesn't mean anything, I'm assuming the intent was to say
"Do WARM reset" so reword.
Fixes: 34e452dd02 ("doc: usage: Group all shell command docs into cmd/ sub-directory")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
edl is implemented in the sysreset_ops.request_arg callback of the
qcom-psci sysreset driver. That callback is only called from
sysreset_request_arg() which is compiled only when
CONFIG_SYSRESET_CMD_RESET_ARGS=y.
Therefore, only show the edl option if that symbol is enabled.
It is in a separate if block because any option but -w will only be
handled when CONFIG_SYSRESET_CMD_RESET_ARGS=y as seen with the
implementation in do_reset() in drivers/sysreset/sysreset-uclass.c.
Fixes: ef06c5d76f ("cmd: boot: Add '-edl' option to reset command documentation")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS overlap
When efi_allocate_pages() is called with EFI_ALLOCATE_ADDRESS, UEFI
expects EFI_NOT_FOUND if the requested address range is already
allocated or unavailable. U-Boot currently returns
EFI_OUT_OF_RESOURCES when efi_update_memory_map() detects an overlap
after a successful lmb_alloc_mem(), which does not match
EFI_ALLOCATE_ADDRESS semantics.
Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS requests that fail due
to an overlapping EFI memory descriptor, while keeping
EFI_OUT_OF_RESOURCES for other allocation types.
The UEFI specification [1] specifies that
EFI_BOOT_SERVICES.AllocatePages must return EFI_NOT_FOUND when the
requested address range is unavailable or already allocated;
EFI_OUT_OF_RESOURCES applies to non‑address‑specific allocation
failures.
[1] https://uefi.org/specs/UEFI/2.10_A/07_Services_Boot_Services.html
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
The UEFI specification does not clearly specify the behavior.
But let's follow the EDK II precedent here.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Booting image generated with
make an7581_evb_defconfig
will results in
U-Boot 2026.04-00924-gfb815bd8793b (Apr 27 2026 - 15:08:30 +0300)
CPU: Airoha AN7581
DRAM: 512 MiB
Core: 35 devices, 19 uclasses, devicetree: separate
MMC: mmc@1fa0e000: 0
Loading Environment from MMC... *** Warning - No block device, using default environment
Loading Environment from MTD... *** Warning - get_mtd_device_nm() failed, using default environment
BUG at drivers/mtd/mtdcore.c:898/__put_mtd_device()!
BUG!
resetting ...
This happens because no any mtd partition defined in dts/mtdparts.
Disabling of ENV_IS_IN_MTD fixes an issue.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
This enables U-Boot loading from any 4K aligned address.
It makes U-Boot debugging a bit simpler.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
The smbios_get_val_si() function may get called for a sysinfo
property for which there is no mapping to a devicetree property.
Avoid a NULL pointer dereference in this case by skipping the
read of the mapped property from the device tree.
Fixes: 83b28b55d7 ("smbios: add support for dynamic generation of Type 9 system slot tables")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Use select_i2c_ch_pca9547() only when CONFIG_FSL_USE_PCA9547_MUX
is set, but several call in board/nxp/lx2160a/lx2160a.c invoke
it unconditionally,
or using unrelated Kconfigs (CONFIG_EMC2305, CONFIG_VID).
Compilation with LX2160A target that omits the mux therefore fails with
error: implicit declaration of function 'select_i2c_ch_pca9547'
Add a static inline stub with -EOPNOTSUPP for the
!CONFIG_FSL_USE_PCA9547_MUX case so all cases compile cleanly.
Adapted from the convention used by include/scmi_nxp_protocols.h for
SCMI subprotocol stubs.
There is no functional change for NXP boards: all eight upstream
LX2160A defconfigs (lx2160ardb / lx2160aqds / lx2162aqds and their
secure / stmm / verified_boot variants) already set
CONFIG_FSL_USE_PCA9547_MUX=y, so the real declaration wins.
The purpose is to support new boards that do not use the PCA9547.
Signed-off-by: Vincent Jardin <vjardin@free.fr>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The shared LX2160A board file calls helpers that only exist when
their subsystem is enabled. Gate them on the matching CONFIG_*:
- pci_init() under CONFIG_PCI.
- fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET.
- qixis_*() and the QIXIS branch of checkboard() under
CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path
still prints "Board: <name>".
- EVENT_SPY_SIMPLE on init_func_vid moves inside the
CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling
symbol when LTC3882 off).
#if / #ifdef, not IS_ENABLED(), because the helpers are themselves
conditionally compiled.
While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC
1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC,
not CONFIG_MMC.
No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or
LX2162AQDS, but mainly build clean up in order to support
other NXP lx2160a boards without those HW dependencies.
Signed-off-by: Vincent Jardin <vjardin@free.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The RDB doesn't support NAND boot at all, remove the config for it.
Apparently, it was introduced by commit dd84058d24 ("kconfig: add
board Kconfig and defconfig files") which ran some scripts. Maybe that
script was wrong or the source boards.cfg was wrong. In any case, there
is no NAND flash on the RDB.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Nowadays, u-boot can build the pbl image itself. Refer to that image in
the documentation. Also fix some typos.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The RCW was just supporting SPI boot. Add a second one for the SDcard
boot. While at it, use the same naming scheme as for the other NXP
boards.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Switch to the upstream device tree, which already includes the UART
nodes we need for the DM.
We also need to increase malloc area before relocation otherwise you'll
get the following error and the board panics:
DRAM: Initializing....using SPD
alloc space exhausted ptr 414 limit 400
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Remove any empty function which is just called by the board code. There
is no need to define this function at all.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
board_eth_init() is dead code since commit e524f3a449 ("net: Remove
eth_legacy.c"). Remove it.
I'm not sure, all the shenanigans are covered by the new DM-version. The
MDIO mux and iomux controls probably are. The fman configuration
probably isn't. OTOH, nobody cared for years and the called
fm_info_set_phy_address() was also removed years ago.
This also removes fdt_fixup_board_enet() for the ls1043a and ls1046a
because it relies on the local variable "mdio_mux" being initialized by
the board_eth_init().
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit cc2bf624eb ("net: fm: Remove non-DM_ETH code") removed the call
to board_ft_fman_fixup_port(). Thus remove the dead code in the board
files.
I'm not sure, all that DT shenanigans are covered by the new DM-version
of the fman code, but it seems no one complained for the past 4 years.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since commit 7917c2e356 ("spi: fsl_espi: fix din offset") MTD is
basically broken because any read transaction will get wrong data. While
the commit in question will fix simple transfers (where both
SPI_XFER_BEGIN and SPI_XFER_END is set), it will break the most common
case, where opcode and address is send first and then data comes as a
second transfer.
This basically reverts commit 7917c2e356 ("spi: fsl_espi: fix din
offset") and make the fix particular for this simple case. Instead of
providing two buffers for reading and writing, just malloc one which is
used for both. This will work because the data is first written on the
SPI bus and then it will be read (and overwite the written data) into
the same buffer.
Suggested-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
Fixes: 7917c2e356 ("spi: fsl_espi: fix din offset")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For non-secure boot environments pamu_init() isn't called but the CAAM
will still call sec_config_pamu_table() -> config_pamu() which then uses
an uninitialized ppaact variable. In fact, that variable is initialized
with 0, so the config_pamu() will happily assume the structure is there
and will operate on that memory. Call pamu_init() in the non-secure boot
case, too.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 6c171f7a18 ("common: board: make initcalls static") broke the
call to cpu_init_r. That is because PPC is already defined to 1, see:
powerpc-linux-gnu-gcc -dM -E - < /dev/null
This will conflict with the CONFIG_IS_ENABLED(PPC). Change it to
IS_ENABLED(CONFIG_PPC).
Fixes: 6c171f7a18 ("common: board: make initcalls static")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The combined boot firmware firmware-aquila-am69-gp.bin depends on
tiboot3-am69-gp-aquila.bin, which in turn requires the GP variant
of the TI system firmware blob (ti-fs-firmware-j784s4-gp.bin).
Fix the combined boot firmware image build by adding the missing binman
nodes.
Fixes: f62d4535cf ("arm: dts: k3-am69-aquila: add combined boot firmware image")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The last users of this legacy i2c stack have been removed or converted
to a modern part of the stack instead. Remove this code and references
to it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Set the ops structure as static. The structure is not accessible
from outside of this driver.
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The virtio_blk_do_single_req function returns ulong, which normally is
the processed size, but in an error case can be the actual error. Use
the special IS_ERR_VALUE macro to test for error.
Addresses-Coverity-ID: CID 645833 (DEADCODE) & CID 645834 (NO_EFFECT)
Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
The main difference is that RAM starts at 0x100_0000_0000 like on t600x
and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
rearranged.
U-boot's existing drivers are compatible with the hardware and M3 device
trees will carry "apple,t8103-*" compatible strings. Only
apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
changes the Linux driver has to deal with.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
Janne Grunau <j@jannau.net> says:
The Linux device trees for Apple silicon devices cover now most of the
hardware as u-boot's internal device trees for M1 devices. Linux has in
addition device trees M2 and M1 and M2 Pro/Max/Ultra devices which were
never added in u-boot.
The most common use case for u-boot on Apple silicon devices does not
use DTBs from u-boot but passes runtime modified device trees from an
earlier boot loader (m1n1).
This change regresses support for the SPI on M1 and M1 Pro/Max notebooks
as SPI keyboard support is not in upstream Linux. This regression is in
my opinion acceptable due to the limited use of u-boot's DTBs for these
targets.
Link: https://lore.kernel.org/r/20260507-apple-dt-upstream-v2-0-35181f2b0509@jannau.net
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
Remove outdated apple,pinctrl.yaml. The dts/upstream contains the
current version of this binding.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
These SoCs are supported since 2022/2023 but were never added to the
documentation. The devices very similar to the equivalent M1 devices.
The biggest difference is that the M2 and M2 Pro/Max based laptops no
longer use SPI for the keyboard.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
The main use case for u-boot on Apple silicon based devices is to
provide an EFI based bootloader for operating systems. This uses a
generic u-boot image with DTBs passed from an earlier boot loader
(m1n1). Use the generic board name "mac" for this purpose.
Signed-off-by: Janne Grunau <j@jannau.net>
I'm one of the co-maintainers of Apple silicon support in the Linux
kernel and have contributed to u-boot's Apple SoC support.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
The files weren't added to MAINTAINERS but clearly belong to Apple
silicon (M1) support.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
Add nodes to the binman configuration to create single binaries that
combine tiboot3-am69-*-aquila.bin, tispl.bin and u-boot.img into
firmware-aquila-am69-*.bin, with the proper offsets.
These binaries can be used to flash U-Boot via a single binary of three,
as it is done now.
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
The Cadence SD6HC (SDHCI spec v4.20+) controller uses a soft PHY whose
DLL delay characteristics vary with PVT (Process, Voltage, Temperature)
and board-level trace routing.
A static delay value programmed via device tree for SD High Speed mode is
insufficient because the optimal sampling point varies per board, SD card,
and operating conditions. Runtime calibration is required.
While the SD Physical Layer Specification does not mandate tuning for
SD HS mode (only for UHS-I SDR50/SDR104), the Cadence SD6HC PHY
requires runtime calibration of its receive data delay line to find a
valid sampling window under constrained clock conditions.
The tuning is triggered from the set_ios_post callback because at that
moment hardware has committed the new bus width, clock frequency, and speed
mode to the controller registers. This ensuring the tuning sequence runs
at the correct SD HS operating conditions.
The tuning is gated by a device tree property "cdns,sd-hs-tuning" so
that only boards requiring runtime calibration opt in. When enabled,
the driver performs a 40-tap DLL sweep using CMD19 to find the largest
consecutive passing window, then programs the midpoint into
PHY_DLL_SLAVE_CTRL_REG.
To enable on a board, add to the MMC node in device tree:
&mmc {
cdns,sd-hs-tuning;
};
Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com>
The following compilation error occurs when environment variable
KBUILD_OUTPUT is not set :
drivers/reset/stm32/stm32-reset-mp21.c:8:10: fatal error: stm32-reset-core.h: No such file or directory
8 | #include <stm32-reset-core.h>
| ^~~~~~~~~~~~~~~~~~~~
As stm32-reset-core.h is located in same directory than stm32-reset-mp21.c,
we should use #include "stm32-reset-core.h".
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Raphaël Gallais-Pou <rgallaispou@gmail.com>
Enable automatic detection of the active A/B bank by retrieving
partition GUIDs from FWU metadata.
This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.
To enable A/B bank bootup on stm32mp25 boards, add the following Kconfig
options to the stm32mp25_defconfig:
CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_FWU_MDATA=y
CONFIG_FWU_NUM_BANKS=2
CONFIG_FWU_NUM_IMAGES_PER_BANK=3
CONFIG_CMD_FWU_METADATA=y
CONFIG_FWU_MDATA_V2=y
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Introduce fwu_mdata_get_image_guid() to retrieve a specific image GUID
from the FWU metadata based on the bank index and image type GUID.
This allows identifying the correct partition in multi-bank (A/B)
scenarios, ensuring the correct image is targeted depending on the
current bank.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Extend the 'part' command unit tests to include partition lookup via
UUID.
This ensures that the 'number', 'start', and 'size' subcommands
consistently handle UUIDs as partition identifiers, maintaining
parity with the name-based lookup functionality.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'part' command currently allows looking up a partition only by its
number or name.
Extend the 'number', 'start', and 'size' subcommands to support looking
up the partition via its UUID. Unlike names, UUIDs guarantee unique
partition identification, avoiding ambiguity.
The logic is updated to check if the provided string is a valid UUID
before falling back to a name-based search. The help strings for these
subcommands are updated accordingly.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add unit tests for the 'part' command, specifically for the 'number',
'start', and 'size' subcommands.
These tests establish a baseline for the current partition lookup
functionality by name. This foundation will be used by subsequent
patches to extend the command, ensuring consistent behavior as new
features are introduced.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The STM32MP13 default environment only handles MMC and serial/USB boot.
When TF-A reports BOOT_FLASH_SPINAND the boot_device variable is set to
'spi-nand' but bootcmd_stm32mp never redirects boot_targets to ubifs0,
so distro_bootcmd falls through to MMC/USB.
This change mirrors the STM32MP15 logic:
- Add a BOOT_TARGET_UBIFS entry to BOOT_TARGET_DEVICES so that
bootcmd_ubifs0 is defined (ubi part UBI; ubifsmount ubi0:boot).
- Add the 'spi-nand' / 'nand' clause to bootcmd_stm32mp so that
boot_targets is set to 'ubifs0' when booting from NAND.
Signed-off-by: Austin Shirley <austin@deadband.dev>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
In parse_config(), devname is dynamically allocated by sscanf().
When sscanf() fails to fill enough fields (rc < 3), devname is freed and
the loop continues to the next line. However, if the next call to sscanf()
fails to match (rc == 0), devname is not written and still holds the stale
freed pointer. The subsequent free(devname) then operates on
already-freed memory.
Fix this by resetting devname to NULL before each sscanf() call, so
that a non-matching call leaves a NULL pointer and the subsequent
free() becomes a harmless no-op.
Reported-by: Coverity Scan
Link: https://lists.denx.de/pipermail/u-boot/2026-April/614161.html
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add the workaround proposed for J784S4 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.
Link: https://www.ti.com/lit/pdf/sprz536
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Add the workaround proposed for J721S2 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.
Link: https://www.ti.com/lit/pdf/sprz530
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Add a helper macro to write and verify a 32-bit value to a memory-mapped
register. This is essential for hardware errata workarounds that require
confirmation that register writes have taken effect before proceeding with
initialization.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
When encountering a symlink pointing to an absolute path, ubifs_findfile
would return the target of the symlink as the result instead of resolving
any following components in the original path. Fix it by following the
same code path that is used for relative paths except that we set the
next inode to the root if we see a leading slash.
The existing code used memcpy and sprintf to copy the symlink target
into a fixed size stack buffer and was therefore vulnerable to buffer
overflows with a sufficiently long symlink target. Fix it by using a
heap buffer for the temporary path during path resolution.
Signed-off-by: Peter Collingbourne <peter@pcc.me.uk>
Fixes: 9d7952e4c6 ("ubifs: Add support for looking up directory and relative symlinks")
The PKCS#11 signing tests in ftest.py call tools.run('softhsm2-util', ...)
directly (and the equivalent for pkcs11-tool and p11-kit), even though
the test setup has already constructed the corresponding Bintool
instances. As Quentin Schulz observed on v1, the bintool wrapper for
these tools is currently used only as an "is this installed?" probe.
Route the eight remaining call sites in ftest.py through
<bintool>.run_cmd(...), which the Bintool base class already provides.
The change is test-side only; no production binman code calls these
tools.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.
Extend the docstring with a short description of what softhsm2-util
does and how binman uses it, so the generated documentation has useful
content.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.
Extend the docstring with a short description of what pkcs11-tool does
and how binman uses it, so the generated documentation has useful
content.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.
Extend the docstring with a short description of what p11-kit does and
how binman uses it, so the generated documentation has useful content.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
When using a worktree '.git' actually is a file and pygit2
init_repository() does not like that. The intention is not to create
a new git repo anyway so use normal constructor instead of
init_repository().
Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When creating the RSDT and the XSDT table they contain no entries.
The table size therefore must equal the header size.
Without this change a NULL deference has been observed in
acpi_find_table() when running `ut dm` on sandbox64_defconfig
executed via `sudo ./u-boot -D`.
Fixes: 94ba15a3f1 ("x86: Move base tables to a writer function")
Fixes: 7e586f6907 ("acpi: Put table-setup code in its own function")
Fixes: ab5efd576c ("x86: acpi: Adjust order in acpi_table.c")
Fixes: 867bcb63e7 ("x86: Generate a valid ACPI table")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update dm_test_acpi_ctx_and_base_tables() in test/dm/acpi.c to expect
sizeof(struct acpi_table_header) for the initial table length (instead
of sizeof(*rsdt) / sizeof(*xsdt)), and to compute the checksum over
header->length bytes rather than the full struct size:
Signed-off-by: Simon Glass <sjg@chromium.org>
The dwc3_free_one_event_buffer() function incorrectly called free()
on event buffer structures allocated with devm_kzalloc(). This
caused heap corruption and a synchronous abort when exiting
fastboot mode via "fastboot continue".
Device-managed memory is automatically freed when the device is
removed, so manual deallocation causes the heap allocator to access
corrupted metadata.
Fixes: 884b10e86a ("usb: dwc3: core: fix memory leaks in event buffer cleanup")
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
The symbol USB_EMUL is how sandbox has access to USB. It's
implementation however enforces a few other requirements. It must have
SCSI enabled, and in turn that means it must have BLK enabled. Finally,
we should not be using SANDBOX itself as a symbol to decide what to
build or not build here, as SANDBOX is selected for COMPILE_TEST builds
as well and so may not have enabled the sandbox specific USB support.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
As exposed by "make randconfig", we have an issue with the dependencies
for RESET_RZG2L_USBPHY_CTRL. As this functionally depends on
REGULATOR_RZG2L_USBPHY, express this dependency directly in Kconfig as
well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The USB_RENESAS_USBHS functionality can only work with DM_USB_GADGET
enabled, so express this dependency in Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
test_fit.py declares a local make_fname closure that is byte-identical
to fit_util.make_fname. Drop the local copy and call the shared helper
at all seven call sites so there is one definition to maintain.
No behavioural change. Both implementations return
os.path.join(ubman.config.build_dir, basename).
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 70101c3217 ("virtio: mmio: Return error codes on probe
failures") returns -ENODEV where it would return 0 before. That path is
apparently hit in qemu and breaks boot device discovery
(virtio_bootdev_hunt() expects only ENOENT). So return -ENOENT in
that path instead.
The remaining two error returns in the function are untouched as I
don't know where they play a role.
Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Kuan-Wei Chiu <visitorckw@gmail.com>
A number of our boards no longer boot with v2026.04, ironically as a
result of the effort to ensure 8-byte alignment of the dtb passed to
the kernel and getting rid of the fdt_high=0xffffffff.
The problem exists when the FIT image does specify a (properly
aligned) load address to use for the fdt. For example, we have
fdt-am335x-boneblack.dtb {
description = "Flattened Device Tree blob";
data = /incbin/(...);
...
load = <0x88000000>;
}
Now, with v2026.04 and depending on just exactly where that data ends
up, in a good case we see
Loading fdt from 0x8a8c6e10 to 0x88000000
Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
Loading Kernel Image to 86008000
WARNING:
The 'fdt_high' environment variable is set to ~0. This is known to cause
boot failures due to placement of DT at non-8-byte-aligned addresses.
This system will likely fail to boot. Unset the 'fdt_high' environment
variable and submit a fix upstream.
Using Device Tree in place at 88000000, end 8801af2f
Working FDT set to 88000000
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
and the board boots (though with that ominous warning). However,
modifying the .its file a little, e.g. just removing the word "blob"
from the description, we end up with
Loading fdt from 0x8a8c6e14 to 0x88000000
Booting using the fdt blob at 0x9df94718
Working FDT set to 9df94718
Loading Kernel Image to 86008000
WARNING:
The 'fdt_high' environment variable is set to ~0. This is known to cause
boot failures due to placement of DT at non-8-byte-aligned addresses.
This system will likely fail to boot. Unset the 'fdt_high' environment
variable and submit a fix upstream.
Failed to reserve memory for fdt at 0x9df94718
FDT creation failed!
resetting ...
Notice how the "Loading fdt from" line still claims to load the fdt to
that 0x88000000 address, but since this "else if" clause looks at the
source address (buf) and comes before the "else if (load != data)"
clause, we end up doing the "allocate another buffer to use as target"
instead of actually copying to 0x88000000, but then the "fdt_high=~0"
logic in boot_relocate_fdt() obviously fails to do an lmb-reservation
of that area, and the boot fails.
When there's no load= property in the fdt node, this should not change
anything. But when there is, it is the alignment of that target which
is relevant, not the alignment of the fdt blob within the FIT
image. With this patch applied, we instead get the expected
Loading fdt from 0x8a8c6e14 to 0x88000000
Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
Loading Kernel Image to 86008000
WARNING:
The 'fdt_high' environment variable is set to ~0. This is known to cause
boot failures due to placement of DT at non-8-byte-aligned addresses.
This system will likely fail to boot. Unset the 'fdt_high' environment
variable and submit a fix upstream.
Using Device Tree in place at 88000000, end 8801af2f
Working FDT set to 88000000
Starting kernel ...
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Fixes: 8fbcc0e0e8 ("boot: Assure FDT is always at 8-byte aligned address")
Reviewed-by: Simon Glass <sjg@chromium.org>
Coverity Scan defects are observed in fdtdec_apply_bloblist_dtos(),
since the live FDT taken from the bloblist is passed to libfdt helpers
which consume header size/offset fields:
- fdt_open_into()
- fdt_pack()
Validate the bloblist FDT with fdt_check_full() before calling
fdt_open_into() and again after applying overlays before calling
fdt_pack(). This makes the libfdt consumers operate on a checked FDT
blob while keeping the existing flow unchanged.
Also normalize libfdt return codes from this path to errno values,
including the overlay callback path through bloblist_apply_blobs().
Fixes: b70cbbfbf9 ("fdtdec: apply DT overlays from bloblist")
Addresses-Coverity-ID: CID 645837: (TAINTED_SCALAR)
Signed-off-by: Raymond Mao <raymond.mao@riscstar.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
The line that produces $(SPL_BIN)-align.bin invokes dd with
conv=block,sync but no cbs= operand. The result of dd conv=block
without cbs= is unspecified. GNU coreutils outputs anyway, but
uutils (default in Ubuntu 26.04 LTS) errors out for files with
newlines, including SPL binaries, producing:
dd: conv=block or conv=ubnblock specified without cbs=N
Either the block operand must be removed, or cbs=N must be added.
conv=block is for converting newline-terminated variable-length
records to fixed-length space-padded ones, which is meaningless
for a binary SPL image. The intent of the rule is 4-byte
alignment, which conv=sync alone provides by padding the final
block to bs= bytes with NULs.
During build, u-boot-spl-align.bin errors silently due to '@'.
Reproduced with uutils dd 0.8.0:
$ dd if=/dev/urandom of=/tmp/in bs=1 count=10000
$ dd if=/tmp/in of=/tmp/out conv=block,sync bs=4
dd: conv=block or conv=unblock specified without cbs=N
$ dd if=/tmp/in of=/tmp/out conv=sync bs=4
[succeeds]
Output is byte-identical to GNU dd's output for binary input.
Signed-off-by: Brad Klingerman <bdklingerman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Pull request net-20260506.
net:
- phy: dp83867: default to 2ns delay if unspecified in device-tree
- nfs: fix buffer overflow in nfs_readlink_reply()
- cpsw: Add cpsw-switch DT binding support
- phy: add common PHY polarity properties support
- phy: adin: add support for the ADIN1200 phy
- macb: support for instances with less features
- phy: mscc: add support for the VSC8572
net-lwip:
- wget: correct diagnostic output
MT7621 doesn't boot on u-boot v2026.04. Fix it by correcting the
u-boot aligned offset.
Fixes: d9e183a04c ("MIPS: Assure end of U-Boot is at 8-byte aligned offset")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
A fixed gigabit link on a non-gigabit controller is only rejected
during PHY init (even though there is no PHY to init), because, on
device-tree parsing, the controller is not probed, and it is still
unknown whether it is gigabit-capable.
This code was only tested on emulator with a full-duplex RGMII
interface, but is expected to work in GMII or half-duplex as well.
Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
Cadence Ethernet MAC has a feature named user_io, which provides
some input and some output signals for arbitrary purpose in the SoC.
From the driver code, I understand that, on Atmel SoC, it is used to
drive the PHY mode.
At least on Cadence IP7014 r1p12, this feature is optional, and I am
working on a SoC that does not instantiate it. The presence of this
feature is advertised in DCFG1, this patch merely disables the access
to the user_io register based on this information.
I did not apply this change to the non-gigabit capable versions of
the IP, as I do not have documentation for them, and a new non-gigabit
instance is unlikely to appear. I prefer avoiding regressions on old
systems.
Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
The MACB uses specific address registers (SA Top and Bottom) to
filter source or destination MAC addresses.
On the Gigabit Ethernet version, SA1B is @0x88.
On the non-GEM version, SA1B is @0x98.
Before this commit, the code was always writing 0x98. By chance,
on GEM, this is the address of SA3B, allowing the driver to work
anyway.
The motivation for this change is to be able to use the driver on
an instance of the GEM with less than 4 SA registers.
Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
It does not exist in my setup (an on-going arm64 SoC), and removing
it does not cause any missing declaration, but some code called when
CONFIG_CLK is missing calls get_macb_pclk_rate, which is only defined
in arch/arm/mach-at91/include/mach/clk.h
Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
Add sandbox DM unit tests for the PHY common properties library and the
corresponding device tree test nodes to arch/sandbox/dts/test.dts.
Also enable CONFIG_PHY_COMMON_PROPS in configs/sandbox_defconfig so
the tests are built and run in the sandbox environment.
The test file covers rx/tx polarity lookups for all relevant cases:
- missing property (defaults to PHY_POL_NORMAL)
- single value without names array (applies to all modes)
- count mismatch between values and names arrays (-EINVAL)
- name found by exact match
- name not found with no "default" fallback (-EINVAL)
- name not found with a "default" entry (uses fallback value)
- unsupported polarity value (-EOPNOTSUPP)
Ported from Linux KUnit test:
linux/drivers/phy/phy-common-props-test.c
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Replace the proprietary airoha,pnswap-rx / airoha,pnswap-tx boolean
device tree properties with the standard rx-polarity and tx-polarity
properties defined in phy-common-props.yaml.
Backward compatibility is maintained by reading the legacy boolean
properties first and passing them as the default_pol argument to
phy_get_rx/tx_polarity(). If the standard properties are absent the
legacy values are used transparently, so existing device trees remain
functional without modification.
Link: https://git.kernel.org/linus/66d8a334b57e64e43810623b3d88f0ce9745270b
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Add a new PHY_COMMON_PROPS library that provides helper functions for
PHY drivers to read standardized polarity properties from the device
tree node:
- phy_get_rx_polarity() / phy_get_tx_polarity()
- phy_get_manual_rx_polarity() / phy_get_manual_tx_polarity()
The dt-bindings/phy/phy.h header with PHY_POL_NORMAL, PHY_POL_INVERT,
and PHY_POL_AUTO constants is provided via dts/upstream/include, which
is already in the build include path.
Ported from Merge tag 'phy-for-7.0':
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Link: https://git.kernel.org/linus/e7556b59ba65179612bce3fa56bb53d1b4fb20db
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Upstream devicetrees use a newer DT binding using cpsw-switch
compatibles. The bindings are a bit different, so two functions are
introduced to capture the differences, cpsw_eth_of_to_plat_switch() and
cpsw_eth_of_to_plat_legacy().
Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
Use driver data to pass the correct gmii_sel function. This way new
compatibles don't need manual compatible matching as is done in
cpsw_phy_sel().
Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
If wget_info->silent is set, we should not print anything.
If wget_info->silent we print the received content size.
Printing the value of the Content-Length header is redundant
For chunked transfer no Content-Length header is sent.
The content length is returned as HTTPC_CONTENT_LEN_INVALID by the LwIP
library. In this case we were incorrectly printing '4 GiB'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
With NET_LWIP wget produces this output with an overlong line
and missing white space:
=> wget $kernel_addr_r http://example.com/
################################################# 4 GiB540 bytes transferred in 2 ms (263.7 KiB/s)
Bytes transferred = 540 (21c hex)
Removing the condition on inserting a line feed yields:
=> wget $kernel_addr_r http://example.com/
################################################# 4 GiB
540 bytes transferred in 2 ms (263.7 KiB/s)
Bytes transferred = 540 (21c hex)
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
nfs_readlink_reply() validates rlen only against the incoming packet
length (inherited from CVE-2019-14195), but not against the destination
buffer nfs_path_buff[2048]. A malicious NFS server can send a valid
READLINK reply where pathlen + rlen exceeds sizeof(nfs_path_buff),
overflowing the BSS buffer into adjacent memory.
The recent fix in fd6e3d3409 addressed the same overflow class in
net/lwip/nfs.c but left the legacy path in net/nfs-common.c unpatched.
Add bounds checks before both memcpy calls in nfs_readlink_reply():
- relative path branch: reject if pathlen + rlen >= sizeof(nfs_path_buff)
- absolute path branch: reject if rlen >= sizeof(nfs_path_buff)
Fixes: cf3a4f1e86 ("net: nfs: Fix CVE-2019-14195")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Alba Vives <sebasjosue84@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
Since Linux commit c360eb0c3ccb ("dt-bindings: net: ethernet-controller:
Add informative text about RGMII delays"), the interpretation of RGMII
delays has changed. Prior to the commit, the RGMII Variant among "rgmii",
"rgmii-id", "rgmii-rxid" and "rgmii-txid" clearly specified whether it is
the MAC or the PHY that "should" add the delay. However, post that commit,
the RGMII Variant only specifies whether or not there is a delay on the
PCB traces between the MAC and the PHY, leaving it open as to who adds the
delay.
Hence, instead of enforcing the existence of the device-tree properties
"ti,rx-internal-delay" and "ti,tx-internal-delay", default to a delay
of 2ns, while continuing to override this delay with the aforementioned
properties, if they exist in the device-tree.
This is in line with the Linux driver implementation updated by commit
6bf78849371d ("net: phy: dp83867: use 2ns delay if not specified in DTB").
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
There are two reasons why the USB stack needs to be
started before handing to bootflow or other boot
sequences:
1. When a USB hub is present on the board, we need to
do the required sequences to make it usable
2. To make USB storage devices 'visible' to bootflow
without further intervention
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This board has been migrated to the upstream / kernel
device tree version (OF_UPSTREAM), so remove the
old 'local' copies that are no longer required.
However, the -u-boot.dtsi append needs to remain,
because the SoC fsl-ls1088a-u-boot.dtsi is required
for some devices (like PCIe controllers and DPAA2 ethernet)
to properly enumerate under U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Two recent additions to the mainline device tree allow us
to switch away from the local U-Boot copy:
* Board/embedded controller (traverse,ten64-controller)
is now in the mainline device tree.
* USB Hub (USB5744) connections were also added to
the mainline device tree but not in U-Boot.
The LS1088A and Ten64 device trees in U-Boot were actually
'synced' to mainline some time ago, so the content
(except for the changes mentioned above) is identical.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ten64 board revs A through C have a Microchip USB5744
hub on the board, which must be configured over I2C
at boot time to become usable.
This function has not been part of the mainline
U-Boot for this board until now, as a mainline driver
and device-tree binding is now available for the USB5744.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
We have added board_fix_fdt to remove elements from U-Boot's
internal FDT related to the USB hub, so CONFIG_OF_BOARD_FIXUP
needs to be enabled to utilize it.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
More recent revisions of the Ten64 board do not have a USB Hub
(USB5744). The references to the USB5744 need to be removed in U-Boot's
internal FDT to avoid the USB5744 setup being invoked on these boards.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The USB Hub (microchip,usb5744) can enter a dis-/reconnect loop
if a driver tries to re-initialise the hub over I2C.
On the Ten64 board, this process only needs to be run once
per system reset cycle, which is carried out by U-Boot.
As there are distributions shipping with the affected
driver by default, the best solution is to remove
the USB hub topology information from the FDT passed
to the operating system, so the OS won't attempt
to re-initialise the USB hub under any circumstance.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Both consumers and sub-arch specific versions of gpio.h
may reference stdint or other non-C90 type definitions.
Ensure the common ones are available by including linux/types.h
before any other headers.
This issue came to light when the usb onboard hub driver
was enabled for ten64_tfa_defconfig:
In file included from ./arch/arm/include/asm/gpio.h:2,
from common/usb_onboard_hub.c:10:
./arch/arm/include/asm/arch/gpio.h:17:9: error: unknown type name 'ulong'
17 | ulong addr;
./arch/arm/include/asm/arch/gpio.h:18:9: error: unknown type name 'ulong'
18 | ulong size;
./arch/arm/include/asm/arch/gpio.h:19:9: error: unknown type name 'uint'
19 | uint ngpios;
(In this instance, the cited errors actually originate from
arch/arm/include/asm/arch-fsl-layerscape/gpio.h, which is included
by the arm top level asm/gpio.h)
Implemented as per suggestion from Quentin Schulz in Link:
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://lore.kernel.org/u-boot/35038a9a-fa5a-4f9f-b34e-17cc80a7824c@cherry.de/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_DM_SPI_FLASH is enabled, sf command will default find
device from DT which requires to use "jedec,spi-nor" compatible
string not obsoleted "spi-flash". So update NXP LS DTS to use
new compatible string
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are lots of DT warning in layerscape DTS files like:
node name for SPI buses should be 'spi' and SPI bus unit address
format error.
Update the spi node name and flash node name to avoid build warning
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable USB nodes in -u-boot.dtsi. After sync dts with kernel, USB
nodes status are set to disabled. So "usb start" does not work on
ls1088ardb and ls1088aqds.
Fixes: 10ff7e6b04 ("arm: dts: fsl-ls1088a: sync usb controller nodes with Linux")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Due to update of fsl-ls1088a.dtsi in previous patch, the esdhc
node is disabled, so u-boot can't to probe any eSDHC controller.
Fixes: fd4f7b0158 ("arm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Disable ethernet controller dpmac nodes in fsl-ls1088a.dtsi. Board
dts is responsible to enable them. Otherwise will meet failure from
ldpaa_eth driver on LS1088AQDS board, because only few dpmac
controllers can be enabled on this board.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
LS1088AQDS u-boot contains multiple DTB files:
fsl-ls1088a-qds-21-x.dtb and fsl-ls1088a-qds-29-x.dtb.
It does not use default device tree fsl-ls1088a-qds.dtb
However, the nodes updated in fsl-ls1088a-qds-u-boot.dtsi are not
included for fsl-ls1088a-qds-21-x.dts and fsl-ls1088a-qds-29-x.dts,
so fail to get any output from serial.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In layerspace's lmb_arch_add_memory implementation, all memory bank
are added to lmb, even some is with zero size. This will cause lmb
treating it as overlap with available memory by lmb_addrs_overlap
and merge with available memory. Finally causing available memory
start address changed to 0.
For example, on LX2160, before zero memory bank added to lmb, there
are two available memory regions:
- region 0, start 0x80000000, size 0x7be00000
- region 1, start 0x2080000000, size 0x700000000
After zero size memory bank added, merge to one region:
- region 0, start 0, size 0x2780000000
This wrong new region causes efi_memory_init issue when allocating bounce
buffer because of conflict address (with uboot reserved) is allocated.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The 'default ... if SYS_L3_SIZE_512KB' statement is written twice, making
the second instance dead code.
Based on the context, I believe the author of the code intended to set a
default value of '1048576' when SYS_L3_SIZE_1024KB is set.
This dead code was detected by kconfirm, a static analysis tool for
Kconfig.
Fixes: b85d75951f ("powerpc: Migrate SYS_L3_SIZE to Kconfig")
Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
msm_sdc_clk_init() uses clock-frequency to get the clock rate for SDC
clocks. However, the DT files seem to use max-frequency for the same.
Since msm_sdc_clk_init() doesn't find clock-frequency in the DT, it sets
201500000 as the clock rate and this results in timeout errors on IPQ
platforms.
Additionally, clock-frequency is not DT bindings compliant. Hence, get
clock rate using DT bindings compliant max-frequency.
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Use CONFIG_$(PHASE_)DM_REGULATOR_PFUZE100 as the build condition for
pfuze100 regulator driver.
Add Kconfig option for SPL_DM_REGULATOR_PFUZE100.
To avoid break current platforms, set the Kconfig default value same
as PMIC_PFUZE100.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Some BUCKs could work in single/dual phase mode, not in independent
mode. In single/dual phase mode, registers of both regulators,
must be identically set. So configure mode and value for both BUCKs.
CONF registers are not touched, leave them as default OTP settings.
PFUZE100/200 SW3A/B, could work in single/dual phase mode, so introduce
a new macro by adding a pointer to the SW3B descriptor.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Some PFUZE regulators can operate in either low or high output voltage mode,
with different minimum voltages and voltage step sizes selected by a hardware
control bit. However, the current PFUZE100 regulator driver assumes low output
voltage mode only, resulting in incorrect voltage calculation and programming
when high voltage mode is enabled.
Extend the regulator descriptor to describe high output voltage mode by adding
a mask to detect the mode and a dedicated voltage description (min_uV and
step size). Update voltage get/set handling to dynamically select the correct
voltage parameters based on the high voltage mode bit.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
regulator-min-microvolt in device tree is not always match the minimal
voltage in the pmic datasheet, direclty using the min value from device
tree as base may cause wrong voltage settings being written.
Directly use the min_uV from datasheet to avoid wrong settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Depending on the phase selection (single or multi), the FPWM bits
configured forces the regulator to operate in PWM mode. In case of
multi-phase selection, the FPWM_MP bits enforce the regulator to also
operate in multi-phase. This fixes correct multi-phase operation.
While at this, correct incorrect macro alignment as well.
Fixes: 065a452ae6 ("power: regulator: tps65941: add regulator support")
Link: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Takuma Fujiwara <t-fujiwara1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Yan WANG <yan.wang@softathome.com> says:
This series improves the reliability and efficiency of binman preload
header generation and test it against an encrypted FIT image signed with
a preload header.
When a preload header references other entries (e.g. an encrypted FIT)
through the collection etype, the referenced entries may be rebuilt
multiple times during binman processing. This becomes problematic when
the referenced entry produces non-deterministic output, such as FIT
encryption using random IVs or timestamps, since rebuilding the entry
changes the data.
This series ensures that referenced entries are built only once and that
preload signing is performed after all data is collected. It also avoids
unnecessary repacking or repeated signing operations by the preload.
The changes include:
* generate preload header placeholders in ObtainContents() and sign
data only once in ProcessContentsUpdate()
* mark referenced entries as build_done in the collection etype to
avoid rebuilding data
* add a functional test for signing an encrypted FIT with a preload
header
Link: https://lore.kernel.org/r/20260417083050.499955-1-yan.wang@softathome.com
Add a test to verify the preload header correctly signs an encrypted
FIT. This test exercises the case where encryption uses random IVs that
would change between mkimage calls.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The collection etype uses phandles in the 'content' property to
reference other entries. Mark each referenced entry with build_done
to avoid rebuilding the same entry data multiple times.
This is important for cases where rebuilding may change the data
content, e.g. due to timestamps or random IVs in encryption.
Refactor GetContentsByPhandle() to return both the entry object and
its data.
Signed-off-by: yan wang <yan.wang@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To optimize preload generation, generate the header and signatures only
after all data has been collected in ProcessContentsUpdate(). This
avoids signing the data multiple times.
Since header_size is known upfront (from __init__), create a placeholder
in `ObtainContents()` to avoid an extra packing pass when
ProcessContentsUpdate() detects a size change.
This reduces unnecessary repacking and signing operations.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_SPL_MMC=n and CONFIG_SPL_DM_SPI=n are each listed twice in the
defconfig. Remove the redundant occurrences so each option appears only
once.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
CONFIG_SPL_MMC=n is listed twice in the defconfig. Remove the redundant
occurrence so each option appears only once.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
CONFIG_SCMI_FIRMWARE=y is listed twice in the defconfig. Remove the
redundant occurrence so each option appears only once.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Use list_for_each_entry_safe and comparisons against the current and
next efi_mem_desc. This reduces the computation required for merging
regions, prevents unnecessary additional iterations of the list, and
requires less temporary values.
Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check for duplicate memory mappings before reporting any incorrect
attributes. Could be that second allocation has the correct type while
the first doesn't. Knowing there is a duplicate in this scenario is
more helpful than just reporting the first mismatch.
Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the allocation flags inline documentation to follow the kernel
object like macro documentation specification.
Use active voice for the short descriptions.
Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The number EFICONFIG_ENTRY_NUM_MAX - 1 must be printable
to field key of struct eficonfig_entry.
Fixes: 1f0583beeb ("eficonfig: set EFICONFIG_ENTRY_NUM_MAX to INT_MAX - 1")
Fixes: 23aa0502a4 ("eficonfig: increase the number of menu entries")
Addresses-Coverity-ID: 583414 - Out-of-bounds write
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When using lwIP, efi_dp_from_http() may fail to initialize ip or mask.
Initialize the variables before the call.
Addresses-Coverity-ID: 645840 - Uninitialized variables (UNINIT)
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The R-Car Gen5 SoCs contains Cortex-M33, Cortex-R52 and Cortex-A720AE
cores. Add U-Boot build options for the Cortex-M33 core.
Since the Cortex-M33 core is a 32bit core, select V8M and ARM64 for
RCAR64 accordingly. Select TMU timer on the 32bit core, where it is
used instead of the ARMv8 timer. Adjust TMU timer base address to match
the address map of the Cortex-M33 core. Disable unused OF_BOARD_SETUP
as well as unavailable POSITION_INDEPENDENT configuration options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Add support of Renesas R-Car Gen5 window watchdog timer. Timeout
configuration is derived from CONFIG_WATCHDOG_TIMEOUT_MSECS, which
is more accurate than the 1-second granularity 'timeout' passed to
.start callback.
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add R-Car Gen5 RSIP controller remoteproc driver capable of starting
the SCP, Cortex-R52 and Cortex-A720 cores in Renesas R-Car R8A78000
X5H SoC. The SCP core is started by releasing the core from reset,
the Cortex-R52 and Cortex-A720 are started using the SCP SCMI call.
The entry point for SCP core is fixed to its STCM, entry points for
Cortex-R52 and Cortex-A720 are set during rproc load.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Both R-Car V3M Eagle and V3MSK U-Boot DT extras contain AVB pinmux
assignment, which is a leftover from before the same pinmux was part
of upstream DTs. Remove the duplicate AVB pinmux assignment in favor
of the upstream DT content. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Remove duplicate properties which are present both in arch/arm/dts/
and upstream dts/upstream/src/arm64/renesas/ in favor of those in
upstream DTs. Since those are duplicates, this causes no functional
change. Remove unused num-cs and bank-width DT properties.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If fat_sect_size = 0 and nr_sect = 0, the value of ret is never initialized.
A random return value is returned.
Initialize ret to 0.
Addresses-Coverity-ID: - 645495 Uninitialized scalar variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a value of 256K hardcoded as u-boot image size. This
produce bank tty as soon as the image size grows over the limit.
Fix it by using value preset by CONFIG_SYS_MONITOR_LEN.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Some NXP imx hardware ip module as the esdhc controller are exactly the
same in some new ColdFire cpus. For the specific case, mcf5441x needs to
use the existing fsl_esdhc_imx.c driver for the esdhc device.
Create a stub to be able to use NXP "imx" serie drivers as the
fsl_esdhc_imx in the ColdFire architecture.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Allow cpu families as mcf5441x (m68k) to use the fsl_esdhc_imx driver
since the hardware ip module is the same.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes in v2:
- moved before menuconfig changes
Add mmc support for the mcf5441x family. There is only one esdhc
controller for this cpu family.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
probe_ram_size_by_alias() detects whether a probe address still aliases
a lower address by writing through one address and reading through the
other.
On i.MX95 this occasionally reported a false non-alias when the alias
read happened immediately after the write.
A memory barrier alone, mb(), was tested but did not make the failure go
away. This suggests that ordering the CPU accesses is not sufficient for
this probe, likely because the issue is in the path to the memory
controller rather than in the core itself.
Read the written address back before checking the alias address. This
appears to force the write to become observable at the probe address
before using the alias read to decide whether the tested address range
exists.
If the readback does not match the written pattern, restore the saved
value and continue with the next check. This keeps the probe robust for
addresses that do not reliably retain the test pattern.
Fixes: 0977448b45 ("common: memsize: add RAM size probe based on alias detection")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rec_from_blob() function returns a pointer, but the code was
comparing it using "rec <= 0" which is incorrect for pointer types.
Pointers should be compared using "== NULL" or "!= NULL".
Addresses-Coverity-ID: CID 645841: Incorrect expression (BAD_COMPARE)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
The fdt_pack() function can return an error code, but its return value
was not being checked. Add proper error handling to propagate any
failure.
Also fix typo in comment: "Shink" -> "Shrink".
Addresses-Coverity-ID: CID 645839: Error handling issues (CHECKED_RETURN)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
With correct POSIX handling, unquoted empty variables can turn the
expression like
test -n ${fdtfile}
into
test -n
The POSIX handling for single argument `test` evaluates it as true,
so the fallback initialization will be skipped unexpectedly.
Quoting variable expansions in `test` expressions will always result in
correct behavior for empty and non-empty values.
This change was triggered by
commit 8b0619579b ("cmd: test: fix handling of single-argument form of test")
The aim is to have a less fragile codebase that is not dependent on a
quirk of the shell implementation.
Use quoted variable expansions in `test` expressions throughout.
Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Apologies for the delay, but please pull those sunxi changes into
v2026.07. Nothing earth shattering, mostly minor improvements like
better SPL power LED support, and fixes to some H616 DRAM setup. Also
some more forward looking enhancement for the SPI code. I also pulled in
Richard's raw NAND flash improvements for the H6/H616 SoC, though this
lacks proper peer testing due to the lack of mainline support for any
board actually employing those chips.
No need to reset user data length registers in SPL.
In SPL, only the first user data length register is used, so we don't
need to reset all of them.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
In Allwinner SoCs, user data can be added in OOB before each ECC data.
For older SoCs like A10, the user data size was the size of a register
(4 bytes) and was mandatory before each ECC step.
So, the A10 OOB Layout is:
[4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes]
[4bytes USER_DATA_STEP1] [ECC_STEP1 bytes]
...
NB: the BBM is stored at the beginning of the USER_DATA_STEP0.
Now, for H6/H616 NAND flash controller, this user data can have a
different size for each step.
So, we are maximizing the user data length to use as many OOB bytes as
possible.
Fixes: 7d1de98011 ("mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller")
Fixes: f163da5e6d ("mtd: rawnand: sunxi: add support for H6/H616 nand controller")
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
In sunxi_nand_chip_init there's quite a lot of kfree/return, it's easy
to forget a kfree(), so use a goto/kfree instead.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
[Andre: rename goto label, keep return 0;]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Formatting via clang-format is controlled by .clang-format.
For each statements should be formatted with a brace at the line end:
for_each() {
}
This requires clang-format to know that the symbol is not a function
but a for each macro. We use some for each macros which don't exist in
Linux. Add these to file .clang-format.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In the past, we only had one network stack which was called NET. The
network features were enabled for the legacy (and then only) networking
stack since commit 22353fa6b5 ("bootstd: Add some default filesystems
and commands"). Then instead on relying on NET legacy stack for enabling
networking features, the dependencies were (mostly) changed to depend on
CMD_NET in commit a0c739c184 ("boot: Create a common BOOT_DEFAULTS for
distro and bootstd"). Then a new stack (lwIP) appeared, then CMD_NET was
made available with this new stack in commit 98ad145db6 ("net: lwip:
add DHCP support and dhcp commmand") making the networking features
possible to enable and finally commit f1e978fd54 ("boot: Update tests
around network symbols in BOOT_DEFAULTS_CMDS") made it explicit that we
need *a* network stack to enable some networking features.
Align the bootstd documentation with what's actually implemented as
Kconfig dependencies. Note that BOOTSTD_DEFAULTS selects BOOT_DEFAULTS
which selects BOOT_DEFAULTS_CMDS which then selects network features.
The CMDLINE symbol needs to be enabled as well for BOOT_DEFAULTS to
select BOOT_DEFAULTS_CMDS, but I don't think we need to go that far into
explaining what's required to enable some commands.
Reported-by: Simon Glass <sjg@chromium.org>
Closes: https://lore.kernel.org/u-boot/CAFLszTgZC1FGy8965pHiG-u=FhrguftRv41ghQ_Qb_RRXx6tyg@mail.gmail.com/
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
We cannot use .clang-format without modification. For instance U-Boot
has some for each macros that Linux does not have.
Adjust the description.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add fTPM support documentation including an overview, configuration
steps for RPMB provisioning, OP-TEE TA build instructions, and
verification procedure.
Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com>
If efi_init_obj_list() fails we cannot use the UEFI sub-system.
* Instead of having messages for this everywhere write an error message
in efi_init_obj_list().
* Always use (ret != EFI_SUCCESS) when checking the return value of
efi_init_obj_list().
* Remove the return code from the error message as it does not help
users to understand which initialization went wrong.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add build steps for building U-Boot in secure state with
TF-A and OP-TEE. It includes the full steps for building
OP-TEE and TF-A to use with U-Boot. Also a short description
how to invoke QEMU with enabled EL3 and EL2. EL3 (machine
option secure=on) is required to run TF-A.
Signed-off-by: Johannes Krottmayer <krotti83@proton.me>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
As exposed by "make randconfig", we have an issue with the dependencies
for EFI_HTTP_BOOT. As this is implemented by running commands (as seen
by what it selects) it must depend on CMDLINE as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
All of these platforms enable CONFIG_BOARD_EARLY_INIT_F and then have a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.
Signed-off-by: Tom Rini <trini@konsulko.com>
In sunxi_nfc_hw_ecc_{read,write}_chunk(), the ECC step was force to 0,
the reason is not trivial to get when reading the code.
The explanation is that, from the NAND flash controller perspective, we
are indeed at step 0 for user data length and ECC errors.
Just add a const value with an explanation to clarify things.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
The user data length (4) used all over the code hard coded.
And sometimes, it's not that trivial to know that it's the user data
length and not something else.
Moreover, for the H6/H616 this value is no more fixed by hardware, but
could be modified.
Using a define here makes the code more readable.
Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Once reset SPI TX or RX fifo, the underlying hardware need to take
some time to actually settle down, the two bits will automatically
clear to 0, so use a poll mechanism to check status bits to make sure
it's done correctly.
On Cubie A7A board which using A733 SoC, we encoutered a SPI nor flash
timeout issue, it turns out that the SPI fifo reset take a few time to
settle down, Add a loop to poll the status.
This was the error message shows on A7A board once this issue happened.
=> sf probe
ERROR: sun4i_spi: Timeout transferring data
Failed to initialize SPI flash at 0:0 (error -2)
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
non-zero default value. Since we need to provide a value for all the
other parameters anyway, avoiding TPR6 makes no real difference.
To make matters worse, TPR6 is a compound value covering multiple DRAM
types, but also spans over three SoCs, which makes it hard to find one
good default value.
Drop the default from Kconfig, and put some explicit values in the
defconfigs for the few boards that were relying on the default so far.
The value is taken from one BSP, only the lower byte matters anyway for
those boards, all using DDR3 DRAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Allwinner's DRAM initialisation code defines a parameter named TPR6,
presumably containing some "Vref" parameter, but containing values for
*all* DRAM types. The runtime code selects one byte based on the DRAM
type used.
This selection code was wrong for LPDDR3, the value is encoded in
bits [23:16], not [15:8]. Fix that in the code, which also aligns it
with the very similar code for the A133 and A523.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reported-by: Philippe Simons <simons.philippe@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Boards based on the Allwinner D1/T113-s3, such as the
NetCube Systems Nagami, can expose a third I2C controller
on PG10/PG11. However, the sun20i_d1 pinctrl function table
lacked an entry for this mux.
Add the "i2c3" function with mux value 3 on PG10/PG11, allowing device
trees to enable the I2C3 controller.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.
Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined.
This will light up the power LED very early in the (SPL) boot phase on
those 64-bit boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.
Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined. Since its default is "high", we can skip the symbol in the
defconfig in this case.
This will light up the power LED very early in the (SPL) boot phase on
those 32-bit boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
The newly introduced Allwinner SPL LED "framework" defined a
SPL_SUNXI_LED_STATUS_STATE Kconfig symbol, that was supposed to denote
the active-low vs. active-high polarity of the LED. However this is
a bool symbol, so it will simply vanish if not defined, and we cannot use
it directly inside a C statement.
Filter the symbol through the IS_ENABLED() macro, which will return 0 if
the symbol is not defined, which is the intended value here.
Since the STATUS_STATE name is a bit confusing, rename it to ACTIVE_HIGH
on the way, because that is its real meaning. Also the LED_STATUS_BIT
name for the GPIO number is similarly a remnant of the old status LED
code, so rename it to LED_STATUS_GPIO as well.
This fixes configuring LEDs with active-low polarity.
Fixes: 256557dd9a ("sunxi: remove usage of legacy LED API")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Closes: https://lore.kernel.org/u-boot/adfMQBPdntWy1KIq@shepard/
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Once we complete the support for RISC-V Allwinner D1 (sun20i), we will need
to prefix $fdtfile with the vendor prefix to match the Linux device-tree
directory structure.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
With CONFIG_OF_LIVE=y, dev_of_offset(dev) does not return a valid
flat-FDT offset, so fdtdec_get_int(gd->fdt_blob, offset, ...) inside
gen_74x164_probe() fails to locate the "registers-number" property and
always falls back to the default value of 1. This results in a 4-chip
74HC595 daisy chain being exposed as only 8 GPIOs instead of 32, and
any consumer referencing offsets >= 8 fails to bind with -ENOENT
("GPIO ... not found" / Error -22).
The "registers-default" property is ignored for the same reason, so
any configured power-on output pattern is silently discarded.
Replace the flat-FDT helpers with dev_read_u32_default() and
dev_read_u8_array_ptr(), which correctly walk both live and flat
trees. This matches how other DM GPIO drivers (e.g. pca953x_gpio.c)
read their per-device properties.
With gd->fdt_blob no longer referenced, also drop the now-unused
DECLARE_GLOBAL_DATA_PTR and <asm/global_data.h> include.
Tested on stm32mp153d-ssonic (CONFIG_OF_LIVE=y) with a 4-chip 74HC595
chain: all 32 GPIOs are now exposed, and 16 consumer LED nodes at
offsets 0..31 bind successfully.
Fixes: 9300f711ba ("dm: gpio: introduce 74x164 driver")
Signed-off-by: Chanhong Jung <happycpu@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DS1307 driver depends on DM_RTC since commit d425d6056e ("rtc: Add
DM support to ds1307"), remove the related obsolete code.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The build issues found in dtc/yamltree were partially mitigated by a
previous commit (807bcd844a: "scripts/dtc: Fix pkg-config behavior under
sysroot"), but upstream dtc simply disabled yaml, and the same should be
done here in order to permanently avoid those issues.
Backport the change below from Linux v5.18 [1]:
ef8795f3f1c ("dt-bindings: kbuild: Use DTB files for validation")
I tested this patch with a couple Yocto builds: u-boot and u-boot-tools,
using the current master branch (rev. "c53b0708f9"), having removed
libyaml-native from u-boot-tools's dependencies.
[1] https://git.kernel.org/linus/ef8795f3f1ce
Signed-off-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Add support for the Rocktech RK050HR345-CT106A RGB panel. This model
uses an Ilitek ILI9806E controller over the SPI bus for initialization
and register configuration only.
The driver is designed to be easily extensible to support other panels
with different sequences and timings by providing a specific descriptor
structure for each model.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The SPI IP in this platform is fully compatible with the current driver
implementation, requiring only a new compatible string.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Implement the set_wordlen operation to allow dynamic bus width
configuration. This is required for peripherals with non-standard
requirements, such as display panels that need 9-bit word transfers
during the initialization and setup phase.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a helper to check the SPE (SPI Enable) bit and replace the
open-coded bitwise check in stm32_spi_stopxfer() with this helper to
improve readability and consistency.
This is also a preparatory step for future driver updates that require
checking the SPI enable state across different code paths.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a unit test to verify that the SPI word length configuration is
correctly handled by the SPI uclass and successfully passed down to
the sandbox driver.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Add the sandbox_spi_get_wordlen() public interface to retrieve the
internal word length state of the sandbox SPI device.
This is intended for use in sandbox SPI test cases to verify that
the word length is correctly propagated from the SPI uclass to
the driver.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
The driver currently ignores the word length configuration. Implement
the set_wordlen operation to store and track the current word length.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Allow dynamic configuration of the SPI word length. This is required
for controllers and slaves that need to operate with non-standard
word lengths, such as 9-bit wide transfers.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
All of these platforms enable CONFIG_BOARD_EARLY_INIT_F and then have a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Factorize TAMP_FWU_BOOT_IDX_MASK and TAMP_FWU_BOOT_IDX_OFFSET
definition which are common to STM32MP1 and STM32MP2 SoCs family.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Fix the following errors yielded by Coverity Scan:
CID 644836: Error handling issues (CHECKED_RETURN)
Calling device_chld_unbind without checking return value (as is done elsewhere 6 out of 7 times)
CID 644834: Error handling issues (CHECKED_RETURN)
Calling device_chld_remove without checking return value (as is done elsewhere 4 out of 5 times).
Link: https://lore.kernel.org/r/20260309212331.GF1388590@bill-the-cat/
Fixes: a6d047c0a8 ("video: stm32: remove all child of DSI bridge when its probe failed")
Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Depending of plugged power source (computer, wall charger, ...) it can
happen that we got the following message:
"****************************************************"
"* USB TYPE-C charger not compliant with *"
"* specification *"
"****************************************************"
" "
"### ERROR ### Please RESET the board ### "
This issue has been detected on STM32MP135f-DK board.
It's due to max_uV and min_uV value are initialized at beginning of
board_check_usb_power() and can then be used for the 2 iteration of
adc_measurement().
max_uV/min_uV values issued of the first adc_measurement() iteration
are used as input of the second adc_measurement() iteration, which
can lead to incoherent pair of min_uV/max_uV values.
To ensure that adc_measurement() returns coherent value for max_uV and
min_uV, initialize max_uV and min_uV at each loop start.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
* MMC fixes for Genio 520/720 (mt8189)
* SPI NOR Flash controller fixes
* SPI NOR Flash support for Genio 520/720
* PMIC controller fixes
* PMIC support for Genio 1200 (mt8195)
* Drop CONFIG_IDENT_STRING to be consistent across the platform
* Remove empty header on mt7622
This platform is often close to the binary size limit and minor changes
lead to exceeding image size. Enable LTO for this platform.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Cc: Marek Vasut <marex@nabladev.com>
Cc: Tien Fong Chee <tien.fong.chee@altera.com>
Change the logic for selecting pmic_children_info to use the compatible
string from the devicetree instead of expecting the pwrap (part of the
MCU) to correspond to the separate PMIC chip.
In addition to being more correct, it also saves a few lines of code for
each MCU type that is added by dropping the enum and type field.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-6-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add a PWRAP_CAP_INIT capability flag to specify if it is safe to call
pwrap_init() or not. Not all targets define the registers accessed
by pwrap_init(). In that case, it is expected that an earlier bootloader
has already initialized the PMIC. If not, we now return an error instead
of trying to access undefined registers.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-3-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
An UMS session with eMMC device specifier "ums C mmc dev.part1,dev.part2"
exposes the same eMMC HW partition 'part2' twice instead of exposing both
HW partitions 'part1' and 'part2'. Fix this by switching the eMMC HW
partition before block device read/write access.
An eMMC is represented by a single struct blk_desc, with the currently
selected HW partition being stored in this struct blk_desc. Each call to
part_get_info_by_dev_and_name_or_num() with partition string dev[.partN]
does trigger HW partition switch by calling blk_get_device_part_str() ->
blk_get_device_part_str() -> get_dev_hwpart() -> get_dev_hwpart() ->
blk_dselect_hwpart(). The ums_init() iterates over the device specifier
string and calls part_get_info_by_dev_and_name_or_num() in a loop for
each dev[.partN] entry used as the partition string. If the device
specifier string contains more than one dev[.partN] partition strings
for the same dev device, then it is the HW partition described in the
last dev[.partN] partition string entry that is accessed for all dev
device partition strings in the device specifier string, because that
last dev[.partN] partition string entry was the last one that triggered
blk_dselect_hwpart() call for that device.
To access the expected HW partition for every dev[.partN] partition string
entry, it is necessary to call blk_dselect_hwpart() before each block read
or write. Store HW partition described for each dev[.partN] partition string
in struct ums and use the stored value to make it so.
The blk_dselect_hwpart() does test whether the currently selected HW
partition is already configured in hardware and does not reconfigure
the hardware if that is the case, therefore for the majority of block
reads and writes, blk_dselect_hwpart() is a no-op with negligible
performance impact.
Example reproducer is listed below. The last sector of both eMMC HW BOOT
partitions is populated with distinct test pattern and UMS is launched:
"
=> mmc dev 1 1 ; mmc read $loadaddr 0x1fff 1 ; md $loadaddr 4
switch to partitions #1, OK
mmc1(part 1) is current device
MMC read: dev # 1, block # 8191, count 1 ... 1 blocks read: OK
84000000: 1234abcd 1234abcd 1234abcd 1234abcd ..4...4...4...4.
=> mmc dev 1 2 ; mmc read $loadaddr 0x1fff 1 ; md $loadaddr 4
switch to partitions #2, OK
mmc1(part 2) is current device
MMC read: dev # 1, block # 8191, count 1 ... 1 blocks read: OK
84000000: 567890ef 567890ef 567890ef 567890ef ..xV..xV..xV..xV
=> ums 0 mmc 1.1,1.2
UMS: LUN 0, dev mmc 1, hwpart 1, sector 0x0, count 0x2000
UMS: LUN 1, dev mmc 1, hwpart 2, sector 0x0, count 0x2000
"
Read of the two block devices on host without this fix produces
identical data present in HW BOOT partition 2:
"
$ dd if=/dev/sdX of=mmc-a.bin ; dd if=/dev/sdY of=mmc-b.bin
$ hexdump -C mmc-a.bin | tail -n 3 | head -n 1 ; \
hexdump -C mmc-b.bin | tail -n 3 | head -n 1
003ffe00 ef 90 78 56 ef 90 78 56 ef 90 78 56 ef 90 78 56 |..xV..xV..xV..xV|
003ffe00 ef 90 78 56 ef 90 78 56 ef 90 78 56 ef 90 78 56 |..xV..xV..xV..xV|
"
Read of the two block devices on host with this fix produces the
expected distinct data from either HW BOOT partition 1 or 2:
"
$ dd if=/dev/sdX of=mmc-a.bin ; dd if=/dev/sdY of=mmc-b.bin
$ hexdump -C mmc-a.bin | tail -n 3 | head -n 1 ; \
hexdump -C mmc-b.bin | tail -n 3 | head -n 1
003ffe00 cd ab 34 12 cd ab 34 12 cd ab 34 12 cd ab 34 12 |..4...4...4...4.|
003ffe00 ef 90 78 56 ef 90 78 56 ef 90 78 56 ef 90 78 56 |..xV..xV..xV..xV|
"
Reported-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_arm64, lwIP):
<<:*sage_lab_dfn
needs:["Raspberry Pi 4 (rpi_arm64)"]
variables:
LABGRID_EXPORTER:"sage-exporter-rpi4-1"
LG_PLACE:"rpi4-1"
TEST_PY_BD:"rpi_arm64"
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_4_32b):
<<:*sage_lab_dfn
needs:["Raspberry Pi 4 (rpi_arm64, lwIP)"]
needs:["Raspberry Pi 4 (rpi_arm64)"]
variables:
LABGRID_EXPORTER:"sage-exporter-rpi4-1"
LG_PLACE:"rpi4-1"
@@ -197,20 +190,13 @@ Raspberry Pi 3 (rpi_arm64):
LABGRID_EXPORTER:"sage-exporter-rpi3-1"
LG_PLACE:"rpi3-1"
TEST_PY_BD:"rpi_arm64"
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_arm64, lwIP):
<<:*sage_lab_dfn
needs:["Raspberry Pi 3 (rpi_arm64)"]
variables:
LABGRID_EXPORTER:"sage-exporter-rpi3-1"
LG_PLACE:"rpi3-1"
TEST_PY_BD:"rpi_arm64"
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
OVERRIDE:"-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
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