Compare commits

...

1299 Commits

Author SHA1 Message Date
Tom Rini
30b77f6aa1 CI: Sage: Drop rpi_arm64 lwIP variants
With commit 17ceb774a1 ("rpi_arm64: Enable MBEDTLS/LWIP/WGET and
WGET_HTTPS"), we can drop the tests for switching from the legacy stack
to lwIP.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-29 11:03:25 -06:00
Tom Rini
2f87266d56 Merge tag 'rpi-2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.07-rc4:

- mmc: bcmstb: Fix non-removable check in bcm2712 init
- mmc: bcm2835_sdhci: Parse generic MMC device tree properties
- rpi_arm64: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS
- video: arm: rpi: Add brcm,bcm2712-hdmi0 compatible
2026-05-29 08:32:13 -06:00
Jan Čermák
8de24e226d mmc: bcmstb: Fix non-removable check in bcm2712 init
sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether
to force card-detect for a non-removable eMMC, or to route the CD signal
for a removable SD card. At the time this function runs from
sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that
field is only populated later by the MMC uclass, after the driver's
probe returns. mmc_of_parse() has already filled plat->cfg.host_caps
from the device tree by this point, so check that field instead.

Without the fix, every BCM2712 SDHCI instance takes the else branch and
writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including
the non-removable eMMC on boards such as CM5 on Home Assistant Yellow.
The SDIO_CFG block lies outside the SDHCI core's reset scope, so this
value persists across SDHCI_RESET_ALL into the next stage. On the
BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs
its first set_power(MMC_POWER_UP) write racily prevents the SDHCI
POWER_ON bit from latching (see [1] for the whole backstory) - the
voltage bits stick but POWER_ON drops - which wedges the first CMD0 the
full 10 s software timeout. On Home Assistant Yellow this manifested as
a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot
was the previous stage. Booting directly from the Pi firmware (no U-Boot
in between) left SD_PIN_SEL at its default and did not exhibit the race.

Reading plat->cfg.host_caps lets init_2712 see the "non-removable"
property and take the correct branch, leaving SD_PIN_SEL untouched for
the eMMC.

[1] https://github.com/home-assistant/operating-system/pull/3700#issuecomment-4430229511

Fixes: 10127cdbab ("mmc: bcmstb: Add support for bcm2712 SD controller")
Signed-off-by: Jan Čermák <sairon@sairon.cz>
Reviewed-by: Ivan T. Ivanov <iivanov@suse.de>
2026-05-28 20:55:57 +01:00
Tom Rini
987907ae4b Merge tag 'u-boot-stm32-20260526' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/30256

- Add support dynamic A/B bank bootup for STM32MP15
- Increase SYS_MALLOC_F_LEN for stm32mp15_defconfig to fix boot with optee-4.10.0
- Enable Arm SMC watchdog for STM32MP1
- Update part number for TM32MP251/3 SoC's family
2026-05-26 08:22:05 -06:00
Patrice Chotard
0c035ff60c stm32mp2: update part number for STM32MP251/3
update part number for STM32MP251/3 for last cut revision.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-05-26 13:46:30 +02:00
Yann Gautier
d6ddbbb000 ARM: dts: stm32: enable SMC watchdog for STM32MP15 SCMI config
For this configuration, the watchdog (iwdg1) is secured and managed by
OP-TEE. Add an watchdog node with arm,smc-wdt compatible, and disable
iwdg2 node which is then no more used.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Yann Gautier
a3a09d28d5 configs: stm32mp13: activate watchdog
No watchdog was enabled for STM32MP13 platform. Add the required flags to
support it. As done for STM32MP15 (in SCMI config) and STM32MP2x, we use
the Arm SMC watchdog. The required nodes were already present in Linux
imported DT files (stm32mp13.dtsi & stm32mp135f-dk.dts).
To enable this SMC watchdog on other platforms based on STM32MP13, check
that both the following flags are enabled in the dedicated config file:
CONFIG_WDT=y
CONFIG_WDT_ARM_SMC=y
And that there is a node in Linux board DT that enables the feature, as
it is done in stm32mp135f-dk.dts:
&arm_wdt {
	timeout-sec = <32>;
	status = "okay";
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Lionel Debieve
5b2e264a77 configs: stm32mp15: enable WDT_ARM_SMC driver
Enable the arm watchdog over SMC driver. This allows using a secure
watchdog, based on IWDG1 peripheral and managed by OP-TEE.
The driver will be probed if a watchdog node with "arm,smc-wdt"
compatible is enabled.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Patrice Chotard
70456905ec configs: stm32mp15: Increase SYS_MALLOC_F_LEN
Using stm32mp15_defconfig with stm32mp157c-dk2-scmi.dtsi device tree
with optee-4.10.0, we got:

U-Boot 2026.07-rc2-00052-g215496fec59b (May 18 2026 - 15:05:34 +0200)

CPU: STM32MP157CAC Rev.B
Model: STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board
Board: stm32mp1 in trusted mode (st,stm32mp157c-dk2-scmi)
alloc space exhausted ptr 80060 limit 80000
optee optee: PTA_BSEC invoke failed TEE err: 0, err:fffffff4
alloc space exhausted ptr 80040 limit 80000
alloc space exhausted ptr 80020 limit 80000
DRAM:  alloc space exhausted ptr 80040 limit 80000
RAM init failed: -12
initcall_run_f(): initcall dram_init() failed

CONFIG_SYS_MALLOC_F_LEN need to be increased to fix this issue

Reported-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-05-26 13:46:30 +02:00
Dario Binacchi
4369c6a050 board: st: factorize STM32MP FWU multi-bank support
Factorize FWU multi-bank support code common to STM32MP1 and
STM32MP2 platforms into a dedicated shared source file.

No functional change intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Dario Binacchi
560d8f3270 board: st: stm32mp15: support dynamic A/B bank bootup
Following commit 4300f9f4c5 ("board: st: stm32mp25: support dynamic
A/B bank bootup"), this patch enables automatic detection of the active
A/B bank on STM32MP15 platforms by retrieving partition GUIDs from FWU
metadata.

This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.

To enable A/B bank bootup on STM32MP15 boards, add the following Kconfig
options to the  stm32mp15[_basic]_defconfig:

 CONFIG_FWU_MULTI_BANK_UPDATE=y
 CONFIG_FWU_MDATA=y
 CONFIG_FWU_NUM_BANKS=2
 CONFIG_FWU_NUM_IMAGES_PER_BANK=3
 CONFIG_CMD_FWU_METADATA=y
 CONFIG_FWU_MDATA_V2=y

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-26 13:46:30 +02:00
Liel Harel
29c7796a71 mmc: bcm2835_sdhci: Parse generic MMC device tree properties
The bcm2835 SDHCI driver sets up the MMC host configuration via
sdhci_setup_cfg(), but does not parse generic MMC device tree
properties.

As a result, properties such as bus-width are ignored. On Raspberry Pi
Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot
initialized the device as 4-bit.

Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC
properties are folded into the host configuration before the MMC core
selects the bus width.

Before this change, mmc info reported:

    Bus Speed: 52000000
    Bus Width: 4-bit

After this change, mmc info reports:

    Bus Speed: 52000000
    Bus Width: 8-bit

Tested on Raspberry Pi Compute Module 4 with onboard eMMC.

Signed-off-by: Liel Harel <liel.harel@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> # on the CM4 as well
2026-05-26 12:11:50 +01:00
Peter Robinson
17ceb774a1 rpi_arm64: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS
Enable LWIP and HTTPS on the Raspberry Pi arm64 platform to be able to
use it in the boot process.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2026-05-26 12:11:50 +01:00
Peter Robinson
812aca5791 video: arm: rpi: Add brcm,bcm2712-hdmi0 compatible
The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5.
There appears to be no change that impacts early boot output
on the display controller so add the RPi5 compatible string.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2026-05-26 12:11:50 +01:00
Tom Rini
76d62273bc Prepare v2026.07-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-25 11:05:37 -06:00
Wadim Egorov
a208934801 Makefile: binman: Search board directory before srctree
A file like rm-cfg.yaml accidentally left in the source tree root
shadows the board-specific copy. binman builds the wrong YAML, the
resulting rm-cfg.bin may match a different SoC, and we end up with
the following error:

  k3_system_controller sysctrler: k3_sysctrler_start:
      Boot Notification response failed. ret = -110

Move the board directory ahead of the srctree root so that the
most-specific match wins.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-25 09:48:35 -06:00
Tom Rini
97208cb762 Merge tag 'xilinx-for-v2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2026.07-rc3

versal/fpga:
- Fix unaligned buffer handling

versal2:
- Fix buffer overflow in SOC name array
2026-05-25 09:43:44 -06:00
Tom Rini
ba932756ca configs: Resync with savedefconfig
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-25 09:37:02 -06:00
Tom Rini
7c419d4b57 global: Update URL for U-Boot project
Our official domain is now u-boot-project.org, so update all in-tree
references to use the correct domain.

Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-25 09:30:47 -06:00
Tom Rini
e875c10c6f Merge patch series "Fix speculative access to firewalled regions on AM62 SoCs"
Anshul Dalal <anshuld@ti.com> says:

This patch series fixes firewall exceptions observed on AM62 family of
devices due to speculative accesses made by the A53 core to secure DDR
regions.

Link: https://lore.kernel.org/r/20260520-am62_firewall_exception_fix-v3-0-9ca3dc40aea4@ti.com
2026-05-25 09:29:54 -06:00
Anshul Dalal
37e6b640ef mach-k3: enable mmu after reserved memory is unmapped
Currently the sequence to enable caches for the A53/A72 core on K3
devices looks as follows:

 1. Map entire DDR banks
 2. Setup page tables (done by mmu_setup)
 3. Enable MMU
 4. Unmap reserved-memory regions
 5. Enable caches

However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.

A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:

 1. Map entire DDR banks
 2. Setup page tables
 3. Unmap reserved-memory regions
 4. Enable MMU
 5. Enable caches

Fixes: f1c694b8fd ("mach-k3: map all banks using mem_map_from_dram_banks")
Reported-by: Suhaas Joshi <s-joshi@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-05-25 09:29:50 -06:00
Anshul Dalal
b53128d528 arm: armv8: mmu: move mmu enablement out of mmu_setup
Currently mmu_setup for ARMv8 performs two functions, first it sets up
the page tables based the memory map provided by the board and then it
enables the MMU.

However for some platforms runtime fixes to the generated page tables
are required before the MMU can be enabled, such as K3 family of SoCs.

Therefore this patch moves the enablement of the MMU out of mmu_setup
and to a standalone mmu_enable function to give more granular control to
the platforms.

Note that no functional changes are intended from this patch.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-05-25 09:29:50 -06:00
Moteen Shah
7e11adf054 am57xx: restore bootm_size for ARMv7 HighMem constraint
babae80169 removed bootm_size from ti_common.env to allow K3 boards
to process images larger than 256MB, but preserved it in
ti_armv7_keystone2.env for ARMv7 Keystone2 boards. AM57xx (also ARMv7)
was not covered by that preservation.

Without bootm_size, env_get_bootm_size() falls back to gd->ram_size,
causing initrd_high to be computed as the top of all RAM. On ARM32
boards with more RAM than the DMA zone (e.g. AM572x IDK with 2GiB),
this places the ramdisk above 0xafe00000 (HighMem), which is not
directly accessible by the kernel after MMU setup, causing a silent
crash.

With bootm_size=0x10000000, initrd_high is constrained to
0x80000000 + 0x10000000 = 0x90000000, keeping the ramdisk in the
DMA zone and allowing the kernel to access it correctly.

Fixes: babae80169 ("include: env: ti_common: remove bootm_size")

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Moteen Shah <m-shah@ti.com>
2026-05-25 09:29:30 -06:00
Francois Berder
8a5989acc6 arm64: versal2: Fix buffer overflow in soc_name_decode
The size of name buffer was not computed correctly.
The suffix format is "--rel.-el" (9 chars instead of 6),
and the longest platform name is "emu-mmd" (7 chars instead of 4).
Fix comment and name size.

Fixes: 40f5046c22 ("arm64: versal2: Add support for AMD Versal Gen 2")
Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/BESP194MB280513B376D54A815F3FD507DA0E2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
2026-05-25 15:14:05 +02:00
Pranav Tilak
9793931f36 fpga: versalpl: Fix unaligned buffer handling
When fpga load is called with a misaligned buffer address, the
versal_align_dma_buffer() function shifts the pointer forward to the
next aligned boundary and uses memcpy() to copy the data. Since the
destination is ahead of the source and the regions overlap, memcpy()
produces undefined behavior; in practice U-Boot's generic memcpy()
copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk
throughout the buffer.

Replace memcpy() with memmove() which correctly handles overlapping
regions by copying backwards when the destination is ahead of the
source.

Fixes: 26e054c943 ("arm64: versal: fpga: Add PL bit stream load support")
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260507113359.3665220-1-pranav.vinaytilak@amd.com
2026-05-25 15:14:05 +02:00
Tom Rini
987c93fc68 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
This is Renesas R-Car X5H support for U-Boot on its RSIP Cortex-M33 core
in addition to already support U-Boot on Cortex-A720AE core. The first
two patches also switch X5H to OF_UPSTREAM.
2026-05-22 13:30:42 -06:00
Marek Vasut
9d47a5a4d5 arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP port
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.

The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.

The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
3b2ce3743c arm: renesas: Generate u-boot-elf.shdr for R-Car Gen5 RSIP
Add target to generate u-boot-elf.shdr for R-Car Gen5 Cortex-M33
RSIP core. The resulting .shdr SREC file can be written into the
HF at offset 0.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
3bcee350f0 arm: renesas: Generate u-boot-elf.scif for R-Car Gen5 RSIP
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33
RSIP core. The resulting .scif SREC file can be loaded using the
SCIF loader to start U-Boot on the RSIP core.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
5fa536f698 arm64: dts: renesas: Update reset IDs on R-Car Gen5 R8A78000 X5H
The current DT reset ID encoding in R-Car Gen5 R8A78000 X5H U-Boot DTs
is inherited from downstream BSP. New reset bindings for this SoC are
now submitted and under review [1]. Replace the DT reset IDs with the
ones used in the new bindings.

[1] https://lore.kernel.org/all/053c312d07445517d8f9c84bfe3cc8fb72d4cd9a.1776793163.git.geert+renesas@glider.be/

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
3681df4f34 arm64: dts: renesas: Switch to remap drivers on R-Car Gen5 R8A78000 X5H
Point every direct user of SCMI clock protocol at CPG node instead
of SCMI clock protocol node. Point every direct user of SCMI reset
and power domain protocol at a matching newly introduced MDLC node
instead of the SCMI reset and power domain protocol nodes.

This allows the CPG and MDLC remap drivers bound to CPG node and MDLC
nodes to remap between DT clock, reset and power domain IDs and SCMI
clock, reset and power domain IDs. This makes U-Boot on R-Car X5H
compatible with multiple SCP firmware versions. Currently supported
versions of SCP firmware are 4.28, 4.31 and 4.32.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
2d0ec0891b arm64: renesas: Select R-Car Gen5 R8A78000 X5H MDLC power domain and reset driver
Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H
SoC by default. The power domain and reset driver is used to remap
DT power domain and reset IDs to SCMI power domain and reset IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
53297db126 power: domain: Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver
Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver,
which serves as a remap driver between DT power domain and reset IDs
and SCMI power domain and reset IDs in case U-Boot runs on Cortex-A,
and as a direct hardware access driver for RSIP.

The R-Car X5H SCP firmware uses different SCMI power domain and
reset IDs in different versions of the SCP firmware, which makes
this remapping necessary. The SCMI base protocol version is updated
for each new SCP firmware version, it is therefore possible to
determine which SCP firmware version is running on the platform
from the base protocol and then determine which remapping table to
use for DT power domain and reset ID to SCMI power domain and reset
ID remapping.

Currently supported versions are SCP 4.28, 4.31, 4.32 .

The DT power domain and reset ID to SCMI power domain and reset ID
remap and call mechanism is simple. Unlike SCMI clock protocol driver,
the SCMI reset and power domain protocol drivers register only a single
device. This driver looks up that single device, obtains its reset or
power domain ops, sets up struct reset_ctl or struct power_domain with
remapped SCMI ID, and invokes operations directly on the device.

In case of RSIP, all power domains are already enabled by BootROM or
early SoC initialization code, the driver therefore only acts as a
stub for the power domain part. The reset part operates as a direct
hardware access reset driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
567a4cdd14 arm64: renesas: Select R-Car Gen5 R8A78000 X5H CPG clock driver
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default.
The clock driver is used to remap DT clock IDs to SCMI clock IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
24039ffefb clk: renesas: Add Renesas R-Car R8A78000 X5H CPG clock driver
Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a
remap driver between DT clock IDs and SCMI clock IDs in case U-Boot
runs on the Cortex-A, and as a trivial clock driver for RSIP.

The R-Car X5H SCP firmware uses different SCMI clock IDs in different
versions of the SCP firmware, which makes this remapping necessary.
The SCMI base protocol version is updated for each new SCP firmware
version, it is therefore possible to determine which SCP firmware
version is running on the platform from the base protocol and then
determine which remapping table to use for DT clock ID to SCMI clock
ID remapping.

Currently supported versions are SCP 4.28, 4.31, 4.32 .

The DT clock ID to SCMI clock ID remap and call mechanism is a bit
complex. The driver looks up the SCMI clock protocol device on probe
and stores pointer to it in private data. On each clock request which
has to be remapped, the device sequence ID of this SCMI clock protocol
device is incremented by the remapped SCMI clock ID + 1 and used to
look up matching clock device by sequence number. If the device is
found, it is converted to clock, which can be used in regular clock
operations. This look up has to be done because the SCMI clock driver
registers a subdevice for each clock, and this look up is the only way
to find the correct SCMI clock subdevice. Since the SCMI device and
the clock subdevices are registered in the same function, we can depend
on the device sequence numbers to be monotonically incrementing, with
SCMI clock protocol device being sequence number N, the first SCMI
clock subdevice being sequence number N+1 and so on.

In case of RSIP, all clocks are already enabled by BootROM or early
SoC initialization code, the driver therefore only acts as a stub.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
3e24519d6f arm64: renesas: Select HSCIF for DEBUG UART on R-Car Gen5 R8A78000 X5H
The R-Car Gen5 R8A78000 X5H uses HSCIF as default serial console
interface. Select CFG_HSCIF to make debug UART code also configure
serial console interface as HSCIF instead of SCIF in case the
CONFIG_DEBUG_UART would be enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
9692469b18 arm64: dts: renesas: Use SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN on R-Car X5H
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691
instead of hardcoding the number in DT. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Marek Vasut
d77f8443c7 arm64: dts: renesas: Switch to upstream DT on Renesas R-Car X5H R8A78000
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base
for U-Boot control DT. Retain currently present parts of the DT which
are not yet part of upstream Linux kernel DT in -u-boot.dtsi files
until they get replaced by upstream equivalents. Add renesas/ prefix
to the DEFAULT_DEVICE_TREE as part of the switch.

Unused i2c2..i2c8 nodes have been removed, and will become available
once upstream Linux kernel DT adds those nodes.

The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM,
which are reserved for firmware and other use.

Note that all DT parts in -u-boot.dtsi are not considered stable DT
bindings and may change before they land in Linux kernel and become
stable DT ABI.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-21 21:48:05 +02:00
Tom Rini
744cf5d4e3 Merge tag 'u-boot-dfu-20260521' of https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20260521

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/30195

Usb Gadget:
* f_acm: Fix memory leak in acm_add()
* atmel: Fix gadget support on bus reset
2026-05-21 10:26:29 -06:00
Tom Rini
46b29a7d12 Merge tag 'u-boot-nvme-fixes-20260521' of https://source.denx.de/u-boot/custodians/u-boot-ufs
- Add myself as Maintainer of NVMe
- fix command ID wraparound handling
- apple: Check memalign return value
- Staticize and constify driver ops
- Fix PRP list pointer arithmetic for chained transfers
2026-05-21 08:16:56 -06:00
Zixun LI
7f34bb50a5 usb: gadget: atmel: do not disable endpoints in reset_all_endpoints()
Endpoints should not be disabled on bus reset inside UDC driver,
otherwise a race condition will happen between gadget driver. Gadget
driver will free the requests and disable endpoints in disconnect ops.

Also remove outdated comment about it in usba_ep_disable().

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Fixes: 59310d1ecb ("usb: gadget: introduce 'enabled' flag in struct usb_ep")
Link: https://patch.msgid.link/20260515-udc_ep-v2-1-cd335b4e62e4@hifiphile.com
[mkorpershoek: removed empty newline between Fixes: and sob]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-05-20 12:09:29 +02:00
Prashant Kamble
4f51050598 nvme: Fix PRP list pointer arithmetic for chained transfers
The PRP setup code advances prp_pool using u64 pointer
arithmetic:

        prp_pool += page_size;

This increments the pointer by page_size * sizeof(u64)
bytes instead of page_size bytes, resulting in invalid
PRP list addresses when multiple PRP list pages are
required.

The issue becomes visible for large transfers, typically
above 2 MiB when MDTS > 9.

Fix it by using byte-wise pointer arithmetic when
advancing to the next PRP list page.

Signed-off-by: Prashant Kamble <prashant.kamble223@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260518022535.17197-1-prashant.kamble223@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-05-20 09:51:44 +02:00
Marek Vasut
4e91d9ff33 nvme: Staticize and constify driver ops
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260508122128.512798-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-05-20 09:44:37 +02:00
Francois Berder
63f0f19803 nvme: apple: Check memalign return value
memalign returns NULL if it fails.
This commit ensures that we handle this failure before
filling the buffer with 0s.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/BESP194MB280542535B098A33C8A815EEDA3A2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-05-20 09:44:37 +02:00
Prashant Kamble
d6eb327828 nvme: fix command ID wraparound handling
nvme_get_cmd_id() returns 0 after cmdid reaches USHRT_MAX,
but fails to reset cmdid itself. As a result, all subsequent
calls keep returning 0 indefinitely.

Reset cmdid when wraparound occurs so command IDs continue
incrementing correctly.

Signed-off-by: Prashant Kamble <prashant.kamble223@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260518060915.45607-1-prashant.kamble223@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-05-20 09:44:37 +02:00
Neil Armstrong
49f8b8de4e MAINTAINERS: Add myself to the list of NVMe maintainers
Adding myself to continue Bin's work to help maintain the
NVMe support in U-boot.

Acked-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260519-u-boot-pci-nvme-maintainer-v1-1-363593cbbfdc@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-05-20 09:44:37 +02:00
Tom Rini
38dbe637c9 Merge tag 'efi-2026-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2026-07-rc3

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/30152

Documentation:

* For reset command describe when the -edl option is available and fix a
  typo.

UEFI:

* If efi_allocate_pages() is with EFI_ALLOCATE_ADDRESS fails, return
  EFI_NOT_FOUND.
* Fix HII keyboard layout pointer computation and extend HII keyboard
  layout tests.

Others:

* In reset command online help show -edl option only when enabled.
2026-05-18 09:12:11 -06:00
Tom Rini
78319e074d Merge tag 'ubi-updates-for-2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-ubi
UBI updates for 2026.07-rc3

Fix from Peter:
- fs: ubifs: remove dead code
  Fixes: d5888d509c ("fs: ubifs: fix bugs involving symlinks in ubifs_findfile")
  (hs. correct the commit ID)
2026-05-18 08:57:51 -06:00
Peter Collingbourne
0646ee0ed8 fs: ubifs: remove dead code
This code is dead because it appears after an infinite loop; remove it.

Fixes: d5888d509c ("fs: ubifs: fix bugs involving symlinks in ubifs_findfile")
Signed-off-by: Peter Collingbourne <peter@pcc.me.uk>
Reviewed-by: Heiko Schocher <hs@nabladev.com>

hs: corrected the commit ID
2026-05-18 09:19:56 +02:00
Vincent Stehlé
5824ed13bc efi_selftest: test hii keyboard layouts more
The HII database test for keyboard layouts register two package lists with
two keyboard layouts each, but the test verifies only the GUID of the first
keyboard layout.
This does not catch the bugs happening with the keyboard layouts after the
first one in a package.

Verify all the keyboard layout GUIDs in the unit test to prevent this.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
2026-05-18 08:38:16 +02:00
Vincent Stehlé
ec95a60d9d efi_loader: fix hii keyboard layout pointer computation
The EFI_HII_KEYBOARD_LAYOUT field `layout_length' is expressed in bytes,
but we add it to the `layout' pointer with (scaled) pointer arithmetic.
When adding an HII keyboard package with multiple keyboard layouts, this
results in only the first layout being added correctly; fix it.

Fixes: 8d3b77e36e ("efi: hii: add keyboard layout package support")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: AKASHI Takahiro <akashi.tkhro@gmail.com>
2026-05-18 08:38:16 +02:00
Quentin Schulz
e49c84f7bb doc: usage: cmd: reset: specify when the -edl option is available
The option is only available when CONFIG_SYSRESET_QCOM_PSCI is enabled,
so let's make that explicit in the boot cmd documentation.

Due to the implementation in drivers/sysreset/sysreset-uclass.c
do_reset() function, all options to the reset command are passed to all
sysreset drivers' sysreset_ops.request_arg callback (including -w) which
is only available when CONFIG_SYSRESET_CMD_RESET_ARGS=y. -w, however,
works also without this option.

Fixes: ef06c5d76f ("cmd: boot: Add '-edl' option to reset command documentation")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-18 08:37:13 +02:00
Quentin Schulz
fe725640ec doc: usage: cmd: reset: fix typo
"Do warm WARM" doesn't mean anything, I'm assuming the intent was to say
"Do WARM reset" so reword.

Fixes: 34e452dd02 ("doc: usage: Group all shell command docs into cmd/ sub-directory")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-18 08:37:13 +02:00
Quentin Schulz
1076feb8a3 cmd: boot: fix edl being shown when not supported
edl is implemented in the sysreset_ops.request_arg callback of the
qcom-psci sysreset driver. That callback is only called from
sysreset_request_arg() which is compiled only when
CONFIG_SYSRESET_CMD_RESET_ARGS=y.

Therefore, only show the edl option if that symbol is enabled.

It is in a separate if block because any option but -w will only be
handled when CONFIG_SYSRESET_CMD_RESET_ARGS=y as seen with the
implementation in do_reset() in drivers/sysreset/sysreset-uclass.c.

Fixes: ef06c5d76f ("cmd: boot: Add '-edl' option to reset command documentation")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-18 08:37:13 +02:00
Harsimran Singh Tungal
d0d1c4a4f5 efi_loader: fix AllocatePages overlap status
Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS overlap

When efi_allocate_pages() is called with EFI_ALLOCATE_ADDRESS, UEFI
expects EFI_NOT_FOUND if the requested address range is already
allocated or unavailable. U-Boot currently returns
EFI_OUT_OF_RESOURCES when efi_update_memory_map() detects an overlap
after a successful lmb_alloc_mem(), which does not match
EFI_ALLOCATE_ADDRESS semantics.

Return EFI_NOT_FOUND for EFI_ALLOCATE_ADDRESS requests that fail due
to an overlapping EFI memory descriptor, while keeping
EFI_OUT_OF_RESOURCES for other allocation types.

The UEFI specification [1] specifies that
EFI_BOOT_SERVICES.AllocatePages must return EFI_NOT_FOUND when the
requested address range is unavailable or already allocated;
EFI_OUT_OF_RESOURCES applies to non‑address‑specific allocation
failures.

[1] https://uefi.org/specs/UEFI/2.10_A/07_Services_Boot_Services.html

Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>

The UEFI specification does not clearly specify the behavior.
But let's follow the EDK II precedent here.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-18 08:32:58 +02:00
Tom Rini
9704971031 Merge patch series "configs: airoha: an7581: defconfig fixes & improvements"
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> says:

This patch series fixes an7581_evb_defconfig.

Link: https://lore.kernel.org/r/20260427135326.773903-1-mikhail.kshevetskiy@iopsys.eu
2026-05-15 17:08:16 -06:00
Mikhail Kshevetskiy
0fcbe38192 configs: airoha: an7581: disable ENV_IS_IN_MTD to avoid boot panic
Booting image generated with

  make an7581_evb_defconfig

will results in

  U-Boot 2026.04-00924-gfb815bd8793b (Apr 27 2026 - 15:08:30 +0300)

  CPU:   Airoha AN7581
  DRAM:  512 MiB
  Core:  35 devices, 19 uclasses, devicetree: separate
  MMC:   mmc@1fa0e000: 0
  Loading Environment from MMC... *** Warning - No block device, using default environment

  Loading Environment from MTD... *** Warning - get_mtd_device_nm() failed, using default environment

  BUG at drivers/mtd/mtdcore.c:898/__put_mtd_device()!
  BUG!
  resetting ...

This happens because no any mtd partition defined in dts/mtdparts.
Disabling of ENV_IS_IN_MTD fixes an issue.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-05-15 17:08:11 -06:00
Mikhail Kshevetskiy
7bb8c707b1 configs: airoha: an7581: enable position independent code
This enables U-Boot loading from any 4K aligned address.
It makes U-Boot debugging a bit simpler.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-05-15 17:08:11 -06:00
Mark Kettenis
215496fec5 smbios: Do not fall back on devicetree without valid mapping
The smbios_get_val_si() function may get called for a sysinfo
property for which there is no mapping to a devicetree property.
Avoid a NULL pointer dereference in this case by skipping the
read of the mapped property from the device tree.

Fixes: 83b28b55d7 ("smbios: add support for dynamic generation of Type 9 system slot tables")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
2026-05-15 08:18:11 -06:00
Tom Rini
f3af40cff9 Merge tag 'fsl-qoriq-for-2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/30120

- Various fix/improvments for powerpc
- Correct usage of number of memory banks for nxp and ten64
- Staticize and constify scmi sandbox driver ops
2026-05-15 08:15:32 -06:00
Marek Vasut
8bd84cca34 firmware: scmi: sandbox: Staticize and constify driver ops
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Vincent Jardin
43257fa9e3 board: nxp: common: support CONFIG_FSL_USE_PCA9547_MUX
Use select_i2c_ch_pca9547() only when CONFIG_FSL_USE_PCA9547_MUX
is set, but several call in board/nxp/lx2160a/lx2160a.c invoke
it unconditionally,
or using unrelated Kconfigs (CONFIG_EMC2305, CONFIG_VID).

Compilation with LX2160A target that omits the mux therefore fails with

  error: implicit declaration of function 'select_i2c_ch_pca9547'

Add a static inline stub with -EOPNOTSUPP for the
!CONFIG_FSL_USE_PCA9547_MUX case so all cases compile cleanly.

Adapted from the convention used by include/scmi_nxp_protocols.h for
SCMI subprotocol stubs.

There is no functional change for NXP boards: all eight upstream
LX2160A defconfigs (lx2160ardb / lx2160aqds / lx2162aqds and their
secure / stmm / verified_boot variants) already set
CONFIG_FSL_USE_PCA9547_MUX=y, so the real declaration wins.

The purpose is to support new boards that do not use the PCA9547.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Vincent Jardin
7252890625 board: nxp: lx2160a: without QIXIS, MC-ENET, PCI, LTC3882
The shared LX2160A board file calls helpers that only exist when
their subsystem is enabled. Gate them on the matching CONFIG_*:
 - pci_init() under CONFIG_PCI.
 - fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET.
 - qixis_*() and the QIXIS branch of checkboard() under
   CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path
   still prints "Board: <name>".
 - EVENT_SPY_SIMPLE on init_func_vid moves inside the
   CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling
   symbol when LTC3882 off).

 #if / #ifdef, not IS_ENABLED(), because the helpers are themselves
conditionally compiled.

While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC
1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC,
not CONFIG_MMC.

No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or
LX2162AQDS, but mainly build clean up in order to support
other NXP lx2160a boards without those HW dependencies.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Francois Berder
12cf77821d board: ten64: Fix OOB read in ft_board_setup
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Francois Berder
408cab5f9d board: nxp: Fix OOB read in ft_board_setup
base and size arrays can both contain up to total_memory_banks
elements.
This commit fixes the for loop condition to ensure that it does
not attempt to read past the end of both arrays.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Michael Walle
9a621ea635 p2041rdb: convert README to rst
Convert the README to reST format.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Peng Fan
b8124202d7 p2041rdb: remove NAND defconfig
The RDB doesn't support NAND boot at all, remove the config for it.
Apparently, it was introduced by commit dd84058d24 ("kconfig: add
board Kconfig and defconfig files") which ran some scripts. Maybe that
script was wrong or the source boards.cfg was wrong. In any case, there
is no NAND flash on the RDB.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:31 +08:00
Michael Walle
f0e57510cf p2041rdb: update README and fix typos
Nowadays, u-boot can build the pbl image itself. Refer to that image in
the documentation. Also fix some typos.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
656dc03812 p2041rdb: support SDcard boot
The RCW was just supporting SPI boot. Add a second one for the SDcard
boot. While at it, use the same naming scheme as for the other NXP
boards.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
4839ba9045 p2041rdb: use the upstream device tree
Switch to the upstream device tree, which already includes the UART
nodes we need for the DM.

We also need to increase malloc area before relocation otherwise you'll
get the following error and the board panics:

	DRAM:  Initializing....using SPD
	alloc space exhausted ptr 414 limit 400

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
e742f676e5 boards/nxp: remove empty fdt_fixup_board_enet()
Remove any empty function which is just called by the board code. There
is no need to define this function at all.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
6af1851cb6 boards/nxp: remove board_eth_init()
board_eth_init() is dead code since commit e524f3a449 ("net: Remove
eth_legacy.c"). Remove it.

I'm not sure, all the shenanigans are covered by the new DM-version. The
MDIO mux and iomux controls probably are. The fman configuration
probably isn't. OTOH, nobody cared for years and the called
fm_info_set_phy_address() was also removed years ago.

This also removes fdt_fixup_board_enet() for the ls1043a and ls1046a
because it relies on the local variable "mdio_mux" being initialized by
the board_eth_init().

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
5a39262a4a boards: remove dead fman code
Commit cc2bf624eb ("net: fm: Remove non-DM_ETH code") removed the call
to board_ft_fman_fixup_port(). Thus remove the dead code in the board
files.

I'm not sure, all that DT shenanigans are covered by the new DM-version
of the fman code, but it seems no one complained for the past 4 years.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
cae1cfe2ca spi: fsl_espi: fix read transactions
Since commit 7917c2e356 ("spi: fsl_espi: fix din offset") MTD is
basically broken because any read transaction will get wrong data. While
the commit in question will fix simple transfers (where both
SPI_XFER_BEGIN and SPI_XFER_END is set), it will break the most common
case, where opcode and address is send first and then data comes as a
second transfer.

This basically reverts commit 7917c2e356 ("spi: fsl_espi: fix din
offset") and make the fix particular for this simple case. Instead of
providing two buffers for reading and writing, just malloc one which is
used for both. This will work because the data is first written on the
SPI bus and then it will be read (and overwite the written data) into
the same buffer.

Suggested-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
Fixes: 7917c2e356 ("spi: fsl_espi: fix din offset")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:30 +08:00
Michael Walle
09bc47cc33 caam: don't write memory at 0 on PPC
For non-secure boot environments pamu_init() isn't called but the CAAM
will still call sec_config_pamu_table() -> config_pamu() which then uses
an uninitialized ppaact variable. In fact, that variable is initialized
with 0, so the config_pamu() will happily assume the structure is there
and will operate on that memory. Call pamu_init() in the non-secure boot
case, too.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:29 +08:00
Michael Walle
674f35a884 powerpc: fix call to cpu_init_r
Commit 6c171f7a18 ("common: board: make initcalls static") broke the
call to cpu_init_r. That is because PPC is already defined to 1, see:

  powerpc-linux-gnu-gcc -dM -E - < /dev/null

This will conflict with the CONFIG_IS_ENABLED(PPC). Change it to
IS_ENABLED(CONFIG_PPC).

Fixes: 6c171f7a18 ("common: board: make initcalls static")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-15 19:28:29 +08:00
Emanuele Ghidoli
03d70a9220 arm: dts: k3-am69-aquila: fix combined boot firmware image build
The combined boot firmware firmware-aquila-am69-gp.bin depends on
tiboot3-am69-gp-aquila.bin, which in turn requires the GP variant
of the TI system firmware blob (ti-fs-firmware-j784s4-gp.bin).

Fix the combined boot firmware image build by adding the missing binman
nodes.

Fixes: f62d4535cf ("arm: dts: k3-am69-aquila: add combined boot firmware image")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2026-05-14 07:58:14 -06:00
Tom Rini
f020dfd9bf Merge tag 'i2c-updates-for-2026.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
updates for 2026.07-rc3

- designware_i2c: Staticize driver ops from Marek
- i2c: Remove legacy CONFIG_SYS_I2C_SOFT
-
2026-05-14 07:56:53 -06:00
Tom Rini
0c464b6cc3 i2c: Remove legacy CONFIG_SYS_I2C_SOFT
The last users of this legacy i2c stack have been removed or converted
to a modern part of the stack instead. Remove this code and references
to it.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
2026-05-14 11:17:20 +02:00
Marek Vasut
5f82b15958 i2c: designware_i2c: Staticize driver ops
Set the ops structure as static. The structure is not accessible
from outside of this driver.

Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-14 11:12:56 +02:00
Tom Rini
1a0fac05c3 Merge tag 'ab-master-12052026' of https://source.denx.de/u-boot/custodians/u-boot-tpm
- A single UAF fix from Kory for out fwumdata tool
2026-05-13 07:57:51 -06:00
Tom Rini
944427c3da Merge tag 'u-boot-stm32-20260512' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/30081

- reset: stm32: Fix compilation error
- Remove remaining non-existant STM32_RESET flag
- configs: stm32mp13: Add SPI-NAND UBI boot support
- Support metadata-driven A/B boot for STM32MP25
2026-05-13 07:54:10 -06:00
Francois Berder
c8f6823442 usb: gadget: f_acm: Fix memory leak in acm_add
If udc_device_get_by_index fails, the f_acm struct was not released.
Free it before returning the error.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://patch.msgid.link/BESP194MB2805271AD5DBE47B322F8DC3DA3A2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-05-13 13:11:07 +02:00
Christian Pötzsch
36d4c65358 virtio: fix return value check
The virtio_blk_do_single_req function returns ulong, which normally is
the processed size, but in an error case can be the actual error. Use
the special IS_ERR_VALUE macro to test for error.

Addresses-Coverity-ID: CID 645833 (DEADCODE) & CID 645834 (NO_EFFECT)
Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 12:38:49 -06:00
Janne Grunau
a1a47eee67 arm: apple: Add Apple M3 (t8122) support
Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
The main difference is that RAM starts at 0x100_0000_0000 like on t600x
and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
rearranged.
U-boot's existing drivers are compatible with the hardware and M3 device
trees will carry "apple,t8103-*" compatible strings. Only
apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
changes the Linux driver has to deal with.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:11:36 -06:00
Tom Rini
bdf4d12fc2 Merge patch series "Switch Apple silicon boards to upstream device trees"
Janne Grunau <j@jannau.net> says:

The Linux device trees for Apple silicon devices cover now most of the
hardware as u-boot's internal device trees for M1 devices. Linux has in
addition device trees M2 and M1 and M2 Pro/Max/Ultra devices which were
never added in u-boot.
The most common use case for u-boot on Apple silicon devices does not
use DTBs from u-boot but passes runtime modified device trees from an
earlier boot loader (m1n1).
This change regresses support for the SPI on M1 and M1 Pro/Max notebooks
as SPI keyboard support is not in upstream Linux. This regression is in
my opinion acceptable due to the limited use of u-boot's DTBs for these
targets.

Link: https://lore.kernel.org/r/20260507-apple-dt-upstream-v2-0-35181f2b0509@jannau.net
2026-05-12 12:11:17 -06:00
Janne Grunau
5aec4e746f arm: dts: Switch Apple silicon devices to dts/upstream
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:11:08 -06:00
Janne Grunau
fad7b438f0 doc: device-tree-bindings: Remove apple,pinctrl.yaml
Remove outdated apple,pinctrl.yaml. The dts/upstream contains the
current version of this binding.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:11:08 -06:00
Janne Grunau
4587d7180b doc: board: apple: Mention M2 and M2 Pro/Max/Ultra SoCs
These SoCs are supported since 2022/2023 but were never added to the
documentation. The devices very similar to the equivalent M1 devices.
The biggest difference is that the M2 and M2 Pro/Max based laptops no
longer use SPI for the keyboard.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:11:08 -06:00
Janne Grunau
0f0ff73bac arm: apple: Switch to board based text env
The main use case for u-boot on Apple silicon based devices is to
provide an EFI based bootloader for operating systems. This uses a
generic u-boot image with DTBs passed from an earlier boot loader
(m1n1). Use the generic board name "mac" for this purpose.

Signed-off-by: Janne Grunau <j@jannau.net>
2026-05-12 12:08:15 -06:00
Janne Grunau
1b5500cefe MAINTAINERS: Add Janne Grunau as reviewer for Apple M1 SoC support
I'm one of the co-maintainers of Apple silicon support in the Linux
kernel and have contributed to u-boot's Apple SoC support.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:08:08 -06:00
Janne Grunau
60c6065df1 MAINTAINERS: Add missing Apple M1 specific files
The files weren't added to MAINTAINERS but clearly belong to Apple
silicon (M1) support.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:08:08 -06:00
Janne Grunau
74471e0e18 watchdog: apple: Add "apple,t8103-wdt" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,wdt" anymore [1]. Use
"apple,t8103-wdt" as base compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,wdt".

Link: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ [1]
Link: https://lore.kernel.org/asahi/20250828-dt-apple-t6020-v1-0-507ba4c4b98e@jannau.net/ [2]
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:08:05 -06:00
Janne Grunau
6df6f97431 spi: apple: Add "apple,t8103-spi" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,spi" anymore [1]. Use
"apple,t8103-spi" as base compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,spi".

Link: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ [1]
Link: https://lore.kernel.org/asahi/20250828-dt-apple-t6020-v1-0-507ba4c4b98e@jannau.net/ [2]
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:08:01 -06:00
Janne Grunau
39117feb21 power: domain: apple: Add "apple,t8103-pmgr-pwrstate" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,pmgr-pwrstate" anymore [1]. Use
"apple,t8103-pmgr-pwrstate" as base compatible as it is the SoC driver
and bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,pmgr-pwrstate".

Link: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ [1]
Link: https://lore.kernel.org/asahi/20250828-dt-apple-t6020-v1-0-507ba4c4b98e@jannau.net/ [2]
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:07:57 -06:00
Janne Grunau
1588f7b8a3 pinctrl: apple: Add "apple,t8103-pinctrl" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,pinctrl" anymore [1]. Use
"apple,t8103-pinctrl" as fallback compatible as it is the SoC driver and
bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,t8103-pinctrl".

Link: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ [1]
Link: https://lore.kernel.org/asahi/20250828-dt-apple-t6020-v1-0-507ba4c4b98e@jannau.net/ [2]
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:07:54 -06:00
Janne Grunau
29080b2a99 nvme: apple: add "apple,t8103-nvme-ans2" compatible
After discussion with the devicetree maintainers we agreed to not extend
lists with the generic compatible "apple,nvme-ans2" anymore [1]. Add
"apple,t8103-nvme-ans2" as fallback compatible as this is the SoC the
driver and bindings were originally written for.
The t602x (M2 Pro/Max/Ultra) devicetrees submitted in [2] use this
compatible as fallback instead of "apple,t8103-nvme-ans2".

Link: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ [1]
Link: https://lore.kernel.org/asahi/20250828-dt-apple-t6020-v1-0-507ba4c4b98e@jannau.net/ [2]
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
2026-05-12 12:07:49 -06:00
Ernest Van Hoecke
f62d4535cf arm: dts: k3-am69-aquila: add combined boot firmware image
Add nodes to the binman configuration to create single binaries that
combine tiboot3-am69-*-aquila.bin, tispl.bin and u-boot.img into
firmware-aquila-am69-*.bin, with the proper offsets.

These binaries can be used to flash U-Boot via a single binary of three,
as it is done now.

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-12 11:43:36 -06:00
Tze Yee Ng
b42c67188c mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY
The Cadence SD6HC (SDHCI spec v4.20+) controller uses a soft PHY whose
DLL delay characteristics vary with PVT (Process, Voltage, Temperature)
and board-level trace routing.

A static delay value programmed via device tree for SD High Speed mode is
insufficient because the optimal sampling point varies per board, SD card,
and operating conditions. Runtime calibration is required.

While the SD Physical Layer Specification does not mandate tuning for
SD HS mode (only for UHS-I SDR50/SDR104), the Cadence SD6HC PHY
requires runtime calibration of its receive data delay line to find a
valid sampling window under constrained clock conditions.

The tuning is triggered from the set_ios_post callback because at that
moment hardware has committed the new bus width, clock frequency, and speed
mode to the controller registers. This ensuring the tuning sequence runs
at the correct SD HS operating conditions.

The tuning is gated by a device tree property "cdns,sd-hs-tuning" so
that only boards requiring runtime calibration opt in. When enabled,
the driver performs a 40-tap DLL sweep using CMD19 to find the largest
consecutive passing window, then programs the midpoint into
PHY_DLL_SLAVE_CTRL_REG.

To enable on a board, add to the MMC node in device tree:

    &mmc {
        cdns,sd-hs-tuning;
    };

Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com>
2026-05-12 11:42:41 -06:00
Patrice Chotard
612256838a reset: stm32: Fix compilation error
The following compilation error occurs when environment variable
KBUILD_OUTPUT is not set :

drivers/reset/stm32/stm32-reset-mp21.c:8:10: fatal error: stm32-reset-core.h: No such file or directory
    8 | #include <stm32-reset-core.h>
      |          ^~~~~~~~~~~~~~~~~~~~

As stm32-reset-core.h is located in same directory than stm32-reset-mp21.c,
we should use #include "stm32-reset-core.h".

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Raphaël Gallais-Pou <rgallaispou@gmail.com>
2026-05-12 15:52:53 +02:00
Patrice Chotard
43ba37376b arm/mach-stm32: Remove remaining non-existent STM32_RESET
Symbol CONFIG_STM32_RESET does not exist.
Don't select it.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-05-12 15:52:36 +02:00
Dario Binacchi
4300f9f4c5 board: st: stm32mp25: support dynamic A/B bank bootup
Enable automatic detection of the active A/B bank by retrieving
partition GUIDs from FWU metadata.

This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.

To enable A/B bank bootup on stm32mp25 boards, add the following Kconfig
options to the stm32mp25_defconfig:

 CONFIG_FWU_MULTI_BANK_UPDATE=y
 CONFIG_FWU_MDATA=y
 CONFIG_FWU_NUM_BANKS=2
 CONFIG_FWU_NUM_IMAGES_PER_BANK=3
 CONFIG_CMD_FWU_METADATA=y
 CONFIG_FWU_MDATA_V2=y

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-05-12 15:52:01 +02:00
Dario Binacchi
63fc73ff31 test: dm: fwu_mdata: add test for fwu_mdata_get_image_guid
Add a new unit test for the fwu_mdata_get_image_guid() function.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
97cdde6dfa fwu: add helper to get image GUID by type and bank index
Introduce fwu_mdata_get_image_guid() to retrieve a specific image GUID
from the FWU metadata based on the bank index and image type GUID.

This allows identifying the correct partition in multi-bank (A/B)
scenarios, ensuring the correct image is targeted depending on the
current bank.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
2dc71c48bf test: cmd: part: add UUID lookup tests
Extend the 'part' command unit tests to include partition lookup via
UUID.

This ensures that the 'number', 'start', and 'size' subcommands
consistently handle UUIDs as partition identifiers, maintaining
parity with the name-based lookup functionality.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
703f8c313d cmd: part: support lookup by UUID
The 'part' command currently allows looking up a partition only by its
number or name.

Extend the 'number', 'start', and 'size' subcommands to support looking
up the partition via its UUID. Unlike names, UUIDs guarantee unique
partition identification, avoiding ambiguity.

The logic is updated to check if the provided string is a valid UUID
before falling back to a name-based search. The help strings for these
subcommands are updated accordingly.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
a392450189 test: cmd: add unit tests for part command
Add unit tests for the 'part' command, specifically for the 'number',
'start', and 'size' subcommands.

These tests establish a baseline for the current partition lookup
functionality by name. This foundation will be used by subsequent
patches to extend the command, ensuring consistent behavior as new
features are introduced.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
27a928553a test: dm: part: add test for part_get_info_by_uuid
Add a new unit test for the part_get_info_by_uuid() function.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Dario Binacchi
2a55938b42 lib: uuid: add partition type GUID for extended bootloader
The Extended Boot Loader Partition (XBOOTLDR) is a standard defined by
the Discoverable Partitions Specification (DPS) to host boot loader
resources outside of the EFI System Partition ([1], [2]).

Defining this GUID (bc13c2ff-59e6-4262-a352-b275fd6f7172) allows U-Boot
to correctly identify and label these partitions using the "xbootldr"
shorthand.

[1] https://uapi-group.org/specifications/specs/discoverable_partitions_specification/#extended-boot-loader-partition:~:text=UEFI%20Specification.-,Extended%20Boot%20Loader%20Partition,-bc13c2ff%2D59e6%2D4262
[2] https://uapi-group.org/specifications/specs/boot_loader_specification/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-12 15:52:01 +02:00
Austin Shirley
467dc9a44b configs: stm32mp13: add SPI-NAND UBI boot support
The STM32MP13 default environment only handles MMC and serial/USB boot.
When TF-A reports BOOT_FLASH_SPINAND the boot_device variable is set to
'spi-nand' but bootcmd_stm32mp never redirects boot_targets to ubifs0,
so distro_bootcmd falls through to MMC/USB.

This change mirrors the STM32MP15 logic:
 - Add a BOOT_TARGET_UBIFS entry to BOOT_TARGET_DEVICES so that
   bootcmd_ubifs0 is defined (ubi part UBI; ubifsmount ubi0:boot).
 - Add the 'spi-nand' / 'nand' clause to bootcmd_stm32mp so that
   boot_targets is set to 'ubifs0' when booting from NAND.

Signed-off-by: Austin Shirley <austin@deadband.dev>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
2026-05-12 15:50:47 +02:00
Kory Maincent
d5ea30b233 tools: fwumdata: Fix use-after-free in parse_config()
In parse_config(), devname is dynamically allocated by sscanf().
When sscanf() fails to fill enough fields (rc < 3), devname is freed and
the loop continues to the next line. However, if the next call to sscanf()
fails to match (rc == 0), devname is not written and still holds the stale
freed pointer. The subsequent free(devname) then operates on
already-freed memory.

Fix this by resetting devname to NULL before each sscanf() call, so
that a non-matching call leaves a NULL pointer and the subsequent
free() becomes a harmless no-op.

Reported-by: Coverity Scan
Link: https://lists.denx.de/pipermail/u-boot/2026-April/614161.html
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-05-12 09:31:51 +03:00
Tom Rini
5732bd0f45 Prepare v2026.07-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-11 16:05:08 -06:00
Tom Rini
07316f1fe7 Merge tag 'dm-pull-11may26b' of git://git.denx.de/u-boot-dm
CI: https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/30065

- Add missing bintool docstrings
- Minor patman fix
- Fix small ACPI bug
2026-05-11 14:44:30 -06:00
Tom Rini
1d8526fa7c Merge patch series "j721s2: j784s4: Add workaround for errata i2437"
Udit Kumar <u-kumar1@ti.com> says:

Add a necessary hardware errata workaround for J721S2 and J784S4.

Bootlogs
https://gist.github.com/uditkumarti/da2a489a78d3241ecd2791c9df1c1317

Link: https://lore.kernel.org/r/20260415152152.3048491-1-u-kumar1@ti.com
2026-05-11 12:33:52 -06:00
Neha Malcom Francis
c5c3b27873 arch: mach-k3: j784s4_init: Add workaround for errata i2437
Add the workaround proposed for J784S4 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.

Link: https://www.ti.com/lit/pdf/sprz536
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2026-05-11 12:32:00 -06:00
Neha Malcom Francis
d99cb46a2c arch: mach-k3: j721s2_init: Add workaround for errata i2437
Add the workaround proposed for J721S2 errata i2437 (link) for SE
clock-gating turning off too early. Without this, a hardware bug present
in C7120 leads to C7120 CPU hanging.

Link: https://www.ti.com/lit/pdf/sprz530
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2026-05-11 12:32:00 -06:00
Udit Kumar
ad681c8164 arm: mach-k3: arm: mach-k3: Add writel_verify macro for register write verification
Add a helper macro to write and verify a 32-bit value to a memory-mapped
register. This is essential for hardware errata workarounds that require
confirmation that register writes have taken effect before proceeding with
initialization.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2026-05-11 12:32:00 -06:00
Tom Rini
02ef1859b4 configs: Resync with savedefconfig
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-11 12:26:03 -06:00
Peter Collingbourne
d5888d509c fs: ubifs: fix bugs involving symlinks in ubifs_findfile
When encountering a symlink pointing to an absolute path, ubifs_findfile
would return the target of the symlink as the result instead of resolving
any following components in the original path. Fix it by following the
same code path that is used for relative paths except that we set the
next inode to the root if we see a leading slash.

The existing code used memcpy and sprintf to copy the symlink target
into a fixed size stack buffer and was therefore vulnerable to buffer
overflows with a sufficiently long symlink target. Fix it by using a
heap buffer for the temporary path during path resolution.

Signed-off-by: Peter Collingbourne <peter@pcc.me.uk>
Fixes: 9d7952e4c6 ("ubifs: Add support for looking up directory and relative symlinks")
2026-05-11 12:18:56 -06:00
Simon Glass
08bcf962c5 binman: Use bintool wrappers for PKCS#11 tools in tests
The PKCS#11 signing tests in ftest.py call tools.run('softhsm2-util', ...)
directly (and the equivalent for pkcs11-tool and p11-kit), even though
the test setup has already constructed the corresponding Bintool
instances. As Quentin Schulz observed on v1, the bintool wrapper for
these tools is currently used only as an "is this installed?" probe.

Route the eight remaining call sites in ftest.py through
<bintool>.run_cmd(...), which the Bintool base class already provides.
The change is test-side only; no production binman code calls these
tools.

Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:05:10 -06:00
Simon Glass
44f9ccfdad binman: Flesh out the softhsm2-util bintool docstring
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.

Extend the docstring with a short description of what softhsm2-util
does and how binman uses it, so the generated documentation has useful
content.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:05:10 -06:00
Simon Glass
40c94fbf62 binman: Flesh out the pkcs11-tool bintool docstring
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.

Extend the docstring with a short description of what pkcs11-tool does
and how binman uses it, so the generated documentation has useful
content.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:05:10 -06:00
Simon Glass
4dc8f10edf binman: Flesh out the p11-kit bintool docstring
The Sphinx-generated bintools.rst currently produces an empty section
for this bintool, since its class docstring is only a single line and
so the body under the heading is blank.

Extend the docstring with a short description of what p11-kit does and
how binman uses it, so the generated documentation has useful content.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:05:10 -06:00
Ludwig Nussel
49fc812eb4 patman: fix use in worktree
When using a worktree '.git' actually is a file and pygit2
init_repository() does not like that. The intention is not to create
a new git repo anyway so use normal constructor instead of
init_repository().

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:05:10 -06:00
Heinrich Schuchardt
3d09ec64eb acpi: fix initial RSDT and XSDT size
When creating the RSDT and the XSDT table they contain no entries.
The table size therefore must equal the header size.

Without this change a NULL deference has been observed in
acpi_find_table() when running `ut dm` on sandbox64_defconfig
executed via `sudo ./u-boot -D`.

Fixes: 94ba15a3f1 ("x86: Move base tables to a writer function")
Fixes: 7e586f6907 ("acpi: Put table-setup code in its own function")
Fixes: ab5efd576c ("x86: acpi: Adjust order in acpi_table.c")
Fixes: 867bcb63e7 ("x86: Generate a valid ACPI table")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Update dm_test_acpi_ctx_and_base_tables() in test/dm/acpi.c to expect
sizeof(struct acpi_table_header) for the initial table length (instead
of sizeof(*rsdt) / sizeof(*xsdt)), and to compute the checksum over
header->length bytes rather than the full struct size:
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-05-11 12:04:43 -06:00
Tom Rini
22a285380e Merge tag 'u-boot-at91-fixes-2026.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 fixes for the 2026.07 cycle:

- Cleanup some useless code
2026-05-09 07:31:55 -06:00
Tom Rini
0dcb892fea Merge branch 'master' of git://source.denx.de/u-boot-usb
- DWC3 crash fix, Kconfig logic corrections
2026-05-09 07:31:22 -06:00
Balaji Selvanathan
cc8195b13b usb: dwc3: Fix crash on fastboot exit due to incorrect memory free
The dwc3_free_one_event_buffer() function incorrectly called free()
on event buffer structures allocated with devm_kzalloc(). This
caused heap corruption and a synchronous abort when exiting
fastboot mode via "fastboot continue".

Device-managed memory is automatically freed when the device is
removed, so manual deallocation causes the heap allocator to access
corrupted metadata.

Fixes: 884b10e86a ("usb: dwc3: core: fix memory leaks in event buffer cleanup")
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
2026-05-09 02:26:58 +02:00
Tom Rini
5040410102 usb: Correct dependencies around USB_EMUL
The symbol USB_EMUL is how sandbox has access to USB. It's
implementation however enforces a few other requirements. It must have
SCSI enabled, and in turn that means it must have BLK enabled. Finally,
we should not be using SANDBOX itself as a symbol to decide what to
build or not build here, as SANDBOX is selected for COMPILE_TEST builds
as well and so may not have enabled the sandbox specific USB support.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
2026-05-09 00:24:53 +02:00
Tom Rini
93f96c7d8d reset: Correct dependencies for RESET_RZG2L_USBPHY_CTRL
As exposed by "make randconfig", we have an issue with the dependencies
for RESET_RZG2L_USBPHY_CTRL. As this functionally depends on
REGULATOR_RZG2L_USBPHY, express this dependency directly in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-09 00:24:53 +02:00
Tom Rini
ebe2af6cd8 usb: gadget: Correct dependencies for USB_RENESAS_USBHS
The USB_RENESAS_USBHS functionality can only work with DM_USB_GADGET
enabled, so express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-09 00:24:53 +02:00
Aristo Chen
28eed2103c test: fit: Use shared make_fname from fit_util
test_fit.py declares a local make_fname closure that is byte-identical
to fit_util.make_fname. Drop the local copy and call the shared helper
at all seven call sites so there is one definition to maintain.

No behavioural change. Both implementations return
os.path.join(ubman.config.build_dir, basename).

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-08 15:49:27 -06:00
Ludwig Nussel
18806dae0e virtio: fix boot device hunting in qemu with virtio
Commit 70101c3217 ("virtio: mmio: Return error codes on probe
failures") returns -ENODEV where it would return 0 before. That path is
apparently hit in qemu and breaks boot device discovery
(virtio_bootdev_hunt() expects only ENOENT). So return -ENOENT in
that path instead.
The remaining two error returns in the function are untouched as I
don't know where they play a role.

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Kuan-Wei Chiu <visitorckw@gmail.com>
2026-05-08 15:49:27 -06:00
Rasmus Villemoes
55b152e6f0 boot: image-fit.c: check target, not source, for 8-byte alignment when loading FDT
A number of our boards no longer boot with v2026.04, ironically as a
result of the effort to ensure 8-byte alignment of the dtb passed to
the kernel and getting rid of the fdt_high=0xffffffff.

The problem exists when the FIT image does specify a (properly
aligned) load address to use for the fdt. For example, we have

	fdt-am335x-boneblack.dtb {
		description = "Flattened Device Tree blob";
		data = /incbin/(...);
		...
		load = <0x88000000>;
	}

Now, with v2026.04 and depending on just exactly where that data ends
up, in a good case we see

     Loading fdt from 0x8a8c6e10 to 0x88000000
     Booting using the fdt blob at 0x88000000
  Working FDT set to 88000000
     Loading Kernel Image to 86008000
  WARNING:
  The 'fdt_high' environment variable is set to ~0. This is known to cause
  boot failures due to placement of DT at non-8-byte-aligned addresses.
  This system will likely fail to boot. Unset the 'fdt_high' environment
  variable and submit a fix upstream.
     Using Device Tree in place at 88000000, end 8801af2f
  Working FDT set to 88000000
  Starting kernel ...
  [    0.000000] Booting Linux on physical CPU 0x0

and the board boots (though with that ominous warning). However,
modifying the .its file a little, e.g. just removing the word "blob"
from the description, we end up with

     Loading fdt from 0x8a8c6e14 to 0x88000000
     Booting using the fdt blob at 0x9df94718
  Working FDT set to 9df94718
     Loading Kernel Image to 86008000
  WARNING:
  The 'fdt_high' environment variable is set to ~0. This is known to cause
  boot failures due to placement of DT at non-8-byte-aligned addresses.
  This system will likely fail to boot. Unset the 'fdt_high' environment
  variable and submit a fix upstream.
  Failed to reserve memory for fdt at 0x9df94718
  FDT creation failed!
  resetting ...

Notice how the "Loading fdt from" line still claims to load the fdt to
that 0x88000000 address, but since this "else if" clause looks at the
source address (buf) and comes before the "else if (load != data)"
clause, we end up doing the "allocate another buffer to use as target"
instead of actually copying to 0x88000000, but then the "fdt_high=~0"
logic in boot_relocate_fdt() obviously fails to do an lmb-reservation
of that area, and the boot fails.

When there's no load= property in the fdt node, this should not change
anything. But when there is, it is the alignment of that target which
is relevant, not the alignment of the fdt blob within the FIT
image. With this patch applied, we instead get the expected

     Loading fdt from 0x8a8c6e14 to 0x88000000
     Booting using the fdt blob at 0x88000000
  Working FDT set to 88000000
     Loading Kernel Image to 86008000
  WARNING:
  The 'fdt_high' environment variable is set to ~0. This is known to cause
  boot failures due to placement of DT at non-8-byte-aligned addresses.
  This system will likely fail to boot. Unset the 'fdt_high' environment
  variable and submit a fix upstream.
     Using Device Tree in place at 88000000, end 8801af2f
  Working FDT set to 88000000

  Starting kernel ...

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Fixes: 8fbcc0e0e8 ("boot: Assure FDT is always at 8-byte aligned address")
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-08 15:49:27 -06:00
Raymond Mao
0a31d3128e lib: fdtdec: validate bloblist FDT before consuming libfdt size
Coverity Scan defects are observed in fdtdec_apply_bloblist_dtos(),
since the live FDT taken from the bloblist is passed to libfdt helpers
which consume header size/offset fields:
- fdt_open_into()
- fdt_pack()

Validate the bloblist FDT with fdt_check_full() before calling
fdt_open_into() and again after applying overlays before calling
fdt_pack(). This makes the libfdt consumers operate on a checked FDT
blob while keeping the existing flow unchanged.

Also normalize libfdt return codes from this path to errno values,
including the overlay callback path through bloblist_apply_blobs().

Fixes: b70cbbfbf9 ("fdtdec: apply DT overlays from bloblist")
Addresses-Coverity-ID: CID 645837: (TAINTED_SCALAR)
Signed-off-by: Raymond Mao <raymond.mao@riscstar.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2026-05-08 15:49:27 -06:00
Brad Klingerman
26b17dbdb0 Makefile: remove block from conv=block, sync in SPL alignment dd
The line that produces $(SPL_BIN)-align.bin invokes dd with
conv=block,sync but no cbs= operand. The result of dd conv=block
without cbs= is unspecified. GNU coreutils outputs anyway, but
uutils (default in Ubuntu 26.04 LTS) errors out for files with
newlines, including SPL binaries, producing:

    dd: conv=block or conv=ubnblock specified without cbs=N

Either the block operand must be removed, or cbs=N must be added.
conv=block is for converting newline-terminated variable-length
records to fixed-length space-padded ones, which is meaningless
for a binary SPL image. The intent of the rule is 4-byte
alignment, which conv=sync alone provides by padding the final
block to bs= bytes with NULs.

During build, u-boot-spl-align.bin errors silently due to '@'.

Reproduced with uutils dd 0.8.0:

    $ dd if=/dev/urandom of=/tmp/in bs=1 count=10000
    $ dd if=/tmp/in of=/tmp/out conv=block,sync bs=4
    dd: conv=block or conv=unblock specified without cbs=N
    $ dd if=/tmp/in of=/tmp/out conv=sync bs=4
    [succeeds]

Output is byte-identical to GNU dd's output for binary input.

Signed-off-by: Brad Klingerman <bdklingerman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-05-08 15:49:27 -06:00
Tom Rini
3cdd19089f Merge tag 'mmc-for-2026.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-mmc
- Enable FPWM bits for tps65941
- Use max-frequency to get clock rate for msm_sdhci
- Fix and update for pfuze100
2026-05-06 20:13:39 -06:00
Tom Rini
e08877916e Merge tag 'mips-fixes-for-v2026.07' of https://source.denx.de/u-boot/custodians/u-boot-mips
- mips: mtmips: align MT7621 image blobs to 8-byte boundary
2026-05-06 08:55:26 -06:00
Tom Rini
8399b039b0 Merge tag 'efi-2026-07-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2026-07-rc2-2

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29993

UEFI:

* initialize variables in efi_dp_from_http()
* cmd: eficonfig: adjust struct eficonfig_entry, field key
* efi_dt_fixup: use fdtdec_get_bool() for reading boolean no-map property
* efi_selftest_memory: check for duplicates first
* simplify efi_mem_sort() using list_for_each_entry_safe

Others:

* lmb: document allocation flags constants
2026-05-06 08:45:57 -06:00
Tom Rini
980f8a4589 Merge tag 'net-20260506' of https://source.denx.de/u-boot/custodians/u-boot-net
Pull request net-20260506.

net:
- phy: dp83867: default to 2ns delay if unspecified in device-tree
- nfs: fix buffer overflow in nfs_readlink_reply()
- cpsw: Add cpsw-switch DT binding support
- phy: add common PHY polarity properties support
- phy: adin: add support for the ADIN1200 phy
- macb: support for instances with less features
- phy: mscc: add support for the VSC8572

net-lwip:
- wget: correct diagnostic output
2026-05-06 08:44:55 -06:00
Tom Rini
ffdce9d3fb Merge tag 'fsl-qoriq-for-2026.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add USB Hub (USB5744) management support for ten64
- Various DT fixes for ls1088a
- Fix dead default for SYS_L3_SIZE for powerpc
2026-05-06 08:43:32 -06:00
Shiji Yang
de79075f0f mips: mtmips: align MT7621 image blobs to 8-byte boundary
MT7621 doesn't boot on u-boot v2026.04. Fix it by correcting the
u-boot aligned offset.

Fixes: d9e183a04c ("MIPS: Assure end of U-Boot is at 8-byte aligned offset")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2026-05-06 16:20:27 +02:00
Charles Perry
5245bdc98b net: phy: mscc: add support for the VSC8572
This is similar to the VSC8574 according to the Linux commit that adds
support for it [1].

This was tested on an HX1000 board with SGMII (PIC64-HX SoC which has a
GEM MAC).

[1]: https://lore.kernel.org/all/dfabe39a52efcd2cfff9358f271b8673143503b8.1480497966.git.neill.whillans@codethink.co.uk/

Signed-off-by: Charles Perry <charles.perry@microchip.com>
Reviewed-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2026-05-06 11:07:22 +02:00
Christian DREHER
9717831e29 net: macb: add gigabit implementation for fixed-link
A fixed gigabit link on a non-gigabit controller is only rejected
during PHY init (even though there is no PHY to init), because, on
device-tree parsing, the controller is not probed, and it is still
unknown whether it is gigabit-capable.

This code was only tested on emulator with a full-duplex RGMII
interface, but is expected to work in GMII or half-duplex as well.

Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
2026-05-06 11:07:22 +02:00
Christian DREHER
d7fe1f4333 net: macb: do not set user_io when it does not exist
Cadence Ethernet MAC has a feature named user_io, which provides
some input and some output signals for arbitrary purpose in the SoC.
From the driver code, I understand that, on Atmel SoC, it is used to
drive the PHY mode.

At least on Cadence IP7014 r1p12, this feature is optional, and I am
working on a SoC that does not instantiate it. The presence of this
feature is advertised in DCFG1, this patch merely disables the access
to the user_io register based on this information.

I did not apply this change to the non-gigabit capable versions of
the IP, as I do not have documentation for them, and a new non-gigabit
instance is unlikely to appear. I prefer avoiding regressions on old
systems.

Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
2026-05-06 11:07:22 +02:00
Christian DREHER
361bb8f827 net: macb: use SA1 for MAC filtering on GEM
The MACB uses specific address registers (SA Top and Bottom) to
filter source or destination MAC addresses.
On the Gigabit Ethernet version, SA1B is @0x88.
On the non-GEM version, SA1B is @0x98.

Before this commit, the code was always writing 0x98. By chance,
on GEM, this is the address of SA3B, allowing the driver to work
anyway.

The motivation for this change is to be able to use the driver on
an instance of the GEM with less than 4 SA registers.

Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
2026-05-06 11:07:22 +02:00
Christian DREHER
9e23095298 net: macb: include arch/clk.h only when necessary
It does not exist in my setup (an on-going arm64 SoC), and removing
it does not cause any missing declaration, but some code called when
CONFIG_CLK is missing calls get_macb_pclk_rate, which is only defined
in arch/arm/mach-at91/include/mach/clk.h

Signed-off-by: Christian DREHER <christian.dreher@nanoxplore.com>
2026-05-06 11:07:22 +02:00
Rasmus Villemoes
52309be1d5 net: phy: adin: add support for the ADIN1200 phy
The ADIN1200 chip is register compatible with the ADIN1300, but only
supports 10/100 Mbit.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
2026-05-06 11:07:22 +02:00
Lucien.Jheng
615c536717 test: dm: add PHY common props unit tests and sandbox DT nodes
Add sandbox DM unit tests for the PHY common properties library and the
corresponding device tree test nodes to arch/sandbox/dts/test.dts.
Also enable CONFIG_PHY_COMMON_PROPS in configs/sandbox_defconfig so
the tests are built and run in the sandbox environment.

The test file covers rx/tx polarity lookups for all relevant cases:

  - missing property (defaults to PHY_POL_NORMAL)
  - single value without names array (applies to all modes)
  - count mismatch between values and names arrays (-EINVAL)
  - name found by exact match
  - name not found with no "default" fallback (-EINVAL)
  - name not found with a "default" entry (uses fallback value)
  - unsupported polarity value (-EOPNOTSUPP)

Ported from Linux KUnit test:
  linux/drivers/phy/phy-common-props-test.c

Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
2026-05-06 11:07:22 +02:00
Lucien.Jheng
c008ffdf61 net: phy: airoha: air_en8811: use standard rx-polarity/tx-polarity properties
Replace the proprietary airoha,pnswap-rx / airoha,pnswap-tx boolean
device tree properties with the standard rx-polarity and tx-polarity
properties defined in phy-common-props.yaml.

Backward compatibility is maintained by reading the legacy boolean
properties first and passing them as the default_pol argument to
phy_get_rx/tx_polarity(). If the standard properties are absent the
legacy values are used transparently, so existing device trees remain
functional without modification.

Link: https://git.kernel.org/linus/66d8a334b57e64e43810623b3d88f0ce9745270b
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
2026-05-06 11:07:22 +02:00
Lucien.Jheng
9eca7fd0d3 phy: add common PHY properties support
Add a new PHY_COMMON_PROPS library that provides helper functions for
PHY drivers to read standardized polarity properties from the device
tree node:

  - phy_get_rx_polarity() / phy_get_tx_polarity()
  - phy_get_manual_rx_polarity() / phy_get_manual_tx_polarity()

The dt-bindings/phy/phy.h header with PHY_POL_NORMAL, PHY_POL_INVERT,
and PHY_POL_AUTO constants is provided via dts/upstream/include, which
is already in the build include path.

Ported from Merge tag 'phy-for-7.0':
  git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Link: https://git.kernel.org/linus/e7556b59ba65179612bce3fa56bb53d1b4fb20db
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
2026-05-06 11:07:22 +02:00
Markus Schneider-Pargmann (TI)
5bb7ae8921 net: cpsw: Support new cpsw-switch DT bindings
Upstream devicetrees use a newer DT binding using cpsw-switch
compatibles. The bindings are a bit different, so two functions are
introduced to capture the differences, cpsw_eth_of_to_plat_switch() and
cpsw_eth_of_to_plat_legacy().

Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
2026-05-06 11:07:22 +02:00
Markus Schneider-Pargmann (TI)
a1bc52f489 net: cpsw: Use driver data for phy_sel
Use driver data to pass the correct gmii_sel function. This way new
compatibles don't need manual compatible matching as is done in
cpsw_phy_sel().

Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
2026-05-06 11:07:22 +02:00
Markus Schneider-Pargmann (TI)
63f6f88bb0 net: cpsw: Remove compat string argument
The string is already in the priv struct, remove it from the argument
list.

Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
2026-05-06 11:07:22 +02:00
Markus Schneider-Pargmann (TI)
845c55dde8 net: cpsw: Fix error message
It should complain about mac_control here.

Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
2026-05-06 11:07:22 +02:00
Heinrich Schuchardt
94625af011 net: lwip/wget: don't print progress bar when silent
When the EFI sub-system request to silence output, do not output a progress
bar.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-05-06 11:07:22 +02:00
Heinrich Schuchardt
e093a4ecbe net: lwip/wget: don't print content size twice
If wget_info->silent is set, we should not print anything.

If wget_info->silent we print the received content size.
Printing the value of the Content-Length header is redundant

For chunked transfer no Content-Length header is sent.
The content length is returned as HTTPC_CONTENT_LEN_INVALID by the LwIP
library. In this case we were incorrectly printing '4 GiB'.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-05-06 11:07:22 +02:00
Heinrich Schuchardt
4877a07ed3 net: lwip/wget: missing linefeed in diagnostic output
With NET_LWIP wget produces this output with an overlong line
and missing white space:

    => wget $kernel_addr_r http://example.com/
    #################################################  4 GiB540 bytes transferred in 2 ms (263.7 KiB/s)
    Bytes transferred = 540 (21c hex)

Removing the condition on inserting a line feed yields:

    => wget $kernel_addr_r http://example.com/
    #################################################  4 GiB
    540 bytes transferred in 2 ms (263.7 KiB/s)
    Bytes transferred = 540 (21c hex)

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-05-06 11:07:22 +02:00
Sebastian Josue Alba Vives
d6694018ea net: nfs: fix buffer overflow in nfs_readlink_reply()
nfs_readlink_reply() validates rlen only against the incoming packet
length (inherited from CVE-2019-14195), but not against the destination
buffer nfs_path_buff[2048]. A malicious NFS server can send a valid
READLINK reply where pathlen + rlen exceeds sizeof(nfs_path_buff),
overflowing the BSS buffer into adjacent memory.

The recent fix in fd6e3d3409 addressed the same overflow class in
net/lwip/nfs.c but left the legacy path in net/nfs-common.c unpatched.

Add bounds checks before both memcpy calls in nfs_readlink_reply():
- relative path branch: reject if pathlen + rlen >= sizeof(nfs_path_buff)
- absolute path branch: reject if rlen >= sizeof(nfs_path_buff)

Fixes: cf3a4f1e86 ("net: nfs: Fix CVE-2019-14195")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Alba Vives <sebasjosue84@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-05-06 11:07:22 +02:00
Siddharth Vadapalli
e86d1c0b88 net: phy: dp83867: default to 2ns delay if unspecified in device-tree
Since Linux commit c360eb0c3ccb ("dt-bindings: net: ethernet-controller:
Add informative text about RGMII delays"), the interpretation of RGMII
delays has changed. Prior to the commit, the RGMII Variant among "rgmii",
"rgmii-id", "rgmii-rxid" and "rgmii-txid" clearly specified whether it is
the MAC or the PHY that "should" add the delay. However, post that commit,
the RGMII Variant only specifies whether or not there is a delay on the
PCB traces between the MAC and the PHY, leaving it open as to who adds the
delay.

Hence, instead of enforcing the existence of the device-tree properties
"ti,rx-internal-delay" and "ti,tx-internal-delay", default to a delay
of 2ns, while continuing to override this delay with the aforementioned
properties, if they exist in the device-tree.

This is in line with the Linux driver implementation updated by commit
6bf78849371d ("net: phy: dp83867: use 2ns delay if not specified in DTB").

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
2026-05-06 11:07:22 +02:00
Mathew McBride
dea0973723 configs: ten64: add USB start to preboot
There are two reasons why the USB stack needs to be
started before handing to bootflow or other boot
sequences:

1. When a USB hub is present on the board, we need to
do the required sequences to make it usable

2. To make USB storage devices 'visible' to bootflow
without further intervention

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:49 +08:00
Mathew McBride
e7e0cd82b7 arm: dts: remove local copy of Ten64 board DTS
This board has been migrated to the upstream / kernel
device tree version (OF_UPSTREAM), so remove the
old 'local' copies that are no longer required.

However, the -u-boot.dtsi append needs to remain,
because the SoC fsl-ls1088a-u-boot.dtsi is required
for some devices (like PCIe controllers and DPAA2 ethernet)
to properly enumerate under U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:49 +08:00
Mathew McBride
9bcbb5f268 configs: ten64: switch to OF_UPSTREAM
Two recent additions to the mainline device tree allow us
to switch away from the local U-Boot copy:

* Board/embedded controller (traverse,ten64-controller)
  is now in the mainline device tree.
* USB Hub (USB5744) connections were also added to
  the mainline device tree but not in U-Boot.

The LS1088A and Ten64 device trees in U-Boot were actually
'synced' to mainline some time ago, so the content
(except for the changes mentioned above) is identical.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:49 +08:00
Mathew McBride
6cdd17aed5 configs: ten64: enable USB_ONBOARD_HUB (USB5744) option
Ten64 board revs A through C have a Microchip USB5744
hub on the board, which must be configured over I2C
at boot time to become usable.

This function has not been part of the mainline
U-Boot for this board until now, as a mainline driver
and device-tree binding is now available for the USB5744.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:49 +08:00
Mathew McBride
327ac9cc80 configs: ten64: enable OF_BOARD_FIXUP
We have added board_fix_fdt to remove elements from U-Boot's
internal FDT related to the USB hub, so CONFIG_OF_BOARD_FIXUP
needs to be enabled to utilize it.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:48 +08:00
Mathew McBride
3b5f6b62b0 board: ten64: remove USB hub references from internal FDT when needed
More recent revisions of the Ten64 board do not have a USB Hub
(USB5744). The references to the USB5744 need to be removed in U-Boot's
internal FDT to avoid the USB5744 setup being invoked on these boards.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:48 +08:00
Mathew McBride
024c3e86ea board: ten64: add fdt fixup to hide usb hub topology
The USB Hub (microchip,usb5744) can enter a dis-/reconnect loop
if a driver tries to re-initialise the hub over I2C.

On the Ten64 board, this process only needs to be run once
per system reset cycle, which is carried out by U-Boot.

As there are distributions shipping with the affected
driver by default, the best solution is to remove
the USB hub topology information from the FDT passed
to the operating system, so the OS won't attempt
to re-initialise the USB hub under any circumstance.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:48 +08:00
Mathew McBride
d360217d4a arm: gpio: include integer type definitions for gpio.h
Both consumers and sub-arch specific versions of gpio.h
may reference stdint or other non-C90 type definitions.

Ensure the common ones are available by including linux/types.h
before any other headers.

This issue came to light when the usb onboard hub driver
was enabled for ten64_tfa_defconfig:

In file included from ./arch/arm/include/asm/gpio.h:2,
		 from common/usb_onboard_hub.c:10:
./arch/arm/include/asm/arch/gpio.h:17:9: error: unknown type name 'ulong'
   17 |         ulong addr;
./arch/arm/include/asm/arch/gpio.h:18:9: error: unknown type name 'ulong'
   18 |         ulong size;
./arch/arm/include/asm/arch/gpio.h:19:9: error: unknown type name 'uint'
   19 |         uint ngpios;

(In this instance, the cited errors actually originate from
arch/arm/include/asm/arch-fsl-layerscape/gpio.h, which is included
by the arm top level asm/gpio.h)

Implemented as per suggestion from Quentin Schulz in Link:

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Link: https://lore.kernel.org/u-boot/35038a9a-fa5a-4f9f-b34e-17cc80a7824c@cherry.de/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 16:04:48 +08:00
Ye Li
aedaa8250b arm: dts: layerscape: Fix SPI flash compatible string issue
When CONFIG_DM_SPI_FLASH is enabled, sf command will default find
device from DT which requires to use "jedec,spi-nor" compatible
string not obsoleted "spi-flash". So update NXP LS DTS to use
new compatible string

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:30:11 +08:00
Ye Li
8c60833124 arm: dts: layerscape: Fix DT build warning in SPI nodes
There are lots of DT warning in layerscape DTS files like:
node name for SPI buses should be 'spi' and SPI bus unit address
format error.
Update the spi node name and flash node name to avoid build warning

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:30:11 +08:00
Ye Li
d47f02d9ca arm: dts: fsl-ls1088a: Enable USB nodes
Enable USB nodes in -u-boot.dtsi. After sync dts with kernel, USB
nodes status are set to disabled. So "usb start" does not work on
ls1088ardb and ls1088aqds.

Fixes: 10ff7e6b04 ("arm: dts: fsl-ls1088a: sync usb controller nodes with Linux")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:30:00 +08:00
Ye Li
5fadfd623a arm: dts: fsl-ls1088a: Enable SD device
Due to update of fsl-ls1088a.dtsi in previous patch, the esdhc
node is disabled, so u-boot can't to probe any eSDHC controller.

Fixes: fd4f7b0158 ("arm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc")
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:29:59 +08:00
Ye Li
8e33f7ac90 arm: dts: fsl-ls1088a: Set dpmac nodes default to disabled
Disable ethernet controller dpmac nodes in fsl-ls1088a.dtsi. Board
dts is responsible to enable them. Otherwise will meet failure from
ldpaa_eth driver on LS1088AQDS board, because only few dpmac
controllers can be enabled on this board.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:29:44 +08:00
Ye Li
5a0343350a arm: dts: fsl-ls1088a-qds: Fix missed -u-boot.dtsi
LS1088AQDS u-boot contains multiple DTB files:
fsl-ls1088a-qds-21-x.dtb and fsl-ls1088a-qds-29-x.dtb.
It does not use default device tree fsl-ls1088a-qds.dtb

However, the nodes updated in fsl-ls1088a-qds-u-boot.dtsi are not
included for fsl-ls1088a-qds-21-x.dts and fsl-ls1088a-qds-29-x.dts,
so fail to get any output from serial.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Wei Lu <w.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:29:44 +08:00
Ye Li
33ff22c0b1 arm: layerscape: Check zero size memory bank before lmb_add
In layerspace's lmb_arch_add_memory implementation, all memory bank
are added to lmb, even some is with zero size. This will cause lmb
treating it as overlap with available memory by lmb_addrs_overlap
and merge with available memory. Finally causing available memory
start address changed to 0.

For example, on LX2160, before zero memory bank added to lmb, there
are two available memory regions:
  - region 0, start 0x80000000, size 0x7be00000
  - region 1, start 0x2080000000, size 0x700000000
After zero size memory bank added, merge to one region:
  - region 0, start 0, size 0x2780000000
This wrong new region causes efi_memory_init issue when allocating bounce
buffer because of conflict address (with uboot reserved) is allocated.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:29:33 +08:00
Julian Braha
34127dff31 powerpc: fix dead default for SYS_L3_SIZE
The 'default ... if SYS_L3_SIZE_512KB' statement is written twice, making
the second instance dead code.

Based on the context, I believe the author of the code intended to set a
default value of '1048576' when SYS_L3_SIZE_1024KB is set.

This dead code was detected by kconfirm, a static analysis tool for
Kconfig.

Fixes: b85d75951f ("powerpc: Migrate SYS_L3_SIZE to Kconfig")
Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:28:35 +08:00
Varadarajan Narayanan
f07c15c16a mmc: msm_sdhci: Use max-frequency to get clock rate
msm_sdc_clk_init() uses clock-frequency to get the clock rate for SDC
clocks. However, the DT files seem to use max-frequency for the same.
Since msm_sdc_clk_init() doesn't find clock-frequency in the DT, it sets
201500000 as the clock rate and this results in timeout errors on IPQ
platforms.

Additionally, clock-frequency is not DT bindings compliant. Hence, get
clock rate using DT bindings compliant max-frequency.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:30 +08:00
Peng Fan
2a628fee83 power: regulator: Correct Kconfig for PFUZE100
Use CONFIG_$(PHASE_)DM_REGULATOR_PFUZE100 as the build condition for
pfuze100 regulator driver.
Add Kconfig option for SPL_DM_REGULATOR_PFUZE100.
To avoid break current platforms, set the Kconfig default value same
as PMIC_PFUZE100.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:30 +08:00
Peng Fan
e015bc1b8d power: regulator: pfuze100: support non-independent mode
Some BUCKs could work in single/dual phase mode, not in independent
mode. In single/dual phase mode, registers of both regulators,
must be identically set. So configure mode and value for both BUCKs.

CONF registers are not touched, leave them as default OTP settings.

PFUZE100/200 SW3A/B, could work in single/dual phase mode, so introduce
a new macro by adding a pointer to the SW3B descriptor.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:30 +08:00
Peng Fan
b7b7aa741f power: regulator: pfuze100: support high output voltage mode
Some PFUZE regulators can operate in either low or high output voltage mode,
with different minimum voltages and voltage step sizes selected by a hardware
control bit. However, the current PFUZE100 regulator driver assumes low output
voltage mode only, resulting in incorrect voltage calculation and programming
when high voltage mode is enabled.

Extend the regulator descriptor to describe high output voltage mode by adding
a mask to detect the mode and a dedicated voltage description (min_uV and
step size). Update voltage get/set handling to dynamically select the correct
voltage parameters based on the high voltage mode bit.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:30 +08:00
Peng Fan
356b7598cd power: regulator: pfuze100: Fix min_uV usage
regulator-min-microvolt in device tree is not always match the minimal
voltage in the pmic datasheet, direclty using the min value from device
tree as base may cause wrong voltage settings being written.

Directly use the min_uV from datasheet to avoid wrong settings.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:30 +08:00
Neha Malcom Francis
1526438a93 power: regulator: tps65941: Enable FPWM bits
Depending on the phase selection (single or multi), the FPWM bits
configured forces the regulator to operate in PWM mode. In case of
multi-phase selection, the FPWM_MP bits enforce the regulator to also
operate in multi-phase. This fixes correct multi-phase operation.

While at this, correct incorrect macro alignment as well.

Fixes: 065a452ae6 ("power: regulator: tps65941: add regulator support")
Link: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Takuma Fujiwara <t-fujiwara1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-05-06 10:20:29 +08:00
Tom Rini
ae8987f4e6 Merge patch series "binman: Fix preload signing with encrypted FIT"
Yan WANG <yan.wang@softathome.com> says:

This series improves the reliability and efficiency of binman preload
header generation and test it against an encrypted FIT image signed with
a preload header.

When a preload header references other entries (e.g. an encrypted FIT)
through the collection etype, the referenced entries may be rebuilt
multiple times during binman processing. This becomes problematic when
the referenced entry produces non-deterministic output, such as FIT
encryption using random IVs or timestamps, since rebuilding the entry
changes the data.

This series ensures that referenced entries are built only once and that
preload signing is performed after all data is collected. It also avoids
unnecessary repacking or repeated signing operations by the preload.

The changes include:
  * generate preload header placeholders in ObtainContents() and sign
    data only once in ProcessContentsUpdate()
  * mark referenced entries as build_done in the collection etype to
    avoid rebuilding data
  * add a functional test for signing an encrypted FIT with a preload
    header

Link: https://lore.kernel.org/r/20260417083050.499955-1-yan.wang@softathome.com
2026-05-05 10:37:16 -06:00
Paul HENRYS
b20d69e5f5 tools: binman: Test signing an encrypted FIT with a preload header
Add a test to verify the preload header correctly signs an encrypted
FIT. This test exercises the case where encryption uses random IVs that
would change between mkimage calls.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 10:37:09 -06:00
yan wang
9ff82a771c binman: collection: Set build_done on referenced entries
The collection etype uses phandles in the 'content' property to
reference other entries. Mark each referenced entry with build_done
to avoid rebuilding the same entry data multiple times.

This is important for cases where rebuilding may change the data
content, e.g. due to timestamps or random IVs in encryption.

Refactor GetContentsByPhandle() to return both the entry object and
its data.

Signed-off-by: yan wang <yan.wang@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 10:37:09 -06:00
Paul HENRYS
5006121b44 binman: Generate preload header and sign data only once
To optimize preload generation, generate the header and signatures only
after all data has been collected in ProcessContentsUpdate(). This
avoids signing the data multiple times.

Since header_size is known upfront (from __init__), create a placeholder
in `ObtainContents()` to avoid an extra packing pass when
ProcessContentsUpdate() detects a size change.

This reduces unnecessary repacking and signing operations.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 10:37:09 -06:00
Aristo Chen
e6112ab2d7 configs: phycore_am62x_r5_ethboot: Drop duplicate CONFIG entries
CONFIG_SPL_MMC=n and CONFIG_SPL_DM_SPI=n are each listed twice in the
defconfig. Remove the redundant occurrences so each option appears only
once.

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-05-05 10:36:42 -06:00
Aristo Chen
f7f2864e19 configs: phycore_am62ax_r5_ethboot: Drop duplicate CONFIG_SPL_MMC
CONFIG_SPL_MMC=n is listed twice in the defconfig. Remove the redundant
occurrence so each option appears only once.

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-05-05 10:36:42 -06:00
Aristo Chen
7c3945a231 configs: r8a78000_ironhide: Drop duplicate CONFIG_SCMI_FIRMWARE
CONFIG_SCMI_FIRMWARE=y is listed twice in the defconfig. Remove the
redundant occurrence so each option appears only once.

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-05-05 10:36:42 -06:00
Tom Rini
d5f178c9a0 Merge patch series "configs: toradex: Enable EFI"
Francesco Dolcini <francesco.dolcini@toradex.com> says:

Enable standard EFI support for all the arm64 Toradex boards, as
required for booting standard aarch64 Linux distribution, following the
ARM recommendations for SystemReady compliance.

The RTC used on these boards is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady
Link: https://lore.kernel.org/r/20260424104213.303752-1-francesco@dolcini.it
2026-05-05 10:36:08 -06:00
Francesco Dolcini
a97668cd8b configs: verdin-imx95: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
d52f67197b configs: verdin-imx8mp: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
9f5c862ecc configs: verdin-imx8mm: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
1327724ffd configs: verdin-am62p: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
3a304e7347 configs: verdin-am62: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
1dda05fe99 configs: toradex-smarc-imx95: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
1bd90ebe2c configs: toradex-smarc-imx8mp: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
398fca82ae configs: colibri-imx8x: Enable EFI
Enable standard EFI support, as required for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
6912d61909 configs: aquila-am69: Enable EFI related options
Enable EFI related options, as suggested for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Francesco Dolcini
2c34e32b9b configs: apalis-imx8: Enable EFI
Enable standard EFI support, as required for booting standard aarch64
Linux distribution, following the ARM recommendations for SystemReady
compliance [1].

The RTC used on this board is not currently supported by U-Boot,
therefore it is not enabled at the moment.

Link: https://developer.arm.com/documentation/DUI1101/4-5/Configure-U-Boot-for-SystemReady [1]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-05-05 10:35:36 -06:00
Randolph Sapp
b1c28ad5fa efi_mem_sort: use list_for_each_entry_safe instead
Use list_for_each_entry_safe and comparisons against the current and
next efi_mem_desc. This reduces the computation required for merging
regions, prevents unnecessary additional iterations of the list, and
requires less temporary values.

Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 16:29:08 +02:00
Randolph Sapp
025c4cbd42 efi_selftest_memory: check for duplicates first
Check for duplicate memory mappings before reporting any incorrect
attributes. Could be that second allocation has the correct type while
the first doesn't. Knowing there is a duplicate in this scenario is
more helpful than just reporting the first mismatch.

Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 16:29:08 +02:00
Randolph Sapp
3ad3243f8a efi_dt_fixup: use fdtdec_get_bool
Use the more straightforward fdtdec_get_bool instead of fdt_getprop and
a return code check.

Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 16:29:08 +02:00
Randolph Sapp
a2f2731008 lmb: allocation flags macro documentation
Update the allocation flags inline documentation to follow the kernel
object like macro documentation specification.

Use active voice for the short descriptions.

Signed-off-by: Randolph Sapp <rs@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-05 16:29:08 +02:00
Heinrich Schuchardt
7d48344aff cmd: eficonfig: adjust struct eficonfig_entry, field key
The number EFICONFIG_ENTRY_NUM_MAX - 1 must be printable
to field key of struct eficonfig_entry.

Fixes: 1f0583beeb ("eficonfig: set EFICONFIG_ENTRY_NUM_MAX to INT_MAX - 1")
Fixes: 23aa0502a4 ("eficonfig: increase the number of menu entries")
Addresses-Coverity-ID: 583414 - Out-of-bounds write
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-05 16:29:08 +02:00
Heinrich Schuchardt
2898031803 efi_loader: initialize variables in efi_dp_from_http()
When using lwIP, efi_dp_from_http() may fail to initialize ip or mask.
Initialize the variables before the call.

Addresses-Coverity-ID: 645840 - Uninitialized variables (UNINIT)
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-05 16:29:08 +02:00
Tom Rini
70434636c3 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
DT clean ups, Kconfig clean up, R-Car Gen5 remoteproc and watchdog
driver, and R-Car Gen5 CM33 initial build support.
2026-05-05 08:16:52 -06:00
Marek Vasut
20b124d1bc arm64: renesas: Add Cortex-M33 build option to R-Car Gen5
The R-Car Gen5 SoCs contains Cortex-M33, Cortex-R52 and Cortex-A720AE
cores. Add U-Boot build options for the Cortex-M33 core.

Since the Cortex-M33 core is a 32bit core, select V8M and ARM64 for
RCAR64 accordingly. Select TMU timer on the 32bit core, where it is
used instead of the ARMv8 timer. Adjust TMU timer base address to match
the address map of the Cortex-M33 core. Disable unused OF_BOARD_SETUP
as well as unavailable POSITION_INDEPENDENT configuration options.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2026-05-05 12:53:53 +02:00
Marek Vasut
7ad9d8a24c watchdog: Add Renesas R-Car Gen5 window watchdog driver
Add support of Renesas R-Car Gen5 window watchdog timer. Timeout
configuration is derived from CONFIG_WATCHDOG_TIMEOUT_MSECS, which
is more accurate than the 1-second granularity 'timeout' passed to
.start callback.

Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-05 12:53:53 +02:00
Marek Vasut
9f71b271db remoteproc: renesas: Add Renesas R-Car Gen5 remote processor driver
Add R-Car Gen5 RSIP controller remoteproc driver capable of starting
the SCP, Cortex-R52 and Cortex-A720 cores in Renesas R-Car R8A78000
X5H SoC. The SCP core is started by releasing the core from reset,
the Cortex-R52 and Cortex-A720 are started using the SCP SCMI call.
The entry point for SCP core is fixed to its STCM, entry points for
Cortex-R52 and Cortex-A720 are set during rproc load.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-05 12:53:53 +02:00
Marek Vasut
8528f2ed20 arm: renesas: Fix Kconfig indent
Indent using tabs and two spaces for help text. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-05 12:53:53 +02:00
Marek Vasut
529e62ecc7 arm: dts: renesas: Remove duplicate AVB pinmux assignment on V3M
Both R-Car V3M Eagle and V3MSK U-Boot DT extras contain AVB pinmux
assignment, which is a leftover from before the same pinmux was part
of upstream DTs. Remove the duplicate AVB pinmux assignment in favor
of the upstream DT content. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-05 12:53:53 +02:00
Marek Vasut
d0abd8b4c5 arm: dts: renesas: Clean up RPC DT nodes
Remove duplicate properties which are present both in arch/arm/dts/
and upstream dts/upstream/src/arm64/renesas/ in favor of those in
upstream DTs. Since those are duplicates, this causes no functional
change. Remove unused num-cs and bank-width DT properties.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-05-05 12:53:53 +02:00
Tom Rini
57460fde4b Merge branch 'master' of git://git.denx.de/u-boot-coldfire
- stmark2 / mcf5441x updates
2026-05-04 14:41:59 -06:00
Heinrich Schuchardt
ba1209d7a7 fat: initialize ret in disk_rw()
If fat_sect_size = 0 and nr_sect = 0, the value of ret is never initialized.
A random return value is returned.

Initialize ret to 0.

Addresses-Coverity-ID: - 645495 Uninitialized scalar variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-04 14:35:10 -06:00
Angelo Dureghello
44684aabc2 m68k: set proper u-boot image size for initial boot
There is a value of 256K hardcoded as u-boot image size. This
produce bank tty as soon as the image size grows over the limit.
Fix it by using value preset by CONFIG_SYS_MONITOR_LEN.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:49 +02:00
Angelo Dureghello
07d824e5bb m68k: mcf5441x: create stub to use imx drivers
Some NXP imx hardware ip module as the esdhc controller are exactly the
same in some new ColdFire cpus. For the specific case, mcf5441x needs to
use the existing fsl_esdhc_imx.c driver for the esdhc device.

Create a stub to be able to use NXP "imx" serie drivers as the
fsl_esdhc_imx in the ColdFire architecture.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:49 +02:00
Angelo Dureghello
b17db4fadc configs: stmark2: add bdinfo command
Enable bdinfo command.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>

---
Changes in v2:
- recreated by make menuconfig
2026-05-04 22:19:49 +02:00
Angelo Dureghello
28fc1cbab3 configs: stmark2: add support for mmc
Add support for mmc.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>

---
Changes in v2:
- recreated by make menuconfig
2026-05-04 22:19:49 +02:00
Angelo Dureghello
cc4c0cbc29 mmc: Kconfig: allows m68k to use esdhc imx driver
Allow cpu families as mcf5441x (m68k) to use the fsl_esdhc_imx driver
since the hardware ip module is the same.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>

---
Changes in v2:
- moved before menuconfig changes
2026-05-04 22:19:49 +02:00
Angelo Dureghello
73b428c585 board: stmark2: remove old garbage
Remove old erroneous garbage.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:49 +02:00
Angelo Dureghello
a38b3fca74 board: stmark2: add sd boot command
Add command to boot from sd.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:49 +02:00
Angelo Dureghello
81b7e4da50 m68k: dts: stmark2: enable esdhc
Enable esdhc device.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:49 +02:00
Angelo Dureghello
988c983370 m68k: dts: mcf5441x: add mmc device for mcf5441x
Add mmc support for the mcf5441x family. There is only one esdhc
controller for this cpu family.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2026-05-04 22:19:48 +02:00
Emanuele Ghidoli
2c733e6c85 common: memsize: fix occasionally failing alias probing
probe_ram_size_by_alias() detects whether a probe address still aliases
a lower address by writing through one address and reading through the
other.

On i.MX95 this occasionally reported a false non-alias when the alias
read happened immediately after the write.

A memory barrier alone, mb(), was tested but did not make the failure go
away. This suggests that ordering the CPU accesses is not sufficient for
this probe, likely because the issue is in the path to the memory
controller rather than in the core itself.

Read the written address back before checking the alias address. This
appears to force the write to become observable at the probe address
before using the alias read to decide whether the tested address range
exists.

If the readback does not match the written pattern, restore the saved
value and continue with the next check. This keeps the probe robust for
addresses that do not reliably retain the test pattern.

Fixes: 0977448b45 ("common: memsize: add RAM size probe based on alias detection")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-04 12:58:47 -06:00
Michal Simek
0fd32094c0 bloblist: fix pointer comparison in bloblist_apply_blobs()
The rec_from_blob() function returns a pointer, but the code was
comparing it using "rec <= 0" which is incorrect for pointer types.
Pointers should be compared using "== NULL" or "!= NULL".

Addresses-Coverity-ID: CID 645841: Incorrect expression (BAD_COMPARE)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
2026-05-04 12:58:44 -06:00
Michal Simek
7dd93524ea fdt: check fdt_pack() return value in fdtdec_apply_bloblist_dtos()
The fdt_pack() function can return an error code, but its return value
was not being checked. Add proper error handling to propagate any
failure.

Also fix typo in comment: "Shink" -> "Shrink".

Addresses-Coverity-ID: CID 645839: Error handling issues (CHECKED_RETURN)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
2026-05-04 12:56:08 -06:00
Simon Glass
c7a6d4fdd7 .mailmap: Update my email address
Add a .mailmap entry so my sjg@chromium.org address is used for all
email.

Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-05-04 12:40:01 -06:00
Franz Schnyder
92a04aea6d board: toradex: Quote variables in test cmd expression
With correct POSIX handling, unquoted empty variables can turn the
expression like
	test -n ${fdtfile}
into
	test -n

The POSIX handling for single argument `test` evaluates it as true,
so the fallback initialization will be skipped unexpectedly.
Quoting variable expansions in `test` expressions will always result in
correct behavior for empty and non-empty values.
This change was triggered by
commit 8b0619579b ("cmd: test: fix handling of single-argument form of test")
The aim is to have a less fragile codebase that is not dependent on a
quirk of the shell implementation.

Use quoted variable expansions in `test` expressions throughout.

Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-05-04 11:07:43 -06:00
Tom Rini
bb0f3eebb3 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Apologies for the delay, but please pull those sunxi changes into
v2026.07. Nothing earth shattering, mostly minor improvements like
better SPL power LED support, and fixes to some H616 DRAM setup. Also
some more forward looking enhancement for the SPI code. I also pulled in
Richard's raw NAND flash improvements for the H6/H616 SoC, though this
lacks proper peer testing due to the lack of mainline support for any
board actually employing those chips.
2026-05-01 08:12:31 -06:00
Tom Rini
21d842d4e5 Merge tag 'efi-2026-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2026-07-rc2

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29967

Documentation:

* .clang-format description
* qemu-arm: describe secure state steps
* mention that CONFIG_BOOTSTD_DEFAULTS provides network features when NET=y
* ti: k3: describe fTPM support

UEFI:

* cmd/bootefi: move efi_init_obj_list() to the start of do_bootefi
* correct return value of efi_bootmgr_run()
* correct efi_binary_run_dp() return value
* centralize messaging for efi_init_obj_list
* correct Kconfig dependencies for EFI_HTTP_BOOT

Others:

* .clang-format: add U-Boot specific for each macros

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmn0hjwACgkQxIHbvCwF
# GsRDVQ/+LADSJv/WxhsEayOe1f0H0wp42bssPZikyUxHGr6azNHjgngw2sExfFt0
# YE9j3HUclZy0LLlsykUk8f6uzHsL4DTLS1pqwoi1tYX/szotvW6fP5eUUxkUD06Y
# GYx8ub+Niq8F5/wT7VYj4cBxs8Pl3Zql4vp0nlBFdgxH0D9APH6ORucjNawa+vCv
# a7yqzSv9vyJXdsOKxpusfrcsz8pdd8UqXRmTwgPxarc8g0gqieLAwP/bECEeq5ZR
# FSKrWF9qYrLUEBVlwUx6jEVgq9JvzL1FP8p9w+WMdP++ani7ytaqL40KGorHm1mU
# JAwaDdWiRgodYGRNoP5aPZNvx1o+e0dRoioF2cL9Eob+6pXG053dN5VVZUgMfGPf
# 9xHfpAI47y+EvSPZEe1T/m7wAIOTBCP58rJGgTXvlCL1+dc3X4Ez68x5zcDMrJF/
# 0QnuAoaZS+XgyWwsCOR9cGHSzNT3rR3Wx/f2lKXklbCMQ+C+sp5UkRFNvYrhCqnk
# tg+sWH54oEKKQ0dTwGG+tsFhn8lsdXzhRKl1jN7w4DVY/R9YZu776biU3yzortfI
# ymbFmfOGmcPSD+lO7S1w+64zjvwnJT+rAzMLuYr3bIuhWpS4rd2phsEyLfcDSXwc
# 51imC2PSnp7Mx51F5qjCXligYC0kHh3BHpxxZok/fHjUVzx2c98=
# =RLJL
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 01 May 2026 04:53:48 AM CST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2026-05-01 08:12:13 -06:00
Richard Genoud
4c8d2a633e mtd: nand: raw: sunxi_spl: remove user data length reset
No need to reset user data length registers in SPL.

In SPL, only the first user data length register is used, so we don't
need to reset all of them.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2026-05-01 14:49:44 +02:00
Richard Genoud
dbed35acee mtd: rawnand: sunxi: introduce variable user data length
In Allwinner SoCs, user data can be added in OOB before each ECC data.
For older SoCs like A10, the user data size was the size of a register
(4 bytes) and was mandatory before each ECC step.
So, the A10 OOB Layout is:
[4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes]
[4bytes USER_DATA_STEP1] [ECC_STEP1 bytes]
...
NB: the BBM is stored at the beginning of the USER_DATA_STEP0.

Now, for H6/H616 NAND flash controller, this user data can have a
different size for each step.
So, we are maximizing the user data length to use as many OOB bytes as
possible.

Fixes: 7d1de98011 ("mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller")
Fixes: f163da5e6d ("mtd: rawnand: sunxi: add support for H6/H616 nand controller")
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
2026-05-01 14:49:44 +02:00
Richard Genoud
a776cb833d mtd: rawnand: sunxi: clean sunxi_nand_chip_init()
In sunxi_nand_chip_init there's quite a lot of kfree/return, it's easy
to forget a kfree(), so use a goto/kfree instead.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
[Andre: rename goto label, keep return 0;]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2026-05-01 14:49:37 +02:00
Heinrich Schuchardt
a48ddf81c2 .clang-format: add U-Boot specific for each macros
Formatting via clang-format is controlled by .clang-format.
For each statements should be formatted with a brace at the line end:

    for_each() {
    }

This requires clang-format to know that the symbol is not a function
but a for each macro. We use some for each macros which don't exist in
Linux. Add these to file .clang-format.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 12:22:38 +02:00
Quentin Schulz
ec45cf3dda doc: bootstd: specify CONFIG_BOOTSTD_DEFAULTS provides network features when NET=y
In the past, we only had one network stack which was called NET. The
network features were enabled for the legacy (and then only) networking
stack since commit 22353fa6b5 ("bootstd: Add some default filesystems
and commands"). Then instead on relying on NET legacy stack for enabling
networking features, the dependencies were (mostly) changed to depend on
CMD_NET in commit a0c739c184 ("boot: Create a common BOOT_DEFAULTS for
distro and bootstd"). Then a new stack (lwIP) appeared, then CMD_NET was
made available with this new stack in commit 98ad145db6 ("net: lwip:
add DHCP support and dhcp commmand") making the networking features
possible to enable and finally commit f1e978fd54 ("boot: Update tests
around network symbols in BOOT_DEFAULTS_CMDS") made it explicit that we
need *a* network stack to enable some networking features.

Align the bootstd documentation with what's actually implemented as
Kconfig dependencies. Note that BOOTSTD_DEFAULTS selects BOOT_DEFAULTS
which selects BOOT_DEFAULTS_CMDS which then selects network features.
The CMDLINE symbol needs to be enabled as well for BOOT_DEFAULTS to
select BOOT_DEFAULTS_CMDS, but I don't think we need to go that far into
explaining what's required to enable some commands.

Reported-by: Simon Glass <sjg@chromium.org>
Closes: https://lore.kernel.org/u-boot/CAFLszTgZC1FGy8965pHiG-u=FhrguftRv41ghQ_Qb_RRXx6tyg@mail.gmail.com/
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-05-01 10:35:06 +02:00
Heinrich Schuchardt
562e41acde doc: .clang-format description
We cannot use .clang-format without modification. For instance U-Boot
has some for each macros that Linux does not have.

Adjust the description.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 10:33:08 +02:00
Shiva Tripathi
88e888c312 doc: board: ti: k3: Add fTPM support documentation
Add fTPM support documentation including an overview, configuration
steps for RPMB provisioning, OP-TEE TA build instructions, and
verification procedure.

Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com>
2026-05-01 10:30:32 +02:00
Heinrich Schuchardt
82539af483 efi_loader: centralize messaging for efi_init_obj_list
If efi_init_obj_list() fails we cannot use the UEFI sub-system.

* Instead of having messages for this everywhere write an error message
  in efi_init_obj_list().
* Always use (ret != EFI_SUCCESS) when checking the return value of
  efi_init_obj_list().
* Remove the return code from the error message as it does not help
  users to understand which initialization went wrong.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 10:30:03 +02:00
Heinrich Schuchardt
257f9f5273 efi_loader: correct efi_binary_run_dp() return value
efi_binary_run_dp() is expected to return an efi_status_t value.

Reported-by: Simon Glass <sjg@chromium.org>
Fixes: 6422820ac3 ("efi_loader: split unrelated code from efi_bootmgr.c")
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 10:30:03 +02:00
Heinrich Schuchardt
96b33427ea efi_loader: correct return value of efi_bootmgr_run()
efi_bootmgr_run() is expected to return an efi_status_t value.

Reported-by: Simon Glass <sjg@chromium.org>
Fixes: 0bef4b0123 ("cmd: bootefi: move library interfaces under lib/efi_loader")
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 10:30:03 +02:00
Heinrich Schuchardt
7311130b73 cmd/bootefi: move efi_init_obj_list() to the start of do_bootefi
None of the bootefi commands can be executed if the EFI sub-system cannot
be initialized.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 10:30:03 +02:00
Johannes Krottmayer
c5230a45a7 doc: emulation: qemu-arm: add secure state steps
Add build steps for building U-Boot in secure state with
TF-A and OP-TEE. It includes the full steps for building
OP-TEE and TF-A to use with U-Boot. Also a short description
how to invoke QEMU with enabled EL3 and EL2. EL3 (machine
option secure=on) is required to run TF-A.

Signed-off-by: Johannes Krottmayer <krotti83@proton.me>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2026-05-01 10:29:21 +02:00
Tom Rini
9d06ec9fd4 EFI Loader: Correct dependencies for EFI_HTTP_BOOT
As exposed by "make randconfig", we have an issue with the dependencies
for EFI_HTTP_BOOT. As this is implemented by running commands (as seen
by what it selects) it must depend on CMDLINE as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-05-01 09:11:07 +02:00
Tom Rini
301bad079b arm: at91: Drop unnecessary BOARD_EARLY_INIT_F usage
All of these platforms enable CONFIG_BOARD_EARLY_INIT_F and then have a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-01 10:00:13 +03:00
Richard Genoud
6b33232e32 mtd: rawnand: sunxi: make the code mode self-explanatory
In sunxi_nfc_hw_ecc_{read,write}_chunk(), the ECC step was force to 0,
the reason is not trivial to get when reading the code.

The explanation is that, from the NAND flash controller perspective, we
are indeed at step 0 for user data length and ECC errors.

Just add a const value with an explanation to clarify things.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2026-05-01 00:35:59 +02:00
Richard Genoud
125bba0f61 mtd: rawnand: sunxi: Replace hard coded value by a define
The user data length (4) used all over the code hard coded.
And sometimes, it's not that trivial to know that it's the user data
length and not something else.
Moreover, for the H6/H616 this value is no more fixed by hardware, but
could be modified.

Using a define here makes the code more readable.

Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2026-05-01 00:35:59 +02:00
Yixun Lan
11b5cd22ba spi: sunxi: wait for TX/RX fifo reset done
Once reset SPI TX or RX fifo, the underlying hardware need to take
some time to actually settle down, the two bits will automatically
clear to 0, so use a poll mechanism to check status bits to make sure
it's done correctly.

On Cubie A7A board which using A733 SoC, we encoutered a SPI nor flash
timeout issue, it turns out that the SPI fifo reset take a few time to
settle down, Add a loop to poll the status.

This was the error message shows on A7A board once this issue happened.

=> sf probe
ERROR: sun4i_spi: Timeout transferring data
Failed to initialize SPI flash at 0:0 (error -2)

Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2026-04-30 23:31:03 +02:00
Andre Przywara
7ad8e387d6 sunxi: H616: dram: drop default TPR6 Kconfig value
CONFIG_DRAM_SUNXI_TPR6 is the only DRAM config parameter that has a
non-zero default value. Since we need to provide a value for all the
other parameters anyway, avoiding TPR6 makes no real difference.
To make matters worse, TPR6 is a compound value covering multiple DRAM
types, but also spans over three SoCs, which makes it hard to find one
good default value.

Drop the default from Kconfig, and put some explicit values in the
defconfigs for the few boards that were relying on the default so far.
The value is taken from one BSP, only the lower byte matters anyway for
those boards, all using DDR3 DRAM.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
2026-04-30 23:31:03 +02:00
Jernej Skrabec
5a24cc0740 sunxi: H616: dram: fix LPDDR3 TPR6 parsing
Allwinner's DRAM initialisation code defines a parameter named TPR6,
presumably containing some "Vref" parameter, but containing values for
*all* DRAM types. The runtime code selects one byte based on the DRAM
type used.
This selection code was wrong for LPDDR3, the value is encoded in
bits [23:16], not [15:8]. Fix that in the code, which also aligns it
with the very similar code for the A133 and A523.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reported-by: Philippe Simons <simons.philippe@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
2026-04-30 23:31:03 +02:00
Lukas Schmid
9d3bbc99b9 pinctrl: sunxi: add I2C3 mux for D1/T113-s3 (PG10/PG11)
Boards based on the Allwinner D1/T113-s3, such as the
NetCube Systems Nagami, can expose a third I2C controller
on PG10/PG11. However, the sun20i_d1 pinctrl function table
lacked an entry for this mux.

Add the "i2c3" function with mux value 3 on PG10/PG11, allowing device
trees to enable the I2C3 controller.

Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2026-04-30 23:31:03 +02:00
Andre Przywara
06b3ae910f sunxi: configs: enable power LEDs on 64-bit boards
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.

Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined.

This will light up the power LED very early in the (SPL) boot phase on
those 64-bit boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
2026-04-30 23:31:03 +02:00
Andre Przywara
c3297cb93e sunxi: configs: enable power LEDs on 32-bit boards
We recently gained a simple way to enable a power LED very early in the
SPL boot, through simple Kconfig variables.

Add those symbols to those boards' defconfigs where the DT indicates a
default-on power LED. The number used is <port bank> * 32 + <pin no>,
an active low setup means CONFIG_SPL_SUNXI_LED_STATUS_ACTIVE_HIGH must be
undefined. Since its default is "high", we can skip the symbol in the
defconfig in this case.

This will light up the power LED very early in the (SPL) boot phase on
those 32-bit boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
2026-04-30 23:31:02 +02:00
Andre Przywara
dc2427ab20 sunxi: spl: fix SPL_SUNXI_LED active low configuration
The newly introduced Allwinner SPL LED "framework" defined a
SPL_SUNXI_LED_STATUS_STATE Kconfig symbol, that was supposed to denote
the active-low vs. active-high polarity of the LED. However this is
a bool symbol, so it will simply vanish if not defined, and we cannot use
it directly inside a C statement.

Filter the symbol through the IS_ENABLED() macro, which will return 0 if
the symbol is not defined, which is the intended value here.

Since the STATUS_STATE name is a bit confusing, rename it to ACTIVE_HIGH
on the way, because that is its real meaning. Also the LED_STATUS_BIT
name for the GPIO number is similarly a remnant of the old status LED
code, so rename it to LED_STATUS_GPIO as well.

This fixes configuring LEDs with active-low polarity.

Fixes: 256557dd9a ("sunxi: remove usage of legacy LED API")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Closes: https://lore.kernel.org/u-boot/adfMQBPdntWy1KIq@shepard/
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-04-30 23:31:02 +02:00
Heinrich Schuchardt
2472b31997 sunxi: use vendor prefix for $fdtfile on RISC-V too
Once we complete the support for RISC-V Allwinner D1 (sun20i), we will need
to prefix $fdtfile with the vendor prefix to match the Linux device-tree
directory structure.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2026-04-30 23:31:02 +02:00
Chanhong Jung
b52670d37b gpio: 74x164: use dev_read_* APIs for live-tree compatibility
With CONFIG_OF_LIVE=y, dev_of_offset(dev) does not return a valid
flat-FDT offset, so fdtdec_get_int(gd->fdt_blob, offset, ...) inside
gen_74x164_probe() fails to locate the "registers-number" property and
always falls back to the default value of 1. This results in a 4-chip
74HC595 daisy chain being exposed as only 8 GPIOs instead of 32, and
any consumer referencing offsets >= 8 fails to bind with -ENOENT
("GPIO ... not found" / Error -22).

The "registers-default" property is ignored for the same reason, so
any configured power-on output pattern is silently discarded.

Replace the flat-FDT helpers with dev_read_u32_default() and
dev_read_u8_array_ptr(), which correctly walk both live and flat
trees. This matches how other DM GPIO drivers (e.g. pca953x_gpio.c)
read their per-device properties.

With gd->fdt_blob no longer referenced, also drop the now-unused
DECLARE_GLOBAL_DATA_PTR and <asm/global_data.h> include.

Tested on stm32mp153d-ssonic (CONFIG_OF_LIVE=y) with a 4-chip 74HC595
chain: all 32 GPIOs are now exposed, and 16 consumer LED nodes at
offsets 0..31 bind successfully.

Fixes: 9300f711ba ("dm: gpio: introduce 74x164 driver")
Signed-off-by: Chanhong Jung <happycpu@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-30 13:57:49 -06:00
Francesco Dolcini
b5633dddbd rtc: ds1307: Remove legacy non-DM code
The DS1307 driver depends on DM_RTC since commit d425d6056e ("rtc: Add
DM support to ds1307"), remove the related obsolete code.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-30 13:57:46 -06:00
João Marcos Costa
8ef8dee4f3 scripts/dtc: drop yaml in DT validation
The build issues found in dtc/yamltree were partially mitigated by a
previous commit (807bcd844a: "scripts/dtc: Fix pkg-config behavior under
sysroot"), but upstream dtc simply disabled yaml, and the same should be
done here in order to permanently avoid those issues.

Backport the change below from Linux v5.18 [1]:

ef8795f3f1c ("dt-bindings: kbuild: Use DTB files for validation")

I tested this patch with a couple Yocto builds: u-boot and u-boot-tools,
using the current master branch (rev. "c53b0708f9"), having removed
libyaml-native from u-boot-tools's dependencies.

[1] https://git.kernel.org/linus/ef8795f3f1ce

Signed-off-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-04-30 12:21:47 -06:00
Tom Rini
817653c53d Merge tag 'u-boot-stm32-20260430' of https://source.denx.de/u-boot/custodians/u-boot-stm
- arm; stm32mp2: Factorize TAMP_FWU_BOOT_IDX_MASK/OFFSET definition
- arm: stm32mp: Drop unnecessary BOARD_EARLY_INIT_F usage
- board: stm32mp25: support dynamic A/B bank bootup
- board: stm32pm1: Fix board_check_usb_power()
- clk: stm32: Add STM32MP23 support
- video: stm32: dsi: fix unchecked return values
- video: support Rocktech RK050HR345-CT106A panel
- Remove non-existent STM32_RESET flag
2026-04-30 09:10:18 -06:00
Heinrich Schuchardt
ae1966e243 arm/mach-stm32: don't select non-existent STM32_RESET
Symbol CONFIG_STM32_RESET does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:12 +02:00
Dario Binacchi
49e78d1256 video: support Rocktech RK050HR345-CT106A panel
Add support for the Rocktech RK050HR345-CT106A RGB panel. This model
uses an Ilitek ILI9806E controller over the SPI bus for initialization
and register configuration only.

The driver is designed to be easily extensible to support other panels
with different sequences and timings by providing a specific descriptor
structure for each model.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:12 +02:00
Dario Binacchi
723e0360ee spi: stm32: extend support to STM32MP25
The SPI IP in this platform is fully compatible with the current driver
implementation, requiring only a new compatible string.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
011feb0028 spi: stm32: add support for bits-per-word setting
Implement the set_wordlen operation to allow dynamic bus width
configuration. This is required for peripherals with non-standard
requirements, such as display panels that need 9-bit word transfers
during the initialization and setup phase.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
dd5002856a spi: stm32: add stm32_spi_is_enabled() helper
Add a helper to check the SPE (SPI Enable) bit and replace the
open-coded bitwise check in stm32_spi_stopxfer() with this helper to
improve readability and consistency.

This is also a preparatory step for future driver updates that require
checking the SPI enable state across different code paths.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
17c022271d spi: stm32: clean up buffer length assignment
Remove redundant divisions by using the already available xferlen
variable for setting the rx/tx buffer lengths.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
2b3a73116a test: dm: spi: add testcase for spi_set_wordlen()
Add a unit test to verify that the SPI word length configuration is
correctly handled by the SPI uclass and successfully passed down to
the sandbox driver.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
ab5c0191e1 test: spi: add sandbox_spi_get_wordlen interface
Add the sandbox_spi_get_wordlen() public interface to retrieve the
internal word length state of the sandbox SPI device.

This is intended for use in sandbox SPI test cases to verify that
the word length is correctly propagated from the SPI uclass to
the driver.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
fa1801abc7 spi: sandbox_spi: support wordlen setup
The driver currently ignores the word length configuration. Implement
the set_wordlen operation to store and track the current word length.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
7b879ddbc5 spi: add support for bits-per-word setting
Allow dynamic configuration of the SPI word length. This is required
for controllers and slaves that need to operate with non-standard
word lengths, such as 9-bit wide transfers.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Tom Rini
5ab39c8a66 arm: stm32mp: Drop unnecessary BOARD_EARLY_INIT_F usage
All of these platforms enable CONFIG_BOARD_EARLY_INIT_F and then have a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
5166658ac6 ARM: stm32mp2: Factorize TAMP_FWU_BOOT_IDX_MASK/OFFSET definition
Factorize TAMP_FWU_BOOT_IDX_MASK and TAMP_FWU_BOOT_IDX_OFFSET
definition which are common to STM32MP1 and STM32MP2 SoCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
5a379cca5b clk: stm32: Add STM32MP23 support
Add STM32MP23 support.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Raphaël Gallais-Pou <rgallaispou@gmail.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
c8f7b41730 spi: add STM32MP23 OSPI support
Add STM32MP23 OSPI support.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Raphael Gallais-Pou
51678d9479 video: stm32: dsi: fix unchecked return values
Fix the following errors yielded by Coverity Scan:

CID 644836:         Error handling issues  (CHECKED_RETURN)
Calling device_chld_unbind without checking return value (as is done elsewhere 6 out of 7 times)
CID 644834:         Error handling issues  (CHECKED_RETURN)
Calling device_chld_remove without checking return value (as is done elsewhere 4 out of 5 times).

Link: https://lore.kernel.org/r/20260309212331.GF1388590@bill-the-cat/
Fixes: a6d047c0a8 ("video: stm32: remove all child of DSI bridge when its probe failed")

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
ecde6614bc board: stm32pm1: Fix board_check_usb_power()
Depending of plugged power source (computer, wall charger, ...) it can
happen that we got the following message:

"****************************************************"
"*      USB TYPE-C charger not compliant with       *"
"*                   specification                  *"
"****************************************************"
"                                                    "
"### ERROR ### Please RESET the board ###            "

This issue has been detected on STM32MP135f-DK board.

It's due to max_uV and min_uV value are initialized at beginning of
board_check_usb_power() and can then be used for the 2 iteration of
adc_measurement().
max_uV/min_uV values issued of the first adc_measurement() iteration
are used as input of the second adc_measurement() iteration, which
can lead to incoherent pair of min_uV/max_uV values.

To ensure that adc_measurement() returns coherent value for max_uV and
min_uV, initialize max_uV and min_uV at each loop start.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
2026-04-30 08:01:11 +02:00
Tom Rini
9d3bc111ef Merge tag 'mediatek-for-master-2026-04-29' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
* MMC fixes for Genio 520/720 (mt8189)
* SPI NOR Flash controller fixes
* SPI NOR Flash support for Genio 520/720
* PMIC controller fixes
* PMIC support for Genio 1200 (mt8195)
* Drop CONFIG_IDENT_STRING to be consistent across the platform
* Remove empty header on mt7622
2026-04-29 17:09:13 -06:00
Tom Rini
6211462c92 Merge branch 'master' of git://source.denx.de/u-boot-usb
- Fix UMS and eMMC HW partition selection
2026-04-29 17:09:13 -06:00
Tom Rini
13b3502157 socfpga: vining: Enable LTO
This platform is often close to the binary size limit and minor changes
lead to exceeding image size. Enable LTO for this platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
Cc: Marek Vasut <marex@nabladev.com>
Cc: Tien Fong Chee <tien.fong.chee@altera.com>
2026-04-29 17:09:13 -06:00
Julien Stephan
a97c82bfdf power: pmic: mtk-pwrap: add MT8195 support
Add mt8195 support.

Support comes directly from commit e88edc977b00 ("soc: mediatek: pwrap:
add pwrap driver for MT8195 SoC") from the Linux Kernel.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-8-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:27:05 -05:00
Julien Stephan
e262eb4cfe power: pmic: mtk-pwrap: use tabs for alignment
Fix mt8188_regs definition to use tabs instead of spaces for alignment
to be consistent with other definitions.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-7-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:26:52 -05:00
David Lechner
df660cc7b2 power: pmic: mtk-pwrap: use pmic compatible to select child info
Change the logic for selecting pmic_children_info to use the compatible
string from the devicetree instead of expecting the pwrap (part of the
MCU) to correspond to the separate PMIC chip.

In addition to being more correct, it also saves a few lines of code for
each MCU type that is added by dropping the enum and type field.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-6-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:26:48 -05:00
David Lechner
27fdacf420 power: pmic: mtk-pwrap: remove interrupt related code
Remove the interrupt related code in mtk-pwrap driver. This was just
enabling interrupts without any handler.

Even if we did have a handler, the only thing we could do is log a
message. Since U-Boot isn't long running, this likely wouldn't be very
useful.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-5-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:16:01 -05:00
David Lechner
b60d1c5262 power: pmic: mtk-pwrap: drop PWRAP_SLV_CAP_DUALIO on mt6359
Drop the PWRAP_SLV_CAP_DUALIO flag from the mt6359 PMIC definition. The
mt6359p variant of the PMIC does support dual I/O.

Prior to this change, the driver would attempt to write to the
PWRAP_DEW_DIO_EN register, which was not defined, so would write
register 0 (DONE2).

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-4-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
8c5f5ef2c9 power: pmic: mtk-pwrap: add init capability flag
Add a PWRAP_CAP_INIT capability flag to specify if it is safe to call
pwrap_init() or not. Not all targets define the registers accessed
by pwrap_init(). In that case, it is expected that an earlier bootloader
has already initialized the PMIC. If not, we now return an error instead
of trying to access undefined registers.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-3-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
3996c20956 power: pmic: mtk-pwrap: add PWRAP_CAP_WDT_SRC flag
Add a PWRAP_CAP_WDT_SRC flag to indicate if a PMIC wrapper has a WDT_SRC
or not. Then use this to conditionally enable the watchdog timer.

Prior to this change, since the register was not defined, it defaulted
to 0, so the wrong register (DONE2) was being written to.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-2-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
98116c0ef8 power: pmic: mtk-pwrap: fix file description
Fix the comment at the start of the file to accurately describe what
this file does. The old description was likely copied from the related
regulator driver.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-1-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
Weijie Gao
3c14cd8388 configs: mt7622: remove empty header file
Remove the empty include/configs/mt7622.h header file as it is not needed.
The Kconfig entry that referenced it is also removed.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/20260428033625.109032-1-weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:02:16 -05:00
Marek Vasut
b27a31665d cmd: ums: Switch HW partition before block access
An UMS session with eMMC device specifier "ums C mmc dev.part1,dev.part2"
exposes the same eMMC HW partition 'part2' twice instead of exposing both
HW partitions 'part1' and 'part2'. Fix this by switching the eMMC HW
partition before block device read/write access.

An eMMC is represented by a single struct blk_desc, with the currently
selected HW partition being stored in this struct blk_desc. Each call to
part_get_info_by_dev_and_name_or_num() with partition string dev[.partN]
does trigger HW partition switch by calling blk_get_device_part_str() ->
blk_get_device_part_str() -> get_dev_hwpart() -> get_dev_hwpart() ->
blk_dselect_hwpart(). The ums_init() iterates over the device specifier
string and calls part_get_info_by_dev_and_name_or_num() in a loop for
each dev[.partN] entry used as the partition string. If the device
specifier string contains more than one dev[.partN] partition strings
for the same dev device, then it is the HW partition described in the
last dev[.partN] partition string entry that is accessed for all dev
device partition strings in the device specifier string, because that
last dev[.partN] partition string entry was the last one that triggered
blk_dselect_hwpart() call for that device.

To access the expected HW partition for every dev[.partN] partition string
entry, it is necessary to call blk_dselect_hwpart() before each block read
or write. Store HW partition described for each dev[.partN] partition string
in struct ums and use the stored value to make it so.

The blk_dselect_hwpart() does test whether the currently selected HW
partition is already configured in hardware and does not reconfigure
the hardware if that is the case, therefore for the majority of block
reads and writes, blk_dselect_hwpart() is a no-op with negligible
performance impact.

Example reproducer is listed below. The last sector of both eMMC HW BOOT
partitions is populated with distinct test pattern and UMS is launched:

"
=> mmc dev 1 1 ; mmc read $loadaddr 0x1fff 1 ; md $loadaddr 4
switch to partitions #1, OK
mmc1(part 1) is current device
MMC read: dev # 1, block # 8191, count 1 ... 1 blocks read: OK
84000000: 1234abcd 1234abcd 1234abcd 1234abcd  ..4...4...4...4.

=> mmc dev 1 2 ; mmc read $loadaddr 0x1fff 1 ; md $loadaddr 4
switch to partitions #2, OK
mmc1(part 2) is current device
MMC read: dev # 1, block # 8191, count 1 ... 1 blocks read: OK
84000000: 567890ef 567890ef 567890ef 567890ef  ..xV..xV..xV..xV

=> ums 0 mmc 1.1,1.2
UMS: LUN 0, dev mmc 1, hwpart 1, sector 0x0, count 0x2000
UMS: LUN 1, dev mmc 1, hwpart 2, sector 0x0, count 0x2000
"

Read of the two block devices on host without this fix produces
identical data present in HW BOOT partition 2:

"
$ dd if=/dev/sdX of=mmc-a.bin ; dd if=/dev/sdY of=mmc-b.bin
$ hexdump -C mmc-a.bin | tail -n 3 | head -n 1 ; \
  hexdump -C mmc-b.bin | tail -n 3 | head -n 1
003ffe00  ef 90 78 56 ef 90 78 56  ef 90 78 56 ef 90 78 56  |..xV..xV..xV..xV|
003ffe00  ef 90 78 56 ef 90 78 56  ef 90 78 56 ef 90 78 56  |..xV..xV..xV..xV|
"

Read of the two block devices on host with this fix produces the
expected distinct data from either HW BOOT partition 1 or 2:

"
$ dd if=/dev/sdX of=mmc-a.bin ; dd if=/dev/sdY of=mmc-b.bin
$ hexdump -C mmc-a.bin | tail -n 3 | head -n 1 ; \
  hexdump -C mmc-b.bin | tail -n 3 | head -n 1
003ffe00  cd ab 34 12 cd ab 34 12  cd ab 34 12 cd ab 34 12  |..4...4...4...4.|
003ffe00  ef 90 78 56 ef 90 78 56  ef 90 78 56 ef 90 78 56  |..xV..xV..xV..xV|
"

Reported-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-29 10:32:04 +02:00
David Lechner
8c15436fb2 configs: mediatek: add required config for SNOR on Genio 520/720 EVK
Enable options to be able to access the SNOR flash on Genio 520/720 EVK
boards.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260406-mtk-genio-720-snor-v1-2-cbfd5fc4e59a@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:19:52 -05:00
David Lechner
f1b077c512 arm: dts: mediatek: add Genio 520/720 SNOR support
Add devicetree nodes needed to enable SNOR support on Genio 520 and 720
EVKs. This is copied from the most recent upstream submission [1] of the
devicetree for these boards, so there should be minimal differences when
we eventually switch to OF_UPSTREAM.

Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1]
Link: https://patch.msgid.link/20260406-mtk-genio-720-snor-v1-1-cbfd5fc4e59a@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:19:52 -05:00
Meiker Gao
6c881e9980 spi: mtk_snor: Remove status register write procedure in probe()
Remove status register write procedure in probe(). This is handled in
spi-nor-core by the SPI_NOR_HAS_LOCK flag.

Signed-off-by: Meiker Gao <ot_meiker.gao@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-8-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:16:32 -05:00
Macpaul Lin
28bd639677 spi: mtk_snor: fix zeroed data in DMA read bounce path
Implement proper bounce buffer handling for the read path to fix zeroed
data when using DMA. In the bounce path, map the bounce buffer with
dma_map_single(), perform DMA using bounce_dma, then copy data from the
bounce buffer to the user buffer, and finally unmap with
dma_unmap_single().

Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-7-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
1cfcd7100d spi: mtk_snor: support newer SOCs
Add support for some newer SOCs. New compatible strings are added to the
lookup table. Some SOCs also need a extra bit clocked out as a hardware
quirk, so a new capability structure and code is added to support that.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
78950bb207 spi: mtk-snor: add bounds checking in mtk_snor_cmd_program()
Add bounds checking of the various lengths in mtk_snor_cmd_program() to
prevent reading or writing registers out of bounds.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-5-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
55944a68d5 spi: mtk_snor: check return value of mtk_snor_cmd_exec()
Always check the return value of mtk_snor_cmd_exec() and propagate the
error.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-4-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
3b0a037052 spi: mtk_snor: conditionally copy tx/rx data
Only write out data for OUT command and read in data for IN commands.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-3-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
4eac47d4eb spi: mtk_snor: avoid alloc in mtk_snor_cmd_program()
Rework mtk_snor_cmd_program() to avoid allocating a temporary buffer
for tx data. This improves performance a bit by avoiding the need to
allocate memory and copy data an extra time.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-2-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
4f9842e479 spi: mtk_snor: clean up comments
Avoid use of C++-style comments and fix multi-line comment style.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
David Lechner
95c06da44f configs: mediatek: mt8395_genio_1200_evk_ufs: remove CONFIG_IDENT_STRING
Remove CONFIG_IDENT_STRING from the mt8395_genio_1200_evk_ufs defconfig.
This makes it consistent with other mediatek defconfigs and frees the
option for use by downstream users. This only affects the version string
printed by U-Boot, so it doesn't have any functional impact.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mtk-configs-remove-ident-string-v1-5-66d5fc3d67be@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:53:35 -05:00
David Lechner
eb1551fddc configs: mediatek: mt8395_genio_1200_evk: remove CONFIG_IDENT_STRING
Remove CONFIG_IDENT_STRING from the mt8395_genio_1200_evk defconfig.
This makes it consistent with other mediatek defconfigs and frees the
option for use by downstream users. This only affects the version string
printed by U-Boot, so it doesn't have any functional impact.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mtk-configs-remove-ident-string-v1-4-66d5fc3d67be@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:53:35 -05:00
David Lechner
9b471cb9b2 configs: mediatek: mt8390_genio_700_evk: remove CONFIG_IDENT_STRING
Remove CONFIG_IDENT_STRING from the mt8390_genio_700_evk defconfig. This
makes it consistent with other mediatek defconfigs and frees the option
for use by downstream users. This only affects the version string
printed by U-Boot, so it doesn't have any functional impact.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mtk-configs-remove-ident-string-v1-3-66d5fc3d67be@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:53:35 -05:00
David Lechner
4c435a7ffb configs: mediatek: mt8370_genio_510_evk: remove CONFIG_IDENT_STRING
Remove CONFIG_IDENT_STRING from the mt8370_genio_510_evk defconfig. This
makes it consistent with other mediatek defconfigs and frees the option
for use by downstream users. This only affects the version string
printed by U-Boot, so it doesn't have any functional impact.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mtk-configs-remove-ident-string-v1-2-66d5fc3d67be@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:53:35 -05:00
David Lechner
ba97dd5c10 configs: mediatek: mt8365_evk: remove CONFIG_IDENT_STRING
Remove CONFIG_IDENT_STRING from the mt8365_evk defconfig. This makes it
consistent with other mediatek defconfigs and frees the option for use
by downstream users. This only affects the version string printed by
U-Boot, so it doesn't have any functional impact.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mtk-configs-remove-ident-string-v1-1-66d5fc3d67be@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:53:35 -05:00
ht.lin
8436dd6b0e mmc: mtk-sd: fix msdc cmd ready check
Correct the check condition in msdc_cmd_is_ready() for MSDC_PS_DAT0
polling. Without this change, it may not be able to detect if the SD
controller is busy correctly for issuing the command.

Fixes: d24b693959 ("mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC")
Signed-off-by: ht.lin <ht.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-3-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
David Lechner
93f67d893b mmc: mtk-sd: enable async_fifo_crcsts on mt8189
Enable the async_fifo_crcsts option for mediatek,mt8189-mmc compatible.

Without this option, writing will fail in HS200 mode.

Fixes: b3d16267b5 ("mmc: mtk-sd: add mediatek,mt8189-mmc compatible")
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-2-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
David Lechner
336602a2f9 mmc: mtk-sd: enable DMA on mediatek,mt8189-mmc
Enable DMA on mediatek,mt8189-mmc compatible. The issue that was
preventing DMA from working correctly was fixed by the
get_effective_memsize() implementation in commit a7c682565b ("arm:
mediatek: add support of MT8189 SoC family").

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-1-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
Tom Rini
4433253ecf Prepare v2026.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-27 17:03:18 -06:00
Tom Rini
9b04bda886 Merge patch series "scsi: Replace SYNC_CACHE with FUA for scsi write"
Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> says:

This series replaces the SYNC_CACHE approach with FUA (Force Unit
Access) to prevent data loss during board resets while avoiding
system hangs during large sparse image flashing operations.

The previous SYNC_CACHE implementation caused timeouts and hangs
when flashing large sparse images because it issued cache sync
commands after every write operation. The FUA approach achieves
the same data integrity goal by setting the FUA bit in
WRITE10 commands.

Link: https://lore.kernel.org/r/20260416-enable_fua-v3-0-84508de2bfd9@oss.qualcomm.com
2026-04-27 13:44:11 -06:00
Aswin Murugan
4b42c59a34 scsi: Enable FUA bit in WRITE10 commands
Enable the Force Unit Access (FUA) bit in SCSI WRITE10 commands to
ensure writes bypass the device's volatile cache and go directly to
non-volatile storage. This provides write-through behavior that prevents
data loss during board resets.

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-27 13:44:06 -06:00
Balaji Selvanathan
34a44dad74 Revert "scsi: sync cache on write"
While the SYNC_CACHE approach prevents data loss during board resets,
it causes system hangs during large sparse image flashing operations.
This will be replaced with a FUA (Force Unit Access) approach in future
commit, which achieves the same data integrity goal more efficiently.

This reverts commit ffe4e6ab42.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-27 13:44:06 -06:00
Tom Rini
96c8b9c4ce Merge patch series "net: migrate NO_NET out of the networking stack choice"
Quentin Schulz <foss+uboot@0leil.net> says:

This migrates the net options away from the main Kconfig to net/Kconfig,
rename the current NET option to NET_LEGACY to really highlight what it
is and hopefully encourage more people to use lwIP, add a new NET
menuconfig (but keep NO_NET as an alias to NET=n for now) which then
allows us to replace all the "if legacy_stack || lwip_stack" checks with
"if net_support" which is easier to read and maintain.

The only doubt I have is wrt SYS_RX_ETH_BUFFER which seems to be needed
for now even when no network is configured? Likely due to
include/net-common.h with PKTBUFSRX?

No change in behavior is intended. Only change in defconfig including
other defconfigs where NO_NET=y or NET is not set, in which case NO_NET
is not set or NET=y should be set in the top defconfig. Similar change
required for config fragments. See commit log in patch adding NET
menuconfig for details.

This was tested based on 70fd0c3bb7 ("x86: there is no
CONFIG_UBOOT_ROMSIZE_KB_12288"), from within the GitLab CI container
trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026 and set up
similarly as in "build all platforms in a single job" GitLab CI job.

 #!/usr/bin/env bash
 set -o pipefail
 set -eux

 ARGS="-BvelPEWM --reproducible-builds --step 0"
 ./tools/buildman/buildman -o ${O} --force-build $ARGS -CE $*
 ./tools/buildman/buildman -o ${O} $ARGS -Ssd $*

O=../build/u-boot/ ../u-boot.sh -b master^..b4/net-kconfig |& tee ../log.txt

I can't really decipher the log.txt, but there's no line starting with
+ which would be an error according to tools/buildman/builder.py help
text. Additionally, because I started the script with set -e set and
because buildman has an exit code != 0 when it fails to build a board,
and I have the summary printed (which is the second buildman call), I
believe it means all builds passed.

The summary is the following:
   aarch64: (for 537/537 boards) all +0.0 rodata +0.0
            uniphier_v8    : all +1 rodata +1
               u-boot: add: 0/0, grow: 1/0 bytes: 1/0 (1)
                 function                                   old     new   delta
                 data_gz                                  10640   10641      +1
       arm: (for 733/733 boards) all -0.0 rodata -0.0
            uniphier_v7    : all -1 rodata -1
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-1 (-1)
                 function                                   old     new   delta
                 data_gz                                  11919   11918      -1
            opos6uldev     : all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  18778   18775      -3
            uniphier_ld4_sld8: all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  11276   11273      -3
            stemmy         : all -20 rodata -20
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-20 (-20)
                 function                                   old     new   delta
                 data_gz                                  15783   15763     -20

As far as I could tell this data_gz is an automatically generated array
when CONFIG_CMD_CONFIG is enabled. It is the compressed .config stored
in binary form. Because I'm changing the name of symbols, replacing a
menu with a menuconfig, additional text makes it to .config and the
"# Networking" section in .config disappears.

Here is the diff for the 5 defconfigs listed above, generated with:

for f in build/*-m; do
	diff --unified=0 $f/.config $(dirname $f)/$(basename -a -s '-m' $f)/.config
done

(-m is the build directory for master, and without the suffix, it's the
top commit of this series)

"""
 --- build/opos6uldev-m/.config	2026-04-20 10:53:49.804528526 +0200
 +++ build/opos6uldev/.config	2026-04-20 11:03:37.430242767 +0200
 @@ -970,4 +969,0 @@
 -
 -#
 -# Networking
 -#
 @@ -975,0 +972 @@
 +CONFIG_NET_LEGACY=y
 --- build/stemmy-m/.config	2026-04-20 11:01:33.653698123 +0200
 +++ build/stemmy/.config	2026-04-20 11:04:53.452577311 +0200
 @@ -733,4 +732,0 @@
 -
 -#
 -# Networking
 -#
 @@ -738,2 +733,0 @@
 -# CONFIG_NET is not set
 -# CONFIG_NET_LWIP is not set
 --- build/uniphier_ld4_sld8-m/.config	2026-04-20 11:00:41.605469071 +0200
 +++ build/uniphier_ld4_sld8/.config	2026-04-20 11:04:22.226439899 +0200
 @@ -997,4 +996,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1002,0 +999 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v7-m/.config	2026-04-20 10:53:04.019307319 +0200
 +++ build/uniphier_v7/.config	2026-04-20 11:03:01.688085486 +0200
 @@ -1004,4 +1003,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1009,0 +1006 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v8-m/.config	2026-04-20 10:43:05.614441175 +0200
 +++ build/uniphier_v8/.config	2026-04-20 10:41:03.214852130 +0200
 @@ -875,4 +874,0 @@
 -
 -#
 -# Networking
 -#
 @@ -880,0 +877 @@
 +CONFIG_NET_LEGACY=y
"""

This is fine:
- Networking menu doesn't exist anymore so "#\n# Networking\n#\n" won't
  be in .config anymore.
- opos6uldev, uniphier_ld4_sld8, uniphier_v7 and uniphier_v8 all have
  (old) CONFIG_NET enabled, (new) CONFIG_NET will still be set but
  CONFIG_NET_LEGACY also needs to be defined now to reflect the stack
  choice (even if default),
- stemmy has CONFIG_NO_NET set, which means CONFIG_NET and
  CONFIG_NET_LWIP are not reachable anymore hence why they don't need to
  be part of .config,

GitLab CI was run on this series (well, not exactly, but it's only
changes to the git logs that were made):
https://source.denx.de/u-boot/contributors/qschulz/u-boot/-/pipelines/29849

It passes.

Link: https://lore.kernel.org/r/20260420-net-kconfig-v1-0-9900002d8e72@cherry.de
2026-04-27 11:28:25 -06:00
Quentin Schulz
b06c5ef4dd boot: remove NO_NET use
NO_NET is now a transitional symbol which may eventually be removed. Its
meaning is the opposite of the new meaning of NET (that is, any
networking stack).

Update the symbol dependency by using NET instead of !NO_NET.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
0d98f68579 doc: remove mention to non-existing TPL_NET
TPL_NET symbol never existed in the first place, so let's remove this
misleading piece of documentation.

Fixes: 143c9a7e9d ("doc: describe TPL/VPL/SPL boot")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
95d66d2eb0 simplify NET_LEGACY || NET_LWIP condition with NET condition
Since the move to make NET a menuconfig and NO_NET a synonym of NET=n,
when NET is enabled, NET_LEGACY || NET_LWIP is necessarily true, so
let's simplify the various checks across the codebase.

SPL_NET_LWIP doesn't exist but SPL_NET_LEGACY is an alias for SPL_NET so
the proper symbol is still defined in SPL whenever needed.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
bd275172a8 net: make NET a menuconfig (and downgrade NO_NET to a simple config)
This will allow a bunch of simplifications across the code base.
Disabling NET is the equivalent of today's NO_NET choice. This means
that if NET is enabled, either the legacy or lwIP stack is necessarily
selected, which allows us to simplify if NET_LEGACY || NET_LWIP into
if NET in a later commit.

Config fragments - or defconfigs including other defconfigs - setting
the network stack (NET_LEGACY or NET_LWIP) must also set NET (or unset
NO_NET) if the config they apply to - or the included defconfigs -
unsets NET (or selects NO_NET) as otherwise the NET_LEGACY and NET_LWIP
symbols are unreachable. This is the case for the two defconfig modified
in this commit.

NO_NET is now a convenience symbol which hides NET entirely to avoid
modifying many defconfigs. If one selected NO_NET to disable the
networking stack in the past, this will still work for now. Technically,
we should be using the "transitional" Kconfig attribute but that is only
available since Kconfig from Linux kernel v6.18 and we're on 6.1 right
now.

Note that this moves CONFIG_SYS_RX_ETH_BUFFER from under the Network
menu back into the main menu as it seems like it needs to be defined
even when there's no need for NET support at all and menuconfig option
doesn't work the same way as a menu.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
b8cd444225 rename NET to NET_LEGACY
Highlight that NET really is the legacy networking stack by renaming the
option to NET_LEGACY.

This requires us to add an SPL_NET_LEGACY alias to SPL_NET as otherwise
CONFIG_IS_ENABLED(NET_LEGACY) will not work for SPL.

The "depends on !NET_LWIP" for SPL_NET clearly highlights that it is
using the legacy networking app so this seems fine to do.

This also has the benefit of removing potential confusion on NET being a
specific networking stack instead of "any" network stack.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
8080ab6c28 move networking menu in net/Kconfig
In the main Kconfig, there are only two more menus, General Setup and
Expert, in addition to the net menu. Since the part in the main Kconfig
is mostly about selecting the network stack (legacy or lwIP), and that
we already have a net/Kconfig, let's move those to net/Kconfig to have
everything in the same place.

No intended change in behavior.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Tom Rini
6863587485 Merge patch series "board: toradex: aquila-am69: Fix 16GB dual-rank DDR cfg and memory size detection"
Emanuele Ghidoli <emanuele.ghidoli@toradex.com> says:

This patch series:
 - fix an oversight in 16GB dual-rank DDR configuration
 - fix the memory size setup logic

Link: https://lore.kernel.org/r/20260421151604.1141082-1-ghidoliemanuele@gmail.com
2026-04-27 11:26:25 -06:00
Emanuele Ghidoli
550101b487 board: toradex: aquila-am69: Fix memory size setup logic
The hardware configuration pins are used both to select the DDR
configuration and to determine the installed memory size.

On Aquila AM69, the DDR timing patch is applied in the R5 SPL, while the
memory size fixup for the next-stage U-Boot DT is done later in the A72
SPL path.
The previous immplementation was not taking in account that the hw_cfg
value is lost both during SPL execution (board_init_f and board_init_r)
and between SPL and U-Boot proper.

Fix this by reading the hardware configuration pins when the memory size
is actually needed:
- in the R5 SPL, to select the correct DDR configuration
- in the A72 SPL, to fix up the U-Boot DT memory size and bank layout

Fixes: 3f0528882c ("board: toradex: add aquila am69 support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-04-27 11:19:51 -06:00
Emanuele Ghidoli
31c5d4f180 board: toradex: aquila-am69: Fix 16GB dual-rank DDR configuration
The 16GB dual-rank DDR configuration uses an incorrect DDRSS_PLL_FHS_CNT
value. This makes DDR initialization hang during the DDR frequency
handshake sequence.

Update DDRSS_PLL_FHS_CNT to the correct value for the 16GB dual-rank
configuration.

Fixes: 39e014f43a ("board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-04-27 11:19:51 -06:00
Tom Rini
b67f54885a Merge patch series "k3-am69-aquila: Migrate to OF_UPSTREAM and add remoteproc FW pre-loading"
Ernest Van Hoecke <ernestvanhoecke@gmail.com> says:

This patch series migrates the Aquila AM69 to OF_UPSTREAM to receive
automatic device tree updates. It also adds remoteproc firmware
pre-loading to the environment.

Link: https://lore.kernel.org/r/20260417-elb-6911-aquila69-ofupstr-v1-0-400d93db3747@toradex.com
2026-04-27 11:19:46 -06:00
Vitor Soares
cf8bb11441 board: toradex: aquila-am69: add remoteproc firmware pre-loading
Some use cases require remoteproc firmware to be loaded before Linux
boots. Introduce rprocsemmcboot and rproc_fw_binaries to load the
remoteproc cores from U-Boot, relying on the TI k3_rproc framework
which already handles the secure firmware variants, firmware loading,
and proper initialization.

The firmware binaries are expected to be present in the eMMC rootfs
under /lib/firmware/.

To activate, run rprocsemmcboot or add it to bootcmd:
  bootcmd=run rprocsemmcboot; bootflow scan -b

The upstream U-Boot does not yet have the remoteproc DT nodes enabled
for the Aquila AM69, making firmware loading fail. Marking as pending
waiting for remoteproc enabling, which could happen along with the
OF_UPSTREAM migration.

Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-04-27 11:18:27 -06:00
Ernest Van Hoecke
26b52c083e arm: dts: k3-am69-aquila: migrate to OF_UPSTREAM
Enable CONFIG_OF_UPSTREAM to receive automatic
device tree updates for the Aquila AM69.

Remove the now-obsolete device tree files:
- arch/arm/dts/k3-am69-aquila-dev.dts
- arch/arm/dts/k3-am69-aquila.dtsi

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-04-27 11:18:27 -06:00
Christian Pötzsch
bb4142af7e virtio: add support for SIZE_MAX & SEG_MAX features
Some virtio implementations may forward the virtio requests directly to
the underlying hw. The hw may have some restrictions in how many and how
big the requests can be. Therefore, the corresponding virtio device will
announce this limitations with the SIZE_MAX & SEG_MAX feature.

Add support for those features. Split an io request into multiple virtio
requests if more than seg_max segments would be used. Also split a
single buffer request into multiple segments if the buffer is bigger
then size_max.

Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Signed-off-by: Adam Lackorzynski <adam@l4re.org>
2026-04-27 11:11:54 -06:00
Maximilian Brune
6ab5b5d280 pci: correct PCI device enumeration to include all functions on device 0
Currently the implementation does not just skip all devices beside
device 0, it also skips all functions (besides 0) on device 0. This
broke basically all AMD platforms, since they have a lot of internal SOC
devices behind these functions.

This was detected, because the XHCI controller and therefore the USB
devices were not found by u-boot on AMD/crater platform.

PCI_MASK_BUS() returns both device and function bits, so it skips any
bdf where either device > 0 or function > 0. Using PCI_DEV() extracts
only the device number, matching the intent in only_one_child().
It therefore now checks all functions on device 0 (Linux does the same).

I build tested u-boot as coreboot payload and run it on a recent x86 AMD
platform. Devices like the XHCI controller are now found again.

Fixes: fbde868ba4 ("pci: skip unnecessary PCIe scanning")
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andrew Goodbody <andrew.goodbody@linaro.org>
CC: George McCollister <george.mccollister@konsulko.com>
CC: Simon Glass <sjg@chromium.org>
2026-04-27 11:11:08 -06:00
Tom Rini
d7b23b2477 Merge patch series "Add support for DT overlays handoff"
Raymond Mao <raymond.mao@linaro.org> says:

The series include refactoring on bloblist and fdtdec to support handoff
of multiple DT overlays and applying them into the DT base during setup.
All changes are aligned to the spec update for supporting DT overlay
handoff[1].

Notes for testing:

Currently DT overlay is not yet enabled in TF-A, but with the test
patches I provided for TF-A and OP-TEE build, importing a DT overlay
blob file from QEMU to TF-A reserved memory is supported.
Follow below instructions to build and run for test:
$ repo init -u https://github.com/OP-TEE/manifest.git -m qemu_v8.xml
Replace your local qemu_v8.xml with [2], which contains all necessary
changes in both TF-A and OP-TEE build.
$ repo sync
$ cd build
$ make toolchains
$ make ARM_FIRMWARE_HANDOFF=y all
Copy and rename your DT overlay blob as 'qemu_v8.dtb' into out/bin
$ make ARM_FIRMWARE_HANDOFF=y run-only

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

[2] https://github.com/raymo200915/optee_manifest/blob/dt_overlay_handoff/qemu_v8.xml

Link: https://lore.kernel.org/r/20250718141621.3147633-1-raymond.mao@linaro.org
2026-04-27 09:44:40 -06:00
Raymond Mao
d3935134c9 configs: Select OF_LIBFDT_OVERLAY to hand over DTO via bloblist
Select OF_LIBFDT_OVERLAY for qemu_arm64 and vexpress_fvp_bloblist
to hand over DTO via bloblist.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Raymond Mao
b70cbbfbf9 fdtdec: apply DT overlays from bloblist
During FDT setup, apply all existing DT overlays from the bloblist
to the base FDT if bloblist is being used for handoff from previous
boot stage.
According to the Firmware Handoff spec update to support DT overlay [1],
an overlay must have the same top-level compatible string as its target
base DT has.
Before applying the overlays, check whether sufficient space is
reserved in the base DT blob, if not, resize the blob to the allowed
padded size, which is limited by CONFIG_SYS_FDT_PAD and the bloblist
spare space size.
After all overlays are applied, resize the merged DT to its actual size.

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Raymond Mao
25baace942 bloblist: add API for applying blobs with specified tag
Add an API to search for the blobs with specified tag and use the
hook function to apply the blob data.
Add a helper function to return the inline header size as according
to recent spec[1] updates, the actual data can be following an inline
header instead of following the TE header immediately.

[1] Firmware Handoff spec:
https://github.com/FirmwareHandoff/firmware_handoff

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Raymond Mao
63cc797a7e bloblist: fix a potential negative size for memmove
It causes a panic when blob is shrunk and 'new_alloced' is less than
'next_ofs'. The data area that needs to be moved should end up at
'hdr->used_size'.

Fixes: 1fe5937549 ("bloblist: Support resizing a blob")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Raymond Mao
ad82e750fd bloblist: add helper functions
Add two helper functions for:
1. marking a blob void
2. getting blob record from a given blob data pointer.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Raymond Mao
9d89fc4054 bloblist: add blob type for DT overlay
Add blob type for DT overlay according to the update of Firmware
Handoff spec[1].
Add an inline header to represent the 'subtype' in a DT overlay
blob payload.

[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@amd.com>
2026-04-27 09:42:36 -06:00
Tom Rini
e0991f42aa Merge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Various Qualcomm additions this cycle:
* USB superspeed support for 1 platform
* Initial support for the Milos platform and the Fairphone Gen 6
  (chainloaded from ABL)
* Improved support for booting with OP-TEE on supported platforms
* Initial basic power domain support

Notably there is a generic change to the device core, missing power
domains will no longer cause a device to fail probe and instead will
just print a warning. This shouldn't affect any existing platforms.
2026-04-27 08:05:40 -06:00
Tom Rini
1a4cb8dc03 Merge tag 'u-boot-ufs-20260427' of https://source.denx.de/u-boot/custodians/u-boot-ufs
- Update line reset configuration for rcar-gen5
- core: Fix heap corruption due to out of bounds write
- rockchip: Make use of controller resets
2026-04-27 08:04:22 -06:00
Tom Rini
ee35366a64 Merge tag 'u-boot-amlogic-next-20260427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- enable EFI Capsule on Disk (+ sysreset fixup/cleanup)
- do not fail when setting SD_EMMC_x_CLK0 on GX/G12
2026-04-27 08:04:06 -06:00
Aswin Murugan
fabf5878bb qcom_defconfig: Disable EFI_HAVE_RUNTIME_RESET in qcom_defconfig
Qualcomm platforms rely on the kernel to manage specialized reboot modes
such as EDL, bootloader entry, and other vendor-specific reset flows.
Allowing U-Boot to override these via EFI runtime reset services leads to
incorrect behavior when the kernel issues advanced reboot requests.

Now that EFI_HAVE_RUNTIME_RESET is exposed as a user-configurable Kconfig
option, disable it for qcom_defconfig so that the kernel retains full
control over reboot handling on Qualcomm SoCs.

This ensures that EFI runtime reboot callbacks are not registered on
these platforms, preventing conflicts with kernel-managed PSCI reset
paths.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20260324175913.92858-3-aswinm@qti.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:45 +02:00
Aswin Murugan
ef3f08ae78 efi_loader: make EFI_HAVE_RUNTIME_RESET a user-selectable option
Expose EFI_HAVE_RUNTIME_RESET as a proper Kconfig boolean with a prompt
so platforms can explicitly enable or disable advertising the EFI reset
runtime service.

The current PSCI-based EFI runtime reset implementation is always
enabled whenever CONFIG_PSCI_RESET is selected, but it does not support
passing the additional arguments required for specialized reset modes.
As a result, reboot requests such as bootloader mode or EDL mode cannot
be propagated correctly and instead fall back to a normal reboot.

By making EFI_HAVE_RUNTIME_RESET user-configurable, platforms that
depend on extended PSCI reset can now explicitly disable EFI runtime
reset handling even when CONFIG_PSCI_RESET is enabled, ensuring
that the kernel retains full control of advanced reboot paths.

Default behavior for existing platforms remains unchanged.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20260324175913.92858-2-aswinm@qti.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Balaji Selvanathan
40be682633 dts: qcs6490-rb3gen2: Remove USB controller dr_mode override
Remove the USB controller dr_mode override from the u-boot device
tree. The upstream Linux device tree already configures the USB
controller with dr_mode = "otg", which supports both host and
peripheral modes including fastboot.

The previous override to "host" mode prevented fastboot from working
as it requires peripheral mode support. By removing this override,
the upstream OTG configuration is inherited, enabling fastboot while
maintaining host mode capability through the usb-role-switch
property.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260324-kodiak_dts-v2-1-243c28a3ffb9@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
714baccc33 board/qualcomm: add debug config fragment for Milos
Add a fragment similar to others to enable earlycon.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-7-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
589e6eb7c2 qcom_defconfig: Enable Milos clock driver
Enable the driver so that Milos devices can boot with qcom_defconfig.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-6-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
50154283d7 gpio: qcom: Support GPIOs on PM7550 PMIC
The GPIOs on PM7550 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button on the Fairphone (Gen. 6)
smartphone.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-5-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
d23376cb7c regulator: qcom-rpmh-regulator: add support for PM7550 regulators
Add the PM7550 regulator data found on Qualcomm Milos devices.
The tables are imported from the Linux driver (tag v7.0-rc4). The SMPS
regulators were not added now.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-4-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
a0c9ff699f phy: qcom: Add Milos to QMP UFS PHY driver
Import the configuration for the Milos SoC from Linux (tag v7.0-rc4).

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-3-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
0661dc3305 clk/qcom: Add Milos clock driver
Add Clock driver for the GCC block found in the Milos SoC.

The qcom-snps-eusb2-hsphy driver requires the TCXO frequency ("ref"
clock), so we need to pass that as well.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-2-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
8e4fd3d1c3 drivers: pinctrl: Add Qualcomm Milos TLMM driver
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Ajit Singh
16a16b55ce clk: qcom: sc7280: add missing SDCC1 clocks
Add GCC_SDCC1_AHB_CLK and GCC_SDCC1_APPS_CLK gate clocks.
Required on platforms where SDCC1 is used for eMMC.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=a3cc092196ef63570c8744c3ac88c3c6c67ab44b

Signed-off-by: Ajit Singh <blfizzyy@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260226193217.82657-1-blfizzyy@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Sumit Garg
8459d9c3b4 board/qualcomm: Introduce TF-A and OP-TEE config fragment
Recently upstream TF-A/OP-TEE has started gaining support for Qcom
platforms. RB3Gen2 being the first one and more to come. U-Boot in
corresponding boot flow is packaged as a position independent executable.

So, lets add a generic U-Boot config fragment for Qcom platforms to
support TF-A/OP-TEE based TrustZone stack. Build command:

$ ./scripts/kconfig/merge_config.sh \
       configs/qcom_defconfig \
       board/qualcomm/tfa-optee.config
$ make -j`nproc` DEVICE_TREE=qcom/qcs6490-rb3gen2

For more information refer here:
https://trustedfirmware-a.readthedocs.io/en/latest/plat/qti/rb3gen2.html

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260127062341.723966-4-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Sumit Garg
3f3f832bc9 mach-snapdragon: of_fixup: Add OP-TEE DT fixup support
Add support for OP-TEE live tree DT fixup support which enables U-Boot
OP-TEE driver to be probed. As well as the EFI DT fixup protocol allows
the live tree fixup to be carried over to the OS for the OP-TEE driver
in the OS to probe as well.

Note that this fixup only gets applied if OP-TEE support is detected via
checking for OP-TEE message UID.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260127062341.723966-3-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Sumit Garg
3eefe12b4b tee: optee: Export OP-TEE message UID check API
OP-TEE message UID check API can be useful to know whether OP-TEE
is enabled on not assuming the corresponding SMC call is properly
handled if OP-TEE is not supported.

This API can be used by platform code to know OP-TEE presence and
on that basis OP-TEE DT node can be added as part of DT fixups for
the OP-TEE driver probe to happen for both U-Boot and Linux.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260127062341.723966-2-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
63c806ba0e qcom_defconfig: enable psci based sysreset
Enable CONFIG_SYSRESET_QCOM_PSCI to allow U-Boot to reset to Emergency
Download mode.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-6-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
ef06c5d76f cmd: boot: Add '-edl' option to reset command documentation
Add help text about '-edl' option to reset command definition and
related documentation.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-5-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
32825eaddc sysreset: Implement PSCI based reset to EDL mode for QCOM SoCs
Implement request_arg() sysreset_op for QCOM SoCs that use
PSCI to reset to EDL (Emergency Download) mode.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-4-varadarajan.narayanan@oss.qualcomm.com
[casey: add missing ARM_SMCCC depends to kconfig to fix CI allyesconfig]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
fcb48b8981 drivers: sysreset: Add sysreset op that can take arguments
Add a 'request_arg' op to struct sysreset_ops to enable sysreset drivers
to receive arguments given to the 'reset' command. Process the
request_arg() op before the usual request() op.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260121063920.1500293-3-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
f9e3f5f75c arm: psci: Add API to check for support of specific PSCI function
Add an API to check if a specific PSCI function is supported or not.
This is based on the psci_features() function present in Linux kernel
(drivers/firmware/psci/psci.c).

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-2-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Balaji Selvanathan
c3d00f1827 MAINTAINERS: Add entry for Qualcomm PHY drivers
Add the file pattern for Qualcomm PHY drivers to the MAINTAINERS file.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-7-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Balaji Selvanathan
b20d13e4e6 configs: qcm6490: Enable super-speed USB support
Enable the QMP Combo PHY driver to allow super-speed USB
operation on QCM6490 platforms.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-6-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Balaji Selvanathan
5ebc47d984 arch: arm: mach-snapdragon: Auto-detect USB SSPHY driver support
Automatically detect super-speed USB PHY driver availability and
skip the USB speed fixup if driver is available, eliminating the need
for manual configuration.

Previously, U-Boot unconditionally limited USB to high-speed mode
on all Qualcomm platforms because most lacked super-speed PHY
drivers.

This change implements runtime detection that checks if a PHY
driver exists for the super-speed PHY node referenced by the DWC3
controller. The fixup is automatically skipped when a compatible
driver is found, allowing the hardware to operate at full
capability. Platforms without super-speed PHY drivers continue to
receive the fixup automatically.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
[casey: rebased on flat-dwc3 dt support + fix Balaji's signoff]
[casey: make erroneous printf() a debug() again]
Link: https://patch.msgid.link/20251203110735.1959862-5-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Balaji Selvanathan
2c93971ba3 drivers: phy: qcom: Add QMP USB3-DP Combo PHY driver
Add support for the Qualcomm QMP USB3-DP Combo PHY found on
SC7280 and QCM6490 platforms. This driver currently implements
USB3 super-speed functionality of the combo PHY.

The QMP Combo PHY is a dual-mode PHY
that can operate in either USB3 mode or DisplayPort mode. This
initial implementation focuses on USB3 mode to enable Super-Speed
USB support.

Taken from Linux commit 3d25d46a255a ("pmdomain: qcom: rpmhpd: Add rpmhpd support for SM8750")

This patch is dependent on this patch: https://lore.kernel.org/u-boot/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com/

Enabled and tested the driver on Qualcomm RB3 Gen2 (QCS6490) board.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-4-balaji.selvanathan@oss.qualcomm.com
[casey: fix unused variable warning]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:30 +02:00
Balaji Selvanathan
6de333b5ca drivers: usb: dwc3: Add delay after core soft reset
Add a 100 ms delay after clearing the core soft reset bit to ensure
the DWC3 controller has sufficient time to complete its reset
sequence before subsequent register accesses.

Without this delay, USB initialization can fail on some Qualcomm
platforms, particularly when using super-speed capable PHYs like
the QMP USB3-DP Combo PHY on SC7280/QCM6490.

Taken from Linux commit f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251203110735.1959862-3-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:30 +02:00
Balaji Selvanathan
c808ab5fed drivers: clk: qcom: sc7280: Add USB3 PHY pipe clock
Add support for GCC_USB3_PRIM_PHY_PIPE_CLK which is required by
the USB3 PHY on SC7280/QCM6490 platforms.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251203110735.1959862-2-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:30 +02:00
Antony Kurniawan Soemardi
0bbde64361 mach-snapdragon: allocate memory for DT overlays
Allocate a 1 MiB LMB region for fdtoverlay_addr_r when
CONFIG_OF_LIBFDT_OVERLAY is enabled, allowing runtime application of
DT overlays on Snapdragon platforms.

This is useful for Android-based boot flows where the final DT passed
to the kernel must contain modified /firmware/android/fstab entries.
One use case is redirecting system and vendor partitions to microSD
storage instead of internal eMMC without rebuilding the base DTB.

The allocation is conditional on CONFIG_OF_LIBFDT_OVERLAY and has no
effect on boards that do not enable overlay support.

Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260217-qcom-fdt-overlay-v1-1-d0fa0e70d738@smankusors.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:30 +02:00
Aswin Murugan
ca080b83a4 qcom_defconfig: Add QCOM_RPMH_POWER_DOMAIN config
Enable QCOM_RPMH_POWER_DOMAIN config for qualcomm devices

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-5-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:29 +02:00
Aswin Murugan
3fbd82eb67 mach-snapdragon: Remove RPMH power domain DT fixup code
Remove the device tree fixup code that was stripping power-domains
properties from device tree nodes. This fixup was a temporary
workaround needed when RPMH power domain driver support was not
available in U-Boot.

Now that RPMH power domain driver support has been added, the power
domain properties can be preserved in the device tree, allowing proper
power domain management. If a suitable power domain driver is not found
for the power-controller node, it will be handled with a warning in
dev_power_domain_ctrl().

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-4-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:29 +02:00
Aswin Murugan
8e2ac60bb8 power-domain: Add warning when power-domain driver is missing
Update dev_power_domain_ctrl() to log a warning if the power-domain
driver is not found (-ENODEV). Return 0 in this case to allow continued
execution, while preserving error handling for other failures.

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-3-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:29 +02:00
Balaji Selvanathan
bf119f79b5 power-domain: Add QCOM RPMH Power Domain Driver Support
Added support for Qualcomm RPMH power domain driver, responsible
for managing power domains on Qualcomm SoCs. This is a port of
the Linux RPMHPD driver [1] and sa8775p related changes. The
power domain driver currently has support to power on and off
MMCX power domain of sa8775p; support for other soc entries power
domains are stubbed, in future, the required soc support can be
added.

[1]:
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pmdomain/qcom/rpmhpd.c?id=3d25d46a255a83f94d7d4d4216f38aafc8e116b

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213111009.1254360-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:29 +02:00
Aswin Murugan
f55efa447d pinctrl: qcom: Add pingroup definitions for SC7280
Added pingrp support to sc7280 pinctrl driver based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251112165459.1560966-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:33:29 +02:00
Tom Rini
9271f908b4 Merge branch 'master' of git://source.denx.de/u-boot-usb
- Renesas RZ/G2L (R9A07G044) USB gadget support
2026-04-26 14:06:53 -06:00
Eugen Hristev
53f8419ce4 MAINTAINERS, mailmap: Change email for Eugen Hristev
Replace old bouncing emails with ehristev@kernel.org

Signed-off-by: Eugen Hristev <ehristev@kernel.org>
2026-04-26 14:06:24 -06:00
Michele Bisogno
d0d1d11119 usb: gadget: rcar: Add support for RZ/G2L (R9A07G044)
The Renesas RZ/G2L (and RZ/G2LC) USBHS controller requires the
CNEN bit in the SYSCFG register to be set for function operation.
Additionally, its CFIFO is byte-addressable.

Introduce a new renesas_usbhs_driver_param structure for the
RZ/G2L SoC and link it via the udevice_id data pointer. Update
usbhs_probe() to accept the udevice pointer to retrieve these
parameters during initialization.

This alignment follows the logic used in the Linux kernel
renesas_usbhs driver.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
2026-04-26 17:52:36 +02:00
Michele Bisogno
dc9f0d7177 usb: gadget: rcar: Add support for reset controller
Some Renesas SoCs, such as the RZ/G2L, require the USBHS core to
be explicitly deasserted from reset before register access is
possible.

Update the OTG probe to handle a bulk reset controller. To maintain
hardware stability, the reset is deasserted after clocks are
enabled in probe(), and asserted before clocks are disabled
in remove().

Update the error paths in probe to ensures clocks are disabled
if the reset initialization fails.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
2026-04-26 17:52:36 +02:00
Michele Bisogno
6602a93d39 usb: gadget: rcar: Fix gadget registration lifecycle in remove
The driver currently fails to unregister the USB gadget when the
device is removed or the driver is unbound. This leads to dangling
pointers in the UDC core and potential memory corruption.

Add a call to usb_del_gadget_udc() in the remove path to ensure
a clean teardown of the gadget interface.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
2026-04-26 17:52:36 +02:00
Levi Shafter
9f61fd5b80 Makefile: fix host CPP pollution in cmd_gen_envp
Commit 2956a84ba7 ("Makefile: don't use CFLAGS for environment text
file") switched cmd_gen_envp to use $(cpp_flags) so that KCPPFLAGS would
be honored when preprocessing the environment text file. However,
cpp_flags also includes $(PLATFORM_CPPFLAGS), which carries
architecture-specific flags such as -march=armv8-a+crc set by
arch/arm/Makefile for CONFIG_ARM64_CRC32=y targets. These flags are
appropriate for cross-compiled object files but cause the host CPP
invocation to fail on x86 build machines:

  cc1: error: bad value ('armv8-a+crc') for '-march=' switch

KBUILD_CPPFLAGS already accumulates the user-supplied KCPPFLAGS via
"KBUILD_CPPFLAGS += $(KCPPFLAGS)", providing the behaviour 2956a84
intended without pulling in target architecture flags. Use it directly.

Fixes: 2956a84ba7 ("Makefile: don't use CFLAGS for environment text file")
Signed-off-by: Levi Shafter <levi.shafter@elder-tomes.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-24 12:49:27 -06:00
Heinrich Schuchardt
c6faf583c4 scripts/dtc: avoid discarded qualifiers in overlay_fixup_phandle
When building with GCC 15.2 the following warning show up:

    scripts/dtc/libfdt/fdt_overlay.c:422:21: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      422 |                 sep = memchr(fixup_str, ':', fixup_len);
          |                     ^
    scripts/dtc/libfdt/fdt_overlay.c:432:21: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      432 |                 sep = memchr(name, ':', fixup_len);
          |                     ^

Define sep as const char *.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-24 11:28:20 -06:00
Heinrich Schuchardt
b67267c621 tools/asn1_compiler: avoid -Wdiscarded-qualifiers
Building with GCC 15.2 results in warnings:

    tools/asn1_compiler.c: In function ‘tokenise’:
    tools/asn1_compiler.c:442:37: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      442 |             dir = bsearch(&tokens[tix], directives,
          |                 ^

    tools/asn1_compiler.c: In function ‘main’:
    tools/asn1_compiler.c:632:11: warning:
    assignment discards ‘const’ qualifier from pointer target type
    [-Wdiscarded-qualifiers]
      632 |         p = strchr(grammar_name, '.');
          |           ^

bsearch() is defined as

       void *bsearch(size_t n, size_t size;
                     const void key[size], const void base[size * n],
                     size_t n, size_t size,
                     typeof(int (const void [size], const void [size]))
                         *compar);

* Use the correct type for dir.

strchr() is defined as

        char *strchr(const char *s, int c).

* Use a conversion for the assignment to p.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-24 11:28:17 -06:00
Marek Vasut
d64c4a6958 common: update: Fix TFTP return value handling
The net_loop() returns 1 on success, but update_load() returns 0 on
success. Do not assign rv which is the return value of update_load()
to net_loop(), instead assign net_loop() return value to a temporary
variable and then update rv only if the temporary variable is negative.
This way the update_load() now correctly returns 0 on tftp success and
1 only on failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-24 11:28:14 -06:00
Michael Zimmermann
30885b01aa fs/squashfs: Set ret to 0 on successful read
It might still be a positive number due to the call to sqfs_disk_read.
This only happens when reading a file from an uncompressed squashfs.

I found this by trying to boot using the extlinux bootmethod, where
positive values are treated as errors.

Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Acked-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-24 11:28:10 -06:00
Heinrich Schuchardt
0d2e561ce4 Mailmap entry for Javier Tia
Javier has left Linaro. Forward to his new email address.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Javier Tia <floss@jetm.me>
2026-04-24 11:27:27 -06:00
David Lechner
2d0de93857 lib/Kconfig: Fix SUPPORTS_FW_LOADER option
Change the SUPPORTS_FW_LOADER option to be enabled by default.

This is a dependency-only option intended to be used like:
    depends on SUPPORTS_FW_LOADER

Instead of having to always remember to do both:
    depends on CMDLINE
    depends on ENV_SUPPORT

In order to actually work though, the option has to be enabled.

Reported-by: Weijie Gao <weijie.gao@mediatek.com>
Closes: https://lore.kernel.org/u-boot/20260410015311.4066075-1-weijie.gao@mediatek.com/
Fixes: 4ed440e6be ("fw_loader: Introduce SUPPORTS_FW_LOADER symbol")
Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2026-04-23 14:39:57 -06:00
Tom Rini
03fcc16d58 Merge tag 'xilinx-for-v2026.07-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2026.07-rc1 v3. The biggest part is new
pcie driver for Versal Gen 2 SOC. Others are small fixes and
adjustments.

versal2:
- Wire PCIe IP

cmd/fpga:
- Fix loadb help text guarding
- Add support for skipping fpga ID check

zynqmp:
- Describe missing devices/IDs
- Fix issue around zu63dr_SE

clk/versal:
- Fix out-of-bounds parent id for DUMMY_PARENT

net/gem:
- Add support for 10GBE
- Clear stale speed bits in NWCFG

net/axi_emac:
- Filter out broadcast and multicast packets

pci:
- Add driver for AMD PCIe IP based on DesignWare core
2026-04-23 07:46:01 -06:00
Rafał Hibner
9e05112612 net: zynq_gem: Clear stale speed bits in NWCFG before setting new ones
Commit ecba4380ad ("net: zynq_gem: Update the MDC clock divisor in the
probe function") changed zynq_gem_init() from a direct register write to
a read-modify-write pattern in order to preserve MDC clock divider bits.
However, the old speed selection bits (SPEED100/SPEED1000) are never
cleared before OR-ing in the new value.

When the PHY renegotiates at a different speed between successive calls
to zynq_gem_init() (e.g. link flapping from 1 Gbps to 100 Mbps on a
marginal cable), both SPEED100 and SPEED1000 end up set simultaneously
in NWCFG. This confuses the GEM hardware and no frames are received.

Fix by explicitly clearing both speed bits before merging the new
configuration, so only the currently negotiated speed is ever active.

Fixes: ecba4380ad ("net: zynq_gem: Update the MDC clock divisor in the probe function")
Signed-off-by: Rafał Hibner <rafal.hibner@secom.com.pl>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260420074640.4036119-1-rafal.hibner@secom.com.pl
2026-04-23 11:52:18 +02:00
Michal Simek
8669c34566 fpga: xilinx: Add option to skip bitstream ID check
Add environment variable 'fpga_skip_idcheck' that when set to '1' or
'y' allows bypassing the device ID validation during bitstream loading.
This is useful for loading bitstreams on devices whose ID codes are not
yet recorded in the SOC driver.

Usage: setenv fpga_skip_idcheck 1
  fpga loadb 0 ${loadaddr} ${filesize}

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d0f11d0a8d48b284683f00d20dfbe323c11f2943.1776360720.git.michal.simek@amd.com
2026-04-23 11:51:48 +02:00
Pranav Tilak
89c269154b net: zynq_gem: reinitialize RX BDs on every init
Reinitialize RX BDs and rewrite rxqbase on every init instead of only
on the first init. This ensures a clean BD state on every init for all
GEM configurations.
For AMD Versal Gen 2 10GBE this is required since the USX block
resets the RX DMA pointer to rxqbase on each init, so BDs must be
rebuilt each time to stay in sync with hardware.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-4-pranav.vinaytilak@amd.com
2026-04-23 11:49:48 +02:00
Pranav Tilak
0443deb428 net: zynq_gem: set 128-bit AXI bus width for 10GBE
Set 128-bit AXI bus width in network config for 10GBE. The default 64-bit
setting causes DMA data corruption.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-3-pranav.vinaytilak@amd.com
2026-04-23 11:49:48 +02:00
Pranav Tilak
8342f57579 net: zynq_gem: add SPEED_10000 case in clock rate selection
Add SPEED_10000 case in the speed switch with the fixed 150 MHz
tx_clk rate. Without this, clk_rate stays 0 for 10000 Mbps and
clk_set_rate(0) on a fixed clock aborts initialization.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260410093018.1461732-2-pranav.vinaytilak@amd.com
2026-04-23 11:49:48 +02:00
Michal Simek
b82846dd81 cmd: fpga: Fix wrong preprocessor guard for loadb help text
The help text for the "fpga loadb" command was incorrectly guarded by
CONFIG_CMD_FPGA_LOADP instead of CONFIG_CMD_FPGA_LOADB. This meant the
loadb help text would only be shown when LOADP was enabled, rather than
when LOADB was enabled.

Fix the preprocessor condition to use the correct config option.

Fixes: f8f378877b ("fpga: add new symbol for fpga_loadb")
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/366dfe78e2028f53a6274da75547fb68844764cc.1775549229.git.michal.simek@amd.com
2026-04-23 11:49:48 +02:00
Michal Simek
106a7f7d7f board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE
The zu63dr_SE and zu67dr_SE devices share the same silicon ID code
0x046D7093 and cannot be distinguished at runtime. The SOC driver
reports zu67dr_SE for this ID, which causes fpga loadb to reject
zu63dr_SE bitstreams.

Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is
detected. This allows users to load either bitstream by selecting
the appropriate device number:
  - Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize}
  - Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize}

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/591134b1c66701fa14a21fecac4f7a772ddba876.1775558062.git.michal.simek@amd.com
2026-04-23 11:49:48 +02:00
Michal Simek
1938e7ee4e soc: xilinx: zynqmp: Add support for new ZynqMP devices
Add ID codes for the following ZynqMP devices:
- XCZU1EG_LR (0x0468A093)
- XCZU42DR (0x046D4093)
- XCZU55DR (0x046D2093)
- XCZU57DR (0x046D3093)
- XCZU58DR (0x047F9093)
- XCZU59DR (0x047FC093)
- XCZU63DR (0x046D5093)
- XCZU64DR (0x046D6093)
- XCZU65DR (0x046D1093)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/330098196cc84115899ea7a14665a8df7e279fae.1775557948.git.michal.simek@amd.com
2026-04-23 11:49:48 +02:00
Pranav Sanwal
9e17b275c5 amd: versal2: Enable PCIe/NVMe support and add NVMe boot target
Enable the AMD Versal Gen 2 DW PCIe host controller and NVMe storage
in the virtual platform defconfig:

- CONFIG_PCI / CONFIG_CMD_PCI: core PCI stack and pci command
- CONFIG_PCIE_DW_AMD: AMD Versal Gen 2 PCIe host driver
- CONFIG_NVME_PCI: NVMe-over-PCIe storage driver
- CONFIG_CMD_LSBLK: block device listing command
- CONFIG_DM_PCA953X: GPIO expander driver for PERST# control

Add BOOT_TARGET_DEVICES_NVME to amd_versal2.h so NVMe is included
in the distro boot target list when CONFIG_NVME is enabled.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-4-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2026-04-23 11:49:48 +02:00
Pranav Sanwal
7612d5874a arm: versal2: Map PCIe DBI and config regions when PCIe is enabled
The AMD Versal Gen 2 PCIe host controller places its DBI registers
(0x100000000000, 1 MB) and config space (0x100000100000, 255 MB)
above 1 TB. Without MMU entries covering these ranges, U-Boot faults
when the PCIe driver accesses them.

The two regions are merged into a single entry as these are
contiguous and share identical MMU attributes. Add this
entry under a CONFIG_IS_ENABLED(PCIE_DW_AMD) guard so it is only
included when the PCIe driver is configured. VERSAL2_MEM_MAP_USED is
adjusted from 5 to 6 accordingly, keeping the DRAM bank index correct.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-3-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2026-04-23 11:49:48 +02:00
Pranav Sanwal
3ac0ecb42f pci: Add AMD Versal2 DW PCIe host controller driver
Add support for the DesignWare-based PCIe host controller found in
AMD Versal2 SoCs. This enables PCIe functionality (e.g. NVMe storage)
on boards such as the VEK385.

The driver builds on the existing pcie_dw_common infrastructure and
adds Versal2-specific handling: it maps the SLCR register region to
mask and clear TLP interrupt status bits, parses dbi/config/atu/slcr
register regions from device tree, and supports an optional PERST#
GPIO on child nodes for endpoint reset sequencing. The outbound iATU
is programmed for the non-prefetchable memory window from device tree
ranges.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Link: https://lore.kernel.org/r/20260327121015.996806-2-pranav.sanwal@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2026-04-23 11:49:48 +02:00
Padmarao Begari
a25549d14b clk: versal: Fix out-of-bounds parent id for DUMMY_PARENT
When a clock parent entry is DUMMY_PARENT (0xFFFFFFFE), masking it
with CLK_PARENTS_ID_MASK (0xFFFF) produces the value 0xFFFE (65534).
This value is stored in parent->id and later used as a clock array
index in versal_clock_get_parentid(). Since clock_max_idx is
typically 228, accessing clock[65534] is out-of-bounds, and the
garbage value read is used as a clock ID in subsequent clock rate
calculations, eventually causing U-Boot to crash. This is observed
as a crash during "clk dump" on AMD Versal Gen 2.

Fix this by setting parent->id = 0 for DUMMY_PARENT entries.

Fixes: 95105089af ("clk: versal: Add clock driver support")
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260327101053.900154-1-padmarao.begari@amd.com
2026-04-23 11:49:48 +02:00
Michal Simek
54bd858843 net: xilinx: Reject broadcast and multicast packets in AXI Ethernet MAC
Set the XAE_RAF_BCSTREJ_MASK bit in the Reset and Address Filter (RAF)
register during hardware initialization to make the MAC drop incoming
frames with broadcast destination address. This avoids unnecessary
broadcast traffic processing by the CPU.

Additionally, when IPv6 is not enabled (CONFIG_IPV6), also set the
XAE_RAF_MCSTREJ_MASK bit to reject multicast frames. Multicast
rejection is skipped when IPv6 is configured because IPv6 Neighbor
Discovery and DHCPv6 rely on multicast.

Expose the RAF register (offset 0x0) in struct axi_regs which was
previously hidden in a reserved array.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/07ad94eb8a3a9d80273a16a7ac8c7caaba607fe2.1774282153.git.michal.simek@amd.com
2026-04-23 11:49:48 +02:00
Tom Rini
bfe90a308a Merge patch series "test: Refactor FIT test for clarity and extensibility"
Simon Glass <sjg@chromium.org> says:

This series reworks the FIT test (test_fit.py) to make it easier to
maintain and extend. It fixes the buildconfigspec so the test actually
runs on sandbox, avoids unnecessary U-Boot restarts, renames the main
test for easier selection, adds a missing-kernel check, fixes Python
warnings, converts the test to use a class, splits into separate test
functions, and adds Sphinx documentation.

Link: https://lore.kernel.org/r/20260413130007.1987326-1-sjg@chromium.org
2026-04-22 16:52:40 -06:00
Simon Glass
65c036eeec test: Add documentation for the FIT test
Add a Sphinx automodule page for test_fit.py so it appears in the pytest
documentation alongside the other test modules. The index already uses a
glob pattern, so this is picked up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
06b12fba0c test: Add fsetup fixture and prepare helper for FIT test
Create an 'fsetup' fixture which sets up files and parameters, and a
prepare() helper which builds a FIT with given parameter overrides.

Update check_equal() and check_not_equal() to look up filenames from a
params dict by key, reducing the number of local variables needed.

Split the single test_fit_operations() into individual test functions so
that each appears separately in the results.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
cd6e1f6dbe test: Convert FIT test to use a class
Move this test over to use a class instead of a function, so we can
easily split it into some related tests.

Move the TODO so it is part of the comment for the class.

Tidy up some function comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
09a9dd3780 test: Update fit test to fix a few Python warnings
Fix some warnings and disable one that cannot be fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
55aa0c5acc test: Add a check for a missing kernel
U-Boot should complain if the kernel is missing, so add a check for this
in test_fit_base()

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
875ebafe44 test: Rename test_fit() to test_fit_base()
The current name is uses as a root name by a few other tests, such as
test_fit_ecdsa() which makes it hard to run just this test.

Rename it to test_fit_base()

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
1cd07d900c test: fit: Avoid restarting U-Boot
We don't actually need to use the test FDT as the control FDT. It slows
down the test since U-Boot needs to be restarted each time.

Instead of restarting, update the test to clear memory before it loads
the FIT.

Rename the data-variable to fdt_data since is it no-longer the control
FDT.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Simon Glass
863446256b test: fit: Drop the fit_signature buildconfigspec
The test_fit test requires buildconfigspec('fit_signature') but does
not exercise signature verification. The ITS template includes a
signature-1 node, but mkimage only needs TOOLS_FIT_SIGNATURE (a host
tool option) to handle it, not CONFIG_FIT_SIGNATURE in the U-Boot
binary.

Since sandbox does not enable CONFIG_FIT_SIGNATURE, the test is silently
skipped on every run. Change the marker to buildconfigspec('fit') which
is all the test actually needs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-22 16:52:14 -06:00
Gregor Herburger
e973fa5115 cli: flush stdin before enabling cli
Currently there is no possibility to flush stdin after autocommands are
executed. If in the bootcmd the stdin is changed, e.g. from nulldev to
serial, it could happen that junk characters sit in the fifo and appear
on the cli.

Add a option to clear stdin before starting the CLI.

Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-22 14:23:49 -06:00
Gregor Herburger
2c8fdd7aea console: add console_flush_stdin()
Add a common helper console_flush_stdin() to drain all pending
characters from stdin. This consolidates the open-coded
while (tstc()) getchar() pattern that appeared in multiple places
across the tree.

Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-22 14:23:49 -06:00
Kory Maincent (TI)
3abc7c1d46 board: ti: cape_detect: Add overlay name lookup table for extension boards
Some extension boards have EEPROM part numbers that do not directly match
their devicetree overlay filenames. Introduce a static name_mapping table
and a set_cape_overlay() helper that translates the part number and version
strings read from the EEPROM into the correct overlay filename.

When no entry matches, fall back to the existing behavior of constructing
the overlay name as "<part_number>-<version>.dtbo" directly from the
EEPROM content.

Add an initial entry mapping BB-GREEN-HDMI revision 00A0 to
am335x-bone-hdmi-00a0.dtbo.

Signed-off-by: Kory Maincent (TI) <kory.maincent@bootlin.com>
2026-04-22 14:23:41 -06:00
Vitor Soares
6f44d89743 configs: aquila-am69: Set ENV_MMC_EMMC_HW_PARTITION and ENV_RELOC_GD_ENV_ADDR
Set CONFIG_ENV_MMC_EMMC_HW_PARTITION=1 to store the environment in the
eMMC first hardware boot partition instead of defaulting to 0 (user
data area), where the rootfs and data partitions normally reside,
risking corruption. This keeps the full boot stack self-contained in
the eMMC hardware boot partition.

Enable CONFIG_ENV_RELOC_GD_ENV_ADDR so that gd->env_addr is adjusted by
the relocation offset during U-Boot relocation. Without it, gd->env_addr
keeps pointing to the pre-relocation address of the default
environment, leading to incorrect environment access before env_load()
completes.

Fixes: 3f0528882c ("board: toradex: add aquila am69 support")
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-04-22 14:22:48 -06:00
Philip Molloy
1994e69d4e board: adi: Fix exception when using standalone SoM
Although less common, ADSP SoM boards can be operated standalone without
a carrier board. The SoM can be powered over USB-C by moving the jumper
on JP1.

The board configuration needs to be heavily refactored to reduce the
number of defconfigs and leverage the devicetree. The TI DP83867
support, which is dependent on that configuration, needs to be removed.
Until then this change allows the same U-Boot binary to work correctly
both with carrier boards and the standalone SoM.

The carrier board initialization code in somcrr_ezkit.c and
somcrr_ezlite.c calls gpio_hog_lookup_name() to find ethernet
control GPIOs, but does not check if the lookup succeeds before
using the returned pointers.

When running on a standalone SoM without a carrier board, these
GPIO hogs do not exist in the device tree. The gpio_hog_lookup_name()
function returns -ENODEV and sets the pointer to NULL, but the code
continues to call dm_gpio_set_value() with uninitialized pointers,
causing a synchronous abort exception:

  "Synchronous Abort" handler, esr 0x96000004
  elr: 00000000960326c4 lr : 0000000096038d5c (reloc)

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-04-22 14:22:33 -06:00
Marek Vasut
58e523fedf gunzip: Implement chunked decompression
The current gzwrite() implementation is limited to 4 GiB compressed
input buffer size due to struct z_stream_s { uInt avail_in } member,
which is of type unsigned int. Current gzwrite() implementation sets
the entire input buffer size as avail_in and performs decompression
of the whole compressed input buffer in one round, which limits the
size of input buffer to 4 GiB.

Rework the decompression loop to use chunked approach, and decompress
the input buffer in up to 4 GiB - 1 kiB avail_in chunks, possibly in
multiple decompression rounds. This way, the compressed input buffer
size is limited by gzwrite() function 'len' parameter type, which is
unsigned long.

In case of sandbox build, include parsing of 'gzwrite_chunk'
environment variable, so the chunked approach can be thoroughly tested
with non default chunk size. For non-sandbox builds, the chunk size is
4 GiB - 1 kiB.

The gzwrite test case is extended to test various chunk sizes during
gzwrite decompression test.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-22 13:51:41 -06:00
Kuan-Wei Chiu
70101c3217 virtio: mmio: Return error codes on probe failures
Currently, virtio_mmio_probe() returns 0 when it encounters an invalid
magic value, an unsupported version, or a dummy device (ID 0). In
U-Boot's driver model, returning 0 indicates a successful probe. This
causes the system to incorrectly register and activate invalid or
placeholder devices, potentially leading to undefined behavior or
crashes later on.

Update the probe function to return appropriate error codes (-ENODEV
for invalid magic values and dummy devices, and -ENXIO for unsupported
versions). This fix correctly instructs the DM to abort the binding
process.

Fixes: fdc4aca89e ("virtio: Add virtio over mmio transport driver")
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Acked-by: Daniel Palmer <daniel@thingy.jp>
2026-04-22 11:07:55 -06:00
Tom Rini
7fbed708d9 Merge tag 'u-boot-imx-master-20260421' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29880

- Convert TQMA7 boards to SPL.
- Use second Ethernet MAC also from fuse on i.MX dhelectronics boards.
- Add support for Toradex Verdin iMX95.
- Drop SPL_POWER_LEGACY from imx8m boards.
- Increase the Aquantia Ethernet PHY reset timeout.
2026-04-22 10:59:44 -06:00
Ferass El Hafidi
e07cc9e7fd configs: libretech-cc_defconfig: enable EFI Capsule on Disk
Everything is in place to allow this board to support EFI Capsule updates.
Enable everything needed to support Capsule updates, as well as Capsule
on Disk. All this allows updating U-Boot on eMMC directly from linux using
fwupd. Also enable DFU_MMC, which is a requirement for EFI Capsule flashing
to eMMC/SD to work.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-4-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 18:27:26 +02:00
Ferass El Hafidi
94deb74265 configs: libretech-ac_defconfig: enable EFI Capsule on Disk
Everything is already in place for EFI capsule updates, so enabling
Capsule on Disk is fairly trivial. This allows updating U-Boot on SPI
flash from Linux using fwupd's Capsule support.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-3-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 18:27:26 +02:00
Ferass El Hafidi
63a0b3e9ab arm: meson: enable SYSRESET_PSCI
Previously, Amlogic SoCs defined their own reset_cpu() implementation
that essentially just did what the sysreset PSCI driver already
supports. To reduce duplication (and allow for EFI Capsule on Disk
support), make use of it instead of a board-specific reset_cpu.

This does not affect SPL, as in that stage we do not actually have PSCI
(BL31 is not loaded yet at that point). Also, boards that don't select
PSCI support in their config will not have it enabled.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-2-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 18:27:26 +02:00
Ferass El Hafidi
93c13379a4 arm: mach-meson: provide reset_cpu only when SYSRESET is disabled
This is in preparation of enabling SYSRESET across all Amlogic boards by
default. SYSRESET brings its own reset_cpu implementation which will
conflict with the one defined in board-common.c.
SPL however will not have SYSRESET enabled (due to overhead in the final
image, as we have very little space to work with), and thus will still
need that reset_cpu to be defined. Furthermore, some boards do not enable
PSCI support in U-Boot, so they may still need this implementation.
Guard reset_cpu inside #ifdef to only compile it in when SYSRESET is not
enabled.

Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260422-b4-amlogic-sysreset-capsules-v3-1-07b5ccc8f552@postmarketos.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 18:27:26 +02:00
Neil Armstrong
723f14c946 clk: meson: do not fail when setting SD_EMMC_x_CLK0
Since Linux v7.0, the MMC controllers has the following properties:
  assigned-clocks = <&clkc CLKID_SD_EMMC_x_CLK0>;
  assigned-clock-rates = <24000000>;
Which causes mmc controllers to fail in probe.

Make sure we do not fail until we properly implement rate setup.

Tested-by: Ferass El Hafidi <funderscore@postmarketos.org> # on lepotato
Link: https://patch.msgid.link/20260422-u-boot-amlogic-test-v1-1-b5790d3c04e0@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 18:26:56 +02:00
Marek Vasut
1089ed95f5 ufs: rcar-gen5: Update line reset configuration
Synchronize line reset configuration with SDK 4.28 parameters.
These values are programmed into the PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20260415215837.448867-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 10:09:40 +02:00
Marek Vasut
c7ebdb9871 ufs: core: Fix heap corruption due to out of bounds write
The ufshcd_read_string_desc() can perform out of bounds write and
corrupt heap in case the input utf-16 string contains code points
which convert to anything more than plain 7-bit ASCII string.

This occurs because utf16_to_utf8(dst, src, size) in U-Boot behaves
differently than Linux utf16s_to_utf8s(..., maxlen), but the porting
process did not take that into consideration. The U-Boot variant of
the function converts up to $size utf-16 fixed-length 16-bit input
characters into as many 1..4 Byte long variable-length utf-8 output
characters. That means for 16 Byte input, the output can be up to 64
Bytes long. The Linux variant converts up utf-16 input into up to
$maxlen Bytes worth of utf-8 output, but stops at the $maxlen limit.
That means for 16 Byte input with maxlen=32, the processing will stop
after writing 32 output Bytes.

In case of U-Boot, use of utf16_to_utf8() leads to potential corruption
of data past the $size Bytes and therefore corruption of surrounding
content on the heap.

The fix is as simple, allocate buffer that is sufficient to fit the
utf-8 string. The rest of the code in ufshcd_read_string_desc() does
correctly limit the buffer to fit into the DMA descriptor afterward.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20260329231151.332108-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 10:06:01 +02:00
Alexey Charkov
c7299ff33e ufs: rockchip: Make use of controller resets
Assert Rockchip UFS controller resets during initialization and HCE
enable, as it is done by the Linux driver.

This is required to make some UFS chips, such as Foresee FEUDNN064G-C2G0,
work properly.

Note that the resets were already requested in the probe function, just
not used.

Signed-off-by: Alexey Charkov <alchark@flipper.net>
Link: https://patch.msgid.link/20260316-rockchip-ufs-reset-v1-1-808eb017459a@flipper.net
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-04-22 10:03:54 +02:00
Peng Fan
589153f607 imx8mq: phanbell: enable SPL DM
Switch the Phanbell i.MX8MQ SPL to full Driver Model (DM) boot flow by
moving early device initialization into devicetree and enabling the
required SPL DM subsystems.

Mark GPIO, USDHC, pinctrl, and regulator nodes with bootph-pre-ram so
they are available during SPL. With DM handling MMC and power rails,
remove legacy board-specific USDHC, GPIO, and pad setup code from SPL.

Update the SPL initialization sequence to use spl_early_init(), clears
BSS earlier, and explicitly enables USDHC clocks before handing off to
board_init_r().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
8b77b55aa6 imx8mq: kontron: migrate PITX-IMX8M to DM PMIC framework
Migrate the Kontron PITX-IMX8M board from the legacy power framework
to the DM PMIC infrastructure.

The SPL power initialization is converted to use DM_PMIC_PFUZE100,
dropping all legacy I2C, GPIO, pinmux, and MMC setup code that is
now handled through the device tree and driver model instead.

Key changes:
- Switch PFUZE100 access to DM PMIC APIs
- Enable SPL OF_CONTROL and mark required nodes with bootph*
- Remove legacy I2C and power configuration
- Enable SPL DM, pinctrl, regulator, and PMIC support
- Adjust SPL stack placement for DM usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
146079d8d1 imx8mq: pico: Drop SPL_POWER_LEGACY
This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
c2f0d5ddb2 imx8mq: reform2: Drop SPL_POWER_LEGACY
This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
606d57ef6f imx8mq: phanbell: Drop SPL_POWER_LEGACY
This board does not have any code to call legacy power API, so drop the
selection of CONFIG_SPL_POWER_LEGACY.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
186011ec8d imx8mq: evk: Migrate to DM PMIC framework
Migrate the i.MX8MQ EVK board to the Driver Model (DM) PMIC framework.
This replaces legacy PMIC handling with DM_PMIC and enables proper
device-model support during SPL.

As part of this transition, enable CONFIG_SPL_DM and the required
DM subsystems such as I2C, PINCTRL, MMC, GPIO, and regulators so the
SPL boot flow continues to work correctly.

Board-specific SPL code is simplified accordingly by removing legacy
I2C, USDHC, and PMIC handling, relying instead on device tree
descriptions and DM drivers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:40 -03:00
Peng Fan
64e9956764 board: nxp: common: fix PFUZE100 DM build and unify DM/non-DM handling
Switch PFUZE100 object linkage to be phase-aware and fix build issues
when using driver model PMIC support.

The PFUZE100 helper code is reworked to:
- Build pfuze.o only when CONFIG_(SPL_)DM_PMIC_PFUZE100 is enabled
- Use CONFIG_IS_ENABLED(DM_PMIC_PFUZE100) for proper DM/non-DM selection
- Align function signatures and implementations with DM PMIC APIs
- Use udevice-based pmic access for DM and legacy pmic for non-DM
- Avoid mixing struct pmic and struct udevice in the same build
  configuration

No functional change intended beyond fixing DM support and build
consistency.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
b29ce12fc2 mx6: sabreauto/sd: Exclude power_init_board from SPL build
To mx6sabreauto and mx6sabresd, power_init_board is called in board_r phase.
After CONFIG_SPL_DM_PMIC_PFUZE100 included, there will be build error to build
power_init_board() when CONFIG_SPL_DM_PMIC_PFUZE100 is not enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
5b6dba2924 imx8mq: Correct signed_hdmi firmware position
signed_hdmi_imx8m.bin is already signed and has a IVT header. It should not
be put in u-boot-spl-mkimage.signed.bin. Move it to head of flash.bin
following NXP imx-mkimage. Keeping it in u-boot-spl-mkimage.signed.bin also
consumes a lot of TCM space which is not expected.

While moving it to head of flash.bin, other changes are required,
u-boot.itb is put at sector 768 per defconfig, so u-boot.itb binman
offset should be updated and it should be moved out from binman section.

Also binman symbol address are updated, so need to subtract u-boot-spl
image_pos + CONFIG_SPL_TEXT_BASE to find the correct location of ddr phy
firmware.

Because there is 1KB padding in HDMI firmware, use 32KB when burning
flash.bin to sd card.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
913b8c6cb8 imx8mq: cm: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
10ca7ec200 imx8mq: pico: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
b79b9635e2 imx8mq: reform2: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
27d49fc9ec imx8mq: phanbell: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
bb95b52582 imx8mq: pitx: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Peng Fan
5a9da0e505 imx8mq: evk: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Emanuele Ghidoli
a6d6fc94f0 toradex: tdx-cfg-block: add verdin imx95 0226, 0227 and 0228 pid4
Add these new PID4 to config block handling:
 - 0226 Verdin iMX95 Hexa 4GB WB IT
 - 0227 Verdin iMX95 Hexa 4GB ET
 - 0228 Verdin iMX95 Hexa 16GB IT

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-21 20:49:39 -03:00
Emanuele Ghidoli
60d8255d8d board: toradex: add Toradex Verdin iMX95
Add support for the Toradex Verdin iMX95.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-21 20:49:39 -03:00
Emanuele Ghidoli
0977448b45 common: memsize: add RAM size probe based on alias detection
Add probe_ram_size_by_alias() to detect RAM size by checking whether a
write to one address aliases to another address.

Compared to get_ram_size(), this function allows the caller to:
- limit probing to a small set of required accesses
- avoid touching reserved or already used memory regions
- handle non-linear alias patterns

On the iMX95 SoC, when used with LPDDR5, accesses beyond the end of an 8GB DDR
configuration do not alias to the expected linear wrap-around addresses.
Instead, the aliased addresses appear to follow a pattern related to the
DDRC bank and bank-group addresses mapping. Experimentally, the observed
pattern is:

Write        Read
y00000000 -> x0001c000
y00004000 -> x00018000
y00008000 -> x00014000
y0000c000 -> x00010000
y00010000 -> x0000c000
y00014000 -> x00008000
y00018000 -> x00004000
y0001c000 -> x00000000

This helper makes it possible to probe RAM size by explicitly specifying
the probed address and the expected alias address for each size check.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-21 20:49:39 -03:00
Primoz Fiser
60f6514608 imx: imx9: Select ARCH_MISC_INIT for all i.MX9 SoCs
Instead of adding select ARCH_MISC_INIT for each i.MX 9x SoC, select it
at the i.MX9 family Kconfig level. The corresponding arch_misc_init() is
already defined in the common arch/arm/mach-imx/imx9/soc.c file and will
print out ELE firmware BuildInfo for all i.MX9 SoCs now instead of just
i.MX91 and i.MX95.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-21 20:49:39 -03:00
Christoph Niedermaier
69d4387575 board: dhelectronics: imx: Use second Ethernet MAC also from fuse
Currently, the board specific code evaluates only the first Ethernet
MAC address fuse, regardless of whether the first or second MAC
address is requested. When the function to determine the second
Ethernet MAC address is looking for the fused MAC address, it only
reads the first MAC address fuse and increment it by one to set
the second Ethernet MAC address. That is not the expected behavior
when two MAC addresses are fused, because this causes the second
fused MAC address to be ignored. Change this so that the second
fused MAC address will be used.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@nabladev.com>
2026-04-21 20:49:39 -03:00
Ye Li
e7e35b85de net: fsl_enetc: Add iMX95 enetc4 10Gbps port support
1. Add optional serdes-supply regulator property support.
2. Enable 10Gbps feature for the controller, configure netc blkctrl
   CFG_LINK_PCS_PROT_2 to 10G SXGMII.
3. Add internal xpcs phy initialization to 10G XGMII Mode without
   auto-negotiation interface.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2026-04-21 20:49:39 -03:00
Ye Li
73d093afdf net: phy: aquantia: Increase timeout for out of reset
Current timeout for PHY out of reset is 50ms which is too short.
Increase it to 2s to align with kernel.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
cf5c9f2a14 doc: tqma7: add documentation
Add readme for the tqma7 board.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
1bcdfc07dc configs: tqma7: add defconfigs
Add general shared configurations for different
boot media and variants for every RAM configuration.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
d000ce5efe board: tqma7: add code for u-boot with spl
The TQMa7x is a SoM family with a pluggable board connector based on the
i.MX7 SoCs. Add support for the SoM and its combination with our
MBa7x carrier board.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
7737542502 arch: arm: dts: tqma7x: add boot phase properties
Revert this commit once the upstream linux device trees are
synchronized.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
ae0d13f59d arch: arm: dts: tqma7x: add u-boot device tree fragments
Add u-boot specific device tree properties.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Nora Schiffer
9f1807e57c env: add env_set_runtime() helper
env_set_runtime() is equivalent to env_set(), but does nothing when
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is unset.

Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Signed-off-by: Steffen Doster <Steffen.Doster@tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
c8eebe0a70 board/tq: Add common SoM API
Reduce code duplication by adding a default implementation.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Alexander Feilke
60d41b6551 Kconfig: update build-target for MX7 with SPL
Prepare for MX7-based module with SPL support.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-04-21 20:49:39 -03:00
Simona Toaca
faa8c17995 configs: imx9{43, 5}: Enable SPI SFDP support
This option needs to be enabled so that the
erase size of the SPI NOR device is parsed correctly.

Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
2026-04-21 20:49:39 -03:00
Simona Toaca
3814d57597 drivers: ddr: imx: Fix Kconfig for SAVED_DRAM_TIMING_BASE
The 'default' directive should be before 'help'.

Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-04-21 20:49:39 -03:00
Simon Glass
09297182ad kbuild: Use if_changed for font and splash .incbin rules
The generated .S files for fonts and splash screens use .incbin with the
full prerequisite path. When building with O= this bakes an absolute
path into the .S file. If the build directory is later used on a
different machine (e.g. in a container), the assembler cannot find the
source file.

Follow the existing DTB convention: rename the object targets to use
compound suffixes (.ttf.o, .bmp.o), switch the pattern rules from
direct $(call cmd,...) to FORCE + $(call if_changed,...), and register
the new suffixes with intermediate_targets so that kbuild loads their
.cmd files. This lets if_changed detect when the recorded command
(including source paths) has changed and regenerate the .S file
automatically.

The EFI rule is left unchanged since its prerequisite is a generated
file in the build directory, like the DTB and DTBO rules.

The intermediate_targets entries stay in scripts/Makefile.build rather
than moving to scripts/Makefile.lib-u-boot, because that file is
included before intermediate_targets is defined and 'targets' is ':=',
so a '$(call intermediate_targets, ...)' inside it would expand to
empty and silently drop the entries. To keep the upstream block
untouched, the U-Boot additions go in a separate 'targets +=' block
immediately below.

Suggested-by: Rasmus Villemoes <ravi@prevas.dk>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rasmus Villemoes <ravi@prevas.dk>
2026-04-21 15:56:54 -06:00
Simon Glass
24b99d2933 kbuild: Move U-Boot .incbin rules to Makefile.lib-u-boot
The font, splash-screen and EFI .incbin wrapper rules are U-Boot
additions that do not exist in the upstream Linux kbuild. Keeping them
in scripts/Makefile.lib makes re-syncing with Linux harder than it needs
to be, as every sync must manually preserve the U-Boot additions.

Move these rules into a new scripts/Makefile.lib-u-boot and include it
from Makefile.build and Makefile.xpl, right after the existing
Makefile.lib include.

This is a pure code-move with no functional change.

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Rasmus Villemoes <ravi@prevas.dk>
2026-04-21 15:56:54 -06:00
Julien Stephan
86122451b5 boot/fit: fix misleading comment
When load address is specified but set to 0, we ignore it and load in
place instead. The current comment is misleading, so update it.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-04-21 15:56:43 -06:00
Tom Rini
aac96c3e12 Merge patch series "test: Convert tests to use FsHelper and DiskHelper"
Simon Glass <sjg@chromium.org> says:

This series adds a DiskHelper class and converts most test code to use
FsHelper and DiskHelper instead of calling mk_fs() and setup_image()
directly.

The FsHelper class (already upstream) provides a cleaner interface for
creating filesystem images, handling temporary directories and cleanup
automatically. The new DiskHelper class builds on this, creating
partitioned disk images from one or more FsHelper filesystems.

DiskHelper includes a cur_dir flag to place the disk image in the
current directory rather than the persistent-data directory. This
matches the behaviour of setup_image() which places disk images in
source_dir where sandbox expects to find them. This flag is needed for
now and should be removed in a follow-up once all tests are migrated to
use the persistent-data directory instead.

With these helpers, test-setup code becomes shorter, more consistent and
easier to follow. Manual sfdisk/dd/cleanup sequences are replaced by a
few method calls.

The series also fixes a broken fs_obj_fat fixture where a stale
size_gran argument is silently causing the test to be skipped.

A few EFI test fixtures (efi_capsule, efi_secboot, eficonfig) still use
mk_fs() directly; these are left for a follow-up series since they would
benefit from a full DiskHelper conversion.

Link: https://lore.kernel.org/r/20260404140328.3724864-1-sjg@chromium.org
2026-04-21 15:56:20 -06:00
Simon Glass
bbc04206b5 test: Convert test_fs fixtures to use FsHelper
Replace all direct calls to the mk_fs() function with FsHelper in the
filesystem test fixtures. Each fixture now creates an FsHelper instance,
populates its srcdir with test files, then calls mk_fs() on the object.

This removes manual scratch-directory management and cleanup code, since
FsHelper handles the source directory and image-file lifecycle.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:39 -06:00
Simon Glass
1469083834 test: Convert setup_rauc_image() to use FsHelper
Use FsHelper and DiskHelper to create the RAUC A/B disk image. This
replaces the manual sfdisk and dd commands, making the code shorter
and easier to follow.

The same boot and root filesystems are added twice to produce the
A/B partition layout.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
8fc67f3901 test: Rename setup_bootflow_image()
The name of this is fairly vague. Use 'extlinux' so that it is clear
that it relates to that format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
28e8fcd9ea test: Convert test_ut_dm_init() to use FsHelper
Use the helper here, for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
22ff15d191 test: Convert setup_efi_image() to use FsHelper
Simplify this test-setup code by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
e7c46fc967 test: Convert setup_bootflow_image() to use FsHelper
Simplify this test-setup code by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
e3077e03e6 test: Split out core of Fedora image into a new function
To permit easier adding of other images, move the Fedora-specific
portions of setup_bootflow_image() into a separate function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
57e1788ee1 test: Convert setup_bootmenu_image() to use FsHelper
Simplify this test-setup code by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
3dc999d17e test: Convert test_efi_bootmgr to use FsHelper
Simplify this test by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
17eb232e47 test: Convert test_xxd to use FsHelper
Simplify this test by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
46a7324690 test: Convert test_cat to use FsHelper
Simplify this test by using the helper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
e072d3aa24 test: Fix broken fs_obj_fat fixture
The removal of the size_gran parameter from mk_fs() leaves a stale
positional argument (1024) that is now interpreted as the fs_img
filename. Since 1024 is an integer, os.path.join() raises TypeError,
causing the fixture to silently skip via the bare except clause.

Drop the stale argument so the fixture works again.

Fixes: d030dc34d6 ("test: fs_helper: Drop the size_gran argument")
Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
4e1793b1fb test: fs_helper: Skip empty srcdir when creating a filesystem
FsHelper.mk_fs() always creates a srcdir via setup(), then passes it
to the module-level mk_fs(). This fails for filesystem types like ext2
that do not support the -d flag, raising ValueError even when no files
need to be copied.

Pass None for src_dir when the srcdir is empty, so that creating an
empty filesystem works for all supported types.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Simon Glass
7c69117337 test: Add a helper class to create disk images
Provide a way to create disk images which consist of multiple filesystem
images.

Include a cur_dir option to place the disk image in the current
directory rather than in the persistent-data directory. This matches the
behaviour of setup_image() which places disk images in source_dir where
sandbox expects to find them. This flag is a temporary feature and
should be removed once all tests are migrated to use the persistent-data
directory instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-21 15:30:38 -06:00
Tom Rini
052988aa29 Merge patch series "Linux compat improvements and CCF prep"
Casey Connolly <casey.connolly@linaro.org> says:

This series implements various improvements to Linux header
compatibility, largely in preparation for a full port of Linux CCF but
many of these changes would also be helpful when porting other drivers.

Beside the basic header/compat stuff there are a few larger patches:

Patch 1 adds the "%pOF" format specifier to vsprintf, this behaves the
same as it does in Linux printing the name of the ofnode, but notably it
expects an ofnode pointer rather than a device_node.

Patch 2 adds an option to skip doing a full DM scan pre-relocation.
Some platforms like Qualcomm don't actually need devices to be probed
prior to relocation, it is also quite slow to scan the entire FDT before
caches are up. This option gets us to main loop 30-50% faster.

Unfortunately it isn't possible to totally skip DM since U-Boot will
panic if it can't find a serial port, but the serial uclass code will
bind the serial port itself by reading /chosen/stdout-path, however any
dependencies like clocks won't be found so this should only be enabled
if the serial driver gracefully handles missing clocks.

Patch 3 adds [k]strdup_const(), this works the same as the Linux version
saving a small amount of memory by avoiding duplicating strings stored
in .rodata, this is particularly useful for CCF.

Patch 4 adds 64-bit versions of some 32-bit ofnode utilities functions,
making it possible to parse 64-bit arrays.

Patch 6 provides a simple implementation of kref, this will be used
by CCF.

Patch 9 adds devm_krealloc() support to devres, it relies on storing
allocation sizes in the devres struct which will add a small overhead.

Link: https://lore.kernel.org/r/20260401-casey-ccf-compat-v2-0-414d5b7f040b@linaro.org
2026-04-21 11:21:59 -06:00
Casey Connolly
f1f4a1d1d8 compat: math64: add abs_diff()
Add the abs_diff() macro, copied directly from Linux 6.18.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
076265b75e compat: regulator: add enable/disable macros
These just wrap regulator_set_enable() and provide a closer analogue to
the Linux API.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
6c11994b7e regmap: add regmap_assign_bits
This is a simple wrapper around set/clear bits used by drivers in Linux.
Add it here so it can be used by Qualcomm CCF clk drivers.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
fae701400d compat: add linux/regmap.h symlink
Add a symlink to the Linux regmap.h path so that drivers ported from
Linux don't all need additional changes to include the U-Boot specific
path.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
8e0ed228d8 compat: add dev_name()
This function just wraps udevice->name.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
70b5537755 compat: add kref implementation
This is a very basic port of Linux' kref, we don't actually need atomics
so we just use a simple counter. This is used by CCF to free unused
clocks.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
3f6f674b4a compat: add PTR_ERR_OR_ZERO
Imported from Linux, this is nice to have along with the other ERR_PTR
helper macros.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
45c610d718 ofnode: add read_u64_array and count_elems_of_size
These are similar to their Linux counterparts, adding helpers
for reading arrays of 64-bit values with of_access and fdtdec
implementations.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
139f5292e7 string: add strdup_const and kstrdup_const
Extend Linux compat by adding kstrdup_const(), backed by lib/string.c.
This leverages U-Boots .rodata section on ARM64 to avoid pointlessly
duplicating const strings.

This is used by the Linux CCF_FULL port and may be useful elsewhere
in U-Boot.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
f5e96fdffc common: add an option to skip DM pre-relocation
For some platforms like Qualcomm, it isn't necessary to perform a full
DM init and scan prior to relocation, it's also particularly slow since
it runs with dcache disabled and prior to building the livetree.

The only device which needs to be probed pre-reloc is the serial
port (otherwise U-Boot will panic), however this can be found through
/chosen/stdout-path.

Therefore we can avoid scanning the entire FDT and binding devices,
instead just binding the serial port and clock driver on-demand.

This decreases the total time from power on to reaching the interactive
U-Boot shell be about 50% (from ~2.8s to 1.8s).

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Casey Connolly
968164b686 vsprintf: add %pOF
This prints a full ofnode path.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-21 11:19:49 -06:00
Tom Rini
5d401bfbdf Subtree merge tag 'v7.0-dts' of dts repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git

- Remove netc_timerX nodes from arch/arm/dts/imx943-u-boot.dtsi as they
  are now upstream
- Move dts/upstream/include/dt-bindings/reset/bcm6318-reset.h to
  include/dt-bindings/reset/bcm6318-reset.h as upstream has removed this
  file as unused (but we use it).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-20 11:43:11 -06:00
Tom Rini
b427decccf Squashed 'dts/upstream/' changes from 258d5b0e2447..0f7b6a4fa8c5
0f7b6a4fa8c5 Merge tag 'v7.0-dts-raw'
2ee059ad64bc Merge tag 'sound-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
0e5e2595317a Merge tag 'net-7.0-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
3d8eb1e4ab16 Merge tag 'hid-for-linus-2026040801' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid
c65c7bc04464 Merge tag 'soc-fixes-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
89ac80ac458e ASoC: dt-bindings: ti,tas2552: Add sound-dai-cells
886c87e1d20d Merge tag 'v7.0-rc7-dts-raw'
ab2fb67b93ff Merge tag 'usb-7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
cedc3ce5a407 Merge tag 'at91-fixes-7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes
c0bd3803eea5 dt-bindings: net: Fix Tegra234 MGBE PTP clock
6f80847c7834 Merge tag 'gpio-fixes-for-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
7254a1c879c8 Merge tag 'auxdisplay-v7.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-auxdisplay
ae38f964b0e9 Merge tag 'qcom-arm64-fixes-for-7.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
4ac746a07cd1 Merge tag 'sunxi-fixes-for-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
45d8428a0506 Merge tag 'renesas-fixes-for-v7.0-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes
205268038e36 Merge tag 'hisi-dts-fixes-for-7.0' of https://github.com/hisilicon/linux-hisi into arm/fixes
250c64641844 Merge tag 'reset-fixes-for-v7.0-2' of https://git.pengutronix.de/git/pza/linux into arm/fixes
6f42528db7ff dt-bindings: connector: add pd-disable dependency
95e5d15bf904 Merge tag 'v7.0-rc6-dts-raw'
255618d9c419 arm64: dts: qcom: hamoa: Fix incomplete Root Port property migration
d02507a2f43d dt-bindings: gpio: fix microchip #interrupt-cells
fe62c4380d42 Input: add keycodes for contextual AI usages (HUTRR119)
ecf92feb8ef2 Merge tag 'v7.0-rockchip-dtsfixes1-v2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
04f90a9fb494 Merge tag 'imx-fixes-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into arm/fixes
f73f1b9408b8 dt-bindings: display/msm: qcm2290-mdss: Fix missing ranges in example
5ecb37d519a4 ASoC: adau1372: Fix error handling in adau1372_set_power()
9909a4af67ac arm64: dts: renesas: sparrow-hawk: Reserve first 128 MiB of DRAM
230b81813707 ASoC: dt-bindings: stm32: Fix incorrect compatible string in stm32h7-sai match
e26149984a37 arm64: dts: qcom: agatti: Fix IOMMU DT properties
f7978b1d9e30 dt-bindings: media: venus: Fix iommus property
671b5c92b402 dt-bindings: display: msm: qcm2290-mdss: Fix iommus property
449ff6626b43 arm64: dts: allwinner: sun55i: Fix r-spi DMA
b1402f1dc2e2 reset: spacemit: k3: Decouple composite reset lines
b15317e7accc ARM: dts: microchip: sam9x7: fix gpio-lines count for pioB
1c8975c65a4b Merge tag 'v7.0-rc5-dts-raw'
6d87e2bc2c27 arm64: dts: hisilicon: hi3798cv200: Add missing dma-ranges
175b76680d3e arm64: dts: hisilicon: poplar: Correct PCIe reset GPIO polarity
83fb5283a386 Merge tag 'regulator-fix-v7.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
eeb1c67582b8 Merge tag 'mtd/fixes-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
0d188ae18393 Merge tag 'soc-fixes-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
f984219e1c2a arm64: dts: qcom: monaco: Reserve full Gunyah metadata region
df0a8f8037b9 arm64: dts: imx8mq-librem5: Bump BUCK1 suspend voltage up to 0.85V
20dcc98b93ee Revert "arm64: dts: imx8mq-librem5: Set the DVS voltages lower"
29e5e850cab9 Revert "ARM: dts: imx: move nand related property under nand@0"
f30193c4453e regulator: dt-bindings: fix typos in regulator-uv-* descriptions
c631fcd413bc ASoC: dt-bindings: rockchip: Add compatible for RK3576 SPDIF
6285a7235b0d Merge tag 'v7.0-rc4-dts-raw'
d44f2d912bd2 Merge tag 'i2c-for-7.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
6ce3b78df9af Merge tag 'renesas-fixes-for-v7.0-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes
02045255e368 Merge tag 'drm-fixes-2026-03-14' of https://gitlab.freedesktop.org/drm/kernel
25d9d22d1150 Merge tag 'spi-fix-v7.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
714d6872b448 Merge tag 'drm-msm-fixes-2026-03-06' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
ef094460269a Merge tag 'powerpc-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
eadcbbfb08db dt-bindings: mtd: st,spear600-smi: Fix example
f9d4680ccb75 dt-bindings: mtd: st,spear600-smi: #address/size-cells is mandatory
b08c91776a9f dt-bindings: mtd: st,spear600-smi: Fix description
1e28ec3f1d54 spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
4622b3cb6da6 dt-bindings: i2c: dw: Update maintainer
d43401f40fa6 Merge tag 'v7.0-rc3-dts-raw'
bb60ef867d32 Merge tag 'hwmon-for-v7.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
29ca806b0f5e powerpc: dts: mpc83xx: Add unit addresses to /memory
ad5ff447814f powerpc: dts: mpc8315erdb: Add missing #cells properties to SPI bus
bb87ffb59ac7 powerpc: dts: mpc8315erdb: Rename LED nodes to comply with schema
4c8ef8cc4349 powerpc: dts: mpc8315erdb: Use IRQ_TYPE_* macros
7df07ab447d2 powerpc: dts: mpc8313erdb: Use IRQ_TYPE_* macros
18d294f660a5 dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
5a3981e886f4 Merge tag 'sound-7.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
5d4c6f999c79 arm64: dts: renesas: r8a78000: Fix out-of-range SPI interrupt numbers
fd633fa28212 arm64: dts: renesas: rzg3s-smarc-som: Set bypass for Versa3 PLL2
7b10299bc62f arm64: dts: renesas: r9a09g087: Fix CPG register region sizes
3367a3da5512 arm64: dts: renesas: r9a09g077: Fix CPG register region sizes
a0216b8c62e7 arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes
0ea8548222a4 arm64: dts: renesas: rzv2-evk-cn15-sd: Add ramp delay for SD0 regulator
bfbd4713207b arm64: dts: renesas: rzt2h-n2h-evk: Add ramp delay for SD0 card regulator
8f7f462e855b dt-bindings: display/msm: qcom,sm8750-mdss: Fix model typo
b0105bf2ff13 dt-bindings: display: msm: Fix reg ranges and clocks on Glymur
bb1688d262d5 Merge tag 'net-7.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
5ea472f3bf7c Merge tag 'riscv-soc-fixes-for-v7.0-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes
0b25fad21c5f arm64: dts: qcom: monaco: Fix UART10 pinconf
ebd44a7a8f1e ASoC: dt-bindings: renesas,rz-ssi: Document RZ/G3L SoC
43a6310e0b23 powerpc: dts: fsl: Drop unused .dtsi files
9a329fe2d894 dt-bindings: auxdisplay: ht16k33: Use unevaluatedProperties to fix common property warning
1d251b587dea dt-bindings: hwmon: sl28cpld: Drop sa67mcu compatible
8fc9fac8b677 ASoC: dt-bindings: tegra: Add compatible for Tegra238 sound card
f7a31219fbe7 dt-bindings: net: can: nxp,sja1000: add reference to mc-peripheral-props.yaml
a394424f72ae Merge tag 'v7.0-rc2-dts-raw'
d08d81384b5e Merge tag 'spi-fix-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
4a0fd4211639 arm64: dts: imx93-tqma9352: improve eMMC pad configuration
9cbc1d4aa426 arm64: dts: imx91-tqma9131: improve eMMC pad configuration
59794ebc677e arm64: dts: imx93-9x9-qsb: change usdhc tuning step for eMMC and SD
fec240ccc5a0 arm64: dts: imx8mq: Set the correct gpu_ahb clock frequency
172138635790 spi: dt-bindings: snps,dw-abp-ssi: Remove unused bindings
2dc6354f4af3 arm64: dts: qcom: qcm6490-idp: Fix WCD9370 reset GPIO polarity
e35289a71311 arm64: dts: qcom: hamoa/x1: fix idle exit latency
81f7574087fe Merge tag 'v7.0-rc1-dts-raw'
eb816f7677f7 regulator: dt-bindings: mt6359: make regulator names unique
4956bc4ca9de Revert "arm64: dts: rockchip: Further describe the WiFi for the Pinebook Pro"
f71d66625968 Merge tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
ea14902fe993 Merge tag 'i2c-for-7.0-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
30b331d4b38e Merge tag 'sound-fix-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
7f20326eebd0 Merge branch 'i2c/i2c-host-2' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
f058abf5b2ca Merge tag 'asoc-fix-v7.0-merge-window' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
47b192965593 ASoC: dt-bindings: asahi-kasei,ak5558: Fix the supply names
8e3ff6b6e0f1 ASoC: dt-bindings: asahi-kasei,ak4458: Fix the supply names
1bdcb99a73c9 ASoC: dt-bindings: asahi-kasei,ak4458: set unevaluatedProperties:false
2bbbeb0e7579 Merge tag 'dmaengine-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
70a572693eca Merge tag 'phy-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
80d9b9833242 Merge tag 'soundwire-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire
fc094c09d520 Merge tag 'usb-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
3af47c3138ac Merge tag 'tty-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
323c63de0303 Merge tag 'char-misc-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
2c1f5f24e9ef Merge tag 'linux-watchdog-6.20-rc1' of git://www.linux-watchdog.org/linux-watchdog
c824dfdf99bf Merge tag 'leds-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
d24edeef0cd3 Merge tag 'backlight-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/backlight
38ba39a8a02c Merge tag 'mfd-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
7f0f8d32fbbc Merge tag 'pinctrl-v7.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
3ed15538ea59 Merge tag 'mips_7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
87344539d55d Merge tag 'i2c-for-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
2c01127cb7fe Merge tag 'input-for-v7.0-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
ae6287628368 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
68cca576a098 Merge branch 'next' into for-linus
e8ae3c914195 Merge tag 'loongarch-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
4bd56abfed21 Merge tag 'rproc-v7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux
469ab8f87279 Merge tag 'mailbox-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
279461aa2ca1 Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next
bb87a0437342 Merge branches 'clk-imx', 'clk-divider', 'clk-rockchip' and 'clk-microchip' into clk-next
a44cbb15f262 Merge branches 'clk-amlogic', 'clk-thead', 'clk-mediatek' and 'clk-samsung' into clk-next
d66f354507f5 Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' into clk-next
64f131e35069 Merge tag 'mtd/for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
2ea8429cb6c7 Merge tag 'nand/for-7.0' into mtd/next
c97375b771ff Merge tag 'riscv-for-linus-7.0-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
0bef48a293b0 Merge tag 'for-v7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
2485149cfe0d Merge tag 'ata-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux
e937a56c89b0 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
b837f21c681a Merge tag 'for-linus' of https://github.com/openrisc/linux
9fa7d35f68c2 ASoC: dt-bindings: asahi-kasei,ak5558: Reference common DAI properties
a023f11b1edb Merge tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
b86161c7e1ec Merge tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
15103153d3f7 Merge tag 'pci-v7.0-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
a35a7827d08e Merge tag 'drm-next-2026-02-11' of https://gitlab.freedesktop.org/drm/kernel
2a8556f9eecc Merge tag 'media/v7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
b93c5ab0b805 Merge tag 'sound-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
243a1edd6d09 Merge tag 'hwmon-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
507ddba63e3f Merge tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
2ee644a1dc90 Merge tag 'pwrseq-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
8e02b14f6c91 Merge tag 'pwm/for-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux
68edd291177b Merge tag 'spi-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
b31400b246c8 Merge tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
81ece41ce8ae dt-bindings: net: dsa: add MaxLinear MxL862xx
8f967c541482 Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
6e7f6ca4e88c Merge tag 'soc-drivers-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
aa32a0ebc3a7 dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic
4a9ee4ae797f Merge tag 'irq-drivers-2026-02-09' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
e3eae9ec4856 ASoC: Merge up release
decaee82cb13 Merge tag 'v7.0-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
29d6648cce9a LoongArch: dts: loongson-2k1000: Add nand controller support
2046ea79bada LoongArch: dts: loongson-2k0500: Add nand controller support
e6e0d1a06767 dt-bindings: net: dsa: lantiq,gswip: reference common PHY properties
495e7f9e2b7d dt-bindings: input: qcom,pm8941-pwrkey: Document PMM8654AU
f2611a8ac07e Merge tag 'thermal-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
4e6206cce433 dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings
ed2533566b6f dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement
9777625ba13d Merge tag 'pm-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
f9b1cda42d68 Merge tag 'asoc-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
440b93b165c2 dt-bindings: trivial-devices: Add hitron,hac300s
6c474d901a04 dt-bindings: i2c: Add CP2112 HID USB to SMBus Bridge
9a9a07c8d8f1 Merge branch 'pci/controller/dwc-qcom-ep'
6d8625fbc93c Merge branch 'pci/controller/dwc-imx6'
148c83cf986b Merge branch 'pci/controller/aspeed'
6a588260a00e riscv: dts: microchip: add can resets to mpfs
df86f7273fc0 ASoC: dt-bindings: fsl,imx-asrc: Add support for i.MX952 platform
8b04664b116a spi: cadence-qspi: Add Renesas RZ/N1 support
15351a537c20 spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
a65f196bd27f Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
0e8afdb51c12 dt-bindings: usb: renesas,usbhs: Add RZ/G3E SoC support
52032279a84b Merge tag 'wireless-next-2026-02-04' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
0db094276416 dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L RMII{tx,rx} clocks
44492dbc45e6 dt-bindings: net: nxp,s32-dwmac: Use the GPR syscon
7ce5faa19695 ASoC: ti: davinci-mcasp: Add asynchronous mode
86668f9ec320 Samsung S2MPG10 regulator and S2MPG11 PMIC drivers
f4fd1ca09f1a ASoC: dt-bindings: davinci-mcasp: Add properties for asynchronous mode
83340f50b750 dt-bindings: dma: qcom,gpi: Update max interrupts lines to 16
c356e9e09dc8 dt-bindings: i2c: qcom-cci: Document qcs8300 compatible
9218d5618630 dt-bindings: phy: ti,control-phy-otghs: convert to DT schema
8934b08a621e dt-bindings: phy: ti,phy-usb3: convert to DT schema
cb0b26459316 ASoC: dt-bindings: fsl_rpmsg: Add compatible string for i.MX952
cd392ac6ba7d ASoC: dt-bindings: fsl_rpmsg: Add compatible string for i.MX94
b5f6cd4eae79 regulator: dt-bindings: add s2mpg11-pmic regulators
dd1a48948b7c regulator: dt-bindings: add s2mpg10-pmic regulators
7cb79dceffc0 dt-bindings: firmware: google,gs101-acpm-ipc: convert regulators to lowercase
a707e0922d03 dt-bindings: mfd: da9055: Fix dead link to codec binding
83da84647e2a dt-bindings: input: touchscreen: imagis: allow linux,keycodes for ist3038
c37dc965dde0 dt-bindings: leds: Convert ti,lm3697 to DT schema
93c05dbec2bb dt-bindings: mfd: Add samsung,s2mpg11-pmic
aa62dfb78f24 dt-bindings: mfd: samsung,s2mpg10-pmic: Link to its regulators
dfdbbb234175 dt-bindings: mfd: samsung,s2mps11: Split s2mpg10-pmic into separate file
4699e70cc981 dt-bindings: backlight: qcom-wled: Document ovp values for PMI8950
12098b970450 dt-bindings: backlight: qcom-wled: Document ovp values for PMI8994
a4f601b4b83a dt-bindings: interrupt-controller: sifive,plic: Clarify the riscv,ndev meaning in PLIC
b34cf04f8fff dt-bindings: leds: Add new as3668 support
54c72cac692d dt-bindings: leds: qcom,spmi-flash-led: Add PMH0101 compatible
f573a833305f dt-bindings: leds: leds-qcom-lpg: Add support for PMH0101 PWM
210e33780610 dt-bindings: leds: Allow differently named multicolor LEDs
0a514b51f7e8 dt-bindings: leds: add TI/National Semiconductor LP5812 LED Driver
dcab4d11d3d1 dt-bindings: leds: Add issi,is31fl3293 to leds-is31fl32xx
dc07d15b4ce3 Merge tag 'soc_fsl-6.20-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers
69547b8ff1ab Merge tag 'socfpga_dts_updates_for_v6.20_v3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
4da7192337e7 dt-bindings: clock: aspeed: Add VIDEO reset definition
0f8478e9fd54 dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated
7af06f6732db dt-bindings: Fix emails with spaces or missing brackets
912a24228bf6 scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8
b45398f9313a dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs
de1e0845cd7a dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles
b9cdb24e70f8 dt-bindings: display/lvds-codec: Document OnSemi FIN3385
83226b0d27c4 dt-bindings: eeprom: at25: Document Microchip 25AA010A
df9ef8a7ea46 dt-bindings: display: bridge: nxp,tda998x: Add missing clocks
9ab7ad07fb14 dt-bindings: omap: ti,prm-inst: Convert to DT schema
1e1d998bf71f dt-bindings: display: mediatek: Fix typo 'hardwares' to 'hardware'
4b0a6a44b1ae dt-bindings: mfd: Add Realtek RTD1xxx system controllers
a2e45807633d dt-bindings: mediatek: Replace Tinghan Shen in maintainers
ab9efcd5b4d8 dt-bindings: Fix I2C bus node names in examples
ea4479bba282 dt-bindings: display: google,goldfish-fb: Convert to DT schema
50fcb2d67f08 dt-bindings: display: bridge: tc358867: mark port 0 and 1 configuration as valid
a2be43cbd73a docs: dt: submitting-patches: Document prefixes for SCSI and UFS
91b31105e870 dt-bindings: display: bridge: ldb: Add check for reg and reg-names
37e7a9a4d189 dt-bindings: Add IEI vendor prefix and IEI WT61P803 PUZZLE driver bindings
b212fd6852bf dt-bindings: trivial-devices: Add some more undocumented devices
27fef65a6743 dt-bindings: interrupt-controller: loongson,pch-pic: Document address-cells
a7865d05a69e dt-bindings: interrupt-controller: loongson,eiointc: Document address-cells
ce188cc0a6b5 dt-bindings: interrupt-controller: loongson,liointc: Document address-cells
94a7b2f99ab9 dt-bindings: power: syscon-poweroff: Allow "reg" property
02fb67f1073a dt-bindings: reset: syscon-reboot: Allow both 'reg' and 'offset'
ee58ad218d78 dt-bindings: mediatek: Drop inactive MandyJH Liu
33ae9e289d97 dt-bindings: arm: Drop obsolete brcm,vulcan-soc binding
c545c28a92fa dt-bindings: net: brcm,amac: Allow "dma-coherent" property
6c2903f6738c dt-bindings: raspberrypi,bcm2835-firmware: Add 'power' and gpio-hog nodes
49bb56c3e9db dt-bindings: firmware: Convert cznic,turris-mox-rwtm to DT schema
a6b60a4d1020 dt-bindings: trivial-devices: Add socionext,uniphier-smpctrl
c105f1786874 dt-bindings: firmware: xilinx: Add conditional pinctrl schema
e9fd71a307d0 dt-bindings: firmware: xilinx: Add xlnx,zynqmp-firmware compatible
2909e69780fb dt-bindings: Remove unused includes
c661f5a650e8 dt-bindings: bus: stm32mp25-rifsc: Allow 2 size cells
530a274b1478 dt-bindings: arm: vexpress-config: Update clock and regulator node names
21658b9cc7b8 dt-bindings: arm,vexpress-juno: Allow interrupt-map properties in bus node
93864a267471 Merge tag 'i2c-host-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
84dea826479a dt-bindings: mtd: cdns,hp-nfc: Add dma-coherent property
e327cd40e3da dt-bindings: spi: Add binding for Faraday FTSSP010
9382fcae3b33 dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L SoC
da8c0cc63159 dt-bindings: intel: Add Agilex eMMC support
395dec8b9e96 dt-bindings: ptp: Add amazon,vmclock
a03e77de0210 dt-bindings: clk: rs9: Fix DIF pattern match
deb3391513da dt-bindings: pinctrl: spacemit: fix drive-strength check warning
ab6224bd25a0 Anbernic RG-DS AW87391 Speaker Amps
ba961ac73236 spi: add multi-lane support
716bd68da03b Merge tag 'ath-next-20260202' of git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath
b47c8ccd309d Merge tag 'iio-for-7.0a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
17926b594c18 ASoC: dt-bindings: aw87390: Add Anbernic RG-DS Amplifier
ccac1121bf5d spi: dt-bindings: adi,axi-spi-engine: add multi-lane support
90e272c43203 spi: dt-bindings: add spi-{tx,rx}-lane-map properties
89b0a2b708ca spi: dt-bindings: change spi-{rx,tx}-bus-width to arrays
cd5ffacefa9c dt-bindings: mailbox: sprd: add compatible for UMS9230
db37cc33492c Merge tag 'linux-can-next-for-6.20-20260131' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next
e8ed1e9c377d dt-bindings: hwmon: ti,tmp108: Add P3T1035,P3T2030
365e8a1582ea dt-bindings: hwmon: add STEF48H28
997d978c1b6d dt-bindings: hwmon: Convert aspeed,ast2400-pwm-tacho to DT schema
690c98671a72 dt-bindings: hwmon: Add mps mp5926 driver bindings
564ddb6df33f dt-bindings: hwmon: sparx5: add microchip,lan9691-temp
1d92dd74de54 dt-bindings: crypto: atmel,at91sam9g46-sha: add microchip,lan9691-sha
cd9c2e267512 dt-bindings: crypto: atmel,at91sam9g46-aes: add microchip,lan9691-aes
02798af51a1f dt-bindings: crypto: qcom,inline-crypto-engine: document the Milos ICE
d2455b901b36 dt-bindings: rtc: loongson: Document Loongson-2K0300 compatible
bc6078cc0df8 dt-bindings: rtc: loongson: Correct Loongson-1C interrupts property
9bef11db9e5d dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2N support
18d100dd8bed Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' into psy-next
7ee840ee2bb4 dt-bindings: power: supply: google,goldfish-battery: Convert to DT schema
b95dfde1e21c Merge tag 'icc-6.20-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
495473158a94 arm64: dts: socfpga: agilex: add emmc support
f2e2a903f7c4 arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
3c1d9adbbb4f ARM: dts: socfpga: fix dtbs_check warning for fpga-region
4f486b92adf8 ARM: dts: socfpga: add #address-cells and #size-cells for sram node
c14992693977 dt-bindings: altera: document syscon as fallback for sys-mgr
d61c18c961fd arm64: dts: altera: Use lowercase hex
ffa2813091d4 dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
7d049975239c arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
0c92577cfcce arm64: dts: socfpga: agilex5: add support for modular board
e115510a1af8 dt-bindings: intel: Add Agilex5 SoCFPGA modular board
c13f5487f5c8 arm64: dts: socfpga: agilex5: Add dma-coherent property
65ea42aefdeb dt-bindings: net: wireless: ath11k-pci: deprecate 'firmware-name' property
5fb812de23e3 MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC
a777939415eb Merge tag 'wireless-next-2026-01-29' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
5b25d9c784d6 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
17229d6a4193 dt-bindings: mtd: mxic,multi-itfc-v009-nand-controller: convert to DT schema
ddb90395af99 dt-bindings: mtd: st,spear600-smi: convert to DT schema
d1f4e3e6577c dt-bindings: bluetooth: qcom,wcn7850-bt: Deprecate old supplies
40407758b2c0 dt-bindings: bluetooth: qcom,wcn7850-bt: Split to separate schema
a9dd4631cf9f dt-bindings: bluetooth: qcom,wcn6855-bt: Deprecate old supplies
c4f851db3817 dt-bindings: bluetooth: qcom,wcn6855-bt: Split to separate schema
d710994f6078 dt-bindings: bluetooth: qcom,wcn6750-bt: Deprecate old supplies
33043a03d1d0 dt-bindings: bluetooth: qcom,wcn6750-bt: Split to separate schema
640efe2d3365 dt-bindings: bluetooth: qcom,wcn3990-bt: Split to separate schema
bca7304e36f5 dt-bindings: bluetooth: qcom,wcn3950-bt: Split to separate schema
630bedc470e1 dt-bindings: bluetooth: qcom,qca6390-bt: Split to separate schema
184210b27185 dt-bindings: bluetooth: qcom,qca9377-bt: Split to separate schema
8ef4770b2049 dt-bindings: bluetooth: qcom,qca2066-bt: Split to separate schema
f2f34664c2bb dt-bindings: rtc: cpcap: convert to schema
aa5a96523dc7 Merge tag 'ti-k3-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
ad228b618c5c Merge tag 'reset-for-v6.20' of https://git.pengutronix.de/git/pza/linux into soc/drivers
2c4ab1bdec23 Merge tag 'memory-controller-drv-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
8b32c00a7d34 Merge tag 'mtk-soc-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers
2439f10093a3 dt-bindings: gpio: Add Tegra264 support
f0df035c0c45 Merge tag 'riscv-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
1c97c2610a0b arm64: dts: realtek: Add Kent SoC and EVB device trees
1f33f7c43645 dt-bindings: arm: realtek: Add Kent Soc family compatibles
6605244467ae spi: dt-bindings: cdns,qspi-nor: Drop label in example
265917026231 Merge tag 'qcom-arm32-for-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
c00f9fa57059 Merge tag 'qcom-arm64-for-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
325bb381f318 Merge tag 'v6.20-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
555ee47a2399 Merge tag 'v6.20-rockchip-dts32-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
de2a0ddc7b4b Merge tag 'cix-dt-binding-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt
4492b3dafd64 Merge tag 'at91-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
060ef5aec09b Merge tag 'cix-dt-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt
ac68fadae144 Merge tag 'mvebu-dt64-6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
845fb01169db Merge tag 'mtk-dts64-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
057d6e3b56bc Merge tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt
1b67d2271cf1 Merge tag 'sunxi-dt-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
08dfcf6a3c7a Merge tag 'amlogic-arm-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
0b0db6acc294 Merge tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
4875ee63a5f6 Merge tag 'spacemit-dt-for-6.20-1' of https://github.com/spacemit-com/linux into soc/dt
5afe3cf7196c Merge tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
cc40d0637dfb Merge tag 'arm-soc/for-6.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt
84a304b3617b Merge tag 'arm-soc/for-6.20/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
5780a44b19e3 Merge tag 'riscv-sophgo-dt-for-v6.20' of https://github.com/sophgo/linux into soc/dt
0b183bbc2f6e Merge tag 'stm32-dt-for-v6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
ce1a9421c509 Merge tag 'imx-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
21b1bcafcaca Merge tag 'imx-bindings-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
86816d60ae02 Merge tag 'tegra-for-6.20-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ed7af28da2c5 spi: aspeed: Improve handling of shared SPI
a665daba0d97 Merge tag 'drm-msm-next-2026-01-23' of https://gitlab.freedesktop.org/drm/msm into drm-next
16ee8d7989d5 BackMerge tag 'v6.19-rc7' into drm-next
1853af96d104 ASoC: sophgo: add CV1800 I2S controllers support
780880d26b9d ASoC: codec: Remove ak4641/pxa2xx-ac97 and convert to
bff1a05b39e9 ASoC: fsl_audmix: Support the i.MX952 platform
d0ef9cf11b6c Merge tag 'cpufreq-arm-updates-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
a523ea22f5ca ASoC: dt-bindings: sophgo,cv1800b: add ADC/DAC codec
b1d4ce2ec63d ASoC: dt-bindings: sophgo,cv1800b: add I2S/TDM controller
40a6f1af07a1 dt-bindings: net: dsa: lantiq,gswip: add Intel GSW150
f0bd27beed6b dt-bindings: net: dsa: lantiq,gswip: use correct node name
865b8eb5f662 dt-bindings: gpio: aspeed,sgpio: Support ast2700
0baa9004dc14 dt-bindings: pinctrl: pinctrl-microchip-sgpio: add LAN969x
c64e8b8c5daa dt-bindings: pinctrl: ocelot: Add LAN9645x SoC support
3ee75e871f21 dt-bindings: cpufreq: qcom-hw: document Milos CPUFREQ Hardware
a02f9ab1778c ASoC: dt-bindings: fsl,mqs: make gpr optional for SM-based SoCs
42533ee12386 Merge tag 'imx-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
dc8c5878de8a dt-bindings: nvmem: qfprom: Add sm8750 compatible
7d952fdf2bad dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types
5d44654a0b87 Merge tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
2ae181b8dafe Merge tag 'qcom-arm32-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
14de830eba79 Merge tag 'zynqmp-dt-for-6.20' of https://github.com/Xilinx/linux-xlnx into soc/dt
dbc7a3043d1b Merge tag 'tegra-for-6.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
86fccd1393e0 Merge tag 'tegra-for-6.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
b3bbbd413424 ARM: dts: samsung: Drop s3c6400.dtsi
56ffd66515b6 ARM: dts: nuvoton: Minor whitespace cleanup
2d6d64b741fe Merge tag 'samsung-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
f7832d977951 Merge tag 'dt64-cleanup-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
0bf8d0a20391 Merge tag 'renesas-dts-for-v6.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
41635a78d26e Merge tag 'renesas-dt-bindings-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
6b08b2fbfdba ASoC: dt-bindings: fsl,sai: Add AUDMIX mode support on i.MX952
0369e048eed5 ASoC: dt-bindings: fsl,audmix: Add support for i.MX952 platform
3bfdd9e93746 Merge tag 'coresight-next-v7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
78fc6e7674cb Merge 6.19-rc7 into char-misc-next
6c694a1d3492 dt-bindings: riscv: document zicfilp and zicfiss in extensions.yaml
e896bfea195a dt-bindings: net: dsa: fix typos in bindings docs
a717efe4904c dt-bindings: input: touchscreen: tsc2007: document '#io-channel-cells'
8a5cf8346b98 dt-bindings: mailbox: xlnx,zynqmp-ipi-mailbox: Document msg region requirement
e625e7e40aad dt-bindings: soc: spacemit: Add K3 reset support and IDs
bed4a6ca81d3 Merge tag 'at24-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-mergewindow
1cc20aca3cb4 scsi: ufs: dt-bindings: Document bindings for SA8255P UFS Host Controller
324a883d1ce7 dt-bindings: spmi: spmi-mtk-pmif: Add compatible for MT8189 SoC
f399c85dbf55 dt-bindings: spmi: add support for glymur-spmi-pmic-arb (arbiter v8)
3d1d144c4506 dt-bindings: spmi: split out common QCOM SPMI PMIC arbiter properties
f7d8363b0843 dt-bindings: spmi: Add MediaTek MT8196 SPMI 2 Arbiter/Controllers
46e850238166 dt-bindings: serial: renesas,scif: Document RZ/G3L SoC
d52ec46dfea8 ASoC: dt-bindings: Convert ti,tas2552 to DT schema
67237f73e2ea arm64: dts: a7k: add COM Express boards
997674eb03ed dt-bindings: connector: Add PCIe M.2 Mechanical Key M connector
fad4d61f0c13 dt-bindings: iio: dac: Add max22007
24b1b9c62f63 ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
3e03f55262c8 dt-bindings: crypto: Mark zynqmp-aes as Deprecated
2972aa85ad35 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
93faaa70d9fd Merge tag 'drm-misc-next-2026-01-22' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
a06faf23cf0d dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible
e64d84f2a956 dt-bindings: iio: adc: ad7768-1: add new supported parts
7863431b12b7 arm64: dts: rockchip: Fix rk3588 PCIe range mappings
23e93403e47f arm64: dts: rockchip: Fix rk356x PCIe range mappings
e855bd09b3f1 arm64: dts: rockchip: Add Anbernic RG-DS
edf7453bfcce dt-bindings: input: touchscreen: goodix: Add "panel" property
35bee1b28956 dt-bindings: arm: rockchip: Add Anbernic RG-DS
438f1fe833e0 arm64: dts: rockchip: Explicitly request UFS reset pin on RK3576
e8b033a60c3a arm64: dts: rockchip: Add TPS65185 for PineNote
f4b46b8ffd28 riscv: dts: allwinner: d1: Add CPU thermal sensor and zone
1bb5decc55c6 dt-bindings: mfd: qcom,spmi-pmic: Document PMICs present on Glymur and Kaanapali
e9550eb87e31 dt-bindings: mfd: Document smp-memram subnode for aspeed,ast2x00-scu
949de4abbc1e dt-bindings: mfd: mediatek: mt6397: Add missing MT6331 regulator compat
6fedf06a87f0 dt-bindings: mfd: mediatek,mt8195-scpsys: Add mediatek,mt6795-scpsys
3d469bea90a9 dt-bindings: mfd: atmel,sama5d2-flexcom: Add microchip,lan9691-flexcom
41693d50a7e8 dt-bindings: mfd: syscon: Allow syscon compatible for mediatek,mt7981-topmisc
75d41d817735 dt-bindings: mfd: qnap,ts433-mcu: Add qnap,ts133-mcu compatible
c7b860543f2d dt-bindings: mfd: nxp: Add NXP LPC32xx System Control Block
d165e31e20f7 dt-bindings: mfd: Add Bitmain BM1880 System Controller
bc0ece5d642e dt-bindings: mfd: atmel,hlcdc: Add sama7d65 compatible string
02f34a00c311 dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs
cbb75857f755 Merge branches 'ib-mfd-clk-gpio-power-regulator-rtc-6.20', 'ib-mfd-regulator-6.20' and 'ib-mfd-rtc-6.20' into ibs-for-mfd-merged
4ed80af4e800 dt-bindings: mtd: partitions: Combine simple partition bindings
cd4daa0abfd5 dt-bindings: mtd: partitions: Convert brcm,trx to DT schema
7796aed329eb dt-bindings: mtd: fixed-partitions: Restrict undefined properties
2fee48751e05 dt-bindings: mtd: Ensure partition node properties are documented
cf39a935bc6f dt-bindings: mtd: partitions: Drop partitions.yaml
ab71d51e949d dt-bindings: mtd: partitions: Define "#{address,size}-cells" in specific schemas
35da943e3f8d dt-bindings: mtd: partitions: Allow "nvmem-layout" in generic partition nodes
f3e4abc0c3cc dt-bindings: mtd: partitions: Move "sercomm,scpart-id" to partition.yaml
3f3e27254a33 dt-bindings: mtd: fixed-partitions: Move "compression" to partition node
57f96b737a5a dt-bindings: mtd: brcm,brcmnand: Drop "brcm,brcmnand" compatible for iProc
f88b437888f0 Merge tag 'apple-soc-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt
612c4f9fdb49 Merge tag 'lpc32xx-dt-for-6.20' of https://github.com/vzapolskiy/linux-lpc32xx into soc/dt
dc6ece796b86 Merge tag 'aspeed-6.20-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
55e9e95b7d41 Merge tag 'nuvoton-arm64-6.20-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
ef282680695f arm64: dts: marvell: Add SoC specific compatibles to SafeXcel crypto
708378216fa0 Merge tag 'v6.20-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
9543fe54b8c1 Merge tag 'v6.20-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
fd0c3637dece Merge tag 'juno-updates-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
9ce8d18f3e3e dt-bindings: net: pcs: mediatek,sgmiisys: deprecate "mediatek,pnswap"
11fb43148bc5 dt-bindings: net: airoha,en8811h: deprecate "airoha,pnswap-rx" and "airoha,pnswap-tx"
6c8d104996f2 dt-bindings: net: airoha: npu: Add firmware-name property
c0e2edfaf4e0 dt-bindings: touchscreen: trivial-touch: Drop 'interrupts' requirement for old Ilitek
0b946423208a dt-bindings: input: i2c-hid: Introduce FocalTech FT8112
ee15a65fc46e ARM: dts: qcom: switch to RPMPD_* indices
c24b5ac17de5 arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions
f4aa4553a6f4 arm64: dts: qcom: agatti: Add CX_MEM/DBGC GPU regions
02d1cd46bdf2 arm64: dts: qcom: sm8750: add ADSP fastrpc-compute-cb nodes
9d42975778ea arm64: dts: qcom: sm8750: add memory node for adsp fastrpc
230606847d7d arm64: dts: qcom: switch to RPMPD_* indices
a6b35c9c693b dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H
0ec54c733653 dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2N TSU
ac680fe53467 arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable SDIO interface
04ad85e91e0e Merge tag 'qcom-drivers-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
47cf549e361f Merge tag 'samsung-drivers-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers
eacf9bb0ce61 arm64: dts: qcom: oneplus-enchilada: Specify i2c4 clock frequency
a027ea136749 arm64: dts: qcom: sm6350: Add clocks for aggre1 & aggre2 NoC
ef5b8a86c529 arm64: dts: qcom: agatti: enable FastRPC on the ADSP
719449cdbc04 dt-bindings: pinctrl: document polarfire soc mssio pin controller
da54d367c877 dt-bindings: pinctrl: qcom,glymur-tlmm: Document Mahua TLMM block
286e264e593d media: dt-bindings: add rockchip mipi csi-2 receiver
b1a1cf5123de dt-bindings: display: bridge: simple: document the Algoltek AG6311 DP-to-HDMI bridge
6994a15275b1 dt-bindings: vendor-prefixes: Add AlgolTek
ba3c253fb0d5 dt-bindings: interconnect: qcom-bwmon: Document Glymur BWMONs
6e74c2f165c9 dt-bindings: eeprom: at24: Add compatible for Puya P24C128F
32e5ee28ac99 dt-bindings: phy: renesas,usb2-phy: Document RZ/G3E SoC
c09e9126d56c dt-bindings: phy: renesas,usb2-phy: Document mux-states property
f40c647c0d90 dt-bindings: phy: renesas,usb2-phy: Document USB VBUS regulator
bcb394aa1cc7 media: dt-bindings: media: renesas,fcp: Allow three clocks for RZ/V2N SoC
5b33c502ea7b dt-bindings: net: micrel: Convert micrel-ksz90x1.txt to DT schema
982acc2e14ed dt-bindings: net: micrel: Convert to DT schema
63070365f58b dt-bindings: net: sparx5: do not require phys when RGMII is used
002e8d7735ee riscv: dts: spacemit: Disable ETH PHY sleep mode for OrangePi
4f9b26619be1 dt-bindings: display/msm: qcom, kaanapali-mdss: Add Kaanapali
0d9bc6aa9d8f dt-bindings: display/msm: dsi-controller-main: Add Kaanapali
4b6d795f96c4 dt-bindings: display/msm: dsi-phy-7nm: Add Kaanapali DSI PHY
e6b595f95f13 dt-bindings: display/msm: qcom, kaanapali-dpu: Add Kaanapali
3964d858d90f Merge tag 'v6.19-rc1' into msm-next
38a99a817ad7 dt-bindings: input: google,goldfish-events-keypad: Convert to DT schema
d9192729652c dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987
9c11b43017f0 dt-bindings: nvmem: mediatek: efuse: Add support for MT8196
de3c5fe53427 dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196
695720024214 dt-bindings: input: touchscreen: edt-ft5x06: Add FocalTech FT3518
aa63f9776715 ASoC: renesas: rz-ssi: Cleanups
7c7e2cdfd3c3 spi: xilinx: make IRQs optional
4da8a7ec04d2 dt-bindings: pwm: nxp,lpc32xx-pwm: Specify clocks property as mandatory
70824cca4e4a dt-bindings: mfd: Add rk801 binding
55e728580ead riscv: dts: spacemit: pinctrl: update register and IO power
d04eca503075 riscv: dts: spacemit: add K3 Pico-ITX board support
21e575fedb50 riscv: dts: spacemit: add initial support for K3 SoC
27ee007b967d dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings
61b7fb5df7fb dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC
d33981a1add4 dt-bindings: interrupt-controller: add SpacemiT K3 APLIC
ae5532959fcb dt-bindings: timer: add SpacemiT K3 CLINT
e2d340aa025b dt-bindings: riscv: add SpacemiT X100 CPU compatible
a585497ee055 riscv: dts: spacemit: k1: Add "b" ISA extension
06b93bbd2215 riscv: dts: spacemit: Enable USB3.0 on BananaPi-F3
340cd332be59 riscv: dts: spacemit: Add DWC3 USB 3.0 controller node for K1
a6c9e830b026 riscv: dts: spacemit: Add USB2 PHY node for K1
10935534c858 riscv: dts: spacemit: sdhci: add reset support
943a3e884eb2 riscv: dts: spacemit: add reset property
f8f9dd79d671 spi: dt-bindings: nxp,imx94-xspi: add nxp,imx952-xspi
5227871b94c8 dt-bindings: display: panel: Add compatible for Anbernic RG-DS
b978b018d7e1 ARM: dts: rockchip: rk3036: remove mshc aliases
ec280a19bf3e arm64: dts: rockchip: Do not enable hdmi_sound node on Pinebook Pro
442c21c2fe40 arm64: dts: rockchip: Fix imx258 variant on pinephone pro
6567ba439a82 arm/arm64: dts: st: Drop unused .dtsi
72898ec8d065 arm64: dts: st: Minor whitespace cleanup
5a25c60f7778 arm64: dts: st: Use hyphen in node names
bad0d9112b83 arm64: dts: st: add power-domain of dcmipp in stm32mp231.dtsi
ea9d4b95cbb3 arm64: dts: st: add power-domain of dcmipp in stm32mp251.dtsi
f2d478648a9c dt-bindings: media: st: dcmipp: add 'power-domains' property
e5435ff3b5aa arm64: dts: st: add power-domain of csi in stm32mp231.dtsi
81460acf00c3 arm64: dts: st: add power-domain of csi in stm32mp251.dtsi
dea5c1b19f24 dt-bindings: media: st: csi: add 'power-domains' property
15b8d5b148fb ARM: dts: stm32: add spi1 sleep state pinctrl on stm32mp157c-ev1
23bd1dd935f0 arm64: dts: st: add DDR channel to stm32mp257f-ev1 board
1073f0cfc9cf arm64: dts: st: add LPDDR channel to stm32mp257f-dk board
ec0680b409b7 arm64: dts: st: enable i2c analog-filter in stm32mp231.dtsi
19745354672a arm64: dts: st: enable i2c analog-filter in stm32mp251.dtsi
eb2ffaa4d91d arm64: dts: st: add power-domains in all i2c of stm32mp231.dtsi
b768c686e770 arm64: dts: st: add power-domains in all i2c of stm32mp251.dtsi
10ebfd2c3959 dt-bindings: i2c: st,stm32-i2c: add 'power-domains' property
a09b11b2817f arm64: dts: st: add power-domains in all spi of stm32mp231.dtsi
05b85f24fe27 arm64: dts: st: add power-domains in all spi of stm32mp251.dtsi
30b02e4ca2cb arm64: dts: st: Add boot-led for stm32mp2 ST boards
5e5deb2316bd ARM: dts: stm32: Add boot-led for stm32mp1 ST boards
2bf2ef567959 ARM: dts: stm32: Add boot-led for stm32 MCU ST boards
bd859993cc6d arm64: dts: st: Add green and orange LED for stm32mp2 ST boards
56b9f7fc9fde ARM: dts: stm32: Update LED node for stm32mp15xx-dkx board
0e2cd6d0cf14 ARM: dts: stm32: Add red LED for stm32mp157c-ed1 board
e1c842fb48ff ARM: dts: stm32: Add red LED for stm32mp135f-dk board
b025c0be8d16 ARM: dts: stm32: Add LED support for stm32h743i-eval
4b522a720f19 ARM: dts: stm32: Add LED support for stm32h743i-disco
39a3d28582ab ARM: dts: stm32: Update LED nodes for stm32 MCU boards
d549902a2f8f arm64: dts: amlogic: add the type-c controller on Radxa Zero 2
0e110c9846e6 arm64: dts: amlogic: meson-sm1-odroid: Eliminate Odroid HC4 power glitches during boot.
beaa0522e5f9 arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable eMMC storage
6a2f6b9b373a riscv: dts: sophgo: sg2044: Add "b" ISA extension
add5431b0e85 riscv: dts: sophgo: fix the node order of SG2042 peripheral
ac0ba8a30821 riscv: dts: sophgo: Move PLIC and CLINT node into CPU dtsi
7c0e3963484a dt-bindings: pinctrl: spacemit: add syscon property
5596787e9479 spi: dt-bindings: xilinx: make interrupts optional
78046c205134 arm64: qcom: dts: sm8750: add coresight nodes
9f7cc53066ad arm64: dts: qcom: talos: Drop opp-shared from QUP OPP table
ce61799a7f23 arm64: dts: qcom: x1-el2: Enable the APSS watchdog
cd6f4fa8d2eb arm64: dts: qcom: hamoa: Add the APSS watchdog
1e4b8c7e87d9 dt-bindings: watchdog: Document X1E80100 compatible
b3fd7b873f1c ARM: dts: qcom: msm8960: expressatt: Add Accelerometer
9e7e58ab94e1 ARM: dts: qcom: msm8960: expressatt: Add Magnetometer
c2df47ae20b9 ARM: dts: qcom: msm8960: expressatt: Add NFC
35bce974b172 ARM: dts: qcom: msm8960: expressatt: Add Light/Proximity Sensor
2e5966453c77 ARM: dts: qcom: msm8960: Add GSBI2 & GSBI7
fd72dcfface9 arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM
a986521752b2 arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators
26b9815fb37d arm64: dts: qcom: msm8953: Add CCI nodes
d39c16e042a1 arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states
dab43170e734 dt-bindings: net: dsa: lantiq,gswip: add MaxLinear R(G)MII slew rate
05ab1b20da91 ARM: dts: qcom: msm8974: Start using rpmpd for power domains
9be5f27bd8a8 ARM: dts: qcom: msm8974: Sort header includes alphabetically
018c6554c99c dt-bindings: regulator: mark regulator-suspend-microvolt as deprecated
9f9686624b29 arm64: dts: mediatek: mt8192: Rename mt8192-afe-pcm to audio-controller
f98ac8fd4a35 dt-bindings: arm: mediatek: audsys: Support mt8192-audsys variant
7a53eaaf914c dt-bindings: arm: qcom: Add Coresight Interconnect TNOC
cbcfbcb9d555 dt-bindings: mtd: st,spi-fsm: convert to DT schema
c954d2f5b479 dt-bindings: mtd: microchip,mchp23k256: convert to DT schema
9c50822512d8 dt-bindings: mtd: nvidia,tegra20-nand: convert to DT schema
e7bb20485fd6 riscv: dts: anlogic: dr1v90: Add "b" ISA extension
7b7fabb5ece3 Merge 6.19-rc6 usb-next
a55b4820bea8 ARM: dts: allwinner: Replace status "failed" with "fail"
9b3f945edd5b Merge tag 'mediatek-drm-next-20260117' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next
e2732701ee10 Merge tag 'samsung-pinctrl-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
318f21421b67 Merge tag 'renesas-pinctrl-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
5d4b95cb22f8 dt-bindings: mbox: add pic64gx mailbox compatibility to mpfs mailbox
e9535087ef08 dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
7b834b22a4f3 dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
4abfb76fac38 dt-bindings: display/msm/gpu: Straighten out reg-names on A619L/610/702
7b9953464554 dt-bindings: watchdog: qcom-wdt: Document Glymur watchdog
f3e32711d1f9 dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
4e1009c422e4 dt-bindings: watchdog: samsung-wdt: Split if:then: and constrain more
76ef81f60554 dt-bindings: watchdog: samsung-wdt: Drop S3C2410
f21fec63b372 dt-bindings: watchdog: samsung-wdt: Define cluster constraints top-level
947ec2a7a061 arm64: dts: freescale: imx95: Add support for i.MX95 15x15 FRDM board
1e2f6fe09a0a dt-bindings: arm: fsl: Add compatible for i.MX95 15x15 FRDM board
da896e6aeb6e arm64: dts: imx91-11x11-frdm: fix CAN transceiver gpio
9a799b6dcf66 arm64: dts: imx93-11x11-frdm: enable additional devices
c320d1ee2c31 ARM: dts: imx: e60k02: add tps65185
f23d7747e2fc ARM: dts: imx50-kobo-aura: add epd pmic description
a5187a07278f ARM: dts: imx: tolino-shine2: add tps65185
def2bad12ad5 arm64: dts: imx93-11x11-frdm: Add MQS audio support
326f80d72a57 arm64: dts: imx952-evk: Add nxp,ctrl-ids for scmi misc
708a298bdf32 arm64: dts: imx952-evk: Add flexcan support
76ad6957eac5 arm64: dts: imx952-evk: Enable TPM[3,6]
99d8f14ea5bd arm64: dts: imx952-evk: Enable wdog3
53d10193fd4a arm64: dts: imx952-evk: Enable USB[1,2]
d8663a7f9769 arm64: dts: imx952-evk: Enable SPI7
34e233786a5f arm64: dts: imx952-evk: Enable UART5
92bb376249bb arm64: dts: imx952-evk: Enable I2C[2,3,4,6,7] bus
dd58a0f13f18 arm64: dts: imx952-evk: Change the usdhc1_200mhz drive strength to DSE4
f32e871ca957 arm64: dts: imx952: Add idle-states node
4e976b781b68 arm64: dts: imx8mn: Add ifm VHIP4 EvalBoard v1 and v2
501d4b54ac14 arm64: dts: imx8mn: Add SNVS LPGPR
67e6d92ddfdd arm64: dts: imx8mq-librem5: Don't set mic-cfg for wm8962
083f756b87a3 arm64: dts: imx8mq-librem5: Set cap-power-off-card for usdhc2
3dd550990418 arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHz
814565e7b271 arm64: dts: imx8mq-librem5: Enable SNVS RTC
6118d1871535 arm64: dts: imx8mq-librem5: Set vibrator's PWM frequency to 20kHz
6c8d0e9696b0 arm64: dts: imx8mq-librem5: Enable I2C recovery
df87f60ac610 dt-bindings: net: pcs: renesas,rzn1-miic: Add phy_link property
a007152b42f7 dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali and Glymur Platforms
f17db6ab33fe arm64: dts: exynos: gs101: add cmu_dpu and sysreg_dpu dt nodes
af824b164001 Merge branch 'for-v6.20/dt-bindings-clk' into next/dt64
7f5d058c91d5 dt-bindings: samsung: exynos-sysreg: add gs101 dpu compatible
03e693827f91 Merge branch 'for-v6.20/dt-bindings-clk' into next/clk
914545f99d20 dt-bindings: clock: google,gs101-clock: Add DPU clock management unit
989b6eeea3ac dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering
c95c9060cf20 dt-bindings: arm: fsl: Document ifm VHIP4 EvalBoard v1 and v2
d11258fd262f dt-bindings: vendor-prefixes: Document ifm electronic gmbh
9af150b1d5ac arm64: dts: imx95: Use GPU_CGC as core clock for GPU
9ca53be594b1 ARM: dts: imx: move nand related property under nand@0
515b1852fc1d ARM: dts: imx6sx: update gpmi #size-cells to 0
bfc8a89eae3d ARM: dts: imx6qdl: add '#address-cells' and '#size-cells' for gpmi-nand
f1f26baa4790 arm64: dts: imx91: Add thermal-sensor and thermal-zone support
ec7bfa4a6cc6 dt-bindings: display: tegra: document Tegra30 VI and VIP
d4fb3d68c52e dt-bindings: display: tegra: document Tegra132 MIPI calibration device
36cd72893c12 ARM: tegra: Adjust DSI nodes for Tegra20/Tegra30
2822dc9ca7f1 arm64: tegra: smaug: Add usb-role-switch support
c8a97be57fe4 arm64: tegra: smaug: Complete and enable tegra-udc node
b48949517e5f arm64: tegra: smaug: Enable DisplayPort via USB-C port
4b86a80e2733 dt-bindings: phy: mediatek,hdmi-phy: Document extra clocks for MT8195
ba7055ce7670 dt-bindings: phy: mediatek,hdmi-phy: Add support for MT8188 SoC
2c497b05d60f arm64: tegra: Correct CPU compatibles on Tegra264
3fd0fa38597d arm64: tegra: Drop unneeded status=okay on Tegra264
94fddcbb5edb arm64: tegra: Drop unneeded status=okay on Tegra234
8bc40459d4b1 arm64: tegra: Drop unneeded status=okay on Tegra194
a751ddaf7368 arm64: tegra: Drop unneeded status=okay on Tegra186
7e68f45e9d71 arm64: tegra: Add nodes for CMDQV
2dcabc6b8618 arm64: tegra: Add DBB clock to EMC on Tegra264
9c2cb35536e3 dt-bindings: phy: mediatek,hdmi-phy: Fix clock output names for MT8195
b99d0eb7564e arm64: dts: broadcom: bcm4906-netgear-r8000p: Drop unnecessary "ranges" in partition node
5e7a803f25cb arm64: dts: broadcom: northstar2: Drop "arm,cci-400-pmu" fallback compatible
495f35c2c98f arm64: dts: broadcom: northstar2: Drop QSPI "clock-names"
7f3ad038566f arm64: dts: broadcom: northstar2: Drop unused and undocumented "brcm,pcie-ob-oarr-size" properties
4db81b905c2b arm64: dts: broadcom: northstar2: Rework clock nodes
01cfa0ec34b9 arm64: dts: broadcom: ns2-svk: Use non-deprecated at25 properties
fcd62ea160ad arm64: dts: broadcom: Use preferred node names
d9fec9189e6b arm64: dts: broadcom: stingray: Move raid nodes out of bus
ab4ed1dc0d04 arm64: dts: broadcom: stingray: Fix 'simple-bus' node names
cc9550ca574b arm64: dts: broadcom: stingray: Rework clock nodes
708a5b2c0fe4 arm64: dts: broadcom: Remove unused and undocumented nodes
862b765f1108 dt-bindings: can: renesas,rcar-canfd: Document RZ/T2H and RZ/N2H SoCs
4ec77a68120b dt-bindings: can: renesas,rcar-canfd: Document RZ/V2H(P) and RZ/V2N SoCs
14ae60e3097d dt-bindings: can: renesas,rcar-canfd: Specify reset-names
e7c67c8a4413 dt-bindings: can: renesas,rcar-canfd: Document renesas,fd-only property
6d45bea6e3af dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
cecc020569a4 dt-bindings: mtd: nvidia,tegra20-nand: convert to DT schema
be3f0a7db3f8 dt-bindings: dma: Update ADMA bindings for tegra264
7f2243e51e32 openrisc: dts: Add de0 nano multicore config and devicetree
013156b1bde9 openrisc: dts: Split simple smp dts to dts and dtsi
6fe2a6550f5f openrisc: dts: Add de0 nano config and devicetree
67fb31a7cd6b arm64: dts: qcom: lemans: enable static TPDM
ed6dd716b980 arm64: dts: qcom: kodiak: Add memory region for audiopd
c5bfde36ba99 arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: add HDMI nodes
580b3f4a68b5 arm64: dts: qcom: x1e: bus is 40-bits (fix 64GB models)
2ea2ad35b316 arm64: dts: rockchip: Add the Video-Demo overlay for Lion Haikou
c06349a10fff arm64: dts: rockchip: Enable pwm1 on rk3368-lion-haikou
06befd3e2967 arm64: dts: rockchip: Enable HDMI output on RK3368-Lion-Haikou
e47d90e6728a arm64: dts: rockchip: Add HDMI node to RK3368
aeff6a608b6c arm64: dts: rockchip: Use phandle for i2c_lvds_blc on rk3368-lion haikou
a656170a31fc arm64: dts: rockchip: Fix SD card support for RK3576 Nanopi R76s
1de10acec651 arm64: dts: rockchip: Fix SD card support for RK3576 EVB1
d7416ad948d1 dt-bindings: serial: google,goldfish-tty: Convert to DT schema
f84445bb1270 dt-bindings: serial: sh-sci: Fold single-entry compatibles into enum
90acfa9f6742 dt-bindings: serial: renesas,rsci: Document RZ/V2H(P) and RZ/V2N SoCs
630e7963f59d dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
79e31b907d76 dt-bindings: misc: google,android-pipe: Convert to DT schema
b577c2abb1d4 dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
455fa431ed46 dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
b137b22a98b3 dt-bindings: memory: tegra: Document DBB clock for Tegra264
d8b05403d10c dt-bindings: tegra: pmc: Update aotag as an optional aperture
48296655ff9f arm64: dts: ti: k3-am67a-kontron-sa67-base: Fix SD card regulator
29eaf3445321 arm64: dts: ti: k3-am67a-kontron-sa67-base: Fix CMA node
74379f1a5e5f arm64: dts: ti: k3-am62p-j722s-common-main: Add HSM M4F node
c5512f936aff arm64: dts: ti: k3-{j784s4-j742s2/j721s2}-mcu-wakeup: Add HSM M4F node
974e346cc223 arm64: dts: renesas: rzt2h-rzn2h-evk: Reorder ADC nodes
141816132f7b dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
023006616a86 dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
2cf21f13e040 dt-bindings: net: airoha: npu: Add BA memory region
4c961b745f1f dt-bindings: net: adi,adin: document LP Termination property
1da46de73792 Merge tag 'phy_common_properties' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
b5b08104dda9 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
74d0ef2610f3 dt-bindings: net: wireless: ath11k: Combine two if:then: clauses
f10bf8779ec6 Merge tag 'drm-misc-next-2026-01-15' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
b73740fc9de1 dt-bindings: display/msm/rgmu: Document A612 RGMU
dca9618a1d32 dt-bindings: display/msm: gpu: Document A612 GPU
0d6547833df6 dt-bindings: display/msm: gpu: Simplify conditional schema logic
81ce5f5864eb arm64: dts: qcom: lemans; Add EL2 overlay
8681a97e8eb3 arm64: dts: qcom: sm8150: add uart13
201bf4da11e6 arm64: dts: qcom: sdm845-db845c: specify power for WiFi CH1
38cc99dc1f1c arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0
c58414174a89 arm64: dts: qcom: qrb4210-rb2: Fix UART3 wakeup IRQ storm
7a952883ade4 ASoC: dt-bindings: mt8192-afe-pcm: Fix clocks and clock-names
4950c913b7d5 dt-bindings: gpio-mmio: Correct opencores GPIO
b682394899eb Merge tag 'ib-mfd-clk-gpio-power-regulator-rtc-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next
14a86e737e7d arm64: dts: mediatek: mt7988a: Fix PCI-Express T-PHY node address
43c9e46a90ba arm64: dts: meson-s4-s905y4-khadas-vim1s: add initial device tree
047fbc9e905a arm64: dts: meson-s4-aq222: update compatible string with s805x2
562fa59f8326 dt-bindings: arm: amlogic: introduce specific compatibles for S4 family
c2ffdb01e074 arm64: dts: mediatek: mt8186-evb: Add vproc fixed regulator
fdda1b0b1ba0 ARM: dts: r9a06g032: Add support for GPIO interrupts
6c5ab649ab2f ARM: dts: r9a06g032: Add GPIO controllers
8edb33f4827a arm64: dts: renesas: rzg3e-smarc-som: Enable I3C support
4409a3e81288 dt-bindings: soc: renesas: Document RZ/N1 GPIO Interrupt Multiplexer
6880f32f6442 arm64: dts: mediatek: mt7981b-openwrt-one: Add address/size cells to eth
515f976d0ce9 arm64: dts: amlogic: Enable the npu node on Radxa Zero 2
d3108d4cb1dc arm64: dts: amlogic: g12: assign the MMC A signal clock
6c24c785f2f3 arm64: dts: amlogic: g12: assign the MMC B and C signal clocks
d70bd7d65c47 arm64: dts: amlogic: gx: assign the MMC signal clocks
2f5f8f725290 arm64: dts: amlogic: axg: assign the MMC signal clocks
389ec29c282d arm64: dts: amlogic: a1: align the mmc clock setup
5561343a9359 arm64: dts: amlogic: c3: assign the MMC signal clocks
e7927bfb9594 riscv: dts: sophgo: enable hardware clock (RTC) on the Milk-V Pioneer
b1e14936e730 media: dt-bindings: ti,omap3isp: Convert to DT schema
ea20b4c79f4c media: dt-bindings: i2c: toshiba,et8ek8: Convert to DT schema
fc53e67381e3 dt-bindings: media: ov5647: Allow props from video-interface-devices
855f0e943b6a dt-bindings: media: ov5647: Add optional regulators
2995b9b04133 arm64: dts: qcom: sm6125-ginkgo: Fix missing msm-id subtype
2d1968d218f6 sound: codecs: tlv320adcx140: assorted patches
391d32897d0f ASoC: codecs: aw88261: add dvdd-supply property
d27446108ca4 arm64: dts: ti: k3-j784s4-j742s2-main-common.dtsi: Refactor watchdog instances for j784s4
bcf34bb0f9a7 arm64: dts: ti: k3-j784s4-main.dtsi: Move c71_3 node to appropriate order
f9747b110fc4 arm64: dts: ti: k3-am69-aquila-clover: Change main_spi2 CS0 to GPIO mode
da6e384db047 arm64: dts: ti: k3-am69-aquila: Change main_spi0/2 CS to GPIO mode
b327f12239ae dt-bindings: phy: google: Add Google Tensor G5 USB PHY
0bf24893ebdc dt-bindings: pinctrl: spacemit: k3: fix drive-strength doc
d14b8962ef3b dt-bindings: sound: google,goldfish-audio: Convert to DT schema
40732ea3b5cd ASoC: dt-bindings: document dvdd-supply property for awinic,aw88261
2551501b8eb4 ASoC: dt-bindings: add avdd and iovdd supply
8793bb577f2f ASoC: dt-bindings: clarify areg-supply documentation
184e81f0216e Merge tag 'phy_common_properties' into next
ee419f4a90cc dt-bindings: phy-common-props: RX and TX lane polarity inversion
9d0ca379b4d7 dt-bindings: phy-common-props: ensure protocol-names are unique
387a58af46f8 dt-bindings: phy-common-props: create a reusable "protocol-names" definition
ebcd7b8610c6 dt-bindings: phy: rename transmit-amplitude.yaml to phy-common-props.yaml
41ccdde910d4 arm64: dts: amlogic: s4: fix mmc clock assignment
d4460e04fa48 arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
1cfe09dac9a0 arm64: dts: amlogic: drop useless assigned-clock-parents
b270a7272aa7 dt-bindings: ata: sata: Document the graph port
7d3c2e8aaae2 dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: Add QMP UFS PHY compatible
4facd5bf21a3 dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
dfc1771a6f91 dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Kaanapali QMP PHY
4d783b51113f dt-bindings: phy: Add PHY_TYPE_XAUI definition
fa414004e411 arm64: dts: mediatek: mt8183-kukui: Clean up IT6505 regulator supply
803da859257f dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: document the Milos QMP UFS PHY
cefe660cbbf3 arm64: dts: mediatek: mt7986a: Change compatible for SafeXcel crypto
7a3f7afcef9e arm64: dts: mediatek: mt8173-evb: Add interrupts to DA9211 regulator
206b6aecc2e6 arm64: dts: mediatek: mt6795-xperia-m5: Rename PMIC leds node
c36276a3b23d arm64: dts: mediatek: mt6795: Fix issues in SCPSYS node
0f3176276ef7 arm64: dts: mediatek: mt6331: Fix VCAM IO regulator name
48f536cf5421 dt-bindings: i2c: i2c-mt65xx: Add compatible for MT8189 SoC
38f6981ab699 Merge branch '20260105-kvmrprocv10-v10-0-022e96815380@oss.qualcomm.com' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into rproc-next
7b66bb79b113 Merge branch '20260105-kvmrprocv10-v10-0-022e96815380@oss.qualcomm.com' into drivers-for-6.20
6266a22d68f6 dt-bindings: net: dp83822: Deprecate ti,fiber-mode
9e1e99cc0fcc dt-bindings: net: Introduce the ethernet-connector description
d8dbb43cdd3a dt-bindings: riscv: extensions: Drop unnecessary select schema
4b9e5aa4a542 dt-bindings: riscv: Add Sha and its comprised extensions
fe7098988625 dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl
8722a58217dd dt-bindings: riscv: Add descriptions for Za64rs, Ziccamoa, Ziccif, and Zicclsm
b3ec41ca5d55 dt-bindings: riscv: Add B ISA extension description
0957ff98c67a dt-bindings: riscv: update ratified version of h, svinval, svnapot, svpbmt
65d424e95f5a dt-bindings: remoteproc: qcom,pas: Add iommus property
85cfc581b357 arm64: dts: qcom: qcs8300: Add GPU cooling
d9deaa855e4b dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95
d9a30a00d06b riscv: dts: allwinner: d1: Add RGB LEDs to boards
4905d5900f35 riscv: dts: allwinner: d1: Add LED controller node
a12da48d8f20 regulator: dt-bindings: rpi-panel: Mark 7" Raspberry Pi as GPIO controller
85ffea24a11c arm64: dts: allwinner: a100: Add LED controller node
6c8cc1716e52 mtd: spinand: Octal DTR support
49926bd040f4 dt-bindings: gpu: mali-valhall-csf: Add shader-present nvmem cell
8786767941ac arm64: dts: qcom: sa8775p: Add reg and clocks for QoS configuration
d2fe66895e41 dt-bindings: PCI: qcom,sa8255p-pcie-ep: Document firmware managed PCIe endpoint
19b8532647c2 Merge branch 'icc-mtk' into icc-next
1460edbbf157 dt-bindings: interconnect: qcom,qcs615-rpmh: Drop IPA interconnects
59ff855455ce Axiado AX3000 SoC SPI DB controller driver
c6443a18e84c arm64: dts: rockchip: Add Radxa CM3J on RPi CM4 IO Board
0032df604fa6 arm64: dts: rockchip: Add Radxa CM3J
9125f8bb75bc dt-bindings: arm: rockchip: Add Radxa CM3J on RPi CM4 IO Board
1ee79eb39a92 arm64: dts: rockchip: Make eeprom read-only for Radxa ROCK 3C/5A/5C
12369df303aa arm64: dts: rockchip: Add TS133 variant of the QNAP NAS series
0ebe988da929 dt-bindings: arm: rockchip: add TS133 to RK356x-based QNAP NAS devices
f05a74784e3e arm64: dts: rockchip: Move copy-key to TSx33 board files
65cc1beff5b0 arm64: dts: rockchip: Fix the common combophy + SATA on QNAP TSx33 devices
5876ba248e99 arm64: dts: rockchip: Move SoC include to individual QNAP TSx33 boards
5eacb4f2bc3f dt-bindings: PCI: loongson: Document msi-parent property
018ef4ed75bc regulator: dt-bindings: mediatek,mt6331: Add missing ldo-vio28 vreg
8dc33138e8ce dt-bindings: leds: bd72720: Add BD72720
6f2f719011e5 dt-bindings: mfd: ROHM BD72720
e501fa17eb6b dt-bindings: battery: Voltage drop properties
d0729ca80a5a dt-bindings: battery: Add trickle-charge upper limit
1ac445386209 dt-bindings: battery: Clarify trickle-charge
ea07ebf0f94f dt-bindings: regulator: ROHM BD72720
a639de753758 ASoC: Update rtq9128 document and source file
7e5fb31ab397 regulator: Add TPS65185
c03a7bad76e6 dt-bindings: media: Add qcom,sm6150-camss
abbdbd1e88b3 dt-bindings: media: Correct camss supply description
a51c86a499bc dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies
2ff42615a39e dt-bindings: media: ti: vpe: Add support for Video Input Port
063740f57f5b media: dt-bindings: adi,adv7180: add VPP and CSI register maps
3bc58308e013 dt-bindings: display: panel-simple: Allow "data-mapping" for "yes-optoelectronics,ytc700tlag-05-201c"
55197c2320e8 dt-bindings: display: simple: Add Innolux G150XGE-L05 panel
e89cec70ef26 arm64: dts: amlogic: move CPU OPP table and clock assignment to SoC.dtsi
0c2c59fa78c8 Merge patch series "arm64: dts: apple: Add integrated USB Type-C ports"
4bd1c26ba442 arm64: dts: apple: t60xx: Add nodes for integrated USB Type-C ports
a689f58bb9ca arm64: dts: apple: t8112: Add nodes for integrated USB Type-C ports
74042f340f78 arm64: dts: apple: t8103: Add nodes for integrated USB Type-C ports
dc70ad22e366 arm64: dts: apple: t8103: Add ps_pmp dependency to ps_gfx
0d2a0dbe95c5 arm64: dts: apple: t8103: Mark ATC USB AON domains as always-on
774daf7ba17a arm64: dts: apple: t8112-j473: Keep the HDMI port powered on
44f172d1b273 arm64: dts: apple: Add chassis-type property for Apple iMacs
5da589e80ed1 arm64: dts: apple: Add chassis-type property for Mac Pro
82b1e893e129 arm64: dts: apple: Add chassis-type property for Apple desktop devices
cd25b3aae2dc arm64: dts: apple: Add chassis-type property for all Macbooks
f3560e52d9a5 ASoC: dt-bindings: rtq9128: Add rtq9154 backward compatible
891c28cf3f3d arm64: dts: mediatek: mt6795-xperia-m5: Add UHS pins for MMC1 and 2
7ff21e13c458 arm64: dts: mediatek: mt8192-asurada: Remove unused clock-stretch-ns
504f1e61dc1c arm64: dts: mediatek: mt8173-elm: Remove regulators from thermal node
2da6bb860185 arm64: dts: mediatek: mt8173-elm: Fix dsi0 ports warning
134783da2fc5 arm64: dts: mediatek: mt8173-elm: Fix bluetooth node name and reorder
2f5a04231651 arm64: dts: mediatek: mt8183-pumpkin: Fix pinmux node names
d923b4f4f8a8 arm64: dts: mediatek: mt8183-jacuzzi-pico6: Fix typo in pinmux node
ec3f36045cf2 arm64: dts: mediatek: mt7981b-openwrt-one: Remove useless cells from flash@0
4b1cd354d614 arm64: dts: mediatek: mt8183-evb: Fix dtbs_check warnings
999cdbf9bc2a arm64: dts: mediatek: mt8173: Fix pinctrl node names and cleanup
39a89aef4b4f arm64: dts: mediatek: mt8188-geralt: drop firmware-name from first SCP core
cf3c5bf2fb8b regulator: dt-bindings: Document TI TPS65185
358401e15811 regulator: core: allow regulator_register() with
e7e731d90b00 spi: dt-bindings: nxp,lpc3220-spi: Add DMA specific properties
0efd42e88787 ASoC: dt-bindings: Convert realtek,rt5651 to DT schema
21889177c7e9 arm64: dts: renesas: Use lowercase hex
acc2d46ba016 Merge tag 'v6.19-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next
cd05027f3228 arm64: dts: renesas: Use hyphens in node names
7add41540117 arm/arm64: dts: renesas: Drop unused .dtsi
005f9e3644ac Merge 6.19-rc5 into char-misc-next
696aea94d3fa dt-bindings: media: i2c: Add os05b10 sensor
fa6b02de574e dt-bindings: media: i2c: Add Samsung S5K3M5 image sensor
1a6970d37718 dt-bindings: media: i2c: Add Samsung S5KJN1 image sensor
396be428d48f arm64: dts: cix: Add OrangePi 6 Plus board support
388222cbc6e4 dt-bindings: arm: cix: add OrangePi 6 Plus board
8a1b971219d9 dt-bindings: iio: adc: Add AD4134
c616ef5fc880 dt-bindings: iio: proximity: Add RF Digital RFD77402 ToF sensor
1b072533efef dt-bindings: pinctrl: samsung: Add exynos9610-wakeup-eint node
d556b2a250a8 dt-bindings: pinctrl: samsung: Add exynos9610-pinctrl compatible
fee6f4f2ebd5 dt-bindings: soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports
315d0a210ccd arm: dts: lpc32xx: add interrupts property to Motor Control PWM
2d4703cc39d8 arm: dts: lpc32xx: add clocks property to Motor Control PWM device tree node
59acbfb08c7a dt-bindings: net: rockchip-dwmac: Allow "dma-coherent"
e7978fa23e73 arm64: dts: rockchip: Add the vdpu383 Video Decoder on rk3576
3d9752b5ffdb arm64: dts: rockchip: Add the vdpu381 Video Decoders on RK3588
713151648ba2 arm64: dts: qcom: hamoa-iot-evk: Enable TPM (ST33) on SPI11
752008e5ef84 arm64: dts: rockchip: Add rk3588s-orangepi-cm5-base device tree
0d591d49d504 dt-bindings: arm: rockchip: Add Orange Pi CM5 Base
823ad7ab4830 arm64: dts: rockchip: Enable second HDMI output on CM3588
9ed66b32c4b9 arm64: dts: rockchip: Add HDMI to Gameforce Ace
afeffdef654c dt-bindings: display: rockchip: Add no-hpd for dw-hdmi-qp controller
374a2610a844 arm64: dts: qcom: talos: Add PMU support
1bb6f872a948 arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions
1495b12dd18b arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts
60db44f9ab1c arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts
3a94f2e147d6 arm64: dts: qcom: monaco: Add CTCU and ETR nodes
61978b63d7cb arm64: dts: qcom: Add PCIe3 and PCIe5 regulators for HAMAO-IOT-EVK board
2f0230be089a arm64: dts: qcom: Add PCIe3 and PCIe5 support for HAMOA-IOT-SOM platform
d7af35972d49 arm64: dts: qcom: hamoa: Move PHY, PERST, and Wake GPIOs to PCIe port nodes and add port Nodes for all PCIe ports
e917dcc44a65 arm64: dts: qcom: sdm630: Add LPASS LPI TLMM
a9576e1975bb arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm
2ce6dac0afda dt-bindings: gpu: img: Add AM62P SoC specific compatible
843442f35eac spi: dt-bindings: axiado,ax3000-spi: Add binding for Axiado SPI DB controller
ce1545686ac4 arm64: dts: renesas: rzt2h-n2h-evk-common: Use GPIO for SD0 write protect
b38c2837a4c1 arm64: dts: renesas: r9a09g057: Add CANFD node
71b05c0fbb1e arm64: dts: renesas: r9a09g056: Add CANFD node
f2826e02dec3 arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Enable CANFD
c3a5ef1971c9 arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable CANFD
57507f1ab100 arm64: dts: renesas: r9a09g087: Add CANFD node
2dd586ebf433 arm64: dts: renesas: r9a09g077: Add CANFD node
24a639a75379 Merge tag 'renesas-r9a09g077-dt-binding-defs-tag6' into renesas-dts-for-v6.20
70eb29ba7308 dt-bindings: pinctrl: renesas,r9a09g077-pinctrl: Document GPIO IRQ
7c1e6cdb540c arm64: dts: renesas: r9a09g057: Add RSCI nodes
12bab8609e25 arm64: dts: renesas: r9a09g056: Add RSCI nodes
55d259b32fe2 arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Add GPIO keys
330035930524 arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Add GPIO keys
0274e6aa8e7b arm64: dts: renesas: r9a09g087: Add GPIO IRQ support
cf741d2e8a0e arm64: dts: renesas: r9a09g077: Add GPIO IRQ support
7ec7d3107ad1 arm64: dts: renesas: r9a09g087: Add TSU and thermal zones support
b78ee53481d3 arm64: dts: renesas: r9a09g077: Add TSU and thermal zones support
fb523ea0cebf arm64: dts: renesas: r9a09g087: Add OPP table
ccc606135698 arm64: dts: renesas: r9a09g077: Add OPP table
3d3158f552ec Merge tag 'renesas-r9a09g077-dt-binding-defs-tag6' into renesas-clk-for-v6.20
e61a166730f3 dt-bindings: pinctrl: intel: keembay: fix typo
c52b56ea765a ARM: dts: lpc32xx: Add missing properties to I2S device tree nodes
590f92e52b6e ARM: dts: lpc32xx: Declare the second AHB master support on PL080 DMA controller
0c473c8d6f5d ARM: dts: lpc32xx: Add missing DMA properties
f9aa3eb38496 ARM: dts: lpc32xx: Use syscon for system control block
c379c6892d86 ARM: dts: lpc32xx: describe FLASH_INT of SLC NAND controller
75d9c48a2ba6 ARM: dts: lpc32xx: change NAND controllers node names
d9f691453182 ARM: dts: lpc32xx: Update spi clock properties
3abca592bfe1 ARM: dts: Add support for pcb8385
5f8db3730de7 dt-bindings: arm: at91: add lan966 pcb8385 board
958a9657c7d0 dt-bindings: soc: spacemit: k3: add clock support
a45c091e89a1 dt-bindings: net: dsa: microchip: Make pinctrl 'reset' optional
4e1af11215ee arm64: dts: qcom: qrb2210-rb1: Add overlay for vision mezzanine
e4a1630d3b05 arm64: dts: qcom: qrb2210-rb1: Add PM8008 node
41cb6b05e684 arm64: dts: qcom: qcm2290: Add pin configuration for mclks
f685535f806c arm64: dts: apple: s8001: Add DWI backlight for J98a, J99a
75911f2b072f dt-bindings: display: rockchip,vop: Add compatible for rk3506
7fa529d7f444 dt-bindings: display: rockchip,dw-mipi-dsi: Add compatible for rk3506
6122699e76e7 arm64: dts: broadcom: bcm2712: Add watchdog DT node
914987690831 arm64: dts: broadcom: bcm2712: Enable RNG
0f70c810948d ARM: dts: broadcom: bcm2711: Fix 'simple-bus' node names
726a4988206c ARM: dts: stm32: reorder nodes for stm32429i-eval
85b19a129954 arm64: dts: mediatek: add device tree for Tungsten 700 board
1b97285c0e24 arm64: dts: mediatek: add device tree for Tungsten 510 board
3ed0b28d2918 arm64: dts: mediatek: mt8188: switch mmc nodes to interrupts-extended
59a95bd89011 dt-bindings: arm: mediatek: Add Ezurio Tungsten entries
7e1cf0227843 dt-bindings: vendor-prefixes: Add Ezurio LLC
3e91aecad546 arm64: dts: mediatek: mt8395-genio-common: Add HDMI sound output support
62d02baa6a31 arm64: dts: mediatek: mt8395-genio-common: Enable HDMI output
37eb6fa3a0ad arm64: dts: mediatek: mt8395-radxa-nio-12l: Add HDMI sound output support
0dd940a9c0eb arm64: dts: mediatek: mt8395-radxa-nio-12l: Enable HDMI output
7be855ab6141 arm64: dts: mediatek: mt8390-genio-common: Add HDMI sound output support
684a136b3284 arm64: dts: mediatek: mt8390-genio-common: Enable HDMI output
5ceb3efd9bd7 arm64: dts: mediatek: mt8188: Add DPI1, HDMI, HDMI PHY/DDC nodes
9acd664ae667 arm64: dts: mediatek: mt8195: Add DPI1, HDMI, HDMI PHY/DDC nodes
2f438874517f arm64: dts: mediatek: mt7981b-openwrt-one: Enable wifi
79d0264a56fd arm64: dts: mediatek: mt7981b: Add wifi memory region
813bc92a5a7e arm64: dts: mediatek: mt7981b: Disable wifi by default
b5f804e52428 arm64: dts: mediatek: mt7981b-openwrt-one: Enable Ethernet
4a64fe860e70 arm64: dts: mediatek: mt7981b: Add Ethernet and WiFi offload support
c5b6d809e976 arm64: dts: mediatek: mt7981b-openwrt-one: Enable PCIe and USB
ce656f4eb178 arm64: dts: mediatek: mt7981b: Add PCIe and USB support
c7b4ce20856b arm64: dts: mediatek: mt8183: Add missing endpoint IDs to display graph
9f78fe613d0a dt-bindings: leds: Add LP5860 LED controller
1490903291a0 ARM: dts: aspeed: ibm: Use non-deprecated AT25 properties
666a578e38ce dt-bindings: soc: mediatek: dvfsrc: Document clock
0a000d225d77 riscv: dts: renesas: r9a07g043f: Move interrupt-parent to top node
22bcb33f74c0 dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID
38d74c781461 dt-bindings: ata: ahci-platform: Drop unnecessary select schema
6c3f2d145bdf ARM: dts: microchip: sama7d65: add missing flexcom nodes
5d84ec142574 ARM: dts: microchip: sama7d65: add fifo-size to usart
78064bb3efab ARM: dts: microchip: sama7d65: add dma properties to usart6
b88e699ac98c arm64: dts: nuvoton: Add missing "device_type" property on memory node
972220e64030 ARM: dts: aspeed: add device tree for ASRock Rack ALTRAD8 BMC
ca9702b1c660 dt-bindings: arm: aspeed: add ASRock Rack ALTRAD8 board
ef7b87ccb63c ARM: dts: aspeed: bletchley: Remove try-power-role from connectors
9534fb1326fa ARM: dts: aspeed: Add Facebook Anacapa platform
e42ed37d5c01 dt-bindings: arm: aspeed: Add compatible for Facebook Anacapa BMC
77be93774ce5 dt-bindings: i2c: atmel,at91sam: add microchip,lan9691-i2c
9a70246b5079 dt-bindings: i2c: spacemit: add optional resets
89715b572f22 Merge tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
a49e947cb82d Merge tag 'aspeed-6.20-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
b0a6b2163d84 Merge tag 'arm-soc/for-6.19/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt
109d342a9d8c arm64: dts: marvell: change regulator-gpio to regulator-fixed
aebc5bb7e5e0 arm64: dts: marvell: cn9131-cf-solidwan: Add missing GPIO properties on "nxp,pca9536"
327f06a60d50 arm64: dts: marvell: Fix stray and typo "pinctrl-names" properties
f5b9b2c9e4b0 arm64: dts: marvell: Add missing "#phy-cells" to "usb-nop-xceiv"
2d48b886ad30 Merge branch '20260107-kaanapali-mmcc-v3-v3-0-8e10adc236a8@oss.qualcomm.com' into clk-for-6.20
a4ecfeacab64 dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller
d561bab67763 dt-bindings: clock: qcom: Add Kaanapali video clock controller
d5e064fd178d dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali
c7c41265356a dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller
8e073d33637a Merge branch '20251202-sm8750_camcc-v1-2-b3f7ef6723f1@oss.qualcomm.com' into clk-for-6.20
bf41478fce67 dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC
3c947a7e450a dt-bindings: clock: qcom: Add SDM439 Global Clock Controller
76fb317d3b51 dt-bindings: clock: qcom: Add MSM8940 Global Clock Controller
4ba4ffd81153 dt-bindings: remoteproc: Add HSM M4F core on TI K3 SoCs
7a5c4216a1c0 arm64: dts: qcom: qcs615: Drop IPA interconnects
69fb7ec26313 dt-bindings: usb: Add Socionext Uniphier DWC3 controller
8c743972ba19 dt-bindings: usb: Add Microchip LAN969x support
cdc01d91cdae dt-bindings: pinctrl: sunxi: Allow pinmux sub-pattern with leading numbers
52e36f69f85c dt-bindings: pinctrl: spacemit: add K3 SoC support
e4814cfbf128 dt-bindings: pinctrl: spacemit: convert drive strength to schema format
0e58ef414308 arm64: dts: amlogic: Use lowercase hex
fa33bb953bdc arm64: dts: amlogic: Use hyphen in node names
7da1cd217a9a ARM: dts: meson: drop iio-hwmon in favour of generic-adc-thermal
2951b17ddd23 dt-bindings: PCI: mediatek-gen3: Add MT7981 PCIe compatible
303e6869def2 arm64: dts: airoha: Use hyphen in node names
ef45fa08c122 regulator: dt-bindings: qcom,wcn3990-pmu: describe PMUs on WCN39xx
49ce882257aa ASoC: ES8389: Add some members and update
eb8511c0c383 arm64: dts: rockchip: Enable analog sound on RK3576 EVB1
849e6bb5169a arm64: dts: rockchip: Enable HDMI sound on RK3576 EVB1
144748745031 arm64: dts: rockchip: Enable HDMI sound on Luckfox Core3576
cea146581f75 arm64: dts: rockchip: Enable HDMI sound on FriendlyElec NanoPi M5
f32a74a77a1c arm64: dts: rockchip: Use a readable audio card name on NanoPi M5
7884b9f5136e arm64: dts: rockchip: enable NPU on rk3588-jaguar
6a46cc7da3d5 arm64: dts: rockchip: enable NPU on rk3588-tiger
1186cfe20ff6 dt-bindings: arm: rockchip: fix description for Radxa CM5
e701f00f60df dt-bindings: arm: rockchip: fix description for Radxa CM3I
d1d09800d87e arm64: dts: rockchip: Add missing everest,es8388 supplies to rk3399-roc-pc-plus
a558de474d84 arm64: dts: rockchip: Enable PCIe for ArmSoM Sige1
d7624078afea arm64: dts: rockchip: Enable the NPU on Turing RK1
df697d66f669 arm64: dts: rockchip: Enable the NPU on FriendlyElec CM3588
5682b1ad021c arm64: dts: rockchip: Enable the NPU on NanoPC T6/T6-LTS
d9f2b91a7b6c arm64: dts: rockchip: enable UFS controller on FriendlyElec NanoPi M5
e2debfad11d2 arm64: dts: rockchip: Add light/proximity sensor to Pinephone Pro
a26d68c1f8db arm64: dts: rockchip: Add magnetometer sensor to Pinephone Pro
0454d9dc8e56 ARM: dts: allwinner: sun5i-a13-utoo-p66: delete "power-gpios" property
3b4e2f9477be spi: st: use pm_ptr and remove __maybe_unused
8b01839fd7d8 arm64: dts: qcom: qcs615-ride: Enable DisplayPort
357ceb356d84 arm64: dts: qcom: talos: Add DisplayPort and QMP USB3-DP PHY
4e8ac02c90d2 arm64: dts: qcom: sm8750-qrd: Enable Iris codec
33f47143bfd1 arm64: dts: qcom: sm8750-mtp: Enable Iris codec
2aa74e476b84 arm64: dts: qcom: sm8750: Add Iris VPU v3.5
4501ac6fb0c8 dt-bindings: gpio: spacemit: add compatible name for K3 SoC
23cf8652240b arm64: zynqmp: Remove ina260 IIO description
dc06a3f283f1 arm64: dts: xilinx: Drop "label" property on dlg,slg7xl45106
bcfd0d929956 dt-bindings: soc: samsung: exynos-pmu: Drop unnecessary select schema
dd378a30dc54 dt-bindings: display: msm: document DSI controller and phy on QCS8300
3a283e84dbbc dt-bindings: msm: dsi-controller-main: document the QCS8300 DSI CTRL
6a4139dbc9be dt-bindings: display: msm-dsi-phy-7nm: document the QCS8300 DSI PHY
6f23a1829c95 arm64: dts: qcom: Add The Fairphone (Gen. 6)
a7438709761b arm64: dts: qcom: Add initial Milos dtsi
8165839b6501 arm64: dts: qcom: Add PMIV0104 PMIC
ca80589ab27c arm64: dts: qcom: Add PM7550 PMIC
9f874cd47174 arm64: dts: qcom: pm8550vs: Disable different PMIC SIDs by default
5253149fd5ee dt-bindings: arm: qcom: Add Milos and The Fairphone (Gen. 6)
2f681c6aa973 dt-bindings: qcom,pdc: document the Milos Power Domain Controller
7b2b07fc1c7d dt-bindings: crypto: qcom,prng: document Milos
1d4c234a7b5a ARM: dts: omap: dra7: Remove bogus #syscon-cells property
36bf7bcd26ce ARM: dts: ti/omap: omap*: fix watchdog node names
29f8d2affca6 ARM: dts: ti: Drop unused .dtsi
a1cceab259c1 ARM: dts: Drop am335x-base0033 devicetree
615ae4f85f0a ARM: dts: tps65910: Add gpio & interrupt properties
ead7e6e24f53 ARM: dts: omap: enable panic-indicator option
4f8825fbdb65 ARM: dts: ti/omap: omap4-epson-embt2ws: add powerbutton
1dae4dc95b72 arm64: dts: ti: Use lowercase hex
2aaacb2fbb3d arm64: dts: ti: Minor whitespace cleanup
8fbd19905cb1 arm64: dts: qcom: monaco-evk: Enable PCIe0 and PCIe1.
0585c2d3a38e arm64: dts: qcom: qcs8300-ride: enable pcie1 interface
c1c61f7b3cc0 arm64: dts: qcom: qcs8300: enable pcie1
359703ffd6a7 arm64: dts: qcom: qcs8300-ride: enable pcie0 interface
7d4282239989 arm64: dts: qcom: qcs8300: enable pcie0
8964374fadd9 arm64: dts: qcom: x1e80100: add TRNG node
dbffc86d5286 arm64: dts: qcom: sm8750: Fix BAM DMA probing
57591184f103 arm64: dts: qcom: monaco: add QCrypto node
5134a4c0be3d arm64: dts: qcom: lemans: add QCrypto node
9adce3539e71 arm64: dts: qcom: x1e80100-medion-sprchrgd-14-s1: correct firmware paths
4bf4a52efdb2 arm64: dts: qcom: msm8994-octagon: Fix Analog Devices vendor prefix of AD7147
38cc65257d59 arm64: dts: qcom: x1e80100: Add missing TCSR ref clock to the DP PHYs
5e25679a8251 arm64: dts: qcom: sm8750-mtp: Add eusb2 repeater tuning parameters
2176323db071 arm64: dts: qcom: msm8939: Add camss and cci
4c1cd0ce8367 arm64: dts: qcom: qcs6490-rb3gen2: Add TC9563 PCIe switch node
6fa474797f18 dt-bindings: cache: qcom,llcc: Remove duplicate llcc7_base for Glymur
efdc29224d43 media: dt-bindings: nxp,imx8-jpeg: Document optional SRAM support
a335ccfc867a arm64: dts: renesas: r8a779h0: Add WWDT nodes
52dc7f70ec4f arm64: dts: renesas: r8a779g0: Add WWDT nodes
8c5dddeaaeb7 arm64: dts: renesas: r8a779f0: Add WWDT nodes
6d625d11625f arm64: dts: renesas: r8a779a0: Add WWDT nodes
c776bb79ad41 arm64: dts: renesas: r8a77980: Add WWDT nodes
aaa9bd7ed5ca arm64: dts: renesas: r8a77970: Add WWDT nodes
7a90b2901668 arm64: dts: renesas: condor/v3hsk: Mark SWDT as reserved
aba65d6a28dc arm64: dts: renesas: r8a77980: Add SWDT node
dcaa888deaf1 arm64: dts: renesas: r9a09g056: Add TSU nodes
0e50629424cf arm64: dts: renesas: r9a09g087: Add DMAC support
d8a8b28b928c arm64: dts: renesas: r9a09g077: Add DMAC support
9d0b0c6918ad arm64: dts: renesas: r9a09g087: Add ICU support
47563af9e68d arm64: dts: renesas: r9a09g077: Add ICU support
db8c163135cf arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodes
305334f1f6be arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS
a4dad3cab31a arm64: dts: renesas: r9a09g047: Add RSCI nodes
c8bb3fb9de1b ARM: dts: renesas: r9a06g032: Add Ethernet switch interrupts
6f9e11e7930c arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button support
885176dbb7a6 arm64: dts: renesas: r9a09g056: Add RSPI nodes
e3bec0d47373 arm64: dts: renesas: r9a09g056: Add DMAC nodes
a65765461adf arm64: dts: renesas: r9a09g056: Add ICU node
5fcf901b614d arm64: dts: renesas: r9a09g047e57-smarc: Remove duplicate SW_LCD_EN
4d006a67e1c9 arm64: dts: renesas: r9a09g087: Add SPI nodes
70302041c4f0 arm64: dts: renesas: r9a09g077: Add SPI nodes
701acfab3819 arm64: dts: renesas: rzg3s-smarc: Enable PCIe
78bef1b4e046 arm64: dts: renesas: rzg3s-smarc-som: Add PCIe reference clock
2bef06d981fb arm64: dts: renesas: r9a08g045: Add PCIe node
2a9a9a7001bf arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller
aca0b5f6febb arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes
e21281585f19 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers
0c0335f6219a arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
3c8761e141e7 arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable DU and DSI
2f3cc92c2800 arm64: dts: renesas: r9a09g056: Add DU and DSI nodes
65481a831b2e arm64: dts: renesas: r9a09g056: Add FCPV and VSPD nodes
3d6ad94f4adb arm64: dts: renesas: r9a09g057h48-kakip: Enable SPI NOR Flash
107fa1054cc8 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable DU and DSI
35318a57a21b arm64: dts: renesas: r9a09g057: Add DU and DSI nodes
7f864a85f515 arm64: dts: renesas: r9a09g057: Add FCPV and VSPD nodes
59b3eee55f4f arm64: dts: renesas: rzt2h-n2h-evk: Add note about SD1 1.8V modes
4f02a02eb8bf spi: dt-bindings: at91: add microchip,lan9691-spi
d9589406774c ASoC: dt-bindings: realtek,rt5575: add support for ALC5575
b6baf8f15f6d ASoC: dt-bindings: ES8389: Add property about power supply
6d6470b98cac dt-bindings: PCI: qcom,pcie-apq8084: Move APQ8084 to dedicated schema
a36eadc896b3 dt-bindings: PCI: qcom,pcie-msm8996: Move MSM8996 to dedicated schema
0a6e47a4e25e dt-bindings: PCI: qcom,pcie-apq8064: Move APQ8064 to dedicated schema
587d0c36a682 dt-bindings: PCI: qcom,pcie-ipq9574: Move IPQ9574 to dedicated schema
3637b5946a3b dt-bindings: PCI: qcom,pcie-ipq4019: Move IPQ4019 to dedicated schema
9e64f603f5e6 dt-bindings: PCI: qcom,pcie-ipq8074: Move IPQ8074 to dedicated schema
148b98a0492b dt-bindings: PCI: qcom,pcie-ipq6018: Move IPQ6018 and IPQ8074 Gen3 to dedicated schema
2ff81d7e9fde dt-bindings: PCI: qcom,pcie-ipq5018: Move IPQ5018 to dedicated schema
27d8931ad218 dt-bindings: PCI: qcom,pcie-qcs404: Move QCS404 to dedicated schema
af4a42c35454 dt-bindings: PCI: qcom,pcie-sdm845: Move SDM845 to dedicated schema
e2592855c941 dt-bindings: PCI: qcom,pcie-sdx55: Move SDX55 to dedicated schema
b3bac4176ed4 dt-bindings: PCI: qcom,pcie-sm8150: Merge SC8180x into SM8150
af0daceaaadd dt-bindings: net: mscc-miim: add microchip,lan9691-miim
76b09e6295e1 arm64: dts: qcom: x1e80100: Fix USB combo PHYs SS1 and SS2 ref clocks
db07dcaaf4e9 arm64: dts: qcom: qcs8300: Add support for camss
b9335058da90 arm64: dts: qcom: sdm630: Add FastRPC nodes to ADSP
d22a889cb06f arm64: dts: qcom: sdm630: Add missing vote clock and GDSC to lpass_smmu
8043fa6a46ed arm64: dts: qcom: sdm630/660: Add CDSP-related nodes
724d10cf16e7 arm64: dts: qcom: hamoa-iot-evk: Add backlight support for eDP panel
272a014d1ac9 arm64: dts: qcom: hamoa-iot-evk: enable PWM RG LEDs
ecb7e38a5372 arm64: dts: qcom: msm8937: add reset for display subsystem
3a7b9a40fa23 arm64: dts: qcom: msm8917: add reset for display subsystem
1f020ad9b23b Merge branch '20251117-mdss-resets-msm8917-msm8937-v2-1-a7e9bbdaac96@mainlining.org' into HEAD
31e5ff1e20df arm64: dts: qcom: sdm845-oneplus: Mark l14a regulator as boot-on
fd5ed3423780 arm64: dts: qcom: sdm845-oneplus: Don't keep panel regulator always on
34a812a5f443 arm64: dts: qcom: sdm845-oneplus: Don't mark ts supply boot-on
73bd09554cba arm64: dts: qcom: sdm630: Add missing MDSS reset
c641ab7ba076 arm64: dts: qcom: ipq5018: Remove tsens v1 fallback compatible
4ac3d77913f9 arm64: dts: qcom: qrb2210: add dts for Arduino unoq
3283b13450f4 arm64: dts: qcom: agatti: add uart2 node
aa5f3c8a2fbf dt-bindings: arm: qcom: Add arduino imola, UnoQ codename
33d0a5dd67ab dt-bindings: vendor-prefixes: Add Arduino name
3daa37ff10a1 arm64: dts: qcom: Add qcs6490-rubikpi3 board dts
fe60d92de48d dt-bindings: arm: qcom: Add Thundercomm RUBIK Pi 3
598c096bc2e7 arm64: dts: qcom: lemans-evk: Add OTG support for primary USB controller
1638c980cb23 arm64: dts: qcom: sm8750-qrd: Add SDC2 node for sm8750 qrd board
a2c70dbeda4b arm64: dts: qcom: sm8750-mtp: Add SDC2 node for sm8750 mtp board
cca4ddfad433 arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
2fe969d9aadc arm64: dts: qcom: monaco-evk: Enable AMC6821 fan controller
73f68df4dfa2 arm64: dts: qcom: sdm845-xiaomi-beryllium: Add placeholders and sort
0d455c5e6b6f arm64: dts: qcom: sdm845-xiaomi-beryllium: Adjust firmware paths
4d171519043d arm64: dts: qcom: sdm845-xiaomi-beryllium: Enable SLPI
12ba95e3d7a7 arm64: dts: qcom: sdm845-oneplus: Add framebuffer
898ab8b9df3a arm64: dts: qcom: sdm845-oneplus-enchilada: Sort nodes alphabetically
085b3f85d3ff ARM: dts: qcom: msm8974-hammerhead: Update model property
6b296b50e9a6 arm64: dts: qcom: sdm850-huawei-matebook-e-2019: Correct ipa_fw_mem for the driver to load successfully
b7f781bfd930 arm64: dts: qcom: sdm850-huawei-matebook-e-2019: Remove duplicate reserved-memroy nodes
9ba9390130ff arm64: dts: qcom: hamoa-iot-evk: Add WLAN node for Hamoa IoT EVK board
43da1a95f1e3 arm64: dts: qcom: monaco-evk: Enable TPM (ST33)
dcf9ec139e0f arm64: dts: qcom: lemans-evk: Enable TPM (ST33)
d7a186f5dfa7 arm64: dts: qcom: lemans: Enable cpufreq cooling devices
4e2a153d23fc arm64: dts: qcom: monaco: Enable cpufreq cooling devices
03cb5b83d7a0 arm64: dts: qcom: Add support for Pixel 3 and Pixel 3 XL
e13a8a086724 dt-bindings: arm: qcom: Add Pixel 3 and 3 XL
31b92cd46b99 arm64: dts: qcom: sm8250-hdk: specify ZAP firmware name
d670f3c7f759 arm64: dts: qcom: sm8150-hdk,mtp: specify ZAP firmware name
b76977a01121 arm64: dts: qcom: sdm630: fix gpu_speed_bin size
08b986f449ef arm64: dts: qcom: sdm845-shift-axolotl: Add ath10k calibration variant
a04d37747b02 arm64: dts: qcom: sdm845-xiaomi-beryllium: Add ath10k calibration variant
4a1ff78c123e arm64: dts: qcom: sdm845-oneplus: add ath10k calibration variant
21fefb193e57 arm64: dts: qcom: sm7225-fairphone-fp4: Enable CCI pull-up
1674d6b26d4b arm64: dts: qcom: sm7225-fairphone-fp4: Add camera fixed regulators
8625b9a3127d arm64: dts: qcom: sm7225-fairphone-fp4: Add camera EEPROMs
17db2e966944 arm64: dts: qcom: SM8750: Enable CPUFreq support
2244f56b4c75 dt-bindings: mailbox: qcom: Document SM8750 CPUCP mailbox controller
db27b48bf1d4 arm64: dts: qcom: msm8939-asus-z00t: add hall sensor
512dea79e7b5 arm64: dts: qcom: msm8939-asus-z00t: add battery
21c4b46736a2 arm64: dts: qcom: x1e78100-t14s: Add audio playback over DisplayPort
8fac08b9bd33 arm64: dts: qcom: hamoa: Add sound DAI prefixes for DP
ae9e038fa854 arm64: dts: qcom: x1e80100-vivobook-s15: enable IRIS
fd267437f7c1 arm64: dts: qcom: x1e80100-vivobook-s15: add HDMI port
915a658aed2b arm64: dts: qcom: x1e80100-vivobook-s15: enable ps8830 retimers
68ca50543870 arm64: dts: qcom: sm8550-hdk-rear-camera-card: remove optional property
a7acf61fb13d arm64: dts: qcom: sm8550-hdk-rear-camera-card: rename supply properties
76783dfe7293 arm64: dts: qcom: sm8550-qrd: remove data-lanes property of image sensor
edaa8fefff5a arm64: dts: qcom: sm8550-qrd: rename image sensor supply properties
0606f7440187 arm64: dts: qcom: qcs8300-ride: Enable Display Port
ea42eceb35bc arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
156a79d201cb arm64: dts: qcom: Use lowercase hex
d3047ae03e25 arm64: dts: qcom: Use hyphen in node names
877f6c418809 arm64: dts: qcom: Minor whitespace cleanup
8b7f9308dc11 arm64: dts: qcom: Add support for X1-based Surface Pro 11
549d1069e37d dt-bindings: arm: qcom: Document Microsoft Surface Pro 11
d57f7a29a719 arm64: dts: qcom: hamoa-iot-evk: Add vbus regulator support for Type-A ports
9f9a912174f7 arm64: dts: qcom: sdm845-xiaomi-polaris: Update firmware paths
088719338dda arm64: dts: qcom: sdm845-samsung-starqltechn: Update firmware paths
59721bb424ca arm64: dts: qcom: sdm845-axolotl: Update firmware paths
562f8c32c5eb arm64: dts: qcom: sdm845-oneplus: Update firmware paths
f5da59b7943a dt-bindings: remoteproc: qcom,sm8550-pas: Drop SM8750 ADSP from if-branch
88d1d6f92d38 arm64: dts: qcom: lemans-ride: Enable Adreno 663 GPU
0527619279f9 arm64: dts: qcom: lemans-evk: Enable Adreno 663 GPU
87d58e78dc67 arm64: dts: qcom: lemans: Add GPU cooling
7ee25117a21a arm64: dts: qcom: lemans: Add gpu and gmu nodes
61bd7199186c dt-bindings: remoteproc: qcom,adsp: Allow cx-supply on qcom,sdm845-slpi-pas
5eceae41c6d8 arm64: dts: qcom: sm8650-hdk: Add support for the Rear Camera Card overlay
c0edc9174808 arm64: dts: qcom: sm8650-qrd: Enable CAMSS and Samsung S5KJN1 camera sensor
cf956196ece0 arm64: dts: qcom: sm8650: Add description of MCLK pins
c9ddee7b0511 arm64: dts: qcom: sm8650: Add CAMSS device tree node
fda8e8debc98 arm64: dts: qcom: qcs8300: Enable TSENS support for QCS8300 SoC
77c41ebbdaaa arm64: dts: qcom: x1p42100-lenovo-thinkbook-16: add hdmi bridge with enable pin
09009c00f252 arm64: dts: qcom: x1p42100-lenovo-thinkbook-16: force usb2-only mode on usb_1_ss2_dwc3
f5d0c008df3e arm64: dts: qcom: hamoa: Extend the gcc input clock list
a22ceb6b7a1a Merge branch '20260103-ufs_symbol_clk-v2-1-51828cc76236@oss.qualcomm.com' into arm64-for-6.20
474356f70da3 Merge branch '20260103-ufs_symbol_clk-v2-1-51828cc76236@oss.qualcomm.com' into clk-for-6.20
69b5452282c0 dt-bindings: clock: qcom,x1e80100-gcc: Add missing UFS mux clocks
145e0a5201cb dt-bindings: gpio: add gpio-line-mux controller
c83e70e854f7 arm64: dts: arm: Use hyphen in node names
d209535a2215 dt-bindings: dma: atmel: add microchip,lan9691-dma
0eef03ce74ad dt-bindings: dma: snps,dw-axi-dmac: Add compatible string for Agilex5
72eddc8ea8bf dt-bindings: dma: pl08x: Do not use plural form of a proper noun PrimeCell
d78249fb43f5 dt-bindings: phy: Add DP PHY compatible for Glymur
055a94568c8e dt-bindings: phy: qcom-edp: Add missing clock for X Elite
8646a829f188 dt-bindings: phy: sc8280xp-qmp-pcie: Document Glymur PCIe Gen4 2-lanes PHY
23e55d439590 dt-bindings: phy: spacemit: add K1 USB2 PHY
403485907a74 dt-bindings: iio: adc: Add adi,ad4062
7e6a040da1bd arm64: dts: freescale: Add FRDM-IMX91 basic support
684abbc2df5b dt-bindings: arm: fsl: Add FRDM-IMX91 board
5117ca7e076f arm64: dts: imx8mp: Update Data Modul i.MX8M Plus eDM SBC DT to rev.903
c73456d398d4 dt-bindings: tpm: Add st,st33tphf2ei2c
7886adca522a arm64: dts: imx8mp-evk: add camera ov5640 and related nodes
262c3a71c374 arm64: dts: colibri-imx8x: Add cma memory
3c336bc649ea arm64: dts: colibri-imx8x: Add wi-fi 32kHz clock
e55847bd6e28 arm64: dts: colibri-imx8x: Add backlight
877922c5b151 dt-bindings: PCI: socionext,uniphier-pcie: Fix interrupt controller node name
66f0c0a17712 ARM: dts: imx: imx6sl: fix lcdif compatible
79a7d6846e08 ARM: dts: imx: imx6sll-kobo-clara2e: add regulator for EPD
0f98d63aeddb ARM: dts: imx: imx6sll: fix lcdif compatible
6d6926f24d25 dt-bindings: arm: fsl: Add Apalis iMX8QP
5066e222c45a arm64: dts: freescale: Add Apalis iMX8QP
25e7a5b1860c arm64: dts: freescale: Add NXP i.MX8QP SoC dtsi
5f992de15d2e arm64: dts: imx8qm: Add CPU cluster labels
cfb57cee6955 arm64: dts: freescale: Use lowercase hex
da35f24d5e4c arm64: dts: freescale: Minor whitespace cleanup
f4720b2ac3bc arm64: dts: freescale: Use hyphen in node names
99a5eada4037 arm64: dts: imx94: add mt35xu512aba spi nor support
d4ff990102a0 arm64: dts: imx94: add xspi device node
bf18a0f083bd arm64: dts: freescale: Add i.MX952 EVK basic device tree
3546aa155a84 arm64: dts: freescale: Add initial device tree for i.MX952
d8a61a7faedd dt-bindings: arm: fsl: add i.MX952 EVK board
849d046516eb arm64: dts: imx8mm-phycore-som: Update eth phy impedance
5696083f98bf arm64: dts: freescale: add support for NXP i.MX93 FRDM
065f6fa5617f dt-bindings: arm: fsl: add i.MX93 11x11 FRDM board
1a1ea4cc09ec arm64: dts: mb-smarc-2: Add PCIe support
055375ce9c0a arm64: dts: imx8mn-tqma8mqnl: fix LDO5 power off
8fa9e7b88ea0 arm64: dts: imx8mn-tqma8mqnl: remove virtual 1.8V regulator
39f4744a17ef arm64: dts: imx8mn-tqma8mqnl: remove virtual 3.3V regulator
531f8f3ea7b6 arm64: dts: imx8mm-tqma8mqml: fix LDO5 power off
685d79e7a0a2 arm64: dts: imx8mm-tqma8mqml: remove superfluous line
1c4004034c8b arm64: dts: imx8mm-tqma8mqml: remove virtual 1.8V regulator
28b9c486bbe5 arm64: dts: imx8mm-tqma8mqml: remove virtual 3.3V regulator
e9d1570ab83e arm64: dts: imx8mp-var-som: Add support for TSC2046 touchscreen
f253aed62f06 arm64: dts: imx8mp-var-som: Add support for WM8904 audio codec
730d6ed15b37 arm64: dts: imx8mp-var-som: Add WiFi and Bluetooth support
4827360c2c62 arm64: dts: imx8mp-var-som: Move UART2 description to Symphony carrier
fd9b983b0a5c arm64: dts: imx8mp-var-som: Move PCA9534 GPIO expander to Symphony carrier
98b561dd8a84 arm64: dts: imx8mp-var-som: Move USDHC2 support to Symphony carrier
b8b15223e313 arm64: dts: imx93-11x11-evk: Use phys to replace xceiver-supply
a35f3452022a arm64: dts: imx8mp-evk: Use phys to replace xceiver-supply
c731fb199e0c arm64: dts: imx95-15x15-evk: Use phys to replace xceiver-supply
2aa50e68d77c ARM: dts: imx6qdl: Add default GIC address cells
f749887b005d dt-bindings: power: fsl,imx-gpc: Document address-cells
fc5612e37c5c arm64: dts: imx8m{m,p}-venice-gw71xx: Add Magetometer
dfa8da65b542 arm64: dts: tqma8mpql-mba8mp-ras314: Add HDMI audio output support
fc93ef416a95 arm64: dts: tqma8mpql-mba8mp-ras314: Fix HDMI CEC pad control settings
05a087be0a3b arm64: dts: tqma8mpql-mba8mp-ras314: Fix Ethernet PHY IRQ support
265db33a1dc1 arm64: dts: tqma8mpql-mba8mpxl: Configure IEEE 1588 event out signal
d6330d919482 arm64: dts: tqma8mpql-mba8mpxl: Add HDMI audio output support
bcd6a3e5924c arm64: dts: tqma8mpql-mba8mpxl: Fix HDMI CEC pad control settings
ec64595818bc arm64: dts: tqma8mpql-mba8mpxl: Fix Ethernet PHY IRQ support
c8e421dbe62c arm64: dts: tqma8mpql-mba8mpxl: Adjust copyright text format
4b50dfe18fca arm64: dts: freescale: imx8mp-toradex-smarc: enable hdmi_pai device
ae6866e9e3ce arm64: dts: freescale: imx8mp-verdin: enable hdmi_pai device
00d3bccff648 arm64: dts: freescale: imx8mp-verdin: Remove obsolete TODO comments
dcf72f23ce11 arm64: dts: freescale: imx8-apalis: Add ethernet alias
0f0ad209f6d3 arm64: dts: imx93-var-som-symphony: Enable LPSPI6 controller
7ebd76fb18f3 arm64: dts: imx93-var-som-symphony: Add USB support
f124d4b6be32 arm64: dts: imx93-var-som-symphony: Add support for ft5x06 touch controller
a390238e4c05 arm64: dts: imx93-var-som-symphony: Update gpio aliases
1d6dfe10f3dc arm64: dts: imx8mp-phyboard-pollux: add PEB-WLBT-05 expansion board
e1e04d304210 arm64: dts: imx8mp-phyboard-pollux: Enable i2c3
53a79ec7e9ba arm64: dts: imx8mp-phycore-som: add spi-nor supply vcc
16bd398bad83 arm64: dts: imx8mp-phyboard-pollux: add fan-supply
4839861015c7 arm64: dts: imx91-11x11-evk: Add audio XCVR sound card support
0476fe3182c9 arm64: dts: imx91-11x11-evk: Add PDM microphone sound card support
84984b65264f arm64: dts: imx91-11x11-evk: Add WM8962 sound card support
fd45e8bd8d31 arm64: dts: imx91-11x11-evk: Add bt-sco sound card support
c7331a3e80a7 arm64: dts: imx91-11x11-evk: Refine label and node name of WM8962
d4831b59c96d arm64: dts: imx93-9x9-qsb: add CAN support overlay file
c7db72e1efdb arm64: dts: tqmls1046a: Move BMAN/QMAN buffers to DRAM1 area
e65fd05850b8 arm64: dts: cix: Use lowercase hex
3b0a1a86c1b0 arm64: dts: imx93-14x14-evk: Add audio XCVR sound card
f878699bd535 arm64: dts: imx93-14x14-evk: Add bt-sco sound card support
4ca9daec40bf arm64: dts: imx8ulp: add sim lpav node
8a7d32705460 arm64: dts: imx943-evk: add flexcan support
b8352dd72243 arm64: dts: imx8mm: Add label to thermal-zones
e28f3872d30f arm64: dts: add support for NXP i.MX8MP FRDM board
f4799a46389e arm64: dts: tqma8xxs-mb-smarc-2: replace 0 with IMX_LPCG_CLK_0 for lpcg indices
3a900199eb02 arm64: dts: tqma8xxs: replace 0 with IMX_LPCG_CLK_0 for lpcg indices
1519c352d6e3 arm64: dts: imx8qxp-mek: Add sensors under i2c1 bus
c5b9031ad104 arm64: dts: mba8xx: replace 0 with IMX_LPCG_CLK_0 for lpcg indices
93ef7b95e9bc dt-bindings: arm: fsl: Add i.MX8MP FRDM board
25160b69b379 dt-bindings: misc: qcom,fastrpc: Add compatible for Kaanapali
45a9a8710de2 Merge 6.19-rc3 into tty-next
43a9632e8426 Merge 6.19-rc3 into usb-next
d5e356ff7786 dt-bindings: arm: fsl: add TQ-Systems boards MBLS1028A and MBLS1028A-IND
094056360f84 arm64: dts: ls1028a: Add mbls1028a and mbls1028a-ind devicetrees
5269188d0ca0 arm64: dts: imx8mp libra: add peb-av-10 expansion board overlay
bad56036e188 arm64: dts: imx8mp libra: add and update display overlays
b4142775992e arm64: dts: imx943-evk: add ENETC, EMDIO and PTP Timer support
40fb558610ef arm64: dts: imx94: add basic NETC related nodes
269ec450562e arm64: dts: imx8dxl-ss-ddr: Add DB (system interconnects) pmu support for i.MX8DXL
e627f343ceb1 arm64: dts: imx8qm: add ddr perf device node
07248d41718a arm64: dts: exynos: gs101: add OTP node
81d5997ca8d3 dt-bindings: nvmem: add google,gs101-otp
c694f553fb48 dt-bindings: iio: dac: adding support for Microchip MCP47FEB02
baa9b8795d02 Merge tag 'drm-misc-next-2025-12-19' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
2dddaeb4ed59 ARM: dts: lpc3250-phy3250: replace deprecated at25 properties with new ones
3f6a920fb331 ARM: dts: lpc3250-phy3250: rename nodename at@0 to eeprom@0
8d3a3fc961d4 ARM: dts: lpc3250-ea3250: add key- prefix for gpio-keys
d7397e8437a3 ARM: dts: lpc32xx: remove usb bus and elevate all children nodes
5eb1ee981504 dt-bindings: clock: gcc-msm8917: Add missing MDSS reset
7f914b108e76 dt-bindings: phy: qcom,snps-eusb2-repeater: Add squelch param update
eea24368accb dt-bindings: phy: samsung,usb3-drd-phy: add power-domains
bcad7586c788 dt-bindings: phy: samsung,ufs-phy: add power-domains
597ea40a76ae riscv: dts: sophgo: cv180x: fix USB dwc2 FIFO sizes
82844859906d riscv: dts: spacemit: PCIe and PHY-related updates
4528d80729b6 riscv: dts: spacemit: Add a PCIe regulator
b1f43a24fb20 dt-bindings: phy: qcom,snps-eusb2-repeater: Add SMB2370 compatible
5dcfc273efb3 dt-bindings: phy: qcom-m31-eusb2: Add Glymur compatible
060d5204040d dt-bindings: phy: qcom,qmp-usb: Add Glymur USB UNI PHY compatible
84efb1e46493 dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Glymur compatible
811070d10e20 dt-bindings: phy: lynx-28g: permit lane OF PHY providers
e716226b983b dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo ssphy
b07e2e09fd23 dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo hsphy
083f077a2b17 dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 HS phy compatible
a9d698d40a9c dt-bindings: phy: Add Apple Type-C PHY
faf30921471d dt-bindings: phy: Add QMP USB3+DP PHY for QCS615
1a150e32de4a dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1046
65b515887eae dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Kaanapali compatible
f6d21ccdb27e dt-bindings: phy: spacemit: Introduce PCIe PHY
b7bd9e297bcd dt-bindings: phy: spacemit: Add SpacemiT PCIe/combo PHY
640dd142b842 dt-bindings: phy: mediatek,hdmi-phy: Document extra clocks for MT8195
41ed45d831cc dt-bindings: phy: mediatek,hdmi-phy: Add support for MT8188 SoC
b7fffd6e649e dt-bindings: phy: mediatek,hdmi-phy: Fix clock output names for MT8195
5a6e565b06a3 dt-bindings: phy: renesas,rzg3e-usb3-phy: Add RZ/V2H(P) and RZ/V2N support
d568354c566c dt-bindings: PCI: Add ASPEED PCIe RC support
5f02e7e1f2a1 arm64: dts: allwinner: t527: orangepi-4a: Enable SPI-NOR flash
c9e70c9d70e7 arm64: dts: allwinner: sun55i: Add SPI controllers
b12e9e62106b dt-bindings: usb: dwc3: Add Google Tensor G5 DWC3
018c8aea1016 dt-bindings: PCI: pci-imx6: Add external reference clock input
3d35ea1e2ed3 dt-bindings: PCI: dwc: Add external reference clock input
704b4787797c dt-bindings: dma: Update ADMA bindings for tegra264
a528e85719be dt-bindings: dma: qcom,gpi: Document GPI DMA engine for Kaanapali and Glymur SoCs
878e36b07992 dt-bindings: dma: mediatek,uart-dma: Support all SoC generations
f45d6fde6cbd dt-bindings: dma: mediatek,uart-dma: Deprecate mediatek,dma-33bits
8f55e05a74a1 dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible
2eb7fe5323ab dt-bindings: serial: 8250: add SpacemiT K3 UART compatible
4fe4f5ca30b4 dt-bindings: soundwire: qcom: Add SoundWire v2.2.0 compatible
fbc706fb5108 arm64: dts: rockchip: Add support for CM5 IO carrier
062bfe1397e9 arm64: dts: rockchip: Add rk3588 based Radxa CM5
f95977b0c89a dt-bindings: arm: rockchip: Add Radxa CM5 IO board
b800c6b8a524 arm64: dts: rockchip: Fix Bluetooth on the RockPro64 board
351b6d4535a3 arm64: dts: rockchip: Correctly describe the ethernet phy on rk3368-lion
e005a6a6a483 arm64: dts: rockchip: add mdio subnode to gmac on rk3368
fea9c338acb6 arm64: dts: rockchip: add gmac reset property to rk3368
8b02f4f94875 arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576
8565a1b32b70 arm64: dts: rockchip: Add EEPROMs for Radxa rk35xx boards
2316ac21f151 arm64: dts: rockchip: Add EEPROMs for Radxa ROCK 4 boards
1a397cae6d40 arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1
0580a73b73b5 arm64: dts: rockchip: enable saradc for ArmSoM Sige5
2283d2ef65a2 arm64: dts: rockchip: fix hp-det pin for ArmSoM Sige5
de6ba2504f41 arm64: dts: rockchip: remove rtc regulator for ArmSoM Sige5
14f6e356e5b6 arm64: dts: exynos: gs101: add samsung,sysreg property to CMU nodes
ce643d4bfeb7 dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required
b4fd7c4c07a9 arm64: dts: apm: Drop "dma" device_type
63e0adf9b981 arm64: dts: apm: Add "reg" to "syscon-reboot" and "syscon-poweroff"
daad4f62b2b8 arm64: dts: apm: Use recommended i2c node names
52f4e21d542a arm64: dts: apm/shadowcat: More clock clean-ups
c8dd6502b734 ARM: dts: vexpress/v2m-rs1: Use documented arm,vexpress,config-bus child node names
b616a8da152b arm64: dts: cavium: Drop thunder2
63d6abf9c58b arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"
56c2fd6d1110 arm64: dts: toshiba: Use recommended node names
9e34a4ebc868 arm64: dts: sprd: Use recommended node names
65c0c408742a arm64: dts: lg: Use recommended simple-bus node name
5bf46036b630 Add Richtek RT8092 support
07fbf0c472b7 dt-bindings: trivial-devices: add MEMSIC 3-axis magnetometer
09798c6c1e79 dt-bindings: iio: adc: Add TI ADS1018/ADS1118
50d0d702a0e7 arm64: dts: exynosautov920: add CMU_MFD clock DT nodes
64be690333c9 dt-bindings: clock: exynosautov920: add MFD clock definitions
26b539517189 dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI
87946bb208d2 dt-bindings: iio: pressure: add honeywell,abp2030pa
b0874cc0cb01 dt-bindings: adc: ad9467: add support for ad9211
ae9b78f3b0f6 dt-bindings: iio: adc: Allow interrupts property for AST2600
38d4132cff68 dt-bindings: iio: amplifiers: add adl8113
732bb830616b dt-bindings: iio: frequency: adf4377: add clk provider
0c7fa39fd1d9 dt-bindings: iio: adc: Add the NXP SAR ADC for s32g2/3 platforms
7feadcfcf024 bindings: iio: adc: Add bindings for TI ADS131M0x ADCs
2a35d3e2047c riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite eMMC board
7d4b65c97dc7 riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board
ff4ff1c946da dt-bindings: riscv: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board
0f73f72f1047 riscv: dts: microchip: convert clock and reset to use syscon
37c111e32113 riscv: dts: microchip: fix mailbox description
beaed6606d0d riscv: dts: spacemit: Define the P1 PMIC regulators for Milk-V Jupiter
ec6196767c82 riscv: dts: spacemit: Define fixed regulators for Milk-V Jupiter
ee403823f721 riscv: dts: spacemit: Enable i2c8 adapter for Milk-V Jupiter
15c7d2ad67b7 dt-bindings: arm: add CTCU device for monaco
8ffd14a98368 regulator: dt-bindings: rt5739: Add compatible for rt8092
fbe3420b01ce dt-bindings: crypto: qcom,prng: document x1e80100
dd856b778007 dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock
4b6c9d1fcf45 dt-bindings: memory: SDRAM channel: standardise node name
88fb21f0ef05 dt-bindings: memory: add DDR4 channel compatible
9c419da2b200 dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel
6df6c46201b7 dt-bindings: memory: introduce DDR4
0382002144ff dt-bindings: memory: factorise LPDDR props into SDRAM props
db9dced71118 arm64: dts: qcom: kaanapali: Add base QRD board
f7ca89348e89 arm64: dts: qcom: kaanapali: Add base MTP board
164f7fd40b0a arm64: dts: qcom: Introduce Kaanapali SoC
60c72b6368ad dt-bindings: gpio-mmio: Add compatible string for opencores,gpio
f41679bfdea2 dt-binding: Update oss email address for Coresight documents
68c9fde54b6f dt-bindings: gpio: gpio-pca95xx: Add tcal6408 and tcal6416
f4011c42cddc spi: atcspi200: Add support for Andes ATCSPI200 SPI
af22e45e02bd Add support for NXP XSPI
334b71418b40 dt-bindings: sram: Document qcom,kaanapali-imem and its child node
93a34c934bcb dt-bindings: interrupt-controller: qcom,pdc: Document Kaanapali Power Domain Controller
9c6317967505 arm64: dts: qcom: glymur: Add header file for IPCC physical client IDs
3dbd10723da9 arm64: dts: qcom: kaanapali: Add header file for IPCC physical client IDs
359dc79529e1 dt-bindings: arm: qcom: Document Kaanapali SoC and its reference boards
1c3b4ebde5d9 dt-bindings: kbuild: Support single binding targets
0bb6369246cd dt-bindings: serial: renesas,rsci: Document RZ/G3E support
cc984eb3ac47 dt-bindings: usb: ehci/ohci: Allow "dma-coherent"
fda6a3af2717 dt-bindings: usb: aspeed,usb-vhub: Add ast2700 support
77288092704a spi: dt-bindings: Add support for ATCSPI200 SPI controller
850fc833f4de spi: dt-bindings: nxp,imx94-xspi: Document imx94 xspi
e428cef4e510 dt-bindings: eeprom: at24: Add compatible for Giantec GT24P64A
939e665c98f4 dt-bindings: eeprom: at24: Add compatible for Belling BL24C04A/BL24C16F
b2ddd1407bd8 arm64: dts: nuvoton: npcm845: Minor whitespace cleanup
369ea92a0ba8 ARM: dts: aspeed: bletchley: Fix ADC vref property names
6c97c266b7e2 ARM: dts: aspeed: bletchley: Remove unused i2c13 property
d5bef6c517be ARM: dts: aspeed: bletchley: Remove unused pca9539 properties
503ba8c17489 ARM: dts: aspeed: bletchley: Fix SPI GPIO property names
b0fc72d0fd4f ARM: dts: aspeed: bletchley: Use generic node names
69f6a0439d1c arm64: dts: qcom: Add dts for Medion SPRCHRGD 14 S1
902f98ec4c7e dt-bindings: arm: qcom: Add Medion SPRCHRGD device
7002cccbca31 dt-bindings: vendor-prefixes: Add Medion AG
5db94f229c4d dt-bindings: arm: qcom: Add TUXEDO Computers device
a4260e9a499e dt-bindings: vendor-prefixes: Add prefix for TUXEDO Computers GmbH
de01f35c5a1c arm64: dts: qcom: x1e80100: Add crypto engine
b446b4ec2c90 dt-bindings: cache: qcom,llcc: Document Glymur LLCC block
742958230ddd dt-bindings: dma: rz-dmac: Document RZ/V2N SoC support
0a67d1f7abec arm64: dts: apple: t8103,t60xx,t8112: Add SMC RTC node
175e8d07552c arm64: dts: ti: am62p-verdin: Fix SD regulator startup delay
b69aee46fbd4 arm64: dts: ti: k3-am69-aquila-clover: Fix USB-C Sink PDO
a06a6c103830 arm64: dts: ti: k3-am69-aquila-dev: Fix USB-C Sink PDO
4c6ed1fbc802 arm64: dts: ti: k3-am62(a)-phycore-som: Add bootphase tag to phy_gmii_sel
3643b0cdb050 arm64: dts: ti: k3-am62a-phycore-som: Add bootphase tag to cpsw_mac_syscon
360af8e29a09 arm64: dts: ti: k3-am62-phycore-som: Add bootphase tag to cpsw_mac_syscon
5cf13d2361a0 dt-bindings: display: simple: Add HannStar HSD156JUW2
9de19890d586 dt-bindings: panel: sw43408: adjust to reflect the DDIC and panel used
3530205b3d2d dt-bindings: display: panel: document Samsung LTL106HL02 MIPI DSI panel
c4eeea27c179 dt-bindings: panel: s6e3fc2x01: Sort and remove unnecessary properties
9545482937e1 dt-bindings: display: bridge: renesas,dsi: Document RZ/V2H(P) and RZ/V2N
acafbf556c58 arm64: dts: exynos: gs101: remove syscon compatible from pmu node
dd8272ff3d82 dt-bindings: soc: samsung: exynos-pmu: remove syscon for google,gs101-pmu
1687936de261 arm64: dts: exynos: gs101: add TRNG node
287bd1d9dc3d dt-bindings: rng: add google,gs101-trng compatible
df87acc301ed arm64: dts: toshiba: tmpv7708: Align node names with DT bindings
3f0637678adc dt-bindings: input: touchscreen: sitronix,st1232: Add Sitronix ST1624
71b378318155 arm64: dts: renesas: r9a09g087: Add ICU support
4d00bb62d078 arm64: dts: renesas: r9a09g077: Add ICU support
e93a0c58d942 dt-bindings: interrupt-controller: Document RZ/{T2H,N2H} ICU
19045e6732f7 dt-bindings: interrupt-controller: renesas,rzv2h-icu: Document RZ/V2N SoC
ece61d4846f5 dt-bindings: display: sitronix,st7920: Add DT schema
32d3ab0dc516 Revert "arm64: zynqmp: Add an OP-TEE node to the device tree"
f13b85a2d2b1 dt-bindings: samsung: exynos-pmu: Add compatible for ARTPEC-9 SoC
50cf13d13467 dt-bindings: crypto: Document aspeed,ahbc property for Aspeed ACRY
1f24cf665d53 dt-bindings: bus: aspeed: Require syscon for AST2600 AHB controller
ee4930d07cd8 spi: dt-bindings: st,stm32-spi: add 'power-domains' property
7087598fc395 dt-bindings: display: rockchip: dw-hdmi: Add compatible for RK3368 HDMI
611d4c06a52b dt-bindings: display: sitronix,st7571: add example for SPI
1de14357fd3e arm64: dts: rockchip: Add accelerometer sensor to Pinephone Pro
7a509b4cc03a arm64: dts: rockchip: Enable SPDIF audio on Rock 5 ITX
42cd507a2b60 arm64: dts: rockchip: Add overlay for the PCIe slot on RK3576 EVB1
a1d0aa733c95 ARM: dts: rockchip: Add vdec node for RK3288
8118230e468a Merge tag 'renesas-r9a09g077-dt-binding-defs-tag5' into renesas-clk-for-v6.20
8fca00ce3ded arm64: dts: renesas: r9a09g047e57-smarc: Enable USB3HOST
8417721829a8 arm64: dts: renesas: r9a09g047: Add USB3 PHY/Host nodes
69eed72c5fb4 arm64: dts: morello: Add CMN PMU
7b95e57087a3 dt-bindings: clock: add video clock indices for Amlogic S4 SoC
31830fbb34cd dt-bindings: clock: add Amlogic T7 peripherals clock controller
ef0b78ba80e2 dt-bindings: clock: add Amlogic T7 SCMI clock controller
72e85902bc50 dt-bindings: clock: add Amlogic T7 PLL clock controller
5398a2b25b76 arm64: dts: xilinx: fix zynqmp opp-table-cpu
20e8d5272d35 dt-bindings: watchdog: xlnx,versal-wwdt: Add optional power-domains property
3a2f82d65ea4 arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net
85688947778b dt-bindings: remoteproc: Fix dead link to Keystone DSP GPIO binding
ec50d9b41883 spi: dt-bindings: renesas,rzv2h-rspi: document optional support for DMA
0a1bf0f89da3 regulator: dt-bindings: Add MAX77675 regulator
58a97f574841 ARM: dts: aspeed: g6: Drop clocks property from arm,armv7-timer
b58c36147430 ARM: dts: aspeed: ast2600-evb: Tidy up A0 work-around for UART5
a6437be91962 ARM: dts: aspeed: g6: Drop unspecified aspeed,ast2600-udma node
1c058c935dba ARM: dts: aspeed: Drop syscon compatible from EDAC in g6 dtsi
0eba8928dd9b ARM: dts: aspeed: Use specified wp-inverted property for AST2600 EVB
e58b7c23f328 ARM: dts: aspeed: Remove sdhci-drive-type property from AST2600 EVB
d977cfd7e272 ARM: dts: aspeed: Add NVIDIA MSX4 HPM
7af30bbc499b dt-bindings: arm: aspeed: Add NVIDIA MSX4 board
c7ad566648eb ARM: dts: aspeed: clemente: move hdd_led to its own gpio-leds group
1ab4552ceea7 ARM: dts: aspeed: clemente: add gpio line name to io expander
9dd33e615ac1 ARM: dts: aspeed: santabarbara: Enable ipmb device for OCP debug card
0243b6d087e0 ARM: dts: aspeed: santabarbara: Add swb IO expander and gpio line names
5392ed835618 ARM: dts: aspeed: clemente: Add EEPROMs for boot and data drive FRUs
7cae5ebf72c1 ARM: dts: aspeed: harma: add fanboard presence sgpio
e1000bea7203 ARM: dts: aspeed: bletchley: remove WDTRST1 assertion from wdt1
17d42cb3766f Merge tag 'ib-mfd-input-power-regulator-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next
7f5b334c61b7 Merge tag 'v6.18' into next
69c26d595c11 dt-bindings: clock: renesas,r9a09g077/87: Add XSPI0/1 IDs
7327e6ab013e arm64: dts: broadcom: bcm2712: Add watchdog DT node
2bdb3ae4c5fb arm64: dts: broadcom: bcm2712: Enable RNG

git-subtree-dir: dts/upstream
git-subtree-split: 0f7b6a4fa8c5f6f5aa14c31aa7918e3f9d70688c
2026-04-20 09:28:25 -06:00
Tom Rini
e3405917a1 Merge tag 'mediatek-for-master-2026-04-17' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
This is the second wave of feature enablement for this merge window. We
still have a bit more waiting on review, so a 3rd wave expected to pick
those up when ready.

- Fix some wrong pinmux registers on MT7981.
- Fix a clock regression that affects MT798x.
- Add UFS support on Genio 520/720/1200.
  - Includes a number of fixes and improvements to MediaTek UFS and UFS PHY drivers.
- Add USB support on Genio 520/720.
  - Includes a new USB PHY driver for MediaTek XS-PHY.
2026-04-18 08:19:00 -06:00
David Lechner
a687e71a58 configs: mediatek: mt8189: enable USB support
Add config options required for USB support on TARGET_MT8189.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260401-mtk-mt8189-usb-v1-3-a4bf951aa8ad@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
32dd41059c arm: dts: mediatek: add USB/PHY nodes for Genio 520/720
Add USB and PHY nodes for USB support on Genio 520/720 EVKs.

The devicetree hasn't been accepted upstream yet, so this comes from the
latest submission [1]. Some power domain and reset references have been
left out to minimize what we need to add at this time since U-Boot
doesn't need them.

Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1]
Link: https://patch.msgid.link/20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
82fadfe53f phy: mediatek: new XS-PHY driver
Add a new driver for the Mediatek XS-PHY. This is found on some newer
Mediatek SoCs.

Upstream devicetree bindings already exist. MAINTAINERS is already
covered by drivers/phy/phy-mtk-*.

Link: https://patch.msgid.link/20260401-mtk-mt8189-usb-v1-1-a4bf951aa8ad@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
c09e994585 config: mediatek: add UFS defconfigs for Genio 520/720 EVKs
Add variants of the Genio 520/720 EVK defconfigs for UFS boot. These
have a different devicetree when the boot DIP switches/jumpers on the
EVK are set for UFS instead of eMMC. These also enable UFS and related
drivers that aren't enabled in the eMMC defconfigs since UFS is
disconnected in that case.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-6-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
58a60707ae arm: dts: mediatek: add UFS variant of Genio 520/720 EVK
Add a devicetree overlay and UFS variants of the Genio 520 and Genio 720
EVK devicetree targets. There are dip switches and jumpers on the EVK
that disconnect the eMMC and connect the UFS instead. The overlay
adjusts the devicetree for this.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-5-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
21530890bf arm: dts: mt8189: add UFS nodes
Add UFS nodes to mt8189.dtsi.

This is copied from the proposed upstream patch [1].

Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1]
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-4-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
0ede487026 clk: mediatek: mt8189: add UFS clocks
Add some clocks required for UFS on MT8189 targets.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-3-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
7a3b13460b ufs: mediatek: clean up zero terminator
Remove spurious blank line and trailing comma of the zero terminator at
the end of the devicetree compatible list.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-2-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner
6dbb7af1f4 ufs: ufs-mediatek: add mt8183-ufshci compatible
Add a new compatible match for mediatek,mt8183-ufshci.

This compatible is already defined in upstream devicetree bindings.

Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-1-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
a69b77da48 configs: add new defconfig for mt8395_genio_1200_evk_ufs
This new defconfig is based on mt8395_genio_1200_evk_defconfig, with
additional configs for UFS.  In order to avoid duplicating defconfig, we
introduce configs/mt8195.config.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-9-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com> [moved PMIC enable to mt8195.config]
2026-04-17 17:05:54 -05:00
Julien Stephan
c4792df264 drivers: ufs: ufs-mediatek: add MT8195 compatible
Add MT8195 compatible string.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-8-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
a694f49c49 drivers: ufs: ufs-mediatek: implement clocking
Implement clocking.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-7-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
ac6e41ee6e drivers: ufs: ufs-mediatek: fix phy handling
Currently mphy is declared as a pointer inside ufs_mtk_host struct, but
it is never initialized.

Fix this by using a struct phy directly in ufs_mtk_host struct instead
of a struct phy*. Update all call to mphy accordingly.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-6-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
e13229b66a drivers: phy: phy-mtk-ufs: do not alloc priv with priv_auto
When priv_auto is specified, we should not manually alloc memory for
priv data.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-5-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
ebb222e8c5 drivers: phy: phy-mtk-ufs: disable clk in power_off
Disable clocks in power_off(). Also define ufs_mtk_phy_set_inactive()
helper function to keep consistency with power_on() and
ufs_mtk_phy_set_active().

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-4-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
ad2422cc05 drivers: phy: phy-mtk-ufs: use clk_bulk functions
simply the driver by using clk_bulk functions

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-3-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
51cf6ad965 drivers: phy: phy-mtk-ufs: use tab to indent defines
Use tabs instead of spaces to indent defines

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-2-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien Stephan
b7835b4879 drivers: phy: phy-mtk-ufs: cleanup headers
Remove unneeded headers and sort them alphabetically

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-1-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam Shih
21cb317a1b clk: mediatek: remove redundant forward declarations
The clk_ops structures (mtk_clk_apmixedsys_ops, mtk_clk_topckgen_ops,
mtk_clk_infrasys_ops) are already declared with extern in clk-mtk.h,
which is included by this file. The forward declarations in clk-mtk.c
are therefore redundant and can be removed.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/e9c95470374cb78254dacfe1d657a26f2f908981.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam Shih
374cb8a288 clk: mediatek: add grandparent variable in mtk_find_parent_rate()
Add grandparent device variable in mtk_find_parent_rate() to allow
the grandparent device being reused instead of calling
dev_get_parent(priv->parent) multiple times.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/726ccc71593f6c224c13142a0bd4a9f6f0f81445.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam Shih
ad3ea453d8 clk: mediatek: fix parent rate lookup for fixed PLL clocks
The refactoring in commit 00d0ff7f81 ("clk: mediatek: refactor parent
rate lookup functions") introduced a regression where fixed PLL clocks
using mtk_clk_fixed_pll_ops are not properly recognized as valid parents
in the CLK_PARENT_APMIXED case.

Fixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of
mtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the
APMIXED domain. The parent lookup function needs to check for both
driver ops to properly resolve the parent clock device.

Add mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks
in mtk_find_parent_rate() to restore support for fixed PLL parent clocks.

Fixes: 00d0ff7f81 ("clk: mediatek: refactor parent rate lookup functions")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:04:56 -05:00
Weijie Gao
5576522219 pinctrl: mediatek: mt7981: fix some register offsets and fields
This patch fixes mt7981 pin register offsets and field definitions.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/20260410082332.102522-1-weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 15:11:58 -05:00
Philippe Reynes
30429c8bd2 sandbox: enable FIT_SIGNATURE
Since commit d09256283f ("FIT: Image pre-load signature
support must select not depends on FIT_SIGNATURE")
FIT_SIGNATURE is disabled on sandbox. But this config
is used on many fit signature tests. So FIT_SIGNATURE should
be enabled on sandbox.

Fixes: d09256283f ("FIT: Image pre-load signature support must select not depends on FIT_SIGNATURE")
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 12:29:16 -06:00
Tom Rini
56905deb20 Merge branch 'master' of git://source.denx.de/u-boot-usb
- dwc3 memory leak fixes
2026-04-17 10:12:44 -06:00
Tom Rini
7decfc6619 Merge tag 'efi-2026-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2026-07-rc1

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29844

Documentation:

* correct title of CONTRIBUTE.rst
* Fix fdt resize argument in fdt_overlays.rst
* api: bootcount: correct bootcount description
* binman: Add Sphinx extension to auto-generate entry and bintool docs
* binman: Remove pre-generated entries.rst and bintools.rst
*  j784s4_evm: Automate BAR address lookup for PCIe Boot

UEFI:

* efi_var_sf: Do not fail on blank SPI Flash
* Allow disabling ANSI console queries via Kconfig
* bootstd: efi: Handle prior-stage FDT in network path
* event: Check return value from event_notify_null()
* event: Introduce EVT_POST_PREBOOT event
* fwu: Move boottime checks to EVT_POST_PREBOOT
2026-04-17 10:12:18 -06:00
Gurumoorthy Santhakumar
884b10e86a usb: dwc3: core: fix memory leaks in event buffer cleanup
In dwc3_free_one_event_buffer(), only the DMA buffer (evt->buf) was
being freed via dma_free_coherent(), but the evt structure itself was
never explicitly freed, causing a memory leak.

In dwc3_free_event_buffers(), the ev_buffs pointer array allocated
with memalign() was never freed after iterating and releasing all
individual event buffers, causing another memory leak.

Fix both leaks by freeing the evt struct in
dwc3_free_one_event_buffer() and freeing dwc->ev_buffs in
dwc3_free_event_buffers() after all entries have been released.

Signed-off-by: Gurumoorthy Santhakumar <gurumoorthy.santhakumar@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-04-17 15:57:19 +02:00
Siddharth Vadapalli
98d1d3227e doc: board: ti: j784s4_evm: Automate BAR address lookup for PCIe Boot
When the J784S4-EVM is configured for PCIe Boot, the Bootloaders are to
be written to the address specified by particular BARs. The existing
documentation hard-codes the address corresponding to the BAR under the
assumption that the Root-Complex transferring the Bootloaders is also
a J784S4-EVM. The Root-Complex assigns addresses to the BARs depending
on the currently available set of free system addresses. Since the free
system addresses vary with the Root-Complex being used, instead of
hard-coding the BARs, automate the process of identifying the appropriate
BAR in the form of a command to be run by the user on the Root-Complex.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-04-17 08:16:03 +02:00
Heinrich Schuchardt
1659cd1f45 doc: correct title of CONTRIBUTE.rst
The title should be 'Contributing' as this is not the 'Overview' of the
U-Boot project.

The top title should be H1, the other titles H2.

Fixes: 0290cec364 ("Add an initial CONTRIBUTE.rst")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:14:15 +02:00
Michael Opdenacker
47ae8e77f9 doc: api: bootcount: correct bootcount description
The bootcount variable is only incremented
when the upgrade_variable is non-zero,
as implemented in drivers/bootcount/bootcount_env.c

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:13:04 +02:00
Simon Glass
ee4bcfc659 bootstd: efi: Handle prior-stage FDT in network path
When CONFIG_OF_HAS_PRIOR_STAGE is enabled and fdtfile is not set,
efi_get_distro_fdt_name() returns -EALREADY to indicate the prior-stage
FDT should be used. The block-device EFI path handles this by setting
BOOTFLOWF_USE_PRIOR_FDT, but the network path treats it as an error,
causing the bootflow to stay in 'base' state with a -EALREADY error.

This also means fdt_addr_r is required even when no FDT download is
needed, giving a spurious  -EINVAL error.

Fix this by calling efi_get_distro_fdt_name() before checking
fdt_addr_r, and handling -EALREADY by setting BOOTFLOWF_USE_PRIOR_FDT
to skip the FDT download, matching the block-device behaviour.

THere is no test for this at present, since sandbox does not enable
CONFIG_OF_HAS_PRIOR_STAGE and lacks infra for network-based EFI boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:09:41 +02:00
Matwey V. Kornilov
586e4f340a doc: Fix fdt resize argument in fdt_overlays.rst
The argument is parsed as hexadecimal number.

Link: https://lists.denx.de/pipermail/u-boot/2026-April/613799.html

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:06:23 +02:00
Michal Simek
0c3eb097d9 efi_loader: Allow disabling ANSI console queries via Kconfig
Commit 4cb7243640 ("efi_loader: Disable ANSI output for tests")
introduced efi_console_set_ansi() to suppress ANSI escape sequences
during unit tests. Extend this mechanism to be configurable via a new
Kconfig option CONFIG_EFI_CONSOLE_DISABLE_ANSI.

When CONFIG_EFI_CONSOLE_DISABLE_ANSI is enabled,
efi_console_set_ansi(false) is called at the start of
efi_setup_console_size(). This prevents query_console_serial() from
sending ANSI escape sequences to the terminal, using default 25x80
dimensions instead. This is useful for platforms where the serial
console cannot handle ANSI queries.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:04:43 +02:00
Michal Simek
353166279c fwu: Move boottime checks to EVT_POST_PREBOOT
Switch fwu_boottime_checks() from EVT_MAIN_LOOP to EVT_POST_PREBOOT
because there is no reason to call FWU so early. FWU triggers EFI
stack initialization before all devices are visible which prevents
the EFI stack from scanning these devices and adding them to EFI
variables.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:02:42 +02:00
Michal Simek
fc36b91243 event: Introduce EVT_POST_PREBOOT event
Add a new EVT_POST_PREBOOT event type which is fired in main_loop()
after the preboot command has been executed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-04-17 08:02:42 +02:00
Michal Simek
583efb5040 event: Check return value from event_notify_null()
event_notify_null() returns int but its return value is not
checked in run_main_loop() and in fwu_mdata tests.
Add proper error checking to all unchecked call sites.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-04-17 08:02:42 +02:00
Michal Simek
57eae396ec efi_loader: efi_var_sf: Do not fail on blank SPI Flash
When SPI Flash is blank (first boot or erased), efi_var_from_storage()
returns EFI_DEVICE_ERROR because efi_var_restore() fails on invalid
magic/CRC. This prevents the EFI subsystem from initializing.

Check the magic value before attempting to restore variables. If
the magic does not match EFI_VAR_FILE_MAGIC, treat it as an empty
store and return EFI_SUCCESS, matching the behavior of the file-based
efi_var_file.c which deliberately returns EFI_SUCCESS on missing or
corrupted variable files to avoid blocking the boot process.

Similarly, if the magic matches but efi_var_restore() fails (e.g.
corrupted CRC), log the error but still return EFI_SUCCESS.

Suggested-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 07:40:17 +02:00
Simon Glass
090a7eb9cf binman: Remove pre-generated entries.rst and bintools.rst
These files are now auto-generated by the binman_docs Sphinx extension
during the doc build, so the committed copies and their symlinks in
doc/develop/package/ are no longer needed.

Update binman.rst to reference the Sphinx extension instead of the
manual generation commands.

Signed-off-by: Simon Glass <sjg@chromium.org>

Rebased to apply file deletions cleanly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 07:26:31 +02:00
Simon Glass
1ab7f4e2ed binman: Add Sphinx extension to auto-generate entry and bintool docs
Currently entries.rst and bintools.rst are generated manually by running
'binman entry-docs' and 'binman bintool-docs', then committed to the
repo. This means the docs can drift out of date when docstrings are
updated but the RST files are not regenerated.

Add a Sphinx extension (binman_docs) that provides two custom
directives:

    .. binman-entry-docs::
    .. binman-bintool-docs::

These parse the etype and btool source files using the ast module to
extract class docstrings, then insert the documentation directly into
the document tree. This avoids the need to import binman modules (which
have dependencies like libfdt that are not available in the ReadTheDocs
build environment) and avoids writing any intermediate files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-17 07:12:07 +02:00
David Lechner
bc6c4ee8d4 mtd: spi-nor-ids: add flags for mx25u12835f
Add some capability flags for mx25u12835f.

In particular, we are interested in using the lock feature. According to
the datasheet, dual/quad read is also supported.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-15 14:45:18 -06:00
Tom Rini
301d2d3273 spi: Correct dependencies for SPI_FLASH_SST
The SPI_FLASH_SST functionality is a subset of SPI_FLASH_LOCK today, so
express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Flaviu Nistor
3ee5a4c599 mtd: spi-nor: Add is25wx128 and is25lx128 chips
Add is25wx128 and is25lx128 ISSI chips to
spi-nor id table.
Both chips have a size of 16MB but is25wx128
is the 1.8V version and is25lx128 is the 3v
version.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Chen Huei Lok
3e33474a0c mtd: spi-nor-ids: Add support for IS25WP01GG SPI NOR flash
Add a new entry for the IS25WP01GG SPI NOR flash (ID 0x9d7021,
64KB sectors, 2KB page size) with 4K sectors, dual and quad read
support. This flash is used and tested on N5X boards.

Datasheet :
https://www.issi.com/WW/pdf/25LP-WP01GG.pdf

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 14:45:18 -06:00
Flaviu Nistor
3009978976 mtd: spi-nor: Add gd25lx128j chip
Add gd25lx128j GIGADEVICE chip to spi-nor id table.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Jeffrey Yu
3d623b9d39 mtd: spi-nor: ids: add ISSI IS25LP*J/*MJ/*E and IS25WP*J/*MJ device IDs
Add JEDEC ID table entries for additional ISSI SPI-NOR devices.

These parts previously not yet supported.
With these entries, U-Boot can match the device by JEDEC ID
and use the existing ISSI SPI-NOR device handling.

Newly added devices include:
  - IS25LP512MJ  (JEDEC 0x9d6020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25WP512MJ  (JEDEC 0x9d7020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25LP010E   (JEDEC 0x9d4011)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP020E   (JEDEC 0x9d4012)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP040E   (JEDEC 0x9d4013)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP01GJ   (JEDEC 0x9d6021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25LP02GG   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25LP02GJ   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf
  - IS25WP01GG   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GG.pdf
  - IS25WP01GJ   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25WJ128F   (JEDEC 0x9d7118)
    https://www.issi.com/WW/pdf/25WJ128F.pdf
  - IS25WP02GG   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25WP02GJ   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf

Signed-off-by: jeffrey yu <jeyu@issi.com>
[trini: Fix spacing issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Chen Huei Lok
39d1a96d71 spi: cadence_xspi: enable automatic platform data allocation
Enable automatic allocation of platform data for the Cadence XSPI
controller by setting .plat_auto.

Without this, dev_get_plat() may return invalid or uninitialized
platform data when multiple XSPI controllers are present, leading
to incorrect IOBASE/SDMABASE/AUXBASE values and causing SPI flash
probe failures.

Setting .plat_auto ensures each controller instance receives a
properly sized cdns_xspi_plat structure, allowing SF probe to work
correctly.

Tested on an Altera Simics platform with multiple XSPI controllers.

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 13:36:44 -06:00
Ssunk
c56db9b4a4 mtd: spi-nor: Add Dosilicon DS25M/Q series support
Add support for dosilicon ds25m4cb, ds25m4dn, ds25q4cb, ds25q4dn

Datasheets:
ds25m4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4CB-XXXXX_Rev04.pdf
ds25m4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4DN-XXXXX_Rev03.pdf
ds25q4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4CB-XXXXX_Rev03.pdf
ds25q4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4DN-XXXXX_Rev01.pdf

Signed-off-by: Ssunk <ssunkkan@gmail.com>
[trini: Adjust spacing]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 13:36:43 -06:00
Ssunk
fba2419269 mtd: spi: spi-nor-ids: Add support for XMC XM25QH01D
Add support for XMC XM25QH01D SPI NOR flash.

Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf
Link: https://lore.kernel.org/u-boot/20250827105854.10746-1-ssunkkan@gmail.com/
2026-04-15 10:36:15 -06:00
Ssunk
b6dbbfa71e mtd: spi-nor: ids: Add support for Puyasemi flash chips
Add JEDEC IDs for Puyasemi PY25F512HB, PY25F01GHB, PY25F512LC,
and PY25F01GLC flash parts.

Datasheets:
PY25F512HB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F512HB_Datasheet_V1.2.pdf
PY25F01GHB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F01GHB_Datasheet_V1.1.pdf
PY25F512LC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512LC_Datasheet_V1.3.pdf
PY25F01GLC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F01GLC_Datasheet_V1.0.pdf

Reviewed-by: Anshul Dalal <anshuld@ti.com>
Signed-off-by: Ssunk <ssunkkan@gmail.com>
2026-04-15 10:35:58 -06:00
Heinrich Schuchardt
70fd0c3bb7 x86: there is no CONFIG_UBOOT_ROMSIZE_KB_12288
Remove the reference to the non-existent symbol. As ROMs typically
come as powers of two there seems no need for this value.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 64542f4616 ("x86: Make ROM_SIZE configurable in Kconfig")
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-14 14:21:55 -06:00
Heinrich Schuchardt
dc8f56e008 x86/apollolake: don't select non-existent INTEL_PMC
Symbol CONFIG_INTEL_PMC does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 1fc5419314 ("x86: apl: Add Kconfig and Makefile")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-04-14 14:21:48 -06:00
Tom Rini
8f6a5932aa Merge patch series "serial: goldfish: Add debug uart support"
This series from Daniel Palmer <daniel@0x0f.com> improves debug UART
support on QEMU on M68K by adding debug uart support to the serial
driver.

Link: https://lore.kernel.org/r/20260309105110.672832-1-daniel@0x0f.com
2026-04-14 13:25:32 -06:00
Daniel Palmer
c15a08b730 doc: board: virt: m68k: Detail how to use debug uart
Add a paragraph to explain how to get the address of the goldfish
tty and use it as the debug uart. I think the address is actually
fixed right now but it might change in the future.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2026-04-14 13:25:13 -06:00
Daniel Palmer
2df4926ca4 m68k: m680x0: Initialise the debug uart
Once the stack is ready we can init the debug uart to help
with debugging so do that.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
2026-04-14 13:25:13 -06:00
Daniel Palmer
cbfb9b3f22 serial: goldfish: Add debug uart support
Add debug support for the goldfish tty so it can be used for
early debugging. This will be really useful when adding support
for relocation to the m68k qemu virt machine.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Tested-by: Kuan-Wei Chiu <visitorckw@gmail.com>
2026-04-14 13:25:13 -06:00
Tom Rini
5a998ab007 Merge patch series "A few linker-list fixes"
Simon Glass <sjg@chromium.org> says:

This series includes two patches to fix alignment problems with linker
lists. In certain circumstances these can cause the drivers list to be
non-contiguous, causing crashes, hangs, etc.

Link: https://lore.kernel.org/r/20260321134626.516665-1-sjg@chromium.org
2026-04-14 11:04:04 -06:00
Simon Glass
a6672a4804 dm: Fix linker list alignment for ll_entry_get()
The extern declaration in ll_entry_get() lacks the __aligned(4)
attribute present in ll_entry_declare(). When the compiler sees an
unaligned extern reference to a linker list entry in the same
compilation unit as its definition, it may increase the section
alignment beyond the expected struct size. This causes gaps in the
linker list array, which the alignment checker reports as failures.

For example, sandbox_dir is both defined and referenced via
DM_DRIVER_GET() in sandboxfs.c. The compiler applies 32-byte
alignment to its section instead of the 4-byte alignment from the
definition, creating an 8-byte gap before it in the driver list.

Add __aligned(4) to the extern declaration in ll_entry_get() to
match ll_entry_declare()

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-04-14 11:03:52 -06:00
Simon Glass
f9b5077480 linker_lists: Fix end-marker alignment to prevent padding
Change the alignment of end markers in ll_entry_end() and ll_end_decl()
from __aligned(4) and __aligned(CONFIG_LINKER_LIST_ALIGN) respectively
to __aligned(1).

The linker places zero-size end markers at aligned boundaries based on
what follows them. When the next list's start marker has a high alignment
requirement (e.g., 32 bytes), padding gets inserted before the end
marker. This causes the byte span (end - start) to not be an exact
multiple of the struct size.

The compiler optimises pointer subtraction (end - start) using
magic-number multiplication for division. This optimisation only produces
correct results when the byte span is an exact multiple of the struct
size. With padding, the result is garbage (e.g., -858993444 instead of
15).

By using __aligned(1), the end marker is placed immediately after the
last entry with no padding, ensuring (end - start) equals exactly
(n * sizeof) where n is the number of entries. This makes
ll_entry_count() and direct pointer arithmetic work correctly.

Fixes: 0b2fa98aa5 ("linker_lists: Fix alignment issue")
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-04-14 11:03:52 -06:00
Ngo Luong Thanh Tra
564e180d70 board: toradex: fix tdx-cfg-block prompt buffer overflow
Replace unbounded sprintf() with snprintf() using sizeof(message)
as the bound for all prompt string assignments in
get_cfgblock_interactive(), get_cfgblock_carrier_interactive(),
do_cfgblock_carrier_create() and do_cfgblock_create(). The
previous calls had no size limit and could overflow the
CONFIG_SYS_CBSIZE-sized stack buffer if SYS_CBSIZE was configured
smaller than the longest prompt string (71 bytes).

Fixes: 8b6dc5d394 ("toradex: tdx-cfg-block: Cleanup interactive cfg block creation")
Signed-off-by: Ngo Luong Thanh Tra <S4210155@student.rmit.edu.au>
To: u-boot@lists.denx.de
2026-04-13 17:42:58 -06:00
Ngo Luong Thanh Tra
e228b6a504 board: samsung: fix set_board_info() board_name buffer overflow
Replace unbounded sprintf() with snprintf() using sizeof(info) as
the bound when constructing the board_name string from bdname and
bdtype. The previous call had no size limit and could overflow the
64-byte stack buffer if the concatenated string exceeded 63 bytes.

Fixes: c9c36bf56e ("samsung: misc: use board specific functions to set env board info")
Signed-off-by: Ngo Luong Thanh Tra <S4210155@student.rmit.edu.au>
To: u-boot@lists.denx.de
2026-04-13 17:42:34 -06:00
Hugo Villeneuve
f7bef8f81f config_distro_bootcmd: do not scan boot partitions if distro_bootpart is defined
For some projects, designing the active bootable partition is done by
setting distro_bootpart in the environment instead of changing the bootable
flag on the active partition.

This patch makes it possible to support both models by scanning boot
partitions only if distro_bootpart is not defined in the environment.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
2026-04-13 17:34:48 -06:00
Ngo Luong Thanh Tra
163d939b28 board: nanopi2: fix bd_update_env() cmdline buffer overflow
Replace unbounded strcpy()/sprintf() calls with snprintf() and
check the return value against remaining buffer capacity at each
append step. The previous size guard did not account for
subsequent dpi suffix, remaining bootargs tail, and bootdev
token appends, allowing overflow when those later writes exceed
the remaining space.

Fixes: d1611086e0 ("arm: add support for SoC s5p4418 (cpu) / nanopi2 board")
To: u-boot@lists.denx.de

Signed-off-by: Ngo Luong Thanh Tra <S4210155@student.rmit.edu.au>
Tested-by: Stefan Bosch <stefan_b@posteo.net>
2026-04-13 17:34:48 -06:00
Marek Vasut
b0d731d956 arm: Add ARMv8-M aarch32 support
Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.

Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.

To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Udit Kumar <u-kumar1@ti.com>
2026-04-13 17:34:02 -06:00
Javier Viguera
c8afe949d3 rtc: rv3028: fix PORF flag not being cleared
The current code sets RV3028_STATUS_PORF instead of clearing it, so the
flag remains asserted. Use dm_i2c_reg_clrset() to clear the bit.

Signed-off-by: Javier Viguera <javier.viguera@digi.com>
2026-04-13 15:24:24 -06:00
Tom Rini
e2fa3e570f Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Assorted fixes and tweaks, HUSH parser, preboot env variable, SMC
command enablement, s_init and 32bit/64bit code clean up, DBSC and APMU
remoteproc clean ups, UFS dev_phys_to_bus() remap support and SCIF R-Car
Gen5 support.
2026-04-09 16:34:38 -06:00
Paul HENRYS
2a1bcefce8 tools: u_boot_pylib: ensure all Python modules are installed
Add setuptools package configuration to pyproject.toml so that
u_boot_pylib is installed as a proper Python package without changing
the existing flat directory structure and making sure all modules are
installed.

Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-09 12:17:28 -06:00
Tom Rini
ca17943235 Merge tag 'fsl-qoriq-for-2026.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29808

- Add env variables to assist boot for various LS boards
- Add gpio scmi driver
- Fix setting the function for scmi pinctrl
- Use standard device tree pin muxing format for scmi pinctrl
- Fix protocol version fetch for non-CCF platforms in scmi clk
2026-04-09 12:17:28 -06:00
Chunguang Li
f98f2e2612 ls1043a: add env variables to assist boot
Add LS1043ARDB-specific variables to assist the boot process,
and update the related common and LS1043AQDS settings accordingly.

Signed-off-by: Chunguang Li <chunguang.li_2@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Chunguang Li
3e99d17ab3 lx2160ardb: add env variables to assist boot
Update the console baudrate to 115200 as default.
Also add env variables to assist boot process.

Signed-off-by: Chunguang Li <chunguang.li_2@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Chunguang Li
496504be0b ls1046a: add env variables to assist boot
Add LS1046ARDB-specific variables to assist the boot flow,
and update the related common and other LS1046A board settings
accordingly.

Signed-off-by: Chunguang Li <chunguang.li_2@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Chunguang Li
0cbf30fbbf ls1028ardb: add env variables to assist boot
Add image, extra_bootargs, othbootargs and console_dbg to assist boot.

Signed-off-by: Chunguang Li <chunguang.li_2@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Ioana Ciornei
f0dbde4675 drivers: net: fsl-mc: add the nowait option when applying the DPL
The process through which the MC firmware parses the DPL and initializes
all the requested DPAA2 objects is a complex one which can take quite a
bit of time. For the those circumstances in which a fast boot is
required on DPAA2 based SoCs, add the 'nowait' optional parameter for
the fsl_mc [lazy]apply dpl command.

When this option is used, the Linux kernel fsl-mc bus must wait for
the firmware to finish parsing the DPL before proceeding with probing
all the DPAA2 objects.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Ioana Ciornei
d3c0f53d65 drivers: net: fsl-mc: cleanup the fsl_mc command help text
All the parameters that can be currently passed to the fsl_mc command
are positional arguments which are mandatory. This is not perfectly
clear when reading the help text because of the use of square brackets.

Fix this by changing the square brackets, which are commonly used for
optional parameters, with < .. >.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Ioana Ciornei
d6e73ce02e drivers: net: fsl-mc: remove unused parameter from the wait_for_mc() function
The first parameter of the wait_for_mc() function - booting_mc - is not
used. Remove it.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Dan Carpenter
a2536daf93 pinctrl: scmi: Use standard device tree pin muxing format
In the original code, I wrote a custom pin muxing parser but the
upstream device trees wouldn't accept something like that so it would
have complicated mergine the device tree files.

Use the standard device tree format with function and groups:

	pinmux1: pinmux1 {
		function = "f_gpio1";
		groups = "grp_1", "grp_3";
	};

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Dan Carpenter
3a29dfc92e firmware: scmi: Fix setting the function
Set BIT(10) when the function needs to be set, otherwise the setting is
ignored.

Fixes: 0cb160f1b6 ("scmi: pinctrl: add pinctrl driver for SCMI")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:16:58 -06:00
Dan Carpenter
af7b6bb05a gpio: scmi: Add gpio_scmi driver
This provides GPIO support over SCMI.  It is built on top of the
pinctrl-scmi driver.  A typical device tree entry might look like
this:

    gpio1 {
        compatible = "scmi-pinctrl-gpio";
        gpio-controller;
        #gpio-cells = <2>;
        ngpios = <10>;
        gpio-ranges = <&scmi_pinctrl 0 8 4>,
                      <&scmi_pinctrl 4 12 1>,
                      <&scmi_pinctrl 5 15 1>,
                      <&scmi_pinctrl 6 17 4>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins>;
    };

In this GPIO driver the one thing which is different is that in the
gpio-ranges the first numbers which represent how the pins are exposed
to the users have to start at zero and it can't have gaps.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 10:14:39 +08:00
Kamlesh Gurudasani
d113b29523 clk: scmi: Fix protocol version fetch for non-CCF platforms
The SCMI clock protocol version was only being fetched when CLK_CCF
was enabled. On non-CCF platforms, the probe function returned early
without fetching the version, leaving priv->version as 0.

This caused issues because code paths like scmi_clk_gate() and
scmi_clk_get_permissions() depend on priv->version to determine
which protocol message format to use, even in non-CCF mode.

Fix this by moving the scmi_generic_protocol_version() call before
the CLK_CCF check, ensuring the version is fetched for both CCF and
non-CCF platforms.

Tested on am62lx_evm.

Fixes: ae7e0330ce ("clk: scmi: add compatibility with clock protocol 2.0")
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 10:14:19 +08:00
Marek Vasut
4a95a2a9e1 ufs: Remap CPU to bus addresses using dev_phys_to_bus()
Use dev_phys_to_bus() to convert CPU addresses of DMA descriptors
into bus addresses of DMA descriptors. This is necessary on hardware
which does not have 1:1 mapping between CPU and memory addressed by
the DMA. This has no impact on other hardware which does not need
this conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:53:44 +02:00
Marek Vasut
d3c7fb5eb9 serial: sh: Handle HSCIF on all 64-bit R-Car SoC
The HSCIF variant present on Renesas R-Car Gen5 SoC is compatible
with the HSCIF variant present on Renesas R-Car Gen4 SoC. Enable
HSSRR register programming for HSCIF present on all 64-bit R-Car
SoCs, which covers R-Car Gen3, Gen4 and newly also Gen5.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:36:28 +02:00
Marek Vasut
cc417680dc remoteproc: renesas: apmu: Fix typo in Kconfig symbol help text
Fix typo in Kconfig symbol help text, change incorrect A52 to correct R52.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
2026-04-08 19:36:28 +02:00
Marek Vasut
2b6d6a5ffc ram: renesas: dbsc: Use macro in renesas_dbsc5_board_config channel count
Use DRAM_CH_CNT macro in renesas_dbsc5_board_config channel count.
The macro is defined in the same file a few lines above. This way,
the maximum channel count in the structure and the macro can not
diverge.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
4f376e6a00 arm64: renesas: Separate 64bit only code
Conditionally compile code that is only compatible with 64bit ARMv8
on 64bit R-Car Gen3/4/5 SoCs. Protect such code with CONFIG_ARM64.
This split is implemented in preparation for build of Cortex-M33
version of R-Car Gen5 U-Boot for its RSIPM core.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
f18004993c arm64: renesas: Make R-Car board code 32-bit ARMv8-M compatible
The 64-bit R-Car board code is currently unbuildable on 32-bit ARM
cores. Skip DRAM initialization bits to make the code compatible with
these cores, because those cores do not use the DRAM, they only use
SRAM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
0453bcfd16 arm64: renesas: Enable SMC command on all R-Car 64-bit systems
Enable the 'smc' command on all R-Car 64-bit systems. This command is
useful for interacting with EL3 firmware, testing interaction with the
PSCI provider or OPTEE-OS.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
37997a214e arm: renesas: Use stock lowlevel_init function and remove s_init
Replace s_init() early initialization at the end of lowlevel_init
by invoking the same code in mach_cpu_init(). The mach_cpu_init()
is called a bit later, but as the code initializes timer and no
code uses timer until mach_cpu_init(), this does not pose a problem.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
cb5f92b5d5 arm: renesas: Enable preboot environment variable on all R-Car systems
Enable the 'preboot' variable on all R-Car systems. This variable can
optionally be set and contain a script which is executed before the
autoboot timeout starts. This can be used to run critical scripts or
similar tasks. By default, the "preboot" variable is empty.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Marek Vasut
fdfaf72ace arm: renesas: Enable modern HUSH parser on all R-Car systems
Enable modern HUSH parser on all Renesas R-Car systems. This replaces
the old HUSH parser and includes matching updates to the command line
parser. No functional change expected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:35:05 +02:00
Tom Rini
f0000b4a57 Merge patch series "env: scsi: support SCSI env without partition UUID"
David Lechner <dlechner@baylibre.com> says:

This is a series adding support for reading U-Boot env directly from
SCSI devices that do not have a partition table, similar to how we can
already do this for MMC devices.

The motivation behind this is that MediaTek's BSP is already using the
same disk images for both MMC and UFS devices, so we need to be able to
read the env from SCSI devices without requiring a partition UUID.

The series starts with cleaning up a few oddities we noticed in the
existing code. Then some refactoring so that the env code manages
calling scsi_scan() so that we don't have to duplicate that for the
new code path. Then finally, the last few patches add and document the
new functionality.

Link: https://lore.kernel.org/r/20260326-env-scsi-hw-part-support-v1-0-55c9dd07a2cb@baylibre.com
2026-04-08 11:07:19 -06:00
David Lechner
d72c2b63da env: scsi: document requirements for ENV_IS_IN_SCSI
Expand the Kconfig help for ENV_IS_IN_SCSI to explain the other
required config options when this option is enabled.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
83223d4f86 env: scsi: add CONFIG_ENV_SCSI_HW_PARTITION
Add CONFIG_ENV_SCSI_HW_PARTITION and supporting code to allow loading
the environment directly from a SCSI device without a partition table.
Some platforms store the environment directly on the SCSI device without
a way to look it up by partition UUID.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
b382cd0973 scsi: move scsi_scan() call out of scsi_get_blk_by_uuid()
Move scsi_scan() call out of scsi_get_blk_by_uuid().

The only caller, env_scsi_get_part(), should be managing this call since
it may also want to use different ways to get the partition information
in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
7b824e7505 scsi: document return values of public functions
Add Return: documentation for some public functions in scsi.h that were
missing it.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
e5d8ad260b scsi: return ENODEV in scsi_get_blk_by_uuid()
Change scsi_get_blk_by_uuid() to return -ENODEV instead of -1 on error.
Other scsi_* functions return an error code rather than -1.

1 is EPERM, which doesn't make sense here. So we use ENODEV instead. The
only caller only checks for !success, so changing the value has no
effect on the caller.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
ad4831d7a5 env: scsi: rename ENV_SCSI_PART_UUID
Rename SCSI_ENV_PART_UUID to ENV_SCSI_PART_UUID. All other environment-
related config names are of the form ENV_<name>, so this is more
consistent.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
2026-04-08 11:07:07 -06:00
David Lechner
8191d23457 cmd/scsi: drop scsi reset command
Since commit b630f8b3ae ("scsi: Forceably finish migration to DM_SCSI")
the "scsi reset" command has no possibility of actually resetting any
SCSI controller. Drop the command to avoid confusion that the command is
actually resetting the SCSI controller.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:00 -06:00
Marek Vasut
a383c96892 dm: Respect dma-ranges size
Rework dev_phys_to_bus() and dev_bus_to_phys() to respect the size
of the area specified in dma-ranges DT property. The area outside
of ranges is remapped 1:1, while the area in the ranges is remapped
according to the description in the dma-ranges property.

Adjust the test to test the area within the remapped range, not area
outside the remapped range, which was incorrect.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
2026-04-07 15:27:22 -06:00
Tom Rini
6201fd7c1f hikey960: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 15:26:53 -06:00
Tom Rini
b9650a8e33 spl: Remove unused CONFIG_SPL_FRAMEWORK_BOARD_INIT_F option
The option CONFIG_SPL_FRAMEWORK_BOARD_INIT_F enables a simple
board_init_f function in SPL. This however is never enabled, so remove
this function and option.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 15:26:47 -06:00
Tom Rini
83df1103ef arm: Remove redundant "xPL_SYS_MALLOC_F default y" entries
The symbol SPL_SYS_MALLOC_F defaults to y when visible and
TPL_SYS_MALLOC_F defaults to y when visible and SPL_SYS_MALLOC_F is
enabled. Remove the places from Kconfig files that had unneccsary
"default y" for these options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 15:26:43 -06:00
Paresh Bhagat
b7caaaef86 board: ti: am62dx: Separate resource management config from am62ax
AM62d currently shares resource management configuration files with
AM62a. However, AM62a resource management needs to be modified for DMA
resource sharing scheme for CPSW3G Ethernet functionality to support
multi-core traffic handling.

Add separate AM62d-specific resource management configuration files to
decouple from the AM62a changes and maintain proper resource allocation
for AM62d.

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
2026-04-07 15:26:17 -06:00
Sean Anderson
a724ec7494 Update my email address
Soon I will no longer be working at SECO. Update the mailmap to redirect
to my linux.dev address which I still have access to.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2026-04-07 15:22:31 -06:00
Tom Rini
0a7e2a90ad Merge tag 'mediatek-for-master-2026-04-07' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
This is the first wave of MediaTek changes for this merge window. We
also expect to be sending another decent-sized pull request later for
the backlog of patches that are currently waiting on dependencies or
need little more time for review.

* Fixes for cargo-culted issues in mach-mediatek init.c files.
* Some consistency cleanups of recently added Genio boards (510/700/1200).
* Some pinctrl improvements to support newer MediaTek SOCs (mt8189 compatible).
* New devicetree and config for Genio 520/720 EVK boards (can boot to eMMC or SD).
* New CPU-specific functions to read vendor-specific CPU info at runtime.
2026-04-07 13:52:01 -06:00
David Lechner
c3062edfed doc: release cycle: fix 2026.04 stats link
Fix the link to the 2026.04 stats page. It was likely copied from the
2026.01 line below and not updated.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-07 13:49:55 -06:00
David Lechner
c344faa37d arm: mediatek: mt8189: print specific CPU information
Modify the print_cpuinfo() function to print a more specific CPU name
when possible.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-mt8189-cpu-type-v1-2-4059c3b52761@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 13:14:29 -05:00
David Lechner
cde43f9bbd arm: mediatek: add SIP platform bininfo lookups
Add a couple of functions to look up the segment and part name using SIP
calls. These will be used to print more accurate CPU information in
print_cpuinfo().

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-mt8189-cpu-type-v1-1-4059c3b52761@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 13:14:29 -05:00
Simon Glass
738428dc0e sandbox: Adjust how OS-interface files are built
The current mechanism uses a completely separate build rule for each
file which must be built with system headers. This is tricky to
maintain.

Add a foreach template in the sandbox cpu Makefile which generates the
custom compile rules from a CFLAGS_USE_SYSHDRS list. This keeps the
rules data-driven without needing changes to the common
scripts/Makefile.lib, which could affect other architectures.

Move initjmp.o into the template since it uses the same pattern. Add
sdl.o to the list too, with an override for its command since it also
needs -fshort-wchar removed and -fno-lto added.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-07 11:33:04 -06:00
Philip Molloy
c98bf0533b arm: mach-sc5xx: Align header paths with SYS_SOC convention
Define CONFIG_SYS_SOC in the mach-sc5xx Kconfig. Follow the standard
U-Boot include path convention by moving the SC5xx SoC headers from
arch/arm/include/asm/arch-adi/sc5xx/ to the conventional
arch/arm/include/asm/arch-sc5xx/ location. Update includes from
<asm/arch-adi/sc5xx/*.h> to <asm/arch/*.h> across mach-sc5xx and board
files.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
2026-04-07 11:32:59 -06:00
Tom Rini
8c212d6e2e global: Correct duplicate U_BOOT_DRIVER entry names
The U_BOOT_DRIVER macro creates a list of drivers used at link time, and
all entries here must be unique. This in turn means that all entries in
the code should also be unique in order to not lead to build failures
later with unexpected build combinations. Typically, the problem we have
here is when a driver is obviously based on another driver and didn't
update this particular field and so while the name field reflects
something unique the linker entry itself is not. In a few places this
provides a more suitable string name as well, however.

Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # Tegra
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:56 -06:00
Tom Rini
9eb3592cbc tpl: Correct dependencies for TPL_OF_CONTROL
The TPL_OF_CONTROL option can only select TPL_OF_LIBFDT functionality if
we also have enabled TPL_LIBGENERIC_SUPPORT, so express this dependency
in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:52 -06:00
Tom Rini
3fe899fbea serial: omap: Fix "unused" warnings with SERIAL_PRESENT=n and OF_REAL=y
The definition of our ID table (and of_to_plat function) is guarded with
OF_REAL however the U_BOOT_DRIVER that would in turn use the table is
guarded with SERIAL_PRESENT. To avoid a potential warning we must also
guard both with SERIAL_PRESENT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:49 -06:00
Tom Rini
25d55485db serial: ns16550: Fix an "unused" warning with SERIAL_PRESENT=n and OF_REAL=y
The definition of our ID table is guarded with OF_REAL however the
U_BOOT_DRIVER that would in turn use the table is guarded with
SERIAL_PRESENT. To avoid a potential warning we must also guard the
ID table with SERIAL_PRESENT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:46 -06:00
Tom Rini
ff031c3421 input: Correct dependencies for CROS_EC_KEYB
The CROS_EC_KEYB functionality can only work with CROS_EC enabled, so
express this dependency in Kconfig, for all build phases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:43 -06:00
Tom Rini
b25d864a97 spl: env: Correct dependencies for SPL_SAVEENV and MMC
The SPL_SAVEENV functionality, when working with an MMC device, can only
work with SPL_MMC_WRITE enabled. This however only works with SPL_MMC
also being enabled. Update the dependencies to show that if we have
enabled SPL_ENV_IS_IN_MMC then we select SPL_MMC_WRITE and make
SPL_ENV_IS_IN_MMC depends on SPL_MMC.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:39 -06:00
Tom Rini
7289867a8d w1: Correct dependencies for CMD_W1
The CMD_W1 functionality can only work with both W1 and W1_EEPROM
enabled, so express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:36 -06:00
Tom Rini
1fd04cf46b cmd: Correct dependencies for CMD_BOOTD
The CMD_BOOTD functionality can only work with CMD_BOOTM enabled, so
express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:32 -06:00
Tom Rini
a6594e82bb lmb: boot: Update dependencies within BOOT_DEFAULTS_CMDS
The CMD_BOOT[IZ] symbols have a dependency on LMB, correctly,
currently. Make sure that in BOOT_DEFAULTS_CMDS we only select these
commands if LMB is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:29 -06:00
Tom Rini
504c4cdabd lmb: Rework the LMB_ARCH_MEM_MAP symbol
This symbol should not be enabled by the user directly but rather
selected when implemented in a given platform. This converts all of the
current users of this feature and hides the symbol.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:26 -06:00
Tom Rini
7396dca405 dts: Disallow OF_UPSTREAM for sandbox
Our sandbox platform are not appropriate for OF_UPSTREAM, reflect this in
Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:23 -06:00
Tom Rini
67e72e9686 env: remote: Disallow CMD_SAVEENV
Looking at how the saveenv portion of this driver was implemented, it
does not appear that it could actually result in changes being saved on
the remote end. Update Kconfig to disallow CMD_SAVEENV for
ENV_IS_IN_REMOTE and then remove the relevant code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:30:41 -06:00
Tom Rini
8af4e12487 env: Make more use of the ENV_SAVE_PTR macro
With commit 82b2f41357 ("env_internal.h: add alternative ENV_SAVE_PTR
macro") we introduced the ENV_SAVE_PTR macro but as explained in the
commit message, left full conversion for a later time. This commit
makes more progress on that front by doing the remaining easy
conversions to the new macro.

Signed-off-by: Tom Rini <trini@konsulko.com>

Changes in v2:
- Reduce the number of conversions, some didn't work as expected once
  CMD_SAVEENV was actually disabled.
- Finish converting UBI

Cc Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2026-04-07 11:30:41 -06:00
David Lechner
1be992a8a2 configs: mt8189: enable GPIO support
Enable GPIO support for mt8189-based boards. This is needed for U-Boot
to be able to use the SD card slot on the board (for the CD pin).

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260316-mtk-ext-mmc-boot-v1-3-1aae51a44705@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 11:09:18 -05:00
David Lechner
fbd4bd3a1e arm: dts: add U-Boot overrides for Genio 520 and 720 SD card
Add U-Boot-specific device tree overrides for the Genio 520 and 720 EVK
boards. These are needed to enable SD card support in U-Boot due to
current driver limitations. It is expected that these files will remain
after eventually converting these to CONFIG_OF_UPSTREAM, so we use
separate .u-boot.dtsi files for this.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260316-mtk-ext-mmc-boot-v1-2-1aae51a44705@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 11:07:44 -05:00
David Lechner
34b43ab5e1 arm: dts: mt8371: add SD card nodes
Add SD card nodes to the MT8371 Genio common and MT8189 SoC device tree
files. This is coming from what has been submitted upstream in Linux
[1]. The process is going slow, so we a copy in U-Boot until we can
switch to CONFIG_OF_UPSTREAM.

Link: https://lore.kernel.org/linux-mediatek/20251203-add-mediatek-genio-520-720-evk-v1-0-df794b2a30ae@collabora.com/ [1]
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260316-mtk-ext-mmc-boot-v1-1-1aae51a44705@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 11:07:44 -05:00
Chris-QJ Chen
ed53a7b2a6 board: mediatek: Add Genio 520/720 EVK defconfigs
Add basic defconfigs for Genio 520 and 720 EVKs.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-6-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:57:00 -05:00
Chris-QJ Chen
2eca8b0b9e arm: dts: mediatek: Add MediaTek Genio 520/720 EVK DTS
Add a basic .dts file for MediaTek Genio 520/720 EVKs. This will suffice
until an upstream devicetree is available from Linux.

These boards are virtually identical (other than some camera
capabilities) so share mostly the same devicetree.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-5-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:54 -05:00
Chris-QJ Chen
8971055fe4 arm: dts: mediatek: Add MediaTek MT8189 dtsi file
Add a basic .dtsi file for MediaTek MT8189. This will suffice until an
upstream devicetree is available from Linux.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-4-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:49 -05:00
Cathy Xu
8dfbebc31c arm: dts: mediatek: mt8189: Add pinmux macro header file
Add the pinctrl header file on MediaTek mt8189.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-3-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:44 -05:00
Chris-QJ Chen
a7c682565b arm: mediatek: add support of MT8189 SoC family
Add TARGET_MT8189 for MT8189 and similar SoCs.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-2-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:33 -05:00
David Lechner
04b3a834c6 clk: mediatek: mt8189: add some VLP clocks
Add some VLP clocks needed by the PMIC on MT8189 and similar SoCs.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-1-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:23 -05:00
David Lechner
29739f15c0 pinctrl: mediatek: mtk8189: set get_pinconf functions
Set the get_pinconf functions for the mt8189 pinctrl driver. This will
append pinconf bias info to the output of the pinmux status command.
This is useful for debugging pin configuration issues.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-4-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
76da7482cf pinctrl: mediatek: print bias info along with pinmux
Add functionality to be able to print pin bias settings along with the
pinmux setting.

This can be useful to debug why pins might not be working correctly.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-3-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
108e752b2a pinctrl: mediatek: mt8189: fix pinconf bias
Fix setting pinconf bias for MT8189.

Using mtk_pinconf_bias_set_v1() was wrong because MT8189 does not have
PULLEN/PULLSEL registers. It has PU and PD registers for most pins.
MSDC pins need special handling since they have PUPD/R1/R0 registers.
I2C pins need special handling since they have PU/PD/RSEL registers.
New groups are added for MSDC and I2C pins and the bias_set callback
is now set appropriately for all groups.

A new table is needed for the RSEL registers since those were missing.

Some new macros are introduced to avoid repeating the same info many
times in MTK_TYPED_PIN(). This also fixes the semantically incorrect
use of DRV_GRPX for the IO_TYPE_GRPX field.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-2-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
937884083e pinctrl: mediatek: add handling for RSEL register
Add a new PINCTRL_PIN_REG_RSEL register type and a new function
mtk_pinconf_bias_set_pu_pd_rsel() to handle setting it.

Some MediaTek SoCs have a pin configuration register called RSEL that
sets the resistance value for bias pullup/pulldown.

Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-1-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
Julien Stephan
6db02cfebf configs: mt8370/mt8390/mt8395 add myself as maintainer
Set myself as maintainer for the following genio boards:
- mt8370-genio-510-evk
- mt8393-genio-700-evk
- mt8395-genio-1200-evk

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-6-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
Julien Stephan
f72ecf8edb configs: mt8370/mt8390: introduce mt8188.config to avoid duplication
mt8370_genio_510_evk_defconfig and mt8390_genio_700_evk_defconfig are
both based on MT8188, add a new mt8188.config file to share common
config.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-5-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
Julien Stephan
a5d2dd7683 configs: mt8390_evk: rename to mt8390_genio_700_evk_defconfig
Rename mt8390_evk to match the name of the device tree which is
mt8390-genio-700-evk.dts

Also update CONFIG_IDENT_STRING to be consistent.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-4-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
Julien Stephan
a1e72c381b configs: mt8370_evk: rename to mt8370_genio_510_evk_defconfig
Rename mt8370_evk to match the name of the device tree which is
mt8370-genio-510-evk.dts

Also update CONFIG_IDENT_STRING to be consistent.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-3-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
Julien Stephan
5288f1f0bf configs: mt8395_evk: rename to mt8395_genio_1200_evk_defconfig
Rename mt8395_evk to match the name of the device tree which is
mt8395-genio-1200-evk.dts

Also update CONFIG_IDENT_STRING to be consistent.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-2-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
Julien Stephan
116cc3e750 configs: mt8390_evk: remove useless CONFIG_SYS_BOARD
There is no board directory for MT8390_EVK so CONFIG_SYS_BOARD can be
removed

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-rename-genio-defconfigs-v2-1-1f77580d72f3@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
c11370994d arm: mediatek: mt8518: remove call to fdtdec_setup_memory_banksize()
Remove an incorrect call to fdtdec_setup_memory_banksize() in
dram_init() for mt8518.

fdtdec_setup_memory_banksize() populates gd->bd->bi_dram[bank].start
and gd->bd->bi_dram[bank].size base on the "memory" node in the device
tree. However, calling it from dram_init() is too early because gd->bd
has not been allocated yet.

gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size are already
correctly initialized later in dram_init_banksize(), so we do not need
to replace the removed function call with anything else.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-17-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
bfb5ccfcce arm: mediatek: mt8518: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8518. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-16-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
afa0978983 arm: mediatek: mt8516: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8516. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-15-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
b9e6281632 arm: mediatek: mt8512: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8512. This is
exactly the same as the default implementation, so we do not need to
override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-14-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
c83f9aa56d arm: mediatek: mt8365: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8365. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-13-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:11 -05:00
David Lechner
af4cba9a05 arm: mediatek: mt8195: fix gd->ram_top limit
Fix the implementation of the gd->ram_top limit for mt8195.

The intention of the comment about MMC/DMA is correct, but the
implementation was wrong. gd->mon_len is set to the code size of U-Boot,
so trying to set it to limit gd->ram_top does not make sense.

Instead, there is already a get_effective_memsize() weak function that
we can override to implement the required limit on the usable memory
size. This is used to set gd->ram_top in setup_dest_addr().

The comment about the extra SZ_1M needing to be reserved is not correct
as U-Boot already takes care of this (with the actual size of U-Boot) in
the various board_f functions, so it is removed.

This fixes DMA not working on MMC on mt8195.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-12-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
e620d592e8 arm: mediatek: mt8195: remove call to fdtdec_setup_memory_banksize()
Remove an incorrect call to fdtdec_setup_memory_banksize() in
dram_init() for mt8195.

fdtdec_setup_memory_banksize() populates gd->bd->bi_dram[bank].start
and gd->bd->bi_dram[bank].size base on the "memory" node in the device
tree. However, calling it from dram_init() is too early because gd->bd
has not been allocated yet.

gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size are already
correctly initialized later in dram_init_banksize(), so we do not need
to replace the removed function call with anything else.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-11-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
387b4c15b3 arm: mediatek: mt8195: check return value of fdtdec_setup_mem_size_base()
Check and propagate the return value of fdtdec_setup_mem_size_base() in
dram_init() for mt8195. This function could fail if the device tree is
malformed.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-10-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
d83bd9729d arm: mediatek: mt8195: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8195. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-9-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
7518e10cd2 arm: mediatek: mt8188: fix gd->ram_top limit
Fix the implementation of the gd->ram_top limit for mt8188.

The intention of the comment about MMC/DMA is correct, but the
implementation was wrong. gd->mon_len is set to the code size of U-Boot,
so trying to set it to limit gd->ram_top does not make sense.

Instead, there is already a get_effective_memsize() weak function that
we can override to implement the required limit on the usable memory
size. This is used to set gd->ram_top in setup_dest_addr().

The comment about the extra SZ_1M needing to be reserved is not correct
as U-Boot already takes care of this (with the actual size of U-Boot) in
the various board_f functions, so it is removed.

This fixes DMA not working on MMC on mt8188.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-8-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
f14635b20a arm: mediatek: mt8188: remove call to fdtdec_setup_memory_banksize()
Remove an incorrect call to fdtdec_setup_memory_banksize() in
dram_init() for mt8188.

fdtdec_setup_memory_banksize() populates gd->bd->bi_dram[bank].start
and gd->bd->bi_dram[bank].size base on the "memory" node in the device
tree. However, calling it from dram_init() is too early because gd->bd
has not been allocated yet.

gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size are already
correctly initialized later in dram_init_banksize(), so we do not need
to replace the removed function call with anything else.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-7-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
34fb6b7ba7 arm: mediatek: mt8188: check return value of fdtdec_setup_mem_size_base()
Check and propagate the return value of fdtdec_setup_mem_size_base() in
dram_init() for mt8188. This function could fail if the device tree is
malformed.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-6-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
b3467e51e9 arm: mediatek: mt8188: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8188. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-5-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
d3edeaf968 arm: mediatek: mt8183: remove call to fdtdec_setup_memory_banksize()
Remove an incorrect call to fdtdec_setup_memory_banksize() in
dram_init() for mt8183.

fdtdec_setup_memory_banksize() populates gd->bd->bi_dram[bank].start
and gd->bd->bi_dram[bank].size base on the "memory" node in the device
tree. However, calling it from dram_init() is too early because gd->bd
has not been allocated yet.

gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size are already
correctly initialized later in dram_init_banksize(), so we do not need
to replace the removed function call with anything else.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-4-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
85da671649 arm: mediatek: mt8183: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt8183. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-3-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
bddd6bbef3 arm: mediatek: mt7988: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt7988. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-2-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
David Lechner
56183fb025 arm: mediatek: mt7987: drop dram_init_banksize()
Drop override of dram_init_banksize() weak function for mt7987. This is
effectively the same as the default implementation, so we do not need
to override it.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260319-mtk-init-fix-dram-v1-1-6171ec141f40@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-06 18:39:10 -05:00
Tom Rini
93f84ee022 Merge branch 'next' 2026-04-06 12:16:57 -06:00
Rasmus Villemoes
e2138cf1e6 linker_lists.h: drop never used ll_start, ll_end macros
These macros have AFAICT never been used at all. It's also far from
clear what purpose it could serve - for one thing, what _type would
one pass, other than void perhaps? The example using "struct
my_sub_cmd" seems misplaced, as how could one know that the first
linker list consists of those, and moreover, how would one know how
many there are?

The linker list concept is fragile enough on its own, there is no need
to have unused functionality lying around that may or may not bitrot
and certainly will confuse readers of linker_lists.h.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-03 13:56:32 -06:00
Tom Rini
1c1bfb1cf3 acpi: Correct dependencies for GENERATE_ACPI_TABLE
In order to build this code, outside of QEMU systems which instead have
provided tables that we use, we must select ACPIGEN as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
7b53fbb274 spi: Correct dependency on SPI_MEM for many drivers
A large number of drivers "depends on" SPI_MEM but this is library type
functionality and so must be select'd instead in order to ensure that
drivers will build. Correct this usage and hide the symbol normally.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
a05d59a1cf misc: Add missing dependency to CROS_EC_SANDBOX
In order to build CROS_EC_SANDBOX we must also have the hashing API
enabled, add that as a dependency.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
56b896511c gpio: Correct dependencies for legacy CMD_PCA953X
The legacy CMD_PCA953X command can only be built when the matching
legacy driver is enabled, add that dependency to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
2e676dbf07 clk: Add missing dependency for SANDBOX_CLK_CCF
In order to build SANDBOX_CLK_CCF we need for CLK_CCF to be enabled, add
that as a select similar to other drivers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
af54c2185e cmd: Add missing dependency to CMD_PMC
We cannot build CMD_PMC without ACPI_PMC, so add that as a dependency.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
70b5afb905 boot: Add DM_RTC as a dependency to CEDIT
The CEDIT functionality, due to the cmos functions, depends directly on
DM_RTC being enabled in order to provide that API. Express this in
Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
79a9978112 loads: Add LMB as a dependency
As this command calls lmb_alloc_mem directly it must depend on LMB being
enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
5116481a7e lmb: Correct dependency around CMD_BOOT[IMZ]
The calls around lmb functions for these commands are not specific to
SYS_BOOT_RAMDISK_HIGH but rather part of the general loading portion of
the command itself currently. Move this dependency to the right spot.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
c1e17ac284 env: Make use of IF_ENABLED_INT in spi flash support
In order to build the spi flash environment driver, but with
CONFIG_ENV_REDUNDANT disabled we must make use of IF_ENABLED_INT to
check for a value in CONFIG_ENV_OFFSET_REDUND otherwise we will fail to
build.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
0a0c3a4001 env: Correct dependency for ENV_IS_IN_NAND
In order to have ENV_IS_IN_NAND be valid we must have MTD_RAW_NAND
enabled as a minimum, express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:32 -06:00
Tom Rini
99bc9d07b7 rtc: Update Kconfig dependencies
Update the dependencies for RTC drivers which did not express a
requirement on DM_RTC, or in some cases on DM_RTC being disabled. In a
few cases, when DM_RTC is disabled we also require DM_I2C to also be
disabled or for POWER_LEGACY to be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:27 -06:00
Tom Rini
8c1ffb09d5 rtc: ds1337: Remove various legacy code and update dependencies
At this point there are no users of this driver which do not enable
DM_RTC, so remove the legacy code and express the depdendency in
Kconfig. We can further remove code related to RTC chips / options that
are neither available in Kconfig nor set by any platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:24 -06:00
Tom Rini
592c244a3a rtc: Remove legacy DS1338 support
The DS1338 RTC chip is supported in DM mode by the DS1307 driver, and at
this point all users have been using this functionality. It was a
function of Kconfig configuration that implied otherwise. Remove the
unused legacy symbols.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:21 -06:00
Tom Rini
e5e268091e bootcount: Give i2c-eeprom a unique identifier
Every U_BOOT_DRIVER entry must be unique and this driver was re-using
the name of the bootcount_spi_flash driver. Change to
bootcount_i2c_eeprom.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:18 -06:00
Tom Rini
d05ef0f258 sata: Rework the CMD_SATA and SATA symbols
Today we typically enable CMD_SATA in order to have the SATA
functionality itself enabled, despite there being a clean split between
the two symbols. This in turn leads to potential configuration problems.
Split things so that SATA continues to be separate and not CMD_SATA
instead depends, functionally, on AHCI being enabled.

To do all of this:
- Have X86 select AHCI directly rather than "default y" it later.
- Make CMD_SATA be a default y option, given the split of platforms that
  enabled SATA and did, or did not, enable CMD_SATA.
- Change "imply CMD_SATA" to "imply SATA"
- Correct TARGET_VEXPRESS64_JUNO because you cannot select SATA_SIL
  without PCI (and in turn, SATA is needed for SATA_SIL).
- Update a number of defconfigs to have no functional change.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:14 -06:00
Tom Rini
b0eaaa067e global: Audit Kconfig usage of PARTITION_TYPE_GUID
It is not functionally possible to use the code enabled by
PARTITION_TYPE_GUID without having EFI_PARTITION be enabled as well. Not
all users of the former had ensured that the latter was enabled however,
so audit all current users and then as appropriate select or imply
EFI_PARTITION as needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:10 -06:00
Tom Rini
0b1a793502 optee: Correct dependencies for BOOTM_OPTEE
As exposed by "make randconfig", we have an issue with the dependencies
for BOOTM_OPTEE. This symbol needs to select BOOTM_LINUX and in turn
depend on the library symbols that have to be enabled for BOOTM_LINUX to
be valid (LIB_BOOTI, LIB_BOOTM and LIB_BOOTZ).

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:07 -06:00
Tom Rini
021e3828fb sandbox: Add missing select's to the architecture symbol
As exposed by "make randconfig", we have an issues around a number of
symbols that we select without making sure to also select their
prerequisite symbols. Add these missing symbols.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:04 -06:00
Rasmus Villemoes
f7e7c55e53 cmd: test: add bug-compatibility special case for 'test -n'
It turns out that there is lots of code in the wild, including in the
U-Boot tree itself, which used to rely on

  test -n $somevar

to yield false when $somevar is not defined or empty. See for example
all the occurrences of 'test -n $fdtfile'. That was really only a
quirk of the implementation that refused calls with argc < 3, and not
because it was interpreted as

  test -n "$somevar"

which is how this should be spelled.

While not exactly conforming to POSIX, we can accomodate such scripts
by special-casing a single argument "-n" to be interpreted as if it
comes from code as above with empty $somevar.

Since we only just added the ability to test a string for emptiness
using the single-argument form, it is very unlikely that there is code
doing

  test "$str"

which would now fail if $str happens to be exactly "-n"; such a test
should really always be spelled

  test -n "$str"

Fixes: 8b0619579b ("cmd: test: fix handling of single-argument form of test")
Reported-by: Franz Schnyder <franz.schnyder@toradex.com>
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-02 16:00:29 -06:00
Tom Rini
d1cd673391 Merge tag 'u-boot-imx-next-20260402' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29745

- Migrate imx95-toradex-smarc to use upstream devicetree.
- Force fsl crypto driver to select ARCH_MISC_INIT to avoid crashes when
  using CAAM.
- Support upstream Linux reset-gpios property for the i.MX PCI driver.
- Avoid duplication of DDR tables on i.MX8MP DHCOM SoM.
- Several cleanups on tqma6 platform.
- Convert i.MX8MP boards to DM_PMIC.
- Add phyCORE-i.MX91 support.
- Drop unnecessary BOARD_EARLY_INIT_F usage.
2026-04-02 11:13:38 -06:00
Marek Vasut
91c27b21b1 arm: relocate: Make data-only relocation mode non-user-configurable
The data only relocation mode should be selected on per-SoC or per-core
basis, make these options non-user-configurable. The SoC or cores which
require this have to select this option using "default" keyword.

Fixes: d9eee3d178 ("arm: relocate: Introduce data-only relocation mode")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-02 11:13:16 -06:00
Tom Rini
39214eb49b serial: pl011: Remove legacy serial driver options
There are no longer any users of the legacy non-DM pl01x serial driver.
This lets us remove both CONFIG_PL011_SERIAL as well as
CONFIG_PL011_SERIAL_RLCR references. We still have SPL users of the
non-DM portions of the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-02 11:13:16 -06:00
Neil Berkman
ff7039032b env: flash: add catch-all for unrecognized flags in env_flash_init()
When both environment copies have valid CRCs but the flag bytes do not
match any recognized pair, env_flash_init() falls through without
setting gd->env_addr or gd->env_valid. This is a problem because:

1. env_init() then sets gd->env_addr = &default_environment (in RAM).

2. In env_flash_load(), the pointer comparison
   gd->env_addr != &flash_addr->data evaluates true (RAM != flash),
   triggering the pointer swap that selects the secondary copy.

3. The repair logic writes OBSOLETE (0x00) to the non-active flag but
   cannot promote the other flag from 0x00 to ACTIVE (0x01) because
   NOR flash requires a sector erase to set bits. Both copies end up
   with flag=0x00.

4. On every subsequent boot, flag1 == flag2 triggers the ENV_REDUND
   path, printing a spurious "recovered successfully" warning until
   an explicit saveenv erases and rewrites the sectors.

The recognized flag values are ACTIVE (0x01), OBSOLETE (0x00), and
erased (0xFF). Of the 256 possible flag values, the existing chain of
if/else-if handles only three: 253 of 256 values fall through without
setting gd->env_addr. Combined with 0x00 (already stuck on NOR),
254 of 256 values eventually reach the persistent-warning state.

Other env backends (SPI flash, NAND, MMC) handle this through
env_check_redund() in env/common.c, which uses a numeric comparison
of the flags as a serial counter and always reaches a decision. The
CFI flash backend is the only one that uses its own flag-matching
logic.

Add a catch-all else clause that defaults to the primary copy with
ENV_REDUND status, matching the existing behavior for the flag1==flag2
case. This ensures gd->env_addr is always set, preventing the
unintended pointer swap. The condition is recoverable via saveenv.

Signed-off-by: Neil Berkman <neil@xuku.com>

Reproducer: https://gist.github.com/neilberkman/4155612a7942d3f510f204eb85e61943

The SPI flash backend (env/sf.c) has a related but distinct issue:
it retained legacy boolean save semantics but its load path now uses
the common serial-number logic in env_check_redund(), creating an
inconsistency under interrupted updates. That has wider implications
for fw_env.c and would need separate discussion.
2026-04-02 10:18:50 -06:00
Max Merchel
4d612ec435 tqma6: remove board MAINTAINERS
All information is contained in the global MAINTAINERS or
TQ board MAINTAINERS.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 11:12:22 -03:00
Max Merchel
fbfa30e5d6 tq: add TQ board MAINTAINERS
Add MAINTAINERS file containing board-specific information and
the name of the board maintainer.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 11:12:21 -03:00
Markus Niebel
9152da7313 MAINTAINERS: update entry for TQ-Systems
- change TQ GROUP to TQ-Systems
- add TQ mailing list
- remove custodian tree
- add board directory
- add board configs
- add board device trees
- add board documentation directory
- add shared environment directory

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 11:12:21 -03:00
Marek Vasut
90f3d2a89f arm64: imx8mp: Add 4G 1r DRAM timings on DH i.MX8MP DHCOM SoM
Introduce timing patch which converts 2 GiB DRAM timings to 4 GiB 1-rank
timings. This is a new configuration which carries IS43LQ32K01B DRAM part.
The 512 MiB SoM strapping that was never used is repurposed for this part.

Signed-off-by: Marek Vasut <marex@nabladev.com>
2026-04-02 09:11:52 -03:00
Marek Vasut
848f845916 arm64: imx8mp: Deduplicate 2G and 4G 2r DRAM timings on DH i.MX8MP DHCOM SoM
The 2 GiB and 4 GiB 2-rank DRAM timings on i.MX8MP DHCOM are very
similar. Instead of carrying around two copies of almost identical
timing tables, implement a patch of the 2 GiB table to convert it
into 4 GiB 2-rank table and pass the result to DRAM initialization
code. This saves us 13640 Bytes in SPL, and frees up space for more
DRAM initialization tables.

Signed-off-by: Marek Vasut <marex@nabladev.com>
2026-04-02 09:11:51 -03:00
Marek Vasut
de3955d8bf arm64: imx8mp: Deduplicate DRAM size tables on DH i.MX8MP DHCOM SoM
The DRAM size tables are shared by SPL and U-Boot proper, deduplicate
those tables into lpddr4_timing.h . No functional change.

Signed-off-by: Marek Vasut <marex@nabladev.com>
2026-04-02 09:11:51 -03:00
Marek Vasut
245d4a60de arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM
The inline ECC configuration is identical for 2 GiB DRAM variants
and 4 GiB DRAM variants of the SoM, no matter the rank count. Fold
the ECC configuration directly into spl.c to simplify the upcoming
deduplication. No functional change.

Signed-off-by: Marek Vasut <marex@nabladev.com>
2026-04-02 09:11:51 -03:00
Peng Fan
b94d20f66e imx8mp: icore-edimm2.2: Convert to DM_PMIC
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:11:33 -03:00
Peng Fan
c93520a4ba imx8mp: libra-fpsc: Convert to DM_PMIC
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2026-04-02 09:11:33 -03:00
Peng Fan
b1e8c95e2b imx8mp: verdin: Convert to DM_PMIC
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
2026-04-02 09:11:33 -03:00
Peng Fan
d515edf2ad imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.

Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic@25".
- Update PMIC register programming to use struct udevice API.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2026-04-02 09:11:33 -03:00
Franz Schnyder
bf7dbb75fe configs: toradex-smarc-imx95: Add gpio-hog support
On the SMARC iMX95 the WiFI UART and JTAG signals are shared. The
WIFI_UART_EN signal is used to select between these two modes.
Currently, there is no hog present in the device tree but the
configuration needs to be added, as once the device tree comes from
mainline Linux, a hog will drive WIFI_UART_EN high to select by
default the UART function during boot.

Enable CONFIG_GPIO_HOG to apply gpio-hog definitions in the device tree.

Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com>
2026-04-02 09:11:08 -03:00
Franz Schnyder
417f658567 arm: dts: imx95-toradex-smarc: migrate to OF_UPSTREAM
Allow CONFIG_OF_UPSTREAM to receive automatic device tree updates for
the Toradex SMARC iMX95.

Remove the now obsolete device tree files:
- imx95-toradex-smarc-dev.dts
- imx95-toradex-smarc.dtsi

Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com>
2026-04-02 09:11:08 -03:00
Tom Rini
bc7a0494a7 librem5: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-02 09:10:40 -03:00
Tom Rini
55ac1191b3 o4-imx6ull-nano: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-02 09:10:23 -03:00
Tom Rini
91ba8ab13f mx6ullevk: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:10:08 -03:00
Tom Rini
4efab3ab4f mx6sxsabreauto: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:09:51 -03:00
Tom Rini
775431adbd mx6sllevk: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:09:36 -03:00
Tom Rini
6e209fc6e7 imx93_frdm: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-02 09:09:16 -03:00
Tom Rini
a88d6525f6 imx8ulp_evk: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:08:59 -03:00
Tom Rini
79f8f60cc6 osm-s-mx93: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2026-04-02 09:08:44 -03:00
Tom Rini
94c660cfd3 engicam: Drop unnecessary BOARD_EARLY_INIT_F usage
This platform enables CONFIG_BOARD_EARLY_INIT_F and then has a
do-nothing board_early_init_f function. Change to not enabling the
option and so not needing an empty function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-02 09:08:25 -03:00
Tomas Alvarez Vanoli
7917c2e356 spi: fsl_espi: fix din offset
In the case of SPI_XFER_BEGIN | SPI_XFER_END, the function creates a
buffer of double the size of the transaction, so that it can write the
data in into the second half. It sets the rx_offset to len, and in the
while loop we are setting an internal "din" to buffer + rx_offset.

However, at the end of each loop, the driver copies "buffer + 2 *
cmd_len" back to the data_in pointer.

This commit changes the source of the data to buffer + rx_offset.

Signed-off-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
2026-04-02 09:07:48 -03:00
Heiko Schocher
c42db5019d crypto: fsl: Select ARCH_MISC_INIT for CAAM driver
The CAAM JR driver is initialized from arch_misc_init(). If
ARCH_MISC_INIT is not enabled, the driver is never initialized,
which can lead to crashes or hangs (e.g. during hash operations).

Select ARCH_MISC_INIT when enabling FSL_CAAM to ensure proper
initialization.

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Suggested-by: Fabio Estevam <festevam@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-04-02 09:07:18 -03:00
Paul Gerber
1e7250ce94 board: tqma6: update eMMC DSR handling
New SoM revision use series termination for eMMC signals while older do
not. To prevent signal overshot on older revisions, DSR must be set and
limited. The eMMC type is used to differentiate between revisions.
Keep a table with all types, that are known to require DSR.

Signed-off-by: Paul Gerber <Paul.Gerber@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
af6b413435 board: tqma6: use common TQ mmc function
Add function from common mmc header and
select TQ_COMMON_SDMMC Kconfig option for MBa6

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
e9b935a8ad board/tq: Add common mmc API
Reduce code duplication by adding a default implementation

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Paul Gerber
c7626d61a5 board: tqma6: use common TQ baseboard
Update functions to use the common baseboard header and
select TQ_COMMON_BB Kconfig option for MBa6 and WRU4.

While at it, remove empty implementations that are now covered by
board/tq/common.

Signed-off-by: Paul Gerber <Paul.Gerber@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Markus Niebel
b162ec2a08 board/tq: Add common baseboard API
TQMa6 and other SoMs from TQ-Systems GmbH need a baseboard. Therefore
functionality of U-Boot board callbacks may be distributed between SoM
and baseboard implementation.
To prevent code duplication and boilerplate implement a baseboard specific
API for TQ boards with weak defaults that can be filled out for baseboard
implementations as needed.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
46de872995 configs: tqma6: change to include tqma6.h in baseboard headers
The SoM (TQMa6) can be used on various baseboards. No modifications to
the SoM files should be required to use the SoM on different baseboards.
Therefore, include the SoM headers in the baseboard.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
8ff44f6f61 board: tqma6: change to use shareable tq environment
Create tqma6 environment file and remove CFG_FEC_MXC_PHYADDR as it comes
from device tree.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
b08dc109da configs: tqma6.h: remove unused define for PFUZE100_I2C
Remove the definition of CFG_POWER_PFUZE100_I2C_ADDR and
TQMA6_PFUZE100_I2C_BUS as it is not used.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Max Merchel
6c591676a9 configs: tqma6.h: remove unused define for PHYS_SDRAM_SIZE
Remove the definition of PHYS_SDRAM_SIZE as it is not used.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Markus Niebel
de27ed88b3 env: tq: add shareable environment settings
Prepare moving boiler plate code out of board confguration header and
prepare to share a lot of things between boards.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-04-02 09:05:46 -03:00
Primoz Fiser
77801f4b64 board: phytec: phycore-imx91-93: Add phyCORE-i.MX91 support
As the PHYTEC phyCORE-i.MX91 [1] is just another variant of the existing
PHYTEC phyCORE-i.MX93 SoM but with i.MX91 SoC populated instead, add it
to the existing board-code "phycore_imx93", and rename that board to
"phycore_imx91_93" to reflect the dual SoCs support. While at it, also
rename and change common files accordingly. This way i.MX91 and i.MX93
SoC variants of the phyCORE SoM share most of the code and documentation
without duplication, while maintaining own device-tree and defconfigs
for each CPU variant.

Supported features:
 - 1GB LPDDR4 RAM
 - Debug UART
 - EEPROM
 - eMMC
 - Ethernet
 - SD-card
 - USB

Product page SoM:
[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2026-04-02 09:05:23 -03:00
Krzysztof Kozlowski
97979e894b pci: imx: Properly support upstream Linux reset-gpios property
The driver requests explicitly "reset-gpio" property, not the one with
"gpios" suffix but upstream Linux kernel deprecated it in 2021.
Existing upstream Linux kernel DTS is being changed to "reset-gpios"
property, thus update the driver to read that one too.

Note that driver is probably broken already, because it parsed GPIO in
standard way respecting the flags and on top of that applied the
"reset-gpio-active-high" flag, thus "reset-gpio ACTIVE_LOW" with the
"reset-gpio-active-high" property would be double inverted.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
2026-04-02 09:05:06 -03:00
Tom Rini
98cf83d816 Merge tag 'net-20260331' of https://source.denx.de/u-boot/custodians/u-boot-net into next
Pull request net-20260331.

net:
- airoha_eth & pcs_airoha driver fixes
- Rework some symbol dependencies
- dwc_eth_xgmac: Move DMA reset and pad calibration after PHY init
- rtl8169: add support for RTL8125d
- rswitch: Avoid NULL pointer dereference during PHY access
- rswitch: Remap CPU to bus addresses using dev_phys_to_bus()
- phy: dp83867: reset PHY on init to ensure clean state

net-lwip:
- nfs: fix buffer overflow when using symlinks
- tftp: update image_load_addr after successful transfer

[trini: Add missing "if NET" to CMD_DHCP select's CMD_BOOTP]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-31 13:06:00 -06:00
Marek Vasut
d1f8719e51 net: rswitch: Remap CPU to bus addresses using dev_phys_to_bus()
Use dev_phys_to_bus() to convert CPU addresses of DMA descriptors
into bus addresses of DMA descriptors. This is necessary on hardware
which does not have 1:1 mapping between CPU and memory addressed by
the DMA. This has no impact on other hardware which does not need
this conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-31 16:54:49 +02:00
Pranav Tilak
8f6077a8b8 net: phy: dp83867: reset PHY on init to ensure clean state
After a warm reboot, the PHY is left in power-down state
(BMCR_PDOWN set) causing auto-negotiation to timeout when
running the dhcp command.

Fix this by calling phy_reset() in dp83867_config() which
brings the PHY to a known clean state. The existing
DP83867_SW_RESTART is removed as it is redundant after phy_reset().

Fixes: 721aed7912 ("net: phy: Add support for Texas Instruments DP83867")
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2026-03-31 16:54:49 +02:00
Pranav Sanwal
44c7f95987 net: lwip: tftp: update image_load_addr after successful transfer
do_tftpb() parses the load address into a local variable laddr but
never updates the global image_load_addr. Commands that rely on
image_load_addr as their default address (e.g. 'bmp info')
therefore operate on the wrong address when called without
an explicit argument after tftpboot.

Update image_load_addr to laddr only on a successful transfer, so
that it accurately reflects where data was actually loaded.

Fixes: 4d4d783812 ("net: lwip: add TFTP support and tftpboot command")
Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-31 16:54:49 +02:00
Marek Vasut
1fc34e1bb8 net: rswitch: Avoid NULL pointer dereference during PHY access
At the very early stage when PHY ID is being auto-detected, the
PHY device is not yet instantiated and rswitch_etha .phydev is
still NULL. Add missing check for this condition and perform C22
fallback access in this PHY ID auto-detection case.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-31 16:54:49 +02:00
Marek Vasut
d63e58c5f0 net: bootp: Drop unused code
This code is surely unused and there are not even commented out
references to the function name. Drop the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-31 16:54:49 +02:00
Marek Vasut
b3e303b60f cmd: dhcp: Select CMD_BOOTP
The DHCP command depends on bootp_reset() function, which is implemented
only if CMD_BOOTP is enabled. Select CMD_BOOTP to satisfy the dependency.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
2026-03-31 16:54:49 +02:00
Tom Rini
2edd015cd5 net: Correct dependencies for HIFEMAC_ETH
The HIFEMAC_ETH functionality can only work with both DM_ETH_PHY and
DM_MDIO enabled (it calls one of the functions that requires both), so
express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-31 16:54:49 +02:00
Tom Rini
66da793b69 net: cmd: Correct dependencies for CMD_PXE
The CMD_PXE functionality can only build with CMD_TFTPBOOT enabled (or
we get undefined references to do_tftpb), so express this dependency in
Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-31 16:54:49 +02:00
Javen Xu
9d0b183804 rtl8169: add support for RTL8125d
This patch adds support for RTL8125d. Its chip version is 0x6a.

Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
[jf: add missing comma]
Signed-off-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-31 16:54:11 +02:00
Pranav Tilak
fd6e3d3409 net: lwip: nfs: fix buffer overflow when using symlinks
When resolving a symlink, nfs_path points into a heap allocated buffer
which is just large enough to hold the original path with no extra
space. If the symlink target name is longer than the original
filename, the write goes beyond the end of the buffer corrupting
heap memory.

Fix this by ensuring nfs_path always points to a buffer large enough
to accommodate the resolved symlink path.

Fixes: 230cf3bc27 ("net: lwip: nfs: Port the NFS code to work with lwIP")
Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-31 16:43:28 +02:00
Tom Rini
078e2663e4 net: lwip: nfs: Add missing dependency
In order to use NFS with lwIP we need to select PROT_UDP_LWIP.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-31 16:43:28 +02:00
Tom Rini
803e5cc5f9 net: Rework dependencies around NET/NET_LWIP and NETDEVICES
Functionally, both networking stacks require DM_ETH. This is because
they both also require some networking devices to be enabled. Express
this more correctly by having both NET and NET_LWIP select NETDEVICES.
In turn NETDEVICES no longer depends on NET or NET_LWIP as it's not
prompted anymore.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-31 16:43:28 +02:00
Boon Khai Ng
a40defd46a phy: micrel: ksz90x1: Issue PHY soft reset during configuration
- Add a call to phy_reset() in ksz9031_config() to ensure the PHY is
  properly reset during initialization.
- This clears the power-down bit and ensures the PHY recovers correctly
  after Linux reboot.

Tested on Agilex5 hardware with KSZ90X1 PHY.

Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
2026-03-31 16:43:28 +02:00
Boon Khai Ng
6e30330d7a net: dwc_eth_xgmac: Move DMA reset and pad calibration after PHY init
- Move DMA software reset and pad calibration in xgmac_start() to occur
  after the PHY is initialized and connected.
- This ensures the PHY is ready before performing these operations,
  which is necessary for proper recovery after reboot.

This change fixes issues where the PHY did not recover from power-down
state after a Linux reboot, for the board using Micrel KSZ90x1 PHY.

Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
2026-03-31 16:43:28 +02:00
Tom Rini
6b5d2990f4 net: Rework some symbol dependencies
As exposed by "make randconfig", we have a few dependency issues with
some network drivers:
- Both HIFEMAC_ETH and HIGMACV300_ETH functionally require both DM and
  OF_CONTROL. Further, HIFEMAC_ETH needs DM_CLK not just CLK to be
  selected.
- BNXT_ETH deals with it's PCI requirement in a backwards way. The
  symbol PCI_INIT_R is board specific, PCI alone is required to build.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-31 16:43:28 +02:00
Mikhail Kshevetskiy
6dae594af3 net: pcs-airoha: fix allyesconfig building
Airoha PCS driver depends on ARCH_AIROHA, so it should not be built
by allyesconfig configuration.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-31 16:43:28 +02:00
Mikhail Kshevetskiy
ac91f1a8ad net: pcs-airoha: unify code using SCU regmap helper
Use common code to get CHIP_SCU registers instead of driver one.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-31 16:43:28 +02:00
Mikhail Kshevetskiy
a05c0d1732 net: airoha: probe airoha switch mdio on airoha_eth probing
Airoha switch mdio maybe used not only by GDM1, but also by other GDM
ports (ex: as21xxx phy connected to GDM2 port). So it's better probe
airoha switch mdio a bit early in the airoha_eth_probe() code.

Also remove useless eth_phy_set_mdio_bus() call and related code.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-31 16:43:28 +02:00
Wadim Egorov
87ea2b51b6 configs: imx93-phycore_defconfig: Enable CMD_USB_MASS_STORAGE
This allows us to expose MMC devices to the host for easy
flashing via USB.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Primoz Fiser <primoz.fiser@norik.com>
2026-03-30 17:02:24 -06:00
Wadim Egorov
2e3a53d1c1 configs: phycore_am62x_a53_defconfig: Enable CMD_USB_MASS_STORAGE
This allows us to expose MMC devices to the host for easy
flashing via USB.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-03-30 17:02:23 -06:00
Marek Vasut
32dc2866e0 console: Prefer currently selected serial console as stdio device
Adjust the scan for default console stdio device to prefer the
currently selected serial device. This is useful in combination
with CONFIG_SERIAL_PROBE_ALL=y, in which case the system would
instantiate all serial devices as stdio devices in the order in
which they are listed in control DT. The currently selected serial
device may not be the first device listed in DT, in which case the
current console_init_r() implementation unexpectedly switches to
another serial console after listing stderr using "Err:" line, and
just before showing U-Boot shell, which is not the desired behavior.

The scan now iterates over the entire list of stdio devices. If the
current iterator stdio device is the current serial device, or there
is no input or output stdio device assigned to the input or output
stream yet, then the current iterator stdio device is assigned to that
stream. This way, the first suitable stdio device is assigned to the
stream, but the current serial console stdio device can override that
assignment.

As a small optimization, if the current iterator stdio device is the
current serial device and both input and output streams as assigned,
then the loop can terminate, because the current serial device has a
chance to be used as a stdio device at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-03-30 17:02:17 -06:00
Tom Rini
0da1866a8f core: Rework REGMAP symbols implementation
As exposed by "make randconfig", we have an issue with the dependencies
for REGMAP (and xPL variants). As this is a library function, it should
always be selected and not depended on by other functionality. This is
largely done correctly today, so just correct the few outliers.

Acked-by: Anshul Dalal <anshuld@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 16:59:35 -06:00
Tom Rini
bdbe24b2a2 usb: isp1760: Correct dependencies for USB_ISP1760
As exposed by "make randconfig", we have an issue with the dependencies
for USB_ISP1760. It depends on DM && OF_CONTROL being set and
functionally requires REGMAP. As part of fixing that issue, we change
"tristate" to "bool" and remove mentions of module support as that's not
a thing in U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 16:59:35 -06:00
Tom Rini
2ee6606f35 test: Correct dependencies for SPL_UNIT_TEST
As exposed by "make randconfig", we have an issue with the dependencies
for SPL_UNIT_TEST. In order to test SPL_DM_DEVICE_REMOVE we also need to
have ensured that SPL_DM is enabled, so select that as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 16:59:17 -06:00
Tom Rini
5c4357e902 timer: Correct dependencies for SPL_TIMER
As exposed by "make randconfig", we have an issue with the dependencies
for SPL_TIMER. This depends not just on SPL but also SPL_DM to function,
so add that.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
1d5d6789e3 pinctrl: Correct dependencies for PINCTRL_TH1520
As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
81fff1704f misc: Correct dependencies on QCOM_GENI
As exposed by "make randconfig", we have an issue with the dependencies
for QCOM_GENI. The symbol PARTITION_TYPE_GUID depends on EFI_PARTITION
and this driver cannot function without both being set, so select that
as well.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
292f1b974b input: Correct dependencies for BUTTON_KEYBOARD
As exposed by "make randconfig", we have an issue with the dependencies
for BUTTON_KEYBOARD. This needs to also depend on DM_GPIO, and then
select BUTTON as well as BUTTON_GPIO, in order to meet all its
requirements.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
c40e539c77 SPL: Rework logic around SPL_BLK_FS (and SPL_NVME)
As exposed by "make randconfig", we have an issue around SPL_BLK_FS.
This is functionally a library type symbol that should be selected when
required and select what it needs. Have SPL_BLK_FS select SPL_FS_LOADER
and then SPL_NVME will now correctly select SPL_FS_LOADER via
SPL_BLK_FS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
7938048594 boot: Update dependencies for some UPL options
As exposed by "make randconfig", we have an issue around SPL_UPL. This
depends on SPL_LIBGENERIC_SUPPORT indirectly. In turn, SPL_UPL_OUT needs
to next depend on SPL_UPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
f1e978fd54 boot: Update tests around network symbols in BOOT_DEFAULTS_CMDS
As exposed by "make randconfig", we have an issues around a number of
symbols in BOOT_DEFAULTS_CMDS. Due to the nature of how we currently
handle other networking related command options, we need to be testing
for "!NO_NET" (which is the symbol for no networking stack) or "NET ||
NET_LWIP" rather than CMD_NET alone. For consistency and clarity here
use "CMD_NET && !NO_NET" here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
4f2875911f sysreset: Rework tests around SYSRESET_CMD_POWEROFF
As exposed by "make randconfig", we have an issue around how
SYSRESET_CMD_POWEROFF is typically selected. We cannot rely only on
CMD_POWEROFF as SYSRESET_CMD_POWEROFF must also be tested for its own
dependency of SYSRESET.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
aa8203f83a xPL FIT: Rework SPL_FIT dependencies
As exposed by "make randconfig", we have xPL_FIT select'ing
xPL_OF_CONTROL, and that in turn requires xPL_LIBGENERIC_SUPPORT. The
most reasonable solution here is to have xPL_FIT select
xPL_LIBGENERIC_SUPPORT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 15:02:27 -06:00
Tom Rini
d09256283f FIT: Image pre-load signature support must select not depends on FIT_SIGNATURE
The options to enable pre-load signature support (full U-Boot or in SPL)
must depend on FIT_SIGNATURE being enabled, and not select it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-30 13:56:35 -06:00
Marek Vasut
d9eee3d178 arm: relocate: Introduce data-only relocation mode
Introduce new mode of relocation which relocates only data, not code.
This is mainly meant to relocate data to read-write portion of the RAM,
while the code remains in read-only portion of the RAM from which it is
allowed to execute. This split configuration is present on various secure
cores.

The result of the relocation is U-Boot running at its original address,
data relocated to the end of DRAM, but with added read-write area offset.
The U-Boot binary area is not reserved from the end of the DRAM in this
relocation mode, because U-Boot itself is not relocated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-27 13:29:31 -06:00
Marek Vasut
e204058607 arm: Drop unused __XSCALE__ section
The code in the __XSCALE__ section is unused, since there is no more
XScale support in U-Boot. Remove the stale code. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-27 13:25:05 -06:00
Marek Vasut
c3c082aa43 arm: Introduce current_pl() on ARM32 and compatibility current_el()
The ARM32 has PLx Privilege Levels instead of Exception Levels present
on ARM64. Introduce current_pl() function which reports the current PL
on ARM32.

Introduce current_el() for ARM32 as well and current_pl() for ARM64
which each call the other matching function. This is mainly mean to
allow code like this to compile and retain compile time code coverage:

if (IS_ENABLED(CONFIG_ARM64) && current_el() != 3) { ... }
if (!IS_ENABLED(CONFIG_ARM64) && current_pl() != 0) { ... }

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-27 13:22:02 -06:00
Padmarao Begari
b5517950e6 cmd: part: add part dupcheck subcommand
Add a 'part dupcheck' subcommand that scans all block devices probed
in U-Boot and reports any partitions sharing the same PARTUUID or
PARTLABEL. This helps detect situations where the same disk image has
been flashed onto multiple boot devices (e.g., USB stick and UFS),
which can lead to unpredictable boot behavior. Duplicate
PARTUUIDs break UUID-based partition lookup in Linux, and duplicate
PARTLABELs cause the wrong partition to be silently selected in
bootscripts that reference partitions by name.

A single collection pass iterates over all block devices using
blk_foreach_probe() and records every partition that carries a UUID
or label into a dynamically allocated alist of struct part_seen
entries (UUID string, name string, device pointer, partition number).

Duplicates are detected by calling detect_duplicates() twice, once
for UUIDs and once for labels. Each call sorts the list with qsort()
using a comparator that places empty fields at the end, then performs
a single linear pass to identify consecutive equal entries as
duplicate groups. Each group is reported with the device name and
partition number of every copy, followed by a per-field summary
count. Per-field counts are used consistently in both the
duplicate-found and no-duplicates paths.

Example output (with duplicates):

=> part dupcheck
Warning: duplicate PARTUUID 1234abcd-01 (2 copies)
  found on usb_mass_storage.lun0:1
  found on ufs_scsi.id0lun0:1
Found 1 duplicate PARTUUID(s) (2 total copies) among 4 partitions

Warning: duplicate PARTLABEL primary (2 copies)
  found on usb_mass_storage.lun0:1
  found on ufs_scsi.id0lun0:1
Found 1 duplicate PARTLABEL(s) (2 total copies) among 4 partitions

Example output (mixed: UUID duplicates, no label duplicates):

=> part dupcheck
Warning: duplicate PARTUUID 1234abcd-01 (2 copies)
  found on usb_mass_storage.lun0:1
  found on ufs_scsi.id0lun0:1
Found 1 duplicate PARTUUID(s) (2 total copies) among 4 partitions
No duplicate PARTLABELs found (3 labels)

Example output (no duplicates):

=> part dupcheck
No duplicate PARTUUIDs or PARTLABELs found (4 UUIDs, 3 labels)

The CONFIG_CMD_PART_DUPCHECK Kconfig option (depends on
CMD_PART and BLK) controls inclusion of this subcommand and is
disabled by default.

Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
2026-03-27 13:19:04 -06:00
Daniel Palmer
29cb951e8c fs: fat: Refactor dirty flag handling
Refactor the dirty flag handling a little bit so an inline
function is called instead of directly stuffing a value into
the variable.

This allows variable that holds the flag to be completely removed
if its not used i.e. CONFIG_FAT_WIRTE=n

Signed-off-by: Daniel Palmer <daniel@thingy.jp>
2026-03-27 13:14:18 -06:00
Ludwig Nussel
ce98d46395 Remove confusing NULL from error message
If no signature could be verified and the loop terminates, the iterator
'noffset' has no meaningful value so name yields NULL.

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
2026-03-27 13:10:00 -06:00
Ludwig Nussel
40269a6e01 Add back debug output of hashed nodes
Commit 2092322b31 ("boot: Add fit_config_get_hash_list() to build
signed node list") removed printing the list of hashed nodes during
verification. Add it back to have a chance to compare the list when
debugging.

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
2026-03-27 13:10:00 -06:00
Tom Rini
6334f29678 Merge tag 'xilinx-for-v2026.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.07-rc1 v2

Kconfig:
- Correct XILINX_TIMER entry
- Rework TARGET_MICROBLAZE_GENERIC
- Fix CPU_MICROBLAZE PVR logic
- Remove non existing SPL_BINMAN_FDT

i2c:
- Wire pca9848 support

spi/cadence-qspi:
- Disable DAC mode
- Do reset pulse

net/gem:
- Disable broadcast packets
- Clear TXSR transfer complete
- Add support for dma-coherent

versal2:
- Enable GIC600 support
- Fix UFS distro boot wiring
2026-03-27 12:11:33 -06:00
Michal Simek
fcc50761f3 cpu: microblaze: Fix unmet direct dependencies for XILINX_MICROBLAZE0_PVR
As exposed by "make randconfig", CPU_MICROBLAZE uses select to
force-enable XILINX_MICROBLAZE0_PVR, but that symbol depends on
TARGET_MICROBLAZE_GENERIC. The select bypasses this dependency chain,
triggering a Kconfig warning:

  WARNING: unmet direct dependencies detected for XILINX_MICROBLAZE0_PVR
    Depends on [n]: MICROBLAZE [=y] && TARGET_MICROBLAZE_GENERIC [=n]
    Selected by [y]:
    - CPU_MICROBLAZE [=y] && CPU [=y] && MICROBLAZE [=y]

Change XILINX_MICROBLAZE0_PVR from select to depends on, so that the
CPU driver is only available when PVR support has been explicitly
enabled.

Fixes: 816226d27e ("cpu: add CPU driver for microblaze")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61ddd555f58ef5169c48b190423640d949e4aad1.1773764781.git.michal.simek@amd.com
2026-03-27 14:49:32 +01:00
Tom Rini
80a4c49a4a Merge patch series "Introduce SQUASHFS support in SPL"
Richard Genoud <richard.genoud@bootlin.com> says:

SquashFS has support in U-Boot, but not in SPL.

This series adds the possibility for the SPL to load files from SquashFS
partitions.
This is useful, for instance, when there's a SquashFS rootfs containing
U-Boot binary.

NB: falcon mode is not supported yet.

Link: https://lore.kernel.org/r/20260313104229.1555236-1-richard.genoud@bootlin.com
2026-03-26 11:04:41 -06:00
Richard Genoud
868233099d MAINTAINERS: SQUASHFS: Add myself as co-maintainer
I propose myself to maintain the squashfs files with João.

Also, reorder patterns in alphabetical order.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
eed18b1e25 MAINTAINERS: SQUASHFS: update João Marcos Costa email
João is using his Bootlin address now.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
fb0df35528 spl: mmc: support squashfs
spl_mmc_do_fs_boot supports now loading an image from squashfs.

Also, convert #if defined(CONFIG_SPL_xx) to if (CONFIG_IS_ENABLED(xx))

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
6494e823b4 spl: add squashfs support
Implement spl_load_image_sqfs() in spl code.

This will be used in MMC to read a file from a squashfs partition.

Also, loosen squashfs read checks on file size by not failing when a
bigger size than the actual file size is requested. (Just read the file)
This is needed for FIT loading, because the length is ALIGNed.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
5e23f7f9f3 fs/squashfs: squashfs.h: include file should be self dependent
Otherwise, we get a lot of errors when including this file.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
0fe2801730 fs/squashfs: sqfs_decompressor: simplify code
Switch to if (CONFIG_IS_ENABLED()) instead of #if when possible and
remove unnecessary cases.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Richard Genoud
f0b4f502bd fs/squashfs: fix sqfs_decompressor.c build in SPL
CONFIG_IS_ENABLED() must be used in place of IS_ENABLED() for config
options that have a _SPL_ counterpart.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
2026-03-26 11:04:28 -06:00
Tom Rini
5673d25fd8 Merge tag 'fwu-next-26032026' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/29677

Add a new fwumdata tool to allows users to read, display, and modify FWU
(Firmware Update) metadata from Linux userspace. It provides
functionality similar to fw_printenv/fw_setenv but for FWU metadata.
Users can view metadata, change active/previous bank indices, modify
bank states, and set image acceptance flags. Configuration is done via
fwumdata.config file.
2026-03-26 11:03:23 -06:00
Kory Maincent
44a1e17b2a tools: mkfwumdata: Remove dependency on fwu_mdata.h header
The dependency on fwu_mdata.h creates unnecessary configuration
requirements. To generate metadata V1, CONFIG_FWU_MDATA_V1 must be
enabled, which in turn requires enabling FWU_MULTI_BANK_UPDATE,
EFI_CAPSULE_ON_DISK, PARTITION_TYPE_GUID, and other unrelated configs.
This is not suitable for a simple standalone tool.

Additionally, even with the "-v 1" option to generate V1 metadata, the
tool will still include the firmware store description if
CONFIG_FWU_MDATA_V1 is not enabled. This structure should only be
present in metadata V2.

Replace the fwu_mdata.h dependency with the new fwumdata header to make
the tool compatible with both V1 and V2 without requiring any defconfig
changes. This also uses the access helper functions from the header to
eliminate code duplication.

Acked-by: Sughosh Ganu <sughosh.ganu@arm.com>
Tested-by: Sughosh Ganu <sughosh.ganu@arm.com>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Kory Maincent
02673659e8 tools: Add support for fwumdata tool
Add a new fwumdata tool to allows users to read, display, and modify FWU
(Firmware Update) metadata from Linux userspace. It provides functionality
similar to fw_printenv/fw_setenv but for FWU metadata. Users can view
metadata, change active/previous bank indices, modify bank states, and set
image acceptance flags. Configuration is done via fwumdata.config file.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Kory Maincent
e375792964 tools: mkfwumdata: Add bank count validation for FWU metadata v2
The FWU metadata specification version 2 supports a maximum of 4 banks.
Add validation to enforce this limit and prevent creation of non-compliant
metadata structures when using version 2.

Without this check, users could inadvertently create invalid metadata by
specifying more than 4 banks, leading to potential compatibility issues
with FWU-compliant firmware update implementations.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Kory Maincent
bcae1381f8 tools: mkfwumdata: Improve error message specificity
Replace the generic error message with a more informative one.
This helps users quickly understand the correct command-line argument
format when the tool reports an error.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Kory Maincent
876fc8df12 tools: Reorganize mkfwumdata tool into fwumdata_src directory
Update FWU metadata-related tools by moving mkfwumdata.c into a new
tools/fwumdata_src/ directory structure. This refactoring prepares for the
addition of the fwumdata runtime tool, which will allow editing FWU
metadata directly from the target.

The Kconfig and Makefile entries are also moved into separate files within
the new directory (Kconfig and fwumdata.mk respectively) to keep all FWU
metadata tool configurations together and improve maintainability.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Kory Maincent
1c821b592f tools: gitignore: Add mkfwumdata to the git ignore file
mkfwumdata is a built image. Add it to .gitignore.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-26 08:20:00 +02:00
Tom Rini
8813d74163 Merge patch series "test/py: gpio: cleanups and improvement"
David Lechner <dlechner@baylibre.com> says:

I wanted to do some quick tests to make sure gpios were working without
having to dig out a schematic. Which means I didn't want to set any GPIO
as an output first without checking. So the main point here is the last
patch which allows gpio_op_pin to be optional and skip the test instead
of failing with exception. This works similar to several other config
options that are already optional in this module.

I also noticed a few easy things to clean up while I was looking at the
file, so there are a couple of extra patches for that.

Link: https://lore.kernel.org/r/20260312-test-gpio-cleanup-v1-0-bcf549671eb1@baylibre.com
2026-03-25 14:38:28 -06:00
David Lechner
0f101dac8f test/py: gpio: allow omitting gpio_op_pin
Modify tests that make use of gpio_op_pin from env__gpio_dev_config to
be skipped if gpio_op_pin is not provided. This is useful in cases where
one might not be sure which GPIOs are safe to use as outputs that can be
toggled without causing problems.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-25 14:38:15 -06:00
David Lechner
908db6c647 test/py: gpio: removing trailing semicolons
Remove trailing semicolons in test_gpio.py. Python does not require
them and they are considered improper style.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-25 14:38:15 -06:00
David Lechner
b02b0a0c6c test/py: gpio: remove unused imports
Remove unused imports in test_gpio.py.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-25 14:38:15 -06:00
Tom Rini
6701997e9c Merge patch series "add [ as alias for test, fix 0/1 argument handling"
Rasmus Villemoes <ravi@prevas.dk> says:

Make 'test' behave a little more like its cousins in other shells, by
allowing the [ ... ] spelling, and while here, fix up the handling of
a single, non-empty argument to comply with POSIX.

Link: https://lore.kernel.org/r/20260312100106.702368-1-ravi@prevas.dk
2026-03-25 14:38:02 -06:00
Rasmus Villemoes
8b0619579b cmd: test: fix handling of single-argument form of test
POSIX states that

  0 arguments:
      Exit false (1).
  1 argument:
      Exit true (0) if $1 is not null; otherwise, exit false.

and at least bash and busybox sh behave that way.

The current 'argc < 3' does the right thing for a non-existing or
empty argv[1], but not for a non-empty argv[1]. Fix that and add
corresponding test cases.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
2026-03-25 14:37:55 -06:00
Rasmus Villemoes
6f9cc3310a test: add tests for left-bracket alias for 'test' command
Duplicate a few of the existing test cases, using the [ spelling, and
also ensure that the presence of a matching ] as a separate and last
argument is enforced.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
2026-03-25 14:37:55 -06:00
Rasmus Villemoes
d44f615829 doc: test: document [ ] spelling of test
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
2026-03-25 14:37:55 -06:00
Rasmus Villemoes
fc8bf9a984 cmd: test: allow using [ as alias for test
I often find myself writing something like

  if [ "$somevar" = 123 ] ; then ...

only to realize that that syntax doesn't work in U-Boot shell, and
must be spelled

  if test "$somevar" = 123 ; then

It only takes a few lines of code to support this POSIX-standardized
alias for test, and helps developers focus on their actual problems
instead of dealing with such unexpected quirks of the shell.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
2026-03-25 14:37:55 -06:00
Anshul Dalal
1e2052f76e mach-k3: move k3_falcon_fdt_fixup out of r5/common.c
k3_falcon_fdt_fixup is used to perform fdt fixups at runtime in falcon
mode such as adding bootargs. Currently the function is only accessible
to the R5 SPL but could be useful for A53 SPL based falcon mode setups
as well.

Therefore this patch moves the function from r5/common.c to common.c.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-25 14:37:12 -06:00
Anshul Dalal
b2c02c04ec arm: mach-k3: use Kconfig options for ATF/OPTEE size
The reserved memory sizes for ATF and OPTEE were hard-coded for K3
devices, this patch replaces them with a Kconfig option allowing for
easier modifications.

Acked-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2026-03-25 14:37:09 -06:00
Tom Rini
4ed440e6be fw_loader: Introduce SUPPORTS_FW_LOADER symbol
The implementation of FW_LOADER requires CMDLINE to be enabled, and
expressses this. In order to not have to have every users also depends
on CMDLINE introduce SUPPORTS_FW_LOADER. This depends on CMDLINE and
ENV_SUPPORT and then we have all users depends on SUPPORTS_FW_LOADER.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-25 14:37:06 -06:00
Alexander Sverdlin
e67cf100ee fdt: Prefer %pap over %llx
In cases where phys_addr_t/phys_size_t is being printed, it's possible to
use tiny-printf-friendly %pap instead of %llx. For instance, in SPL, with
tiny-printf:

Before the patch:
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 0xx, size = 0xx

After the patch:
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 80000000, size = 40000000

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2026-03-25 14:37:03 -06:00
Ozan Durgut
e641ac90c2 configs: adi: sc5xx: sync command configuration
Sync the command configuration across ADI SC5xx defconfigs by
enabling commands that were missing on some boards.

Signed-off-by: Ozan Durgut <ozan.durgut@analog.com>
2026-03-25 14:36:55 -06:00
Christian Pötzsch
30e1733297 virtio: Fix virtio initialization sequence
The virtio spec clearly states in "3.1.1 Driver Requirements: Device
Initialization" the sequence a client has to follow after device reset.
Because u-boot resets here again, it also needs to set the "acknowledge"
bit again even if this was done in virtio_uclass_child_post_bind already
once before.

Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Signed-off-by: Adam Lackorzynski <adam@l4re.org>
[trini: Add VIRTIO_CONFIG_S_ACKNOWLEDGE flag check to the test]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-25 14:33:00 -06:00
Tom Rini
b8e6c5d0dd Merge patch series "virtio: rng: Handle oversized return buffers"
Meet Patel <meet.patel2@arm.com> says:

The virtio-rng test to verify effective handling of oversized return
buffers checks that an (undocumented) error is raised, instead of the
real concern, which is the surrounding buffer integrity following a rng
function call.
Update the test to check that the other contents of a buffer remain
unchanged instead of looking for an error code.

Link: https://lore.kernel.org/r/20260309165505.4001705-1-meet.patel2@arm.com
2026-03-25 14:32:42 -06:00
Kavin Gunasekara
e0eef12a1f virtio: rng: Handle oversized return buffers
If extra random bytes are returned, truncate and use the requested number
instead of returning an error.

Signed-off-by: Kavin Gunasekara <kavin.gunasekara@arm.com>
Signed-off-by: Meet Patel <meet.patel2@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2026-03-25 14:32:38 -06:00
Kavin Gunasekara
8019e3b35d test: dm: virtio_rng: Update virtio-rng test
The virtio-rng test to verify effective handling of oversized return
buffers checks that an (undocumented) error is raised, instead of the
real concern, which is the surrounding buffer integrity following a rng
function call.
Update the test to check that the other contents of a buffer remain
unchanged instead of looking for an error code.

Signed-off-by: Kavin Gunasekara <kavin.gunasekara@arm.com>
Signed-off-by: Meet Patel <meet.patel2@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2026-03-25 14:32:38 -06:00
Tom Rini
fce0358351 Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next 2026-03-25 11:09:34 -06:00
Tom Rini
5a36f43425 Merge tag 'mediatek-for-next-2026-03-24' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
- MAINTAINERS patch for new MediaTek custodians
- MediaTek pinctrl fix to allow using GPIOs on recent platforms
- The rest is a second wave of MediaTek clock refactoring to remove
  duplicate ways of doing the same thing.
2026-03-25 11:09:08 -06:00
David Lechner
730958e9b0 clk: mediatek: mt7623: fix pericfg priv_auto size
Change the pericfg priv_auto size to mtk_clk_priv. The driver is
registered using mtk_common_clk_infrasys_init() which expect that
struct.

The old value of struct mtk_cg_priv was larger, so there was no issue
out of bounds access.

Also replace tab with space to be consistent with the surrounding code.

Reported-by: Julien Stephan <jstephan@baylibre.com>
Closes: https://lore.kernel.org/u-boot/CAEHHSvYMiCZ4jAXp6jEhg6AhZ5Dv3_Ak-8H1mT7S2FPD3_X7dw@mail.gmail.com/
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260313-clk-mtk-fix-priv-auto-size-v1-1-bc649e1b301a@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 12:32:02 -05:00
Julien Stephan
71e736ed6d pinctrl: mediatek: Add missing bind callback for several SoCs
Commit f4df9f53b7 ("pinctrl: mediatek: Bind gpio while binding pinctrl")
refactored pinctrl-mtk-common.c and the SoC-specific drivers to register
the gpiochip during the bind phase instead of probe. As part of this
change, each SoC driver must implement a bind callback.

The drivers recently added for mt8188, mt8189, mt8195 and mt8365 do not
define this callback, which prevents the gpiochip from being registered
properly.

Add the missing bind callback to these drivers.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260312-pinctrl-mtk-bind-gpio-v1-1-21b8968902ed@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:10:27 -05:00
David Lechner
f82f50caa1 MAINTAINERS: add new MediaTek custodians
Add new MediaTek custodians and the new MediaTek custodian's git
repository to the MAINTAINERS file.

Julien and I have volunteered to act as custodians for MediaTek since
we have been actively working on upstreaming MediaTek support for some
some time now.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260311-mtk-custodians-v1-1-000f9025b54c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:08:35 -05:00
David Lechner
f2ee4a4934 clk: mediatek: remove CLK_PARENT_XTAL
Remove the CLK_PARENT_XTAL flag and related code. These have no more
users.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-16-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:24 -05:00
David Lechner
a3ff5a9586 clk: mediatek: mt8518: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-15-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:21 -05:00
David Lechner
ecea053c46 clk: mediatek: mt8516: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-14-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:18 -05:00
David Lechner
93a3f1677b clk: mediatek: mt8512: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-13-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:14 -05:00
David Lechner
c15c522fa3 clk: mediatek: mt8365: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-12-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:11 -05:00
David Lechner
7c95a2a95c clk: mediatek: mt8195: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-11-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:08 -05:00
David Lechner
bd54772439 clk: mediatek: mt8188: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-10-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:04 -05:00
David Lechner
999c169c35 clk: mediatek: mt8183: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-9-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:04:01 -05:00
David Lechner
e60c459757 clk: mediatek: mt7988: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-8-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:58 -05:00
David Lechner
b8189e6e14 clk: mediatek: mt7987: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-7-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:55 -05:00
David Lechner
7ad6dab0dc clk: mediatek: mt7986: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-6-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:51 -05:00
David Lechner
ca0d2abc27 clk: mediatek: mt7981: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-5-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:48 -05:00
David Lechner
57a3c93336 clk: mediatek: mt7629: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-4-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:45 -05:00
David Lechner
284025cc6e clk: mediatek: mt7623: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-3-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:40 -05:00
David Lechner
bd07ed2064 clk: mediatek: mt7622: convert CLK_XTAL to CLK_PAD_CLK25M
Replace all uses of CLK_XTAL with CLK_PAD_CLK25M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-2-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:36 -05:00
David Lechner
39b6394831 clk: mediatek: replace xtal2_rate with struct mtk_parent
Replace the hard-coded xtal rate for PLL parents with struct mtk_parent.

This avoids declaring the same clock rate in multiple places and will
allow future drivers to use an arbitrary clock.

The variable is renamed to something that better indicate what the field
is actually used for.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-1-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:29 -05:00
David Lechner
6bbfa8fba5 clk: mediatek: mt8195: use ext_clock_rates
Convert the mt8195 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-2-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
f7d48558cf clk: mediatek: mt8188: use ext_clock_rates
Convert the mt8188 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-1-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
de935cb519 clk: mediatek: mt8365: drop topckgen map
Drop the clock ID map for MT8365 TOPCKGEN clocks.

Previously, we didn't have the EXT clock feature, so we needed the map.
Now we can replace it with the new feature to avoid the map.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-clk-8365-drop-map-v1-1-17f81c375290@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
256499eebf clk: mediatek: refactor duplicate *_mux_get_rate()
Refactor two identical functions for getting mux clock rates. The
functions are renamed and moved to the section of the code that contains
other common functions.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-16-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
84c89c2529 clk: mediatek: remove CLK_PARENT_MIXED flag
Remove CLK_PARENT_MIXED and all dead code paths related to it.

All mux clocks have been converted to use struct mtk_parent (the
parent_flags field of the parent/parent_flags union). Use of this
struct was indicated by CLK_PARENT_MIXED. Now, this is always the case
and we can drop the flag and the union. All MUX_MIXED* macros are
change to use the equivalent MUX* macros since we no longer need to
set the flag.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-15-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
a56b24bf58 clk: mediatek: remove use of CLK_BYPASS_XTAL flag
Remove the CLK_BYPASS_XTAL flag completely.

It was a bit of a hack that was meant to handle mux clocks that had
mixed parents (e.g. XTAL and TOPCKGEN). The idea was that if you didn't
have CLK_XTAL as a parent, then you were supposed to add the
CLK_BYPASS_XTAL flag to the clock tree. There are likely a number of
drivers missing this since it is not intuitive.

In the meantime, we have introduced the CLK_PARENT_MIXED flag which
handles this more robustly. All of the affected drivers (the ones
without CLK_BYPASS_XTAL) have been updated to use CLK_PARENT_MIXED, so
the CLK_BYPASS_XTAL flag is no longer needed on other drivers.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-14-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
cc8738cadc clk: mediatek: mt8518: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-13-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
585748a716 clk: mediatek: mt8516: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-12-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
e4ade301ca clk: mediatek: mt8512: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-11-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
ec7f2425a1 clk: mediatek: mt8365: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-10-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
3c46c551fa clk: mediatek: mt8195: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-9-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
d632daabdc clk: mediatek: mt8188: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-8-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
326d9c01f8 clk: mediatek: mt8183: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-7-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
a2d600dba3 clk: mediatek: mt7988: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-6-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
1ed05de4ab clk: mediatek: mt7987: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-5-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
8fd90b148f clk: mediatek: mt7981: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-4-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
5e145c0448 clk: mediatek: mt7629: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-3-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
b3455b3986 clk: mediatek: mt7623: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-2-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
c4173429db clk: mediatek: mt7622: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-1-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
Tom Rini
1ffc541eaf Merge patch series "DDR configuration refactor and 16GB dual-rank support"
Emanuele Ghidoli <ghidoliemanuele@gmail.com> says:

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

This series refactors the DDR configuration handling for the
Toradex Aquila AM69 board and adds support for a 16GB dual-rank
memory configuration, while changing the HW_CFG pins value to
DDR configurations mapping.

Link: https://lore.kernel.org/r/20260309155342.145432-1-ghidoliemanuele@gmail.com
2026-03-23 09:19:00 -06:00
Emanuele Ghidoli
39e014f43a board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration
Move the existing 16GB single-rank configuration to HW_CFG 0x03 and use
the previous HW_CFG 0x01 value for the new 16GB dual-rank configuration.

There is no hardware using the former 16GB single-rank configuration,
so reuse the HW_CFG value for the new 16GB dual-rank configuration,
which will be used in production.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-03-23 09:18:56 -06:00
Emanuele Ghidoli
f1fa422148 board: toradex: aquila-am69: refactor memory configuration
The memory controller configuration doesn't depend only on the memory
size, so refactor the code to use the memory configuration read from
the HW_CFG pin instead of the memory size.
Additionally, make use of one header file for all the memory
configurations.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-03-23 09:18:56 -06:00
Tom Rini
e1197b0cc2 Merge patch series "Provide a class for building filesystem images"
Simon Glass <sjg@chromium.org> says:

Create a class around mk_fs() to handle the common tasks of image
creation, such as managing scratch directories and cleaning up.

Start with a few small cleanups to mk_fs(), then convert the helper
to use a class.

Link: https://lore.kernel.org/r/20260309151307.831537-1-sjg@chromium.org
2026-03-23 09:18:38 -06:00
Simon Glass
3691b1e4ce test: Convert fs_helper to use a class
Create a class around mk_fs() (and later setup_image()) to handle the
common tasks of image creation. Many callers of fs_helper.mk_fs()
create their own scratch directories while users of
fs_helper.setup_image() rely on one being returned. Unify this by
adding 'srcdir' as a field while converting to a class.

The class delegates to the existing mk_fs() function for the actual
filesystem creation, adding lifecycle management for scratch
directories and the image file.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-23 09:18:30 -06:00
Simon Glass
d030dc34d6 test: fs_helper: Drop the size_gran argument
Nothing uses this argument, so make it a constant for now.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Christian Taedcke <christian.taedcke@weidmueller.com>
2026-03-23 09:18:30 -06:00
Simon Glass
ffaa324c89 test: Update comment for fs_helper.setup_image()
This function actually allows creating two partitions now, so update its
comment to match that.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-23 09:18:30 -06:00
Simon Glass
23e9906192 test: fs_helper: Add a quiet flag to mk_fs()
In many cases callers only want to see warnings and errors from the
filesystem-creation tools, not their normal output.

Add a quiet parameter to mk_fs() that suppresses the output of mkfs
and switches mcopy from verbose to quiet mode.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-23 09:18:29 -06:00
Simon Glass
fade4112da test: fs_helper: Allow passing the image filename
The mk_fs() function always generates its own image filename from the
prefix and fs_type. Some callers need to specify a custom leaf name
while still keeping the image under the persistent-data directory.

Add an fs_img parameter that accepts a leaf filename. When provided,
it is joined with persistent_data_dir instead of the default name.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-23 09:18:29 -06:00
Tom Rini
5600255dfc Merge tag 'fsl-qoriq-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29614

- Kconfig update for SCMI_FIRMWARE
- Add SCMI pinctrl driver
2026-03-23 09:16:21 -06:00
Tom Rini
056d77e93d Merge tag 'mmc-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot-mmc into next
CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/29613

- Add missing quote in error message in regulator
- Support for emmc 5.1b specification
2026-03-23 09:15:33 -06:00
Anshul Dalal
e853610b56 include: env: ti: move board specific scripts out of ti_common
bootcmd_ti_mmc had cpsw0_qsgmii_phyinit related scripts even though this
was only relevant for the j721e/j7200 SoCs. This patch instead factors
out those scripts into a generic 'board_init' which is called as part of
bootcmd_ti_mmc.

This allows boards to more easily add custom behaviour to the ti_mmc
bootflow instead of having to modify the ti_common.env file.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-23 09:15:10 -06:00
Heinrich Schuchardt
5d771fc684 board/BuR/zynq: don't select non-existent SPL_BINMAN_FDT
Symbol CONFIG_SPL_BINMAN_FDT does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@at.abb.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@at.abb.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260225063559.47481-1-heinrich.schuchardt@canonical.com
2026-03-23 15:02:30 +01:00
Tom Rini
5b55dbbf3e microblaze: Rework TARGET_MICROBLAZE_GENERIC implementation
As exposed by "make randconfig", some symbols such as
XILINX_MICROBLAZE0_PVR can be set without TARGET_MICROBLAZE_GENERIC but
have a transitive dependency on it. The easiest path of resolution here
is that since there is only one valid microblaze "board", rework that
symbol to be non-optional.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260317012412.4162279-1-trini@konsulko.com
2026-03-23 14:58:47 +01:00
Tom Rini
c54a0a8ed9 timer: Correct Kconfig entry for XILINX_TIMER
As exposed by "make randconfig", we have an issue with the dependencies
for XILINX_TIMER. This symbol is a case where we have one that covers
both main U-Boot and SPL. In this case, we need to select SPL_REGMAP not
when SPL is enabled but rather when SPL_TIMER is enabled (and in turn,
SPL_DM).

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260317012446.4162630-1-trini@konsulko.com
2026-03-23 14:58:47 +01:00
Padmarao Begari
07de5c1e01 arm64: versal2: Fix UFS boot command sequence
The BOOTENV_DEV_UFS macro is incomplete - it only initializes UFS
and scans SCSI devices but does not actually boot anything. This
causes the boot sequence to stop after scsi scan without loading
a kernel.

Update BOOTENV_DEV_UFS to set the devnum environment variable to
the UFS instance number, initialize the device using $devnum, and
delegate the boot process to the shared scsi_boot script. Remove
the explicit scsi scan, as it is already handled by scsi_boot.

This matches the pattern used by other boot device macros and
ensures that UFS devices can successfully boot using the distro
boot framework.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5447ce1d5c4a21b0b62ce76ad642296110364041.1772801284.git.michal.simek@amd.com
2026-03-23 14:58:47 +01:00
Michal Simek
6ead1d0b0f net: zynq_gem: Add support for dma-coherent flag
When dma-coherent DT property is passed there is no need to do any cache
operations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/10c7a40364162cc8d3c82cb3e64e043f49a5153e.1772437409.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
Padmarao Begari
0d96ce69d4 net: zynq_gem: clear TXSR transfer complete
The Zynq GEM TX status register retains the transfer‑complete bit
until it is explicitly cleared. The current flow waits for
transfer‑complete but never clears it, so on the next send the wait
loop returns immediately because transfer‑complete is already high.
This causes the driver to report TX completion before the new DMA
transfer has actually finished, which breaks back‑to‑back
transmissions. This issue causes timeouts during LWIP TFTP transfers
when cache coherency is enabled.
Fix this by explicitly clearing transfer‑complete (write‑to‑clear)
after the wait completes, so each transmit starts with a clean TXSR.

Co-developed-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Co-developed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f354680d43fba0f590a6fae693848e5bf7114ba5.1772437409.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
Michal Simek
3371da09c5 net: zynq_gem: Disable broadcast packets
There is no reason to react on broadcast packets that's why just ignore
them not to waste cycles on packets which are not for the platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e10793b7d72668343756edb66221f1415570250.1772437409.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
Padmarao Begari
834d589b8f spi: cadence_qspi: pulse controller reset at probe
The driver previously only deasserted the optional bulk reset,
leaving the controller in whatever state earlier stages left it and
risking failed probes or bad transfers. Assert the reset first, wait
10 µs, and then deassert so the OSPI block starts from a known state.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260215151639.3472200-1-padmarao.begari@amd.com
2026-03-23 14:58:46 +01:00
Padmarao Begari
1dcaeffc9c arm64: versal2: Enable GIC600 support
Add and enable the GIC600 support configuration by default for
Versal Gen 2.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e3135eee33282281572fbc960aa45b5d0f355158.1772098079.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
Venkatesh Yadav Abbarapu
79a647c6b7 spi: cadence_qspi: Disable the DAC mode in indirect read
Hang has been observed on QEMU, as it starts with indac
read and fills sram, but after dma is triggered, it tries
dac read instead (based on priority) which gets blocked.
Disable the DAC mode in indirect DMA read and enable back
for writes as DAC mode is used.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Tested-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250430050923.135256-1-venkatesh.abbarapu@amd.com
2026-03-23 14:58:46 +01:00
Michal Simek
c82aedd185 xilinx: Enable GPIO delay driver on Versal platforms
GPIO delay driver is necessary to use to extend delay times for USB hubs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6744d3a93f48658178a53d218a4a6ca2fbb050dd.1771325431.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
Michal Simek
f4b8135239 i2c: muxes: pca954x: Add support for pca9848
Add support for PCA9848 chip.

Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/72cadba2a21e9d5723d54994b898d8a6880042e0.1771229639.git.michal.simek@amd.com
2026-03-23 14:58:46 +01:00
David Lechner
9936e1083d dm: regulator: fix missing quote in error message
Fix a missing closing quote in the error message when a regulator name
is not unique.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 11:28:01 +08:00
Han Xu
67fc505228 mmc: Add support for eMMC 5.1B specification
Add support for eMMC specification version 5.1B by defining
MMC_VERSION_5_1B and including it in the version array.

eMMC 5.1B (JESD84-B51B) is a minor revision of the 5.1 specification
that primarily addresses MDT (Manufacturing Date) adjustment for dates
beyond 2025. This aligns with the Linux kernel commit 9996707822f82
("mmc: core: Adjust MDT beyond 2025").

Since the manufacturing date field is not currently used in U-Boot,
this change has no functional impact beyond proper device recognition.
It allows the driver to correctly identify and initialize eMMC devices
that report version 5.1B in their Extended CSD register.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 11:27:52 +08:00
Dan Carpenter
0cb160f1b6 scmi: pinctrl: add pinctrl driver for SCMI
This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = <0x19>;
                pinmux1: pinmux_test {
                        pinmux = <0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1>;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:58:20 +08:00
Dan Carpenter
33dbe00fbb scmi: update comments for scmi_pinctrl_config_set_in()
Delete some extra space characters to make checkpatch.pl happy:

WARNING: please, no space before tabs

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:58:20 +08:00
Dan Carpenter
264cbb1871 scmi: pinctrl: add pinctrl message IDs
Add all the pinctrl message IDs.  I renamed SCMI_MSG_PINCTRL_CONFIG_SET
to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:58:20 +08:00
Tom Rini
80bdc86db5 scmi: Rework SCMI_FIRMWARE implementation
As exposed by "make randconfig", how we have SCMI_FIRMWARE today is
incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has
a build-time dependency on OF_CONTROL being enabled, so add that.
Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not
select that symbol. In turn, a number of platforms need to now enable
SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:55:01 +08:00
Svyatoslav Ryhel
20531fa618 power: pmic: enable sysreset function with device tree property
Add a condition to enable the PMIC sysreset function via the
system-power-controller device tree property in addition to the existing
Kconfig dependency, provided the PMIC supports it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> # RK8xx
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
67ef43b491 board: lg: star: make panel fix optional
Currently, U-Boot fails with an FDT patching error if the LG Optimus 2X
device tree lacks a panel node. Since the panel is optional hardware,
patching should be optional as well. Fix this by allowing bootflow to
continue if the panel node is missing.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
670915a86e ARM: tegra: rename sdhci nodes to mmc
Align with existing Linux Tegra device trees to simplify using U-Boot
device trees as a base for future Linux adaptations.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
b0721ec89d ARM: tegra: remove unsupported properties from the max8907 node
Remove interrupt and GPIO controller properties from MAX8907 node since
the PMIC does not have any GPIO cells and does not expose any interrupt
features.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
da468e2da2 ARM: tegra: mot: change backlight LED source
Mot based devices use LM3532 LED controller with 3 sources. Panel
backlight uses LED 0 while keypad uses LED 1 and 2. Adjust device tree
accordingly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
a6a057ab17 ARM: tegra: surface-2: fix panel supply
Rename vdd-supply to power-supply according to the latest schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
dd701a47f5 ARM: tegra: lg-x3: fix panel property
Rename renesas,inversion to renesas,column-inversion according to latest
schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
490a923891 video: ltl106hl02: adjust power supply name
Rename vdd-supply to power-supply according to the latest schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
ecd3b67fcc video: r61307: adjust property name
Rename renesas,inversion to renesas,column-inversion according to latest
schema.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
b14a6635d8 input: cpcap_pwrbutton: simplify parent verification
Check for 'cpcap' within the compatible string, as various CPCAP
compositions always include this component.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
b0c5baa89b input: cpcap_pwrbutton: set default keycode fallback
Set a default fallback value if no keycode is defined

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:58 +02:00
Svyatoslav Ryhel
36b142e11f power: cpcap: make regulator node names case independent
The Linux kernel CPCAP driver uses uppercase regulator node names, while
this driver uses lowercase. Since regulator names can be case-insensitive,
update the driver to support both uppercase and lowercase node names.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:57 +02:00
Svyatoslav Ryhel
d79350d162 power: pmic: cpcap: add Mapphone and Mot compatibles
Add Mapphone and Mot compatibles supported by Linux kernel.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:57 +02:00
Svyatoslav Ryhel
0a1f0404a6 power: regulator: cpcap: remove bit_offset_from_cpcap_lowest_voltage
The bit_offset_from_cpcap_lowest_voltage value was inherited from the
downstream kernel as a quirk. With the correct voltage table, it is no
longer needed. An additional benefit is that SW1, SW2, and SW4 now share
the same voltage table.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:57 +02:00
Ion Agorria
412f766606 pwm: tegra: properly calculate pulse and frequency divider fields
The pulse width field requires better precision during calculation. Add a
proper frequency divider calculation based on the PWM clock instead of
hardcoding it to 1.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:58:40 +02:00
Jonas Schwöbel
2fcb08a2b4 pwm: tegra: fix pulse_width calculation
The pulse_width is expressed as N/256. A 100% duty cycle is only possible
when multiplied by 256 instead of 255.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:43:26 +02:00
Jonas Schwöbel
0623b8512e pwm: tegra: add set_invert PWM operation
Add active-low support to the PWM controller, useful for active-low
pwm-leds.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:43:26 +02:00
Jonas Schwöbel
5dcdbcf783 pwm: tegra: add probe function
When PWM config was updated the clock was restarted which caused loss of
previous configuration of other channels. Further this fixes a bug/hang
that can happen when set_enable was called before set_config.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-22 14:43:19 +02:00
Ion Agorria
1f32eff8ce ARM: tegra: ap: add debug prints for unknown SKU
Add debug log prints with a message that SKU is unknown.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-20 17:41:53 +02:00
Ion Agorria
0d26afc484 ARM: tegra: ap: add default fallback for Tegra20 SKU
Until now all Tegra chips except Tegra20 had a fallback if SKU is not
known. This caused issues previously when certain SKU wasn't known. Add a
fallback for Tegra20 aligning it with other Tegra SoC generations.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-20 17:41:53 +02:00
Ion Agorria
eb1f4fd719 ARM: tegra: ap: add support T20 A04 SKU id
Add definition for Tegra20 SKU 0x4 / A04 found in Sony Tablet P.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-20 17:41:53 +02:00
Svyatoslav Ryhel
ef1501932b doc: board: tegra: improve documentation
Remove redundant chapters, clarify and reword confusing sections.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2026-03-20 17:41:53 +02:00
Tom Rini
eb00c71050 Merge patch series "bootm: Clean up arch-specific, pre-OS clean-up"
Simon Glass <sjg@chromium.org> says:

Each arch does something slightly different before booting the OS. Some
archs even do different things depending on the CPU type.

It is quite hard to know what actually happens in the final milliseconds
before the OS boot.

This series attempts to start cleaning up U-Boot in this area.

The basic intent is to create a new bootm_final() function which can be
called by all archs. It provides some flags for a couple of necessary
variations but otherwise it is generic.

All architectures are converted over to use this new function.

board_quiesce_devices() is moved into bootm_final() so that all archs
benefit from it.

This series fixes a bug in device_remove() is fixed where removing a
parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave
children activated, since they do not match the flags. This fixes is
needed to avoid bootm_final() causing test failures on sandbox.

Future work could take this a little further:
- Convert EFI loader to use the same function
- Improve comments for cleanup_before_linux() across architectures
- Support fake-run tracing on all archs

Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org
2026-03-18 18:36:50 -06:00
Simon Glass
dc88ac7681 sandbox: Call bootm_final()
Add a call to bootm_final() before the simulated kernel jump. This
adds the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on sandbox.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
9c4edbddce xtensa: Call bootm_final()
Add a call to bootm_final() before jumping to the kernel. This adds
the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on Xtensa.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
7fec6d005b sh: Call bootm_final()
Add a call to bootm_final() before jumping to the kernel. This adds
the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on SH.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
81334489c0 nios2: Call bootm_final()
Add a call to bootm_final() before jumping to the kernel. This adds
the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on Nios2.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
3b4bd773e0 m68k: Call bootm_final()
Add a call to bootm_final() before jumping to the kernel. This adds
the "Starting kernel" message, bootstage tracking,
board_quiesce_devices() and dm_remove_devices_active() which were not
previously called on m68k.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Tested-by: Angelo Dureghello <angelo@kernel-space.org>
Acked-by: Kuan-Wei Chiu <visitorckw@gmail.com>
2026-03-18 13:17:34 -06:00
Simon Glass
15e58f975a powerpc: Call bootm_final()
Replace the open-coded bootstage_fdt_add_report() and
bootstage_report() with a call to bootm_final(). This also adds the
"Starting kernel" message, board_quiesce_devices() and
dm_remove_devices_active() which were not previously called on
PowerPC.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
96216ef507 mips: Call bootm_final()
Replace the open-coded bootstage_fdt_add_report() and
bootstage_report() with a call to bootm_final(). This also adds the
"Starting kernel" message, board_quiesce_devices() and
dm_remove_devices_active() which were not previously called on MIPS.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2026-03-18 13:17:34 -06:00
Simon Glass
b8806785c1 microblaze: Call bootm_final()
Replace the open-coded printf and bootstage_mark_name with a call to
bootm_final(). This also adds board_quiesce_devices() and
dm_remove_devices_active() which were not previously called on
MicroBlaze.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
47545a6411 arc: Call bootm_final()
Replace the open-coded printf and bootstage_mark_name with a call to
bootm_final(). This also adds board_quiesce_devices() and
dm_remove_devices_active() which were not previously called on ARC.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
ba992d3eac arm: Call bootm_final()
The ARM announce_and_cleanup() duplicates the common pre-boot steps.
Replace it with a call to bootm_final().

Drop the ARM weak board_quiesce_devices() definition since it is now
called from bootm_final() and the generic weak definition in bootm.h
is used instead.

Note that the printf() ordering changes slightly: it now prints before
bootstage processing rather than after, matching x86 and RISC-V.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-18 13:17:34 -06:00
Simon Glass
5759155b02 bootm: Stash bootstage data in bootm_final()
ARM stashes bootstage data to a known memory location before booting,
so the kernel can pick it up. Add this to bootm_final() so all
architectures benefit from it.

The bootstage_stash_default() function is a no-op when bootstage or
stashing is disabled.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-18 13:17:34 -06:00
Simon Glass
aa5ada5447 riscv: Call bootm_final()
The RISC-V announce_and_cleanup() duplicates the common pre-boot
steps. Replace it with a call to bootm_final().

Move board_quiesce_devices() into bootm_final() so it is available to
all architectures. Drop the RISC-V weak definition and header
declaration since the generic one in bootm.h is used instead.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-18 13:17:34 -06:00
Simon Glass
8240a48229 x86: Call bootm_final()
The x86 code in bootm_announce_and_cleanup() is very similar to the new
bootm_final() function, so just use the latter.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:34 -06:00
Simon Glass
1ec3ee670d bootm: Create bootm_final() for pre-boot cleanup
There are various functions which announce that booting is imminent and
do related preparation. Most of these are arch-specific.

In practice, most archs do a similar thing. It would be better to
have a common function, with perhaps some events for things that are
really arch- and board-specific.

Create a new bootm_final() function with the common pre-boot steps:
printing the "Starting kernel" message, recording bootstage data,
optionally writing bootstage to the FDT and printing a report, and
removing active devices.

Be careful to avoid using BIT() macros which are not available with host
tools.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-18 13:17:34 -06:00
Simon Glass
5cc969caf0 bootstage: Add some missing dummy functions
Neither bootstage_fdt_add_report() nor bootstage_report() has a dummy
double for when bootstage is disabled. Add them.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-18 13:17:34 -06:00
Simon Glass
3632b5d63c dm: Remove children when parent is removed by flags
When dm_remove_devices_active() removes devices using specialised flags
like DM_REMOVE_ACTIVE_ALL, a parent device may match (e.g. MMC has
DM_FLAG_OS_PREPARE) while its children do not. This deactivates the
parent but leaves children activated, an inconsistent state.

Later, when uclass_destroy() calls device_remove() with DM_REMOVE_NORMAL
on the already-deactivated parent, it returns early without touching the
children. The subsequent device_unbind() then fails because the children
are still activated.

Fix this by dropping only the DM_REMOVE_ACTIVE_ALL requirement for child
removal when the parent is being removed. This ensures children are
removed along with their parent, while still preserving other flags like
DM_REMOVE_NON_VITAL so that vital devices remain protected.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:33 -06:00
Simon Glass
714dd2252d dm: Move flags_remove() check before child removal
Move the flags_remove() call before device_chld_remove() and save the
result in a separate variable. This is just a refactoring with no
behaviour change, preparing for the next commit which needs to know
whether the parent will be removed before deciding how to remove its
children.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:33 -06:00
Tom Rini
28608c8087 Merge patch series "led: remove legacy API"
Quentin Schulz <quentin.schulz@cherry.de> says:

This migrates the last user of the legacy LED API, IMX233-OLinuXino and
net/bootp.c, to the modern LED framework.

I do have concern about being able to use BOOTP in SPL? In which case, I
should probably add an additional check on CONFIG_IS_ENABLED(LED) in
addition to IS_ENABLED(CONFIG_LED_BOOT)?

I haven't tested this as I do not own an IMX233-OLinuXino, so please
give this a try if you own this device.

Then, since there's no user left of this legacy API, it is entirely
removed.

Link: https://lore.kernel.org/r/20251120-legacy-led-removal-v1-0-369d44338358@cherry.de
2026-03-18 13:13:57 -06:00
Quentin Schulz
fcbf81694c led: remove legacy API
No user of the legacy LED API anymore (except Sunxi with the PinePhone
but that is now a Sunxi-specific implementation), so let's remove
anything related.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 13:07:36 -06:00
Quentin Schulz
765a126a2f led: migrate last legacy LED user (olinuxino+net) to modern LED framework
This migrates the last user of the legacy LED API, IMX233-OLinuXino, to
the modern LED framework.

The current implementation does the following:
 - lit the LED when booting,
 - turn off the LED the moment a BOOTP packet is received,

The first step is easily reproduced by using the
/options/u-boot/boot-led property to point at the LED. Unfortunately,
the boot-led is only lit by U-Boot proper at the very end of the boot
process, much later than currently. We can however force the LED on
whenever the GPIO LED driver is bound by marking the LED as
default-state = "on", and this happens slightly before board_init() is
called. We then do not need /options/u-boot/boot-led property for that
anymore.

However, the second step relies on /options/u-boot/boot-led and
CONFIG_LED_BOOT being set to reproduce the same behavior and requires us
to migrate net/bootp.c to the modern LED framework at the same time to
keep bisectability.

I couldn't figure out how to map CONFIG_LED_STATUS_BIT=778 to an actual
GPIO on the SoC but according to the schematics[1] only one LED is
present. I couldn't also map the SoC pin number to an actual GPIO from
the IMX23 manual, but there's already one GPIO LED specified in the
Device Tree so my guess is all of those are one and the same.

This was only build tested as I do not own this device.

[1] https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/iMX233-OLinuXino-Mini/1.%20Latest%20hardware%20revision/iMX233-OLINUXINO-MINI%20hardware%20revision%20E/iMX233-OLINUXINO-MINI_Rev_E.pdf

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 13:06:19 -06:00
Tom Rini
24db98cdf9 Merge tag 'u-boot-imx-next-20260318' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29557

- Add support for i.MX952.
- Add support for XPI1 on imx943_evk.
2026-03-18 08:45:37 -06:00
Tom Rini
637010c9a8 Merge tag 'dm-next-18mar26' of git://git.denx.de/u-boot-dm into next
Binman test-file reorganisation
Binman EFI-capsule PKCS11 support
2026-03-18 08:39:58 -06:00
Tom Rini
0e16a81439 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi into next
For once, replacing the legacy LED API with a more lean alternative,
just for sunxi's SPL. IIUC, this would be one step closer to dropping
this deprecated subsystem altogether.
Also adding two DRAM cleanups for the A133 SoC. There is a third patch
which requires some changes, will care about that later.

Gitlab CI passed, and I booted that briefly on an A133 board and some
board with a GPIO controlled power LED.
2026-03-18 08:39:15 -06:00
Tom Rini
eb53af2b4a Merge tag 'mediatek-for-next-2026-03-17' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
- A fix for mt8188 clock oscillator rates.
- New driver for mt8189 clocks.
- The rest is a first wave of a larger effort to refactor and clean up the
  mediatek clocks to replace various hacks that built up over time with
  something that is easier to understand and maintain.
2026-03-18 08:37:41 -06:00
Tom Rini
fac5bce2a1 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/29548
- board: starfive: Add Xunlong OrangePi RV
- board: starfive: Add VisionFive 2 Lite
- board: beagle: Add BeagleV-Fire
2026-03-18 08:37:03 -06:00
Wojciech Dubowik
e73443167b test: binman: Add test for pkcs11 signed capsule
Test pkcs11 URI support for UEFI capsule generation. Both
public certificate and private key are used over pkcs11
protocol.
Pkcs11-tool has been introduced as softhsm tool doesn't have
functionality to import certificates in commonly distributed
version (only in the latest).

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Wojciech Dubowik
e2c46d33cf binman: DTS: Add dump-signature option for capsules
Mkeficapsule can dump signature for signed capsules. It can
be used in test to validate signature i.e. with openssl.
Add an entry for device tree node.

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Wojciech Dubowik
a251d46e68 binman: Add dump signature option to mkeficapsule
It will be used to capsule signature verification.

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Wojciech Dubowik
84432436bf tools: mkeficapsule: Fix dump signature long option
Only short option has been present. Also rename dump_sig
to dump-sig to match with other parameter names.

Fixes: 16abff246b ("tools: mkeficapsule: add firmware image signing")

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-18 06:14:17 -06:00
Wojciech Dubowik
a8c8ebc806 binman: Accept pkcs11 URI tokens for capsule updates
With pkcs11 support in mkeficapsule we can now accept URI
tokens and not only files.

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Wojciech Dubowik
0c716a157b tools: mkeficapsule: Add support for pkcs11
With pkcs11 support it's now possible to specify keys
with URI format. To use this feature the filename must
begin "pkcs11:.." and have valid URI pointing to certificate
and private key in HSM.

The environment variable PKCS11_MODULE_PATH must point to the
right pkcs11 provider i.e. with softhsm:
export PKCS11_MODULE_PATH=<path>/libsofthsm2.so

Example command line:
tools/mkeficapsule --monotonic-count 1 \
 --private-key "pkcs11:token=EX;object=capsule;type=private;pin-source=pin.txt" \
 --certificate "pkcs11:token=EX;object=capsule;type=cert;pin-source=pin.txt" \
 --index 1 \
 --guid XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXX \
 "capsule-payload" \
 "capsule.cap"

Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-18 06:14:17 -06:00
Simon Glass
4d17632b9a binman: doc: Update binman_tests.rst for subdirectory layout
Update the guidance for adding new tests to describe the subdirectory
structure instead of the numbering scheme.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Simon Glass
d6b10d2021 binman: Drop the allow_failures parameter from run_test_coverage()
The allow_failures parameter in run_test_coverage() is no longer used
by any caller.

Drop it.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:17 -06:00
Simon Glass
dcdf2751c6 binman: Remove the coverage allow_failures list
Now that iMX8 has full coverage the allow_failures list in
RunTestCoverage() is no longer needed.

Drop the list.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
0cab35362d binman: test: Fix code coverage for iMX8 and cst bintool
Three files are currently missing test coverage: nxp_imx8mcst,
nxp_imx8mimage and cst

Add test methods to cover all missing code paths, trying to reuse the
same .dts files where possible.

This brings all three files to 100% coverage.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
b12f4bcf26 binman: test: Move shared key files to test/security/
Move key.key and key.pem into the security/ subdirectory. These are
used by security, vendor, and capsule tests but security is the most
natural home for key material. Update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
0a806c3eb6 binman: test: Move FIT signing test data to test/fit/
Move the signing-related test data (keys, certificates, OpenSSL and
SoftHSM2 configuration, dummy engine source) into the fit/ subdirectory
alongside the FIT DTS test files. Drop the 340_ prefix from files that
had it. Update the Makefile and all ftest.py references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
c28fbed349 binman: test: Move x86 binary test data to test/x86/
Move descriptor.bin, fitimage.bin.gz and ifwi.bin.gz into the x86/
subdirectory alongside the x86 DTS test files and update all
references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
1b044493e5 binman: test: Move remaining test files to test/entry/
Move the remaining 60 or so test files into an entry/ subdirectory.
These cover general entry types and features: entry args, fill, text,
env, compress, replace, template, collection, ELF, overlap, listing,
sections, symlink, TEE OS, and other miscellaneous entries. Drop the
numeric prefixes and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
544dec2778 binman: test: Move symbol test files to test/symbols/
Move about 10 test files for binman symbol patching into a symbols/
subdirectory. Drop the numeric prefixes and the redundant symbols_
filename prefix, and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
9c17d547c4 binman: test: Move vendor-specific test files to test/vendor/
Move about 20 test files for vendor-specific platform support (TI, NXP
i.MX, Renesas R-Car, Rockchip, PowerPC MPC85xx) into a vendor/
subdirectory. Drop the numeric prefixes and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
90a2b8c53d binman: test: Move UEFI capsule test files to test/capsule/
Move about a dozen test files for UEFI capsule creation (signed,
versioned, accept, revert) into a capsule/ subdirectory. Drop the
numeric prefixes and the redundant capsule_ filename prefix, and
update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
52d7fe3a45 binman: test: Move FIP/TF-A test files to test/fip/
Move about 15 test files for ARM Trusted Firmware FIP, ATF BL31, SCP,
OpenSBI, and BL1 entries into a fip/ subdirectory. Drop the numeric
prefixes and the redundant fip_ filename prefix, and update all
references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
3c55009463 binman: test: Move mkimage test files to test/mkimage/
Move about a dozen test files for mkimage entries into a mkimage/
subdirectory. Drop the numeric prefixes and the redundant mkimage_
filename prefix, and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
b405930c8b binman: test: Move ChromeOS test files to test/cros/
Move about 10 test files for ChromeOS entries (GBB, vblock, FMAP)
into a cros/ subdirectory. Drop the numeric prefixes and update all
references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
a39fdf2aad binman: test: Move CBFS test files to test/cbfs/
Move about a dozen test files for Coreboot File System entries into a
cbfs/ subdirectory. Drop the numeric prefixes and the redundant cbfs_
filename prefix, and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
dd487d0d55 binman: test: Move security test files to test/security/
Move about 20 test files for signing, encryption, hash, pre-load,
x509, and Xilinx bootgen entries into a security/ subdirectory. Drop
the numeric prefixes and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
62d2388401 binman: test: Move blob test files to test/blob/
Move about a dozen test files for blob, blob-ext, blob-ext-list,
fake-blob, and blob-symbol entries into a blob/ subdirectory. Drop
the numeric prefixes and the redundant blob_ filename prefix, and
update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
4f283a26e2 binman: test: Move FDT/fdtmap test files to test/fdt/
Move about 30 test files for FDT update, fdtmap, DTB compression,
alternates, and bootph into an fdt/ subdirectory. Drop the numeric
prefixes and the redundant fdt_ filename prefix, and update all
references.

Remove the unused no_alt_format.dts which has no references in any
test.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
4ed7c188f9 binman: test: Move FIT image test files to test/fit/
Move about 40 test files for FIT images (signing, external data,
split-elf, encryption, alignment, firmware loadables, templates) into
a fit/ subdirectory. Drop the numeric prefixes and the redundant fit_
filename prefix, and update all references.

Rename the three signature.dts variants to have unique names:
signature.dts, signature_multi_key.dts and signature_no_nodes.dts.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
Simon Glass
b6d35dcc5d binman: test: Move x86 and Intel test files to test/x86/
Move about 40 test files for x86 and Intel platform support (ROM,
microcode, ME, IFWI, FSP, descriptor, reset16, start16, FIT) into an
x86/ subdirectory. Drop the numeric prefixes and the redundant x86_
filename prefix, and update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
d076ec97f0 binman: test: Move U-Boot variant test files to test/xpl/
Move about a dozen test files for U-Boot image variants (SPL, TPL,
VPL, DTB, nodtb, bss-pad) into an xpl/ subdirectory. Drop the
numeric prefixes and the redundant u_boot_ filename prefix, and
update all references.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
03d5ef3063 binman: test: Move pack/layout test files to test/pack/
Move about 50 test files related to basic layout, packing, alignment,
sections, and image structure into a pack/ subdirectory. Drop the
numeric prefixes from the filenames and update all references in
ftest.py, entry_test.py, and binman_tests.rst

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 06:14:16 -06:00
Simon Glass
b16319c643 binman: test: Capture output from tests with warnings
Tests are supposed to run silently and capture any output produced.

Fix testRemoveTemplate() so that the message about the missing openssl
is captured, along with the invalid-images message.

Fix testNxpImx9Image() as well, since it is expected that container.img
and bl31.bin are missing.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 06:14:16 -06:00
David Lechner
142c805d47 clk: mediatek: set CLK_PARENT_XTAL on fixed factor clocks
Explicitly set the CLK_PARENT_XTAL flag for fixed factor clocks.

Prior to this, it was assumed that clock ID 0 was CLK_XTAL and other
IDs used a different clock tree when no parent was explicitly set.
Making the parent explicit will allow us to remove this confusing
behavior in the future.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-8-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
7595833599 clk: mediatek: move common PARENT macros to header
Move repeated *_PARENT() macros from chip-specific .c files to the
common mtk-clk.h file.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-4-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
4e184ff5a0 clk: mediatek: add MUX_GATE_MIXED macros
Add new MUX_GATE_MIXED and MUX_GATE_MIXED_FLAGS macros for mixed parent
muxes that have a gate. These will be used in a few drivers where we
already have this type of mux clocks.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-3-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
e40978fff3 clk: mediatek: rename CLK_DOMAIN_SCPSYS
Rename CLK_DOMAIN_SCPSYS to CLK_MUX_DOMAIN_SCPSYS to make it more clear
that this flag only applies to MUX clocks and not other clock types.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-2-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
f922929828 clk: mediatek: rename HAVE_RST_BAR
Rename HAVE_RST_BAR to CLK_PLL_HAVE_RST_BAR. This makes it more clear
that this flag only applies to PLL clocks. Also add a blank line between
CLK_PLL_HAVE_RST_BAR and the CLK_MUX_ macros to keep the grouping of the
flags consistent.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-1-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
Paul Kocialkowski
98429b7be6 sunxi: a133: dram: Align parameters terminology with Allwinner
There is a mistmatch between Allwinner's dram_para BSP definitions and the
parameters names in mainline u-boot for TPR1-3. What we call TPR1 is actually
MR22 while TPR2 is TPR0 and TPR3 is TPR1. MR22 does get written to the
corresponding register. This only concerns LPDDR4 support.

Introduce a new Kconfig entry for MR22 and proceed with the rename.
Update the only config currently using it.

See the list of parameters from the Allwinner BSP at the end of:
https://linux-sunxi.org/A133/DRAMC

Note that the H616/H6 code is coherent with this new TPR0 definition
(and does not use TPR1 and MR22).

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Sponsored-by: MEC Electronics GmbH <https://www.mec.at/>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2026-03-17 23:27:24 +01:00
Paul Kocialkowski
3d76980947 sunxi: a133: dram: Fix PHY dx delays offsets and add dmb
Some of the offsets for the DRAM PHY dx delays are wrong (as compared
to the H616 code and the reference binary) since the
mctl_phy_dx_delay0_inner function does not perform the correct
calculation for some of them.

Introduce a mctl_phy_dx_delay0_inner0 to fix the incorrect offsets and
rename the existing function to mctl_phy_dx_delay0_inner1 for the
offsets it correctly handles.

Also add memory barriers that are also present in the H616 code while
at it.

This fixes detection of 4 GiB DRAM on some boards using LPDDR4.

Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Sponsored-by: MEC Electronics GmbH <https://www.mec.at/>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2026-03-17 23:27:24 +01:00
Chris Chen
4cce6acace clk: mediatek: add clock driver for MT8189
Add new clock driver for MedaiTek MT8189 and compatible SoCs.

Signed-off-by: Chris Chen <chris-qj.chen@mediatek.com>
Co-developed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-7-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:35:02 -05:00
Irving-CH Lin
290d17490e dt-bindings: clock: Add MediaTek MT8189 clock
Add IDs for the clocks of MediaTek MT8189 SoC.

Signed-off-by: Irving-CH Lin <irving-ch.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-6-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:55 -05:00
David Lechner
9776543804 clk: mediatek: add MUX_MIXED_CLR_SET_UPD_FLAGS() macro
Add a new MUX_MIXED_CLR_SET_UPD_FLAGS() macro. This is the same as
MUX_CLR_SET_UPD_FLAGS() except that it uses the parent_flags member
of the union instead of parent.

This will be needed by the incoming mt8189 clock driver.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-5-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:50 -05:00
David Lechner
b6d11f69ac clk: mediatek: add CLK_PARENT_EXT
Add support for external clock parent type in MediaTek clock driver to
allow multiple external clock sources.

This is intended to eventually replace CLK_PARENT_XTAL which only allows
a single external clock source. Replacing CLK_PARENT_XTAL is not trivial
since it would required touching all chip-specific drivers. So that is
saved for another day.

Before this change, the only way to add additional external clocks was
to use a clock ID mapping and add the external clock in the fixed clocks
portion of the CLK_PARENT_TOPCKGEN clocks. After this change, such hacks
are no longer necessary and external clocks can be added in a cleaner
way.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-4-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:47 -05:00
David Lechner
d09876c4f6 clk: mediatek: add mtk_clk_id_is_* helper functions
Add helper functions to check if a clock ID corresponds to a particular
clock type (mux, gate, fdiv). This simplifies the code and makes it more
readable.

Additionally, it removes the restriction that fdivs_offs < muxes_offs <
gates_offs by making the checking more strict in some places. This will
allow future drivers to not have to define a mapping to meet this
requirement.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-3-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:44 -05:00
David Lechner
00d0ff7f81 clk: mediatek: refactor parent rate lookup functions
Refactor duplicate parent rate lookup code into a common function.

Instead of relying on rules like X is always the parent of Y, we use
the driver ops pointer to make sure we are actually getting the correct
parent clock device. This allows the same function to be called from
different clock types and will allow future chip-specific clock drivers
to not have to follow the rules as strictly.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-2-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:35 -05:00
David Lechner
5d24726581 clk: mediatek: use correct struct type for infrasys clocks
Fix the private data type struct type in a couple of infrasys clock
functions.

struct mtk_cg_priv is a superset of struct mtk_clk_priv and has the same
layout at the beginning so there was no compile errors or runtime bugs.
This could only be found by inspecting the code.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-1-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:27 -05:00
David Lechner
4f821825c8 clk: mediatek: mt8188: fix CLK_TOP_CLK{13,26}M rates
Change CLK_TOP_CLK13M rate from 130_000_000 to 13_000_000 and
CLK_TOP_CLK26M rate from 260_000_000 to 26_000_000. As the names
suggest, these clocks are 13/26 MHz, not 130/260 MHz.

Fixes: 5e9bbbdab0 ("clk: mediatek: mt8188: add missing fixed clock")
Fixes: 11f3cc4632 ("clk: mediatek: add MT8188 clock driver")
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260305-clk-mtk-fix-mt8188-rates-v2-1-0ce2b5212775@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:07:09 -05:00
Jamie Gibbons
b51e59c8b3 riscv: Add support for BeagleV-Fire
Bring U-Boot support for the BeagleV-Fire by adding a device tree and
supporting board files etc.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 11:39:18 +08:00
Fabio Estevam
e4be6fc6ca doc: imx95_evk: Fix the binary name
U-Boot produces flash.bin as the final boot image when building for
the i.MX95 EVK, but the documentation refers to imx-boot-imx95.bin.

Update the instructions to use flash.bin when copying the image to
the SD card.

Signed-off-by: Fabio Estevam <festevam@nabladev.com>
2026-03-16 18:45:26 -03:00
Fabio Estevam
24f8b19afd doc: imx95_evk: Update Arm GNU toolchain version to 14.2
The imx-oei and imx-sm build systems defaults to:

  TC_VERSION ?= 14.2.rel1

but the documentation still instructs users to download the 13.3 toolchain.
This causes the build to fail because the expected directory name does
not exist.

Update the documentation to reference the 14.2 toolchain to match the build
system default.

Signed-off-by: Fabio Estevam <festevam@nabladev.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:45:26 -03:00
Alice Guo
306c7ce50b imx943_evk: Enable XSPI1
With this patch, XSPI1 are functional on the i.MX943 EVK board.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2026-03-16 18:44:58 -03:00
Ye Li
e1690715eb imx94_evk: Get ownership of XSPI control registers protected by GMID in SPL
To gain access to certain registers that are protected by GMID, the SPL
must release XSPI ownership to the current core.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:58 -03:00
Ye Li
1c6e3a7550 misc: ele_api: Add support for XSPI SET GMID command
The XSPI SET GMID command is used to assign GMID ownership to the
requester, allowing access to protected XSPI control registers. This API
must be called in SPL if XSPI GMID-protected settings need to be
modified. Otherwise, XSPI configuration depends on the previous GMID
owner to provide the correct settings.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:58 -03:00
Alice Guo
2875ae5969 spi: nxp_xspi: Add new driver for NXP XSPI controller
Add new driver to support NXP XSPI controller for NOR and NAND flash.
XSPI controller also uses a programmable sequence engine to provide
flexibility to support existing and future memory devices. It supports
single, dual, quad, octal modes of operation.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2026-03-16 18:44:58 -03:00
Francois Berder
262258dc75 liebherr: btt: Fix buffer overflow in board_fit_config_name_match
The maximum length of the board name is not 11 characters
but 14: 11 bytes for the prefix + 3 bytes for the u8 + 1 NULL byte.
Hence, this commit increases the size of the name buffer variable
to 15. Also, this commit fixes the format specifier for the rev_id
variable.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2026-03-16 18:44:33 -03:00
Niko Mauno
7d39e29350 misc: imx_ele: Fix compile without CMD_FUSE
If CONFIG_CMD_FUSE is not enabled in imx93_11x11_evk_defconfig, then
compilation fails with various undefined references to 'fuse_read',
such as:

  | .../arch/arm/mach-imx/imx9/soc.c:188:(.text.get_cpu_rev+0x38): undefined reference to `fuse_read'

therefore remove the 'fuse' command dependency in order to compile
fuse.c unconditionally to mitigate the issue.

Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
2026-03-16 18:44:13 -03:00
Peng Fan
d55cc91ab4 board: nxp: imx952_evk: Add i.MX952 15x15 lpddr4x board support
Add support for i.MX952 15x15 lpddr4x board support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2026-03-16 18:44:00 -03:00
Alice Guo
8f51aec3d1 arm: dts: Add U-Boot device tree for i.MX952 EVK
Add U-Boot specific device tree configuration for i.MX952 EVK board.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Peng Fan
38d8c286c2 arm64: dts: freescale: Add i.MX952 EVK basic device tree
Add i.MX952 EVK basic device tree, with UART1, SDHC[1,2] supported.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

[ upstream commit: a5aa8551d0046ec701e8962f83361165ccf640a4 ]

(cherry picked from commit bf18a0f083bdf73f806a3afb9b606b2cb0fcafb3)
2026-03-16 18:44:00 -03:00
Peng Fan
c3bb7bf1c0 arm64: dts: freescale: Add initial device tree for i.MX952
i.MX952 is designed for AI-powered sensor fusion and vision sensing
applications, it features 4 Corte-A55, 1 Cortex-M33, 1 Cortex-M7 and
NXP eIQ NPU and advanced graphics, video and advanced security with
edgelock. Product info could be found at:
https://www.nxp.com/products/i.MX-952

The basic device tree includes:
- clock, pin, power header files
- device nodes: CPU[0-3], SCMI firmware, Interrupt Controller, Sys counter,
  eDMA, MU, SPI, UART, I2C, USB and etc

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

[ upstream commit: b516a4dd6a1ff7ddbaf3ab30ddec88088a6ec9e6 ]

(cherry picked from commit 3546aa155a84b8af636d44c852c864845e654864)
2026-03-16 18:44:00 -03:00
Alice Guo
56b39ef00a arm: imx9: Keep WDG3/WDG4 untouched for i.MX952
On i.MX952, WDG3 and WDG4 are not used for system reset. PSCI is used
instead. Keep WDG3 and WDG4 in their default state rather than
explicitly disabling them.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2026-03-16 18:44:00 -03:00
Alice Guo
62a82fa290 cpu: imx952: Add i.MX952 support
This patch is used to add the imx type string of i.MX952 so that the
i.MX952 CPU info can be printed.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Alice Guo
9b3797dde7 arm: imx9: Add i.MX952 SoC support
Add basic SoC support for i.MX952:
- Add CONFIG_IMX952 Kconfig option
- Include i.MX952 clock and power headers
- Set CPU speed grade to 1.7GHz for i.MX952

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: David Zang <davidzangcs@gmail.com>
2026-03-16 18:44:00 -03:00
Alice Guo
b65ac8c001 imx: container: Add i.MX952 support to get_imageset_end()
Extend get_imageset_end() to handle i.MX952.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Alice Guo
0faea69eff imx: ele_ahab: Add i.MX952 support to display_life_cycle()
Extend display_life_cycle() to support i.MX952.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Alice Guo
14adc40001 arm: imx: Add i.MX952 CPU type support
Add CPU type definition and detection macro for i.MX952 SoC.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Ye Li
abbf4d7f30 pinctrl: nxp: Add i.MX952 support
Multiple pads can drive the same module input pin, and a daisy chain
register is used to select the active input path. This patch defines
DAISY_OFFSET_IMX952 (0x460) and allows binding on i.MX952.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Ye Li
ea8b1afcd5 imx95/imx94: Remove board_phys_sdram_size from each board
Change to use default board_phys_sdram_size implementation in soc.c,
which will call SM API to get DDR size.

If board has special implementation for DDR size, then board_phys_sdram_size
could be implemented in board file to override the default one in soc.c.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Ye Li
e1cc7117b6 imx9: scmi: Get DDR size through SM SCMI API
System Manager(SM) has implemented the MISC protocol to retrieve DDR
information. Using this API, U-Boot can obtain the DDR size dynamically
instead of relying on static configuration macros.

This change addresses the DDR ECC enabled case, where 1/8 of the total
DDR size is reserved for ECC data. The scmi_misc_ddrinfo() returns the
DDR size with EEC overhead already deducted.

Implementation details:
- Query the DDR size via scmi_misc_ddrinfo()
- Replace direct REG_DDR_CS[0,1]_BNDS register reads with SCMI call
- Switch from PHYS_SDRAM[x]_SIZE macros to runtime detection
- For backward compatibility with older SM firmware, fall back to
  static PHYS_SDRAM[x]_SIZE configuration if the SCMI call fails

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-03-16 18:44:00 -03:00
Quentin Schulz
256557dd9a sunxi: remove usage of legacy LED API
We are trying to get rid of the legacy LED API and PinePhone is one of
the last ones requiring it.

Unlike all other users of the legacy LED API, PinePhone is controlling
the GPIO LED in SPL. Unfortunately, Sunxi doesn't enable DM support in
SPL because of tight space constraints, so we cannot make use of the
modern LED framework as that is based on DM_GPIO.

Since PinePhone is the last user of this API, I'm moving the logic to
Sunxi SPL code and will let this community decide how to handle this hot
potato.

The logic is extremely simplified as only one GPIO LED is currently
controlled in SPL by PinePhone. No need for handling multiple LEDs or
inverted polarity, let's keep it simple.

This however allows us to use the modern LED framework once in U-Boot
proper since this logic won't collide with the new framework.

Since the only misc drivers that were compiled in SPL were guarded by
CONFIG_LED_STATUS and CONFIG_LED_STATUS_GPIO, we can also disable
CONFIG_SPL_DRIVERS_MISC (which does nothing anymore).

This also saves some space for PinePhone in SPL and proper.

Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-16 21:55:53 +01:00
E Shattow
1edeb52086 doc: board: starfive: jh7110 common update OPENSBI build env reference
Describe build with OpenSBI fw_dynamic.bin path as OPENSBI=<path> on the
same line instead of as an export. Also remedy a typo which had the wrong
directory path before the filename.

Fixes: 8304f32267 ("doc: board: starfive: update jh7110 common description")
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 01:36:57 +08:00
E Shattow
24662f698f doc: board: starfive: jh7110 common give build output dir by env not arg
Describe build with output directory as O=<dir> environment variable
and not unrelated -O <output sync> command line argument.

Fixes: 8304f32267 ("doc: board: starfive: update jh7110 common description")
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 01:36:57 +08:00
E Shattow
3ff56c603a doc: board: starfive: Add Xunlong OrangePi RV
OrangePi RV is a board that uses the same EEPROM product serial identifier
as the StarFive VisionFive 2 1.3b.

In fact it is not completely compatible with the StarFive VisionFive 2
1.3b for use with Linux Kernel however it is good enough for use with
U-Boot SPL and U-Boot Main. Describe how to set the devicetree search path
and, for advanced users, suggest that it is possible to update the EEPROM
data with an invented "XOPIRV" identifier for automatic board detection.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 01:36:57 +08:00
E Shattow
473c1a7669 configs: starfive: Add Orange Pi RV to visionfive2
Add Orange Pi RV to visionfive2 CONFIG_OF_LIST

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 01:36:57 +08:00
E Shattow
b2c92a7b1f board: starfive: visionfive2: Add Orange Pi RV selection by product_id
Add XOPIRV identifier for Orange Pi RV to dts selection callback in SPL,
and to fdtfile environment variable default value selection in payload.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
52c382798c board: starfive: visionfive2: Add VisionFive 2 Lite fdt selection
Set $fdtfile to the VisionFive 2 Lite DTB if the board is matched.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
f566788ca1 board: starfive: spl: Support VisionFive 2 Lite
Choose the matching FIT config on the VisionFive 2 Lite board.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
3e9ee92d7f configs: visionfive2: Add VisionFive 2 Lite DT to OF_LIST
So the VisionFive 2 Lite DT will be built and merged into FIT.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
a10587939b pcie: starfive: Add a optional power gpio support
Get and enable a optional power gpio. This feature is ported
from the jh7110 pcie driver in Linux. VisionFive 2 Lite needs
this gpio to enable the PCI bus device (M.2 M-Key) power.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
ab4f610deb eeprom: starfive: Support eeprom data format v3
Add eeprom data format v3 support. Add onboard_module field in
ATOM4 and add "mac onboard_module <?>" command to modify it.

The onboard module field marks the additional modules compared
with VisionFive 2 board. Now we define

bit7-1: reserved, bit0: WIFI/BT

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
78253aeeec eeprom: starfive: Correct get_pcb_revision_from_eeprom()
pcb_revision is stored in the pcb_revision field of ATOM4. Correct it.
Move the function description to the header file.
Return 0 instead of 0xFF if read_eeprom() fails.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: aea1bd95b6 ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Hal Feng
6015c98be5 eeprom: starfive: Simplify get_ddr_size_from_eeprom()
Directly return the DDR size instead of the field of 'DxxxExxx'.
Move the function description to the header file.
Return 0 instead of 0xFF if read_eeprom() fails.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: aea1bd95b6 ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2026-03-17 01:36:57 +08:00
Simon Glass
a27980786c kbuild: strip sub_make_done from test-script environment
The exported sub_make_done variable leaks into the environment of all
child processes. When make targets like tcheck spawn independent
make-invocations with O=, those child-makes inherit sub_make_done=1,
skip the KBUILD_OUTPUT setup and try to build in the source tree.

A global 'unexport sub_make_done' cannot be used because the build
system itself re-invokes the top-level Makefile for syncconfig (via
'$(MAKE) -f $(srctree)/Makefile syncconfig'). Without sub_make_done,
that child make re-enters the KBUILD_OUTPUT block and recomputes
abs_objtree. With a relative O= path this resolves to a nested
directory (e.g. build/build/) where .config does not exist.

Instead, use 'env -u sub_make_done' in the test-target recipes so only
the test scripts see a clean environment. This allows their child make
invocations to process O= correctly without affecting internal kbuild
recursion.

This is not strictly a bugfix, but compare with:

commit 27529f1cb0 ("kbuild: skip parsing pre sub-make code for recursion")

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-03-16 10:41:40 -06:00
Macpaul Lin
041364141b scsi: Adjust SCSI inquiry command data length
Per the SCSI SPC-4 specification, the standard inquiry data length
should not be less than 36 bytes. The current implementation uses 512
bytes, which causes detection failures on some UFS devices (e.g.,
Longsys) that do not expect a transfer length exceeding the standard
inquiry size.

Align the default standard inquiry length with the Linux kernel's
implementation (see drivers/scsi/scsi_scan.c), which uses 36 bytes as
the default. Devices requiring vendor-specific inquiry lengths should
be handled through quirk settings in the future.

Signed-off-by: ht.lin <ht.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-03-16 10:39:26 -06:00
Manorit Chawdhry
c4fcf9b806 board: ti: j7*: Update rm-cfg and tifs-rm-cfg
Repurpose the allocated resources with version V11.02.07 of
k3-resource-partition.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2026-03-16 10:37:29 -06:00
Vitor Soares
d89dd94c0a toradex: tdx-cfg-block: add aquila tda4 0223 pid4
Add PID4 0223 Aquila TDA4 Octa 16GB IT to config block handling.

Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-03-16 10:37:00 -06:00
Paresh Bhagat
948ccdc82f configs: Add fragment config for snagfactory tool
Introduce a new fragment configuration in u-boot to enable support for
the snagfactory tool [1], used for factory flashing of boards. Snagfactory
tool first recovers the board via USB DFU (peripheral boot), and then
uses fastboot to flash given binaries/images to MMC or other on-board
memory via USB. The fragment config can be used to generate boot binaries
for board recovery. This fragment config needs to be added additionally,
while building a53 images for USB DFU boot.

The fragment config enables configurations to allow flashing via
fastboot, manage MMC partitions and boot partitions, customize buffer
size and memory usage for fastboot and also integrate OEM commands and
UUU compatibility. It sets CONFIG_BOOTCOMMAND to start fastboot mode
immediately on startup. It also sets BOOTDELAY to 0 to reduce snagfactory
recovery time. Since BOOTCOMMAND and BOOTDELAY configs are being
modified, these changes cannot be placed in existing DFU fragment config.

Snagfactory used mtd support for flashing both SPI NAND and SPI NOR
devices. The fragment config enables mtd in u-boot and also allows SPI
flash to be treated as an MTD device.

[1]: https://github.com/bootlin/snagboot

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Signed-off-by: Mahammed Sadik Shaik <s-sadik@ti.com>
2026-03-16 10:36:34 -06:00
Tom Rini
841856ed96 Merge patch series "Add PCIe Boot support for TI J784S4 SoC"
Siddharth Vadapalli <s-vadapalli@ti.com> says:

This series adds PCIe endpoint boot support for the TI J784S4 SoC.
Series is based on commit f9ffeec4bd ("board: toradex: Make A53 get RAM
size from DT in K3 boards") of the master branch of U-Boot.

PCIe Boot Logs (J784S4-EVM running Linux as Root-Complex transfers
bootloaders to another J784S4-EVM configured for PCIe Boot):
https://gist.github.com/Siddharth-Vadapalli-at-TI/2d157003818441fe79a139d0dec1058a

Link: https://lore.kernel.org/r/20260216102858.2745657-1-s-vadapalli@ti.com
2026-03-16 08:24:18 -06:00
Hrushikesh Salunke
6230a595a7 docs: board: ti: j784s4_evm: Add PCIe boot documentation
Add PCIe boot documentation for J784S4-EVM including boot mode switch
settings, hardware setup requirements, endpoint configuration details
and step-by-step boot procedure.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
[s-vadapalli@ti.com: simplified and documented the pcie_boot_util program]
Co-developed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
078200f1ee configs: j742s2_evm_a72_defconfig: Disable PCIe boot configs
Although the J742S2 EVM supports PCIe boot in Hardware, since it is not
enabled yet in Software, disable PCIe boot related configurations that are
not applicable.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
2abd957503 configs: j742s2_evm_r5_defconfig: Disable PCIe boot configs
Although the J742S2 EVM supports PCIe boot in Hardware, since it is not
enabled yet in Software, disable PCIe boot related configurations that are
not applicable.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
af3800c83d configs: am69_sk_a72_defconfig: Disable PCIe boot configs
AM69 SK does not contain PCIe Boot in the list of supported Boot Modes.
Hence, disable PCIe Boot related configurations that are not applicable.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
014d9c5ac3 configs: am69_sk_r5_defconfig: Disable PCIe boot configs
AM69 SK does not contain PCIe Boot in the list of supported Boot Modes.
Hence, disable PCIe Boot related configurations that are not applicable.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
3c28bf7719 configs: j784s4_evm_a72_defconfig: Enable configs for PCIe boot
J784S4 SoC has two instances of PCIe, namely PCIe0 and PCIe1. The
PCIe1 instance is used for PCIe endpoint boot. Enable the configs
required for PCIe boot on the J784S4 platform.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
d83eefab8c configs: j784s4_evm_r5_defconfig: Enable configs for PCIe boot
J784S4 SoC has two instances of PCIe, namely PCIe0 and PCIe1. The
PCIe1 instance is used for PCIe endpoint boot. Enable the configs
required for PCIe boot on the J784S4 platform.

Additionally, enable configs for J721E WIZ SERDES wrapper, Cadence
Torrent PHY, and MMIO multiplexer. These are required to configure
the SERDES lanes at the R5 SPL stage for PCIe endpoint operation.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
35e1083fb9 phy: ti: Add config to enable J721E WIZ SERDES wrapper at SPL stage
Add SPL_PHY_J721E_WIZ configuration option to enable the WIZ SERDES
wrapper driver in SPL stage. This is required for PCIe boot support
where SERDES configuration must be done early in the boot sequence
before loading the bootloader image over PCIe.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:04 -06:00
Hrushikesh Salunke
2a21f48771 phy: cadence: Add config to enable Cadence Torrent PHY at SPL stage
Add SPL_PHY_CADENCE_TORRENT configuration option to enable the Cadence
Torrent PHY driver in SPL stage. This is required for PCIe boot support
where SERDES configuration must be done early in the boot sequence
before loading the bootloader image over PCIe.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-03-16 08:24:03 -06:00
Hrushikesh Salunke
0d5ddcc50b arm: mach-k3: j784s4: Update SoC autogen data to enable PCIe boot
To enable PCIe boot on J784S4 SoC SERDES0 and PCIE1 should be enabled
and configured at the R5 stage. Add the required clk-data and dev-data
for SERDES0 and PCIE1.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2026-03-16 08:24:03 -06:00
Tom Rini
fa3a11fcf0 Merge tag 'efi-2026-03-14' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request efi-2026-03-14

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29512

UEFI:

* Require at least 128 KiB of stack space to use EFI sub-system.
* Avoid buffer overrun in efi_var_restore().
* Avoid superfluous variable store writes on unchanged data
* Implement SPI Flash store for EFI variables.
* Add an efidebug ecpt sub-command to display the ECPT table
  and a unit test for the command.

Others:

* Add missing include string.h to make exception command build again.
* lib: uuid: add EBBR 2.1 conformance profile GUID
2026-03-16 08:23:18 -06:00
Tom Rini
071e914b4a Merge tag 'u-boot-dfu-20260316' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-20260316

DFU:
* Make DFU_WRITE_ALT symbol available outside of DFU
* Fix PCI subclass_code warning in spl_dfu

Usb Gadget:
* Mark udc_disconnect() as static
2026-03-16 08:22:58 -06:00
Tom Rini
4b77b07811 dfu: Make the DFU_WRITE_ALT symbol available outside of DFU
The DFU_WRITE_ALT symbol is used both directly and indirectly (via
UPDATE_COMMON) for EFI capsule updates (FIT or raw), but does not depend
on DFU itself. Move this symbol outside of "if DFU" to remove a Kconfig
dependency problem.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260310162621.1163932-1-trini@konsulko.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-03-16 10:38:47 +01:00
Heinrich Schuchardt
8f83a45966 cmd/exception: missing include string.h
When building qemu_arm64_defconfig with CMD_EXCEPTION a build error occurs:

    In file included from cmd/arm/exception64.c:87:
    include/exception.h: In function ‘exception_complete’:
    include/exception.h:41:23: error: implicit declaration of
    function ‘strlen’ [-Wimplicit-function-declaration]
       41 |                 len = strlen(argv[1]);
          |                       ^~~~~~

Add the missing include.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-14 08:36:53 +01:00
Shantur Rathore
5c83372fa6 efi_vars: Implement SPI Flash store
Currently U-Boot uses ESP as storage for EFI variables.
Devices with SPI Flash are used for storing environment with this
commit we allow EFI variables to be stored on SPI Flash.

Signed-off-by: Shantur Rathore <i@shantur.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905D3-CC
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-14 08:15:09 +01:00
Michal Simek
94c5c0835b efi_loader: avoid superfluous variable store writes on unchanged data
Every SetVariable() call triggers efi_var_mem_ins() followed by
efi_var_to_storage(), even when the variable value is not actually
changing. This is unfriendly to flash-backed stores that suffer
wear from unnecessary erase/write cycles.

Add a change-detection path to efi_var_mem_ins(): when size2 == 0
(i.e. not an append) and the caller passes a non-NULL changep flag,
look up the existing variable and compare attributes, length, time
and data byte-by-byte. If everything matches, set *changep = false
and return EFI_SUCCESS without touching the variable buffer.

Both efi_set_variable_int() and efi_set_variable_runtime() now
check the flag and skip efi_var_mem_del() / efi_var_to_storage()
when nothing changed.

Introduce efi_memcmp_runtime() - a runtime-safe byte-by-byte memory
comparison helper, following the same pattern as the existing
efi_memcpy_runtime(). The standard memcmp() is not available after
ExitBootServices() and calling it from Linux will crash.

Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-14 08:14:20 +01:00
Heinrich Schuchardt
a9080e600c efi_loader: avoid buffer overrun in efi_var_restore()
The value of buf->length comes from outside U-Boot and may be incorrect.
We must avoid to overrun our internal buffer for excessive values.

If buf->length is shorter than the variable file header, the variable
file is invalid.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-03-14 08:14:01 +01:00
Vincent Stehlé
41be502c1c test/py: add ECPT tests
Add a couple of EFI Conformance Profiles Table (ECPT) tests, which exercise
the "efidebug ecpt" command.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-03-14 08:10:26 +01:00
Vincent Stehlé
cf61db3ca8 cmd: efidebug: add ecpt command
Add an "efidebug ecpt" command, to print the conformance profiles in the
ECPT:

  => efidebug ecpt
  cce33c35-74ac-4087-bce7-8b29b02eeb27  EFI EBBR 2.1 Conformance Profile

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2026-03-14 08:10:26 +01:00
Vincent Stehlé
1ab6d0d6bd efi_loader: export efi_ecpt_guid
Export the ECPT GUID, to prepare accessing it from more than one location.

The C file containing the GUID is compiled only when CONFIG_EFI_ECPT is
set; gate the export accordingly.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2026-03-14 08:10:26 +01:00
Vincent Stehlé
f63e95d1aa lib: uuid: add EBBR 2.1 conformance profile GUID
Add support for printing the EFI_CONFORMANCE_PROFILE_EBBR_2_1_GUID as human
readable text.

This is compiled in only when CONFIG_CMD_EFIDEBUG and CONFIG_EFI_EPCT are
set.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2026-03-14 08:10:26 +01:00
Heinrich Schuchardt
ca495f011f efi_loader: require at least 128 KiB of stack space
The UEFI specification requires at least 128 KiB stack space. Consider this
value as a prerequisite for CONFIG_EFI_LOADER.

Mention the requirement in the CONFIG_STACK_SPACE description and decribe
that the UEFI sub-system uses CONFIG_STACK_SPACE when defining the memory
map.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-03-14 08:09:16 +01:00
Jonas Karlman
fab3b667b4 rockchip: rk3568: Include all addressable DRAM in memory map
Rockchip RK356x supports up to 8 GiB DRAM, however U-Boot only includes
the initial 32-bit 0-4 GiB addressable range in its memory map,
something that matches gd->ram_top and current expected memory available
for use in U-Boot.

The vendor DRAM init blobs add following ddr_mem rk atags [1]:

  4 GiB: [0x0, 0xf0000000) and [0x1f0000000, 0x200000000)
  8 GiB: [0x0, 0x200000000)

Add the remaining 64-bit 4-8 GiB addressable range, that already is
reported to OS, to the U-Boot memory map to more correctly describe all
available and addressable DRAM of RK356x. While at it also add the
missing UL suffix to the PCIe address range for consistency.

[1] https://gist.github.com/Kwiboo/6d983693c79365b43c330eb3191cbace

Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-13 16:17:15 -06:00
Tom Rini
adaa6203df Merge patch series "arm: dts: k3-am68-r5-phycore-som: Add PMIC ESM node"
This series from Dominik Haller <d.haller@phytec.de> adds and enables
support for the PMIC ESM node on some phycore-som based platforms.

Link: https://lore.kernel.org/r/20260227014202.332157-1-d.haller@phytec.de
2026-03-13 16:17:15 -06:00
Tom Rini
1ad466eeae Merge patch series "k3_*: Add config fragments for inline ECC and BIST"
Neha Malcom Francis <n-francis@ti.com> says:

Typically we do not enable these configs by default but would still like to
have the option to start building them in our default build flow for
testing. Also there is the added advantage of users being able to see what
is needed in case they choose to enable these features.

Link: https://lore.kernel.org/r/20260226122508.2269682-1-n-francis@ti.com
2026-03-13 16:17:15 -06:00
Dominik Haller
1fc549959f configs: phycore_am68x_r5_defconfig: Add ESM and AVS configs
Add TPS6287X which provides VDD_CPU_AVS and ESM_K3+ESM_PMIC for the
watchdogs.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
2026-03-13 16:17:15 -06:00
Neha Malcom Francis
112bb95124 doc: board: ti: Add support for config fragment builds
Add sections dedicated to explaining how BIST and inline ECC can be
enabled via the config fragments.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2026-03-13 16:17:15 -06:00
Dominik Haller
965764975e arm: dts: k3-am68-r5-phycore-som: Add PMIC ESM node
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
2026-03-13 16:17:15 -06:00
Neha Malcom Francis
e56228f32d configs: k3_*: Add config fragments for enabling inline ECC and/or BIST
Add config fragment support for enabling inline ECC and/or BIST on TI K3
supported platforms.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2026-03-13 16:17:15 -06:00
Tom Rini
e298a3faa3 Merge patch series "Minor fixes for the k3_fuse driver"
Anshul Dalal <anshuld@ti.com> says:

This series adds some minor *non-critical* fixes to the k3_fuse misc
driver in U-Boot.

Link: https://lore.kernel.org/r/20260226-k3_fuse_fixes-v1-0-86c81c298bc5@ti.com
2026-03-13 14:58:33 -06:00
Vignesh Raghavendra
34c7bcacfa misc: k3_fuse: Limit writes to 25bit values
K3 OTP bits can only be programmed 25bits at a time. Limit the value
accordingly using a 25 bit mask.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-13 14:58:27 -06:00
Vignesh Raghavendra
b533d457ae misc: k3_fuse: Enable fuse Sense support
fuse sense is essentially read, map it to fuse read.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-13 14:58:27 -06:00
Vignesh Raghavendra
494782b6e0 misc: k3_fuse: Check readback on fuse prog
Error out if readback value doesn't match the programmed value.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-13 14:58:27 -06:00
Vignesh Raghavendra
e98e9b1ec9 misc: k3_fuse: Fix printing of error codes
Use signed int format to print error codes so that its more readable

Fixes: ed5f2e5bed ("drivers: k3_fuse: Add fuse sub-system func calls")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2026-03-13 14:58:27 -06:00
Tom Rini
7403d26bea Merge patch series "board: k3: Sync rm-cfg with TIFS v11.02.09 firmware"
Sparsh Kumar <sparsh-kumar@ti.com> says:

This series updates the Resource Management (RM) configuration files
for AM62 family devices to align with the TIFS v11.02.09 firmware.

Background
----------
With the latest TIFS firmware (v11.02.09), an additional virtual
interrupt and event is reserved for MCU cores to DM usage on am62x,
am62ax, and am62px devices. This series brings the rm-cfg and
tifs-rm-cfg files in sync with these firmware changes across both
TI reference boards and vendor boards.

These changes are backward compatible with older TIFS firmware versions.

Additionally, the am62x platform was originally introduced without a
tifs-rm-cfg.yaml file, unlike other platforms in the AM62 family.
This series addresses that gap and enables tifs-rm-cfg in binman for
am625-sk and am62p-sk platforms.

Changes
-------
TI reference boards (patches 1-4):
  - Update rm-cfg.yaml for am62x, am62ax, am62px
  - Sync am62px tifs-rm-cfg.yaml with TIFS firmware template
  - Add missing tifs-rm-cfg.yaml for am62x
  - Enable tifs-rm-cfg in binman for am625-sk and am62p-sk

Vendor boards (patches 5-9):
  - beagleplay (am62x-based)
  - phytec phycore_am62x
  - toradex verdin-am62
  - phytec phycore_am62ax
  - toradex verdin-am62p

with the required interrupt reservation. The tifs-rm-cfg.yaml files
cannot be updated without access to the corresponding SysConfig files,
as both rm-cfg.yaml and tifs-rm-cfg.yaml must remain in sync.

Link: https://lore.kernel.org/r/20260225132425.3096103-1-sparsh-kumar@ti.com
2026-03-13 14:58:17 -06:00
Sparsh Kumar
a66704e9a1 board: toradex: verdin-am62p: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62px devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
73b8caf965 board: phytec: phycore_am62ax: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62ax devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
64ebab10b5 toradex: verdin-am62: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62x devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
19b9af32b2 board: phytec: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62x devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
2a64978fa8 board: beagle: beagleplay: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62x devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
41814276f0 arm: dts: k3: am62x/am62px: Enable tifs-rm-cfg in binman
Add rcfg_yaml_tifs node override to use tifs-rm-cfg.yaml instead of
the default rm-cfg.yaml for am625-sk and am62p-sk platforms.

This enables binman to include the tifs-rm-cfg.yaml configuration
when building tiboot3 images, bringing these platforms in line with
other K3 devices like am62a-sk that already use tifs-rm-cfg.yaml.

This builds on the tifs-rm-cfg files added/updated earlier in this series.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2026-03-13 14:57:21 -06:00
Sparsh Kumar
964bda9e80 board: ti: am62x: tifs-rm-cfg: Add the missing tifs-rm-cfg:
The am62x platform was originally introduced without a
tifs-rm-cfg.yaml file. Add the tifs-rm-cfg to bring am62x
in line with other am62 family of devices (am62px and am62a)
which all include this file.

This complements the rm-cfg update earlier in this series.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:20 -06:00
Sparsh Kumar
f2c4fb442d board: ti: am62px: tifs-rm-cfg: Sync tifs-rm-cfg with TIFS firmware updates
Synchronize tifs-rm-cfg file with the latest v11.02.09
TIFS firmware rm configuration:

 - Update am62px tifs-rm-cfg with revised resource allocations
 - Apply formatting updates to align with TIFS template

This brings tifs-rm-cfg in sync with the rm-cfg changes
earlier in this series.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:20 -06:00
Sparsh Kumar
7f9c2a6f7b board: ti: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest v11.02.09 TIFS firmware, an additional
virtual interrupt and event is reserved for MCU cores
to DM usage on am62x, am62ax and am62px devices.

Update the rm-cfg to reflect this new reservation.

Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
2026-03-13 14:57:20 -06:00
Caleb Ethridge
f3bdde84af arm: dts: sc594: Update sc594 EZKIT GPIO polarities
Updates the polarities for the GPIOs on the sc594
EZKIT carrier board for the newest revision, Rev D.
The new carrier board revision has different polarities
for some GPIOs. This patch updates the sc594 entries
to match the sc598 entries that were updated in a previous
commit, as both SOMs can utilize the EZKIT.

Note that these updates are for the EZKIT carrier
board used by both sc598 and sc594 SOMs, not the SOMs themselves.

Fixes: be79378 ("board: adi: Add support for SC594")
Signed-off-by: Caleb Ethridge <caleb.ethridge@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-13 13:22:04 -06:00
Anton Moryakov
21edd76ade linux_compat: fix NULL pointer dereference in get_mem()
Add NULL check after memalign() call in get_mem() to prevent
potential NULL pointer dereference (CWE-476).

The function memalign() can return NULL on allocation failure.
Dereferencing the returned pointer without checking for NULL
may cause a crash in low-memory conditions.

Changes:
- Add NULL check after memalign() allocation
- Return NULL on failure, consistent with function semantics

This fixes the static analyzer warning:
  linux_compat.c:34: dereference of memalign return value without NULL check

Reported-by: static analyzer Svace
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-13 13:22:01 -06:00
Nikita Shubin
660d8e4fe9 serial: ns16550: Fix return-type warning
Fix compiler warning:

drivers/serial/ns16550.c: In function ‘serial_in_dynamic’:
drivers/serial/ns16550.c:153:1: warning: control reaches end
    of non-void function [-Wreturn-type]
  153 | }
      | ^

Observed with gcc 15.2.1:

$ riscv64-unknown-linux-gnu-gcc --version
riscv64-unknown-linux-gnu-gcc (Gentoo 15.2.1_p20260214 p5) 15.2.1

Fixes: 62cbde4c4e ("serial: ns16550: Support run-time configuration")
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-13 13:21:59 -06:00
Anurag Dutta
6a23c079b8 arm: dts: k3-j721s2*: Enable OSPI1 with 32-bit address mappings for R5 SPL
The R5 SPL requires 32-bit address mappings for OSPI1(QSPI) access.
Override the OSPI1 node with appropriate 32-bit register ranges to
enable proper address translation on the 32-bit R5 core, while
preserving 64-bit mappings for A72 cores. While at it, remove the
disabled status override for ospi1 node to support booting from
qspi.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2026-03-13 13:21:55 -06:00
Michal Simek
60ef345b1a spl: Remake SPL elf from bin
On Xilinx MB-V there is a need to use ELF file for SPL which is placed
in BRAM (Block RAM) because tools for placing code to bitstream requires to
use ELF. That's why introduce SPL_REMAKE_ELF similar to REMAKE_ELF option
as was originally done by commit f4dc714aaa ("arm64: Turn u-boot.bin back
into an ELF file after relocate-rela").

There is already generic and simple linker script (arch/u-boot-elf.lds)
which can be also used without any modification.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2026-03-13 13:21:52 -06:00
Heinrich Schuchardt
7f35a4251d sandbox: symbol CONFIG_DM_SOUND does not exist
The correct configuration symbol is CONFIG_SOUND.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-13 13:21:49 -06:00
Dimitrios Siganos
e7ad95aa3f spl: spi: fix loss of spl_load() error on soft reset
When CONFIG_SPI_FLASH_SOFT_RESET is enabled, spi_nor_remove() is called
after spl_load() to switch the flash back to legacy SPI mode. However,
the return value of spi_nor_remove() unconditionally overwrites the
return value of spl_load(), discarding any load error.

Fix this by preserving the spl_load() error and only propagating the
spi_nor_remove() error as a fallback. Also log a message when
spi_nor_remove() fails, since in the case where spl_load() already
failed its error would otherwise be silently discarded.

Signed-off-by: Dimitrios Siganos <dimitris@siganos.org>
2026-03-13 13:21:46 -06:00
Marek Vasut
a3075db94d lmb: Reinstate access to memory above ram_top
Revert commit eb052cbb89 ("lmb: add and reserve memory above ram_top")
and commit 1a48b0be93 ("lmb: prohibit allocations above ram_top even from
same bank"). These are based on incorrect premise of the first commit, that
"U-Boot does not use memory above ram_top". While U-Boot itself indeed does
not and should not use memory above ram_top, user can perfectly well use
that memory from the U-Boot shell, for example to load content in there.

Currently, attempt to use that memory to load large image using TFTP ends
with "TFTP error: trying to overwrite reserved memory...". With this change
in place, the memory can be used again.

Fixes: eb052cbb89 ("lmb: add and reserve memory above ram_top")
Fixes: 1a48b0be93 ("lmb: prohibit allocations above ram_top even from same bank")
Reported-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-13 13:20:11 -06:00
Tom Rini
dba21bf0b6 Merge tag 'u-boot-ufs-20260313' of https://source.denx.de/u-boot/custodians/u-boot-ufs into next
- ufs_hba_ops callbacks cleanup
- Rockchip UFS reset support
- UFS support in SPL
2026-03-13 10:52:03 -06:00
Tom Rini
2f52473884 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/29497
- sifive: switch to OF_UPSTREAM
- driver: cache: Remove SiFive PL2 driver
- riscv: fixes for non-existent CONFIG
2026-03-13 10:52:03 -06:00
Tom Rini
6dc75d440d Merge tag 'net-20260312' of https://source.denx.de/u-boot/custodians/u-boot-net into next
Pull request net-20260312.

net:
- Move network PHY under NETDEVICES
- s/DM_CLK/CLK/ in HIFEMAC_{ETH,MDIO}
- Add support for Airoha AN8811HB PHY
- airoha: PCS and MDIO support for Airoha AN7581 SoC

net-lwip:
- Fix issue when TFTP blocksize is >8192
- Adjust PBUF_POOL_SIZE/IP_REASS_MAX_PBUFS for better performance and
  resource usage.
- Enable mii command for NET_LWIP
2026-03-13 10:52:03 -06:00
Tom Rini
a5fcbd5a83 net: Move network PHY under NETDEVICES
A number of network PHY drivers have Kconfig dependencies on various
network drivers under NETDEVICES. This is in addition to logical
dependencies of network PHYs needing network drivers. Resolve the
Kconfig problems by moving the network PHY lines to be after the network
devices, within the overall NETDEVICES guard.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
2026-03-13 10:52:02 -06:00
Pranav Tilak
6758601249 net: lwip: scale buffer pool size with TFTP block size
TFTP transfers fail when tftpblocksize is set to 8192 or larger due to
insufficient buffer resources for IP fragment reassembly.

Calculate PBUF_POOL_SIZE and IP_REASS_MAX_PBUFS dynamically based on
CONFIG_TFTP_BLOCKSIZE using IP fragmentation boundaries (1480 usable
bytes per fragment at 1500 MTU). The pool size includes headroom for
TX, ARP, and protocol overhead, while ensuring PBUF_POOL_SIZE remains
greater than IP_REASS_MAX_PBUFS as required by lwIP.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
2026-03-13 10:52:02 -06:00
Jonas Karlman
b3ee14ea6d net: lwip: Fix PBUF_POOL_BUFSIZE when PROT_TCP_LWIP is disabled
The PBUF_POOL_BUFSIZE ends up being only 592 bytes, instead of 1514,
when PROT_TCP_LWIP Kconfig option is disabled. This results in a full
Ethernet frame requiring three PBUFs instead of just one.

This happens because the PBUF_POOL_BUFSIZE constant depends on the value
of a TCP_MSS constant, something that defaults to 536 when PROT_TCP_LWIP
is disabled.

  PBUF_POOL_BUFSIZE = LWIP_MEM_ALIGN_SIZE(TCP_MSS + 40 + PBUF_LINK_HLEN)

Ensure that a full Ethernet frame fits inside a single PBUF by moving
the define of TCP_MSS outside the PROT_TCP_LWIP ifdef block.

Fixes: 1c41a7afaa ("net: lwip: build lwIP")
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2026-03-13 10:52:02 -06:00
Heinrich Schuchardt
1939a7f7fb net: do not use non-existent CONFIG_DM_CLK
For enabling the clock driver we use symbol CONFIG_CLK.
Select this symbol for the HiSilicon Fast Ethernet Controller driver.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-13 10:52:02 -06:00
Tommy Shih
2a8bb06ff5 net: phy: air_en8811: add support for Airoha AN8811HB PHY
Add support for the Airoha AN8811HB 2.5 Gigabit PHY to the existing
en8811h driver. This PHY supports 10/100/1000/2500 Mbps speeds.

Update the driver to recognize the AN8811HB PHY ID and handle its
specific firmware loading requirements. The firmware loading mechanism
remains consistent with the existing implementation.

This driver is based on:
  - Linux upstream PHY subsystem (v7.0-rc1)
  - air_an8811hb v0.0.4 out-of-tree uboot driver written by
    "Lucien.Jheng <lucien.jheng@airoha.com>"

Tested on MT7987 RFB board.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=6f1769ec5892ac41d82e820d94dcdc68e904aa99
Link: https://patchwork.kernel.org/project/netdevbpf/patch/20260122071601.1057083-3-bjorn@mork.no/
Signed-off-by: Tommy Shih <tommy.shih@airoha.com>
Reviewed-by: Lucien.Jheng <lucienzx159@gmail.com>
2026-03-13 10:51:46 -06:00
Heinrich Schuchardt
12a9c83cba riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist
Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.

MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
So we don't need CONFIG_(SPL_)ACLINT either.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-03-13 02:57:58 +08:00
Heinrich Schuchardt
97460f647b openpiton: imply CONFIG_SPL_CPU
There is no symbol CONFIG_SPL_CPU_SUPPORT.
The intended symbol is called CONFIG_SPL_CPU.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tianrui Wei <tianrui-wei@outlook.com>
Fixes: 8a44fe6943 ("board: riscv: add openpiton-riscv64 SoC support")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-13 02:57:46 +08:00
Heinrich Schuchardt
7d5c2834c7 riscv: don't imply non-existent CONFIG_IP_DYN
The symbol CONFIG_IP_DYN does not exist, but multiple contributors
copied an imply statement.

Remove the imply IP_DYN statements.

Fixes: 3fda0262c3 ("riscv: Add SiFive FU540 board support")
Fixes: 64413e1b7c ("riscv: Add Microchip MPFS Icicle Kit support")
Fixes: 70415e1e52 ("board: sifive: add HiFive Unmatched board support")
Fixes: 6f902b85b6 ("board: starfive: Add Kconfig for StarFive VisionFive v2 Board")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-03-13 02:57:33 +08:00
Nick Hu
61e2430360 driver: cache: Remove SiFive PL2 driver
Under single core boot platform, the secondary cores won't enter the
u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-13 02:57:15 +08:00
Andreas Schwab
4dcff3b572 sifive: switch to OF_UPSTREAM
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2026-03-13 02:56:52 +08:00
Heinrich Schuchardt
841e23d686 boot: availability of command mii for NET_LWIP
If we are using the legacy or the LWIP network stack,
should not influence our decision to provide command `mii`.

Let BOOT_DEFAULTS_CMDS imply MII if either of the network
stacks is available.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-03-12 15:53:41 +01:00
Mikhail Kshevetskiy
96d9e7c464 net: airoha: use mt7531 mdio for GDM1
Current code just bind mt7531 mdio with it's driver, so mdio device may
not be probed and hense not usable.

This patch:
 * Forces probing of mt7531 mdio for GDM1 port
 * Renames the mt7531 mdio bus interface to 'mt7531-mdio'. We may have
   multiple available MDIO, so the name 'mdio' isn't descriptive enough.
 * Sets mdio bus for the GDM port device

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 15:53:41 +01:00
Mikhail Kshevetskiy
08fa7baad5 net: airoha: makes PCS support optional
It's not possible to disable PCS support just now, an7581 u-boot will not
compile. This patch fixes an issue.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 15:53:41 +01:00
Christian Marangi
a527b11051 net: airoha: fill in support for PCS/PHY in Airoha Ethernet driver
Add required changes to call PCS function to configure the Serdes Port.
The Ethernet driver is adapted following Upstream Kernel node structure.

Function calling order is the same of Phylink upstream kernel.

With the PCS support, also add support for attaching PHY. With
"in-band-status" set in DT for the managed property, a rudimental
support for SFP module is present.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 15:53:41 +01:00
Christian Marangi
fdda0e2e07 configs: enable PCS for Airoha AN7581
Enable PCS config for Airoha AN7581 SoC by default to enable
support for External PHY.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 15:53:41 +01:00
Christian Marangi
161d948f57 airoha: add PCS node for AN7581
Add PCS node for Airoha AN7581 SoC to enable support for Serdes Ethernet
and PON port.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 15:53:41 +01:00
Mikhail Kshevetskiy
f1deb4f2e2 airoha: add GDM1 sub-node into EN7523 ethernet controller node
This is required to make ethernet working after PCS support changes

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 15:53:41 +01:00
Mikhail Kshevetskiy
2a7f69203f net: airoha-pcs: an7581: sync with linux code a bit
based on linux kernel patches from
https://github.com/Ansuel/openwrt/commits/openwrt-24.10-airoha-an7581-stable/
created by Christian Marangi <ansuelsmth@gmail.com>

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 15:53:41 +01:00
Tom Rini
9f1059bc73 Merge tag 'mediatek-for-next-2026-03-11' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
A fix:
* Fixing compiling MT8195 due to some independent changes that were applied
  around the same time as MT8195 support was merged. (CI would not have caught
  this since we didn't have a defconfig until now).

And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.
2026-03-12 07:45:29 -06:00
Mikhail Kshevetskiy
5b6b5d6f0b net: airoha: pcs: improve/fix building rules
pcs-airoha-common.o should not build unconditionally,
also make building rules looks better.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 12:49:35 +01:00
Christian Marangi
d4dd6eb29b net: airoha: add support for Airoha PCS driver
Add support for Airoha PCS driver present on AN7581 SoC.
This is needed to configure the Serdes port for the different PHY mode.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 12:49:35 +01:00
Mikhail Kshevetskiy
794c30b9d8 net: airoha: init switch before GDM port initialization
Call airoha_switch_init() before creating GDM instances, so if
allocation of GDM port fails, early created GDM instances will work
normally.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 12:49:35 +01:00
Mikhail Kshevetskiy
b4029a4049 net: airoha: do not call airoha_fe_init() from GDM port independent code
We should not call airoha_fe_init() from GDM port independent code,
because it do a GDM specific things.

Makes airoha_fe_maccr_init() and airoha_fe_init() port dependent
and call them from airoha_eth_port_probe()

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 12:49:35 +01:00
Mikhail Kshevetskiy
be0c12296e net: airoha: declare airoha_eth_port as U_BOOT_DRIVER()
Declare airoha_eth_port as U_BOOT_DRIVER(), fix airoha_alloc_gdm_port()
to lookup a driver instead of direct airoha_eth_port usage.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 12:49:35 +01:00
Mikhail Kshevetskiy
7ad4c7f8cf net: airoha: avoid out of boundary writing/access to gdm_port_str[] array
In the case of an7581 possible GDM port id are: 1, 2 and 4.
Initialization of port GDM4 will lead to out of boundary writing
to gdm_port_str[] array.

Let's increase the array size by 1 to avoid it.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-03-12 12:49:35 +01:00
Christian Marangi
0561b0b25a net: airoha: add initial support for multiple GDM port
Rework the driver to support multiple GDM port. The driver is split to
main driver as a MISC driver with forced probe (by using the
DM_FLAG_PROBE_AFTER_BIND) and each GDM port register a ETH driver.

This permit a 1:1 implementation with the linux kernel driver and permit
to use the same exact DT nodes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 12:49:35 +01:00
Christian Marangi
abd1efa992 net: mdio-mt7531-mmio: use common header priv struct
Instead of having duplicate priv struct for mdio-mt7531-mmio driver in
both driver and header, use the one exposed by the header directly.

This make sure we have consistent priv struct if the driver will be
updated in the future.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-03-12 12:49:35 +01:00
Siddharth Vadapalli
433a17aca1 common: spl: spl_dfu.c: Fix warning associated with PCI subclass_code
The subclass_code member of the pci_ep_header structure is a 1-byte
field. The macro PCI_CLASS_MEMORY_RAM is a concetation of baseclass_code
and subclass_code as follows:
	PCI_BASE_CLASS_MEMORY: 0x05
	Subclass Code for RAM: 0x00
	PCI_CLASS_MEMORY_RAM:  0x0500
Hence, instead of extracting it via an implicity type conversion from int
to u8 which throws a warning, explicitly mask the bits to extract the
subclass_code.

Fixes: cde77583cf ("spl: Add support for Device Firmware Upgrade (DFU) over PCIe")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Tested-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # am62x_evm_a53
Link: https://lore.kernel.org/r/20260305103815.999886-1-s-vadapalli@ti.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-03-12 09:59:33 +01:00
Alexey Charkov
67d8731d4a ufs: rockchip: Add device reset support
Wire up the GPIO line which Rockchip RK3576 UFS controller uses to reset
the connected UFS device.

This seems necessary at least for some UFS modules and fixes the following
error while enumerating UFS storage:

ufshcd-rockchip ufshc@2a2d0000: ufshcd_link_startup: Device not present
ufshcd-rockchip ufshc@2a2d0000: link startup failed -6
ufshcd-rockchip ufshc@2a2d0000: ufshcd_pltfrm_init() failed -6

Note that the GPIO descriptor for device resets is already required by the
DT binding (link enclosed).

Link: https://elixir.bootlin.com/linux/v6.18.5/source/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml#L70
Fixes: 76465ce21e ("ufs: rockchip: Add initial support")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://patch.msgid.link/20260120-rk3576-ufs-v5-3-0edb61b301b7@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-12 09:30:44 +01:00
Alexey Charkov
c664b4d5f3 spl: Make UFS available for SPL builds
Add minimal infrastructure to build SPL images with support for UFS
storage devices. This also pulls in SCSI support and charset functions,
which are dependencies of the UFS code.

With this, only a fixed offset is supported for loading the next image,
which should be specified in CONFIG_SPL_UFS_RAW_U_BOOT_SECTOR as the
number of 4096-byte sectors into the UFS block device.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://patch.msgid.link/20260120-rk3576-ufs-v5-1-0edb61b301b7@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-12 09:30:44 +01:00
Bo-Chen Chen
05677fedd6 pinctrl: mediatek: add support for mt8189
Add pinctrl support for mt8189.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Co-developed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260209-mtk-pinctl-mt8189-v1-3-a7a3069eda6c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-11 10:44:27 -05:00
David Lechner
920b0bc608 pinctl: mediatek: increase max number of base addresses
Increase the maximum number of base addresses that can be handled by the
mediatek pinctrl driver from 10 to 15. This is needed for the MT8189
which has 15 base addresses.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260209-mtk-pinctl-mt8189-v1-2-a7a3069eda6c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-11 10:42:03 -05:00
David Lechner
64d48d21b5 pinctl: mediatek: add bounds check on number of base addresses
Add a bounds check on the number of base addresses to prevent
out-of-bounds access to the priv->base array.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260209-mtk-pinctl-mt8189-v1-1-a7a3069eda6c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-11 10:42:03 -05:00
Shiva Tripathi
8bc2a5196c arm: k3: Kconfig: Enable fTPM and RPMB support
Enable firmware TPM (fTPM) support via OP-TEE for K3 platforms with
MMC hardware. This provides TPM 2.0 functionality through
Microsoft's fTPM Trusted Application running in OP-TEE secure world,
using eMMC RPMB as persistent storage.

fTPM support in U-Boot provides the foundation for measured boot
and disk encryption use cases.

The ARM64 condition ensures these apply only to A53/A72 cores and the
MMC condition ensures fTPM is enabled only on platforms with eMMC
hardware support.

Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
2026-03-10 12:35:18 -06:00
Heinrich Schuchardt
5578bcebd7 scripts: add checkkconfigsymbols.py
Add checkkconfigsymbols.py from Linux 7.0-rc1 (unchanged since v6.2).
This tool allows to identify the usage of symbols that are not defined
in Kconfig.

Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
04e96eb693 disk: fix DOS_PARTITION dependencies
* The symbol for the x86 architecture is CONFIG_X86 and not CONFIG_x86.
* Correct the description. The partition type is called MBR.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
553b939146 sandbox: don't imply non-existent CONFIG_KEYBOARD
Symbol CONFIG_KEYBOARD does not exist.
Don't imply it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
ff1b59c9bd boot: don't select non-existent CONFIG_VPL_CRYPTO
Symbol CONFIG_VPL_CRYPTO does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 4218456b3f ("vbe: Add Kconfig options for VPL")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
65b776e6d2 dma: ti: don't use non-existent CONFIG_TI_K3_NAVSS_PSILCFG
Symbol CONFIG_TI_K3_NAVSS_PSILCFG does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
a98c640845 arm/mach-sc5xx: don't select non-existent GIC_600_CLEAR_RDPD
The symbol CONFIG_GIC_600_CLEAR_RDPD does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 48a0b0b4b7 ("arch: arm: Add Analog Devices SC5xx machine type")
Fixes: 03de305ec4 ("Restore patch series "arm: dts: am62-beagleplay:  Fix Beagleplay Ethernet"")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-10 12:35:02 -06:00
Heinrich Schuchardt
afea129b3d arm: don't select non-existent CONFIG_DM_PCI
We removed configuration symbol CONFIG_DM_PCI with
commit 3232bdf0b3 ("pci: Drop DM_PCI").

Don't select it for TARGET_POMELO.

Fixes: b9d0f00a9d ("arm: add initial support for the Phytium Pomelo Board")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-10 12:35:02 -06:00
Tom Rini
3d252b7beb Merge patch series "fs: fat: Handle 'FAT sector size mismatch'"
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> says:

The disk_read() and disk_write() functions of the FAT driver use the
blk_dread() and blk_dwrite() respectively. The blk_* APIs read and write
to the devices in terms of the device block size. However, the FAT
driver reads in terms of the device block size (from fat_set_blk_dev and
read_bootsectandvi) and sector size in the rest of the places.

This causes buffer overflows or partial reads when the FAT sector size
is not equal to device block size. Fix this by using blk_dread in
fat_set_blk_dev and read_bootsectandvi instead of disk_read. And update
disk_read/disk_write to handle FAT sector size and block size mismatch.

Tested on
	blksz | FAT sector size
	------+----------------
	4096  | 4096
	512   | 512
	4096  | 512
	512   | 4096

CI test results
---------------
	https://github.com/u-boot/u-boot/pull/871
	All checks have passed
	93 successful checks
	No conflicts with base branch

Code size change info
---------------------
       arm: (for 1/1 boards) all +32.0 text +32.0
            qemu_arm       : all +32 text +32
               u-boot: add: 0/0, grow: 2/0 bytes: 24/0 (24)
                 function                                   old     new   delta
                 read_bootsectandvi                         420     432     +12
                 fat_set_blk_dev                            204     216     +12

   aarch64: (for 1/1 boards) all +12.0 rodata -8.0 text +20.0
            qemu_arm64     : all +12 rodata -8 text +20
               u-boot: add: 0/0, grow: 2/0 bytes: 20/0 (20)
                 function                                   old     new   delta
                 read_bootsectandvi                         408     420     +12
                 fat_set_blk_dev                            204     212      +8

   aarch64: (for 1/1 boards) all -2.0 data -8.0 rodata +6.0
            qcom_qcs9100   : all -2 data -8 rodata +6
               u-boot: add: 1/-1, grow: 8/-1 bytes: 708/-224 (484)
                 function                                   old     new   delta
                 disk_rw                                      -     628    +628
                 read_bootsectandvi                         408     428     +20
                 fat_itr_root                               500     520     +20
                 get_cluster                                376     388     +12
                 set_contents                              2076    2084      +8
                 fat_set_blk_dev                            204     212      +8
                 static.set_fatent_value                    536     540      +4
                 get_fatent                                 420     424      +4
                 fat_next_cluster                           368     372      +4
                 disk_read                                  100       -    -100
                 disk_write                                 132       8    -124

Link: https://lore.kernel.org/r/20260224035000.1617869-1-varadarajan.narayanan@oss.qualcomm.com
2026-03-10 11:52:16 -06:00
Varadarajan Narayanan
1a935da84d configs: qcom: Enable FS_FAT_HANDLE_SECTOR_SIZE_MISMATCH
Enable FS_FAT_HANDLE_SECTOR_SIZE_MISMATCH to handle the different
combination of FAT sector size and device block size present in QCOM
platforms.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
2026-03-10 11:52:14 -06:00
Varadarajan Narayanan
5e7b138490 fs: fat: Handle 'FAT sector size mismatch'
The disk_read() and disk_write() functions of the FAT driver use the
blk_dread() and blk_dwrite() respectively. The blk_* APIs read and write
to the devices in terms of the device block size. However, the FAT
driver reads in terms of the device block size (from fat_set_blk_dev and
read_bootsectandvi) and sector size in the rest of the places.

This causes buffer overflows or partial reads when the FAT sector size
is not equal to device block size. Fix this by using blk_dread in
fat_set_blk_dev and read_bootsectandvi instead of disk_read. And update
disk_read/disk_write to handle FAT sector size and block size mismatch.

Tested on
	blksz | FAT sector size
	------+----------------
	4096  | 4096
	512   | 512
	4096  | 512
	512   | 4096

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
2026-03-10 11:52:14 -06:00
Tom Rini
d93a63acfe Merge tag 'u-boot-rockchip-20260309' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/29452

- New SoC support: RK3506, RK3582;
- New Board support: RK3528 FriendlyElec NanoPi Zero2;
- Other fixes
2026-03-10 10:07:04 -06:00
Heinrich Schuchardt
cff18cef19 arm: rockchip: don't use non-existent CONFIG_TPL_TINY_FRAMEWORK
Symbol CONFIG_TPL_TINY_FRAMEWORK does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
9d3d4d6192 rockchip: Reduce size of ramboot usb472 payload
Booting into SPL using ramboot can take several seconds on some SoCs due
to the large size of the usb472 payload sent over USB to BootROM.

A large chunk of the usb472 payload, around 1-2 MiB, is padding used to
avoid overlapping when loading e.g. TF-A to 0x40000.

BootROM is likely wasting unnecessary time crc16 validating the padding
of the payload.

Place the FIT payload directly after SPL and memmove it to the expected
memory location, SPL_LOAD_FIT_ADDRESS, to avoid excessive padding and
help speed up ramboot.

Binman symbols are used to get the position and size of the FIT payload
that is initially loaded into DRAM by the BootROM.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Quentin Schulz
b107cfbb79 rockchip: rk3588: include all addressable DRAM in memory map
The ATAGS set by Rockchip DDR init blob[1] specify DRAM banks above the
first addressable 4GiB which we haven't done in the mem_map for RK3588
yet.

For 4GiB DRAM, the 256MiB missing from the first addressable 4GiB (due
to MMIO) are accessible at the end of the 8GiB address space. For 8GiB,
4-8GiB address space is used for the additional 4GiB and the missing
256MiB are at the end of 12GiB address space. For 12, 4-12GiB and the
missing 256MiB at the end of 20GiB address space. For 16GiB, 4-~16GiB
with two holes (reasons unknown) around 16GiB and the missing 256MiB is
at the end of 20GiB address space. For 32GiB, 4-16~GiB with two holes
and then 16GiB to 32GiB address space (so likely missing 256MiB from
MMIO address space).

[1] https://gist.github.com/Kwiboo/1c020d37e3adbc9d0d79dc003d921977

Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
52877548d3 arch: arm: rockchip: Add initial support for RK3506
Rockchip RK3506 is a ARM-based SoC with tri-core Cortex-A7.

Add initial arch support for the RK3506 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # drivers/usb/gadget
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
5b5616f846 net: dwc_eth_qos_rockchip: Add support for RK3506
Rockchip RK3506 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.

Add initial support for the RK3506 GMAC variant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
7404646f03 phy: rockchip-inno-usb2: Add support for RK3506
Add support for the two USB2.0 PHYs use in the RK3506 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Aaron Griffith <aargri@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
5bc966054f rockchip: otp: Add support for RK3506
Add support for the OTP controller in RK3506. The OTPC is similar to the
OTPC in RK3568 and can use the same ops for reading OTP data.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Ye Zhang
6225eeff57 pinctrl: rockchip: Add support for RK3506
Add pinctrl driver for RK3506.

Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with adjustments
to use regmap_update_bits().

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Aaron Griffith <aargri@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
ea45ebafd8 pinctrl: rockchip: Use syscon_regmap_lookup_by_phandle()
Use syscon_regmap_lookup_by_phandle() to simplify the code.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-10 10:07:03 -06:00
Finley Xiao
fbf72dce91 clk: rockchip: Add support for RK3506
Add clock driver for RK3506.

Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Finley Xiao
a445494f24 dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
Add device tree bindings for clock and reset unit on RK3506 SoC.
Add clock and reset IDs for RK3506 SoC.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251121075350.2564860-2-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 84898f8e9cea06f8178fc5ca53f068180f7bfba0 ]

(cherry picked from commit 516951213a82094f7f49f149cbf3c66dfb14c65d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
05b8228648 ram: rockchip: Add basic support for RK3506
Add support for reading DRAM size information from PMUGRF os_reg2 reg.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Aaron Griffith <aargri@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Xuhui Lin
51d578ab0f rockchip: mkimage: Add support for RK3506
Add support for generating Rockchip Boot Image for RK3506.

The RK3506 has 48 KiB SRAM and 4 KiB is reserved for BootROM.

Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Aaron Griffith <aargri@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:03 -06:00
Jonas Karlman
cde9114936 rockchip: mkimage: Re-sort the spl_infos list alphanumerically
The first RK35xx SoC was initially appended to the end of the otherwise
alphanumerically sorted spl_infos list, possible because it was using a
new header structure.

Re-sort the spl_infos list to keep it alphanumerically ordered based
on imagename.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Jonas Karlman
f273b393f7 rockchip: spl: Add common handling of USB bootsource_id 0x81
Multiple newer Rockchip SoCs report 0x81 instead of 0xa when booting
from USB, i.e. on RK3576, RK3528, RK3506 and RV1106.

Move the bootsource_id 0x81 handling currently only used for RK3528 to
the common read_brom_bootsource_id() to reduce the need to override this
function when support for newer SoCs is introduced.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
109c7ef87d rockchip: imply OF_UPSTREAM for rk3288 boards
Imply OF_UPSTREAM for rk3288 boards.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
f339d6a9c3 rockchip: Switch remaining rk3288 boards to upstream devicetree
Switch remaining rk3288 boards to upstream devicetree.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
03253abbae rockchip: Switch rk3288-veyron boards to upstream devicetree
Switch rk3288-veyron boards to upstream devicetree.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
d679a44ba7 ARM: dts: rockchip: move edp assigned-clocks to edp node on rk3288
The rk3288 power-controller node contains an assigned-clocks property
that conflicts with the bindings. From the git history it shows that they
wanted to assign the rk3288 EDP_24M clock input centrally before an edp
node was available. Move the edp assigned-clocks property to the edp node
to reduce dtbs_check output.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://patch.msgid.link/7d6fa223-ab90-4c44-9180-54df78467ea5@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 10712ce694a67304a99dbba20f8cb146ca5f4fd6 ]

(cherry picked from commit e1b4137b6bbc9998b13cde2eba0655cfdd358c69)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
ff2a978725 ARM: dts: rockchip: Add spi_flash label to rk3288-veyron
The u-boot,spl-boot-order property requires a label at a boot
device node. In order to migrate to OF_UPSTREAM more easier
add a spi_flash label to the rk3288-veyron.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://patch.msgid.link/8a423a6f-bfdc-4947-aef9-35ee7c4f6ca2@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: ac7116a626e00d3024adedb43b74bdf2ce45efc2 ]

(cherry picked from commit 38e6f7cd300f66cc9f657cd0e8881a01acc664d0)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Johan Jonker
c494a49d83 ARM: dts: rockchip: Remove mshc aliases from RK3288
The use of mshc aliases is deprecated for some while,
so remove them from the rk3288.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://patch.msgid.link/3e461bce-e8e6-48f1-a296-34040447ff25@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: cafaf99e4a790f8492a034a3470f878779c8c535 ]

(cherry picked from commit faefae4ca217961a0d96a54c9618e56aa8fd37b3)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Jonas Karlman
ebf46b588f board: rockchip: Add FriendlyElec NanoPi Zero2
The NanoPi Zero2 is a small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.

Add support for the FriendlyElec NanoPi Zero2 board.

Features tested on a FriendlyElec NanoPi Zero2 2407:
- SD-card boot
- eMMC boot
- Ethernet
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Quentin Schulz
804d009538 rockchip: tiger-rk3588: disable HS400
Tiger suffers from eMMC signal integrity issues which means we can only
run it at HS200 max.

The Device Tree has these properties removed since v6.18 (commit
baa18d577cd4 ("arm64: dts: rockchip: disable HS400 on RK3588 Tiger")),
which has now merged in U-Boot.

Since the controller side doesn't support HS400 anymore, let's not
confuse users as to why HS400 is enabled in the config but not working
as we know it cannot work (and won't be used anyway since the controller
doesn't advertise support for it in the Device Tree).

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Jonas Karlman
bdacb08a2d rockchip: rk3576: Use DMA when loading FIT images
Enable use of DMA when loading FIT images from eMMC, SD-card and SPI
flash now that access to PMU_SRAM for non-secure masters is allowed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Jonas Karlman
c501d83742 rockchip: rk3576: Allow pmu sram access for non-secure masters
The firewall block access to pmu sram for non-secure masters by default
after reset (0xffffbfff).

Change the pmu lookup configuration to match the default lookup config
for ddr and system sram (0xffff3fff) to allow loading TF-A using DMA.

Mainline TF-A will re-configure the firewall to use an even less
restrictive lookup (0xbffe3ff0), so this change is not expected to have
any real security implication.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Alexey Charkov <alchark@gmail.com> # UFS
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:07:02 -06:00
Jonas Karlman
492e00e27c rockchip: rk3588s-rock-5c: Add support for ROCK 5C Lite variant
Add Kconfig option OF_SYSTEM_SETUP=y to support booting ROCK 5C Lite
boards with a RK3582 SoC. CPU and GPU cores are failed based on ip-state
and policy.

Tested on a ROCK 5C Lite v1.1:

  cpu-code: 35 82
  ip-state: 00 80 00 (otp)
  ip-state: c0 9e 04 (policy)
  remove cpu-map cluster2
  fail gpu
  fail rkvdec1
  fail rkvenc1
  fail cpu cpu@600
  fail cpu cpu@700

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-10 10:06:58 -06:00
Wadim Egorov
045fb42827 arch: arm: dts: k3-r5: Drop a53_0 clock overrides in board files
The a53_0 clock properties are already set correctly in their
common k3-<soc>-r5.dtsi includes. Stop overriding them in
the r5 board device trees.

Fixes the following error message:
  Failed to set clock rates for '/a53@0': -61

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Tested-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Verdin AM62 Solo
Reviewed-by: Bryan Brattlof <bb@ti.com>
2026-03-09 18:58:27 -06:00
David Lechner
eb3042dc0d Makefile: fix duplicate dtbs recipe
Convert a duplicate dtbs recipe into a dependency in the main Makefile.

Another recipe is already defined on line 2369, so we are getting
spurious warnings like:

    Makefile:2369: warning: overriding recipe for target 'dtbs'
    Makefile:1425: warning: ignoring old recipe for target 'dtbs'

The removed recipe was a no-op anyway so can be safely removed.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-09 18:58:27 -06:00
Tom Rini
1e240f7206 Merge tag 'v2026.04-rc4' into next
Prepare v2026.04-rc4
2026-03-09 15:26:34 -06:00
Tom Rini
9a6dd68323 doc: Use sys.path.append for pytests
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-09 11:27:35 -06:00
Jonas Karlman
ab741f6f0e rockchip: rk3588-generic: Enable support for RK3582
Add Kconfig option OF_SYSTEM_SETUP=y to support booting boards with a
RK3582 SoC. CPU and GPU cores are failed based on ip-state and policy.

Tested on a ROCK 5C Lite v1.1:

  cpu-code: 35 82
  ip-state: 10 00 00 (otp)
  ip-state: 30 9e 04 (policy)
  remove cpu-map cluster1
  rename cpu-map cluster2
  fail gpu
  fail rkvdec1
  fail rkvenc1
  fail cpu cpu@400
  fail cpu cpu@500

and on a Radxa E52C:

  cpu-code: 35 82
  ip-state: 00 04 00 (otp)
  ip-state: c0 9e 04 (policy)
  remove cpu-map cluster2
  fail gpu
  fail rkvdec1
  fail rkvenc1
  fail cpu cpu@600
  fail cpu cpu@700

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-09 22:48:49 +08:00
Jonas Karlman
787705814a rockchip: Add initial RK3582 support
The RK3582 SoC is a variant of the RK3588S with some IP blocks disabled.
What blocks are disabled/non-working is indicated by ip-state in OTP.

This add initial support for RK3582 by using ft_system_setup() to mark
any cpu, gpu and/or vdec/venc node with status=fail as indicated by
ip-state.

This apply same policy as vendor U-Boot for RK3582, i.e. two big cpu
cores, the gpu and one vdec/venc core is always failed/disabled.

Enable Kconfig option OF_SYSTEM_SETUP in board defconfig to make use of
the required DT fixups for RK3582 board variants.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-09 22:48:49 +08:00
Jonas Karlman
fe54fdc6f6 phy: rockchip: naneng-combphy: Enable U3 port for USB3OTG on RK3568
The USB OTG U3 port may have been disabled early, add support to the
COMBPHY driver to re-enable the U3 port.

This matches changes made in the Linux commit 7bb14b61b7d0 ("phy:
rockchip: naneng-combphy: Enable U3 OTG port for RK3568").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-09 22:48:31 +08:00
Jonas Karlman
af5f97aeb8 rockchip: sdram: Add fallback that fixup DRAM gaps on RK3588
RK3588 has two known memory gaps when using 16+ GiB DRAM,
[0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).

The vendor TPL blob encodes this information in the DDR_MEM tag data
passed to later boot phases. U-Boot proper will normally use this
information to configure the DRAM banks.

When a DDR_MEM tag cannot be found the fallback is to use the entire
range above 4 GiB. Something that will cause issues when OS try to use
memory from the two known memory gaps.

Add a weak dram init banksize fixup function and implement it for RK3588
to fix issues observed when trying to RAM boot RK3588 boards with 16+
GiB DRAM into Linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2026-03-09 22:47:15 +08:00
Julien Stephan
b2a1db57eb board: mediatek: add MT8395 EVK board support
This adds support for the MT8395_EVK board with the following
features enabled/tested: Boot, UART, Watchdog and MMC.

MT8395_EVK is based on MT8195.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260219-add-mt8395-evk-v2-2-18b190d91cb6@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-06 17:07:22 -06:00
Julien Stephan
40a4889220 arm: mediatek: MT8195 fix mem_map
Commit 2517e2b524 ("arm: mediatek: add support for MediaTek MT8195
SoC") was merged after commit 24ffbb2aa1 ("arm: mediatek: consolidate
ARMv8 memory maps") but was not rebased on top of it, so mem_map is
defined twice. Fix it.

Fixes: 2517e2b524 ("arm: mediatek: add support for MediaTek MT8195 SoC")
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260219-add-mt8395-evk-v2-1-18b190d91cb6@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-06 17:07:22 -06:00
Martin Schwan
36add050ee test: boot: Add test for bootmeth_rauc
Add a simple unit test for testing the RAUC bootmethod. Provide only the
very basic tests for now, running a scan and list, to verify correct
detection of the RAUC bootmethod. More advanced boot tests of this
bootmethod can be added in a separate patch.

This requires another mmc image (mmc10) to contain the following
partitions:

1. boot A: contains a dummy boot.scr
2. root A: contains an empty root filesystem
3. boot B: contains a dummy boot.scr
4. root B: contains an empty root filesystem

The bootmeth_rauc scans all four partitions for existence and expects a
boot script in each boot partition.

Also add BOOTMETH_RAUC as a dependency on sandbox so that we can test
this with:

$ ./test/py/test.py -B sandbox --build -k test_ut # build the mmc10.img
$ ./test/py/test.py -B sandbox --build -k bootflow_rauc

Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
[trini: mmc9 is now in use, switch to mmc10]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-06 12:09:17 -06:00
Ludwig Nussel
fe6484b402 bootm: fix booting kernel_noload image
FIT images don't work without having to explicitly specify physical
load addresses. Digging into that it looks like a flaw in
bootm_load_os().
It duplicates images->os for convenience. However, the code handling
"kernel_noload" images then updates the load address in the copy with
the value lmb_alloc_mem() returned. Later there's another call to
lmb_alloc_mem() that uses the old value. This leads to havoc due
to subsequent calls of lmb_alloc_mem() picking too low addresses.

The "fix" is to mark the local variable const to avoid accidental
assignments. This works but IMO the logic is still flawed somehow as
this leads to overlapping lmb reservations. I guess the fixed
reservation should only be done when the noload path wasn't hit.

Without the change:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel' kernel subimage
     Description:  Linux kernel
     Created:      2026-02-24  14:10:09 UTC
     Type:         Kernel Image (no loading done)
     Compression:  gzip compressed
     Data Start:   0x402000b8
     Data Size:    12227440 Bytes = 11.7 MiB
     Hash algo:    sha256
     Hash value:   7ea661fdecdd1127edd419cfbf8bff52e2d5ac55c...
   Verifying Hash Integrity ... sha256+ OK
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'ramdisk' ramdisk subimage
     Description:  Initial ramdisk
     Created:      2026-02-24  14:10:09 UTC
     Type:         RAMDisk Image
     Compression:  uncompressed
     Data Start:   0x40da9528
     Data Size:    1067114 Bytes = 1 MiB
     Architecture: AArch64
     OS:           Linux
     Load Address: unavailable
     Entry Point:  unavailable
     Hash algo:    sha256
     Hash value:   2a711dcb5f58615187645ccec615c67eddcfbb3138...
   Verifying Hash Integrity ... sha256+ OK
   Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
   Uncompressing Kernel Image (no loading done) to 13a400000
   Loading Ramdisk to 400fb000, end 401ff86a ... OK
device tree - allocation error
FDT creation failed!
resetting ...
Bloblist at 0 not found (err=-2)
alloc space exhausted ptr 400 limit 0
Bloblist at 0 not found (err=-2)
[reset]

After:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel' kernel subimage
     Description:  Linux kernel
     Created:      2026-02-24  14:10:09 UTC
     Type:         Kernel Image (no loading done)
     Compression:  gzip compressed
     Data Start:   0x402000b8
     Data Size:    12227440 Bytes = 11.7 MiB
     Hash algo:    sha256
     Hash value:   7ea661fdecdd1127edd419cfbf8bff52e2d5ac55ce...
   Verifying Hash Integrity ... sha256+ OK
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'ramdisk' ramdisk subimage
     Description:  Initial ramdisk
     Created:      2026-02-24  14:10:09 UTC
     Type:         RAMDisk Image
     Compression:  uncompressed
     Data Start:   0x40da9528
     Data Size:    1067114 Bytes = 1 MiB
     Architecture: AArch64
     OS:           Linux
     Load Address: unavailable
     Entry Point:  unavailable
     Hash algo:    sha256
     Hash value:   2a711dcb5f58615187645ccec615c67eddcfbb3138...
   Verifying Hash Integrity ... sha256+ OK
   Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
   Uncompressing Kernel Image (no loading done) to 13a400000
   Loading Ramdisk to 13a2fb000, end 13a3ff86a ... OK
   Loading Device Tree to 000000013a1f8000, end 000000013a2fafff ... OK
Working FDT set to 13a1f8000

Starting kernel ...

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:33:35 -06:00
Tom Rini
14335ada2f Merge patch series "fw_env: cleanup flash_write_buf()"
Rafał Miłecki <rafal@milecki.pl> says:

I found flash_write_buf() somehow more difficult to follow than needed.
Some code turned out to be inconsistent and some not really needed.

There is a set of 6 patches that should be small enough to make them easy
to review. I was wondering if I should squash patches 5 and 6 but ended up
with sending two smaller diffs.

Those changes shouldn't really change any behaviour (except for smaller mem
alloc). Let me know if there are any issues with this!

Link: https://lore.kernel.org/r/20260221100011.29049-1-zajec5@gmail.com
2026-03-06 10:32:50 -06:00
Rafał Miłecki
667fa1a1cd fw_env: drop unneeded variables from flash_write_buf()
Recent cleanups made some variables redundant. Both: "blocklen" and
"erase_len" ended up being used as temporary variables used locally in
some short code paths.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:32:41 -06:00
Rafał Miłecki
ffd8024efc fw_env: move "erasesize" calculation up in a code
Calculate "erasesize" in the same place where other offsets and lengths
/ sizes are calculated. It makes code more consistent and will allow
further cleanups.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał Miłecki
1d175b2108 fw_env: unify calculation of "blockstart" in flash_write_buf()
In both code paths "blockstart" is calculated the same way. Unify it.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:32:41 -06:00
Rafał Miłecki
2f28f4116a fw_env: add ROUND_UP() helper
We already have DIV_ROUND_UP() to simplify code so add ROUND_UP() as
well. This makes code in flash_write_buf() easier to follow.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał Miłecki
d80d88cb87 fw_env: allocate buffer of proper size in flash_write_buf()
When dealing with env data not aligned to flash blocks flash_write_buf()
has to use an extra buffer. It reads existing flash content to it,
modifies required part and writes it back.

While reading and writing a size stored in "write_total" is used. It's
what should be used when allocating the buffer too.

In some cases allocating memory of "erase_len" size could result in
allocating too big buffer. That wouldn't break anything but it was
making code less intuitive.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał Miłecki
1197954d58 fw_env: use "erasesize" variable in writing loop
Use "erasesize" instead of "blocklen" in flash_write_buf()'s loop. This
change touches code executed for bad NAND blocks so it doesn't affect
any behaviour (for NAND flashes "blocklen" and "erasesize" are equal).

This just makes code a bit more consistent as "erasesize" is what is
used all around inside the writing loop.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Tom Rini
47dabe3b96 Merge branch 'master' of git://source.denx.de/u-boot-usb into next
- Change the address parsing for MUSB and another patch to add
  compatibles for ti,musb-am33xx and bind functions that check the
  dr_mode.
2026-03-06 08:15:44 -06:00
Markus Schneider-Pargmann (TI.com)
4cf2275ee7 usb: musb-new: Add compatibles for ti,musb-am33xx
The upstream devicetree am33xx.dtsi does not have a "ti,am33xx-usb"
compatible, it uses "ti,sysc-omap4" for the same node. The
implementation of ti-musb uses a wrapper driver that binds to
ti,am33xx-usb and creates new devices ti-musb-host and
ti-musb-peripheral depending on the dr_mode property.

To avoid this wrapper driver with the upstream devicetree, add
compatibles for "ti,musb-am33xx" to both ti-musb-host and
ti-musb-peripheral. Add a bind function that checks for the correct
dr_mode value and rejects binding if it is not the correct driver.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-03-06 08:15:43 -06:00
Markus Schneider-Pargmann (TI.com)
9bf19639a7 usb: musb-new: Relative ctrl_mod address parsing
For the upstream DT the ctrl_mod node is using a relative register
address which is not translated by the current code.

Make address parsing understand relative addresses.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-03-06 08:15:43 -06:00
Julien Stephan
d908dd98de drivers: ufs: fix typo in struct ufs_dev_cmd kernel-doc
Fix "associated" typo in struct ufs_dev_cmd kernel-doc.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260305-ufs-ufs_hba_ops-cleanup-v3-3-e153ffab98f5@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-05 16:51:51 +01:00
Julien Stephan
aa1b3f2583 drivers: ufs: add helper for phy_initialization callback
Introduce ufshcd_ops_phy_initialization() as a helper for invoking the
phy_initialization callback from ufs_hba_ops.

This mirrors the existing helper pattern used for other ufs_hba_ops
callbacks and keeps the call sites consistent and easier to maintain.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260305-ufs-ufs_hba_ops-cleanup-v3-2-e153ffab98f5@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-05 16:51:51 +01:00
Julien Stephan
0bb1d511e4 drivers: ufs: handle return values of ufs_hba_ops callbacks
The return values of ufshcd_ops_link_startup_notify(),
ufshcd_ops_hce_enable_notify(), ufshcd_ops_init(), and
ufshcd_device_reset() are currently ignored.

Check and propagate these return values properly and emit appropriate
error messages on error.

While at it, remove the ufshcd_device_reset() wrapper, which just call
ufshcd_device_reset().

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260305-ufs-ufs_hba_ops-cleanup-v3-1-e153ffab98f5@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-05 16:51:51 +01:00
Tom Rini
b1f5666706 Merge tag 'u-boot-dfu-next-20260303' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20260303

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/29417

Fastboot:
* mmc: make boot partition offset configurable for bootloader offsets
* arch: imx8qxp: Override weak fb_mmc_get_boot_offset
2026-03-03 12:56:37 -06:00
Tom Rini
7b60cd933b usb: gadget: Mark udc_disconnect as static
With the last external callers of udc_disconnect long removed, mark this
function as static now and remove it from headers.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://patch.msgid.link/20260224154504.85301-1-trini@konsulko.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-03-03 09:09:43 +01:00
Tom Rini
c0ca147ac6 Merge tag 'u-boot-imx-next-20260228' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29404

- Miscelanous improvements for Siemens Capricorn board.
- Convert i.MX6 IPUv3 driver to use clock framework.
- Skip voltage switching for fixed 1.8V regulator on fsl_esdhc_imx.
- Support printing imx8m pinmux.
- Enter fastboot on USB boot by default on phycore-imx93.
- Use arch override for env_get_location() on imx95.
2026-03-02 13:44:46 -06:00
Sébastien Szymanski
56e5f5290f arm: imx: imx95: Use arch override for env_get_location()
Like commit b9e48705e0 ("arm: imx: imx9: Use arch override for
env_get_location()"), use arch-level implementation here so that
env_get_location() can be used on board-level.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-02-28 15:35:19 -03:00
Peng Fan
85d55a610e pinctrl: nxp: imx9: Guard pinctrl match table with CONFIG_IMX9[X]
The i.MX9 pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX9[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
ce4f470eb4 pinctrl: nxp: imx91: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX91
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
87cf5b3c89 pinctrl: nxp: imx93: Support print pin muxing
Add support for printing pin names and current mux configuration on
i.MX93 when CMD_PINMUX is enabled.

 - A full pin descriptor table for i.MX93 pads.
 - Implementation of get_pins_count(), get_pin_name(), and
   get_pin_muxing() in the i.MX9 pinctrl driver.

There is no good way to add real mux names, so just dump the function ID
from the mux register.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
9c74ce7846 pinctrl: nxp: imx93: Rename to imx9
We are going to add pinctrl data support for both i.MX93 and i.MX91.
Since these SoCs share the same pinctrl driver structure, rename
pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related
variable and function names accordingly.

This prepares the driver for supporting additional i.MX9 family SoCs.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
d7a7653dfc pinctrl: nxp: imx8m: Guard pinctrl match table with CONFIG_IMX8M[X]
The i.MX8M pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX8M[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
5a06dd2924 pinctrl: nxp: imx8mq: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MQ
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MQ
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
18a62c12e1 pinctrl: nxp: imx8mm: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MM
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MM
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
b994cf0acf pinctrl: nxp: imx8mn: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MN
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MN
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
cf516f200d pinctrl: nxp: imx8mp: Support print pin muxing
Add support for printing pin names and current mux configuration on
i.MX8MP when CMD_PINMUX is enabled.

 - imx_pinctrl_pin_desc structure and PINCTRL_PIN()/IMX_PINCTRL_PIN()
   helpers for defining pin descriptors.
 - A full pin descriptor table for i.MX8MP pads.
 - Implementation of get_pins_count(), get_pin_name(), and
   get_pin_muxing() in the i.MX8M pinctrl driver.

There is no good way to add real mux names, so just dump the function ID
from the mux register.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng Fan
7771b25459 pinctrl: nxp: Kconfig: Typo fix
PINCTRL_IMX93 is for i.MX9[3,1], not for i.MX8M, correct the typo.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Emanuele Ghidoli
029892c5b8 configs: toradex-smarc-imx95: Enable remoteproc
Enable the remoteproc command, i.MX remoteproc driver, System
Manager SCMI CPU and LMM support to control the Cortex-M7.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-02-28 15:31:50 -03:00
Adrian Freihofer
cc832b6764 siemens: capricorn: protect environment
With ENV_WRITEABLE_LIST only specific environment variables lisetd in
CFG_ENV_FLAGS_LIST_STATIC are read from the u-boot environment storage.
All other environment variables are set to default values and are not
written back to the storage.

The u-boot environment usually stays for the lifetime of the product.
There is no A/B copy mechanism as for the firmware itself. That means
that incompatible changes to environment variables in future u-boot
versions may lead to serious issues if the old environment is used with
a new u-boot version or vice versa.

Having this protection in place ensures that only a limited set of
environment variables are persisted across u-boot versions. All the
macros not listed in CFG_ENV_FLAGS_LIST_STATIC are now part of the
u-boot binary which is redundant and immutable. This guarantees that
the u-boot version and the default values of these environment variables
are always in sync and cannot be changed at runtime.

ustate and rastate are not relevant for u-boot itself. ustate is used
by swupdate which persists the transaction state in the environment.
rastate is a similar variable used by another user space application.

Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Adrian Freihofer
bf3c641e97 siemens: capricorn: rework bootcmd environment variables
Rework the boot state machine to a significantly simpler and more
robust implementation. The basic idea is to revert to the previous
partition whenever an issue is detected during the boot process.

- Broken SPL

  If one of the two SPLs does not boot, the ROM code of the i.MX8 SoC
  automatically starts the second SPL from the second boot partition.
  For example, if the system's active partition is A but the SPL from
  partition A is broken, the ROM code automatically uses the SPL/u-boot
  from partition B.
  Proceeding with this boot procedure would lead to booting the kernel/
  rootfs from partition A, which could potentially successfully boot
  the system and allow the user to apply the firmware update with the
  broken SPL again. This would lead to a non-bootable system because
  the second update would overwrite the last working bootloader.
  To prevent such situations, zigzag boots are detected and the system
  reverts to the previous partition rather than booting the kernel/rootfs
  from the currently active partition. Detecting zigzag boots is done
  via the new fallback variable.

  To make this state machine even more consistent, the partitionset_active
  variable is no longer used to determine the active partition during
  boot. Instead, the active partition is always read from the eMMC
  partconf registers.
  For backward compatibility, the partitionset_active variable is still
  updated whenever a partition switch occurs. However, u-boot no longer
  relies on this variable, as it could potentially be out of sync with
  the actual partition state, leading to situations where the ROM code
  of the i.MX8 SoC would be out of sync with u-boot.

- Broken kernel, initramfs or rootfs

  If the upgrade_available variable is set, u-boot counts the number of
  consecutive boots via the bootcount variable. If the bootcount exceeds
  the bootlimit variable, u-boot starts the altbootcmd instead of the
  bootcmd. Previously, this logic was bypassed by assigning the regular
  bootcmd to altbootcmd. Now, the altbootcmd is used to revert to the
  previous partition when the bootlimit is exceeded.

The netdev variable is changed to eth0 by default. This is what the FEC
driver uses on Capricorn boards. For devices with switches and DSA
subsystems in use, the netdev should be set accordingly by additional
logic in the environment or u-boot code. This is not part of this commit.

Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Walter Schweizer
2b19fea315 siemens: capricorn: fix fallback bootm call for fitImage
When dtb_name is missing or a configuration is missing, try to
boot the default configuration in the image. The call to bootm needs
the correct loadaddr to succeed.

Fixes booting when factoryset is missing.

Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Heiko Schocher
c019f81314 siemens: capricorn: always detect emmc device
drop Environment variable mmcautodetect and the board logic
behind it, as we want always to autodetct the emmc device.

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Heiko Schocher
4e67785e6d siemens: capricorn: add logic to U-Boot to avoid zig-zag boot
add logic in board code for detecting the real boot
partition and set a local hush shell variable fallback
which can be used later in boot variables for detecting
a ROM bootloader fallback case.

We use the local hush shell variable, as we do not want
to save in any case the fallback variable in U-Boot
Environment, as the default Environment is maybe saved
in boards, which are downgraded to older U-Boot versions.

And than the board code does not run, and fallback never
gets the correct value.

Introduce also hush shell variable envvers to value "v2_"
so we can use them in Environment for running different
versions of variables between new and old U-Boot images.

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Heiko Schocher
4f8749394d capricorn: config: add bootcounter command
Enable bootcount feature to count the boot times

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Walter Schweizer
bb5a4607a3 imx8qxp_capricorn config: add wget command
Enable the "wget" command to allow download using TCP / HTTP protocol.
This is faster than TFTP download.

Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Lukas Stockmann
d03cb570cc arm: dts: capricorn: move fec2 config
fec2 config does not belong to the Capricorn CPU module, move it to
the main board.

Signed-off-by: Lukas Stockmann <lukas.stockmann@siemens.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Lukas Stockmann
76b53f7e84 arm: dts: capricorn: remove pinctrl_usdhc2
usdhc2 is not used on the Capricorn board.

Signed-off-by: Lukas Stockmann <lukas.stockmann@siemens.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:50 -03:00
Adrian Freihofer
77260b8cee siemens: capricorn: set max-frequency for usdhc1
This is required since

commit aebb523a23 ("mmc: mmc-uclass: Use max-frequency from device tree with default handling")

and the related patches of the same series.

The error observed without this change is:
  Autobooting in 3 seconds, press "<Esc><Esc>" to stop
  EXT_CSD[179], PARTITION_CONFIG:
  BOOT_ACK: 0x0
  BOOT_PARTITION_ENABLE: 0x1 (boot0)
  PARTITION_ACCESS: 0x0 (user)
  Loading from eMMC ...fit

  U-Boot SPL 2026.01-4238dcfcbfe (Jan 09 2026 - 08:19:45 +0000)

For this example it's the following commands which does no longer work
for larger images:

  ext4load mmc 0:1 0x88000000 boot/fitImage

On latest master branch the problematic commit gets reverted with

commit c4f5b1d4b0 ("Revert "mmc: mmc-uclass: Use max-frequency from device tree with default handling"")

but for v2026.01 this fix is still required. Maybe it's anyway a good
idea to have this property set explicitly.

Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:49 -03:00
Lukas Stockmann
177c2ce8b2 arm: dts: capricorn: pinctrl_usdhc1 cleanup
gpio4.29 belongs to eth0 and not to emmc0 and is
handled by the mainboard dts and not here in the
cpu module dtsi.

Signed-off-by: Lukas Stockmann <lukas.stockmann@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
2026-02-28 15:31:49 -03:00
Kory Maincent
fd30e492cc mmc: fsl_esdhc_imx: Skip voltage switching for fixed 1.8V regulator
When using a fixed 1.8V regulator for vqmmc (indicated by vs18_enable),
attempting to change the voltage produces spurious errors since the
regulator cannot be adjusted. The driver currently attempts the voltage
change, receives -ENOSYS from the regulator subsystem, and reports:

  Setting to 1.8V error: -38
  esdhc_set_voltage error -5

Fix this by checking vs18_enable early in esdhc_set_voltage() and
returning -ENOTSUPP for all voltage switch requests, not just 3.3V.
This prevents unnecessary regulator operations and eliminates the
error messages when the hardware is correctly configured with a fixed
1.8V supply.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
10e0560ea8 video: imx: ipuv3: use clock framework
Clocks are now configurable via the common clock framework, however,
users have the option use the legacy clocks if desired. The intent is to
keep the changes minimal for this old SoC.

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
a2d79d461e video: imx: ipuv3: move clock code to legacy
In preparation for CCF migration for IPUv3 separate existing clock code
to legacy files. These will be used by i.MX5 that currently does not
support the CCF. No functional change.

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
07632c97a4 pwm: pwm-imx: enable ipg or per clks only if CONFIG_CLK enabled
This caused linker errors in cases where IPUv3 was enabled (which
defines its own clocks).

Fixes: bfc778cb93 ("driver: pwm: pwm-imx: get and enable per/ipg
                     clock using dm")
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
b0cc723f46 clk: imx6q: add ipu and ldb clocks and dependencies
This is required for the IPUv3 driver to migrate to CCF, changes are
largely based on the Linux kernel equivalent.

Add new gate2_flags function (also present in the Linux code) to set
required flags.

Add usboh clock to get rid of error.

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
3632346f4b clk: imx6q: apply clang-format
Reduces the number of checkpatch warnings in the following commits.

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2026-02-28 15:31:49 -03:00
Brian Ruley
670a20de08 arch: imx: fix incorrect shutdown call for inactive video devices
Somehow I missed that ipuv3_fb_shutdown() can be called for inactive
devices, resulting in invalid memory access and preventing the kernel
from booting.

Fixes: 32da6773f62 ("video: imx: ipuv3: refactor to use dm-managed state")
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Reviewed-by: David Zang <davidzangcs@gmail.com>
2026-02-28 15:31:49 -03:00
Heiko Schocher
b93ef61ce4 imx8qx: misc: add command for getting boottype
add boottype command, which saves the boot_type
primary (0) or fallback (1) in environment
variable "boottype". If argument "print" is
passed, it also prints the boottype on console.

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
2026-02-28 15:31:49 -03:00
Heiko Schocher
49aa5b8362 imx: scu_api: implement sc_misc_get_boot_type
add function sc_misc_get_boot_type() which returns the
boot type.

Signed-off-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:49 -03:00
Primoz Fiser
3b1da4cce6 board: phytec: phycore-imx93: Enter fastboot on USB boot by default
In case board is booted from USB, enter fastboot by default to enable
the UUU flashing. In case of abort continue with the regular bootstd
scan. User also has possibility to override the default bootcmd from
the environment. Last but not least, this syncs behavior with other
PHYTEC boards from the i.MX family.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Benjamin Hahn <B.Hahn@phytec.de>
2026-02-28 15:31:49 -03:00
Peng Fan
7936aec48b nxp: imx8mp_evk: Add board_mmc_get_env_dev
When booting from eMMC, there is error log:
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... MMC: no card present

Add board_mmc_get_env_dev() to get the correct device number.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:49 -03:00
Peng Fan
c6c1b7a544 nxp: imx8m[m,p]_evk: Drop init_uart_clk
Both the two boards have clk framework enabled, so rely on serial driver
calling clk_enable to enable the uart clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:49 -03:00
Peng Fan
6830f1ec97 nxp: imx8mp_evk: Enable SPL_CLK_IMX8MP
Enable SPL_CLK_IMX8M to make sure clk_enable could work proper in SPL
phase by using clock framework driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:49 -03:00
Tom Rini
f6963fc232 Merge tag 'mmc-next-2026-02-26' of https://source.denx.de/u-boot/custodians/u-boot-mmc into next
- Add MediaTek MT6359P regulator driver
- Add MediaTek MT6357 regulator driver
- Add MediaTek PMIC Wrapper driver
- Enable pmic and regulator for mt8365 evk
- Minor cleanup
2026-02-26 10:23:12 -06:00
David Lechner
b3d16267b5 mmc: mtk-sd: add mediatek,mt8189-mmc compatible
Add support for MediaTek MT8189 MMC controller.

According to [1], this is similar to, but not quite the same as
mediatek,mt8196-mmc.

Link: https://lore.kernel.org/linux-mediatek/20251203-mt8189-add-mmc-support-v1-1-f5ce43212fe9@collabora.com/ [1]
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-26 11:15:44 +08:00
Heinrich Schuchardt
adc49c29a9 power: regulator: Kconfig: add SPL_DM_REGULATOR_FAN53555
Symbol CONFIG_SPL_DM_REGULATOR_FAN53555 is selected by
SPL_DM_PMIC_FAN53555 and used in a Makefile. But the
symbol definition is missing.

Add the missing configuration symbol.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 18:40:30 +08:00
David Lechner
93016370cf configs: mt8365_evk_defconfig: enable PMIC and regulators
Enable PMIC and regulators on MT8365 EVK now that there are drivers for
these. Also enable the associated commands.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 15:18:22 +08:00
Julien Masson
219c05f3f6 power: pmic: mtk-pwrap: add MediaTek PMIC Wrapper driver
Add support for the PMIC wrapper (pwrap) IP block found on MediaTek
MT8365 and similar SoCs.

On these SoCs the PMIC is connected via SPI. The SPI controller is not
directly visible to the CPU, but only through the PMIC wrapper inside
the SoC.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Co-developed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Co-developed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 15:18:22 +08:00
Bo-Chen Chen
5419cf43cf power: regulator: mt6359: add driver for MT6359P
Add a new regulator driver for MT6359P and similar PMIC chips.

The MT6359P is a eco version for MT6359 regulator. For the MT8391
platform, we use the MT6359P (MT6365) as the main PMIC. The MT6359 and
MT6359P have different register maps. Therefore, on the MT8391 platform,
we only provide support for the MT6359P. If support for the MT6359 PMIC
it can be added later.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 15:18:22 +08:00
Julien Masson
4267b414dc power: regulator: add MediaTek MT6357 driver
Add a driver for the power regulators of the MediaTek MT6357 PMIC chip.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Co-developed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 15:18:21 +08:00
Marek Vasut
6f7d976317 cmd: mmc: Drop trailing space in Name: before newline
The Name: line of 'mmc info' command prints a trailing space before
newline. This is not useful and shows up as trailing space e.g. when
the output is checked into documentation. Remove the trailing space.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-25 15:07:54 +08:00
Tom Rini
8fd76675ef board: Correct usage of fdtfile=CONFIG_DEFAULT_FDT_FILE
As explained in commit 03d2d5fc00 ("board: sifive: unmatched: set
fdtfile with unquoted variable.") using the syntax of
'fdtfile=CONFIG_DEFAULT_FDT_FILE' in the plain text environment files
will lead to extraneous and problematic "s in the output. This is fixed
by using fdtfile=DEFAULT_FDT_FILE which was introduced recently.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-02-23 15:30:34 -06:00
Tom Rini
a226944635 Merge patch series "net: mdio-mt7531-mmio: consolidate and improve probe"
Christian Marangi <ansuelsmth@gmail.com> says:

This small series consolidate header usage of mdio-mt7531-mmio driver
and improve usage in preparation for support of OF PHY autoprobe.

This driver is still not used (as it will be used by AN7581/AN7583)
in the OF mode (it's used by MT7988 for the MDIO functions)

For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes)

With such change the MDIO driver can be binded with the MDIO node instead
of the switch node as previously required.

Link: https://lore.kernel.org/r/20260209114515.1916-1-ansuelsmth@gmail.com
2026-02-23 15:29:21 -06:00
Christian Marangi
358f97fcca net: mdio-mt7531-mmio: improve parsing of switch register on probe
The MDIO node is ALWAYS a parent of the MT7531 switch node and the MDIO
registers are in the MT7531 register space (in the context of MT7988
it's all memory-mapped)

With these assumption, we can simplify and permit better usage of PHY OF
automatic probing by binding the mt7531-mdio-mmio driver with the MDIO
node instead of the switch node.

For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes).

The driver will reach the parent node (the switch node) and will parse
the register address from there.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-02-23 15:28:16 -06:00
Christian Marangi
145487611f net: mdio-mt7531-mmio: use common header priv struct
Instead of having duplicate priv struct for mdio-mt7531-mmio driver in
both driver and header, use the one exposed by the header directly.

This make sure we have consistent priv struct if the driver will be
updated in the future.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-02-23 15:28:16 -06:00
Tom Rini
d5feb16f01 Merge patch series "am62dxx-evm: Add SPI flash support"
Paresh Bhagat <p-bhagat@ti.com> says:

This series enables SPI flash support for the AM62DX EVM platform.

The first patch enables the required SPI flash configuration options in
both A53 and R5 defconfigs, including Cadence QSPI driver support, SFDP
support, and Spansion S28HX-T flash compatibility.

The second patch adds the necessary device tree configuration for the R5
SPL to support OSPI flash access during the boot process.

Boot logs
https://gist.github.com/paresh-bhagat12/ca9a05aa443c71e8baf6d8506f6ccc22

Link: https://lore.kernel.org/r/20260209072820.2576854-1-p-bhagat@ti.com
2026-02-23 15:26:15 -06:00
Paresh Bhagat
75acda482c configs: am62dx_evm: Enable SPI flash support
Enable SPI flash support for AM62DX EVM by adding Cadence QSPI driver,
configuring 25MHz speed, and enabling SFDP support with Spansion
S28HX-T flash compatibility. Enable required SPI and MTD configs for
both A53 and R5 configurations to allow booting from SPI flash.

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
2026-02-23 15:26:02 -06:00
Paresh Bhagat
b45bdb822c arm: dts: k3-am62d2-r5: Add DMA and OSPI configuration
Enable WKUP UART0 for DM firmware logs, configure DMA controllers with
TI SCI references, and update OSPI0 register mapping.

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
2026-02-23 15:26:02 -06:00
Tom Rini
15bd325817 Merge tag 'v2026.04-rc3' into next
Prepare v2026.04-rc3
2026-02-23 13:45:55 -06:00
Ronald Wahl
ef65b15383 spl: fix stack placement in spl_relocate_stack_gd()
Currently when CONFIG_SPL_STACK_R and CONFIG_SPL_SYS_MALLOC_SIMPLE is
enabled then spl_relocate_stack_gd() will setup a layout where the stack
lays inside the heap and grows down to heap start. Also the global data
is part of the heap. This can lead to corruption of stack and global
data. The current layout is:

                    0x0 +-------------+
                        .             .
                        .             .
        gd->malloc_base +- - - - - - -+
                        |             |\
                        | HEAP/STACK  | \
                        |             |  } SPL_STACK_R_MALLOC_SIMPLE_LEN
      gd->start_addr_sp +- - - - - - -+ /  (gd->malloc_limit)
                        | GLOBAL DATA |/
CONFIG_SPL_STACK_R_ADDR +-------------+

The above broken layout was actually introduced with commit adc421e4ce
("arm: move gd handling outside of C code").

This commit changes the layout so that the stack is below the heap and
the global data. It is now similar to the one before relocation:

                     0x0+-------------+
                        .             .
                        .             .
                        +- - - - - - -+
                        |             |
                        |    STACK    |
                        |             |
      gd->start_addr_sp +-------------+
                        | GLOBAL DATA |
        gd->malloc_base +-------------+
                        |             |\
                        |    HEAP     | } SPL_STACK_R_MALLOC_SIMPLE_LEN
                        |             |/  (gd->malloc_limit)
CONFIG_SPL_STACK_R_ADDR +-------------+

Fixes: adc421e4ce ("arm: move gd handling outside of C code")
Cc: Tom Rini <trini@konsulko.com>
Cc: Anshul Dalal <anshuld@ti.com>
Cc: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: Dhruva Gole <d-gole@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
2026-02-20 10:39:19 -06:00
Tom Rini
2a86d872ec defconfigs: Remove default COFNIG_SPL_LDSCRIPT value
These three platforms set CONFIG_SPL_LDSCRIPT value to what the default
value for the question is, once evaluated. Remove this unnecessary line.

Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-02-20 10:39:19 -06:00
Sparsh Kumar
587b1a5675 board: ti: am62ax: tifs-rm-cfg.yaml: Add C7x resource allocation entries
Update am62ax and am62dx tifs-rm-cfg with allocation entries for C7x
core to match with their rm-cfg. Following updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x.
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x.
- Add global events and virtual interrupts for C7x.

Fixes: 01e0127753 ("am62a: yaml: Add board configs for AM62ax")
Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
2026-02-20 10:39:19 -06:00
Jeffrey Yu
c5d82cab77 spi: add support for ISSI IS25WP02GG flash
This patch adds support for the ISSI IS25WP02GG QSPI NOR flash device.
Tested on the Versal VMK180
board in dual-parallel QSPI configuration.

Signed-off-by: jeffrey yu <jeyu@issi.com>
2026-02-20 10:39:19 -06:00
Christoph Reiter
311f923761 mtd: spi-nor-ids: Add Fujitsu MB85RS256TY FRAM
This part is an FRAM, but can be used through the spi-nor generic code.

Signed-off-by: christoph.reiter@evk.biz
2026-02-20 10:39:19 -06:00
Adrian Freihofer
94b7c3b262 arch: imx8qxp: Override weak fb_mmc_get_boot_offset function
Add IMX8QXP SoCs specific implementation of fb_mmc_get_boot_offset()

This is needed as bootloader offset is different dependent on SoC
revision!

For revision B0 the bootloader starts at 32k offset. On offset
0x0 the bootloaders environment is stored.

On C0 revisions of the SoC bootloader image starts at offset 0x0

Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Acked-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20260217103604.71029-3-hs@nabladev.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-02-19 11:27:51 +01:00
Adrian Freihofer
2452616233 fastboot: mmc: make boot partition offset configurable
i.MX8QXP rev C.0 requires boot container stored at offset 0KB
for eMMC, while i.MX8QXP pre C.0 requires boot container stored
at offset 32KB for eMMC.

To use one U-Boot binary to support different chip revisions,
introduce fb_mmc_get_boot_offset() to allow override the default
offset when writing to eMMC boot partitions.

This enables support for devices with non-standard boot partition
layouts, such as those requiring an offset for correct bootloader
placement.

Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260217103604.71029-2-hs@nabladev.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-02-19 11:27:51 +01:00
Tom Rini
cf6aa7cf73 Merge patch series "bootcount: Small clean-up and fix, and dm_i2c single-word support"
Niko Mauno <niko.mauno@vaisala.com> says:

In this series, we first introduce a clean-up where we switch to use
predefined bit masks instead of hard-coded values for count and magic
halves in the single-word (32-bit) boot count scheme.

Then we fix a case of missing boot count value masking in single-word
scenario in bootcount.c, which allowed clobbering of the magic half
when storing the value. With this change the clobbering preventing
behavior becomes consistent with existing single word bootcount storing
implementations in bootcount_at91.c and bootcount_davinci.c.

Finally, we enable the DM I2C bootcount driver to work also in single
word (4 byte) mode, in addition to the pre-existing half-word (2 byte)
mode. By default the driver still operates in half word mode as so far,
but can now be used alternatively in single word mode by adding
'size = <0x4>;' in the associated device tree node.

Link: https://lore.kernel.org/r/cover.1770197302.git.niko.mauno@vaisala.com
2026-02-18 16:35:12 -06:00
Niko Mauno
f97642853c bootcount: dm_i2c: Support also single word mode
In addition to pre-existing half-word (2 byte) mode, add support for
the driver to work also in single word (4 byte) mode by adding
'size = <0x4>;' in the device tree node.

Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
2026-02-18 16:35:07 -06:00
Niko Mauno
05b56599b5 bootcount: Fix potential clobbering issue
When storing the single word bootcount value, apply the bootcount count
mask to prevent clobbering the magic half of the value.

Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
2026-02-18 16:35:07 -06:00
Niko Mauno
27e1924ffa bootcount: Use predefined count/magic bit masks
Use predefined bit masks in operations where only the magic half or
only the count half of the 32-bit value are processed.

Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-02-18 16:35:07 -06:00
Tom Rini
68e542d4f5 Merge patch series "arm: dts: mt7622: use generic node names"
David Lechner <dlechner@baylibre.com> says:

While compile-testing things to make sure I wasn't breaking other
platforms when making mach-wide changes for mediatek, I kept getting a
warning about a a SPI controller node with the wrong name in
mt7622.dtsi. The first patch addresses this. And since we are here, I
added a second patch to generic names in general in that file even if
they aren't causing warnings.

Link: https://lore.kernel.org/r/20260209-mtk-dtb-fix-spi-bus-bridge-warning-v1-0-84e3e2d8352d@baylibre.com
2026-02-18 12:09:06 -06:00
David Lechner
08b379f9cf arm: dts: mt7622: Use generic node names
Replace node names in mt7622.dtsi with generic names. This makes it more
consistent with the upstream bindings.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-02-18 12:08:05 -06:00
David Lechner
a1edc0b7d6 arm: dts: mt7622: Fix SPI bus bridge warning
Change SPI node name to generic "spi" in mt7622.dtsi. This fixes the
following compile warning:

    w+../arch/arm/dts/mt7622.dtsi:56.22-65.4: Warning (spi_bus_bridge): /snor@11014000: node name for SPI buses should be 'spi'
    w+arch/arm/dts/mt7622-rfb.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-02-18 12:08:05 -06:00
Shiji Yang
b681f2be8c pinctrl: mediatek: set MT798x rev as MTK_PINCTRL_V1
The MT798x series SoCs have IES regiter definitions. They should
belong to the pinctrl v1 revision.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2026-02-18 12:06:19 -06:00
Chris-QJ Chen
06cfded6ed pinctrl: mediatek: add pinctrl driver for MT8195
Add support for MT8195 pinctrl. The driver is based on the kernel one.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 12:06:19 -06:00
Tom Rini
fa3f16e450 Merge patch series "Add MT8195 support"
Julien Stephan <jstephan@baylibre.com> says:

This series adds basic support for Mediatek soc MT8195:
- clock driver
- watchdog
- add a new macro helper to define gate clock. Other driver can be
  cleaned later to use the new macro

Other driver will be added later.

It will also serve as basis for board support such as MT8395_EVK based
on MT8195.

Link: https://lore.kernel.org/r/20260202-add-mt8195-clock-support-v1-0-5d03495246b9@baylibre.com
2026-02-18 12:03:46 -06:00
Chris-QJ Chen
a0c5403283 clk: mediatek: add MT8195 clock driver
The following clocks have been added for MT8195 SoC:
 apmixedsys, topckgen, infracfg

 These clocks driver are based on the ones present in the kernel:
 drivers/clk/mediatek/clk-mt8195-*

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 12:01:18 -06:00
Julien Stephan
5f2111e9ff clk: mediatek: implement GATE_FLAGS macro
Add helper macro for mtk_gate, the same way, there are macros for
FIXED_CLK, MUX and FACTOR.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 12:01:18 -06:00
Julien Stephan
2517e2b524 arm: mediatek: add support for MediaTek MT8195 SoC
This adds basic support for MediaTek MT8195 SoC.

Add watchdog support by adding upstream compatible string.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 12:01:18 -06:00
Tom Rini
03637bda63 Merge patch series "clk: mediatek: mt8188: fix clocks"
Julien Stephan <jstephan@baylibre.com> says:

I recently submitted the clock driver for MT8188. I naively submitted a
driver that was ported from the kernel driver, and mostly work to boot a
kernel.

Recently David Lechner, added support for the clk dump command for
Mediatek clock drivers, so I used it to check the MT8188 and found
several issues fixed on this series:

- removed topckgen_cg, gates are now part of topckgen
- fixed several parents clocks
- added missing fixed clocks

While at it, I also refactored a bit the driver to improve readability,
and future additions to it.

Link: https://lore.kernel.org/r/20260202-mt8188-fix-clock-v2-0-b39bddfcac66@baylibre.com
2026-02-18 12:00:45 -06:00
Julien Stephan
0cdd01dbde clk: mediatek: mt8188: refactor driver to improve readability
Refactor some part of the driver to improve readability and future
additions:

- use CLK_TOP_NR_CLK for added clocks
- rename the id map to make it more clear that the map applies to top
  clocks only
- refactor the id map to improve readability
- xtal2_rate is only used for PLL clocks, so only the apmixedsys clock
  tree needs it. Remove it elsewhere.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:59:32 -06:00
Julien Stephan
2797fa3efd clk: mediatek: mt8188: fix some clock parents
Fix a number of clock parent definitions for MT8188 clocks.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:59:32 -06:00
Julien Stephan
5e9bbbdab0 clk: mediatek: mt8188: add missing fixed clock
CLK_TOP_CLK13M was missing, add it.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:59:32 -06:00
Julien Stephan
6354f83f43 clk: mediatek: mt8188: fix circular clock dependency
FACTOR1(CLK_TOP_APLL1_D4, CLK_TOP_APLL1, 1, 3)
--> CLK_TOP_APLL1_D4 declares CLK_TOP_APLL1 as it's parents

MUX_GATE(CLK_TOP_APLL1, apll1_parents, 0x0F8, 0, 4, 7)
--> CLK_TOP_APLL1 declares apll1_parents as it's parents

static const int apll1_parents[] = {
	CLK_TOP_CLK26M,
	CLK_TOP_APLL1_D4
};
--> CLK_TOP_APLL1_D4 is a parent of CLK_TOP_APLL1

Fix this, by correctly setting CLK_TOP_APLL1_DX parent to CLK_APMIXED_APLLX

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:59:32 -06:00
Julien Stephan
a04835c0e9 clk: mediatek: mt8188: remove separate topckgen-cg driver
Remove the separate topckgen-cg driver for handling clock gates in the
topckgen address space.
Commit 8aeeeff50d ("clk: mediatek: allow gates in topckgen drivers")
added support for gates in topckgen driver.
This commit fixes MT8188 driver, the same way commit ba207d7f54 ("clk:
mediatek: mt8365: remove separate topckgen-cg driver") does for MT8365.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:59:32 -06:00
Julien Stephan
b5db4f322a board: mediatek: add MT8370 EVK board support
This adds support for the MT8370 EVK board with the following
features enabled/tested: Boot, UART, Watchdog and MMC.

MT8370 is based on MT8188.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
2026-02-18 11:58:17 -06:00
Tom Rini
339a55865a Merge patch series "arm: mediatek: clean up some redundant board init"
David Lechner <dlechner@baylibre.com> says:

Before adding more targets, we take a moment to clean up some some
redundant code in existing Mediatek SoC support.

The first three patches are removing no-op functions. The last patch
generalizes the mem_map code so that it can be shared between all
Mediatek ARMv8 SoCs.

Link: https://lore.kernel.org/r/20260209-mtk-mach-clean-up-duplicates-v2-0-e3b22282c74d@baylibre.com
2026-02-18 11:57:24 -06:00
David Lechner
f1c0e637cd arm: mediatek: add CONFIG_MTK_MEM_MAP_DDR_BASE_PHY
Add a CONFIG_MTK_MEM_MAP_DDR_BASE_PHY variable to specify the DDR base
physical address for the Mediatek ARMv8 memory map. This will be used
by MT8196 in the future which has a different DDR base address than
other Mediatek SoCs.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
2026-02-18 11:57:14 -06:00
David Lechner
24ffbb2aa1 arm: mediatek: consolidate ARMv8 memory maps
Consolidate all mem_map definitions for MediaTek ARMv8 platforms into a
single file. The size of the DDR and MMIO regions can vary, so Kconfig
options are added to configure them by target.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-02-18 11:57:14 -06:00
David Lechner
8b62140738 board/mediatek: move EVK MAINTAINERS to common file
Move the mt8365_evk and mt8390_evk MAINTAINERS files to a common
MAINTAINERS file. We will be deleting the board-specific directories
soon but we need to keep the MAINTAINERS for the defconfig entries.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-02-18 11:57:14 -06:00
David Lechner
9260339c0e arm: mediatek: make mtk_pll_early_init() static
Make the mtk_pll_early_init() function static in several files. It is
only used within those files, so there is no need to have it in the
global namespace.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
2026-02-18 11:57:14 -06:00
David Lechner
35d5cd5415 arm: mediatek: mt8183: remove unused function
Remove the mtk_pll_early_init() function as it is not used anywhere.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
2026-02-18 11:57:14 -06:00
David Lechner
d8c550fb7a board: mediatek: mt8390_evk: remove empty board_init()
Remove empty board_init() function and adjust defconfig to not require
it.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
2026-02-18 11:57:13 -06:00
David Lechner
1af249f511 arm: mediatek: use default weak mtk_soc_early_init()
Add a weak default implementation of mtk_soc_early_init() in spl.c to
avoid having to define it in every SoC init.c file that does not need
any additional early initialization.

The init.h header file is no longer needed in this case and is removed.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-02-18 11:57:13 -06:00
Tom Rini
e8dd062642 Merge patch series "Implement all missing SMBIOS types required by distro tooling"
Raymond Mao <raymondmaoca@gmail.com> says:

From: Raymond Mao <raymond.mao@riscstar.com>

This series finish the last missing puzzle of required SMBIOS types by:
1) Fixing duplicated handles when multiple instances exist in one type;
2) Implementing the rest of required types 9/16/17/19;
3) Adding version control when printing properties for all types.

Type 9/16/17/19 are generally DT-based, the idea is to write these tables
using a hybrid approach:
Explicit DT definitions under existing '/smbios/smbios' take precedence,
with fallback to scan and interpret values from the entire DT.

Moreover, all below APIs:
smbios_get_val_si()
smbios_get_u64_si()
smbios_add_prop_si()
are on top of sysinfo, thus allow vendors to get values from other
subsystems by implementing their own sysinfo driver if needed.

Link: https://lore.kernel.org/r/20260213225254.2544596-1-raymondmaoca@gmail.com
2026-02-18 08:27:58 -06:00
Raymond Mao
4c816ddbad smbios: print the properties only when they exist in a specified version of spec
By checking the payload length, we can know the version of the spec and
skip the ones which are not expected to exist.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Raymond Mao
41b7a09d24 smbios: add support for dynamic generation of Type 19 table
This commit implements SMBIOS Type 19 (Memory Array Mapped Address)
generation with a hybrid approach supporting both:

1. Explicit definition via Device Tree 'smbios' node:
   Child node under '/smbios/smbios/memory-array-mapped-address' will be
   used to populate as individual Type 19 structure directly.
   - Properties follow SMBIOS field names with lowercase letters and
     hyphen-separated words (e.g., 'starting-address', 'ending-address',
     'partition-width', etc.).
   - This method supports precise platform-defined overrides and system
     descriptions.

2. Fallback to automatic DT-based discovery:
   If child node under '/smbios/smbios/memory-array-mapped-address' does
   not exist, the implementation will:
   - Scan all top-level 'memory@' nodes to populate Type 19 structure with
     inferred size and location data.
   - Scan nodes named or marked as 'memory-controller' and parse
     associated 'dimm@' subnodes (if present) to extract DIMM sizes and
     map them accordingly.

This dual-mode support enables flexible firmware SMBIOS reporting while
aligning with spec-compliant naming and runtime-detected memory topology.

Type 19 support is under GENERATE_SMBIOS_TABLE_VERBOSE to avoid
increasing rom size for those platforms which only require basic SMBIOS
support.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Raymond Mao
23674dee60 smbios: add support for dynamic generation of Type 17 table
This commit implements SMBIOS Type 17 (Memory Device) generation with a
hybrid approach supporting both:

1. Explicit definition via Device Tree 'smbios' node:
   Child node under '/smbios/smbios/memory-device' will be used to
   populate as individual Type 17 structure directly.
   - Properties follow SMBIOS field names with lowercase letters and
     hyphen-separated words (e.g., 'physical-memory-array-handle',
     ' memory-error-information-handle', 'configured-memory-speed', etc.).
   - This method supports precise platform-defined overrides and system
     descriptions.

2. Fallback to automatic DT-based discovery:
   If child node under '/smbios/smbios/memory-device' does not exist,
   the implementation will:
   - Scan all top-level 'memory@' nodes to populate Type 17 structure with
     inferred size and location data.
   - Scan nodes named or marked as 'memory-controller' and parse
     associated 'dimm@' subnodes (if present) to extract DIMM sizes and
     map them accordingly.

This dual-mode support enables flexible firmware SMBIOS reporting while
aligning with spec-compliant naming and runtime-detected memory topology.

Type 17 support is under GENERATE_SMBIOS_TABLE_VERBOSE to avoid
increasing rom size for those platforms which only require basic SMBIOS
support.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Raymond Mao
374896158b smbios: add support for dynamic generation of Type 16 table
This commit implements SMBIOS Type 16 (Physical Memory Array)
generation with a hybrid approach supporting both:

1. Explicit definition via Device Tree 'smbios' node:
   Child node under '/smbios/smbios/memory-array' will be used to
   populate as individual Type 16 structure directly.
   - Properties follow SMBIOS field names with lowercase letters and
     hyphen-separated words (e.g., 'memory-error-correction',
     'maximum-capacity', 'extended-maximum-capacity', etc.).
   - This method supports precise platform-defined overrides and system
     descriptions.

2. Fallback to automatic DT-based discovery:
   If child node under '/smbios/smbios/memory-array' does not exist,
   the implementation will:
   - Scan all top-level 'memory@' nodes to populate Type 16 structure with
     inferred size and location data.
   - Scan nodes named or marked as 'memory-controller' and parse
     associated 'dimm@' subnodes (if present) to extract DIMM sizes and
     map them accordingly.

This dual-mode support enables flexible firmware SMBIOS reporting while
aligning with spec-compliant naming and runtime-detected memory topology.

Type 16 support is under GENERATE_SMBIOS_TABLE_VERBOSE to avoid
increasing rom size for those platforms which only require basic SMBIOS
support.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Raymond Mao
83b28b55d7 smbios: add support for dynamic generation of Type 9 system slot tables
This commit introduces support for generating SMBIOS Type 9 (System Slot)
tables using a hybrid approach:

1. Explicit Device Tree definitions:
   Child node under '/smbios/smbios/system-slot' will be interpreted as
   individual slot definitions.
   - Each child represents a slot (e.g., isa, pcmcia, etc.).
   - Properties follow the SMBIOS specification using lowercase
     hyphen-separated names such as 'slot-type', 'slot-id',
     'segment-group-number', 'bus-number', 'slot-information', etc.
   - This approach allows full customization of each system slot and is
     especially suitable for platforms with well-defined slot topology.

2. Automatic detection fallback:
   If child node under '/smbios/smbios/system-slot' does not exist, the
   implementation will scan the entire device tree for nodes whose
   'device_type' matches known slot-related types ("pci", "isa", "pcmcia",
   etc.).
   - When a match is found, default values or heuristics are applied to
     populate to the System Slot table.
   - This mode is useful for platforms that lack explicit SMBIOS nodes
     but still expose slot topology via standard DT conventions.

Together, two approaches ensure that SMBIOS Type 9 entries are available
whether explicitly described or automatically derived.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Raymond Mao
87f8a143da smbios: Fix duplicated smbios handles
Some smbios types can have multiple instances (e.g. Type 7, 9, 16, 17,
19), thus the 'handle' argument should be a pointer so that the value
can be accumulated when writing all the instances.
This also fix the observed duplicated Type 7 handles.

Fixes: bcf456dd36 ("smbios: add detailed smbios information")
Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00
Tom Rini
9ddccb5144 Merge patch series "treewide: Clean up usage of DECLARE_GLOBAL_DATA_PTR"
Peng Fan (OSS) <peng.fan@oss.nxp.com> says:

This patch set primarily removes unused DECLARE_GLOBAL_DATA_PTR
instances.

Many files declare DECLARE_GLOBAL_DATA_PTR and include
asm/global_data.h even though gd is never used. In these cases,
asm/global_data.h is effectively treated as a proxy header, which is
not a good practice.

Following the Include What You Use principle, files should include
only the headers they actually depend on, rather than relying on
global_data.h indirectly. This approach is also adopted in Linux kernel
[1].

The first few patches are prepartion to avoid building break after
remove the including of global_data.h.

A script is for filtering the files:
list=`find . -name "*.[ch]"`
for source in ${list}
do
        result=`sed -n '/DECLARE_GLOBAL_DATA_PTR/p' ${source}`
        if [ "${result}" == "DECLARE_GLOBAL_DATA_PTR;" ]; then
                echo "Found in ${source}"

                result=`sed -n '/\<gd\>/p' ${source}`
                result2=`sed -n '/\<gd_/p' ${source}`
                result3=`sed -n '/\<gd->/p' ${source}`
                if [ "${result}" == "" ] && [ "${result2}" == "" ] && [ "${result3}" == "" ];then
                        echo "Cleanup ${source}"
                        sed -i '/DECLARE_GLOBAL_DATA_PTR/{N;/\n[[:space:]]*$/d;s/.*\n//;}' ${source}
                        sed -i '/DECLARE_GLOBAL_DATA_PTR/d' ${source}
                        sed -i '/global_data.h/d' ${source}
                        git add ${source}
                fi
        fi
done

[1] https://lpc.events/event/17/contributions/1620/attachments/1228/2520/Linux%20Kernel%20Header%20Optimization.pdf

CI: https://github.com/u-boot/u-boot/pull/865

Link: https://lore.kernel.org/r/20260209-cleanup-v2-0-73a3a84ddbdb@nxp.com
2026-02-17 13:51:26 -06:00
Peng Fan
0f90b1e715 treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.

Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <anshuld@ti.com> #TI boards
Acked-by: Yao Zi <me@ziyao.cc> #TH1520
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
406982f091 socfpga: clock_manager_s10: Add missing header files
struct udevice and u32 are used in this file. Add missing header to avoid
building break after asm/global_data.h is removed from this file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
15398169c4 renesas: common: Include asm-generic/u-boot.h
struct bd_info is defined in asm-generic/u-boot.h. Include it to avoid
building error after asm/global_data.h are removed from this file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
d3b0b3c118 pci: layerspace: Add missing header files
struct fdt_resource, u32 and bool types are used in this header, add
missing header files following "include what you use".

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
b2db865c4e nxp: emc2305: Cleanup headers
There is no user of gd, drop the usage of DECLARE_GLOBAL_DATA_PTR and
the including of "asm/global_data.h". Include config.h to avoid
build error.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
90d7b4c8a5 rockchip: evk_rk3308: Cleanup headers
There is no user of 'gd', so drop the usage of DECLARE_GLOBAL_DATA_PTR
and the including of 'asm/global_data.h'. Also include correct headers
to avoid build error.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
f025f9de60 tegra: pmc: Cleanup headers
No gd users, so remove DECLARE_GLOBAL_DATA_PTR and the including of
"asm/global_data.h". And include "asm/arch-tegra/tegra.h" to avoid
build error.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
49f60d60f7 toradex: common: Add missing headers
Include linux/types.h and asm-generic/u-boot.h. Missing the two header
files will cause building error after cleaning up usage of
asm/global_data.h.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
afbeb3a092 xtensa: relocate: Add missing headers
memset and size_t are used in this file, so add missing headers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
68ab09e3a2 test: log_filter: Include vsprintf.h
snprintf is used, need to include vsprintf.h. Otherwise there will
be build error after asm/global_data.h is removed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
ecbbea0d16 cmd: mem: Include vsprintf.h
hextoul is used in this file, so include header file vsprintf.h.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
befa5440b9 common: cli_hush: Include vsprintf.h
sprintf is used in this file, so include header vsprintf.h.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
87b9ccf6e4 mediatek: mt7622: Drop useless board files
No functions except reserving gd in the board files. The files are
useless, remove them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:22 -06:00
Peng Fan
090536b8e6 beacon: imx8mm/n: Drop useless files
No functions except reserving gd in the board files. The files are
useless, remove them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-17 13:50:21 -06:00
Tom Rini
54f9b6528e Merge tag 'xilinx-for-v2026.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.07-rc1

gpio:
- Add gpio delay driver

zynqmp:
- Wire gpio usb delay
- Enable SPL pinctrl per pin

xilinx:
- Enable NFS support

versal2:
- Extend DDR initialization

zynqmp-rtc:
- Use clock framework for calibration value
2026-02-16 09:04:55 -06:00
Tom Rini
b3be5b4c26 Merge tag 'ab-next-13022026' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/29283

An update on AB subsystem allowing multiple FWU metadata
storage drivers to be selected simultaneously instead of
being mutually exclusive. The board can then select the
appropriate driver at runtime based on the devicetree
description.
2026-02-16 09:04:33 -06:00
Tom Rini
ed6e970569 Merge tag 'efi-next-2026-02-15' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request efi-next-2026-02-15

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/1380382

UEFI:

* Add MBR support to EFI_PARTITION_INFO_PROTOCOL
  * disk: part_dos: Move header to the main include directory
  * disk: part_dos: Align dos_partition_t with struct partition
  * disk: part_efi: Remove redundant struct partition definition
  * disk: part_dos: Document part_get_info_extended() helper function
  * disk: part_dos: Refactor to allow retrieving raw MBR partition data
  * efi_loader: disk: Extend EFI_PARTITION_INFO_PROTOCOL to support MBR
  * efi_selftest: Enhance MBR test for PARTITION_INFO_PROTOCOL

* Prepare for supporting more stores (e.g. SPI-flash) for EFI variables.
  * efi_var: Unify read/write access helper function
  * efi_loader: Setup default location for UEFI Variables storing
  * efi_var_file: refactor to move buffer functions
2026-02-15 13:28:32 -06:00
Michal Simek
e54fbb2f90 efi_loader: Setup default location for UEFI Variables storing
EFI_VARIABLE_FILE_STORE is only available when FAT_WRITE is enabled but
that's not valid for all platforms and dependency should be covered.

Also Kconfig behavior is that if default option is not valid then Kconfig
selects the first presented valid option instead hence it is better to
record EFI_VARIABLE_NO_STORE as safe default option.

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 09:15:45 +01:00
Michal Simek
4fcc248c94 efi_var: Unify read/write access helper function
efi_var_to/from_file() suggest method where variables are placed. But there
is no reason for it and generic name can be used to wire also different
locations for variables.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905D3-CC
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-02-15 09:15:28 +01:00
Shantur Rathore
38ea3bfc65 efi_var_file: refactor to move buffer functions
Currently efi_var_file.c has functions to store/read
EFI variables to/from memory buffer. These functions
can be used with other EFI variable stores so move
them out to efi_var_common.c

Signed-off-by: Shantur Rathore <i@shantur.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905D3-CC
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-02-15 09:14:31 +01:00
Javier Martinez Canillas
fd2d986876 efi_selftest: Enhance MBR test for PARTITION_INFO_PROTOCOL
The EFI_PARTITION_INFO_PROTOCOL test was added before the protocol fully
supported MBR partitions. As a result, it lacked specific checks for the
content of the raw MBR partition record.

Now that MBR support has been implemented, enhance the selftest to provide
coverage for the MBR entries too.

This verifies that the protocol correctly reads and exposes MBR partition
records and prevents this functionality to regress due future changes.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-02-15 08:59:24 +01:00
Javier Martinez Canillas
16b8554cd4 efi_loader: disk: Extend EFI_PARTITION_INFO_PROTOCOL to support MBR
The EFI_PARTITION_INFO_PROTOCOL provides detailed information about
partitions. The UEFI specification mentions that both GPT and MBR
partition schemes are supported, but the U-Boot implementation only
supports the former.

This can cause compatibility issues for platforms whose boot ROM only
supports MBR. This change adds support for MBR partition tables to
the protocol, making U-Boot compatible with systems that require a
legacy MBR table.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Javier Martinez Canillas
5e80255888 disk: part_dos: Refactor to allow retrieving raw MBR partition data
Refactor the part_get_info_extended() helper function (which already
recursively traverses DOS partitions) to optionally return the raw MBR
partition structure (dos_partition_t).

This allows other subsystems, such as EFI, to retrieve the partition
details in the legacy MBR format.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Javier Martinez Canillas
d25c5d657e disk: part_dos: Document part_get_info_extended() helper function
The function receives many parameters but these are not documented.
Add a description for these to make it easier to follow what it does.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Javier Martinez Canillas
aee9b7d0e0 disk: part_efi: Remove redundant struct partition definition
Now that dos_partition_t and struct partition are identical, the duplicated
data structure definition in the part_efi.h header can just be removed.

This results in a single, shared definition for MBR partition table
entries, instead of having the same definition in two different places.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Javier Martinez Canillas
1450a4555d disk: part_dos: Align dos_partition_t with struct partition
The dos_partition_t struct defined in part_dos.h is nearly identical to
the struct partition defined in part_efi.h. They differ primarily in how
define their starting sector and number of sectors fields.

The former uses unsigned char arrays while the latter uses __le32 types.
Using __le32 is preferable, as it removes the ambiguity and potential
misuse of a raw byte array. This also aligns the structure with how the
Linux kernel defines it nowadays, which is the original source of it.

To prepare for future consolidation where one of the data structures can
be removed, this change aligns both definitions and updates all accessors
for dos_partition_t.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Javier Martinez Canillas
63d52576e7 disk: part_dos: Move header to the main include directory
There are two different struct definitions for MBR partition table
entries: one in part_dos.h and a nearly identical one in part_efi.h.

To enable future consolidation of these two structures, move part_dos.h
to the main include directory. This makes it accessible from other parts
of the codebase, such as part_efi.h, and is the first step toward removing
the redundant definition.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-15 08:43:58 +01:00
Tom Rini
136faf7b0c Merge tag 'u-boot-socfpga-next-20260213' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
This pull request updates SoCFPGA platforms with DDR improvements, new
board support, Agilex5 enhancements and general cleanup across the
codebase.

DDR and memory handling

  * Add DRAM size checking support for Arria10.
  * Widen MEM_TOTAL_CAPACITY mask handling in IOSSM mailbox driver.
  * Assign unit address to memory node for improved memory
    representation and consistency.

Agilex / Agilex5 updates

  * Restore multi-DTB support for NAND boot and fix NAND clock handling.
  * Enable SD card UHS mode and eMMC HS200/HS400 mode support on Agilex5.
  * Fix DT property naming conventions for Agilex5.
  * Exclude AGILEX_L4_SYS_FREE_CLK from clock enable/disable operations
    to avoid unintended clock control.

New board support

  * Add support for CoreCourse Cyclone V boards:
     * AC501
     * AC550
Including device trees, QTS configuration, defconfigs and maintainers
entries.

Fixes and cleanup

  * Fix GEN5 handoff script path.
  * Remove incorrect CONFIG_SPL_LDSCRIPT settings.
  * Replace legacy TARGET namespace and perform related cleanup across
    SoCFPGA code.
  * General Kconfig, build and SoCFPGA maintenance updates.

Overall this pull request improves platform robustness, adds new board
coverage and cleans up legacy configuration usage across the SoCFPGA
U-Boot codebase.

[trini: Change TARGET_SOCFPGA_CYCLONE5 to ARCH_SOCFPGA_CYCLONE5 in the
new platforms this added]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-02-14 11:12:59 -06:00
Jean-Marie Verdun
6caff66ce4 soft_spi performance enhancement
Add a test when delay is set to 0 to improve performances
by 20% on ARM based systems

Signed-off-by: Jean-Marie Verdun <verdun@hpe.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-02-14 11:06:46 -06:00
Tien Fong Chee
62f7a94602 Replace TARGET namespace and cleanup properly
TARGET namespace is for machines / boards / what-have-you that
building U-Boot for. Simply replace from TARGET to ARCH
make things more clear and proper for ALL SoCFPGA.

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

# Conflicts:
#	drivers/ddr/altera/Makefile
2026-02-14 11:06:46 -06:00
Brian Sune
3d1dc5b79f Add CoreCourse socfpga Board - AC550
CoreCourse Altera GEN5 Cyclone V board
do support different size and formfactor.
Now introducing AC550 C5 to mainstream u-boot
This is a more complex and unified board with
feature. More info on [1]

[1] https://corecourse.cn/forum.php?mod=viewthread&tid=29788&extra=page%3D1

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Brian Sune
97b17ecae8 Add CoreCourse socfpga Board - AC501
CoreCourse Altera GEN5 Cyclone V board
do support different size and formfactor.
Now introducing AC501 C5 to mainstream u-boot
This is a UBGA-484 based board with basic
feature. More info on [1]

[1] https://corecourse.cn/forum.php?mod=viewthread&tid=27704&highlight=AC501

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Tanmay Kathpalia
4f116c8263 arm: agilex5: Enable eMMC HS200 and HS400 mode support
Enable high-speed eMMC modes on Agilex5 SoC development kit for
improved storage performance.

Defconfig changes:
- Enable CONFIG_MMC_HS400_SUPPORT and CONFIG_SPL_MMC_HS400_SUPPORT

Device tree changes:
- Add mmc-hs200-1_8v and mmc-hs400-1_8v capabilities
- Add sdhci-caps-mask to mask SDHCI_CLOCK_V3_BASE_MASK bits
- Add sdhci-caps to set 200MHz base clock and 8-bit bus width
- Add PHY and controller timing configuration for HS200 mode
- Add PHY and controller timing configuration for HS400 mode

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Acked-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Tanmay Kathpalia
d60ff5ab9e arm: agilex5: Enable SD card UHS mode support
Enable Ultra High Speed (UHS-I) mode support for SD cards on
Agilex5 SoC development kit.

Defconfig changes:
- Enable CONFIG_MMC_UHS_SUPPORT and CONFIG_SPL_MMC_UHS_SUPPORT

Device tree changes:
- Remove no-1-8-v to allow 1.8V signaling for UHS modes
- Add sd-uhs-sdr50 and sd-uhs-sdr104 capabilities
- Add sdhci-caps and sdhci-caps-mask for proper capability reporting
- Add PHY and controller timing configuration

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Acked-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Tanmay Kathpalia
3a20a8591d arm: dts: agilex5: Fix DT property naming convention
Replace underscores with hyphens in the PHY timing configuration
property names to follow standard devicetree naming conventions:
- phy-gate-lpbk_ctrl-delay-sd-ds -> phy-gate-lpbk-ctrl-delay-sd-ds
- phy-gate-lpbk_ctrl-delay-sd-hs -> phy-gate-lpbk-ctrl-delay-sd-hs

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Acked-by: Tien Fong Chee <tien.fong.chee@altera.com> Best regards, Tien
2026-02-14 11:06:46 -06:00
Brian Sune
8f41874f46 fix socfpga GEN5 handoff script path
src variables not longer defined, fixed by srctree

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com> Best regards,
2026-02-14 11:06:46 -06:00
Naresh Kumar Ravulapalli
cb23bbf4d7 drivers: ddr: altera: iossm_mailbox: widen MEM_TOTAL_CAPACITY mask
The previous mask for MEM_TOTAL_CAPACITY_INTF was limited to 8 bits,
which could truncate DDR size values on larger-memory systems.

Update INTF_CAPACITY_GBITS_MASK to 32 bits to correctly represent
the full capacity field according to the hardware specification.

Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com> Best regards,
2026-02-14 11:06:46 -06:00
Alif Zakuan Yuslaimi
22aac1c5b4 clk: altera: agilex: Exclude AGILEX_L4_SYS_FREE_CLK from enable/disable operations
AGILEX_L4_SYS_FREE_CLK is a free-running clock with no gate control in
hardware, therefore attempting to enable or disable it is not applicable.

Update the clock driver to explicitly exclude this clock ID from
enable/disable operations by returning -EOPNOTSUPP in bitmask_from_clk_id()
and treating this as a no-op in the socfpga_clk_enable() and
socfpga_clk_disable() functions.

This prevents unnecessary register access for clocks that cannot be gated
and ensures clean handling when the clock is present in the device tree.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Alif Zakuan Yuslaimi
ad642af809 arch: arm: socfpga: Assign unit address to memory node
Assign unit address of 0 to memory node following latest Linux convention.

Without this unit address, SPL will not be able to retrieve proper memory
node values set from the device tree.

Update all dts files which includes the common .dtsi to add unit address
as well.

Fixes: e291277689 ("sync socfpga common u-boot dts")

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Alif Zakuan Yuslaimi
847e67582b ddr: altera: arria10: Add DRAM size checking
Add DRAM size checking compare between size from device tree and actual
hardware.

Trigger hang if DRAM size from device tree is greater than actual hardware.
Display warning message if DRAM size mismatch between device tree and
actual hardware.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com> Best regards,
2026-02-14 11:06:46 -06:00
Dinesh Maniyam
83f2843f20 socfpga: agilex: fix NAND clock handling
In v2025.10, the Agilex clock driver was updated to support
clk_enable() and clk_disable() using clock-ID based bitmasks.
However, only AGILEX_NAND_CLK was implemented, while the NAND DT
node still referenced both nand and nand_x clocks.

Since AGILEX_NAND_X_CLK is not defined in the clock driver or the
clock-ID specification, clk_enable() failed during NAND probe.
As a result, the Denali NAND controller never completed
initialization.

Fix this by mapping the NAND X clock to the existing l4_mp clock
bitmask, aligning the DT expectations with the clock driver and
restoring proper NAND controller initialization.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Tom Rini
fee6009aab socfpga: Remove incorrect CONFIG_SPL_LDSCRIPT settings
These platforms set CONFIG_SPL_LDSCRIPT to a file that doesn't exist,
and in turn were using the default of arch/arm/cpu/armv8/u-boot-spl.lds
instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:46 -06:00
Dinesh Maniyam
044d6a800e arm: socfpga: agilex: restore Multi-DTB support for NAND boot
From v2025.10 onward, Agilex platforms use the upstream Linux device
tree sources instead of local copies.
To continue using a single defconfig while supporting NAND boot,
restore Multi-DTB support and update the DT paths to the upstream
intel directory.

NAND boot is configured to use FDT-1, while other boot flows
continue to use the default device tree.
No functional change is intended for non-NAND boot paths.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2026-02-14 11:06:45 -06:00
Suhaas Joshi
4696a38bef board: toradex: Make A53 get RAM size from DT in K3 boards
`dram_init()` is called by R5 SPL and U-Boot, both. It starts by
computing the size of the RAM. In verdin-am62(p), it does so by calling
`get_ram_size()`. This function computes the size of the RAM by writing
over the RAM.

When R5 computes the size of the RAM, it does not update the DT with
this size. As a result, when A53 invokes `dram_init()` again, it has to
compute the size through `get_ram_size()` again.

Commit 13c54cf588 and 0c3a6f748c add firewall over ATF's and OPTEE's
regions. This firewall is added during the R5 SPL stage of boot. So when
A53 attempts to write over RAM in `get_ram_size()`, it writes over the
protected region. Since A53 is a non-secure core, this is blocked by the
firewall.

To fix this, do the following:
    * Implement `spl_perform_board_fixups()` function for verdin-am62
      and verdin-am62p. Make this function call `fixup_memory_node()`,
      which updates the DT.
    * Add an if-block in `dram_init()`, to ensure that only R5 is able
      to call `get_ram_size()`, and that A53 reads this size from the
      DT.

Signed-off-by: Suhaas Joshi <s-joshi@ti.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2026-02-14 11:06:45 -06:00
Shiji Yang
eae0ca2125 mtd: spi-nor-tiny: fix 4-Byte address instructions for Cypress and ISSI
In theory, for the same vendor, we should use the same instructions as
the spi-nor-core implementation.

Fixes: 72151ad10f ("mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte")
Fixes: 5bf3f3dd11 ("mtd: spi-nor: Enable QE bit for ISSI flash")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2026-02-13 10:54:58 -06:00
Miquel Raynal
4f76c90bad mtd: spi-nor: winbond: Make sure w25q{01, 02}jv behave correctly
These chips are internally made of two/four dies with linear addressing
capabilities to make it transparent to the user that two/four dies were
used. There is one drawback however, the read status operation is racy
as the status bit only gives the active die status and not the status of
the other die. For commands affecting the two dies, it means if another
command is sent too fast after the first die has returned a valid
status (deviation can be up to 200us), the chip will get corrupted/in an
unstable state.

The solution adopted here is to iterate manually over all internal
dies (which takes about 30us per die) until all are ready. This approach
will always be faster than a blind delay which represents the maximum
deviation, while also being totally safe.

A flash-specific hook for the status register read had to be
implemented. Testing with the flash_speed benchmark in Linux shown no
difference with the existing performances (using the regular status read
core function).

As the presence of multiple dies is not filled in these chips SFDP
tables (the table containing the crucial information is optional), we
need to manually wire the hook.

This change is adapted from Linux.

Link: https://lore.kernel.org/all/20250110-winbond-6-12-rc1-nor-volatile-bit-v3-1-735363f8cc7d@bootlin.com/
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-02-13 10:40:36 -06:00
Marek Vasut
10e84cc16a spi: Clean up more of the stacked parallel ifdeffery
Invert the conditional when to exit, and fall back to common code
in the default case. This should have no functional impact on either
code path.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-02-13 10:38:33 -06:00
Marek Vasut
59fa20f729 spi: Squash spi_slave_of_to_plat() into spi_child_post_bind()
The spi_slave_of_to_plat() is called from one place, spi_child_post_bind().
Squash it into the later and remove the public declaration, make this
function local static. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-02-13 10:38:33 -06:00
Shiji Yang
df5dd0bff4 mtd: spi-nor-ids: remove duplicate IDs for w25q32 and w25q512 series
Some Winbond Flash chips share the same device ID. Names are not that
important for the SPI Flash, hence we don't need these duplicate ID
definitions. And the Flash size of w25q512jv is actually wrong. Clean
them up to keep the source file tidy.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2026-02-13 10:31:07 -06:00
Kory Maincent
7080475bb7 fwu-mdata: Allow multiple metadata storage drivers to be enabled
Change the Kconfig from a "choice" to a conditional block, allowing
multiple FWU metadata storage drivers to be selected simultaneously
instead of being mutually exclusive.

This enables systems with FWU metadata on different storage types
(e.g., both GPT-partitioned block devices and MTD devices) to have
both drivers compiled in. The board can then select the appropriate
driver at runtime based on the devicetree description.

The change converts FWU_MDATA to a menuconfig and replaces the
"choice/endchoice" block with "if FWU_MDATA/endif", making
FWU_MDATA_GPT_BLK default to 'y' for backward compatibility.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-13 16:04:40 +02:00
Michal Simek
601e08e0b7 arm64: zynqmp: Wire gpio-delay driver for USB hub reset
USB hub requires longer delay to get out of the reset to work properly
that's why use gpio-delay to ensure enough waiting time.

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e206e3ab2ad266935b81f5e9d3af2ed47b866826.1770105146.git.michal.simek@amd.com
2026-02-13 08:16:25 +01:00
Michal Simek
6282782afb xilinx: Enable GPIO delay driver on Kria platforms
GPIO delay driver is necessary to use to extend delay times for USB hubs
available on the Kria platforms.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa3566571a124b0933cbe971a2db109f83157ae2.1770105146.git.michal.simek@amd.com
2026-02-13 08:16:25 +01:00
Michal Simek
b86fa3fd24 gpio: Add GPIO delay driver
Add a GPIO controller driver that provides configurable delays when
setting GPIO output values. This is useful for hardware that requires
specific timing delays during power sequencing or GPIO state changes.

The driver wraps underlying GPIO controllers and adds programmable
ramp-up and ramp-down delays specified in microseconds through the
device tree. Each GPIO can have independent delay timings.

Device tree binding matches Linux.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/575998efc6ba0e405640789cf8d05f0b633f496e.1770105146.git.michal.simek@amd.com
2026-02-13 08:16:25 +01:00
Michal Simek
770a1ad4e2 xilinx: mbv: Disable EFI loader
There is no intention to use EFI on Microblaze V that's why disable it to
save some space. Also it is indication that this feature is not
tested/supported.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2b14005e41e0688ff9598d0b3f2cfbdf82c8ff91.1770798604.git.michal.simek@amd.com
2026-02-13 08:16:25 +01:00
Sean Anderson
df1875ea31 pinctrl: zynqmp: Add SPL support
Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like

	display-port {
		mux {
			groups = "dpaux0_1";
			function = "dpaux0";
		};
	};

can be replaced by

	display-port {
		mux {
			pins = "MIO34", "MIO35", "MIO36", "MIO37";
			function = "dpaux0";
		};
	};

While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.

Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260129184011.3932790-1-sean.anderson@linux.dev
2026-02-13 08:16:25 +01:00
Pranav Tilak
df4d85b9d1 xilinx: Enable NFS support for all Xilinx platforms
Enabled the default utilization of the NFS command on all Xilinx
platforms to facilitate booting images through the network using
the NFS protocol.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260130114148.1817379-1-pranav.vinaytilak@amd.com
2026-02-13 08:16:24 +01:00
Pranav Sanwal
3aebac5a75 arm64: versal2: Populate DRAM banks before page table size calculation
Move DRAM bank detection from fdtdec to custom implementation to
ensure memory banks are populated before get_page_table_size() is
called during MMU initialization.

The current fdtdec-based approach populates gd->bd->bi_dram[] too
late in the boot sequence, causing get_page_table_size() to be
called with unpopulated DRAM information. This prevents dynamic
page table sizing based on actual memory configuration.

Parse /memory nodes in dram_init() to fill versal2_mem_map[]
early enough for MMU setup. Supports up to
CONFIG_NR_DRAM_BANKS (36) non-contiguous banks with high memory
regions (>4GB) and use __weak get_page_table_size implementation
to estimate page table size based on the populated DRAM banks.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260129120021.1328653-3-pranav.sanwal@amd.com
2026-02-13 08:16:24 +01:00
Pranav Sanwal
7105f8f295 fdtdec: Add declaration for get_next_memory_node() helper
Add get_next_memory_node() function declaration to fdtdec.h to support
iterating through multiple memory nodes in device tree. This function
is used to enumerate memory banks when the system has non-contiguous
or multiple memory regions defined with device_type = "memory".

The function implementation already exists in lib/fdtdec.c (lines
1298-1305) but was missing the public declaration in the header file.
This patch adds the declaration and includes dm/ofnode_decl.h for the
ofnode type definition.

This is needed for platforms that require early memory enumeration
before standard fdtdec_setup_memory_banksize() is called, particularly
for dynamic MMU page table size calculation based on actual DRAM
configuration.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260129120021.1328653-2-pranav.sanwal@amd.com
2026-02-13 08:16:24 +01:00
Pranav Tilak
350ca5a90b rtc: zynqmp: Add clock framework support with calibration fallback
Add support for reading RTC clock from device tree using clock
framework also update the default calibration value to 0x7FFF
as per RTC specifications.

Falls back to 'calibration' property if clock unavailable, and uses
default calibration if neither is present. Only writes calibration when
hardware register reads zero.

The calibration write previously in zynqmp_rtc_set() has been moved to
the probe function. The earlier implementation wrote calibration on
every time update to clear the tick counter, but since calibration is
now dynamically configured from clock framework or device tree during probe,
it only requires one-time initialization. This avoids repeated tick
counter resets and unnecessary overhead.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260120110056.3640303-1-pranav.vinaytilak@amd.com
2026-02-13 08:16:24 +01:00
Tom Rini
9e6b66409a Merge tag 'ab-next-11022026' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
Kory has updated the A/B implementation and added an invalid bank
state. This is already described in the spec and can help boards
boot faster by skipping banks marked as invalid
2026-02-11 10:42:18 -06:00
Kory Maincent
9367b8d933 fwu: Mark failed bank as invalid during rollback
When boot_idx differs from active_idx at boot time, it indicates a
rollback scenario where the firmware update failed and the system
reverted to the previous working bank. In this case, mark the failed
bank (active_idx) as invalid to prevent future boot attempts from that
bank.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-11 12:17:18 +02:00
Kory Maincent
e8d9ad18f0 fwu: Pass bank state enum to fwu_state_machine_updates()
Change fwu_state_machine_updates() to accept an enum fwu_bank_states
parameter instead of a boolean. This makes the function interface more
explicit and prepares for adding FWU_BANK_INVALID support to handle
boot failures on the active bank.

Convert the FWU_BANK_* defines to an enum and update all call sites
accordingly.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-11 12:17:18 +02:00
Tom Rini
cff4387c81 Merge patch series "env: Provide another work-around for unquoting fdtfile"
This series from Vagrant Cascadian <vagrant@debian.org> provides a
way for plain text environments to avoid having extraneous quotes in how
they use CONFIG_DEFAULT_FDT_FILE.

Link: https://lore.kernel.org/r/20260130040424.472735-1-vagrant@debian.org
2026-02-10 15:55:48 -06:00
Vagrant Cascadian
03d2d5fc00 board: sifive: unmatched: set fdtfile with unquoted variable.
The fdtdfile variable contains quotes:

  printenv fdtfile
  fdtfile="sifive/hifive-unmatched-a00.dtb"

But this leads to issues which booting with an extlinux.conf format
file failing to find the .dtb file:

  Retrieving file: /usr/lib/linux-image-6.12.63+deb13-riscv64/"sifive/hifive-unmatched-a00.dtb"
  Skipping fdtdir /usr/lib/linux-image-6.12.63+deb13-riscv64/ for failure retrieving dts

Use the DEFAULT_FDT_FILE variable which has the quotes removed.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2026-02-10 15:55:45 -06:00
Vagrant Cascadian
b3087d21f0 env: Provide another work-around for unquoting fdtfile
Some boards use CONFIG_DEFAULT_FDT_FILE to specify the value of
fdtfile, althugh the quotes get embedded in the value.

Provide DEFAULT_FDT_FILE with the quotes stripped.

This is a similar work-around to the one provided in commit
d085e692c9 for
CONFIG_DEFAULT_DEVICE_TREE.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-02-10 15:55:45 -06:00
Tom Rini
6f7fe31bf6 Merge patch series "am335x: failsafe bootloader update"
Rasmus Villemoes <ravi@prevas.dk> says:

Make it possible to update the (whole) bootloader on am335x robustly,
i.e. so that a power failure or random OOM killing of the update
process or other interruptions do not result in a bricked board.

The order the trial bits gets set is somewhat odd, but is clearly what
happens, and somebody else trying to reverse engineer the ROM code has
observed the same thing: See the TracingVectors.ods in
https://github.com/sjgallagher2/am335xbootrom .

Link: https://lore.kernel.org/r/20260129105433.2624686-1-ravi@prevas.dk
2026-02-10 15:54:09 -06:00
Rasmus Villemoes
a672456d4b doc: am335x: document use of CONFIG_SPL_AM33XX_MMCSD_MULTIPLE
Document how one can use the CONFIG_SPL_AM33XX_MMCSD_MULTIPLE option
to implement a scheme for failsafe updating of the whole bootloader on
the am335x.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
2026-02-10 15:54:04 -06:00
Rasmus Villemoes
589d0a687b am335x: add support for loading u-boot from multiple offsets
The am335x knows nothing about eMMC boot partitions, so in order to
implement an update procedure of the bootloader which is robust
against power failure or other interruptions, one must make use of the
fact that ROM code on the am335x looks for a valid first stage
bootloader at several different offsets. Updating that can then be
implemented by (assume we put MLO at offsets 128K and 256K):

(1) At least one of the two slots must contain a valid header, since
we successfully booted. Pick the other one.

(2) Overwrite the first sector of the slot chosen in step (a) with all
zeroes.

(3) Write everything but the first sector to the chosen slot.

(4) Write the first sector (containing the magic signature that the
boot ROM uses to identify a valid image) to the chosen slot.

(5) Repeat steps (2)-(4) for the other slot.

It's not possible to simply write the whole MLO in one go, especially
not when updating the 128K slot, because an interruption after the
first sector is written would make the ROM code believe the image is
valid.

But this only caters for SPL itself; regardless of where SPL was
loaded from, it would go on to load U-Boot proper from
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR. So in order to update the whole
bootloader, we need to teach SPL to use a different offset for U-Boot
proper depending on where SPL itself was loaded from (*). With that,
the update procedure is just amended by a step

(3a) Write U-Boot proper to the offset corresponding to the SPL slot
being updated.

We can know (*) because the ROM code sets a new bit in a certain
"trace vector" before each successive attempt.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
2026-02-10 15:54:04 -06:00
Tom Rini
2f1c8b29f0 Squashed 'dts/upstream/' changes from 08831944f4e7..258d5b0e2447
258d5b0e2447 Merge tag 'v6.19-dts-raw'
86af5e1bcfa6 Merge tag 'sound-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
7926bd58a9e6 ASoC: dt-bindings: ti,tlv320aic3x: Add compatible string ti,tlv320aic23
1f9a05ba82aa Merge tag 'v6.19-rc8-dts-raw'
a1331106ed0e Merge tag 'sound-6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
1f3b793812ad Merge tag 'pinctrl-v6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
83d4f0ccb003 dt-bindings: pinctrl: marvell,armada3710-xb-pinctrl: fix 'usb32_drvvbus0' group name
8330000d64b9 Merge tag 'v6.19-rc7-dts-raw'
e1c8a6586b9e Merge tag 'char-misc-6.19-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
9d7f49814a08 Merge tag 'drm-fixes-2026-01-23' of https://gitlab.freedesktop.org/drm/kernel
33e10575ba67 Merge tag 'mediatek-drm-fixes-20260119' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-fixes
502e301bd09b Merge tag 'soc-fixes-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
77cb239b1bd2 Merge tag 'qcom-arm64-fixes-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
7f4c4555bace Merge tag 'v6.19-rc6-dts-raw'
877a96726500 dt-bindings: display: mediatek: Fix typo 'hardwares' to 'hardware'
164dd16eee3f ASoC: dt-bindings: fsl,sai: Add support for i.MX952 platform
a206091d6bb4 Merge tag 'phy-fixes-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
0f012bccce3a Merge tag 'usb-6.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
d0b33b5b8f70 Merge tag 'i2c-for-6.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
9636e6e27a46 Merge tag 'loongarch-fixes-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
1181e2804bc4 LoongArch: dts: loongson-2k1000: Fix i2c-gpio node names
03efda1ffbf8 LoongArch: dts: loongson-2k2000: Add default interrupt controller address cells
3a83a163ea30 LoongArch: dts: loongson-2k1000: Add default interrupt controller address cells
a11729816e99 LoongArch: dts: loongson-2k0500: Add default interrupt controller address cells
523b55566cd5 LoongArch: dts: Describe PCI sideband IRQ through interrupt-extended
194463f5b49c Merge tag 'sound-6.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
d8169cba2a74 Merge tag 'icc-6.19-rc6' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-linus
2f9163f99b22 Merge tag 'v6.19-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
58af343bca3c Merge tag 'at91-fixes-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes
49b8d68a25d7 Revert "arm64: tegra: Add interconnect properties for Tegra210"
2748575beb27 ASoC: rt5640: Fix duplicate clock properties in DT binding
be9fcab781f7 ASoC: Fix sdw_utils calling wrong codec init callbacks
45fc8146dea3 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
62eee78f7ba7 ASoC: dt-bindings: realtek,rt5640: Various fixes
f92c6f41e54e dt-bindings: i2c: brcm,iproc-i2c: Allow 2 reg entries for brcm,iproc-nic-i2c
572c414fb856 Merge tag 'v6.19-rc5-dts-raw'
29dd1e5883e6 ASoC: dt-bindings: rockchip-spdif: Allow "port" node
99c313ffb090 ASoC: dt-bindings: realtek,rt5640: Allow 7 for realtek,jack-detect-source
01d8ff76dd16 ASoC: dt-bindings: realtek,rt5640: Add missing properties/node
bba647abc3d4 treewide: Update email address
bea77a103df4 Merge tag 'soc-fixes-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
62eb1ba19c9f arm64: dts: rockchip: Drop unsupported properties
8f4c82a56b75 arm64: dts: rockchip: Fix gpio pinctrl node names
e1afff67bb26 arm64: dts: rockchip: Fix pinctrl property typo on rk3326-odroid-go3
abc7ff4fa7cc arm64: dts: rockchip: Drop "sitronix,st7789v" fallback compatible from rk3568-wolfvision
2eacc2e311e5 ASoC: dt-bindings: realtek,rt5640: Document port node
8dcd926c2349 ASoC: dt-bindings: realtek,rt5640: Update jack-detect
60fd2fe95a61 ASoC: dt-bindings: realtek,rt5640: Document mclk
8f283674df60 ARM: dts: microchip: sama7d65: fix size-cells property for i2c3
a4a74fdd79d7 ARM: dts: microchip: sama7d65: fix the ranges property for flx9
768bc98f0c73 arm64: dts: hisilicon: hikey960: Drop "snps,gctl-reset-quirk" and "snps,tx_de_emphasis*" properties
66ca60cee08d Merge tag 'imx-fixes-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
f2ae6fb8d2bd Merge tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux into arm/fixes
7417cdaa2912 dt-bindings: usb: qcom,dwc3: Correct MSM8994 interrupts
a4f29bd59e2a dt-bindings: usb: qcom,dwc3: Correct IPQ5018 interrupts
19e6816f1350 arm64: dts: rockchip: Fix wrong register range of rk3576 gpu
1e400df21c02 arm64: dts: rockchip: Configure MCLK for analog sound on NanoPi M5
8c9a93b38ec0 arm64: dts: rockchip: Fix headphones widget name on NanoPi M5
1bfe67dbe5bb ASoC: codecs: wsa88xx: fix codec initialisation
1412489cfbd5 ASoC: dt-bindings: everest,es8316: Add interrupt support
461f7cf8be63 scsi: ufs: dt-bindings: Fix several grammar errors
4d3756633c63 ARM: dts: microchip: lan966x: Fix the access to the PHYs for pcb8290
81b662a43c49 Merge tag 'v6.19-rc3-dts-raw'
19c1bd2813e7 arm64: dts: mba8mx: Fix Ethernet PHY IRQ support
4ed668fdaf40 arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart
12b18bdb44b3 arm64: dts: imx8mp: Fix LAN8740Ai PHY reference clock on DH electronics i.MX8M Plus DHCOM
eb06a9096fef arm64: dts: freescale: tx8p-ml81: fix eqos nvmem-cells
021df8e41fee arm64: dts: freescale: moduline-display: fix compatible
93e9aa7a1669 dt-bindings: arm: fsl: moduline-display: fix compatible
a588078496ba ARM: dts: imx6q-ba16: fix RTC interrupt level
d2ba45091bab arm64: dts: freescale: imx95-toradex-smarc: fix SMARC_SDIO_WP label position
2d7ef734fa23 arm64: dts: freescale: imx95-toradex-smarc: use edge trigger for ethphy1 interrupt
4b75c0253167 arm64: dts: add off-on-delay-us for usdhc2 regulator
c02d054fa126 arm64: dts: imx8qm-mek: correct the light sensor interrupt type to low level
a0acfe0b87c5 ARM: dts: nxp: imx: Fix mc13xxx LED node names
1dd510906b1b arm64: dts: imx95: correct I3C2 pclk to IMX95_CLK_BUSWAKEUP
1006ba3a4e50 Merge tag 'riscv-for-linus-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
d9aad3641f09 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for qcs8300
08a8dbe8ea5d Merge tag 'v6.19-rc2-dts-raw'
32a7dfc2a476 arm64: dts: rockchip: remove redundant max-link-speed from nanopi-r4s
d192b24273e0 arm64: dts: rockchip: remove dangerous max-link-speed from helios64
e7792596b75b arm64: dts: rockchip: fix unit-address for RK3588 NPU's core1 and core2's IOMMU
03ab33a3ea96 arm64: dts: rockchip: Fix wifi interrupts flag on Sakura Pi RK3308B
7d3e6b50f8c0 Merge tag 'ti-k3-dt-fixes-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/fixes
11efdf36dfc0 spi: dt-bindings: sun6i: Add compatibles for A523's SPI controllers
a6b2fb534f29 Merge tag 'input-for-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
5dbdc4ae9355 Merge tag 'i2c-for-6.19-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
8639177dffeb Merge tag 'spi-fix-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
17c33897cd62 Merge tag 'mmc-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
afb7d1a01985 arm64: dts: broadcom: rp1: drop RP1 overlay
50528aeede8d arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology
7b7100699630 dt-bindings: misc: pci1de4,1: add required reg property for endpoint
2f0f22b271f4 dt-bindings: interconnect: qcom,sa8775p-rpmh: Fix incorrectly added reg and clocks
7a9fcf6ab8f2 dt-bindings: riscv: add Zilsd and Zclsd extension descriptions
cc436e4bc50c Input: add ABS_SND_PROFILE
faad43a2fb2a spi: dt-bindings: snps,dw-abp-ssi: Allow up to 16 chip-selects
584de0162a57 dt-bindings: i2c: qcom-cci: Document SM8750 compatible
b8509bd4f32a dt-bindings: i2c: dw: Add Mobileye I2C controllers
dd8343780c17 arm64: dts: qcom: sm8650: Fix compile warnings in USB controller node
d891d1e44d3e arm64: dts: qcom: sm8550: Fix compile warnings in USB controller node
cb861cf39009 arm64: dts: qcom: sc8280xp: Add missing VDD_MXC links
e930c3218822 dt-bindings: power: qcom,rpmpd: Add SC8280XP_MXC_AO
1627e784e086 arm64: dts qcom: sdm845-oneplus-enchilada: Specify panel name within the compatible
56b2a3870e60 arm64: dts: qcom: talos: Correct UFS clocks ordering
a7ac0ad91575 dt-bindings: Updates Linus Walleij's mail address
2143a2a3696b dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car V3U
5ec0ea9129e0 dt-bindings: clock: sprd,sc9860-clk: Allow "reg" for gate clocks
118700447365 dt-bindings: display/ti: Simplify dma-coherent property
c769e2c753c5 ARM: dts: ixp4xx: Fix up Actiontec MI424WR DTS files
35f2008fe122 arm64: dts: ti: k3-am62-lp-sk-nand: Rename pinctrls to fix schema warnings
c62f0039d689 arm64: dts: ti: k3-am642-phyboard-electra-x27-gpio1-spi1-uart3: Fix schema warnings
584f2cf7a1d8 arm64: dts: ti: k3-am642-phyboard-electra-peb-c-010: Fix icssg-prueth schema warning
c3ccb7a83fcf arm64: dts: rockchip: Fix voltage threshold for volume keys for Pinephone Pro
628d2318ea83 dt-bindings: mmc: sdhci-of-aspeed: Switch ref to sdhci-common.yaml
646e03d391d2 Merge tag 'v6.19-rc1-dts-raw'
27e4159cadfc Merge tag 'rtc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
56e0cdaf295b Merge tag 'soundwire-6.19-rc1_updated' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire
7b5150ead399 Merge tag 'sound-fix-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
3d0dabf47b0f Merge tag 'asoc-fix-v6.19-merge-window' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
f0f0934250b6 Merge tag 'input-for-v6.19-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
e2edeb14808f Merge tag 'i2c-for-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
6a443624d1cf Merge branch 'next' into for-linus
30e39af54e44 Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
f5fad51ae2d8 dt-bindings: rtc: Add Apple SMC RTC
cfd5b64c715b Merge tag 'dmaengine-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
bf630f2ac706 Merge tag 'phy-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
4c7e2e0b8f26 dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
9fb50b526fb0 Merge tag 'i2c-host-6.19-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
e27e9cf06665 dt-bindings: soundwire: qcom: Document v3.1.0 version of IP block
9249f0d52630 dt-bindings: soundwire: qcom: deprecate qcom,din/out-ports
b3eae11a0c46 Merge tag 'i3c/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux
3c339b1de131 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
e6efd6183089 ALSA: hda: dt-bindings: add CIX IPBLOQ HDA controller support
3f18f200ae0c Merge tag 'usb-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
10d06d57c9c1 Merge tag 'tty-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
f0da425ddb66 Merge tag 'char-misc-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
947229d06868 Merge tag 'linux-watchdog-6.19-rc1' of git://www.linux-watchdog.org/linux-watchdog
402fe30160ad Merge tag 'rproc-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux
5d7ed5b55b1d Merge tag 'for-linus-6.19-1' of https://github.com/cminyard/linux-ipmi
28dbe2f83d26 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
87dc53e08620 Merge tag 'soc-drivers-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
925ae13a2bc0 Merge tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
15ee02f5bb4f Merge tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
acaf7715ccdc Merge tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
2226fdf89832 Merge tag 'riscv-for-linus-6.19-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
b3efeb8fd0a4 Merge tag 'powerpc-6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
1007eb4a119f Merge tag 'mm-stable-2025-12-03-21-26' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
2daf1f09b739 Merge tag 'samsung-dt-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
21ffee4e251b Merge tag 'ata-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux
9ef7d05e4c00 Merge tag 'iommu-updates-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux
d65bb5ca843f Merge tag 'pci-v6.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
1e581e9ba93d Merge tag 'for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
91b1b0270bd7 Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
d84b6399f857 Merge tag 'backlight-next-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/backlight
ff977c9fe689 Merge tag 'leds-next-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
24c5fe1d1482 Merge tag 'mfd-next-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
d53721d1dc98 Merge tag 'mmc-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
cf41b8a9c709 Merge tag 'pmdomain-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
7118ea488296 Merge tag 'gpio-updates-for-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
33a751c4ea8b Merge tag 'hwmon-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
de27e96c19f9 Merge tag 'gnss-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/johan/gnss
d1d1ebe68816 Merge tag 'spi-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
f87b749b52ff Merge tag 'regulator-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
59244e8baa96 Merge tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
327ef46abee0 Merge tag 'pwm/for-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux
e1c0999f1e4f Merge tag 'sound-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
eba9eb3da2ab Merge tag 'drm-next-2025-12-03' of https://gitlab.freedesktop.org/drm/kernel
b4a84bb51adf Merge tag 'media/v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
665df3b38f4a Merge tag 'net-next-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
9fc6be695aed Merge branch 'pci/pwrctrl-tc9563'
4713187ca3d3 Merge branch 'pci/controller/spacemit-k1'
9066544f73d0 Merge branch 'pci/controller/sky1'
426ebab3fd95 Merge branch 'pci/controller/s32g'
64f76bf74cd4 Merge branch 'pci/controller/rzg3s-host'
7454f63455a2 Merge branch 'pci/controller/meson'
a1e964ed98bb Merge branch 'pci/controller/mediatek'
e66fd046960f Merge tag 'v6.19-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
67b6a50dea72 Merge branches 'clk-visconti', 'clk-imx', 'clk-microchip', 'clk-rockchip' and 'clk-qcom' into clk-next
e734d4fea59a Merge branches 'clk-socfpga', 'clk-renesas', 'clk-cleanup', 'clk-samsung' and 'clk-mediatek' into clk-next
7bc21d0fa237 dt-bindings: thermal: qcom-tsens: Remove invalid tab character
45eb0cc65e37 dt-bindings: kbuild: Skip validating empty examples
4c6c05eb5803 ASoC: dt-bindings: cirrus,cs42xx8: Reference common DAI properties
a195e4c3af14 Merge tag 'thermal-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
3040d09fb438 Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
afac25a15bea dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings
dcf01056aed3 dt-bindings: PCI: s32g: Add NXP S32G PCIe controller
b17fed158404 Merge tag 'timers-clocksource-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
c235f1f4f597 Merge tag 'irq-drivers-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
2e605626e9e8 Merge tag 'drm-misc-next-2025-12-01-1' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
3b6d4bb205e6 dt-bindings: net: Convert Marvell 8897/8997 bindings to DT schema
e642d5c2d72c dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement
779cd90b5b01 dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712
27f4390e983c dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712
62f947f140b2 Merge tag 'nand/for-6.19' into mtd/next
8ee23f5c68c1 Merge tag 'at24-updates-for-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-mergewindow
cb73a7eadaf4 Merge tag 'wireless-next-2025-11-27' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
ea2ef0c1a161 Merge tag 'thermal-v6.19-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux
503164b9b572 Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'mediatek', 'nvidia/tegra', 'intel/vt-d', 'amd/amd-vi' and 'core' into next
bca9cb69cc0c Merge tag 'cache-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers-late
9989f1b5ef18 Merge tag 'soc-drivers-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers-late
957f13aa92ac Merge tag 'amlogic-drivers-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers-late
0c49a8219b2d Merge tag 'riscv-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
42def4dee20b arm64: dts: mediatek: mt8195: Fix address range for JPEG decoder core 1
be6fcd8a94cd Merge tag 'amlogic-arm64-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
8dc6331b6ab8 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
bccc1bbfdc87 spi: airoha: add support of en7523 SoC (for 6.19)
c3664ef11fab ARM: dts: samsung: exynos4412-midas: turn off SDIO WLAN chip during system suspend
510f660b77dd ARM: dts: samsung: exynos4210-trats: turn off SDIO WLAN chip during system suspend
8ca4e76f8ff8 ARM: dts: samsung: exynos4210-i9100: turn off SDIO WLAN chip during system suspend
ae09f216c8d7 ARM: dts: samsung: universal_c210: turn off SDIO WLAN chip during system suspend
ae259268b06d spi: dt-bindings: airoha: add compatible for EN7523
c1daad24ada3 spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
e3d8f318594e ASoC: stm32: sai: fix device and OF node leaks on
c3562d7dcd24 regulator: Use container_of_const() when all types are
e058859659c0 dt-bindings: remoteproc: qcom: adsp: Add SDM660 CDSP compatible
885f1168d331 dt-bindings: remoteproc: qcom: adsp: Add missing constrains for SDM660 ADSP
8fa38ed9186e dt-bindings: remoteproc: qcom,sc8280xp-pas: Fix CDSP power desc
be01d536023e dt-bindings: remoteproc: qcom,adsp: Make msm8974 use CX as power domain
3b9c9ed9e0d2 dt-bindings: thermal: fsl,imx91-tmu: add bindings for NXP i.MX91 thermal module
b94cdc0fec55 dt-bindings: thermal: tsens: Add QCS8300 compatible
e31d041fd7c2 dt-bindings: slimbus: fix warning from example
35d8e6a51e12 spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
dc2e0509db05 dt-bindings: serial: rsci: Drop "uart-has-rtscts: false"
75baefb7a2ba LoongArch: dts: Add uart new compatible string
8688bf5ec663 dt-bindings: serial: 8250: Add Loongson uart compatible
88edb93f367a dt-bindings: can: mpfs: document resets
aa07baeaf06b dt-bindings: timer: Add Realtek SYSTIMER
a67190264f14 arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs
666783f57d99 arm64: dts: Add gpio_intc node for Amlogic S7D SoCs
b02eae55621e arm64: dts: Add gpio_intc node for Amlogic S7 SoCs
0be5b36d2ae9 arm64: dts: Add gpio_intc node for Amlogic S6 SoCs
1dc7c0a79667 arm64: dts: amlogic: s7d: add ao secure node
d4f66f2822e8 arm64: dts: amlogic: s7: add ao secure node
5f577eeae924 arm64: dts: amlogic: s6: add ao secure node
2ce6173652f6 arm64: dts: amlogic: Fix the register name of the 'DBI' region
4698f107b016 dts: arm64: amlogic: add a5 pinctrl node
e2eda8a9ed94 arm64: dts: amlogic: s7d: add power domain controller node
cabd4784af63 arm64: dts: amlogic: s7: add power domain controller node
e0f9ec95b9f8 arm64: dts: amlogic: s6: add power domain controller node
1edfd33d8ced dts: arm64: amlogic: Add ISP related nodes for C3
ea8ce9294888 arm64: dts: meson: add initial device-tree for Tanix TX9 Pro
ac2ffc666cd0 dt-bindings: arm: amlogic: add support for Tanix TX9 Pro
ca39a8e36acb riscv: dts: starfive: add Orange Pi RV
19644ea3243c dt-bindings: riscv: starfive: add xunlong,orangepi-rv
b4e52d094636 riscv: dts: starfive: Add VisionFive 2 Lite eMMC board device tree
fa1b407dfcd9 riscv: dts: starfive: Add VisionFive 2 Lite board device tree
637ceb101cf6 riscv: dts: starfive: Add common board dtsi for VisionFive 2 Lite variants
dd59c2ed03a6 riscv: dts: starfive: jh7110-common: Move out some nodes to the board dts
6302fde4f7e1 dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite board
1edc03b33bfb dt-bindings: thermal: qcom-tsens: make ipq5018 tsens standalone compatible
9af0cc785f53 Merge tag 'mtk-soc-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers
ac0dcd6fc5a3 Merge tag 'reset-for-v6.19' of https://git.pengutronix.de/git/pza/linux into soc/drivers
03fa0385ca4f Merge tag 'stm32-bus-firewall-for-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers
8a85184e1f55 Merge tag 'qcom-drivers-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
cd791d129e96 dt-bindings: leds: backlight: Add Awinic AW99706 backlight
7632e73179a0 dt-bindings: net: aspeed: add AST2700 MDIO compatible
d40dcf4b9d68 Merge tag 'v6.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
2cb74bad23ce arm64: dts: sprd: sc9860: Simplify clock nodes
36d689c4027d dt-bindings: PCI: Add Renesas RZ/G3S PCIe controller binding
96a83489222a dt-bindings: riscv: Add Svrsw60t59b extension description
982f68da8a3d Add RSPI support for RZ/T2H and RZ/N2H
c80b3bca7be0 dt-bindings: nvmem: imx-ocotp: Add support for i.MX94
8542c736263a dt-bindings: nvmem: don't check node names
9c21064bfd86 dt-bindings: nvmem: mediatek: efuse: Add compatible for MT8189 SoC
1593044c1f15 nvmem: layouts: u-boot-env: add optional "env-size" property
8262ef54b942 dt-bindings: nvmem: Support MediaTek MT8189 evb board efuse
62073706aa64 dt-bindings: nvmem: qfprom: Add sa8775p compatible
e3efb3c7eaa2 dt-bindings: iommu: qcom_iommu: Allow 'tbu' clock
3307f4e54c72 dt-bindings: display: bridge: simple: document the ASL CS5263 DP-to-HDMI bridge
439446caa7ea dt-bindings: vendor-prefixes: Add ASL Xiamen Technology
2ae40b561c2f Merge tag 'icc-6.19-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
397b18ab014e Merge tag 'coresight-next-v6.19' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
06f9e8161227 dt-bindings: perf: fsl-imx-ddr: Add compatible string for i.MX8QM, i.MX8QXP and i.MX8DXL
af6d2b3f535a spi: dt-bindings: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
119fadd043fa dt-bindings: net: wireless: mt76: introduce backoff limit properties
b4f15e7bbec7 dt-bindings: net: wireless: mt76: Document power-limits country property
516951213a82 dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
1ce3fdf42052 riscv: dts: sifive: unmatched: Add PWM controlled fans
8419e857f922 arm64: dts: rockchip: enable RTC for 100ASK DshanPi A1
c1ce151f2d89 arm64: dts: rockchip: enable USB for 100ASK DshanPi A1
905c343ea51e arm64: dts: rockchip: enable button for 100ASK DshanPi A1
3b4c7ee4f4a4 arm64: dts: rockchip: add mmc aliases for 100ASK DshanPi A1
c4f99ac39c86 arm64: dts: rockchip: remove mmc max-frequency for 100ASK DshanPi A1
b4ace70320a8 arm64: dts: rockchip: Enable i2c2 on Orange Pi 3B
475a7b9f0c5f Merge tag 'imx-bindings-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
1c7d5b0fe443 Merge tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/newsoc
ee2c440c1a92 Merge branch 'bst/newsoc' into soc/newsoc
62bf720c5492 arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
7c361f9c44c3 dt-bindings: arm: add Black Sesame Technologies (bst) SoC
f9b990014b47 dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
a0eadb246ed9 Merge tag 'ti-k3-dt-for-v6.19-part2' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
cb9bfe671786 Merge tag 'mvebu-dt64-6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
1f4a6049f1a0 Merge tag 'riscv-sophgo-dt-for-v6.19' of https://github.com/sophgo/linux into soc/dt
847305c3f24f Merge tag 'cix-dt-v6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt
a42a3c0e98cb Merge tag 'stm32-dt-for-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
89606ecdb119 Merge tag 'v6.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
1152f849175c Merge tag 'v6.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
5fcfc4228157 dt-bindings: hwmon: Add AST2700 compatible
84daef868f58 regulator: Add FP9931/JD9930
68a2e8036bb8 Merge tag 'qcom-arm64-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
e6e8e730c23f Merge tag 'qcom-arm32-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
6bf0faceba14 Merge tag 'omap-for-v6.19/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt
f308c050d073 Merge tag 'at91-dt-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
1c7070035b64 Merge tag 'ti-k3-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
d995ab655e56 Merge tag 'socfpga_dts_updates_for_v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
fdc2d78b6b57 Merge tag 'imx-dt64-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
e00f7dd389c0 Merge tag 'imx-dt-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
ba629d597781 Merge tag 'sunxi-dt-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
be66cf860cd8 Merge tag 'tegra-for-6.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
5cd421e3123a Merge tag 'tegra-for-6.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
73630f133169 Merge tag 'tegra-for-6.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
17ba8d90c389 Merge tag 'renesas-dts-for-v6.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
976b62289967 Merge tag 'spacemit-dt-for-6.19-1' of https://github.com/spacemit-com/linux into soc/dt
9e991b69b124 Merge tag 'mtk-dts64-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
7b3786b89af4 Merge tag 'mtk-dts32-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
fcd4c5826841 Merge tag 'samsung-dt64-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
8fa9835cc7d3 Merge tag 'thead-dt-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt
befe612beffe Merge tag 'renesas-dts-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
f62c1c632762 Merge tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
f09303a5f3d8 Merge tag 'pxa1908-dt-for-6.19' of https://gitlab.com/pxa1908-mainline/linux into soc/dt
4b052167e82b Merge tag 'tenstorrent-dt-for-v6.19' of https://github.com/tenstorrent/linux into soc/newsoc
4d25e1ef679c dt-bindings: display: bridge: it66121: Add compatible string for IT66122
d7255c887d1f Merge tag 'iio-for-6.19a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
821703b3fa8d Merge tag 'fpga-for-6.19-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next
bf0cafb99229 dt-bindings: usb: ti,hd3ss3220: Add support for VBUS based on ID state
abdaf4f60231 dt-bindings: usb: dwc3-xilinx: Describe the reset constraint for the versal platform
9673f2075ccb dt-bindings: usb: Add ESWIN EIC7700 USB controller
659aa44f8ffa dt-bindings: usb: qcom,snps-dwc3: Add Kaanapali compatible
653c0274785c dt-bindings: usb: Support MediaTek MT8189 xhci
80eb8105c80e dt-bindings: usb: renesas,rzg3e-xhci: Add RZ/V2H(P) and RZ/V2N support
8a2bef78dfaa dt-bindings: dma: xilinx: Simplify dma-coherent property
dbe7a1baff4f arm64: dts: ti: k3-am62l: Fix unit address of cbass_wakeup
50b0c8ca35e1 arm64: dts: ti: k3-j721e-sk: Fix pinmux for pin Y1 used by power regulator
4d24edb84c16 dt-bindings: clock: tmpv770x: Add VIIF clocks
b843d215bd17 dt-bindings: clock: tmpv770x: Remove definition of number of clocks
3c654987d49a Merge tag 'drm-msm-next-2025-11-18' of https://gitlab.freedesktop.org/drm/msm into drm-next
abb868616dad Merge tag 'v6.18-rc6' into drm-next
809b1a45339a arm64: dts: rockchip: Use default-state for power LED for Radxa boards
74649d601935 arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on 9Tripod X3568 v4
414cc22b2e8a arm64: dts: rockchip: Add power-domain to RK3368 VOP controller
31d944f6636d arm64: dts: rockchip: Add power-domain to RK3368 DSI controller
91301f53e61f arm64: dts: rockchip: Add host wake pin for wifi on Indiedroid Nova
178af26ba893 arm64: dts: rockchip: Correct pinctrl for pcie for Indiedroid Nova
92d7b7ba7ec9 arm64: dts: rockchip: Define regulator for pcie2x1l2 on Indiedroid Nova
b2f6ba0024ca arm64: dts: rockchip: Add clk32k_in for Indiedroid Nova
6cfd5ebf93a9 arm64: dts: rockchip: Add Asus Tinker Board 3 and 3S device tree
9d6bdf2add09 dt-bindings: arm: rockchip: Add Asus Tinker Board 3/3S
f8483f137f15 dt-bindings: arm: rockchip: merge Asus Tinker and Tinker S
a114eb34ab17 dt-bindings: clock, reset: Add support for rv1126b
be3ad0fe4738 arm64: dts: rockchip: add QNAP TS233 devicetree
b357befcca9e dt-bindings: arm: rockchip: add TS233 to RK3568-based QNAP NAS devices
8cf4cbd14444 arm64: dts: rockchip: move common qnap tsx33 parts to dtsi
51b234a762b6 arm64: dts: rockchip: describe mcu eeprom cells on rk3568-ts433
0ac36d180d89 arm64: dts: rockchip: move cpu_thermal node to the correct position
61d39464221f Merge tag 'reset-gpio-for-v6.19' of https://git.pengutronix.de/git/pza/linux into gpio/for-next
0c1be8e245f6 dt-bindings: trivial-devices: add arduino spi mcu interface
09f7d02b9f57 dt-bindings: eeprom: at25: Add Anvo ANV32C81W
73627ae69a22 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
64a97f3e7c19 dt-bindings: phy: imx8mq-usb: add alternate reference clock
658e897aba6d dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY
33a067a7e937 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Restrict resets per each device
fc854f0d2f2d dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when not using in USB-C complex
a2f3bf32847f dt-bindings: phy: renesas,usb2-phy: Mark resets as required for RZ/G3S
47a1deb97c0c dt-bindings: phy: rockchip-inno-dsidphy: Add compatible for rk3506
2ada82eb2d15 dt-bindings: regulator: Add Fitipower FP9931/JD9930
90ea4a71161b dt-bindings: vendor-prefixes: Add Fitipower
5245f5ac59aa dt-bindings: phy: mediatek,tphy: Add support for MT7981
91f5d43be553 dt-bindings: gnss: fix timepulse description
d111d9ffd51e dt-bindings: gnss: u-blox: use lowercase company name
c1b748c776fb dt-bindings: gnss: u-blox: use open-drain reset and safeboot in example
16044ae73ebc dt-bindings: mfd: syscon: Add mt7981-topmisc
bf22a3e79541 Merge patch series "Add OP-TEE based RPMB driver for UFS devices"
9aa6f623b5bb dt-bindings: leds: qcom-lpg: Explain standalone PWM usage
741187978880 dt-bindings: mfd: fsl,mc13xxx: Fix LEDs node schema
9f5151da8413 dt-bindings: mfd: Document syscons falling back to atmel,sama5d2-sfrbu
9a0a098b3f78 dt-bindings: mfd: Document control-scb and sysreg-scb on pic64gx
96b2107be862 ASoC: dt-bindings: ti,tas2781: Add TAS2568/2574/5806M/5806MD/5830 support
a21483bb0da9 dt-bindings: mfd: Convert dlg,da9052-i2c.txt to yaml format
5c870b1ef99a dt-bindings: leds: pwm: Add enable-gpios property
f187d76d9095 Merge branch 6.18/scsi-fixes into 6.19/scsi-staging
153d94e4ee05 dt-bindings: net: mediatek,net: Correct bindings for MT7981
8928546dd85d dt-bindings: fpga: Convert lattice,ice40-fpga-mgr to DT schema
5a89f268ab58 dt-bindings: interrupt-controller: sifive,plic: Add pic64gx compatibility
dcb91b5de537 pmdomain: Merge branch dt into next
76009839f6f9 dt-bindings: riscv: Add Zalasr ISA extension description
f92a9318f15d dt-bindings: panel: Convert Samsung SOFEF00 DDIC into standalone yaml
a8c7599e3488 dt-bindings: ili9881c: Add compatible string for Wanchanglong w552946aaa
bbd8b9f0489e dt-bindings: panel: lvds: add Winstar WF70A8SYJHLNGA
23af80d1106e dt-bindings: display: panel: ronbo,rb070d30: panel-common ref
aae0418c06fd dt-bindings: display: simple: Add Raystar RFF500F-AWH-DNN panel
cf3124e734e5 dt-bindings: vendor-prefixes: Add Raystar Optronics, Inc
99a807c555fc dt-bindings: display: panel: document Samsung LTL106AL01 simple panel
7677716156e4 dt-bindings: display: panel: properly document LG LD070WX3 panel
6768271ceab8 dt-bindings: arm: amlogic: meson-gx-ao-secure: support more SoCs
27a4e818ccab dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
73303d1b7482 dt-bindings: interconnect: qcom,sm6350-rpmh: Add clocks for QoS
9cef1486f7a3 dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
1eb93400d8fb dt-bindings: net: cdns,macb: Add pic64gx compatibility
6fc3d0e32680 Merge branch 'icc-kaanapali' into icc-next
6e1745a06e11 dt-bindings: interconnect: qcom-bwmon: Document Kaanapali BWMONs
8afbee7fb9c6 dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
4bf0906e99f4 dt-bindings: clock: qcom: Add SM8750 video clock controller
791b28dba67f regulator: dt-bindings: pca9540: add debounce timer configuration
d777ba4b6f11 ASoC: dt-bindings: mediatek,mt8189-nau8825: add mt8189-nau8825 document
1c9f3266842c ASoC: dt-bindings: mediatek,mt8189-afe-pcm: add audio afe document
0a144023c2ae dt-bindings: PCI: Add binding for Toshiba TC9563 PCIe switch
a48ca996669f phy: Add Renesas RZ/G3E USB3.0 PHY driver
31cf40de4a70 dt-bindings: phy: renesas: Document Renesas RZ/G3E USB3.0 PHY
8ad4d2f8b4d3 dt-bindings: display/msm/gmu: Add Adreno X2-85 GMU
a4556a04308c dt-bindings: display/msm/gmu: Add Adreno 840 GMU
232d41799461 dt-bindings: arm-smmu: Add Kaanapali and Glymur GPU SMMU
44e94a7bb545 dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
45073b83681b dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
94155e664cb6 dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
1c2ca5e20aaf dt-bindings: reset: eswin: Documentation for eic7700 SoC
330187a685b2 dt-bindings: reset: microchip: Add LAN969x support
dfbaca5ddb49 dt-bindings: clock: mmcc-sdm660: Add missing MDSS reset
9eeeb5b1e189 dt-bindings: mmc: am654: Simplify dma-coherent property
41d0d821f910 dt-bindings: gpio: mpfs-gpio: Add pic64gx GPIO compatibility
4a3c809a374f dt-bindings: net: sophgo,sg2044-dwmac: add phy mode restriction
34eac94c14f4 riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
895094a6b909 riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
42aa02b43aba riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
e071667235dd riscv: dts: sophgo: Add SPI NOR node for SG2042
8a287a1254cb dt-bindings: cache: sifive,ccache0: add a pic64gx compatible
92f39cb09721 dt-bindings: dma: Convert apm,xgene-storm-dma to DT schema
80a1b765a6b0 dt-bindings: thermal: Drop db8500-thermal.txt
3f1d3a7a1303 dt-bindings: thermal: Convert brcm,sr-thermal to DT schema
baf16afa270a dt-bindings: thermal: Convert amazon,al-thermal to DT schema
12d256bc958b docs: dt-bindings: Extend the ordering list with a blank newline before status
5454d8c7d48b dt-bindings: Remove extra blank lines
79d1eee5a642 dt-bindings: Update Krzysztof Kozlowski's email
78e664b9bedd dt-bindings: nvmem: Convert brcm,ocotp to DT schema
30b19e16838e dt-bindings: media: Convert MediaTek mt8173-mdp bindings to DT schema
1ecff1b5d97a dt-bindings: arm: Add missing LGE SoC platforms
f0149f32417d dt-bindings: arm: Add missing AMD Seattle SoC platforms
42c040758581 dt-bindings: arm: Add missing APM X-Gene SoC platforms
714f17eb3a07 dt-bindings: Fix inconsistent quoting
d2be601fa068 dt-bindings: power: Convert Actions Owl SPS to DT schema
e9f1d193115b dt-bindings: gpu: mali-bifrost: Add compatible for MT8365 SoC
0163fae2f4c8 MAINTAINERS: Change Altera socfpga-ecc-manager.yaml maintainer
b6e747808e0e dt-bindings: bus: don't check node names
f7c62ed77b90 dt-bindings: fix redundant quotes on fsl,imx6q-vdoa.yaml
72e07bcbc589 dt-bindings: interrupt-controller: fsl,irqsteer: Add i.MX95 support
44505dd775b0 dt-bindings: arm: Convert Marvell AP80x System Controller to DT schema
485abf9dd94f dt-bindings: arm: Convert Marvell CP110 System Controller to DT schema
f53b234dbd24 dt-bindings: bus: Convert cznic,moxtet to DT schema
d5062ce32326 dt-bindings: pci: spacemit: Introduce PCIe host controller
d9011360a03a dt-bindings: PCI: qcom,pcie-x1e80100: Add missing required power-domains and resets
f310780ef807 dt-bindings: PCI: qcom,pcie-sm8550: Add missing required power-domains and resets
568d5185d173 dt-bindings: PCI: qcom,pcie-sm8450: Add missing required power-domains and resets
50f9f9b01386 dt-bindings: PCI: qcom,pcie-sm8350: Add missing required power-domains and resets
5bd25da87978 dt-bindings: PCI: qcom,pcie-sm8250: Add missing required power-domains and resets
d4a081066054 dt-bindings: PCI: qcom,pcie-sm8150: Add missing required power-domains and resets
a35f401ba1d8 dt-bindings: PCI: qcom,pcie-sc8280xp: Add missing required power-domains and resets
0ad4390bebdb dt-bindings: PCI: qcom,pcie-sc7280: Add missing required power-domains and resets
4cd1ae7b0b2e dt-bindings: PCI: qcom,pcie-sa8775p: Add missing required power-domains and resets
bc3c3a3dafcb arm64: dts: socfpga: agilex5: update qspi partitions for 013b board
f7e4ad742226 arm64: dts: freescale: add Toradex SMARC iMX95
f44dc730947d dt-bindings: arm: fsl: add Toradex SMARC iMX95
24203917e2fd riscv: dts: sophgo: Add USB support for cv18xx
d0a184e33dfd riscv: dts: sophgo: Add syscon node for cv18xx
a41983953178 dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X series SoC
b821bd7c321c arm64: dts: cix: add a compatible string for the cix sky1 SoC
886201218018 arm64: dts: cix: Enable PCIe on the Orion O6 board
e81c86872798 arm64: dts: cix: Add PCIe Root Complex on sky1
b4dd2af28ef7 arm64: dts: freescale: tqma9352: Add vcc-supply for spi-nor
9c68fefce2ac arm64: dts: mb-smarc-2: Add MicIn routing
a9ac5f4fc07c arm64: dts: mba8xx: Add MicIn routing
7cdabf33c783 arm64: dts: mba8mx: Add MicIn routing
e761c431bc8b arm64: dts: imx8mp: make 'dsp' node depend on 'aips5'
36e5fb59fa0e arm64: dts: imx8mp: convert 'aips5' to 'aipstz5'
65178037df21 arm64: dts: imx8mp-skov: add Rev.C HDMI support
b2591965d718 arm64: dts: imx8mp: Add missing LED enumerators for DH electronics i.MX8M Plus DHCOM on PDK2
8f369bc914dd arm64: dts: freescale: Add GMAC Ethernet for S32G2 EVB and RDB2 and S32G3 RDB3
071baf8fc95e arm64: dts: imx8qm-apalis: add pwm used by the backlight
e1b080329b4f arm64: dts: imx95-tqma9596sa-mb-smarc-2: add aliases for SPI
1120cc74c831 arm64: dts: imx95-tqma9596sa-mb-smarc-2: remove superfluous line
fec380ea8019 arm64: dts: imx95-tqma9596sa-mb-smarc-2: mark LPUART1 as reserved
c5c3abab4ed0 arm64: dts: imx95-tqma9596sa-mb-smarc-2: Add MicIn routing
da5988db69cf arm64: dts: imx95-tqma9596sa: add EEPROM pagesize
1cc13350904d arm64: dts: imx95-tqma9596sa: whitespace fixes
b81b19e833c6 arm64: dts: imx95-tqma9596sa: add gpio bus recovery for i2c
f3834bb20801 arm64: dts: imx95-tqma9596sa: remove superfluous pinmux for usdhci
a962997f532a arm64: dts: imx95-tqma9596sa: remove superfluous pinmux for i2c
25a2b79cb1ff arm64: dts: imx95-tqma9596sa: remove superfluous pinmux for flexspi
c332324a7bdf arm64: dts: imx95-tqma9596sa: update pcie config
952658c10446 arm64: dts: imx95-tqma9596sa: move pcie config to SOM
1c4bf14d7860 arm64: dts: imx95-tqma9596sa: move sai config to SOM
a1aa7d2f1fc0 arm64: dts: imx95-tqma9596sa: move USDHC2 config to SOM
4f9bad95e130 arm64: dts: imx95-tqma9596sa: move lpspi3 pinctrl to SOM
3e0c2e4bf8f9 arm64: dts: imx95-tqma9596sa: move flexcan pinctrl to SOM
8ee5d35c2d88 arm64: dts: imx95-tqma9596sa: increase flexspi slew rate
4632f3053a2b arm64: dts: imx95-tqma9596sa: reduce maximum FlexSPI frequency to 66MHz
e43c77b56a39 arm64: dts: imx95-tqma9596sa: fix TPM5 pinctrl node name
177c9d1dd92a spi: dt-bindings: aspeed,ast2600-fmc: Add AST2700 SoC support
c0fc41d867a9 ARM: dts: imx6qdl: make VAR-SOM SoM SoC-agnostic
3b409a511bf3 dt-bindings: arm: fsl: add Skov Rev.C HDMI support
b523a045dfd0 ARM: dts: imx6dl-yapp4: Model the RGB LED as a single multi-led part
687cae3410bc ARM: dts: imx6dl-yapp43: Enable pwm-beeper on boards with speaker
a116e20574fe dt-bindings: display: bridge: simple: document the Parade PS185HDM DP-to-HDMI bridge
64a7ad775ee3 arm64: dts: freescale: imx93-var-som: Add support for ADS7846 touchscreen
93e6908cead5 arm64: dts: freescale: imx93-var-som: Add support for WM8904 audio codec
de57aeea59d5 arm64: dts: freescale: imx93-var-som: Add PMIC support
30c87f150c23 arm64: dts: freescale: imx93-var-som: Add WiFi and Bluetooth support
4206d8a8eaff arm64: dts: imx8qxp-mek: change space with tab
bde1ec894e46 arm64: dts: imx8qxp-mek: Add lpuart1 to support the M.2 PCIE9098 bluetooth
7103aaff26d3 arm64: dts: imx8: add edma error interrupt support
a11dc4d5eb5d arm64: dts: imx8qxp-mek: add fec2 support
e6b0301a978d arm64: dts: imx8qxp-mek: add phandle ocotp mac-address for fec
8cc19662721d arm64: dts: imx8qxp-mek: add flexspi and flash
33b42350e3e1 arm64: dts: imx8qxp-mek: update usdhc1 clock to 400Mhz
b16e4c203bc5 arm64: dts: imx8qxp-mek: add state_100mhz and state_200mhz for usdhc
81bfde80b832 arm64: dts: imx8qxp: add wakeup source for power-key
169514b110ec arm64: dts: imx8qxp: add MAC address in ocotp
384828b1980e arm64: dts: imx8qm-mek: replace space with tab
4ddd8dcf7125 arm64: dts: imx8qm-mek: add usbotg1 and related nodes
4686539bb6a7 arm64: dts: imx8qm-mek: add pmic thermal-zones
d54d0eb6eb83 arm64: dts: imx8qm: add label thermal_zones
fe85e148d94c arm64: dts: imx8qm-mek: add lpuart1 and bluetooth node
48718befedf5 arm64: dts: imx8qm-mek: assign double SD bus frequency for usdhc1
23474fe74dfb arm64: dts: imx8qm-mek: add state_100mhz and state_200mhz for usdhc
299681fd1f8c ARM: dts: imx: e70k02: add sy7636
4a5c1fc96897 arm64: dts: freescale: imx93-phyboard-nash: Add pwm-fan overlay
82783b5af672 arm64: dts: freescale: imx93-phyboard-nash: Add jtag overlay
ba959ed037e6 arm64: dts: imx8mm-phyboard-polis-peb-av-10: Fix audio codec reset pin ctl
a1c7d8335111 arm64: dts: imx8mm-phyboard-polis-peb-av-10-ph128800t006
be8b70732148 arm64: dts: imx8mm-phyboard-polis-peb-av-10: split display configuration
d9d6c3efcbe8 arm64: dts: imx8mm-phyboard-polis-peb-av-10: reorder properties to match dts coding style
15c3079a99e2 arm64: dts: imx8mm-phyboard-polis: move mipi bridge to som
2d80f3d2c1f3 arm64: dts: imx8mm-phyboard-polis: Use GPL-2.0-or-later OR MIT
b508119789a6 arm64: dts: freescale: Add phyBOARD-Segin-i.MX91 support
b21957dbcdca dt-bindings: arm: fsl: Add PHYTEC phyBOARD-Segin-i.MX91 board
a1341c3df941 ARM: dts: imx28-amarula-rmm: add I2S audio
15e0e51ee250 arm64: dts: imx8-apalis: use startup-delay-us for wifi regulator
6983f4327e80 arm64: dts: imx8-apalis: rename wifi regulator
a3ce44ee240a arm64: dts: imx8-apalis: specify adc reference voltage regulator
ad4be8fcb243 arm64: dts: imx8-apalis: add thermal nodes
c7bdf580a894 arm64: dts: imx8-apalis: cleanup todo
f1d75d7d918c arm64: dts: imx8mp-evk: enable hdmi_pai device
84504fc99061 arm64: dts: imx8mp: Add hdmi parallel audio interface node
784e90c877c9 arm64: dts: rockchip: add vicap node to rk356x
45ae000930c4 arm64: dts: rockchip: add the vip node to px30
9e325867cd98 arm64: dts: rockchip: fixes audio for 100ASK DshanPi A1
cbbc75134a48 arm64: dts: rockchip: fixes vcc3v3_s0 supply for 100ASK DshanPi A1
7c29d507dbbb dt-bindings: iio: accel: adxl380: add new supported parts
81827902832f dt-bindings: watchdog: airoha: Add support for Airoha AN7583 SoC
fc33de070173 dt-bindings: watchdog: lantiq,wdt: convert bindings to dtschema
c5a9b7111f76 dt-bindings: watchdog: Add RK3506 compatible
c290f5cf2179 dt-bindings: watchdog: Document Qualcomm Kaanapali watchdog
26cdede7a15d dt-bindings: watchdog: loongson,ls1x-wdt: Add ls2k0300-wdt compatible
b6f69b567679 dt-bindings: watchdog: Support MediaTek MT8189 wdt
a8de67951fb6 dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8189 SoC
5c10980d1177 dt-bindings: mfd: rohm,bd96801-pmic: Correct timeout-sec length and reference watchdog schema
e5fba877f7e2 dt-bindings: watchdog: Allow node names named 'pmic'
738d8e109d64 dt-bindings: watchdog: Restrict timeout-sec to one number
961eff22aab4 dt-bindings: watchdog: Add Renesas WWDT
19fe640b8aca dt-bindings: watchdog: Convert marvell,orion-wdt to DT schema
76c438848672 dt-bindings: watchdog: Convert TI OMAP to DT schema
4b9bb7a46086 dt-bindings: watchdog: aspeed,ast2400-wdt: Add support for AST2700
e1fd070747fc dt-bindings: watchdog: renesas,wdt: add SWDT exception for V3H
4878af2d1ead dt-bindings: watchdog: factor out RZ/V2H(P) watchdog
4b185dc7e820 dt-bindings: watchdog: factor out RZ/G2L watchdog
14ff05a1690e dt-bindings: watchdog: factor out RZ/N1 watchdog
a2103c7687ee dt-bindings: watchdog: factor out RZ/A watchdog
5352fe610057 ARM: dts: microchip: sama5d2: fix spi flexcom fifo size to 32
07d29e30ad80 media: dt-bindings: add rockchip rk3568 vicap
d9444993395e media: dt-bindings: add rockchip px30 vip
565440f0cc45 media: dt-bindings: video-interfaces: add defines for sampling modes
6ba644a81955 arm64: tegra: Remove OTG ID GPIO from Jetson TX2 NX
758b19af7890 arm64: tegra: Set USB Micro-B port to OTG mode on P3450
33d56059e2c2 arm64: tegra: Add NVJPG node for Tegra210 platforms
43fbf4ea5469 arm64: tegra: Add Tegra210 NVJPG power-domain node
910f3b671adf arm64: tegra: Add interrupts for Tegra234 USB wake events
db68873794ec arm64: tegra: Add reserved-memory node for P2180
17aad4a020ce arm64: tegra: Add reserved-memory node for P3450
a8b24f03260e arm64: tegra: Enable NVDEC and NVENC on Tegra210
f632c44f37f2 arm64: tegra: Fix APB DMA controller node name
4917ceb42388 arm64: tegra: Add default GIC address cells on Tegra210
658bc32eb797 arm64: tegra: Add default GIC address cells on Tegra194
9d25ce66a15d arm64: tegra: Add default GIC address cells on Tegra186
a258475804cb arm64: tegra: Add default GIC address cells on Tegra132
228b5e06c593 arm64: tegra: Add OPP tables on Tegra210
5ea78e0e8671 arm64: tegra: Add interconnect properties for Tegra210
839310433a9f arm64: tegra: Add ACTMON on Tegra210
1838c2a08873 dt-bindings: display: rk3588-dw-hdmi-qp: Add frl-enable-gpios property
83157beae5b2 dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller
de6465d43bbb dt-bindings: devfreq: tegra30-actmon: Add Tegra124 fallback for Tegra210
4a4e9db281af ARM: tegra: Add device-tree for Xiaomi Mi Pad (A0101)
d470c42b37ef ASoC: codecs: lpass-macro: complete sm6115 support
48a4dab67b3a Add support for Microchip CoreSPI Controller
db813e1c4f96 arm64: tegra: Add device-tree node for NVVRS RTC
43646425739f arm64: dts: qcom: sdx75: Add missing usb-role-switch property
0046125aff8d arm64: dts: qcom: sdx75: Flatten usb controller node
8fb58f9720e1 arm64: tegra: Move avdd-dsi-csi-supply into CSI node
5646f369cabe arm64: tegra: Drop redundant clock and reset names from TSEC node
54138b2c8943 arm64: tegra: Move HDA into the correct bus
1aef80d04475 dt-bindings: display: msm: sm6150-mdss: Fix example indentation and OPP values
bfb09fe71b7c dt-bindings: display: msm: sm6150-mdss: Add DisplayPort controller
34f6333b5a63 dt-bindings: display/msm: dp-controller: Add SM6150
62f1ecd608b4 dt-bindings: display/msm: Document MDSS on QCS8300
f1c4a05f9337 dt-bindings: display/msm: dp-controller: document QCS8300 compatible
4295a206a7fc dt-bindings: display/msm: Document the DPU for QCS8300
4c1dfb6df3c4 dt-bindings: display: msm: Document the Glymur DiplayPort controller
7d8c41d1c23d dt-bindings: display: msm: Document the Glymur Display Processing Unit
ce766d6a6b54 dt-bindings: display: msm: Document the Glymur Mobile Display SubSystem
f685ad520150 dt-bindings: display/msm: Reference DAI schema for DAI properties
6392d36aec9c dt-bindings: display: tegra: Document Tegra20 and Tegra30 CSI
0e16f393943f ARM: tegra: add CSI nodes for Tegra20 and Tegra30
727a974c10d1 arm64: dts: qcom: HAMOA-IOT-SOM: Unreserve GPIOs blocking SPI11 access
28d12ee2f8b4 arm64: dts: qcom: qrb2210-rb1: Fix UART3 wakeup IRQ storm
ddc23da76bf5 Revert "arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature"
e62101b57a70 dt-bindings: media: Add bindings for the RZ/V2H(P) IVC block
23664bb4e425 dt-bindings: media: Add bindings for ARM mali-c55
ce7ce0a595c8 spi-cadence: support transmission with
11743ce9a449 ARM: tegra: Add missing HOST1X device nodes on Tegra124
31c5e1d1feda ARM: tegra: Add missing HOST1X device nodes on Tegra114
9e3df043b918 dt-bindings: display: tegra: document EPP, ISP, MPE and TSEC for Tegra114+
9b8b66caebcf spi: dt-binding: document Microchip CoreSPI
45675908e58b dt-bindings: gnss: u-blox: add safeboot gpio
139f294b1b0d arm64: dts: socfpga: add Agilex3 board
2e90f2a4386d dt-bindings: intel: Add Agilex3 SoCFPGA board
d955a41e2561 ARM: dts: microchip: sama7g5: fix uart fifo size to 32
f224b1698a1e ARM: dts: microchip: sama7d65: fix uart fifo size to 32
b8f22628fe7a arm64: dts: st: set RIFSC as an access controller on stm32mp21x platforms
27a23e8ecdbe dt-bindings: bus: add stm32mp21 RIFSC compatible
52239210bb6c ARM: dts: stm32: add the IWDG2 interrupt line in stm32mp131.dtsi
ffcc0c6632b4 ARM: dts: stm32: enable the ARM SMC watchdog node in stm32mp135f-dk
11dfa739cbe3 ARM: dts: stm32: add the ARM SMC watchdog in stm32mp131.dtsi
0f78f2076b69 ARM: dts: stm32: add iwdg1 node in stm32mp131.dtsi
75a351ebe368 arm64: dts: st: Add I/O sync to eth pinctrl in stm32mp25-pinctrl.dtsi
f62c09d7adef arm64: dts: st: Add memory-region-names property for stm32mp257f-ev1
b4d166d64dad dt-bindings: clock: airoha: Add reset support to EN7523 clock binding
06c7d9a3f07b Merge tag 'samsung-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung
bd904ecdbb4b arm64: dts: rockchip: fixes ethernet for 100ASK DshanPi A1
e809fc72cff5 arm64: dts: rockchip: fixes regulator for 100ASK DshanPi A1
6e2bd24ddde7 arm64: dts: rockchip: correct assigned-clock-rates spelling on 2 boards
e1b4137b6bbc ARM: dts: rockchip: move edp assigned-clocks to edp node on rk3288
996efa4fc382 arm64: dts: rockchip: clean up devicetree for 9Tripod X3568 v4
80449de0ed3d arm64: dts: rockchip: Enable USB-C DP Alt for Indiedroid Nova
19c0ede3d547 arm64: dts: rockchip: add eMMC CQE support for rk3588
c3f1daa78ec6 arm64: dts: rockchip: enable HDMI audio on Rock 5 ITX
d4428212ee8a arm64: dts: rockchip: Add eeprom vcc-supply for Radxa ROCK 3C
40612ce62a28 arm64: dts: rockchip: Add eeprom vcc-supply for Radxa ROCK 5A
7d9f2c89d37e arm64: dts: rockchip: Move the EEPROM to correct I2C bus on Radxa ROCK 5A
2b85b8aa6b7e arm64: dts: rockchip: use SCMI clock id for gpu clock on rk356x
08c60813d54c arm64: dts: rockchip: Remove sdmmc max-frequency on RK3588S EVB1 board
fe55570af4dc arm64: dts: rockchip: Remove sdmmc max-frequency for Radxa ROCK 5 ITX/5B/5B+/5T
f37dc939fe8c arm64: dts: rockchip: Switch microSD card detect to gpio on Radxa ROCK 5 ITX/5C
169813078cc1 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
694cae13fd67 arm64: dts: renesas: rzt2h-n2h-evk: Enable Ethernet support
51363c1aaf84 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
530e23ad2bc3 arm64: dts: renesas: r9a09g057: Add RTC node
5872792a6798 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add NMI pushbutton support
35dfec24ab40 arm64: dts: renesas: rzg3s-smarc: Enable USB support
cc85f0202f38 arm64: dts: renesas: r9a08g045: Add USB support
eea5a7cc9f8f arm64: dts: renesas: r9a09g057: Add TSU nodes
223849acd4a6 Merge tag 'renesas-r9a09g057-dt-binding-defs-tag5' into renesas-clk-for-v6.19
bd95d5b58cb4 dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
e20f945cfe6f dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
eb1dacf061e4 dt-bindings: spi: spi-cadence: update DT binding docs to support cix sky1 SoC
c4d64b3f9ede ASoC: dt-bindings: qcom,lpass-va-macro: Add sm6115 LPASS VA
d8eb3c69bcc9 ASoC: dt-bindings: qcom,lpass-va-macro: re-arrange clock-names
0f66639319d2 ASoC: dt-bindings: qcom,lpass-rx-macro: Add sm6115 LPASS RX
3b04c96ccafd arm64: dts: ti: k3-am62l: add initial reference board file
b41c1c136ad0 arm64: dts: ti: k3-am62l: add initial infrastructure
6bac1dc26d74 dt-bindings: arm: ti: Add binding for AM62L SoCs
f8b7b7c8fa6e arm64: dts: ti: am69-aquila: Add Clover
cf5623cc6067 arm64: dts: ti: Add Aquila AM69 Support
35d9c13f543e dt-bindings: arm: ti: add Toradex Aquila AM69
f0aecc597d93 dt-bindings: mfd: twl: Enable power button also for TWL603X
c8a3fb4347ca dt-bindings: mfd: qcom-spmi-pmic: Document PM7550 PMIC
fa4b5be168e6 dt-bindings: leds: qcom,spmi-flash-led: Add PM7550
174774eb10d7 dt-bindings: mfd: qcom,spmi-pmic: Document PMIV0104
811dfe84d706 dt-bindings: interrupt-controller: Add support for Amlogic S6 S7 and S7D SoCs
3d8da57fa556 Merge tag 'linux-can-next-for-6.19-20251112-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next
c96aebd9a91a dt-bindings: media: i2c: document Sony IMX111 CMOS sensor
999822b71aff dt-bindings: pwm: thead: Add T-HEAD TH1520 PWM controller
6c18ca8f0a37 dt-bindings: hwmon: ST TSC1641 power monitor
b13283f94d34 arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers
f2ee8bb754e3 dt-bindings: can: mcp251xfd: add gpio-controller property
370891f09140 riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
67c9af27639e riscv: dts: Add initial Anlogic DR1V90 SoC device tree
aeb594b5a685 dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
d66c2de98f4a dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
a65c72da603b dt-bindings: riscv: Add Anlogic DR1V90
6c4aa02a0280 dt-bindings: riscv: Add Nuclei UX900 compatibles
a3ce3aefa2de dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
880f989fec96 spi: dt-bindings: nuvoton,npcm-pspi: Convert to DT schema
5f77273b97ea phy: phy-can-transceiver: Support TJA1048/TJA1051
59aced147ba6 dt-bindings: phy: ti,tcan104x-can: Document NXP TJA105X/1048
959608f393bf riscv: dts: spacemit: define all missing I2C controller nodes
944c1e6cbe1d riscv: dts: spacemit: reorder i2c2 node
f3900bf8f07f ARM: dts: renesas: r9a06g032: Add the ADC device
8e79984a46dd riscv: dts: spacemit: Add OrangePi R2S board device tree
b714954b298f dt-bindings: riscv: spacemit: Add OrangePi R2S board
4c493939154f arm64: dts: renesas: r9a09g087: Add GMAC nodes
6a17bec91b25 arm64: dts: renesas: r9a09g077: Add GMAC nodes
451e0117a8d2 arm64: dts: renesas: r9a09g087: Add ETHSS node
e5b2d87b50af arm64: dts: renesas: r9a09g077: Add ETHSS node
eb0bca984e50 arm64: dts: imx95-19x19-evk: Add vpcie3v3aux regulator for PCIe[0,1]
c9d07235dae5 arm64: dts: imx95-15x15-evk: Add vpcie3v3aux regulator for PCIe M.2 connector
dc40e5294a5c arm64: dts: imx8qxp-mek: Add vpcie3v3aux regulator for PCIe M.2 connector
e1c5860f6c42 arm64: dts: imx8qm-mek: Add vpcie3v3aux regulator for PCIe M.2 connector
94b0472e531c arm64: dts: imx8mq-evk: Add vpcie3v3aux regulator for PCIe M.2 connector
791dc9b583e0 arm64: dts: imx8mp-evk: Add vpcie3v3aux regulator for PCIe M.2 connector
fe87aa8cc341 arm64: dts: imx8dxl-evk: Add vpcie3v3aux regulator for PCIe M.2 connector
0348c402ba40 arm64: dts: imx8qxp-mek: Add supports-clkreq property to PCIe M.2 port
545a5de75989 arm64: dts: imx8qm-mek: Add supports-clkreq property to PCIe M.2 port
965b60e9f697 arm64: dts: imx8mq-evk: Add supports-clkreq property to PCIe M.2 port
94294e87099e arm64: dts: imx8mp-evk: Add supports-clkreq property to PCIe M.2 port
a94ba71aedb0 arm64: dts: imx8mm-evk: Add supports-clkreq property to PCIe M.2 port
c6d7be76d975 arm64: dts: imx95-19x19-evk: Add supports-clkreq property to PCIe M.2 port
cd5ad40ee67c arm64: dts: imx95-15x15-evk: Add supports-clkreq property to PCIe M.2 port
bc3af4662a76 dt-bindings: interrupt-controller: aspeed,ast2700: Correct #interrupt-cells and interrupts count
44eb72cb02c0 dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWI
e6774748b5c0 dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI
165cd4cd02b1 dt-bindings: interrupt-controller: Add Anlogic DR1V90 PLIC
bfde832259a7 ARM: dts: ti/omap: fix incorrect compatible string in internal eeprom node
ffffcf0ae72f riscv: dts: microchip: enable qspi adc/mmc-spi-slot on BeagleV Fire
6f9bafdfa9aa dt-bindings: mmc: socionext,milbeaut-m10v-sdhci-3.0: convert to DT schema
ef9c91463d76 dt-bindings: mmc: ti,da830-mmc: convert to DT schema
65b41a687258 dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700
33d80f762b2d dt-bindings: clock: document 8ULP's SIM LPAV
e4a974a978df arm64: dts: imx8mp-debix-model-a: Fix ethernet PHY address
1cc479b8181e Merge tag 'v6.18-rc5' into media-next
e0a3348a0175 powerpc: p2020: Rename wdt@ nodes to watchdog@
9bef9eca6b60 powerpc: 86xx: Rename wdt@ nodes to watchdog@
1b3e7e46421d powerpc: 83xx: Rename wdt@ nodes to watchdog@
cec853da4161 powerpc: 512x: Rename wdt@ node to watchdog@
fa6d3cd14145 ARM: dts: imx: add vdd-supply and vddio-supply for fsl,mpl3115
80df183c235d arm64: dts: imx8: add vdd-supply and vddio-supply for fsl,mpl3115
f156ed063f96 arm64: dts: imx8dxl-ss-conn: delete usb3_lpcg node
e5d5825c25e1 arm64: dts: imx8-ss-conn: add missed clock enet_2x_txclk for fec[1,2]
aacc170c975a arm64: dts: imx8-ss-conn: add fsl,tuning-step for usdhc1 and usdhc2
6b094d96a895 arm64: dts: imx8: add default clock rate for usdhc
cb9d655e4be2 arm64: dts: imx8dxl-evk: add state_100mhz and state_200mhz for usdhc
f0676e7d5c3d arm64: dts: imx8dxl-evk: add bt information for lpuart1
e61b7cd15fb0 arm64: dts: socfpga: Add Agilex5 SVC node with memory region
317194944561 dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
581d37a034b2 dt-bindings: pinctrl: mt7988: allow gpio-hogs
41d45921ba23 dt-bindings: pinctrl: Add rk3506 pinctrl support
4714e545f9b9 Merge tag 'samsung-pinctrl-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
c4891745f29b Revert "arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports"
c0945b130f16 arm64/arm: dts: marvell: Rename "nand-rb" pinctrl node names
c7b2578cb013 ASoC: dt-bindings: consolidate simple audio codec to trivial-codec.yaml
cf1766dd0091 dt-bindings: thermal: qcom-tsens: document the Kaanapali Temperature Sensor
63dfc996809c dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2H TSU
d908463ec841 dt-bindings: display: renesas,rzg2l-du: Add support for RZ/V2N SoC
ebc42f8f49e9 arm64: dts: renesas: r8a779a0: Add GE7800 GPU node
c550cc93ff01 Merge tag 'renesas-r8a779a0-dt-binding-defs-tag2' into renesas-dts-for-v6.19
74effb337835 dt-bindings: pinctrl: Convert sprd,sc9860-pinctrl to DT schema
07efc512740a arm64: dts: renesas: r8a77965: Add GE7800 GPU node
2f92e6db952b Merge tag 'renesas-r8a779a0-dt-binding-defs-tag2' into renesas-clk-for-v6.19
0341928249a6 dt-bindings: clock: r8a779a0: Add ZG core clock
91eb564e0cd9 ARM: dts: stm32: lxa: drop unnecessary vusb_d/a-supply
c0908822f49c ARM: dts: stm32: stm32mp157c-phycore: Fix STMPE811 touchscreen node properties
0f8b3a233d72 arm64: dts: imx8mp: Specify the number of channels for CSI-2 receivers
b15f424db152 dt-bindings: fpga: update link for Altera's and AMD partial recon
ca7576ae569b dt-bindings: PCI: amlogic: Fix the register name of the DBI region
a1d501cb37b5 dt-bindings: firmware: svc: Add IOMMU support for Agilex5
fb6214502871 dt-bindings: iio: dac: Document AD5446 and similar devices
ecc3b75bb3fc dt-bindings: iio: adc: Add the Renesas RZ/N1 ADC
caf6bea7606f dt-bindings: iio: adc: Add AST2700 ADC compatible strings
942d4eb683a0 dt-bindings: iio: imu: mpu6050: remove interrupts from required list
96a269a4da9e dt-bindings: iio: adc: Support MediaTek MT8189 evb board auxadc
ce984450345b dt-bindings: iio: pressure: Add Aosong adp810
e15db7905b3d dt-bindings: iio: adc: Add rockchip,rk3506-saradc variant
d6628be8e132 dt-bindings: iio: adc: adi,ad4080: add support for AD4087
af14401bb0fa dt-bindings: iio: adc: adi,ad4080: add support for AD4086
eb408941f8d5 dt-bindings: iio: adc: adi,ad4080: add support for AD4083
8b7a7c98fea1 dt-bindings: i3c: snps: Add Altera SoCFPGA compatible
b76955f2e397 scsi: dt-bindings: phy: mediatek,ufs-phy: Update maintainer information in mediatek,ufs-phy.yaml
a81c9cbe5061 riscv: dts: spacemit: enable K1 SoC QSPI on BPI-F3
5e6246581385 spi: enable the SpacemiT K1 SoC QSPI
f2ed1c157d00 arm64: dts: rockchip: Add devicetree for the 9Tripod X3568 v4
a1831f5c60bd dt-bindings: rtc: Document NVIDIA VRS RTC
7512740ecee8 dt-bindings: arm: rockchip: Add 9Tripod X3568 series
e94d6f97494e dt-bindings: vendor-prefixes: Add 9Tripod
94c2990b6e11 arm64: dts: rockchip: Fix USB Type-C host mode for Radxa ROCK 5B+/5T
092cae17b389 arm64: dts: rockchip: Fix DMA for Indiedroid Nova Bluetooth
5bea16ef2463 arm64: dts: rockchip: Enable HS400 for Indiedroid Nova
0ef462775df4 arm64: dts: rockchip: enable NPU on Indiedroid Nova
c3ec5509f06f arm64: dts: rockchip: Add device type for Indiedroid Nova.
d147583e2431 arm64: dts: rockchip: enable NPU on Gameforce Ace
c9b9272bfab1 dt-bindings: net: dsa: lantiq,gswip: add support for MaxLinear GSW1xx switches
8e6721303b1f dt-bindings: net: dsa: lantiq,gswip: add support for MII delay properties
7c96439c122d dt-bindings: net: dsa: lantiq,gswip: add MaxLinear RMII refclk output property
9a11311b761b dt-bindings: rtc: Add support for ATCRTC100 RTC
6a01c45fa68a arm64: dts: qcom: kodiak: add coresight nodes
e49c41af34af Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
ddc4b2e73f78 spi: dt-bindings: fsl-qspi: add optional resets
4b2bcb916547 spi: dt-bindings: fsl-qspi: support SpacemiT K1
f6bcbcc967b1 dt-bindings: mfd: tps65910: Make interrupt properties optional
7aa67f890143 dt-bindings: mfd: dlg,da9063: Allow wakeup-source property
dcc5a87c2079 dt-bindings: mfd: Add Renesas R2A11302FT PMIC
c04fc784a99a dt-bindings: max77705: Add interrupt-controller property
181094e7a45c dt-bindings: mfd: sy7636a: Add missing GPIO pins and supply
c35a8eb35d1d riscv: dts: spacemit: add MusePi Pro board device tree
f8d41eff86e9 dt-bindings: riscv: spacemit: add MusePi Pro board
a80170255b5f media: dt-bindings: Add qcom,msm8939-camss
7b13e9d1d247 dt-bindings: media: Describe Qualcomm SM8650 CAMSS IP
ef694ddae0fb media: dt-bindings: qcom,x1e80100-camss: Fix typo in CSIPHY supply description
91e41f80bef1 dt-bindings: arm: document the static TPDM compatible
ead95c786898 Add support MT6316/6363/MT6373 PMICs regulators
26712421177f ASoC: qcom: q6dsp: fixes and updates
3914f5a0b1b6 arm64: dts: cix: Add pinctrl nodes for sky1
17de2a68d255 arm64: dts: cix: add DT nodes for SPI
3027b0861700 arm64: dts: mediatek: mt7981b-openwrt-one: Enable software leds
0c56eaffd6ce arm64: dts: mediatek: mt7981b-openwrt-one: Enable SPI NOR
cb424b084de7 arm64: dts: mediatek: mt7988a-bpi-r4pro: Add mmc overlays
9ca5ff43e737 arm64: dts: mediatek: mt7988a-bpi-r4-pro: Add PCIe overlays
7db00d319f92 arm64: dts: mediatek: mt7988: Add devicetree for BananaPi R4 Pro
acce3c7adc50 arm64: dts: mediatek: mt7988: Disable 2.5G phy and enable at board layer
ee4e3402c515 dt-bindings: crypto: qcom-qce: Document the kaanapli crypto engine
e0aa31703e8d dt-bindings: crypto: qcom,prng: Document kaanapali RNG
ab943f64fd0b arm64: dts: ti: k3-j721s2: disable "mcu_cpsw" in SoC file and enable in board files
b1a75e84b57e arm64: dts: ti: k3-j721e: disable "mcu_cpsw" in SoC file and enable it in board file
435113195e7c arm64: dts: ti: k3-j7200: disable "mcu_cpsw" in SoC file and enable in board file
7e621a93fb16 arm64: dts: ti: k3-am65: disable "mcu_cpsw" in SoC file and enable in board file
4403e5ae4405 arm64: dts: ti: k3-am62: disable "cpsw3g" in SoC file and enable in board file
645d8be2c730 arm64: dts: ti: k3-am62p5-sk: Set wakeup-source system-states
72c2be9c4207 arm64: dts: ti: k3-am62a7-sk: Set wakeup-source system-states
6d260cb30ad5 arm64: dts: ti: k3-am62-lp-sk: Set wakeup-source system-states
175de68e5f12 arm64: dts: ti: k3-am62p: Define possible system states
ed2894580c83 arm64: dts: ti: k3-am62a: Define possible system states
38d04be7cefa arm64: dts: ti: k3-am62: Define possible system states
d80b6bfa999f arm64: dts: ti: k3-am62p-j722s-common-main: move audio_refclk here
2dbdc38e696d arm64: dts: ti: k3-*: Replace rgmii-rxid with rgmii-id for CPSW ports
83b392d1e5c6 arm64: dts: ti: k3-am642-tqma64xxl: add boot phase tags
08a4b299a12c dt-bindings: ethernet: eswin: fix yaml schema issues
927616100ca4 ARM: dts: omap: am335x-mba335x: Fix stray '/*' in comment
0c0014560c5f ARM: dts: omap: am335x-tqma335x/mba335x: Fix MicIn routing
5c681a9e3adf arm64: dts: rockchip: add missing clocks for cpu cores on rk356x
97dcca9fe134 arm64: dts: rockchip: use SCMI clock id for cpu clock on rk356x
59fde8ef5698 Merge branch 'v6.19-shared/clkids' into v6.19-armsoc/dts64
17f66773d6d8 dt-bindings: clock: rk3568: Drop CLK_NR_CLKS define
f84e07c41639 dt-bindings: clock: rk3568: Add SCMI clock ids
500efad7da39 arm64: tegra: Add pinctrl definitions for pcie-ep nodes
a134f00e3044 dt-bindings: regulator: Document MediaTek MT6363 PMIC Regulators
7ff2b92c949f dt-bindings: regulator: Document MediaTek MT6316 PMIC Regulators
f96d8ae74c7a dt-bindings: arm: mediatek: add BPI-R4 Pro board
d4ec127b408b dt-bindings: soc: bcm: Add bcm2712 compatible
738fc3f3c8ac ASoC: dt-bindings: ti,pcm1862: convert to dtschema
ec656263dbe3 spi: tegra210-quad: Improve timeout handling under
4349e09d15eb dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car M3-N
dbd373fd3caa dt-bindings: gpu: img,powervr-rogue: Keep lists sorted alphabetically
c5a04455a88a arm64: dts: mediatek: Add GCE header for MT8196
cc7dcad983ca arm64: dts: mediatek: mt7981b: Add reserved memory for TF-A
9a91e9c56c45 arm64: dts: mediatek: mt7981b: Configure UART0 pinmux
c4694545a423 arm64: dts: exynos7870-j6lte: enable display panel support
1631cd902a2a arm64: dts: exynos7870-a2corelte: enable display panel support
6fc9ade933a7 arm64: dts: exynos7870-on7xelte: enable display panel support
f01008a3e9a9 arm64: dts: exynos7870: add DSI support
8fba0c0b6330 dt-bindings: soc: samsung: exynos-pmu: allow mipi-phy subnode for Exynos7870 PMU
0b212c0b95b9 dt-bindings: net: ethernet-phy: clarify when compatible must specify PHY ID
f6e735d87138 dt-bindings: mmc: ti,omap2430-sdhci: convert to DT schema
9e99089ec779 arm: dts: ti: omap: Drop unnecessary properties for SDHCI node
d3b82351d536 arm: dts: ti: omap: am335x-pepper: Fix vmmc-supply property typo
34477bd6e9f1 ARM: dts: omap3: n900: Correct obsolete TWL4030 power compatible
942392136792 ARM: dts: omap3: beagle-xm: Correct obsolete TWL4030 power compatible
07593f812d8c ARM: dts: omap: Add support for TQMa335x/MBa335x
78b7c57a8fc3 ARM: dts: omap: AM33xx: add cpu label
e93a592c5d05 dt-bindings: omap: add AM335x-based TQMa335x SOM and MBa335x board
6784d030d57f ARM: dts: am335x-netcom-plus-2xx: add missing GPIO labels
749693aac072 ARM: dts: ti: omap: am335x-baltos: add a regulator for the mPCIe slot
c0b1648ea64b ARM: dts: omap: rework Baltos LED nodes
fc35df111354 ARM: dts: am33xx: Add missing serial console speed
f7a3b0a77529 arm64: dts: socfpga: agilex5: Add SMMU-V3-PMCG nodes
12b8a2c4b8d3 arm64: dts: socfpga: agilex5: Add L2 and L3 cache
62aed6e4308f arm64: dts: socfpga: agilex5: fix CHECK_DTBS warning for NAND
dbfe4282d641 ASoC: dt-bindings: ti,tas2781: Add TAS5822 support
a190c674be61 regulator: pf9453: optimize PMIC PF9453 driver
f0cdbc07561c dt-bindings: firmware: qcom,scm: Document SCM on Kaanapali SOC
873f8b175a7f Merge branch '20251030-gcc_kaanapali-v2-v2-3-a774a587af6f@oss.qualcomm.com' into clk-for-6.19
f2336647c42a dt-bindings: clock: qcom: Add Kaanapali Global clock controller
178ac5fbcdba dt-bindings: clock: qcom: Document the Kaanapali TCSR Clock Controller
a155addec4bc dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for Kaanapali
ab93399047d9 arm64: dts: qcom: sdm845-oneplus: Describe TE gpio
ab0a6e8d81c7 arm64: dts: qcom: sdm845-oneplus: Implement panel sleep pinctrl
23b58cd515a4 arm64: dts: qcom: sdm845-oneplus: Group panel pinctrl
34ddf2b19089 arm64: dts: qcom: sdm845-oneplus: Update compatbible and add DDIC supplies
dab1c0feb8a2 dt-bindings: arm: qcom,ids: Add SoC ID for QCS6490
8b38fbfc2927 arm64: dts: qcom: qcs6490-rb3gen2: Rename vph-pwr regulator node
c87be9cd7a34 dt-bindings: arm-smmu: Add compatible for Kaanapali and Glymur SoCs
ea56d5995a46 dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant
9ff301276c96 arm64: dts: imx95: Describe Mali G310 GPU
332be95c7f79 dt-bindings: gpu: mali-valhall-csf: Document i.MX95 support
d5bfeb3442e5 media: dt-bindings: nxp,imx8-isi: Add i.MX91 ISI compatible string
7e7a5bfdc7fa arm64: dts: ti: k3-j784s4-j742s2-evm-common: Add bootph-all tag to "pcie1_ctrl"
f8bb8fd07d23 arm64: dts: ti: k3-j784s4-j742s2-evm-common: Add bootph-all tag to SERDES0
55c5638e4aef arm64: dts: ti: k3-j784s4-evm-pcie0-pcie1-ep: Add boot phase tag to "pcie1_ep"
41b4706fac88 media: dt-bindings: rockchip,vdec: Add RK3288 compatible
f178906c7fd7 scsi: ufs: dt-bindings: mediatek,ufs: Update maintainer information in mediatek,ufs.yaml
e87084d1b8ac dt-bindings: power: supply: Add Richtek RT9756 smart cap divider charger
2e0a34e4debd ARM: dts: qcom: msm8226-samsung-ms013g: add simple-framebuffer
3ee9215add65 arm64: dts: qcom: qcm6490-fairphone-fp5: Add UW cam actuator
8422138d3d7b arm64: dts: qcom: qcm6490-fairphone-fp5: Enable CCI pull-up
289ebfdb6142 ARM: dts: qcom: msm8960: rename msmgpio node to tlmm
b37af7d09a41 ARM: dts: qcom: msm8960: add I2C nodes for gsbi1 and gsbi8
b79770f72de5 ARM: dts: qcom: msm8960: add I2C nodes for gsbi10 and gsbi12
fdd6c13fa1ee ARM: dts: qcom: msm8960: inline qcom-msm8960-pins.dtsi
dcc2bc922e6d ARM: dts: qcom: msm8960: reorder nodes and properties
177c437ec5c8 arm64: dts: qcom: sm8750: Add USB support for SM8750 QRD platform
886f067dc029 arm64: dts: qcom: sm8750: Add USB support for SM8750 MTP platform
909978e5540e arm64: dts: qcom: sm8750: Add USB support to SM8750 SoCs
d05857b95bcf dt-bindings: clk: microchip: mpfs: remove first reg region
e71b1c73e548 riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
236ce5a49538 riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
7eb230c2706e riscv: sophgo: dts: enable PCIe for PioneerBox
0537c1f46d01 riscv: sophgo: dts: add PCIe controllers for SG2042
05eca33887cb dt-bindings: pse-pd: ti,tps23881: Add TPS23881B
38e6f7cd300f ARM: dts: rockchip: Add spi_flash label to rk3288-veyron
faefae4ca217 ARM: dts: rockchip: Remove mshc aliases from RK3288
e197e2ac01bb ARM: dts: rockchip: Adapt tps65910 nodes on RK3066 boards
367b203fafa6 arm64: dts: socfpga: agilex5: add support for 013b board
397229f88b25 dt-bindings: intel: Add Agilex5 SoCFPGA 013b board
836b8fdc8a21 dt-bindings: gpu: img,powervr-rogue: Drop duplicate newline
9cec920289e7 dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Kaanapali SoC
14ee982b55ba Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
6a4ad565c309 dt-bindings: display: panel: Add Tianma TL121BVMS07-00 panel
a30f08bec64b riscv: dts: thead: Add reset controllers of more subsystems for TH1520
18c89b99d621 dt-bindings: crypto: amd,ccp-seattle-v1a: Allow 'iommus' property
d007a0a12f1f arm64: dts: renesas: sparrow-hawk: Fix full-size DP connector node name and labels
25aa9fcceebd Merge branch 'icc-sa8775p' into icc-next
7dfae837db8f Merge branch 'icc-sdx75' into icc-next
87b4f902050f dt-bindings: interconnect: qcom: Drop QPIC_CORE IDs
61ffca74972e dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p
ca628f2d40b0 arm64: dts: qcom: msm8996: add interconnect paths to USB2 controller
adc58b68bbfd arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt
f6d4eb2e9948 arm64: dts: socfpga: agilex: fix dtbs_check warning for NAND
ebebf24e00f9 arm64: dts: socfpga: agilex: fix dtbs_check warning for clock manager
8631a889da8a arm64: dts: socfpga: stratix10-swvp: fix dtbs_check warnings swvp
2daef772ee87 arm64: tegra: Add NVIDIA Jetson Nano 2GB Developer Kit support
0f4c9afaa1e6 arm64: tegra: Add Tegra264 audio support
4621fef13302 arm64: tegra: Add Tegra186 pin controllers
5a653790513c Merge branch 'for-6.19/dt-bindings' into for-6.19/arm64/dt
ea573761ab27 dt-bindings: arm: tegra: Document Jetson Nano Devkits
21aa9acf8fd6 arm64: dts: qcom: rename x1p42100 to purwa
9c124deb1706 arm64: dts: qcom: rename sc7280 to kodiak
34f4141267d9 arm64: dts: qcom: rename qcm2290 to agatti
61c3825e7b71 Merge branch 'arm64-fixes-for-6.18' into HEAD
c9b470c0f0aa arm64: dts: qcom: add gpu_zap_shader label
5419d052f8ca arm64: dts: qcom: sc7180: add gpu_zap_shader label
c821ea8a1fc1 arm64: dts: qcom: sm8250: drop duplicate memory-region defs
9ebd306dc980 arm64: dts: qcom: sc8280xp: create common zap-shader node
bad596928bdd arm64: dts: qcom: sc8180x: create common zap-shader node
063aaf9d0ba1 arm64: dts: qcom: sdm845: create common zap-shader node
bfc31cf752e3 arm64: dts: qcom: sdm670: create common zap-shader node
cf2a2074d1f7 arm64: dts: ti: k3-am62d2-evm: Remove unused ospi0 chip select pins
1c3cef64cdf1 arm64: dts: ti: k3-j784s4: Fix I2C pinmux pull configuration
a24ba1ad5b77 arm64: dts: ti: k3-am68-phycore-som: Add pmic label
9b486b4b44c1 arm64: dts: ti: k3-am642-evm: Add DMA support for TSCADC
8fc50ca84b12 arm64: dts: ti: var-som-am62p: Add support for ADS7846 touchscreen
d4d79e58e61e arm64: dts: ti: var-som-am62p: Add support for WM8904 audio codec
77b7ed6c043d arm64: dts: ti: var-som-am62p: Refactor IPC configuration into common dtsi
578eb2e30594 arm64: dts: ti: k3-am62d2-evm: Enable PMIC
f2475f7b2859 arm64: dts: ti: k3-am62d2-evm: Fix PMIC padconfig
05b8a606c27b arm64: dts: ti: k3-am62d2-evm: Fix regulator properties
81c8f1a1a794 arm64: dts: ti: sa67: add overlay for the ADS2 carrier
f9f296f96ac6 arm64: dts: ti: Add support for Kontron SMARC-sAM67
2f2457c617e9 dt-bindings: arm: ti: Add Kontron SMARC-sAM67 module
920570c4c314 arm64: dts: ti: k3-j722s-main: fix the audio refclk source
dde857544006 arm64: dts: ti: k3-j722s-evm: explicitly use PLL1_HSDIV6 audio refclk
5857f9c2eaa9 dt-bindings: i2c: qcom-cci: Document Kaanapali compatible
984d12bdd1c5 dt-bindings: i2c: qcom-cci: Document msm8953 compatible
5abea6a92807 ARM: dts: sti: remove useless cells fields
8fa60eeee56d ARM: dts: sti: extract display subsystem out of soc
e1fa0f943b27 dt-bindings: soc: mediatek: pwrap: Add compatible for MT8189 SoC
a83061721009 scsi: ufs: dt-bindings: qcom: Drop redundant "reg" constraints
a25de645f4a6 Merge patch series "ufs: Add support for AMD Versal Gen2 UFS"
8ed788fef493 scsi: ufs: dt-bindings: amd-versal2: Add UFS Host Controller for AMD Versal Gen 2 SoC
c0141392dbec dt-bindings: net: enetc: add compatible string for ENETC with pseduo MAC
edf9348fb52f dt-bindings: net: netc-blk-ctrl: add compatible string for i.MX94 platforms
1a01e2ae483e dt-bindings: display: panel: document Synaptics TDDI panel
e26b0907e225 dt-bindings: display: bridge: renesas,dsi-csi2-tx: Align panel example with ili9881c binding
388395195887 dt-bindings: display: panel: samsung,atna33xc20: Document ATNA60CL08
a3ae79d93700 dt-bindings: panel: Add Samsung S6E3FC2X01 DDIC with panel
a99f938f5aa5 ASoC: dt-bindings: cirrus,cs4271: Document mclk clock
d01c58aafc2f arm64: dts: qcom: Add display support for QCS615 RIDE board
39d0f55a7a15 arm64: dts: qcom: Add display support for QCS615
efa5b9f2bc1d arm64: dts: qcom: sm8550: Limit max SD HS mode frequency by default
7f1f96dffacd arm64: dts: qcom: qcs615-ride: Update 'model' string for qcs615 ride
00eefa218713 dt-bindings: soc: qcom,aoss-qmp: Document the Glymur AOSS side channel
49d55ebca38e dt-bindings: soc: qcom,aoss-qmp: Document the Kaanapali AOSS channel
41e853fcc233 media: dt-bindings: vd55g1: Add vd65g4 compatible
e3a1f4e91b52 media: dt-bindings: video-interfaces: add video-interfaces.h information
6f18a887c3ba dt-bindings: media: convert nxp,tda1997x.txt to yaml format
1bb72b82d0cb dt-bindings: media: Convert ti,tvp5150.txt to yaml format.
c32a348b4e89 dt-bindings: media: i2c: dw9719: Document DW9800K
16bc12b73ca9 dt-bindings: media: i2c: Add DW9718S, DW9719 and DW9761 VCM
a245812e8691 dt-bindings: eeprom: at24: Add compatible for Belling BL24S64
73aa608e5cdd arm64: dts: ti: k3-am62: Add RNG node
3af25a3096ce arm64: dts: qcom: ipq5424: Add NSS clock controller node
6b3564ee6089 Merge branch '20251014-qcom_ipq5424_nsscc-v7-2-081f4956be02@quicinc.com' into HEAD
4a20798bd143 arm64: dts: allwinner: a523: Add SPDIF TX pin on PB and PI pins
f08405274eb4 arm64: dts: allwinner: a523: Add I2S2 pins on PI pin group
eb693907e112 arm64: dts: allwinner: a523: Add device nodes for I2S controllers
9fb90441e76e arm64: dts: allwinner: a523: Add device node for SPDIF block
629b2d2ecaf9 arm64: dts: allwinner: a523: Add DMA controller device nodes
86e58381d607 dt-bindings: dma: allwinner,sun50i-a64-dma: Add compatibles for A523
c512574ca614 arm64: dts: allwinner: h616: add NAND controller
77523862c4c5 dt-bindings: mtd: sunxi: Add H616 compatible
324d8c8e85d5 dt-bindings: mtd: physmap: add 'clocks' and 'power-domains'
564e76e7bc36 dt-bindings: usb: qcom,snps-dwc3: Add Glymur compatible
cd3e933059f3 Add support for Cirrus Logic CS530x DAC and CODEC
3df1f2221f07 allwinner: a523: Enable I2S and SPDIF TX
a5377911b626 Sndcard compatible for qrb2210/qcm2290
77e5482e2dd7 ALSA: cs35l56: Add support for factory calibration
6f315594e8b8 dt-bindings: serial: snps-dw-apb-uart: Add support for rk3506
f236f03d3035 dt-bindings: net: cdns,macb: add Mobileye EyeQ5 ethernet interface
9c23d9831da2 regulator: pca9450: add input supply links
1750f654206b dt-bindings: pinctrl: stm32: Support I/O synchronization parameters
69c3999354e0 dt-bindings: pinctrl: stm32: Use properties from pincfg-node.yaml
82ffff1efbbd dt-bindings: pincfg-node: Add properties 'skew-delay-{in,out}put-ps'
3ab76ecf5d1d riscv: dts: thead: Add PWM fan and thermal control
92326f084155 riscv: dts: thead: Add PWM controller node
f93c62890c2f arm64: dts: layerscape: add dma-coherent for usb node
5d64b5538e7a arm64: dts: renesas: r8a77961: Add GX6250 GPU node
40c1f83b79c8 arm64: dts: renesas: r8a77960: Add GX6250 GPU node
2a38b90ab47d ARM: dts: renesas: kzm9g: Name interrupts for accelerometer
3600f22b4dce arm64: dts: renesas: r9a09g087: Add Cortex-A55 PMU node
4b70c7338153 arm64: dts: renesas: r9a09g077: Add Cortex-A55 PMU node
3eab62e16cf4 arm64: dts: renesas: r9a09g056: Add Cortex-A55 PMU node
d0735048dea8 arm64: dts: renesas: r9a09g057: Add Cortex-A55 PMU node
fce29fd9a4ce ARM: dts: renesas: r9a06g032-rzn1d400-db: Drop invalid #cells properties
bd7825128485 arm64: dts: renesas: v3msk: Enable watchdog timer
8d6bae4f60f4 arm64: dts: renesas: r8a779h0: Add SWDT node
7484014c3c4c arm64: dts: renesas: r8a779g0: Add SWDT node
4b23d2623005 arm64: dts: renesas: r8a779f0: Add SWDT node
5f594d110e49 arm64: dts: renesas: r8a779a0: Add SWDT node
e1b992a8f519 arm64: dts: renesas: rzt2h/rzn2h-evk: Enable ADCs
f3de712c04d1 arm64: dts: renesas: r9a09g087: Add ADCs support
5131a6b6c5c7 arm64: dts: renesas: r9a09g077: Add ADCs support
5a2064c8ab3a ARM: dts: renesas: koelsch: Update ADV7180 binding
e75c78162e9f ARM: dts: renesas: r9a06g032: Move interrupt-parent to root node
e51d601a098a ARM: dts: renesas: r8a7794: Move interrupt-parent to root node
7cf03360c5b2 ARM: dts: renesas: r8a7793: Move interrupt-parent to root node
778194b83c15 ARM: dts: renesas: r8a7792: Move interrupt-parent to root node
4480cc808c88 ARM: dts: renesas: r8a7791: Move interrupt-parent to root node
f64ab8fae780 ARM: dts: renesas: r8a7790: Move interrupt-parent to root node
1d0ee5b34647 ARM: dts: renesas: r8a77470: Move interrupt-parent to root node
86dc112b20af ARM: dts: renesas: r8a7745: Move interrupt-parent to root node
3633ac3370a1 ARM: dts: renesas: r8a7744: Move interrupt-parent to root node
f18600a1c85f ARM: dts: renesas: r8a7743: Move interrupt-parent to root node
ef1cc272bcf3 ARM: dts: renesas: r8a7742: Move interrupt-parent to root node
f14a0e86b59b ARM: dts: renesas: r7s9210: Remove duplicate interrupt-parent
1e6ac2e6c088 ARM: dts: renesas: r7s72100: Move interrupt-parent to root node
2675e3c01c37 ARM: dts: renesas: gose: Remove superfluous port property
1a26b3bfea7c arm64: dts: renesas: eagle/v3msk: Mark SWDT as reserved
bf7e47f24b8e arm64: dts: renesas: ebisu: Mark SWDT as reserved
0b3d6a57b158 arm64: dts: renesas: draak: Mark SWDT as reserved
6fb2f2c3313a arm64: dts: renesas: ulcb: Mark SWDT as reserved
6918022f6f3c arm64: dts: renesas: salvator-common: Mark SWDT as reserved
f5cd87fe3ecc arm64: dts: renesas: r8a77995: Add SWDT node
262967098387 arm64: dts: renesas: r8a77990: Add SWDT node
6fbb54700b9d arm64: dts: renesas: r8a77970: Add SWDT node
48ecc636433e arm64: dts: renesas: r8a77965: Add SWDT node
1e7c5169d327 arm64: dts: renesas: r8a77961: Add SWDT node
3707f6099025 arm64: dts: renesas: r8a77960: Add SWDT node
b362a6bee083 arm64: dts: renesas: r8a77951: Add SWDT node
9ded9a2cbc9c arm64: dts: renesas: r9a09g087: Move interrupt-parent to root node
f9cfb3e3bc73 arm64: dts: renesas: r9a09g077: Move interrupt-parent to root node
d9c57630c6aa arm64: dts: renesas: r9a09g057: Move interrupt-parent to root node
fb1eaac90154 arm64: dts: renesas: r9a09g056: Move interrupt-parent to root node
a747b04edcd9 arm64: dts: renesas: r9a09g047: Move interrupt-parent to root node
6fa015d9c3f2 arm64: dts: renesas: r9a09g011: Move interrupt-parent to root node
86b4aff5751e arm64: dts: renesas: r9a08g045: Move interrupt-parent to root node
556f38414a3b arm64: dts: renesas: r9a07g054: Move interrupt-parent to root node
639171af00d0 arm64: dts: renesas: r9a07g044: Move interrupt-parent to root node
858f8626358b arm64: dts: renesas: r9a07g043u: Move interrupt-parent to root node
f774aa1d08e2 arm64: dts: renesas: r8a779h0: Move interrupt-parent to root node
1ea98c466faf arm64: dts: renesas: r8a779g0: Move interrupt-parent to root node
ff2e3e4aaa25 arm64: dts: renesas: r8a779f0: Move interrupt-parent to root node
410f62158740 arm64: dts: renesas: r8a779a0: Move interrupt-parent to root node
85635a7585eb arm64: dts: renesas: r8a77995: Move interrupt-parent to root node
ec38de19029b arm64: dts: renesas: r8a77990: Move interrupt-parent to root node
22c9131d5d5b arm64: dts: renesas: r8a77980: Move interrupt-parent to root node
fce325d2e138 arm64: dts: renesas: r8a77970: Move interrupt-parent to root node
17445f73c0d8 arm64: dts: renesas: r8a77965: Move interrupt-parent to root node
8619b9b0a4fa arm64: dts: renesas: r8a77961: Move interrupt-parent to root node
f8e6053c4851 arm64: dts: renesas: r8a77960: Move interrupt-parent to root node
c2edd1209006 arm64: dts: renesas: r8a77951: Move interrupt-parent to root node
0351e614dd34 arm64: dts: renesas: r8a774e1: Move interrupt-parent to root node
8e73e259fa80 arm64: dts: renesas: r8a774c0: Move interrupt-parent to root node
04abba2eacb9 arm64: dts: renesas: r8a774b1: Move interrupt-parent to root node
6f4c8b1124d7 arm64: dts: renesas: r8a774a1: Move interrupt-parent to root node
8196cc3a589a arm64: dts: renesas: r8a78000: Add initial Ironhide board support
ad2815fdc4ea arm64: dts: renesas: Add R8A78000 SoC support
a5c4ba64ebd6 arm64: dts: qcom: x1e80100-crd: Add charge limit nvmem
7f1da07b52e2 arm64: dts: qcom: qcm2290: Fix camss register prop ordering
f3ff1b8f8aa9 dt-bindings: firmware: qcom,scm: Document Glymur scm
26fba680b4f4 arm64: dts: qcom: qcs615-ride: Set drive strength for wlan-en-state pin
e8b5084bb178 arm64: dts: qcom: sc8280xp-x13s: enable camera privacy indicator
b338fff9357f dt-bindings: net: phy: vsc8531: Convert to DT schema
8a739271313b dt-bindings: pinctrl: Add cix,sky1-pinctrl
ce953a44dcd9 arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
553396e497bf arm64: dts: qcom: sm6350: Add interconnect support to UFS
a17d0bf21c18 arm64: dts: qcom: sm6350: Add OPP table support to UFSHC
06f96f6e3f2b arm64: dts: qcom: sm6350: Fix wrong order of freq-table-hz for UFS
61c6439b6bc1 dt-bindings: arm: qcom,ids: Add SoC ID for SM8850
d9f147419b5b arm64: dts: qcom: qrb2210-rb1: add HDMI/I2S audio playback support
2af5e843fe07 arm64: dts: qcom: qcm2290: add LPASS LPI pin controller
dab83d4b818a arm64: dts: qcom: qcm2290: add APR and its services
846ffd24b0ae arm64: dts: qcom: sdm845-shift-axolotl: fix touchscreen properties
a66d0dcb8a9a ASoC: dt-bindings: allwinner,sun4i-a10-spdif: Add compatible for A523
cb615a5e9bb2 ASoC: dt-bindings: allwinner,sun4i-a10-i2s: Add compatible for A523
b72c88370dcb arm64: dts: qcom: sdm845: Define guard pages within the rmtfs region
0eb7d62ca4ba arm64: dts: qcom: sdm845-shift-axolotl: Drop address and size cells from panel
0f6c690a07a4 arm64: dts: qcom: sdx75: Fix the USB interrupt entry order
1e17e46c1744 arm64: dts: qcom: lemans: Align ethernet interconnect-names with schema
bce459232f9e arm64: dts: qcom: lemans-evk: Enable AMC6821 fan controller
1c37e39d87df arm64: dts: qcom: lemans-pmics: enable rtc
002acc3e151c arm64: dts: qcom: sm8250-samsung-common: correct reserved pins
38885ff0ca7d arm64: dts: qcom: sdm845-starqltechn: Fix i2c-gpio node name
8f9599036bc8 arm64: dts: qcom: lemans-evk: Add resin key code for PMM8654AU
ce7c41efa420 arm64: dts: qcom: Add Xiaomi Redmi 3S
77fc01dd97a0 dt-bindings: arm: qcom: Add Xiaomi Redmi 3S
73bef8d84a3e arm64: dts: qcom: Add initial support for MSM8937
c636626d1f66 arm64: dts: qcom: sm8550-hdk: Add SM8550-HDK Rear Camera Card overlay
134c3bf3beee arm64: dts: qcom: sm8550-qrd: Enable CAMSS and S5K3M5 camera sensor
aeb7314b94a4 arm64: dts: qcom: sm8550: Add description of MCLK pins
9d2a45d9c3d0 arm64: dts: qcom: sc8280xp: Fix shifted GPI DMA channels
5cf059e61901 arm64: dts: qcom: x1e80100: Add opp-level to indicate PCIe data rates
6b1c470fa75f arm64: dts: qcom: sm8650: Add opp-level to indicate PCIe data rates
33e269bcdd48 arm64: dts: qcom: sm8550: Add opp-level to indicate PCIe data rates
ffc37943915f arm64: dts: qcom: sm8450: Add opp-level to indicate PCIe data rates
09f65a74159b arm64: dts: qcom: x1-dell-thena: remove dp data-lanes
a190145862c7 arm64: dts: qcom: x1-dell-thena: Add missing pinctrl for eDP HPD
1cb903bedab5 arm64: dts: qcom: x1e80100: Move CPU idle states to their respective PSCI PDs
9eb67c3942f1 arm64: dts: qcom: hamoa-iot-evk: Fix 4-speaker playback support
40c06e2b653c arm64: dts: qcom: x1e80100: Describe the full 'link' region of DP hosts
e23c6d3824ce arm64: dts: qcom: qcm2290: Add uart1 and uart5 nodes
874df1b982c6 arm64: dts: qcom: qcm2290: Fix uart3 QUP interconnect
7e39134d5c72 arm64: dts: qcom: qcm6490-shift-otter: Enable venus node
270a5cdf60f0 arm64: dts: qcom: qcm6490-shift-otter: Enable RGB LED
d02db545eae6 arm64: dts: qcom: qcm6490-shift-otter: Enable flash LED
8f65c9da4d18 arm64: dts: qcom: qcm6490-shift-otter: Add missing reserved-memory
d775d76c6f97 arm64: dts: qcom: qcm6490-shift-otter: Remove thermal zone polling delays
aa94b43260b9 arm64: dts: qcom: qcm6490-shift-otter: Fix sorting and indentation
f8e32d2c41f8 arm64: dts: qcom: msm8939-asus-z00t: add initial device tree
13ad390ba838 dt-bindings: arm: qcom: Add Asus ZenFone 2 Laser/Selfie
0188f96058a8 arm64: dts: qcom: Add support for Huawei MateBook E 2019
539d085102fb dt-bindings: arm: qcom: Document Huawei MateBook E 2019
d88c8861d076 arm64: dts: qcom: sm8750-mtp: move PCIe GPIOs to pcieport0 node
69e68f3eedf1 arm64: dts: qcom: sm8650: set ufs as dma coherent
f5e38a286701 arm64: dts: qcom: sm7325-nothing-spacewar: Use correct compatible for audiocc
df3c03535652 arm64: dts: qcom: qcm6490-shift-otter: Use correct compatible for audiocc
95f0b38e6e19 arm64: dts: qcom: qcm6490-fairphone-fp5: Use correct compatible for audiocc
9320ad1b0b6a arm64: dts: qcom: qcm6490-fairphone-fp5: Add VTOF_LDO_2P8 regulator
a90d8864afc4 arm64: dts: qcom: qcm6490-fairphone-fp5: Add supplies to simple-fb node
8a37222312e9 arm64: dts: qcom: sm8250: Add MDSS_CORE reset to mdss
a0bceae1a0ff arm64: dts: qcom: qcs6490: Introduce Radxa Dragon Q6A
c0fed9e3cf30 dt-bindings: arm: qcom: Add Radxa Dragon Q6A
1685c95f0af9 arm64: dts: qcom: x1e80100-asus-zenbook-a14: Enable WiFi, Bluetooth
e91acc9ac35f arm64: dts: qcom: Rework X1-based Asus Zenbook A14's displays
3ce765c2fd6e dt-bindings: arm: qcom: Add Asus Zenbook A14 UX3407QA LCD/OLED variants
050044532eec arm64: dts: qcom: sdm845-oneplus: Correct gpio used for slider
207a134b4b6b arm64: dts: qcom: sdm845-starqltechn: fix max77705 interrupts
f3c6cd937568 arm64: dts: qcom: sdm845-starqltechn: remove (address|size)-cells
3e6a898ef6dc arm64: dts: qcom: qcm6490-fairphone-fp5: Add vibrator support
8310fbfb41f2 arm64: dts: qcom: monaco-evk: Add firmware-name to QUPv3 nodes
1d10c0210fc4 arm64: dts: qcom: lemans-evk: Add firmware-name to QUPv3 nodes
1ee7ca058242 arm64: dts: qcom: qcs6490-rb3gen2: Add firmware-name to QUPv3 nodes
4454c4ce0ec0 arm64: dts: qcom: msm8916-longcheer-l8910: Add touchscreen
274cf9dcd23e arm64: dts: qcom: qcs6490-rb3gen2: Update regulator settings
9b944759802c arm64: dts: qcom: sm6350: Add MDSS_CORE reset to mdss
e5898f14d13f arm64: dts: qcom: qcs8300-pmics: Remove 'allow-set-time' property
bcd976a0fccb arm64: dts: qcom: rename sm6150 to talos
11ba2e023ba2 arm64: dts: qcom: rename x1e80100 to hamoa
ba699b542674 arm64: dts: qcom: rename qcs8300 to monaco
3b4a09175eca arm64: dts: qcom: sm6375: add refgen regulator
4001d8c67d97 arm64: dts: qcom: sc8280xp: add refgen regulator
c4be6e56fd0c arm64: dts: qcom: qcs8300: add refgen regulator
f6836d933888 arm64: dts: qcom: sm8250: add refgen regulator and use it for DSI
28d8edc9a748 arm64: dts: qcom: sm8150: add refgen regulator and use it for DSI
16067e4bf443 arm64: dts: qcom: sm6350: add refgen regulator and use it for DSI
80c79d2acc90 arm64: dts: qcom: sdm845: add refgen regulator and use it for DSI
bda9f75a892b arm64: dts: qcom: sdm670: add refgen regulator and use it for DSI
b8ace3e6ecdb arm64: dts: qcom: sc8180x: add refgen regulator and use it for DSI
b538811379ac arm64: dts: qcom: sc7280: add refgen regulator and use it for DSI
b19ee0665250 arm64: dts: qcom: sc7180: add refgen regulator and use it for DSI
1f101c50212e arm64: dts: qcom: lemans: add refgen regulator and use it for DSI
439d1c76437d arm64: dts: qcom: lemans: move USB PHYs to a proper place
e9fcf9e5f564 arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature
34b2832b6844 arm64: dts: qcom: qcs615: Add OSM l3 interconnect provider node and CPU OPP tables to scale DDR/L3
5436a604fa71 arm64: dts: qcom: lemans-evk-camera: Add DT overlay
1d729fa64cca dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+
6c341a4fdfdf arm64: dts: qcom: lemans: Add missing quirk for HS only USB controller
56542dbdfeff arm64: dts: qcom: x1e80100: Add missing quirk for HS only USB controller
112769f4d430 arm64: dts: qcom: x1e80100: Fix compile warnings for USB HS controller
b832bda21981 regulator: dt-bindings: nxp,pca9450: document input supplies
961a5a4ee941 dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3506
165f06e79c8b dt-bindings: mediatek: mt8189: Add bindings for MM & APU & INFRA IOMMU
35dfa89afd17 ASoC: dt-bindings: sound: cirrus: cs530x: Add SPI bus support
d11c98dfcc39 ASoC: dt-bindings: sound: cirrus: cs530x: Add cs530x
ba201aaeb06f ASoC: dt-bindings: qcom,sm8250: add QRB2210 soundcard
fe51b3ea5218 arm64: dts: mediatek: mt8365-evk: Enable GPU support
3bde7c2a848e arm64: dts: mediatek: mt8365: Add GPU support
870d1f398ffe arm64: dts: mediatek: mt8395-genio-1200-evk: Describe CPU supplies
8d72b4f42dfe arm64: dts: ti: k3-am625: Add OLDI support
16d76dfddbf7 arm64: dts: ti: k3-am62: Add support for AM625 OLDI IO Control
6c6bdc4cbf5f Merge tag 'v6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next
ebdc24c72b4a Merge 6.18-rc3 into usb-next
7ed3b2e5599f Merge 6.18-rc3 into tty-next
85d911015f1d ARM: dts: imx7ulp: remove bias-pull-up
d5145a78e6cc ARM: dts: remove undocumented clock-names for ov5642
ddb3ea4100b0 ARM: dts: add device_type for memory node
0f41d0289279 ARM: dts: Add bus type for parallel ov5640
174745c222ef ARM: dts: imx6q-cm-fx6.dts: add supplies for wm8731
3e901f54959a ARM: dts: imx6qdl-skov-cpu fix typo interrupt
715eae8f8946 ARM: dts: imx: remove redundant linux,phandle
eb2938ae945f ARM: dts: imx6ull-dhcom-pdk2: rename power-supply to vcc-supply for touchscreen
68481171e694 ARM: dts: imx: add power-supply for lcd panel
607a34b4e1e6 arm64: dts: imx8mp pollux: add displays for expansion board
c756cb2157c8 arm64: dts: imx8mp pollux: add expansion board overlay
35124f689bec arm64: dts: imx8mp pollux: add display overlays
0a5af52fdc35 arm64: dts: im8mp-phy{board,core}: update license
5f3cbbd812e4 ARM: dts: imx6qdl-nitrogen6_max: rename i2c<n>mux to i2c
148d78f5d7c7 ARM: dts: imx6ull-phytec-tauri: remove extra space before jedec,spi-nor
68ba173bfb63 ARM: dts: imx6q-utilite-pro: add missing required property for pci
6bb0e10cbed6 ARM: dts: imx6-tbs2910: rename ir_recv to ir-receiver
0dc65554d185 ARM: dts: imx6: remove pinctrl-name if pinctrl-0 doesn't exist
c23f78848bcb ARM: dts: imx6: change voltage-divider's io-channel-cells to 1
dd16c95859a6 ARM: dts: imx6: remove gpio suffix for regulator
6eeb760dff1b ARM: dts: imx6qdl-ts4900: rename ngpio to ngpios
f34022e3a289 ARM: dts: imx6: rename m95m02 to eeprom
fc53cfa02a15 ARM: dts: imx6: rename touch-thermal0 to touch-0-thermal
593b1adbf865 ARM: dts: imx6: rename stmpgpio to gpio
71a312e89dcc arm64: dts: ls1046a-qds: describe the two on-board SFP+ cages
57e788cb9463 arm64: dts: lx2160a-rdb: fully describe the two SFP+ cages
ea857479f1a7 arm64: dts: ls1046a-qds: describe the FPGA based GPIO controller
4e6379390201 arm64: dts: lx2160a-rdb: describe the QIXIS FPGA and two child GPIO controllers
22c9aab9e72b dt-bindings: fsl,fpga-qixis: describe the gpio child node found on LS1046AQDS
f9717289fab3 dt-bindings: fsl,fpga-qixis-i2c: add support for LX2160ARDB FPGA
0f2d30c5a87b arm64: dts: add Protonic PRT8ML board
44f5dafee9e3 dt-bindings: arm: fsl: Add Protonic PRT8ML
48b60fcae7c0 arm64: dts: imx8mp: add cpuidle cooling device to the alert trip point
ac037306a1e0 arm64: dts: imx8mp: add idle cooling devices to cpu core
8ae263a3064e ARM: dts: imx53: enable PMIC RTC on imx53-qsrb
3c4726b98664 arm64: dts: ti: k3-am62p: Fix memory ranges for GPU
b35d9493bad5 ARM: dts: imx6q-evi: fix rtc compatible
ea69deb91420 arm64: dts: imx8mm-phygate-tauri-l: Update pad ctl for USB OC pin
484223e39d97 arm64: dts: imx8mm-phyboard-polis-rdk: Add USB1 OC pin configuration
72eec38ebcaa arm64: dts: freescale: add initial support for i.MX 95 Verdin Evaluation Kit (EVK)
ee59ce8ff430 dt-bindings: arm: imx: document i.MX 95 Verdin Evaluation Kit (EVK)
9ef8ce8481ec dt-bindings: PCI: Update the email address for Manivannan Sadhasivam
56e26298a815 dt-bindings: PCI: amlogic,axg-pcie: Fix select schema
564dfd1f9ca2 dt-bindings: net: rockchip-dwmac: Add compatible string for RK3506
3087358ee09d dt-bindings: net: snps,dwmac: Sync list of Rockchip compatibles
c89e1fcfec10 dt-bindings: net: snps,dwmac: move rk3399 line to its correct position
e461194da4c0 dt-bindings: npu: Add Arm Ethos-U65/U85
353531f35075 dt-bindings: interrupt-controller: Add UltraRISC DP1000 PLIC
de06ea816986 dt-bindings: vendor-prefixes: Add UltraRISC
d3a1e4d484df dt-bindings: power: Add MT8196 GPU frequency control binding
3b73948a0445 Merge drm/drm-next into drm-misc-next
d0b25ecc26d8 dt-bindings: usb: qcom,snps-dwc3: Add the SM8750 compatible
8670949a158f Merge tag 'drm-misc-next-2025-10-21' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
70dcade11be9 dt-bindings: pinctrl: document polarfire soc iomux0 pinmux
88c915d35256 dt-bindings: pinctrl: document pic64gx "gpio2" pinmux
274812ffbf96 Merge tag 'mpfs-pinctrl-binding-base' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into devel
6d5dde245bd9 riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2
fad36d25ccb5 arm64: dts: socfpga: move sdmmc-ecc to the base DTSI file
2aa19bd6f8e7 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
7e30f13a4210 dt-bindings: pinctrl: toshiba,visconti: Drop redundant functions type
ed8370fc0299 spi: dt-bindings: don't check node names
daf129bdd941 regulator: dt-bindings: qcom,rpmh: Add support for PMR735D
3656e3bf4601 dt-bindings: ata: snps,dwc-ahci: Allow 'iommus' property
813d439f1b42 dt-bindings: cache: qcom,llcc: Document the Kaanapali LLCC
57e1b975973d Merge branch '20251014-qcom_ipq5424_nsscc-v7-2-081f4956be02@quicinc.com' into clk-for-6.19
5e2ad3a0682d dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC
c1274eab7600 dt-bindings: clock: gcc-ipq5424: Add definition for GPLL0_OUT_AUX
4c53f926cad9 dt-bindings: interconnect: Add Qualcomm IPQ5424 NSSNOC IDs
8c2e14302656 dt-bindings: clock: Add "#interconnect-cells" property in IPQ9574 example
e6c83903067c Merge branch '20250919-sm7150-dispcc-fixes-v1-1-308ad47c5fce@mainlining.org' into clk-for-6.19
a0d2382fd32f dt-bindings: clock: sm7150-dispcc: Add MDSS_CORE reset
dff7e409efcf Merge branch '20250919-sm6350-mdss-reset-v1-1-48dcac917c73@fairphone.com' into arm64-for-6.19
574132b74852 Merge branch '20250919-sm6350-mdss-reset-v1-1-48dcac917c73@fairphone.com' into clk-for-6.19
01ad74a84bdd dt-bindings: clock: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets
e80ee5280f2d dt-bindings: touchscreen: consolidate simple touch controller to trivial-touch.yaml
903eedf389dc dt-bindings: touchscreen: trivial-touch: add reset-gpios and wakeup-source
f4a1045b920f dt-bindings: pinctrl: Convert bitmain,bm1880-pinctrl to DT schema
eb7e4aa25cb3 dt-bindings: pinctrl: Convert brcm,ns2-pinmux to DT schema
fd689ccf7274 dt-bindings: pinctrl: Convert actions,s900-pinctrl to DT schema
b7e0432846be dt-bindings: pinctrl: Convert actions,s700-pinctrl to DT schema
c08920cec98b dt-bindings: power: rockchip: Add support for RV1126B
b3b23a0f8683 dt-bindings: power: Add support for MT8196 power controllers
51b5174e9573 dt-bindings: serial: samsung: add samsung,exynos8890-uart compatible
c1bff4d3d777 dt-bindings: serial: samsung: Add compatible for ARTPEC-9 SoC
ee20506ba653 dt-bindings: mmc: rockchip-dw-mshc: Add compatible string for RK3506
15362ce0af90 dt-bindings: usb: Add Apple dwc3
870762c4b8c1 dt-bindings: display: bridge: renesas,dsi-csi2-tx: Allow panel@ subnode
8e8fce1d076f dt-bindings: soc: samsung: exynos-sysreg: add gs101 hsi0 and misc compatibles
73c95b080395 dt-bindings: soc: samsung: exynos-sysreg: add power-domains
d94084d540c3 dt-bindings: net: dsa: yt921x: Add Motorcomm YT921x switch support
7bc3013c4655 arm64: dts: exynos: gs101: fix sysreg_apm reg property
262938d64ab3 arm64: dts: exynos: gs101: fix clock module unit reg sizes
742ec6e8cf66 arm64: dts: exynos: gs101: add sysreg_misc and sysreg_hsi0 nodes
aefc60f54563 ASoC: spacemit: add i2s support to K1 SoC
de9b11f211ce ASoC: amd: ps: Propagate the PCI subsystem Vendor and
a1defb29d354 dt-bindings: mfd: Add binding for the PF1550 PMIC
83900b0792b2 ASoC: dt-bindings: don't check node names
2711a23f210f dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC
3de404ea2c48 dt-bindings: gpu: img,powervr-rogue: Rework the allOf section
f79a526c7eec dt-bindings: gpu: img,powervr-rogue: Drop useless power domains items
b481980f951e dt-bindings: power: qcom,rpmpd: add new RPMH levels
31cd44b77157 dt-bindings: power: qcom,rpmpd: document the Kaanapali RPMh Power Domains
bc3762fb2bb0 dt-bindings: mmc: Add support for BCM72116 and BCM74371 SD host controller
10fec8c27b19 dt-bindings: mmc: sdhci-msm: Add sm8750 compatible
901a61837701 dt-bindings: mmc: sdhci-msm: Add Kaanapali compatible
aa1a3d8bbd02 dt-bindings: net: airoha: Add AN7583 support
02d547c81f79 dt-bindings: leds: Add default-brightness property to common.yaml
60994a5eb151 dt-bindings: leds: arc,arc2c0608: Convert to DT Schema
ef7ee3e02ec4 arm64: dts: imx: correct the flexspi compatible string to match with yaml
e007824d979b arm64: dts: imx95-15x15-evk: add fan-supply property for pwm-fan
46223f4e5cc9 arm64: dts: imx8mp-venice-gw702x: remove off-board sdhc1
6222712cae1c arm64: dts: imx8mp-venice-gw702x: remove off-board uart
65f4ea01f12f arm64: dts: imx8mm-venice-gw72xx: remove unused sdhc1 pinctrl
4240fdaa89f9 arm64: dts: imx8mm-venice-gw700x: reduce RGMII CLK drive strength
ce03cd9563a7 arm64: dts: imx8mp-venice-gw702x: reduce RGMII CLK drive strength
8e9570de34c6 arm64: dts: imx8m{m,n,p}-venice: disable unused clk output for TI PHY
e8dcc0e79ee7 arm64: dts: freescale: imx8mp-venice-gw7905-2x: remove duplicate usdhc1 props
bb72e91975a0 Merge tag 'drm-misc-next-2025-10-02' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
74373cb6b8ae arm64: dts: ten64: add board controller binding
3b72f372df94 dt-bindings: embedded-controller: add Traverse Ten64 board controller
4b9661b5f088 dt-bindings: PCI: mediatek: Add support for Airoha AN7583
fd426bae943f dt-bindings: PCI: mediatek: Convert to YAML schema
9388bfa2880c dt-bindings: iio: imu: smi330: Add binding
0835a5946289 dt-bindings: iio: adc: add max14001
b126aa2dfe6e dts: starfive: jh7110-common: split out mmc0 reset pins from common into boards
d25b5eda5c0e ARM: dts: socfpga: add Enclustra SoM dts files
a9475067dc8d dt-bindings: altera: removal of generic PE1 dts
789bd393c476 ARM: dts: socfpga: removal of generic PE1 dts
41d2b099ebe8 dt-bindings: altera: add Mercury AA1 variants
ee980ead62bd ARM: dts: socfpga: add Mercury AA1 variants
eeef84c9b00c dt-bindings: altera: add binding for Mercury+ SA2
4391b4a2c127 ARM: dts: socfpga: add Enclustra Mercury+ SA2
5adcaa96564e dt-bindings: altera: add Enclustra Mercury SA1
88ad7b46fa60 ARM: dts: socfpga: add Enclustra Mercury SA1
568ac017e71f ARM: dts: socfpga: add Enclustra base-board dtsi
3f63d5d4e2fe ARM: dts: socfpga: add Enclustra boot-mode dtsi
8dd08d78f5ba scsi: ufs: dt-bindings: exynos: Add power-domains
a31096a8a288 arm64: dts: socfpga: agilex5: Add SMMU nodes
712b3762e99d dt-bindings: dma: snps,dw-axi-dmac: Add iommu property
88779b6f6179 dt-bindings: mtd: cdns,hp-nfc: Add iommu property
d30281d77a66 arm64: dts: rockchip: add DTs for 100ASK DShanPi A1
8b4e22665c32 dt-bindings: arm: rockchip: Add 100ASK DShanPi A1
beccd172fb12 arm64: dts: rockchip: add LinkEase EasePi R1
32d764c25448 dt-bindings: arm: rockchip: Add LinkEase EasePi R1
d0a76d134dcb dt-bindings: vendor-prefixes: Document LinkEase
0b9924f364f6 arm64: dts: freescale: debix-som-a-bmb-08: Enable HDMI output
1e9491ba3fe4 arm64: dts: freescale: imx93-phyboard-segin: Add USB vbus regulators
619db2da8f51 arm64: dts: freescale: imx93-phyboard-nash: Add USB vbus regulators
e77e2a381abb arm64: dts: tqma8mpql-mba8mpxl: Add MicIn routing
a2c00e37686e dt-bindings: soc: imx-iomuxc-gpr: Document the CSI mux
d11fba2f0f17 arm64: dts: rockchip: Enable PCIe controller on Radxa E20C
69fce4d52f9f arm64: dts: rockchip: Add PCIe Gen2x1 controller for RK3528
cf6998f0b7f9 arm64: dts: imx94: add DDR Perf Monitor node
925d21a88835 arm64: dts: imx8mp-skov: support new 10" panel board
c7123d625cba dt-bindings: arm: fsl: add compatible for Skov i.MX8MP variant
76be70ea2b33 ARM: dts: imx53-usbarmory: Replace license text comment with SPDX identifier
5fc73024ccf0 arm64: dts: fsl-lx2160a: include rev2 chip's dts
f6d5355371bd arm64: dts: exynos: gs101: add OPPs
a80f7ab256b0 arm64: dts: exynos: gs101: add CPU clocks
711c54551c62 arm64: dts: exynos: gs101: add #clock-cells to the ACPM protocol node
d6e19a329ed6 Merge branch 'for-v6.19/clk-dt-bindings' into next/dt64
c7c9ffbb33d9 dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
f5583b767710 ASoC: dt-bindings: Add bindings for SpacemiT K1
909d59ae9fd3 dt-bindings: iio: health: max30100: Add LED pulse-width property
1264b75b4365 dt-bindings: iio: accel: adxl345: document second interrupt
a0bc29fad0f8 dt-bindings: iio: adc: adi,ad4080: add support for AD4081
2b181b4c0b81 dt-bindings: iio: adc: adi,ad4080: add support for AD4084
45ec10b5820b dt-bindings: iio: imu: Add inv_icm45600
b8481383370e dt-bindings: iio: Add Infineon DPS310 sensor documentation
dbfe8a35702d dt-bindings: iio: adc: document RZ/T2H and RZ/N2H ADC
3fe2b604fd9f dt-bindings: iio: pressure: add binding for mpl3115
413ce13e8678 dt-bindings: PCI: qcom,pcie-sm8550: Add Kaanapali compatible
837261883d7a dt-bindings: PCI: dwc: rockchip: Add RK3528 variant
8b3571906f1a riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
342bd1ea47ef dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
d08900ec8d28 dt-bindings: timers: Add Tenstorrent Blackhole compatible
6156a10bd0f0 dt-bindings: riscv: cpus: Add SiFive X280 compatible
44d0b8da095d dt-bindings: riscv: Add Tenstorrent Blackhole compatible
e83a4993fcd2 dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC
62dab43e8d3e dt-bindings: samsung: exynos-sysreg: add exynos7870 sysregs
203b184e5696 dt-bindings: hwinfo: samsung,exynos-chipid: add exynos8890-chipid compatible
ba1005cb8e45 dt-bindings: soc: samsung: exynos-pmu: add exynos8890 compatible
5a2537ff3afc dt-bindings: input: ti,twl4030-keypad: convert to DT schema
4ea1863701a5 dt-bindings: input: Convert MELFAS MIP4 Touchscreen to DT schema
bb443e84f228 dt-bindings: touchscreen: move ar1021.txt to trivial-touch.yaml
785c3bb8f977 dt-bindings: touchscreen: rename maxim,max11801.yaml to trivial-touch.yaml
a7c727b8bb5c arm64: dts: qcom: apq8096-db820c: Specify zap shader location
2467229e34f2 arm64: dts: qcom: pmi8950: Fix VADC channel scaling factors
a033b5e6ee0b arm64: dts: qcom: pmi8950: Add missing VADC channels
b203038f0b2d arm64: dts: qcom: msm8916-samsung-rossa: Move touchscreen to common device tree
498c31cf533e arm64: dts: qcom: x1e80100: Extend the gcc input clock list
aaf0eb44f62c arm64: dts: qcom: ipq5424: correct the TF-A reserved memory to 512K
c22b68ceed52 dt-bindings: clock: qcom,x1e80100-gcc: Add missing USB4 clocks/resets
08b0c2e63639 riscv: dts: thead: add zfh for th1520
1459e59d133c riscv: dts: thead: add ziccrse for th1520
6e8a600bf08b riscv: dts: thead: add xtheadvector to the th1520 devicetree
0aec2563cf98 spi: airoha: driver fixes & improvements
329d7e37392f rpmh-regulators: Update rpmh-regulator driver and
1bb48f39eb71 dt-bindings: can: m_can: Add wakeup properties
db2e58334671 dt-bindings: crypto: qcom,inline-crypto-engine: Document the kaanapali ICE
602c8138dfcc dt-bindings: rng: microchip,pic32-rng: convert to DT schema
bea471a313df ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
570aff914512 ARM: dts: aspeed: santabarbara: Add AMD APML interface support
5120b30e949c ARM: dts: aspeed: santabarbara: Add gpio line name
5039a83f35a2 ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
99c9978a1748 ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
b8479e7e3097 ARM: dts: aspeed: santabarbara: Add sensor support for extension boards
3b6d4a3434a2 ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability
10d1e5ab47c4 ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC
3869760104cc dt-bindings: arm: aspeed: add Meta Yosemite5 board
902faf7dc83d dt-bindings: net: cdns,macb: sort compatibles
1fd8f6d28ecc dt-bindings: net: qcom: ethernet: Add interconnect properties
29b03ff4efb4 dt-bindings: ethernet: eswin: Document for EIC7700 SoC
1a9e02a5ba9a dt-bindings: trivial-devices: add ADT7410, ADT7420 and ADT7422
21f24b5c2c85 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
bc10f2921dff ASoC: dt-bindings: qcom: Add Kaanapali LPASS macro codecs
f2999cde47ab ASoC: dt-bindings: qcom,sm8250: Add kaanapali sound card
400e68008bf8 dt-bindings: gpio: add QIXIS FPGA based GPIO controller
664a89ff08e2 dt-bindings: net: Convert amd,xgbe-seattle-v1a to DT schema
37d5df40c20f dt-bindings: power: Add power domain IDs for Tegra264
32fe568870f5 dt-bindings: net: airoha: npu: Add AN7583 support
d0cbb14794cc regulator: dt-bindings: rpmh-regulator: Update pmic-id DT prop info for new CMD-DB
332ab6ff5bd9 regulator: dt-bindings: rpmh-regulator : Add compatibles for PMH01XX & PMCX0102
80c52ef03bf6 dt-bindings: trivial-devices: add mps,mp9945
555a8f7e561c dt-bindings: hwmon: Convert apm,xgene-slimpro-hwmon to DT schema
3e3728a86078 dt-bindings: hwmon: pmbus/max17616: Add SMBALERT interrupt property
c4b205751635 dt-bindings: hwmon: max31790: Use addressed fan nodes
7ef6c454b451 dt-bindings: hwmon: Move max31785 compatibles to max31790 document
b69a6c81f405 dt-bindings: hwmon: ntc-thermistor: Add Murata ncp18wm474 NTC
c834398179f4 dt-bindings: net: dsa: nxp,sja1105: Add optional clock
644b93e866c7 Add tegra264 audio device tree support
0ec749fb373a arm64: dts: agilex5: Add GMAC0 node for NAND daughter card
83382381673f arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
e8d8cde97152 arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
12b57453cef9 arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
0e93d911fccc arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
1ae49870f90e dt-bindings: ipmi: Convert aspeed,ast2400-ibt-bmc to DT schema
f6b10b7175fd dt-bindings: ipmi: Convert nuvoton,npcm750-kcs-bmc to DT schema
3fc4bd923e76 dt-bindings: mailbox: Convert apm,xgene-slimpro-mbox to DT schema
8c646578a134 arm64: dts: rockchip: Enable DisplayPort for rk3588-evb2
e30e000e6226 arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R76S
f2a43b9d7c62 dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R76S
68690d18452f arm64: dts: rockchip: Add DSI for RK3368
b8af69717fd7 arm64: dts: rockchip: Add D-PHY for RK3368
81fb39a4f81f arm64: dts: rockchip: Add display subsystem for RK3368
8d8500da1eda media: doc/dt-bindings: remove support of stih407-c8sectpfe
9c5c2835937e media: include: remove c8sectpfe header
8ea2c52474e0 media: dt-bindings: snps,dw-hdmi-rx.yaml: Updated maintainers entry
c949d4277f9b dt-bindings: display: rockchip,dw-mipi-dsi: Document RK3368 DSI
7a3284df2742 ARM: dts: mediatek: drop wrong syscon hifsys compatible for MT2701/7623
1f3b19b7000c dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks
d506d2c5bc30 riscv: dts: spacemit: add i2c aliases on BPI-F3
5f0a3e9074eb riscv: dts: spacemit: add 24c02 eeprom on BPI-F3
ff2e9131fac8 riscv: dts: spacemit: enable the i2c2 adapter on BPI-F3
9cac0efe017c riscv: dts: spacemit: define regulator constraints
1e07287891e5 riscv: dts: spacemit: define fixed regulators
3539906b382a riscv: dts: spacemit: enable the i2c8 adapter
60cbd15ae8f3 riscv: dts: spacemit: add UART pinctrl combinations
8e83318cecb9 dt-bindings: pinctrl: qcom,sm6115-lpass-lpi: add QCM2290 compatible
087950d167d4 dt-bindings: sound: Update ADMAIF bindings for tegra264
14fc96f63628 spi: dt-bindings: spi-qpic-snand: Add IPQ5332 compatible
25a483f7c268 spi: dt-bindings: spi-qpic-snand: Add IPQ5424 compatible
d89aba1eea74 regulator: dt-bindings: Convert Dialog DA9211 Regulators to DT schema
17d7d294647f ASoC: dt-bindings: ti,tas2781: Add TAS5802, TAS5815, and TAS5828
5339e856d177 dt-bindings: pinctrl: describe Kaanapali TLMM
30d885ac61bc dt-bindings: pinctrl: Convert marvell,armada-3710-(sb|nb)-pinctrl to DT schema
af335c4fcfcf dt-bindings: pinctrl: Convert Marvell Berlin pinctrl to DT schema
c33aa0df67da dt-bindings: pinctrl: qcom,pmic-gpio: Add GPIO bindings for Glymur PMICs
8421e716c562 dt-bindings: pinctrl: qcom: msm8960: rename msmgpio node to tlmm
cec5d30b9218 arm64: dts: mediatek: Add MT6878 pinmux macro header file
8ff8abc243b1 arm64: dts: marvell: pxa1908: Add power domains
d1d6fb81600c arm64: dts: marvell: samsung,coreprimevelte: Add USB connector
6ace4d24b710 arm64: dts: marvell: samsung,coreprimevelte: Fill in memory node
0bd2fe9388e7 arm64: dts: marvell: samsung,coreprimevelte: Drop some reserved memory
437faeb5dc32 arm64: dts: marvell: pxa1908: Move ramoops to SoC dtsi
a5ec1282225a arm64: dts: marvell: samsung,coreprimevelte: Add vibrator
825b97e09055 arm64: dts: marvell: pxa1908: Add PWMs
d12ad2275710 arm64: dts: marvell: samsung,coreprimevelte: Enable eMMC
5eb80d9b8334 arm64: dts: marvell: samsung,coreprimevelte: Correct CD GPIO
79c3335d081e arm64: dts: marvell: samsung,coreprimevelte: Add backlight
d8cff2a968db arm64: dts: samsung,coreprimevelte: add SDIO
c9c39f4b16db arm64: dts: samsung,coreprimevelte: add touchscreen
244e7d122482 arm64: dts: samsung,coreprimevelte: add PMIC
74977c1c5640 dt-bindings: pinctrl: pinctrl-single: add ti,am62l-padconf compatible
8536868c9e4b Merge existing fixes from spi/for-6.18 into new branch
82db9f09b4b6 dt-bindings: pinctrl: mediatek: Document MT6878 pin controller bindings
adfa91a58551 ARM: dts: mediatek: add basic support for Alcatel yarisxl board
f11c24e9a047 dt-bindings: arm: mediatek: Add MT6582 yarisxl
dce0e0e0bbf2 ARM: dts: mediatek: mt6582: add enable-method property to cpus
f7589557ab13 ARM: dts: mediatek: mt6582: add clock-names property to uart nodes
323f4d815507 ARM: dts: mediatek: mt6582: add mt6582 compatible to timer
097db3c6ea28 ARM: dts: mediatek: mt6582: remove compatible property from root node
9c27442063f2 ARM: dts: mediatek: mt6582: sort nodes and properties
403c1b4d6187 ARM: dts: mediatek: mt6582: move MMIO devices under soc node
11992a913b29 arm64: dts: mediatek: mt7986-bpi-r3: Change fan PWM value for mid speed
4ce0371faeb8 arm64: dts: mediatek: mt8370-grinn-genio-510-sbc: Add Grinn GenioSBC-510
b6d0d55c25d2 arm64: dts: mediatek: mt8390-genio-700-evk: Add Grinn GenioSBC-700
42ddada8731b arm64: dts: renesas: eagle-function-expansion: Add eMMC support
e169da7bbac7 arm64: dts: mediatek: mt7988a: add 'soc-uuid' cell to efuse
081477510a84 arm64: dts: mediatek: mt7981b: add 'soc-uuid' cell to efuse
2a5e801a8272 arm64: dts: mediatek: mt7986a: add 'soc-uuid' cell to efuse
60bdcb59f1c1 arm64: dts: mediatek: mt7622: add 'soc-uuid' cell to efuse
02a0322e30a5 arm64: dts: mediatek: mt7981b: OpenWrt One: set console UART to 115200
858ad1454d88 arm64: dts: mediatek: mt7981b: add labels for UART0/1/2 nodes
297ef620f3c0 arm64: dts: mediatek: add device-tree for Genio 1200 EVK UFS board
44309731e2c5 arm64: dts: mediatek: mt8395-genio-1200-evk: Move common parts to dtsi
902fc9e1b202 dt-bindings: arm64: mediatek: add mt8395-evk-ufs board
bc577dfaf7ac arm64: dts: renesas: v3[mh]sk: Remove wrong sound property in HDMI encoder node
a37f90d51a48 arm64: dts: renesas: r9a09g047: Add TSU node
18bc8de38388 arm64: dts: renesas: sparrow-hawk: Add overlay for Argon40 fan HAT
e9ed5f73aee7 arm64: dts: renesas: sparrow-hawk: Add overlay for RPi Display 2
551f6fd1b254 arm64: dts: renesas: rzg2l-smarc: Drop clock-frequency from camera sensor node
a95b8d0c4143 arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Drop clock-frequency from camera sensor node
fc62ff7a6276 arm64: dts: mt8183: Rename nodes to match audiosys DT schema
fe6ec06b8913 arm64: dts: renesas: r9a08g045: Add TSU node
4c6e278b8c7b arm64: dts: allwinner: t527: orangepi-4a: Enable Ethernet port
ee6712b604fb arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port
51bdb4009541 arm64: dts: allwinner: a527: cubie-a5e: Enable second Ethernet port
b50b60ea0e2d arm64: dts: allwinner: a523: Add GMAC200 ethernet controller
c5b47b1bac1d dt-bindings: iio: accel: bosch,bma220 set irq type in example block
0ef2548ab75c dt-bindings: iio: accel: bosch,bma220 setup SPI clock mode
f9181a88c0d0 dt-bindings: iio: accel: bosch,bma220 cleanup typo
c62d62a9c011 dt-bindings: usb: samsung,exynos-dwc3 add exynos8890 compatible
b611d5ed78b9 dt-bindings: ata: eswin: Document for EIC7700 SoC ahci
a67b395e0945 Merge drm/drm-next into drm-misc-next
0402ea10786c dt-bindings: usb: add missed compatible string for arm64 layerscape
705a2538aa2b dt-bindings: usb: usbmisc-imx: add fsl,imx94-usbmisc compatible
95525b59b0f5 dt-bindings: usb: xhci: Add "generic-xhci" compatible for Marvell Armada 37xx/8k
859d85310dba dt-bindings: usb: xhci: Allow "iommus" and "dr_mode" properties
7a5d9bd5d6eb dt-bindings: usb: samsung,exynos-dwc3: add power-domains
2186f5c4ca2e dt-bindings: usb: ehci: Add Aspeed AST2700 compatible
69e3266e824a dt-bindings: usb: uhci: Add Aspeed AST2700 compatible
dae59b5bafa2 dt-bindings: usb: uhci: Add reset property
04df665d29d4 arm64: dts: exynos: gs101-pixel-common: add node for s2mpg10 / clock
9dae447565fa dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-9 SoC
1b965b552c12 dt-bindings: hwinfo: samsung,exynos-chipid: add exynos9610 compatible
b81e4bfd908f arm64: dts: exynos990: Add sysreg nodes for PERIC0 and PERIC1
8743323f41e6 dt-bindings: soc: samsung: exynos-sysreg: Add Exynos990 PERIC0/1 compatibles
bde5aa415166 ARM: dts: aspeed: clemente: Add HDD LED GPIO
6a4065eec872 ARM: dts: aspeed: Fix max31785 fan properties
9c59a4511400 ARM: dts: aspeed: Add Balcones system
a7ffeb0bbecb dt-bindings: arm: aspeed: add IBM Bonnell board
1dff0225f2eb dt-bindings: arm: aspeed: add IBM Balcones board
a94432ea0d05 ARM: dts: aspeed: harma: Add MCTP I2C controller node
0ecac01f7e2f ARM: dts: aspeed: yosemite4: allocate ramoops for kernel panic
fa4c4abc31e9 ARM: dts: aspeed: clemente: add shunt-resistor-micro-ohms for LM5066i
894131aa1c07 arm64: dts: exynosautov920: add CMU_MFC clock DT nodes
5b2dc2a4f513 arm64: dts: exynosautov920: add CMU_M2M clock DT nodes
ed22b3fc82cb dt-bindings: clock: exynosautov920: add mfc clock definitions
b4a0f0e50ace dt-bindings: clock: exynosautov920: add m2m clock definitions
a340e0384505 dt-bindings: clock: google,gs101-clock: add power-domains
60751811d057 arm64: dts: exynos7870-on7xelte: add bus-width to mmc0 node
b7ee917ada06 arm64: dts: exynos7870-j6lte: add bus-width to mmc0 node
85cfceeeaf29 arm64: dts: exynos7870-a2corelte: add bus-width to mmc0 node
c8f9ea7b573d dt-bindings: pinctrl: samsung: add exynos8890-wakeup-eint compatible
40ec0056b055 dt-bindings: pinctrl: samsung: add exynos8890 compatible
90cbd1d5164a dt-bindings: hwmon: pmbus: add max17616
15ef2fa902bf dt-bindings: hwmon: Add MPS mp2925 and mp2929
332bd559bc71 dt-bindings: gpu: mali-valhall: make mali-supply optional
3810fc1b5cb9 dt-bindings: gpu: mali-valhall-csf: add MediaTek MT8196 compatible
13b095bf2ae0 dt-bindings: display: panel: document Sharp LQ079L1SX01 panel
9e7d02b705d0 dt-bindings: ili9881c: Allow port subnode
061a6134b73c dt-bindings: ili9881c: Document 5" Raspberry Pi 720x1280
4e3144729da1 dt-bindings: display: simple: Add JuTouch JT101TM023 panel
5bbeb3d7be6a dt-bindings: vendor-prefixes: Add JuTouch Technology Co, Ltd
ba2c3245f772 dt-bindings: display: imx: add HDMI PAI for i.MX8MP

git-subtree-dir: dts/upstream
git-subtree-split: 258d5b0e2447a2a0eb5a910fc7338141e206a5af
2026-02-10 11:40:31 -06:00
Tom Rini
af3b0be9cb Subtree merge tag 'v6.19-dts' of dts repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
2026-02-10 11:40:31 -06:00
5657 changed files with 214087 additions and 59336 deletions

View File

@@ -748,6 +748,57 @@ ForEachMacros:
- 'ynl_attr_for_each_nested'
- 'ynl_attr_for_each_payload'
- 'zorro_for_each_dev'
# U-Boot specific
- '__for_each_child_of_node'
- '__usbhs_for_each_pipe'
- '__usbhsg_for_each_uep'
- '_for_each_zynqmp_part'
- 'alist_for_each'
- 'alist_for_each_filter'
- 'cvmx_coremask_for_each_core'
- 'cvmx_coremask_for_each_node'
- 'dev_for_each_property'
- 'dev_for_each_subnode'
- 'expr_list_for_each_sym'
- 'fdt_for_each_node_by_compatible'
- 'fdt_for_each_property_offset'
- 'fdt_for_each_subnode'
- 'for_each_bin_hdr_v0'
- 'for_each_bl_params_node'
- 'for_each_child_withdel'
- 'for_each_console_dev'
- 'for_each_ext_hdr_v0'
- 'for_each_label'
- 'for_each_label_withdel'
- 'for_each_marker'
- 'for_each_marker_of_type'
- 'for_each_memory_map_entry_reversed'
- 'for_each_mmc_mode_by_pref'
- 'for_each_opt_hdr_v1'
- 'for_each_property_withdel'
- 'for_each_sd_mode_by_pref'
- 'for_each_supported_width'
- 'for_each_tpm_device'
- 'for_each_w1_device'
- 'for_each_zynqmp_image'
- 'for_each_zynqmp_part'
- 'for_each_zynqmp_part_in_image'
- 'mtd_for_each_device'
- 'ofnode_for_each_compatible_node'
- 'ofnode_for_each_prop'
- 'ofnode_for_each_subnode'
- 'pko_for_each_port'
- 'sfi_for_each_mentry'
- 'ubi_for_each_free_peb'
- 'ubi_for_each_protected_peb'
- 'ubi_for_each_scrub_peb'
- 'ubi_for_each_used_peb'
- 'ubi_rb_for_each_entry'
- 'usbhs_for_each_dfifo'
- 'usbhs_for_each_pipe'
- 'usbhs_for_each_pipe_with_dcp'
- 'usbhsg_for_each_uep'
- 'usbhsg_for_each_uep_with_dcp'
IncludeBlocks: Preserve
IncludeCategories:

View File

@@ -153,20 +153,13 @@ Raspberry Pi 4 (rpi_arm64):
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
TEST_PY_TEST_SPEC: "not test_efi_helloworld_net_http"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 4 (rpi_4_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 4 (rpi_arm64, lwIP)" ]
needs: [ "Raspberry Pi 4 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi4-1"
LG_PLACE: "rpi4-1"
@@ -197,20 +190,13 @@ Raspberry Pi 3 (rpi_arm64):
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a CMD_TFTPPUT -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_arm64, lwIP):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"
TEST_PY_BD: "rpi_arm64"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000 -a NET_LWIP"
# DHCP is not being run first, needs to be investigated.
TEST_PY_TEST_SPEC: "not test_efi_helloworld_net_http"
OVERRIDE: "-a UNIT_TEST -a ~CMD_EFIDEBUG -a CMD_BOOTMENU -a CMD_LOG -a ~CMD_BOOTEFI_SELFTEST -a FIT -a FIT_SIGNATURE -a FIT_BEST_MATCH -a SYS_BOOTM_LEN=0x4000000 -a BOOTSTAGE -a BOOTSTAGE_STASH -a CMD_BOOTSTAGE -a BOOTSTAGE_STASH_ADDR=0x02400000"
Raspberry Pi 3 (rpi_3_32b):
<<: *sage_lab_dfn
needs: [ "Raspberry Pi 3 (rpi_arm64, lwIP)" ]
needs: [ "Raspberry Pi 3 (rpi_arm64)" ]
variables:
LABGRID_EXPORTER: "sage-exporter-rpi3-1"
LG_PLACE: "rpi3-1"

View File

@@ -43,8 +43,9 @@ Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>
Dirk Behme <dirk.behme@googlemail.com>
<duje@dujemihanovic.xyz> <duje.mihanovic@skole.hr>
Durga Challa <durga.challa@amd.com> <vnsl.durga.challa@xilinx.com>
Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@microchip.com>
Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@collabora.com>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@microchip.com>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@linaro.org>
Eugen Hristev <ehristev@kernel.org> <eugen.hristev@collabora.com>
Fabio Estevam <fabio.estevam@nxp.com>
Greg Malysa <malysagreg@gmail.com> <greg.malysa@timesys.com>
Harini Katakam <harini.katakam@amd.com> <harini.katakam@xilinx.com>
@@ -67,6 +68,7 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> <jakob.unterwurzacher@theobroma-systems.com>
Javier Tia <floss@jetm.me> <javier.tia@linaro.org>
Jay Buddhabhatti <jay.buddhabhatti@amd.com> <jay.buddhabhatti@xilinx.com>
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
Jerome Forissier <jerome.forissier@arm.com> <jerome@forissier.org>
@@ -131,9 +133,11 @@ Sam Protsenko <semen.protsenko@linaro.org> <joe.skb7@gmail.com>
Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> <sandeep.gundlupet-raju@xilinx.com>
Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Reddy Ghanapuram <sandeep.reddy-ghanapuram@amd.com> <sandeep.reddy-ghanapuram@xilinx.com>
Sean Anderson <sean.anderson@linux.dev> <sean.anderson@seco.com>
Shaohui Xie <Shaohui.Xie@freescale.com>
Shravya Kumbham <shravya.kumbham@amd.com> <shravya.kumbham@xilinx.com>
Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> <shubhrajyoti.datta@xilinx.com>
Simon Glass <sjg@chromium.org> <simon.glass@canonical.com>
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> <siva.durga.paladugu@xilinx.com>
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> <sivadur@xilinx.com>
Srinivas Goud <srinivas.goud@amd.com> <srinivas.goud@xilinx.com>

77
Kconfig
View File

@@ -468,12 +468,41 @@ config TOOLS_DEBUG
it is possible to set breakpoints on particular lines, single-step
debug through the source code, etc.
config SKIP_EARLY_DM
bool "Skips initialising device model pre-relocation"
help
Enable this option to skip scanning and probing devices prior to
U-Boot relocation (during board_f). Unless console support is disabled
a serial port is still required, however this can be found through
/chosen/stdout-path in FDT. If the serial port relies on other devices
like clocks these will also be bound and probed on demand.
This can speed up time to interactive console by about 50%, particularly
when combined with OF_LIVE.
config SKIP_RELOCATE
bool "Skips relocation of U-Boot to end of RAM"
help
Skips relocation of U-Boot allowing for systems that have extremely
limited RAM to run U-Boot.
config SKIP_RELOCATE_CODE
bool
help
Skips relocation of U-Boot code to the end of RAM, but still does
relocate data to the end of RAM. This is mainly meant to relocate
data to read-write portion of the RAM, while the code remains in
read-only portion of the RAM from which it is allowed to execute.
This split configuration is present on various secure cores.
config SKIP_RELOCATE_CODE_DATA_OFFSET
hex
default 0x0
depends on SKIP_RELOCATE_CODE
help
Offset of the read-write memory which contains data, from read-only
memory which contains executable text.
endif # EXPERT
config PHYS_64BIT
@@ -522,10 +551,10 @@ config BUILD_TARGET
default "u-boot-elf.srec" if RCAR_64
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
default "u-boot-with-spl.imx" if (ARCH_MX6 || ARCH_MX7) && SPL
default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-with-spl.sfp" if ARCH_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if ARCH_SOCFPGA_GEN5
default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL
@@ -615,9 +644,11 @@ config STACK_SIZE
default 0x4000 if ARCH_STM32
default 0x1000000
help
Define Max stack size that can be used by U-Boot. This value is used
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
Define Max stack size that can be used by U-Boot. The UEFI sub-system
considers this value when setting up the memory map. The UEFI
specification requires 128 KiB or more of available stack space. On
some boards initrd_high is calculated as base stack pointer minus this
stack size.
config SYS_MEM_TOP_HIDE
hex "Exclude some memory from U-Boot / OS information"
@@ -772,42 +803,8 @@ source "dts/Kconfig"
source "env/Kconfig"
menu "Networking"
choice
prompt "Networking stack"
default NET
config NO_NET
bool "No networking support"
help
Do not include networking support
config NET
bool "Legacy U-Boot networking stack"
imply NETDEVICES
help
Include networking support with U-Boot's internal implementation of
the TCP/IP protocol stack.
config NET_LWIP
bool "Use lwIP for networking stack"
imply NETDEVICES
help
Include networking support based on the lwIP (lightweight IP)
TCP/IP stack (https://nongnu.org/lwip). This is a replacement for
the default U-Boot network stack and applications located in net/
and enabled via CONFIG_NET as well as other pieces of code that
depend on CONFIG_NET (such as cmd/net.c enabled via CONFIG_CMD_NET).
Therefore the two symbols CONFIG_NET and CONFIG_NET_LWIP are mutually
exclusive.
endchoice
source "net/Kconfig"
endmenu
source "drivers/Kconfig"
source "fs/Kconfig"

View File

@@ -65,6 +65,11 @@ F: include/alist.h
F: lib/alist.c
F: test/lib/alist.c
AMD VERSAL2 PCIE DRIVER
M: Pranav Sanwal <pranav.sanwal@amd.com>
S: Maintained
F: drivers/pci/pcie_dw_amd.c
ANDROID AB
M: Mattijs Korpershoek <mkorpershoek@kernel.org>
R: Igor Opaniuk <igor.opaniuk@gmail.com>
@@ -128,15 +133,22 @@ F: drivers/mmc/snps_dw_mmc.c
APPLE M1 SOC SUPPORT
M: Mark Kettenis <kettenis@openbsd.org>
R: Janne Grunau <j@jannau.net>
S: Maintained
F: arch/arm/include/asm/arch-apple/
F: arch/arm/mach-apple/
F: board/apple/
F: configs/apple_m1_defconfig
F: doc/board/apple/
F: drivers/input/apple_spi_kbd.c
F: drivers/iommu/apple_dart.c
F: drivers/mailbox/apple-mbox.c
F: drivers/nvme/nvme_apple.c
F: drivers/pci/pcie_apple.c
F: drivers/phy/phy-apple-atc.c
F: drivers/pinctrl/pinctrl-apple.c
F: drivers/power/domain/apple-pmgr.c
F: drivers/spi/apple_spi.c
F: drivers/watchdog/apple_wdt.c
F: include/configs/apple.h
@@ -323,6 +335,7 @@ F: doc/imx/
F: drivers/mailbox/imx-mailbox.c
F: drivers/remoteproc/imx*
F: drivers/serial/serial_mxc.c
F: drivers/spi/nxp_xspi.c
F: include/imx_container.h
ARM HISILICON
@@ -360,7 +373,7 @@ F: drivers/rng/msm_rng.c
F: drivers/pinctrl/qcom/pinctrl-ipq4019.c
ARM LAYERSCAPE SFP
M: Sean Anderson <sean.anderson@seco.com>
M: Sean Anderson <sean.anderson@linux.dev>
S: Maintained
F: drivers/misc/ls2_sfp.c
@@ -414,7 +427,10 @@ M: Ryder Lee <ryder.lee@mediatek.com>
M: Weijie Gao <weijie.gao@mediatek.com>
M: Chunfeng Yun <chunfeng.yun@mediatek.com>
M: Igor Belwon <igor.belwon@mentallysanemainliners.org>
M: David Lechner <dlechner@baylibre.com>
M: Julien Stephan <jstephan@baylibre.com>
R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>
T: git https://source.denx.de/u-boot/custodians/u-boot-mediatek.git
S: Maintained
F: arch/arm/dts/mt*
F: arch/arm/mach-mediatek/
@@ -432,6 +448,8 @@ F: drivers/net/phy/mediatek/
F: drivers/phy/phy-mtk-*
F: drivers/pinctrl/mediatek/
F: drivers/power/domain/mtk-power-domain.c
F: drivers/power/pmic/mtk-pwrap.c
F: drivers/power/regulator/mt*.c
F: drivers/pci/pcie_mediatek_gen3.c
F: drivers/pci/pcie_mediatek.c
F: drivers/pwm/pwm-mtk.c
@@ -448,6 +466,7 @@ F: drivers/reset/reset-mediatek.c
F: drivers/serial/serial_mtk.c
F: include/dt-bindings/clock/mediatek,*
F: include/dt-bindings/power/mediatek,*
F: include/power/mt*.h
F: tools/mtk_image.c
F: tools/mtk_image.h
F: tools/mtk_nand_headers.c
@@ -463,7 +482,7 @@ F: configs/eDPU_defconfig
F: configs/uDPU_defconfig
ARM MICROCHIP/ATMEL AT91
M: Eugen Hristev <eugen.hristev@microchip.com>
M: Eugen Hristev <ehristev@kernel.org>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-at91.git
F: arch/arm/dts/at91*
@@ -633,7 +652,7 @@ L: linux@analog.com
S: Supported
T: git https://github.com/analogdevicesinc/u-boot
F: arch/arm/dts/sc5*
F: arch/arm/include/asm/arch-adi/
F: arch/arm/include/asm/arch-sc5xx/
F: arch/arm/mach-sc5xx/
F: board/adi/
F: configs/sc5*
@@ -673,6 +692,7 @@ F: drivers/*/*/pm8???-*
F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
F: drivers/phy/qcom/
F: drivers/serial/serial_msm.c
F: drivers/serial/serial_msm_geni.c
F: drivers/smem/msm_smem.c
@@ -1096,7 +1116,7 @@ EFI CLIENT
M: Simon Glass <sjg@chromium.org>
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
S: Maintained
W: https://docs.u-boot.org/en/latest/develop/uefi/u-boot_on_efi.html
W: https://docs.u-boot-project.org/en/latest/develop/uefi/u-boot_on_efi.html
F: board/efi/efi-x86_app
F: configs/efi-x86_app*
F: doc/develop/uefi/u-boot_on_efi.rst
@@ -1237,11 +1257,16 @@ F: drivers/watchdog/sbsa_gwdt.c
FWU Multi Bank Update
M: Sughosh Ganu <sughosh.ganu@arm.com>
M: Kory Maincent <kory.maincent@bootlin.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-efi.git
F: doc/fwumdata.1
F: doc/mkfwumdata.1
F: lib/fwu_updates/*
F: drivers/fwu-mdata/*
F: tools/mkfwumdata.c
F: tools/fwumdata_src/fwumdata.c
F: tools/fwumdata_src/fwumdata.h
F: tools/fwumdata_src/mkfwumdata.c
GATEWORKS_SC
M: Tim Harvey <tharvey@gateworks.com>
@@ -1381,7 +1406,10 @@ F: drivers/net/phy/ca_phy.c
MIPS MEDIATEK
M: Weijie Gao <weijie.gao@mediatek.com>
M: David Lechner <dlechner@baylibre.com>
M: Julien Stephan <jstephan@baylibre.com>
R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>
T: git https://source.denx.de/u-boot/custodians/u-boot-mediatek.git
S: Maintained
F: arch/mips/mach-mtmips/
F: arch/mips/dts/mt7620.dtsi
@@ -1478,6 +1506,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-nios.git
F: arch/nios2/
NVMe
M: Neil Armstrong <neil.armstrong@linaro.org>
M: Bin Meng <bmeng.cn@gmail.com>
S: Maintained
F: drivers/nvme/
@@ -1685,7 +1714,7 @@ F: doc/usage/cmd/seama.rst
F: test/cmd/seama.c
SEMIHOSTING
R: Sean Anderson <sean.anderson@seco.com>
R: Sean Anderson <sean.anderson@linux.dev>
S: Orphaned
N: semihosting
@@ -1767,13 +1796,15 @@ F: drivers/spmi/
F: include/spmi/
SQUASHFS
M: Joao Marcos Costa <jmcosta944@gmail.com>
M: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
M: Richard Genoud <richard.genoud@bootlin.com>
R: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
R: Miquel Raynal <miquel.raynal@bootlin.com>
S: Maintained
F: cmd/sqfs.c
F: common/spl/spl_squashfs.c
F: fs/squashfs/
F: include/sqfs.h
F: cmd/sqfs.c
F: test/py/tests/test_fs/test_squashfs/
STACKPROTECTOR
@@ -1841,10 +1872,14 @@ F: drivers/tpm/
F: include/tpm*
F: lib/tpm*
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
S: Orphaned (Since 2016-02)
T: git git://git.denx.de/u-boot-tq-group.git
TQ-SYSTEMS
L: u-boot@ew.tq-group.com
S: Maintained
W: https://www.tq-group.com/en/products/tq-embedded/
F: board/tq/*
F: doc/board/tq/*
F: include/configs/tq*.h
F: include/env/tq/*
TEE
M: Jens Wiklander <jens.wiklander@linaro.org>
@@ -1886,6 +1921,7 @@ M: Neil Armstrong <neil.armstrong@linaro.org>
M: Bhupesh Sharma <bhupesh.linux@gmail.com>
M: Neha Malcom Francis <n-francis@ti.com>
S: Maintained
F: common/spl/spl_ufs.c
F: drivers/ufs/
UPL

View File

@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2026
PATCHLEVEL = 04
PATCHLEVEL = 07
SUBLEVEL =
EXTRAVERSION =
EXTRAVERSION = -rc3
NAME =
# *DOCUMENTATION*
@@ -531,7 +531,7 @@ UBOOTINCLUDE := \
-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
$(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
@@ -1050,7 +1050,7 @@ UBOOTINCLUDE := \
-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
$(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
@@ -1081,7 +1081,7 @@ libs-$(CONFIG_OF_EMBED) += dts/
libs-y += env/
libs-y += lib/
libs-y += fs/
libs-$(filter y,$(CONFIG_NET) $(CONFIG_NET_LWIP)) += net/
libs-$(CONFIG_NET) += net/
libs-y += disk/
libs-y += drivers/
libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
@@ -1231,6 +1231,7 @@ ifneq ($(CONFIG_SPL_TARGET),)
INPUTS-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
endif
INPUTS-$(CONFIG_REMAKE_ELF) += u-boot.elf
INPUTS-$(CONFIG_SPL_REMAKE_ELF) += spl/u-boot-spl.elf
INPUTS-$(CONFIG_EFI_APP) += u-boot-app.efi
INPUTS-$(CONFIG_EFI_STUB) += u-boot-payload.efi
@@ -1372,7 +1373,7 @@ expect = $(foreach cfg,$(1),y)
# 1: List of options to migrate to (e.g. "CONFIG_DM_MMC CONFIG_BLK")
# 2: Name of component (e.g . "Ethernet drivers")
# 3: Release deadline (e.g. "v202.07")
# 4: Condition to require before checking (e.g. "$(CONFIG_NET)")
# 4: Condition to require before checking (e.g. "$(CONFIG_NET_LEGACY)")
# Note: Script avoids bash construct, hence the strange double 'if'
# (patches welcome!)
define deprecated
@@ -1422,7 +1423,6 @@ endif
PHONY += dtbs dtbs_check
dtbs: dts/dt.dtb
@:
dts/dt.dtb: dtbs_prepare u-boot
$(Q)$(MAKE) $(build)=dts dtbs
@@ -1446,11 +1446,15 @@ quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
ifeq ($(CONFIG_OF_UPSTREAM),y)
ifeq ($(CONFIG_CPU_V8M),y)
dt_dir := dts/upstream/src/arm64
else
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
endif
else
dt_dir := arch/$(ARCH)/dts
endif
@@ -1574,6 +1578,9 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE
%.scif: %.srec
$(Q)$(MAKE) $(build)=arch/arm/mach-renesas $@
%.shdr: %.srec
$(Q)$(MAKE) $(build)=arch/arm/mach-renesas $@
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if $(CONFIG_OF_SEPARATE),-R .bootpg -R .resetvec))
@@ -1678,7 +1685,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
build -u -d $(binman_dtb) -O . -m \
--allow-missing --fake-ext-blobs \
$(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
-I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
-I . -I $(srctree)/board/$(BOARDDIR) -I $(srctree) \
$(foreach f,$(of_list_dirs),-I $(f)) -a of-list=$(of_list) \
$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
-a atf-bl1-path=${BL1} \
@@ -2001,6 +2008,15 @@ u-boot.elf: u-boot.bin u-boot-elf.lds FORCE
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
quiet_cmd_u-boot-spl-elf ?= LD $@
cmd_u-boot-spl-elf ?= $(LD) spl/u-boot-spl-elf.o -o $@ \
$(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \
-T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_SPL_TEXT_BASE) \
-Ttext=$(CONFIG_SPL_TEXT_BASE)
spl/u-boot-spl.elf: spl/u-boot-spl.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< spl/u-boot-spl-elf.o
$(call if_changed,u-boot-spl-elf)
u-boot-elf.lds: arch/u-boot-elf.lds prepare FORCE
$(call if_changed_dep,cpp_lds)
@@ -2134,10 +2150,12 @@ ENV_FILE := $(if $(ENV_SOURCE_FILE),$(ENV_FILE_CFG),$(wildcard $(ENV_FILE_BOARD)
quiet_cmd_gen_envp = ENVP $@
cmd_gen_envp = \
if [ -s "$(ENV_FILE)" ]; then \
$(CPP) -P $(cpp_flags) -x assembler-with-cpp -undef \
$(CPP) -P $(KBUILD_CPPFLAGS) $(UBOOTINCLUDE) \
-x assembler-with-cpp -undef \
-D__ASSEMBLY__ \
-D__UBOOT_CONFIG__ \
-DDEFAULT_DEVICE_TREE=$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE)) \
-DDEFAULT_FDT_FILE=$(subst ",,$(CONFIG_DEFAULT_FDT_FILE)) \
-I . -I include -I $(srctree)/include \
-include linux/kconfig.h -include include/config.h \
-I$(srctree)/arch/$(ARCH)/include \
@@ -2737,21 +2755,19 @@ help:
@echo 'Execute "make" or "make all" to build all targets marked with [*] '
@echo 'For further info see the ./README file'
ifneq ($(filter tests pcheck qcheck tcheck,$(MAKECMDGOALS)),)
export sub_make_done := 0
endif
run_tests = $(Q)env -u sub_make_done $(srctree)/test/run
tests check:
$(srctree)/test/run
$(run_tests)
pcheck:
$(srctree)/test/run parallel
$(run_tests) parallel
qcheck:
$(srctree)/test/run quick
$(run_tests) quick
tcheck:
$(srctree)/test/run tools
$(run_tests) tools
# Documentation targets
# ---------------------------------------------------------------------------

120
README
View File

@@ -597,32 +597,6 @@ The following options need to be configured:
A byte containing the id of the VLAN.
- Status LED: CONFIG_LED_STATUS
Several configurations allow to display the current
status using a LED. For instance, the LED will blink
fast while running U-Boot code, stop blinking as
soon as a reply to a BOOTP request was received, and
start blinking slow once the Linux kernel is running
(supported by a status LED driver in the Linux
kernel). Defining CONFIG_LED_STATUS enables this
feature in U-Boot.
Additional options:
CONFIG_LED_STATUS_GPIO
The status LED can be connected to a GPIO pin.
In such cases, the gpio_led driver can be used as a
status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
to include the gpio_led driver in the U-Boot binary.
CFG_GPIO_LED_INVERTED_TABLE
Some GPIO connected LEDs may have inverted polarity in which
case the GPIO high value corresponds to LED off state and
GPIO low value corresponds to LED on state.
In such cases CFG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
- I2C Support:
CFG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.
@@ -654,98 +628,6 @@ The following options need to be configured:
If you do not have i2c muxes on your board, omit this define.
- Legacy I2C Support:
If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):
I2C_INIT
(Optional). Any commands necessary to enable the I2C
controller or configure ports.
eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
I2C_ACTIVE
The code necessary to make the I2C data line active
(driven). If the data line is open collector, this
define can be null.
eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
I2C_TRISTATE
The code necessary to make the I2C data line tri-stated
(inactive). If the data line is open collector, this
define can be null.
eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
I2C_READ
Code that returns true if the I2C data line is high,
false if it is low.
eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
I2C_SDA(bit)
If <bit> is true, sets the I2C data line high. If it
is false, it clears it (low).
eg: #define I2C_SDA(bit) \
if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
else immr->im_cpm.cp_pbdat &= ~PB_SDA
I2C_SCL(bit)
If <bit> is true, sets the I2C clock line high. If it
is false, it clears it (low).
eg: #define I2C_SCL(bit) \
if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
I2C_DELAY
This delay is invoked four times per clock cycle so this
controls the rate of data transfer. The data rate thus
is 1 / (I2C_DELAY * 4). Often defined to be something
like:
#define I2C_DELAY udelay(2)
CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
If your arch supports the generic GPIO framework (asm/gpio.h),
then you may alternatively define the two GPIOs that are to be
used as SCL / SDA. Any of the previous I2C_xxx macros will
have GPIO-based defaults assigned to them as appropriate.
You should define these to the GPIO value as given directly to
the generic GPIO functions.
CFG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued.
e.g.
#define CFG_SYS_I2C_NOPROBES {0x50,0x68}
will skip addresses 0x50 and 0x68 on a board with one I2C bus
CONFIG_SOFT_I2C_READ_REPEATED_START
defining this will force the i2c_read() function in
the soft_i2c driver to perform an I2C repeated start
between writing the address pointer and reading the
data. If this define is omitted the default behaviour
of doing a stop-start sequence will be used. Most I2C
devices can use either method, but some require one or
the other.
- SPI Support: CONFIG_SPI
Enables SPI driver (so far only tested with
@@ -2399,5 +2281,5 @@ Contributing
The U-Boot projects depends on contributions from the user community.
If you want to participate, please, have a look at the 'General'
section of https://docs.u-boot.org/en/latest/develop/index.html
section of https://docs.u-boot-project.org/en/latest/develop/index.html
where we describe coding standards and the patch submission process.

View File

@@ -190,6 +190,7 @@ config SANDBOX
select HAVE_SETJMP
select HAVE_INITJMP
select ARCH_SUPPORTS_LTO
select AXI
select BOARD_LATE_INIT
select BZIP2
select CMD_POWEROFF if CMDLINE
@@ -199,24 +200,37 @@ config SANDBOX
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
select DM_MAILBOX
select DM_RESET
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select GPIO
select GZIP_COMPRESSED
select I2C
select LZO
select MMC
select MTD
select OF_BOARD_SETUP
select OF_CONTROL
select PCI_ENDPOINT
select SANDBOX_RESET
select SPI
select SERIAL
select SUPPORT_OF_CONTROL
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
select SYSRESET
select SYSRESET_CMD_RESET
select SYSRESET_CMD_POWEROFF if SYSRESET && CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
select SUPPORT_EXTENSION_SCAN if CMDLINE
select SUPPORT_ACPI
select TIMER
select SPL_TIMER if SPL
select TPL_TIMER if TPL
select VPL_TIMER if VPL
imply BITREVERSE
select BLOBLIST
imply LTO
@@ -240,7 +254,7 @@ config SANDBOX
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
imply PARTITION_TYPE_GUID
imply PARTITION_TYPE_GUID if EFI_PARTITION
imply SCP03
imply CMD_SCP03
imply UDP_FUNCTION_FASTBOOT
@@ -250,7 +264,7 @@ config SANDBOX
# Re-enable this when fully implemented
# imply VIRTIO_BLK
imply VIRTIO_NET
imply DM_SOUND
imply SOUND
imply PCI_SANDBOX_EP
imply PCH
imply PHYLIB
@@ -266,7 +280,6 @@ config SANDBOX
imply PHY_FIXED
imply DM_DSA
imply CMD_EXTENSION
imply KEYBOARD
imply PHYSMEM
imply GENERATE_ACPI_TABLE
imply BINMAN
@@ -284,6 +297,7 @@ config SH
config X86
bool "x86 architecture"
select AHCI
select HAVE_SETJMP
select SUPPORT_SPL
select SUPPORT_TPL
@@ -292,6 +306,7 @@ config X86
select DM
select HAVE_ARCH_IOMAP
select HAVE_PRIVATE_LIBGCC
select LMB_ARCH_MEM_MAP
select OF_CONTROL
select PCI
select SUPPORT_ACPI

View File

@@ -10,9 +10,6 @@
#include <irq_func.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
static int cleanup_before_linux(void)
{
@@ -53,17 +50,13 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
{
ulong kernel_entry;
unsigned int r0, r2;
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
bootm_final(flag);
if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
r0 = 2;
@@ -75,7 +68,7 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
cleanup_before_linux();
if (!fake)
if (!(flag & BOOTM_STATE_OS_FAKE_GO))
board_jump_and_run(kernel_entry, r0, 0, r2);
}

View File

@@ -30,7 +30,7 @@ config COUNTER_FREQUENCY
ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
default 100000000 if ARCH_ZYNQMP
default 200000000 if TARGET_SOCFPGA_AGILEX5 || TARGET_SOCFPGA_AGILEX7M
default 200000000 if ARCH_SOCFPGA_AGILEX5 || ARCH_SOCFPGA_AGILEX7M
default 0
help
For platforms with ARMv8-A and ARMv7-A which features a system
@@ -363,7 +363,8 @@ config CPU_V7A
select SYS_CACHE_SHIFT_6
imply SYS_ARM_MMU
config CPU_V7M
# ARMv7-M/ARMv8-M
config CPU_V7M_V8M
bool
select HAS_THUMB2
select SYS_ARM_MPU
@@ -372,6 +373,10 @@ config CPU_V7M
select THUMB2_KERNEL
select NVIC
config CPU_V7M
bool
select CPU_V7M_V8M
config CPU_V7R
bool
select HAS_THUMB2
@@ -379,6 +384,10 @@ config CPU_V7R
select SYS_ARM_MPU
select SYS_CACHE_SHIFT_6
config CPU_V8M
bool
select CPU_V7M_V8M
config SYS_CPU
default "arm720t" if CPU_ARM720T
default "arm920t" if CPU_ARM920T
@@ -389,6 +398,7 @@ config SYS_CPU
default "armv7" if CPU_V7A
default "armv7" if CPU_V7R
default "armv7m" if CPU_V7M
default "armv7m" if CPU_V8M
default "armv8" if ARM64
config SYS_ARM_ARCH
@@ -402,6 +412,7 @@ config SYS_ARM_ARCH
default 7 if CPU_V7A
default 7 if CPU_V7M
default 7 if CPU_V7R
default 7 if CPU_V8M
default 8 if ARM64
choice
@@ -445,7 +456,7 @@ config ARCH_CPU_INIT
config SYS_ARCH_TIMER
bool "ARM Generic Timer support"
depends on CPU_V7A || CPU_V7M || ARM64
depends on CPU_V7A || CPU_V7M_V8M || ARM64
default y if ARM64
help
The ARM Generic Timer (aka arch-timer) provides an architected
@@ -834,6 +845,9 @@ config ARCH_K3
imply DM_RNG if ARM64
imply TEE if ARM64
imply OPTEE if ARM64
imply TPM if ARM64 && MMC
imply TPM2_FTPM_TEE if ARM64 && MMC
imply SUPPORT_EMMC_RPMB if ARM64 && MMC
config ARCH_OMAP2PLUS
bool "TI OMAP2+"
@@ -1068,6 +1082,7 @@ config ARCH_APPLE
imply CMD_GPT
imply BOOTSTD_FULL
imply OF_HAS_PRIOR_STAGE
imply OF_UPSTREAM
config ARCH_OWL
bool "Actions Semi OWL SoCs"
@@ -1145,35 +1160,35 @@ config ARCH_SNAPDRAGON
config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
select ARM64 if TARGET_SOCFPGA_SOC64
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select ARCH_MISC_INIT if !ARCH_SOCFPGA_ARRIA10
select ARM64 if ARCH_SOCFPGA_SOC64
select CPU_V7A if ARCH_SOCFPGA_GEN5 || ARCH_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select LMB_ARCH_MEM_MAP if TARGET_SOCFPGA_SOC64
select ENABLE_ARM_SOC_BOOT0_HOOK if ARCH_SOCFPGA_GEN5 || ARCH_SOCFPGA_ARRIA10
select LMB_ARCH_MEM_MAP if ARCH_SOCFPGA_SOC64
select OF_CONTROL
select SPL_DM_RESET if DM_RESET
select SPL_DM_SERIAL
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_OF_CONTROL
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64
select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64
select SPL_SEPARATE_BSS if ARCH_SOCFPGA_SOC64
select SPL_DRIVERS_MISC if ARCH_SOCFPGA_SOC64
select SPL_SOCFPGA_DT_REG if ARCH_SOCFPGA_SOC64
select SPL_SERIAL
select SPL_SYSRESET
select SPL_WATCHDOG
select SUPPORT_SPL
select SYS_NS16550
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select SYS_THUMB_BUILD if ARCH_SOCFPGA_GEN5 || ARCH_SOCFPGA_ARRIA10
select SYSRESET
select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \
TARGET_SOCFPGA_SOC64
select SYSRESET_PSCI if TARGET_SOCFPGA_AGILEX5
select USE_BOOTFILE if SPL_ATF && TARGET_SOCFPGA_SOC64
select SYSRESET_SOCFPGA if ARCH_SOCFPGA_GEN5 || ARCH_SOCFPGA_ARRIA10
select SYSRESET_SOCFPGA_SOC64 if !ARCH_SOCFPGA_AGILEX5 && \
ARCH_SOCFPGA_SOC64
select SYSRESET_PSCI if ARCH_SOCFPGA_AGILEX5
select USE_BOOTFILE if SPL_ATF && ARCH_SOCFPGA_SOC64
imply CMD_DM
imply CMD_MTDPARTS
imply CRC32_VERIFY
@@ -2154,7 +2169,6 @@ config TARGET_POMELO
select SCSI_AHCI
select AHCI_PCI
select PCI
select DM_PCI
select SCSI
select DM_SERIAL
imply CMD_PCI

View File

@@ -16,6 +16,7 @@ arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
arch-$(CONFIG_CPU_V8M) =-march=armv8-m.main
ifeq ($(CONFIG_ARM64_CRC32),y)
arch-$(CONFIG_ARM64) =-march=armv8-a+crc
else
@@ -42,6 +43,7 @@ tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_CPU_V8M) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now

View File

@@ -7,7 +7,6 @@
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/arch/nexell.h>
@@ -15,8 +14,6 @@
#include <asm/arch/tieoff.h>
#include <cpu_func.h>
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_ARCH_CPU_INIT
#error must be define the macro "CONFIG_ARCH_CPU_INIT"
#endif

View File

@@ -19,6 +19,9 @@
*/
int cleanup_before_linux(void)
{
if (!CONFIG_IS_ENABLED(LIB_BOOTM) && !CONFIG_IS_ENABLED(LIB_BOOTZ))
return 0;
/*
* this function is called just before we call linux
* it prepares the processor for linux
@@ -45,8 +48,9 @@ int cleanup_before_linux(void)
}
/*
* Perform the low-level reset.
* Perform the low-level reset. ARMv7M only.
*/
#if IS_ENABLED(CONFIG_CPU_V7M)
void reset_cpu(void)
{
/*
@@ -56,8 +60,10 @@ void reset_cpu(void)
| (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK)
| V7M_AIRCR_SYSRESET, &V7M_SCB->aircr);
}
#endif
void spl_perform_arch_fixups(struct spl_image_info *spl_image)
{
spl_image->entry_point |= 0x1;
if (IS_ENABLED(CONFIG_XPL_BUILD))
spl_image->entry_point |= 0x1;
}

View File

@@ -810,8 +810,10 @@ __weak void mmu_setup(void)
el = current_el();
set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL),
MEMORY_ATTRIBUTES);
}
/* enable the mmu */
void mmu_enable(void)
{
set_sctlr(get_sctlr() | CR_M);
}
@@ -881,6 +883,7 @@ void dcache_enable(void)
if (!mmu_status()) {
__asm_invalidate_tlb_all();
mmu_setup();
mmu_enable();
}
/* Set up page tables only once (it is done also by mmu_setup()) */

View File

@@ -382,6 +382,7 @@ menu "Layerscape architecture"
config FSL_LAYERSCAPE
bool
select ARM_SMCCC
select LMB_ARCH_MEM_MAP
config HAS_FEATURE_GIC64K_ALIGN
bool

View File

@@ -1143,7 +1143,7 @@ int arch_early_init_r(void)
#ifdef CONFIG_SYS_HAS_SERDES
fsl_serdes_init();
#endif
#ifdef CONFIG_SYS_FSL_HAS_RGMII
#if defined(CONFIG_SYS_FSL_HAS_RGMII) && defined(CONFIG_FSL_MC_ENET)
/* some dpmacs in armv8a based freescale layerscape SOCs can be
* configured via both serdes(sgmii, 10gbase-r, xlaui etc) bits and via
* EC*_PMUX(rgmii) bits in RCW.
@@ -1158,6 +1158,10 @@ int arch_early_init_r(void)
* function of SOC, the dpmac will be enabled as RGMII even if it was
* also enabled before as SGMII. If ECx_PMUX is not configured for
* RGMII, DPMAC will remain configured as SGMII from fsl_serdes_init().
*
* fsl_rgmii_init() itself is only built under CONFIG_FSL_MC_ENET
* (drivers/net/ldpaa_eth/); gate the call the same way so builds
* without MC-ENET still link.
*/
fsl_rgmii_init();
#endif
@@ -1549,7 +1553,8 @@ void lmb_arch_add_memory(void)
gd->arch.resv_ram < ram_start + ram_size)
ram_size = gd->arch.resv_ram - ram_start;
#endif
lmb_add(ram_start, ram_size);
if (ram_size > 0)
lmb_add(ram_start, ram_size);
}
}
#endif

View File

@@ -129,3 +129,18 @@ void __noreturn psci_system_off(void)
while (1)
;
}
int psci_features(u32 psci_func_id)
{
struct pt_regs regs;
regs.regs[0] = ARM_PSCI_1_0_FN_PSCI_FEATURES;
regs.regs[1] = psci_func_id;
if (use_smc_for_psci)
smc_call(&regs);
else
hvc_call(&regs);
return regs.regs[0];
}

View File

@@ -32,13 +32,6 @@ dtb-$(CONFIG_TARGET_A5Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_TARGET_A3Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_ARCH_APPLE) += \
t8103-j274.dtb \
t8103-j293.dtb \
t8103-j313.dtb \
t8103-j456.dtb \
t8103-j457.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-lcdk.dtb \
da850-lego-ev3.dtb
@@ -58,17 +51,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3128) += \
dtb-$(CONFIG_ROCKCHIP_RK322X) += \
rk3229-evb.dtb
dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-evb.dtb \
rk3288-popmetal.dtb \
rk3288-rock2-square.dtb \
rk3288-rock-pi-n8.dtb \
rk3288-veyron-jerry.dtb \
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3288-veyron-speedy.dtb \
rk3288-vyasa.dtb
dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-sheep.dtb \
rk3368-geekbox.dtb \
@@ -469,6 +451,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_cyclone5_socrates.dtb \
socfpga_cyclone5_sr1500.dtb \
socfpga_cyclone5_vining_fpga.dtb \
socfpga_cyclone5_ac501soc.dtb \
socfpga_cyclone5_ac550soc.dtb \
socfpga_n5x_socdk.dtb \
socfpga_stratix10_socdk.dtb
@@ -916,11 +900,7 @@ dtb-$(CONFIG_RZA1) += \
r7s72100-gr-peach.dtb
dtb-$(CONFIG_RCAR_GEN5) += \
r8a78000-ironhide.dtb
ifdef CONFIG_RCAR_GEN5
DTC_FLAGS += -R 4 -p 0x1000
endif
r8a78000-ironhide-cm33.dtb
dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
@@ -1088,8 +1068,7 @@ dtb-$(CONFIG_SOC_K3_J7200) += k3-j7200-r5-common-proc-board.dtb
dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-r5-base-board.dtb\
k3-j721s2-r5-common-proc-board.dtb
dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-aquila-dev.dtb \
k3-am69-r5-aquila-dev.dtb \
dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-r5-aquila-dev.dtb \
k3-am69-r5-sk.dtb \
k3-j784s4-r5-evm.dtb
@@ -1114,6 +1093,9 @@ dtb-$(CONFIG_SOC_K3_AM62D2) += k3-am62d2-r5-evm.dtb
dtb-$(CONFIG_SOC_K3_AM62P5) += k3-am62p5-r5-sk.dtb \
k3-am62p5-verdin-r5.dtb
mt8371-genio-520-evk-ufs-dtbs := mt8371-genio-520-evk.dtb mt8371-genio-common-ufs.dtbo
mt8391-genio-720-evk-ufs-dtbs := mt8391-genio-720-evk.dtb mt8371-genio-common-ufs.dtbo
dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
@@ -1133,6 +1115,10 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7988-rfb.dtb \
mt7988-sd-rfb.dtb \
mt8183-pumpkin.dtb \
mt8371-genio-520-evk.dtb \
mt8371-genio-520-evk-ufs.dtb \
mt8391-genio-720-evk.dtb \
mt8391-genio-720-evk-ufs.dtb \
mt8512-bm1-emmc.dtb \
mt8516-pumpkin.dtb \
mt8518-ap1-emmc.dtb

View File

@@ -35,6 +35,48 @@
reg = <0x0 0x1fa20000 0x0 0x388>;
};
pon_pcs: pcs@1fa08000 {
compatible = "airoha,an7581-pcs-pon";
reg = <0x0 0x1fa08000 0x0 0x1000>,
<0x0 0x1fa80000 0x0 0x60>,
<0x0 0x1fa80a00 0x0 0x164>,
<0x0 0x1fa84000 0x0 0x450>,
<0x0 0x1fa85900 0x0 0x338>,
<0x0 0x1fa86000 0x0 0x300>,
<0x0 0x1fa8a000 0x0 0x1000>,
<0x0 0x1fa8b000 0x0 0x1000>;
reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
"multi_sgmii", "usxgmii",
"hsgmii_rate_adp", "xfi_ana", "xfi_pma";
resets = <&scuclk EN7581_XPON_MAC_RST>,
<&scuclk EN7581_XPON_PHY_RST>;
reset-names = "mac", "phy";
airoha,scu = <&scuclk>;
};
eth_pcs: pcs@1fa09000 {
compatible = "airoha,an7581-pcs-eth";
reg = <0x0 0x1fa09000 0x0 0x1000>,
<0x0 0x1fa70000 0x0 0x60>,
<0x0 0x1fa70a00 0x0 0x164>,
<0x0 0x1fa74000 0x0 0x450>,
<0x0 0x1fa75900 0x0 0x338>,
<0x0 0x1fa76000 0x0 0x300>,
<0x0 0x1fa7a000 0x0 0x1000>,
<0x0 0x1fa7b000 0x0 0x1000>;
reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
"multi_sgmii", "usxgmii",
"hsgmii_rate_adp", "xfi_ana", "xfi_pma";
resets = <&scuclk EN7581_XSI_MAC_RST>,
<&scuclk EN7581_XSI_PHY_RST>;
reset-names = "mac", "phy";
airoha,scu = <&scuclk>;
};
eth: ethernet@1fb50000 {
compatible = "airoha,en7581-eth";
reg = <0 0x1fb50000 0 0x2600>,
@@ -52,6 +94,35 @@
reset-names = "fe", "pdma", "qdma",
"hsi0-mac", "hsi1-mac", "hsi-mac",
"xfp-mac";
gdm1: ethernet@1 {
compatible = "airoha,eth-mac";
reg = <1>;
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <10000>;
full-duplex;
pause;
};
};
gdm2: ethernet@2 {
compatible = "airoha,eth-mac";
reg = <2>;
pcs = <&pon_pcs>;
status = "disabled";
};
gdm4: ethernet@4 {
compatible = "airoha,eth-mac";
reg = <4>;
pcs = <&eth_pcs>;
status = "disabled";
};
};
switch: switch@1fb58000 {

View File

@@ -1,52 +0,0 @@
/*
* Smart battery dts fragment for devices that use cros-ec-sbs
*
* Copyright (c) 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&i2c_tunnel {
battery: sbs-battery@b {
compatible = "sbs,sbs-battery";
reg = <0xb>;
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <1>;
};
};

View File

@@ -9,3 +9,7 @@
};
#include "en7523-u-boot.dtsi"
&gdm1 {
status = "okay";
};

View File

@@ -37,6 +37,19 @@
<&scu EN7523_HSI_MAC_RST>;
reset-names = "fe", "pdma", "qdma",
"hsi0-mac", "hsi1-mac", "hsi-mac";
gdm1: ethernet@1 {
compatible = "airoha,eth-mac";
reg = <1>;
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <10000>;
full-duplex;
pause;
};
};
};
switch: switch@1fb58000 {

View File

@@ -9,3 +9,21 @@
};
#include "an7581-u-boot.dtsi"
&gdm1 {
status = "okay";
};
&gdm2 {
status = "okay";
managed = "in-band-status";
phy-mode = "10gbase-r";
};
&gdm4 {
status = "okay";
managed = "in-band-status";
phy-mode = "usxgmii";
};

View File

@@ -17,7 +17,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -25,7 +25,7 @@
spi-max-frequency = <1000000>; /* input clock */
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -33,7 +33,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -48,7 +48,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -178,7 +178,7 @@
clocks = <&clockgen 4 0>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -26,29 +26,29 @@
bus-num = <0>;
status = "okay";
dflash0: sst25wf040b {
dflash0: sst25wf040b@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: en25s64 {
dflash1: en25s64@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: n25q128a {
dflash2: n25q128a@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -60,29 +60,29 @@
bus-num = <0>;
status = "okay";
dflash3: sst25wf040b {
dflash3: sst25wf040b@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: en25s64 {
dflash4: en25s64@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: n25q128a {
dflash5: n25q128a@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -94,10 +94,10 @@
bus-num = <0>;
status = "okay";
dflash8: en25s64 {
dflash8: en25s64@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -21,7 +21,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -41,7 +41,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -28,7 +28,7 @@
bus-num = <0>;
status = "okay";
dspiflash: n25q12a {
dspiflash: n25q12a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -54,7 +54,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -67,7 +67,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -306,7 +306,7 @@
clock-names = "ipg";
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -21,7 +21,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -41,7 +41,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -54,7 +54,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -67,7 +67,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -311,7 +311,7 @@
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*
*/
#include <config.h>
#include "fsl-ls1088a-qds-u-boot.dtsi"

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*
*/
#include <config.h>
#include "fsl-ls1088a-qds-u-boot.dtsi"

View File

@@ -144,7 +144,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -152,7 +152,7 @@
spi-max-frequency = <1000000>; /* input clock */
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -160,7 +160,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -18,11 +18,3 @@
ethernet9 = &dpmac1;
};
};
&i2c0 {
uc: board-controller@7e {
compatible = "traverse,ten64-controller";
reg = <0x7e>;
};
};

View File

@@ -1,388 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Traverse Technologies Ten64
* (LS1088A) board
* Based on fsl-ls1088a-rdb.dts
* Copyright 2017-2020 NXP
* Copyright 2019-2023 Traverse Technologies
*
* Author: Mathew McBride <matt@traverse.com.au>
*/
/dts-v1/;
#include "fsl-ls1088a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Traverse Ten64";
compatible = "traverse,ten64", "fsl,ls1088a";
aliases {
serial0 = &duart0;
serial1 = &duart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
buttons {
compatible = "gpio-keys";
/* Fired by system controller when
* external power off (e.g ATX Power Button)
* asserted
*/
button-powerdn {
label = "External Power Down";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
};
/* Rear Panel 'ADMIN' button (GPIO_H) */
button-admin {
label = "ADMIN button";
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
label = "ten64:green:sfp1:down";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
};
led-1 {
label = "ten64:green:sfp2:up";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
};
led-2 {
label = "ten64:admin";
gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
};
};
sfp_xg0: dpmac2-sfp {
compatible = "sff,sfp";
i2c-bus = <&sfplower_i2c>;
tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sfpgpio 2 GPIO_ACTIVE_LOW>;
los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
sfp_xg1: dpmac1-sfp {
compatible = "sff,sfp";
i2c-bus = <&sfpupper_i2c>;
tx-fault-gpios = <&sfpgpio 4 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&sfpgpio 5 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sfpgpio 6 GPIO_ACTIVE_LOW>;
los-gpios = <&sfpgpio 7 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
};
/* XG1 - Upper SFP */
&dpmac1 {
sfp = <&sfp_xg1>;
pcs-handle = <&pcs1>;
phy-connection-type = "10gbase-r";
managed = "in-band-status";
};
/* XG0 - Lower SFP */
&dpmac2 {
sfp = <&sfp_xg0>;
pcs-handle = <&pcs2>;
phy-connection-type = "10gbase-r";
managed = "in-band-status";
};
/* DPMAC3..6 is GE4 to GE8 */
&dpmac3 {
phy-handle = <&mdio1_phy5>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_0>;
};
&dpmac4 {
phy-handle = <&mdio1_phy6>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_1>;
};
&dpmac5 {
phy-handle = <&mdio1_phy7>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_2>;
};
&dpmac6 {
phy-handle = <&mdio1_phy8>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_3>;
};
/* DPMAC7..10 is GE0 to GE3 */
&dpmac7 {
phy-handle = <&mdio1_phy1>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_0>;
};
&dpmac8 {
phy-handle = <&mdio1_phy2>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_1>;
};
&dpmac9 {
phy-handle = <&mdio1_phy3>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_2>;
};
&dpmac10 {
phy-handle = <&mdio1_phy4>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_3>;
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&emdio1 {
status = "okay";
mdio1_phy5: ethernet-phy@c {
reg = <0xc>;
};
mdio1_phy6: ethernet-phy@d {
reg = <0xd>;
};
mdio1_phy7: ethernet-phy@e {
reg = <0xe>;
};
mdio1_phy8: ethernet-phy@f {
reg = <0xf>;
};
mdio1_phy1: ethernet-phy@1c {
reg = <0x1c>;
};
mdio1_phy2: ethernet-phy@1d {
reg = <0x1d>;
};
mdio1_phy3: ethernet-phy@1e {
reg = <0x1e>;
};
mdio1_phy4: ethernet-phy@1f {
reg = <0x1f>;
};
};
&esdhc {
status = "okay";
};
&i2c0 {
status = "okay";
sfpgpio: gpio@76 {
compatible = "ti,tca9539";
reg = <0x76>;
#gpio-cells = <2>;
gpio-controller;
admin_led_lower {
gpio-hog;
gpios = <13 GPIO_ACTIVE_HIGH>;
output-low;
};
};
at97sc: tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
};
&i2c2 {
status = "okay";
rx8035: rtc@32 {
compatible = "epson,rx8035";
reg = <0x32>;
};
};
&i2c3 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9540";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
sfpupper_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
sfplower_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
&pcs_mdio1 {
status = "okay";
};
&pcs_mdio2 {
status = "okay";
};
&pcs_mdio3 {
status = "okay";
};
&pcs_mdio7 {
status = "okay";
};
&qspi {
status = "okay";
en25s64: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0 0x100000>;
};
partition@100000 {
label = "bl3";
reg = <0x100000 0x200000>;
};
partition@300000 {
label = "mcfirmware";
reg = <0x300000 0x200000>;
};
partition@500000 {
label = "ubootenv";
reg = <0x500000 0x80000>;
};
partition@580000 {
label = "dpl";
reg = <0x580000 0x40000>;
};
partition@5C0000 {
label = "dpc";
reg = <0x5C0000 0x40000>;
};
partition@600000 {
label = "devicetree";
reg = <0x600000 0x40000>;
};
};
};
nand: flash@1 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <1>;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* reserved for future boot direct from NAND flash
* (this would use the same layout as the 8MiB NOR flash)
*/
partition@0 {
label = "nand-boot-reserved";
reg = <0 0x800000>;
};
/* recovery / install environment */
partition@800000 {
label = "recovery";
reg = <0x800000 0x2000000>;
};
/* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
partition@2800000 {
label = "ubia";
reg = <0x2800000 0x6C00000>;
};
/* ubib (second OpenWrt) */
partition@9400000 {
label = "ubib";
reg = <0x9400000 0x6C00000>;
};
};
};
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};

View File

@@ -55,9 +55,14 @@
&usb0 {
compatible = "fsl,layerscape-dwc3", "snps,dwc3";
status = "okay";
};
&usb1 {
compatible = "fsl,layerscape-dwc3", "snps,dwc3";
status = "okay";
};
&esdhc {
status = "okay";
};

View File

@@ -978,51 +978,61 @@
dpmac1: ethernet@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <1>;
status = "disabled";
};
dpmac2: ethernet@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <2>;
status = "disabled";
};
dpmac3: ethernet@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <3>;
status = "disabled";
};
dpmac4: ethernet@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <4>;
status = "disabled";
};
dpmac5: ethernet@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <5>;
status = "disabled";
};
dpmac6: ethernet@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <6>;
status = "disabled";
};
dpmac7: ethernet@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <7>;
status = "disabled";
};
dpmac8: ethernet@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <8>;
status = "disabled";
};
dpmac9: ethernet@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <9>;
status = "disabled";
};
dpmac10: ethernet@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
status = "disabled";
};
};
};

View File

@@ -31,7 +31,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -40,7 +40,7 @@
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -49,7 +49,7 @@
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -22,7 +22,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -118,7 +118,7 @@
interrupts = <0 35 0x4>; /* Level high type */
};
dspi: dspi@2100000 {
dspi: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -127,7 +127,7 @@
spi-num-chipselects = <6>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls2080a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -25,7 +25,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -113,7 +113,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -31,28 +31,28 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -64,28 +64,28 @@
bus-num = <0>;
status = "okay";
dflash3: n25q128a {
dflash3: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: sst25wf040b {
dflash4: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: en25s64 {
dflash5: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -97,28 +97,28 @@
bus-num = <0>;
status = "okay";
dflash6: n25q128a {
dflash6: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash7: sst25wf040b {
dflash7: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash8: en25s64 {
dflash8: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -134,7 +134,7 @@
<1 10 0x8>; /* Hypervisor PPI, active-low */
};
fspi: flexspi@20c0000 {
fspi: spi@20c0000 {
compatible = "nxp,lx2160a-fspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -221,7 +221,7 @@
status = "disabled";
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -230,7 +230,7 @@
spi-num-chipselects = <6>;
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -239,7 +239,7 @@
spi-num-chipselects = <6>;
};
dspi2: dspi@2120000 {
dspi2: spi@2120000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -41,28 +41,28 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -74,28 +74,28 @@
bus-num = <0>;
status = "okay";
dflash3: n25q128a {
dflash3: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: sst25wf040b {
dflash4: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: en25s64 {
dflash5: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -107,28 +107,28 @@
bus-num = <0>;
status = "okay";
dflash6: n25q128a {
dflash6: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash7: sst25wf040b {
dflash7: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash8: en25s64 {
dflash8: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -1,5 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/ {
leds {
user_led: user {
default-state = "on";
};
};
options {
u-boot {
compatible = "u-boot,config";
boot-led = <&user_led>;
};
};
};
&ssp0 {
non-removable;
};

View File

@@ -0,0 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Device Tree Source for TQ-Systems TQMa7D board on MBa7x carrier board.
*
* Copyright (C) 2024-2026 TQ-Systems GmbH <u-boot@ew.tq-group.com>,
* D-82229 Seefeld, Germany
* Author: Steffen Doster
*/
#include "imx7s-mba7-u-boot.dtsi"

View File

@@ -0,0 +1,48 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Device Tree Source for TQ-Systems TQMa7S board on MBa7x carrier board.
*
* Copyright (C) 2025-2026 TQ-Systems GmbH <u-boot@ew.tq-group.com>,
* D-82229 Seefeld, Germany
* Author: Steffen Doster
*/
#include "imx7s-tqma7-u-boot.dtsi"
/ {
config {
u-boot,mmc-env-offset = <0x100000>;
u-boot,mmc-env-offset-redundant = <0x110000>;
};
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog1>;
};
};
&gpio4 {
/* Deassert BOOT_EN after boot to separate BOOT_CFG circuits from LCD signals */
boot-en-hog {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-low;
};
};
&wdog1 {
u-boot,noautostart;
timeout-sec = <60>;
};
&iomuxc {
bootph-pre-ram;
};
&pinctrl_uart6 {
bootph-pre-ram;
};
&uart6 {
bootph-pre-ram;
};

View File

@@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Device Tree Source for TQ-Systems TQMa7S module.
*
* Copyright (C) 2024-2026 TQ-Systems GmbH <u-boot@ew.tq-group.com>,
* D-82229 Seefeld, Germany
* Author: Steffen Doster
*/
#include "imx7s-u-boot.dtsi"
&soc {
bootph-pre-ram;
};
&aips1 {
bootph-pre-ram;
};
&aips3 {
bootph-pre-ram;
};

View File

@@ -102,6 +102,26 @@
pinctrl-0 = <&pinctrl_gpio_keys>;
muxcgrp: imx8qxp-som {
pinctrl_fec2: fec2grp {
fsl,pins = <
SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0
SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0
SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0
SC_P_ENET0_MDC_CONN_ENET1_MDC 0x00000060
SC_P_ENET0_MDIO_CONN_ENET1_MDIO 0x00000060
SC_P_ESAI0_FSR_CONN_ENET1_RCLK50M_IN 0x00000060
SC_P_SPDIF0_RX_CONN_ENET1_RGMII_RXD0 0x00000060
SC_P_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1 0x00000060
SC_P_ESAI0_TX2_RX3_CONN_ENET1_RMII_RX_ER 0x00000060
SC_P_SPDIF0_TX_CONN_ENET1_RGMII_RX_CTL 0x00000060
SC_P_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0 0x00000060
SC_P_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1 0x00000060
SC_P_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL 0x00000060
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
SC_P_ESAI0_FST_LSIO_GPIO0_IO01 0x06000021
@@ -127,3 +147,27 @@
>;
};
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec2>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};

View File

@@ -63,41 +63,6 @@
SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021
SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041
SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021
SC_P_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x06000021
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
SC_P_ENET0_RGMII_RXC_CONN_USDHC1_CLK 0x06000041
SC_P_ENET0_RGMII_RX_CTL_CONN_USDHC1_CMD 0x00000021
SC_P_ENET0_RGMII_RXD0_CONN_USDHC1_DATA0 0x00000021
SC_P_ENET0_RGMII_RXD1_CONN_USDHC1_DATA1 0x00000021
SC_P_ENET0_RGMII_RXD2_CONN_USDHC1_DATA2 0x00000021
SC_P_ENET0_RGMII_RXD3_CONN_USDHC1_DATA3 0x00000021
SC_P_ENET0_RGMII_TXD2_CONN_USDHC1_CD_B 0x06000021
//SC_P_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x06000021
SC_P_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x06000021
>;
};
pinctrl_fec2: fec2grp {
fsl,pins = <
SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0
SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0
SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0
SC_P_ENET0_MDC_CONN_ENET1_MDC 0x00000060
SC_P_ENET0_MDIO_CONN_ENET1_MDIO 0x00000060
SC_P_ESAI0_FSR_CONN_ENET1_RCLK50M_IN 0x00000060
SC_P_SPDIF0_RX_CONN_ENET1_RGMII_RXD0 0x00000060
SC_P_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1 0x00000060
SC_P_ESAI0_TX2_RX3_CONN_ENET1_RMII_RX_ER 0x00000060
SC_P_SPDIF0_TX_CONN_ENET1_RGMII_RX_CTL 0x00000060
SC_P_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0 0x00000060
SC_P_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1 0x00000060
SC_P_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL 0x00000060 /* ERST: Reset pin */
>;
};
};
@@ -126,6 +91,7 @@
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
max-frequency = <52000000>;
clock-frequency=<52000000>;
no-1-8-v;
bus-width = <8>;
@@ -160,27 +126,3 @@
&fec1 {
status ="disabled";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec2>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};

View File

@@ -22,6 +22,18 @@
bootph-pre-ram;
};
&pca9450 {
bootph-all;
};
&pinctrl_i2c1 {
bootph-all;
};
&pinctrl_pmic {
bootph-all;
};
&pinctrl_uart2 {
bootph-pre-ram;
};
@@ -63,7 +75,7 @@
};
&i2c1 {
bootph-pre-ram;
bootph-all;
};
&i2c2 {
@@ -118,3 +130,7 @@
phy-reset-duration = <15>;
phy-reset-post-delay = <100>;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
bootph-all;
};

View File

@@ -33,6 +33,18 @@
};
};
&pinctrl_i2c1 {
bootph-all;
};
&pinctrl_pmic {
bootph-all;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
bootph-all;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
};
@@ -78,11 +90,11 @@
};
&i2c1 {
bootph-pre-ram;
bootph-all;
};
&pmic {
bootph-pre-ram;
bootph-all;
};
/* USB1 Type-C */
@@ -120,6 +132,12 @@
&usdhc2 {
bootph-pre-ram;
/*
* LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL
* when using SDHC controller VSELECT to control SD2_VSEL. So drop
* vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage.
*/
/delete-property/ vqmmc-supply;
};
&usdhc3 {

View File

@@ -34,6 +34,18 @@
};
};
&pinctrl_i2c1 {
bootph-all;
};
&pinctrl_pmic {
bootph-all;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
bootph-all;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
};
@@ -83,11 +95,11 @@
};
&i2c1 {
bootph-pre-ram;
bootph-all;
};
&pmic {
bootph-pre-ram;
bootph-all;
};
&usb_dwc3_0 {
@@ -96,6 +108,12 @@
&usdhc2 {
bootph-pre-ram;
/*
* LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL
* when using SDHC controller VSELECT to control SD2_VSEL. So drop
* vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage.
*/
/delete-property/ vqmmc-supply;
};
&usdhc3 {

View File

@@ -70,7 +70,7 @@
};
&i2c1 {
bootph-pre-ram;
bootph-all;
eeprom_module: eeprom@50 {
compatible = "i2c-eeprom";
@@ -104,7 +104,7 @@
};
&pca9450 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_ctrl_sleep_moci {
@@ -112,7 +112,11 @@
};
&pinctrl_i2c1 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_pmic {
bootph-all;
};
&pinctrl_usdhc2_pwr_en {
@@ -159,6 +163,12 @@
sd-uhs-ddr50;
sd-uhs-sdr104;
bootph-pre-ram;
/*
* LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL
* when using SDHC controller VSELECT to control SD2_VSEL. So drop
* vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage.
*/
/delete-property/ vqmmc-supply;
};
&usdhc3 {
@@ -173,3 +183,7 @@
&wdog1 {
bootph-pre-ram;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
bootph-all;
};

View File

@@ -2,19 +2,105 @@
#include "imx8mq-u-boot.dtsi"
&aips1 {
bootph-all;
};
&gpio2 {
bootph-pre-ram;
};
&pinctrl_i2c1 {
bootph-all;
};
&i2c1 {
bootph-all;
};
&soc {
bootph-all;
bootph-pre-ram;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@8} {
bootph-all;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators} {
bootph-all;
};
&pinctrl_uart1 {
bootph-pre-ram;
};
&uart1 {
bootph-pre-ram;
};
&usdhc1 {
bootph-pre-ram;
mmc-hs400-1_8v;
/delete-property/ vqmmc-supply;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
};
&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
};
&usdhc2 {
bootph-pre-ram;
sd-uhs-sdr104;
sd-uhs-ddr50;
};
&uart1 {
&pinctrl_usdhc2 {
bootph-pre-ram;
};
&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_gpio {
bootph-pre-ram;
};
&pinctrl_reg_usdhc2 {
bootph-pre-ram;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
};
#ifdef CONFIG_FSL_CAAM
&crypto {
bootph-pre-ram;
};
&sec_jr0 {
bootph-pre-ram;
};
&sec_jr1 {
bootph-pre-ram;
};
&sec_jr2 {
bootph-pre-ram;
};
#endif

View File

@@ -2,26 +2,90 @@
#include "imx8mq-u-boot.dtsi"
&aips1 {
bootph-all;
};
&gpio2 {
bootph-pre-ram;
};
&pinctrl_i2c1 {
bootph-all;
};
&i2c1 {
bootph-all;
};
&soc {
bootph-all;
bootph-pre-ram;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@8} {
bootph-all;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators} {
bootph-all;
};
&pinctrl_uart1 {
bootph-pre-ram;
};
&uart1 {
bootph-pre-ram;
};
&usdhc1 {
bootph-pre-ram;
mmc-hs400-1_8v;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
};
&usdhc2 {
bootph-pre-ram;
sd-uhs-sdr104;
sd-uhs-ddr50;
};
&pinctrl_usdhc2 {
bootph-pre-ram;
};
&pinctrl_usdhc2_gpio {
bootph-pre-ram;
};
&pinctrl_reg_usdhc2 {
bootph-pre-ram;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
};
&uart1 {
bootph-pre-ram;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
};
&uart2 {
bootph-pre-ram;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
};
&uart3 {
bootph-pre-ram;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
};

View File

@@ -10,7 +10,7 @@
bootph-pre-ram;
};
&binman_imx_spl {
&binman {
section {
signed-hdmi-imx8m {
filename = "signed_dp_imx8m.bin";

View File

@@ -2,7 +2,12 @@
#include "imx8mq-u-boot.dtsi"
&gpio2 {
bootph-pre-ram;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
u-boot,off-on-delay-us = <20000>;
};
@@ -13,3 +18,39 @@
&pinctrl_uart1 {
bootph-pre-ram;
};
&usdhc1 {
bootph-pre-ram;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
};
&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
};
&usdhc2 {
bootph-pre-ram;
};
&pinctrl_usdhc2 {
bootph-pre-ram;
};
&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_gpio {
bootph-pre-ram;
};

View File

@@ -41,6 +41,33 @@
filename = "flash.bin";
section {
pad-byte = <0x00>;
/*
* signed_hdmi_imx8m.bin contains a 1KB zero-filled padding at
* its beginning. This padding has no functional purpose, but
* the firmware is provided and signed by NXP, so the head
* must be preserved and should not be removed.
*
* When the signed HDMI firmware is placed at the beginning of
* flash.bin, the IVT header of u-boot-spl must still reside at
* a 4KB-aligned address. Since flash.bin starts with the HDMI
* firmware (including its 1KB padding), there is already a 1KB
* empty region at the head of flash.bin.
*
* The required 4KB alignment is therefore calculated relative
* to the location after this 1KB padding. To achieve this, we
* explicitly set align and align-size to 0x1000, and add an
* additional 0x400 (1KB) fill to account for the padding.
*/
signed-hdmi-imx8m {
filename = "signed_hdmi_imx8m.bin";
type = "blob-ext";
align = <0x1000>;
align-size = <0x1000>;
};
fill {
size = <0x400>;
};
#ifdef CONFIG_IMX_HAB
nxp-imx8mcst@0 {
@@ -51,145 +78,142 @@
#endif
binman_imx_spl: nxp-imx8mimage {
filename = "u-boot-spl-mkimage.bin";
nxp,boot-from = "sd";
nxp,rom-version = <1>;
nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
args; /* Needed by mkimage etype superclass */
section {
align = <4>;
align-size = <4>;
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
u-boot-spl {
align-end = <4>;
filename = "u-boot-spl.bin";
};
ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
signed-hdmi-imx8m {
filename = "signed_hdmi_imx8m.bin";
type = "blob-ext";
};
};
};
#ifdef CONFIG_IMX_HAB
};
nxp-imx8mcst@1 {
filename = "u-boot-fit.signed.bin";
nxp,loader-address = <CONFIG_SPL_LOAD_FIT_ADDRESS>;
offset = <0x58000>;
filename = "u-boot-spl-mkimage.bin";
nxp,boot-from = "sd";
nxp,rom-version = <1>;
nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
args; /* Needed by mkimage etype superclass */
#endif
binman_imx_fit: fit {
description = "Configuration to load ATF before U-Boot";
filename = "u-boot.itb";
#ifndef CONFIG_IMX_HAB
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
#endif
#address-cells = <1>;
section {
align = <4>;
align-size = <4>;
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
offset = <0x57c00>;
images {
uboot {
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {
filename = "u-boot-nodtb.bin";
type = "blob-ext";
};
};
#ifndef CONFIG_ARMV8_PSCI
atf {
arch = "arm64";
compression = "none";
description = "ARM Trusted Firmware";
entry = <0x910000>;
load = <0x910000>;
type = "firmware";
atf-blob {
filename = "bl31.bin";
type = "blob-ext";
};
};
#endif
tee: tee {
description = "OP-TEE";
type = "tee";
arch = "arm64";
compression = "none";
os = "tee";
load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>;
entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>;
tee-os {
filename = "tee.bin";
optional;
};
};
fdt {
compression = "none";
description = "NAME";
type = "flat_dt";
uboot-fdt-blob {
filename = "u-boot.dtb";
type = "blob-ext";
};
};
u-boot-spl {
align-end = <4>;
filename = "u-boot-spl.bin";
};
configurations {
default = "conf";
ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
conf {
description = "NAME";
fdt = "fdt";
firmware = "uboot";
#ifndef CONFIG_ARMV8_PSCI
loadables = "atf", "tee";
#endif
};
ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
};
};
#ifdef CONFIG_IMX_HAB
};
#endif
};
#ifdef CONFIG_IMX_HAB
nxp-imx8mcst@1 {
filename = "u-boot-fit.signed.bin";
nxp,loader-address = <CONFIG_SPL_LOAD_FIT_ADDRESS>;
offset = <0x58400>;
args; /* Needed by mkimage etype superclass */
#endif
binman_imx_fit: fit {
description = "Configuration to load ATF before U-Boot";
filename = "u-boot.itb";
#ifndef CONFIG_IMX_HAB
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
#endif
#address-cells = <1>;
offset = <0x58000>;
images {
uboot {
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {
filename = "u-boot-nodtb.bin";
type = "blob-ext";
};
};
#ifndef CONFIG_ARMV8_PSCI
atf {
arch = "arm64";
compression = "none";
description = "ARM Trusted Firmware";
entry = <0x910000>;
load = <0x910000>;
type = "firmware";
atf-blob {
filename = "bl31.bin";
type = "blob-ext";
};
};
#endif
tee: tee {
description = "OP-TEE";
type = "tee";
arch = "arm64";
compression = "none";
os = "tee";
load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>;
entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>;
tee-os {
filename = "tee.bin";
optional;
};
};
fdt {
compression = "none";
description = "NAME";
type = "flat_dt";
uboot-fdt-blob {
filename = "u-boot.dtb";
type = "blob-ext";
};
};
};
configurations {
default = "conf";
conf {
description = "NAME";
fdt = "fdt";
firmware = "uboot";
#ifndef CONFIG_ARMV8_PSCI
loadables = "atf", "tee";
#endif
};
};
};
#ifdef CONFIG_IMX_HAB
};
#endif
};

View File

@@ -0,0 +1,228 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2026 PHYTEC Messtechnik GmbH
* Author: Primoz Fiser <primoz.fiser@norik.com>
*
*/
/ {
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog3>;
bootph-pre-ram;
bootph-some-ram;
};
aliases {
ethernet0 = &fec;
ethernet1 = &eqos;
};
bootstd {
bootph-verify;
compatible = "u-boot,boot-std";
filename-prefixes = "/", "/boot/";
bootdev-order = "mmc0", "mmc1", "ethernet";
rauc {
compatible = "u-boot,distro-rauc";
};
script {
compatible = "u-boot,script";
};
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
};
&{/soc@0} {
bootph-all;
bootph-pre-ram;
};
&aips1 {
bootph-pre-ram;
bootph-all;
};
&aips2 {
bootph-pre-ram;
bootph-some-ram;
};
&aips3 {
bootph-pre-ram;
bootph-some-ram;
};
&iomuxc {
bootph-pre-ram;
bootph-some-ram;
};
&reg_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_lpi2c3 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_pmic {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_reg_usdhc2_vmmc {
bootph-pre-ram;
};
&pinctrl_uart1 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_cd {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_default {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
bootph-some-ram;
};
&gpio1 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio2 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio3 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio4 {
bootph-pre-ram;
bootph-some-ram;
};
&lpuart1 {
bootph-pre-ram;
bootph-some-ram;
};
&usdhc1 {
bootph-pre-ram;
bootph-some-ram;
};
&usdhc2 {
bootph-pre-ram;
bootph-some-ram;
fsl,signal-voltage-switch-extra-delay-ms = <8>;
};
&lpi2c1 {
bootph-pre-ram;
bootph-some-ram;
};
&lpi2c2 {
bootph-pre-ram;
bootph-some-ram;
};
&lpi2c3 {
bootph-pre-ram;
bootph-some-ram;
pmic@25 {
bootph-pre-ram;
bootph-some-ram;
regulators {
bootph-pre-ram;
bootph-some-ram;
};
};
eeprom@50 {
bootph-pre-ram;
bootph-some-ram;
};
};
&s4muap {
bootph-pre-ram;
bootph-some-ram;
status = "okay";
};
&clk {
bootph-all;
bootph-pre-ram;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-rates;
/delete-property/ assigned-clock-parents;
};
&osc_32k {
bootph-all;
bootph-pre-ram;
};
&osc_24m {
bootph-all;
bootph-pre-ram;
};
&clk_ext1 {
bootph-all;
bootph-pre-ram;
};
&wdog3 {
bootph-all;
bootph-pre-ram;
};

View File

@@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2026 PHYTEC Messtechnik GmbH
* Author: Primoz Fiser <primoz.fiser@norik.com>
*
*/
#include "imx91-u-boot.dtsi"
#include "imx91-93-phyboard-segin-common-u-boot.dtsi"
/ {
/*
* The phyCORE-i.MX91 u-boot uses the imx91-phyboard-segin.dts as
* reference, but does only make use of its SoM (phyCORE) contained
* periphery.
*/
model = "PHYTEC phyCORE-i.MX91";
};

View File

@@ -9,6 +9,7 @@
*/
#include "imx93-u-boot.dtsi"
#include "imx91-93-phyboard-segin-common-u-boot.dtsi"
/ {
/*
@@ -17,224 +18,4 @@
* periphery.
*/
model = "PHYTEC phyCORE-i.MX93";
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdog3>;
bootph-pre-ram;
bootph-some-ram;
};
aliases {
ethernet0 = &fec;
ethernet1 = &eqos;
};
bootstd {
bootph-verify;
compatible = "u-boot,boot-std";
filename-prefixes = "/", "/boot/";
bootdev-order = "mmc0", "mmc1", "ethernet";
rauc {
compatible = "u-boot,distro-rauc";
};
script {
compatible = "u-boot,script";
};
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
};
&{/soc@0} {
bootph-all;
bootph-pre-ram;
};
&aips1 {
bootph-pre-ram;
bootph-all;
};
&aips2 {
bootph-pre-ram;
bootph-some-ram;
};
&aips3 {
bootph-pre-ram;
bootph-some-ram;
};
&iomuxc {
bootph-pre-ram;
bootph-some-ram;
};
&reg_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_lpi2c3 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_pmic {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_reg_usdhc2_vmmc {
bootph-pre-ram;
};
&pinctrl_uart1 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_cd {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_default {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
bootph-some-ram;
};
&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
bootph-some-ram;
};
&gpio1 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio2 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio3 {
bootph-pre-ram;
bootph-some-ram;
};
&gpio4 {
bootph-pre-ram;
bootph-some-ram;
};
&lpuart1 {
bootph-pre-ram;
bootph-some-ram;
};
&usdhc1 {
bootph-pre-ram;
bootph-some-ram;
};
&usdhc2 {
bootph-pre-ram;
bootph-some-ram;
fsl,signal-voltage-switch-extra-delay-ms = <8>;
};
&lpi2c1 {
bootph-pre-ram;
bootph-some-ram;
};
&lpi2c2 {
bootph-pre-ram;
bootph-some-ram;
};
&lpi2c3 {
bootph-pre-ram;
bootph-some-ram;
pmic@25 {
bootph-pre-ram;
bootph-some-ram;
regulators {
bootph-pre-ram;
bootph-some-ram;
};
};
eeprom@50 {
bootph-pre-ram;
bootph-some-ram;
};
};
&s4muap {
bootph-pre-ram;
bootph-some-ram;
status = "okay";
};
&clk {
bootph-all;
bootph-pre-ram;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-rates;
/delete-property/ assigned-clock-parents;
};
&osc_32k {
bootph-all;
bootph-pre-ram;
};
&osc_24m {
bootph-all;
bootph-pre-ram;
};
&clk_ext1 {
bootph-all;
bootph-pre-ram;
};
&wdog3 {
bootph-all;
bootph-pre-ram;
};

View File

@@ -157,6 +157,24 @@
status = "disabled";
};
&xspi1 {
bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_xspi1>;
status = "okay";
mt35xu512aba: flash@0 {
bootph-pre-ram;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <200000000>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
};
};
&scmi_iomuxc {
pinctrl_emdio: emdiogrp {
fsl,pins = <
@@ -205,6 +223,22 @@
IMX94_PAD_GPIO_IO17__LPI2C3_SCL 0x40000b9e
>;
};
pinctrl_xspi1: xspi1grp {
fsl,pins = <
IMX94_PAD_XSPI1_SCLK__XSPI1_A_SCLK 0x3fe
IMX94_PAD_XSPI1_SS0_B__XSPI1_A_SS0_B 0x3fe
IMX94_PAD_XSPI1_DATA0__XSPI1_A_DATA0 0x3fe
IMX94_PAD_XSPI1_DATA1__XSPI1_A_DATA1 0x3fe
IMX94_PAD_XSPI1_DATA2__XSPI1_A_DATA2 0x3fe
IMX94_PAD_XSPI1_DATA3__XSPI1_A_DATA3 0x3fe
IMX94_PAD_XSPI1_DATA4__XSPI1_A_DATA4 0x3fe
IMX94_PAD_XSPI1_DATA5__XSPI1_A_DATA5 0x3fe
IMX94_PAD_XSPI1_DATA6__XSPI1_A_DATA6 0x3fe
IMX94_PAD_XSPI1_DATA7__XSPI1_A_DATA7 0x3fe
IMX94_PAD_XSPI1_DQS__XSPI1_A_DQS 0x3fe
>;
};
};
&pinctrl_reg_usdhc2_vmmc {

View File

@@ -141,6 +141,22 @@
&aips3 {
bootph-all;
xspi1: spi@42b90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nxp,imx94-xspi";
reg = <0x42b90000 0x50000>, <0x28000000 0x08000000>;
reg-names = "xspi_base", "xspi_mmap";
interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, // EENV0
<GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, // EENV1
<GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, // EENV2
<GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, // EENV3
<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>; // EENV4
clocks = <&scmi_clk IMX94_CLK_XSPI1>;
clock-names = "xspi";
status = "disabled";
};
};
&clk_ext1 {
@@ -323,12 +339,6 @@
};
};
netc_timer0: ethernet@0,1 {
compatible = "pci1131,ee02";
reg = <0x100 0 0 0 0>;
status = "disabled";
};
netc_switch: ethernet-switch@0,2 {
compatible = "pci1131,eef2", "nxp,imx943-netc-switch";
reg = <0x200 0 0 0 0>;
@@ -392,12 +402,6 @@
status = "disabled";
};
netc_timer1: ethernet@0,1 {
compatible = "pci1131,ee02";
reg = <0x10100 0 0 0 0>;
status = "disabled";
};
enetc1: ethernet@8,0 {
compatible = "pci1131,e101";
reg = <0x14000 0 0 0 0>;
@@ -410,12 +414,6 @@
status = "disabled";
};
netc_timer2: ethernet@10,1 {
compatible = "pci1131,ee02";
reg = <0x18100 0 0 0 0>;
status = "disabled";
};
netc_emdio: mdio@18,0 {
compatible = "pci1131,ee00";
reg = <0x1c000 0 0 0 0>;

View File

@@ -0,0 +1,239 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) Toradex
*
* Common dtsi for Verdin iMX95 SoM on development carrier board
*
* https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
*/
/ {
aliases {
eeprom1 = &carrier_eeprom;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&codec_dai>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "verdin-nau8822";
simple-audio-card,routing =
"Headphones", "LHP",
"Headphones", "RHP",
"Speaker", "LSPK",
"Speaker", "RSPK",
"Line Out", "AUXOUT1",
"Line Out", "AUXOUT2",
"LAUX", "Line In",
"RAUX", "Line In",
"LMICP", "Mic In",
"RMICP", "Mic In";
simple-audio-card,widgets =
"Headphones", "Headphones",
"Line Out", "Line Out",
"Speaker", "Speaker",
"Microphone", "Mic In",
"Line", "Line In";
codec_dai: simple-audio-card,codec {
clocks = <&scmi_clk IMX95_CLK_SAI3>;
sound-dai = <&nau8822_1a>;
};
simple-audio-card,cpu {
sound-dai = <&sai3>;
};
};
};
/* Verdin ADC_1, ADC_2, ADC_3 and ADC_4 */
&adc1 {
status = "okay";
};
/* Verdin ETH_1 (On-module PHY) */
&enetc_port0 {
status = "okay";
};
/* Verdin ETH_2_RGMII */
&enetc_port1 {
phy-handle = <&ethphy2>;
phy-mode = "rgmii-id";
status = "okay";
};
/* Verdin QSPI_1 */
&flexspi1 {
status = "okay";
};
&gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1>,
<&pinctrl_gpio2>,
<&pinctrl_gpio3>;
};
&gpio3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio6>;
};
&gpio4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio5>;
};
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio4>;
};
/* Verdin I2C_3_HDMI */
&i3c2 {
status = "okay";
};
/* Verdin I2C_2_DSI */
&lpi2c3 {
status = "okay";
};
/* Verdin I2C_1 */
&lpi2c4 {
status = "okay";
nau8822_1a: audio-codec@1a {
compatible = "nuvoton,nau8822";
reg = <0x1a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3_mclk>;
#sound-dai-cells = <0>;
};
carrier_gpio_expander: gpio@21 {
compatible = "nxp,pcal6416";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
};
/* Current measurement into module VCC */
hwmon@40 {
compatible = "ti,ina219";
reg = <0x40>;
shunt-resistor = <10000>;
};
temperature-sensor@4f {
compatible = "ti,tmp75c";
reg = <0x4f>;
};
carrier_eeprom: eeprom@57 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x57>;
pagesize = <16>;
};
};
/* Verdin I2C_4_CSI */
&lpi2c5 {
status = "okay";
};
/* Verdin UART_3, used as the Linux console */
&lpuart1 {
status = "okay";
};
/* Verdin UART_4 */
&lpuart2 {
status = "okay";
};
/* Verdin UART_1, connector X50 through RS485 transceiver */
&lpuart7 {
rs485-rts-active-low;
rs485-rx-during-tx;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
/* Verdin UART_2 */
&lpuart8 {
status = "okay";
};
&netc_emdio {
ethphy2: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth2_rgmii_int>;
interrupt-parent = <&gpio1>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <0>;
};
};
/* Verdin PCIE_1 */
&pcie0 {
status = "okay";
};
/* Verdin I2S_1 */
&sai3 {
status = "okay";
};
/* Verdin PWM_1 */
&tpm4 {
status = "okay";
};
/* Verdin PWM_2 */
&tpm5 {
status = "okay";
};
/* Verdin PWM_3_DSI */
&tpm6 {
status = "okay";
};
/* Verdin USB_1 */
&usb2 {
status = "okay";
};
/* Verdin USB_2 */
&usb3 {
fsl,permanently-attached;
status = "okay";
};
&usb3_phy {
status = "okay";
};
/* Verdin SD_1 */
&usdhc2 {
status = "okay";
};
/* Verdin CTRL_WAKE1_MICO# */
&verdin_gpio_keys {
status = "okay";
};

View File

@@ -0,0 +1,112 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) Toradex */
#include "imx95-u-boot.dtsi"
/ {
sysinfo {
compatible = "toradex,sysinfo";
};
};
&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-imem} {
filename = "lpddr4x_imem_v202409.bin";
};
&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-dmem} {
filename = "lpddr4x_dmem_v202409.bin";
};
&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-imem-qb} {
filename = "lpddr4x_imem_qb_v202409.bin";
};
&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-dmem-qb} {
filename = "lpddr4x_dmem_qb_v202409.bin";
};
&gpio1 {
reg = <0 0x47400000 0 0x1000>, <0 0x47400000 0 0x40>;
bootph-pre-ram;
ctrl-sleep-moci-hog {
bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
gpio-hog;
/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
gpios = <14 GPIO_ACTIVE_HIGH>;
line-name = "CTRL_SLEEP_MOCI#";
output-high;
};
};
&som_gpio_expander {
bootph-pre-ram;
};
&lpi2c2 {
bootph-pre-ram;
};
&lpuart1 {
clocks = <&scmi_clk IMX95_CLK_LPUART1>, <&scmi_clk IMX95_CLK_LPUART1>;
clock-names = "ipg", "per";
bootph-pre-ram;
};
&pinctrl_ctrl_sleep_moci {
bootph-pre-ram;
};
&pinctrl_io_exp_int {
bootph-pre-ram;
};
&pinctrl_lpi2c2 {
bootph-pre-ram;
};
&pinctrl_lpi2c2_gpio {
bootph-pre-ram;
};
&pinctrl_uart1 {
bootph-pre-ram;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
};
&som_gpio_expander {
bootph-pre-ram;
};
&usb2 {
/delete-property/power-domains;
};
&usb3 {
status = "disabled";
};
&usb3_dwc3 {
status = "disabled";
};
&usb_recov_ctrl {
bootph-pre-ram;
};
&usdhc1 {
bootph-pre-ram;
};
&wdog3 {
status = "disabled";
};

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) Toradex
*
* https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
*/
/dts-v1/;
#include "imx95-verdin.dtsi"
#include "imx95-verdin-wifi.dtsi"
#include "imx95-verdin-dev.dtsi"
/ {
model = "Toradex Verdin iMX95 WB on Verdin Development Board";
compatible = "toradex,verdin-imx95-wifi-dev",
"toradex,verdin-imx95-wifi",
"toradex,verdin-imx95",
"fsl,imx95";
};

View File

@@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) Toradex
*
* Common dtsi for Verdin iMX95 SoM WB variant
*
* https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95
*/
/ {
reg_wifi_en: regulator-wifi-en {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_pwr_en>;
/* PMIC_EN_WIFI */
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "PDn_MAYA-W260";
startup-delay-us = <2000>;
};
};
/* On-module Bluetooth */
&lpuart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_bt_uart>;
uart-has-rtscts;
status = "okay";
som_bt: bluetooth {
compatible = "nxp,88w8987-bt";
fw-init-baudrate = <3000000>;
};
};
/* On-module Wi-Fi */
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
keep-power-in-suspend;
non-removable;
vmmc-supply = <&reg_wifi_en>;
status = "okay";
};

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2026 NXP
*/
#include "imx952-u-boot.dtsi"
&wdog3 {
status = "disabled";
};

View File

@@ -0,0 +1,290 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2026 NXP
*/
/ {
binman {
multiple-images;
m33-oei-ddrfw {
pad-byte = <0x00>;
align-size = <0x8>;
filename = "m33-oei-ddrfw.bin";
oei-m33-ddr {
align-size = <0x4>;
filename = "oei-m33-ddr.bin";
type = "blob-ext";
};
imx-lpddr {
type = "nxp-header-ddrfw";
imx-lpddr-imem {
filename = "lpddr4x_imem_v202409.bin";
type = "blob-ext";
};
imx-lpddr-dmem {
filename = "lpddr4x_dmem_v202409.bin";
type = "blob-ext";
};
};
imx-lpddr-qb {
type = "nxp-header-ddrfw";
imx-lpddr-imem-qb {
filename = "lpddr4x_imem_qb_v202409.bin";
type = "blob-ext";
};
imx-lpddr-dmem-qb {
filename = "lpddr4x_dmem_qb_v202409.bin";
type = "blob-ext";
};
};
};
imx-boot {
filename = "flash.bin";
pad-byte = <0x00>;
spl {
type = "nxp-imx9image";
cfg-path = "spl/u-boot-spl.cfgout";
args;
cntr-version = <2>;
boot-from = "sd";
soc-type = "IMX9";
append = "mx952a0-ahab-container.img";
container;
dummy-ddr;
image0 = "oei", "m33-oei-ddrfw.bin", "0x1ffc0000";
hold = <0x10000>;
image1 = "m33", "m33_image.bin", "0x1ffc0000";
image2 = "a55", "spl/u-boot-spl.bin", "0x20480000";
dummy-v2x = <0x8b000000>;
};
u-boot {
type = "nxp-imx9image";
cfg-path = "u-boot-container.cfgout";
args;
cntr-version = <2>;
boot-from = "sd";
soc-type = "IMX9";
container;
image0 = "a55", "bl31.bin", "0x8a200000";
image1 = "a55", "u-boot.bin", "0x90200000";
};
};
};
chosen {
bootargs = "console=ttyLP0,115200 earlycon";
};
};
&A55_0 {
clocks = <&scmi_clk IMX952_CLK_ARMPLL_PFD0>;
/delete-property/ power-domains;
};
&A55_1 {
clocks = <&scmi_clk IMX952_CLK_ARMPLL_PFD0>;
/delete-property/ power-domains;
};
&A55_2 {
clocks = <&scmi_clk IMX952_CLK_ARMPLL_PFD0>;
/delete-property/ power-domains;
};
&A55_3 {
clocks = <&scmi_clk IMX952_CLK_ARMPLL_PFD0>;
/delete-property/ power-domains;
};
&aips1 {
bootph-all;
};
&aips2 {
bootph-all;
};
&aips3 {
bootph-all;
};
&clk_ext1 {
bootph-all;
};
&clk_dummy {
bootph-all;
};
&clk_osc_24m {
bootph-all;
};
&elemu1 {
status = "okay";
bootph-all;
};
&elemu3 {
status = "okay";
bootph-all;
};
&{/firmware} {
bootph-all;
};
&{/firmware/scmi} {
bootph-all;
};
&{/firmware/scmi/protocol@11} {
bootph-all;
};
&{/firmware/scmi/protocol@13} {
bootph-all;
};
&{/firmware/scmi/protocol@14} {
bootph-all;
};
&{/firmware/scmi/protocol@15} {
bootph-all;
};
&{/firmware/scmi/protocol@19} {
bootph-all;
};
&gpio1 {
reg = <0 0x47400000 0 0x1000>, <0 0x47400040 0 0x40>;
};
&gpio2 {
reg = <0 0x43810000 0 0x1000>, <0 0x43810040 0 0x40>;
bootph-pre-ram;
/*
* Use one SPL/U-Boot for mx952evk and mx952evkrpmsg, since GPIO2
* is assigned to M7, disable gpio2 here
*/
status = "disabled";
};
&gpio3 {
reg = <0 0x43820000 0 0x1000>, <0 0x43820040 0 0x40>;
bootph-pre-ram;
};
&gpio4 {
reg = <0 0x43840000 0 0x1000>, <0 0x43840040 0 0x40>;
bootph-pre-ram;
};
&gpio5 {
reg = <0 0x43850000 0 0x1000>, <0 0x43850040 0 0x40>;
bootph-pre-ram;
};
&lpuart1 {
bootph-pre-ram;
};
&mu2 {
bootph-all;
};
&reg_usdhc2_vmmc {
bootph-pre-ram;
};
&scmi_buf0 {
reg = <0x0 0x400>;
bootph-all;
};
&scmi_buf1 {
bootph-all;
};
&{/soc} {
bootph-all;
};
&sram0 {
bootph-all;
};
&usdhc1 {
bootph-pre-ram;
};
&usdhc2 {
bootph-pre-ram;
};
&scmi_iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
bootph-pre-ram;
fsl,pins = <
IMX952_PAD_XSPI1_SS1_B__WAKEUPMIX_TOP_GPIO5_IO_11 0x3fe
IMX952_PAD_GPIO_IO12__WAKEUPMIX_TOP_TPM3_CH2 0x51e
IMX952_PAD_CCM_CLKO1__WAKEUPMIX_TOP_GPIO3_IO_26 0x3fe
IMX952_PAD_CCM_CLKO2__WAKEUPMIX_TOP_GPIO3_IO_27 0x3fe
>;
};
};
&pinctrl_uart1 {
bootph-pre-ram;
};
&pinctrl_usdhc1 {
bootph-pre-ram;
};
&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2 {
bootph-pre-ram;
};
&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
};
&pinctrl_usdhc2_gpio {
bootph-pre-ram;
};
&pinctrl_reg_usdhc2_vmmc {
bootph-pre-ram;
};

View File

@@ -21,11 +21,6 @@
};
};
&a53_0 {
clock-names = "gtc";
clocks = <&k3_clks 61 0>;
};
&main_pktdma {
ti,sci = <&dm_tifs>;
};

View File

@@ -7,6 +7,10 @@
#ifdef CONFIG_TARGET_AM625_R5_EVM
&rcfg_yaml_tifs {
config = "tifs-rm-cfg.yaml";
};
&binman {
tiboot3-am62x-hs-evm.bin {
filename = "tiboot3-am62x-hs-evm.bin";

View File

@@ -24,7 +24,6 @@
};
&a53_0 {
clocks = <&k3_clks 61 0>;
/*
* FIXME: Currently only the SPL running on the R5 has a clock
* driver. As a workaround therefore move the assigned-clock

View File

@@ -22,11 +22,6 @@
};
};
&a53_0 {
clocks = <&k3_clks 61 0>;
clock-names = "gtc";
};
&cbass_main {
bootph-pre-ram;
sa3_secproxy: secproxy@44880000 {

View File

@@ -11,10 +11,6 @@
config = "board/ti/am62ax/board-cfg.yaml";
};
&rcfg_yaml {
config = "board/ti/am62ax/rm-cfg.yaml";
};
&scfg_yaml {
config = "board/ti/am62ax/sec-cfg.yaml";
};
@@ -35,18 +31,10 @@
config = "board/ti/am62ax/pm-cfg.yaml";
};
&rcfg_yaml_tifs {
config = "board/ti/am62ax/tifs-rm-cfg.yaml";
};
&pcfg_yaml_dm {
config = "board/ti/am62ax/pm-cfg.yaml";
};
&rcfg_yaml_dm {
config = "board/ti/am62ax/rm-cfg.yaml";
};
&bcfg_yaml_sysfw {
config = "board/ti/am62ax/board-cfg.yaml";
};
@@ -59,10 +47,6 @@
config = "board/ti/am62ax/pm-cfg.yaml";
};
&rcfg_yaml_sysfw {
config = "board/ti/am62ax/rm-cfg.yaml";
};
#endif
#ifdef CONFIG_TARGET_AM62D2_A53_EVM

View File

@@ -73,3 +73,21 @@
clock-frequency = <25000000>;
bootph-pre-ram;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
&main_pktdma {
ti,sci = <&dm_tifs>;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};

View File

@@ -7,6 +7,10 @@
#if IS_ENABLED(CONFIG_TARGET_AM62P5_R5_EVM)
&rcfg_yaml_tifs {
config = "tifs-rm-cfg.yaml";
};
&binman {
tiboot3-am62px-hs-fs-evm.bin {
filename = "tiboot3-am62px-hs-fs-evm.bin";

View File

@@ -21,8 +21,3 @@
ethernet0 = &cpsw3g;
};
};
&a53_0 {
clock-names = "gtc";
clocks = <&k3_clks 61 0>;
};

View File

@@ -14,6 +14,15 @@
#include "k3-am68-phyboard-izar-u-boot.dtsi"
#include "k3-j721s2-r5.dtsi"
&pmic {
bootph-pre-ram;
esm: esm {
compatible = "ti,tps659413-esm";
bootph-pre-ram;
};
};
&wkup_vtm0 {
bootph-pre-ram;
vdd-supply-2 = <&vdd_cpu_avs>;

View File

@@ -3,7 +3,7 @@
* Copyright (C) 2025 Toradex - https://www.toradex.com/
*/
#define SPL_BOARD_DTB "spl/dts/k3-am69-aquila-dev.dtb"
#define SPL_BOARD_DTB "spl/dts/ti/k3-am69-aquila-dev.dtb"
#define BOARD_DESCRIPTION "k3-am69-aquila"
#define UBOOT_BOARD_DESCRIPTION "U-Boot for AM69 Aquila board"
@@ -12,6 +12,11 @@
#if defined(CONFIG_CPU_V7R)
&binman {
tiboot3_am69_gp {
insert-template = <&tiboot3_j784s4_gp>;
filename = "tiboot3-am69-gp-aquila.bin";
};
tiboot3-am69-hs {
insert-template = <&tiboot3_j784s4_hs>;
filename = "tiboot3-am69-hs-aquila.bin";
@@ -28,6 +33,10 @@
filename = "ti-sysfw/ti-fs-firmware-j784s4-hs-enc.bin";
};
&ti_fs_gp {
filename = "ti-sysfw/ti-fs-firmware-j784s4-gp.bin";
};
&sysfw_inner_cert {
filename = "ti-sysfw/ti-fs-firmware-j784s4-hs-cert.bin";
};
@@ -78,6 +87,72 @@
u-boot-unsigned {
insert-template = <&u_boot_unsigned>;
};
firmware-aquila-am69-gp.bin {
filename = "firmware-aquila-am69-gp.bin";
blob-ext@1 {
filename = "tiboot3-am69-gp-aquila.bin";
};
blob-ext@2 {
filename = "tispl.bin_unsigned";
/*
* This value matches CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
* from R5 SPL config.
*/
offset = <0x80000>;
};
blob-ext@3 {
filename = "u-boot.img_unsigned";
offset = <(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)>;
};
};
firmware-aquila-am69-hs.bin {
filename = "firmware-aquila-am69-hs.bin";
blob-ext@1 {
filename = "tiboot3-am69-hs-aquila.bin";
};
blob-ext@2 {
filename = "tispl.bin";
/*
* This value matches CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
* from R5 SPL config.
*/
offset = <0x80000>;
};
blob-ext@3 {
filename = "u-boot.img";
offset = <(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)>;
};
};
firmware-aquila-am69-hs-fs.bin {
filename = "firmware-aquila-am69-hs-fs.bin";
blob-ext@1 {
filename = "tiboot3-am69-hs-fs-aquila.bin";
};
blob-ext@2 {
filename = "tispl.bin";
/*
* This value matches CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
* from R5 SPL config.
*/
offset = <0x80000>;
};
blob-ext@3 {
filename = "u-boot.img";
offset = <(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)>;
};
};
};
#endif

View File

@@ -477,7 +477,7 @@
FWPERM_SECURE_PRIV_RWCD |
FWPERM_SECURE_USER_RWCD)>;
start_address = <0x0 CONFIG_K3_ATF_LOAD_ADDR>;
end_address = <0x0 (CONFIG_K3_ATF_LOAD_ADDR + 0x1ffff)>;
end_address = <0x0 (CONFIG_K3_ATF_LOAD_ADDR + CONFIG_K3_ATF_RESERVED_SIZE - 1)>;
};
firewall_armv8_optee_fg: template-8 {
control = <(FWCTRL_EN | FWCTRL_LOCK |
@@ -486,7 +486,7 @@
FWPERM_SECURE_PRIV_RWCD |
FWPERM_SECURE_USER_RWCD)>;
start_address = <0x0 CONFIG_K3_OPTEE_LOAD_ADDR>;
end_address = <0x0 (CONFIG_K3_OPTEE_LOAD_ADDR + 0x17fffff)>;
end_address = <0x0 (CONFIG_K3_OPTEE_LOAD_ADDR + CONFIG_K3_OPTEE_RESERVED_SIZE - 1)>;
};
ti_falcon_template: template-9 {

View File

@@ -107,10 +107,6 @@
};
};
&ospi1 {
status = "disabled";
};
&usbss0 {
bootph-all;
};

View File

@@ -90,6 +90,11 @@
<0x0 0x50000000 0x0 0x8000000>;
};
&ospi1 {
reg = <0x0 0x47050000 0x0 0x100>,
<0x0 0x58000000 0x0 0x8000000>;
};
&fss {
/* fss node has 64 bit address regions mapped to it and since the ospi
* nodes is being override, override the fss node ranges as well

View File

@@ -173,7 +173,7 @@
status = "okay";
flash@0 {
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};

View File

@@ -205,7 +205,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -218,7 +218,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -231,7 +231,7 @@
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -37,7 +37,7 @@
};
};
snfi: snfi@1100d000 {
snfi: spi@1100d000 {
compatible = "mediatek,mtk-snfi-spi";
reg = <0x1100d000 0x2000>;
clocks = <&pericfg CLK_PERI_NFI_PD>,
@@ -53,7 +53,7 @@
#size-cells = <0>;
};
snor: snor@11014000 {
snor: spi@11014000 {
compatible = "mediatek,mtk-snor";
reg = <0x11014000 0x1000>;
clocks = <&pericfg CLK_PERI_FLASH_PD>,
@@ -86,7 +86,7 @@
clock-names = "system-clk";
};
infracfg: infracfg@10000000 {
infracfg: clock-controller@10000000 {
compatible = "mediatek,mt7622-infracfg",
"syscon";
reg = <0x10000000 0x1000>;
@@ -94,13 +94,13 @@
#reset-cells = <1>;
};
pericfg: pericfg@10002000 {
pericfg: clock-controller@10002000 {
compatible = "mediatek,mt7622-pericfg", "syscon";
reg = <0x10002000 0x1000>;
#clock-cells = <1>;
};
scpsys: scpsys@10006000 {
scpsys: power-controller@10006000 {
compatible = "mediatek,mt7622-scpsys",
"syscon";
#power-domain-cells = <1>;
@@ -122,13 +122,13 @@
interrupt-parent = <&gic>;
};
apmixedsys: apmixedsys@10209000 {
apmixedsys: clock-controller@10209000 {
compatible = "mediatek,mt7622-apmixedsys";
reg = <0x10209000 0x1000>;
#clock-cells = <1>;
};
topckgen: topckgen@10210000 {
topckgen: clock-controller@10210000 {
compatible = "mediatek,mt7622-topckgen";
reg = <0x10210000 0x1000>;
#clock-cells = <1>;
@@ -198,7 +198,7 @@
status = "disabled";
};
ssusbsys: ssusbsys@1a000000 {
ssusbsys: clock-controller@1a000000 {
compatible = "mediatek,mt7622-ssusbsys",
"syscon";
reg = <0x1a000000 0x1000>;
@@ -206,7 +206,7 @@
#reset-cells = <1>;
};
pciesys: pciesys@1a100800 {
pciesys: clock-controller@1a100800 {
compatible = "mediatek,mt7622-pciesys", "syscon";
reg = <0x1a100800 0x1000>;
#clock-cells = <1>;
@@ -364,7 +364,7 @@
};
};
ethsys: syscon@1b000000 {
ethsys: clock-controller@1b000000 {
compatible = "mediatek,mt7622-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
#clock-cells = <1>;
@@ -399,7 +399,7 @@
status = "disabled";
};
sgmiisys: sgmiisys@1b128000 {
sgmiisys: syscon@1b128000 {
compatible = "mediatek,mt7622-sgmiisys", "syscon";
reg = <0x1b128000 0x3000>;
#clock-cells = <1>;
@@ -424,7 +424,7 @@
status = "disabled";
};
soft_i2c: soft_i2c@0 {
soft_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";

File diff suppressed because it is too large Load Diff

655
arch/arm/dts/mt8189.dtsi Normal file
View File

@@ -0,0 +1,655 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2026 MediaTek Inc.
* Author: Macpaul Lin <macpaul.lin@mediatek.com>
*/
#include <dt-bindings/clock/mediatek,mt8189-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/reset/ti-syscon.h>
/ {
compatible = "mediatek,mt8189";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart0;
};
clk26m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
clock-output-names = "clk26m";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x000>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x100>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x200>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x300>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu4: cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x400>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu5: cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x500>;
enable-method = "psci";
capacity-dmips-mhz = <282>;
};
cpu6: cpu@600 {
device_type = "cpu";
compatible = "arm,cortex-a78";
reg = <0x600>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
};
cpu7: cpu@700 {
device_type = "cpu";
compatible = "arm,cortex-a78";
reg = <0x700>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
};
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
core4 {
cpu = <&cpu4>;
};
core5 {
cpu = <&cpu5>;
};
core6 {
cpu = <&cpu6>;
};
core7 {
cpu = <&cpu7>;
};
};
};
};
memory: memory@40000000 {
device_type = "memory";
/* This memory size is filled in by the bootloader */
reg = <0 0x40000000 0 0>;
};
soc {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges;
watchdog: watchdog@1c00a000 {
compatible = "mediatek,mt8391-wdt",
"mediatek,wdt";
reg = <0 0x1c00a000 0 0x100>;
status = "disabled";
};
gic: interrupt-controller@c000000 {
compatible = "arm,gic-v3";
reg = <0 0xc000000 0 0x40000>, /* distributor */
<0 0xc040000 0 0x200000>; /* redistributor */
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-controller;
#interrupt-cells = <4>;
#redistributor-regions = <1>;
ppi-partitions {
ppi_cluster0: interrupt-partition-0 {
affinity = <&cpu0 &cpu1 &cpu2 &cpu3 &cpu4 &cpu5>;
};
ppi_cluster1: interrupt-partition-1 {
affinity = <&cpu6 &cpu7>;
};
};
};
uart0: serial@11001000 {
compatible = "mediatek,mt8189-uart", "mediatek,mt6577-uart";
reg = <0 0x11001000 0 0x1000>;
interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>, <&pericfg_ao_clk CLK_PERAO_UART0>;
clock-names = "baud", "bus";
status = "disabled";
};
nor_flash: spi@11018000 {
compatible = "mediatek,mt8189-nor","mediatek,mt8186-nor";
reg = <0 0x11018000 0 0x1000>;
clocks = <&topckgen_clk CLK_TOP_SFLASH_SEL>,
<&pericfg_ao_clk CLK_PERAO_SFLASH>,
<&pericfg_ao_clk CLK_PERAO_SFLASH_F>,
<&pericfg_ao_clk CLK_PERAO_SFLASH_H>,
<&pericfg_ao_clk CLK_PERAO_SFLASH_P>;
clock-names = "spi", "sf", "axi_f", "axi_h", "axi_p";
assigned-clocks = <&topckgen_clk CLK_TOP_SFLASH_SEL>;
assigned-clock-parents = <&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>;
interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
xhci0: usb@11200000 {
compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x1000>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts-extended = <&gic GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH 0>,
<&pio 207 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host","wakeup";
phys = <&u2port0 PHY_TYPE_USB2>,
<&u3port0 PHY_TYPE_USB3>;
clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB0_SYS>,
<&pericfg_ao_clk CLK_PERAO_SSUSB0_REF>,
<&pericfg_ao_clk CLK_PERAO_SSUSB0_H>,
<&pericfg_ao_clk CLK_PERAO_SSUSB0_F>,
<&pericfg_ao_clk CLK_PERAO_SSUSB0_XHCI>,
<&pericfg_ao_clk CLK_PERAO_SSUSB0_FRMCNT>;
clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck", "frmcnt_ck";
#address-cells = <1>;
#size-cells = <0>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg_ao_clk 0x214 110>;
status = "disabled";
};
xhci1: usb@11210000 {
compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
reg = <0 0x11210000 0 0x1000>,
<0 0x11213e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts-extended = <&gic GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0>,
<&pio 203 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host","wakeup";
phys = <&u2port1 PHY_TYPE_USB2>;
clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB1_SYS>,
<&pericfg_ao_clk CLK_PERAO_SSUSB1_REF>,
<&pericfg_ao_clk CLK_PERAO_SSUSB1_H>,
<&pericfg_ao_clk CLK_PERAO_SSUSB1_F>,
<&pericfg_ao_clk CLK_PERAO_SSUSB1_XHCI>,
<&pericfg_ao_clk CLK_PERAO_SSUSB1_FRMCNT>;
clock-names = "sys_ck", "ref_ck","mcu_ck",
"dma_ck", "xhci_ck", "frmcnt_ck";
#address-cells = <1>;
#size-cells = <0>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg_ao_clk 0x21c 110>;
status = "disabled";
};
xhci2: usb@11220000 {
compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
reg = <0 0x11220000 0 0x1000>,
<0 0x11223e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts-extended = <&gic GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0>,
<&pio 193 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host","wakeup";
phys = <&u2port2 PHY_TYPE_USB2>;
clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB2_SYS>,
<&pericfg_ao_clk CLK_PERAO_SSUSB2_REF>,
<&pericfg_ao_clk CLK_PERAO_SSUSB2_H>,
<&pericfg_ao_clk CLK_PERAO_SSUSB2_F>,
<&pericfg_ao_clk CLK_PERAO_SSUSB2_XHCI>,
<&pericfg_ao_clk CLK_PERAO_SSUSB2_FRMCNT>;
clock-names = "sys_ck", "ref_ck","mcu_ck",
"dma_ck", "xhci_ck", "frmcnt_ck";
#address-cells = <1>;
#size-cells = <0>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg_ao_clk 0x27c 110>;
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt8189-mmc";
reg = <0 0x11230000 0 0x10000>,
<0 0x11e70000 0 0x1000>;
clocks = <&topckgen_clk CLK_TOP_MSDC50_0_SEL>,
<&pericfg_ao_clk CLK_PERAO_MSDC0_H>,
<&pericfg_ao_clk CLK_PERAO_MSDC0>;
clock-names = "source", "hclk", "source_cg";
interrupts = <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
};
mmc1: mmc@11240000 {
compatible = "mediatek,mt8189-mmc";
reg = <0 0x11240000 0 0x1000>,
<0 0x11d80000 0 0x1000>;
clocks = <&topckgen_clk CLK_TOP_MSDC30_1_SEL>,
<&pericfg_ao_clk CLK_PERAO_MSDC1_H>,
<&pericfg_ao_clk CLK_PERAO_MSDC1>;
clock-names = "source", "hclk", "source_cg";
interrupts = <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
};
xhci3: usb@11260000 {
compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
reg = <0 0x11260000 0 0x2e00>,
<0 0x11263e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts-extended = <&gic GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0>,
<&pio 188 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host","wakeup";
phys = <&u2port3 PHY_TYPE_USB2>,
<&u3port3 PHY_TYPE_USB3>;
clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB3_SYS>,
<&pericfg_ao_clk CLK_PERAO_SSUSB3_REF>,
<&pericfg_ao_clk CLK_PERAO_SSUSB3_H>,
<&pericfg_ao_clk CLK_PERAO_SSUSB3_F>,
<&pericfg_ao_clk CLK_PERAO_SSUSB3_XHCI>,
<&pericfg_ao_clk CLK_PERAO_SSUSB3_FRMCNT>;
clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck", "frmcnt_ck";
#address-cells = <1>;
#size-cells = <0>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg_ao_clk 0x284 110>;
status = "disabled";
};
xhci4: usb@11270000 {
compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
reg = <0 0x11270000 0 0x1000>,
<0 0x11273e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts-extended = <&gic GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH 0>,
<&pio 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host","wakeup";
phys = <&u2port4 PHY_TYPE_USB2>;
clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB4_SYS>,
<&pericfg_ao_clk CLK_PERAO_SSUSB4_REF>,
<&pericfg_ao_clk CLK_PERAO_SSUSB4_H>,
<&pericfg_ao_clk CLK_PERAO_SSUSB4_F>,
<&pericfg_ao_clk CLK_PERAO_SSUSB4_XHCI>,
<&pericfg_ao_clk CLK_PERAO_SSUSB4_FRMCNT>;
clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck", "frmcnt_ck";
#address-cells = <1>;
#size-cells = <0>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg_ao_clk 0x28c 110>;
status = "disabled";
};
clock-controller@1000c000 {
compatible = "mediatek,mt8189-apmixedsys", "syscon";
reg = <0 0x1000c000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@14000000 {
compatible = "mediatek,mt8189-dispsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1e980000 {
compatible = "mediatek,mt8189-gce-d", "syscon";
reg = <0 0x1e980000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1e990000 {
compatible = "mediatek,mt8189-gce-m", "syscon";
reg = <0 0x1e990000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1e800000 {
compatible = "mediatek,mt8189-mm-infra", "syscon";
reg = <0 0x1e800000 0 0x1000>;
#clock-cells = <1>;
};
pericfg_ao_clk: clock-controller@11036000 {
compatible = "mediatek,mt8189-peri-ao", "syscon";
reg = <0 0x11036000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
topckgen_clk: clock-controller@10000000 {
compatible = "mediatek,mt8189-topckgen", "syscon";
reg = <0 0x10000000 0 0x1000>;
#clock-cells = <1>;
};
pio: pinctrl@10005000 {
compatible = "mediatek,mt8189-pinctrl";
reg = <0 0x10005000 0 0x1000>,
<0 0x11b50000 0 0x1000>,
<0 0x11c50000 0 0x1000>,
<0 0x11c60000 0 0x1000>,
<0 0x11d20000 0 0x1000>,
<0 0x11d30000 0 0x1000>,
<0 0x11d40000 0 0x1000>,
<0 0x11e20000 0 0x1000>,
<0 0x11e30000 0 0x1000>,
<0 0x11f20000 0 0x1000>,
<0 0x11ce0000 0 0x1000>,
<0 0x11de0000 0 0x1000>,
<0 0x11e60000 0 0x1000>,
<0 0x1c01e000 0 0x1000>,
<0 0x11f00000 0 0x1000>;
reg-names = "base",
"lm",
"rb0",
"rb1",
"bm0",
"bm1",
"bm2",
"lt0",
"lt1",
"rt",
"eint0",
"eint1",
"eint2",
"eint3",
"eint4";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 182>;
interrupt-controller;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;
#interrupt-cells = <2>;
};
ufshci: ufshci@112b0000 {
compatible = "mediatek,mt8183-ufshci";
reg = <0 0x112b0000 0 0x2300>;
interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&topckgen_clk CLK_TOP_U_SEL>,
<&clk26m>,
<&topckgen_clk CLK_TOP_MSDCPLL_D2>,
<&topckgen_clk CLK_TOP_AES_UFSFDE_SEL>,
<&topckgen_clk CLK_TOP_U_MBIST_SEL>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_UNIPRO_TX_SYM>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_UNIPRO_RX_SYM0>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_UNIPRO_RX_SYM1>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_UNIPRO_SYS>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_U_SAP_CFG>,
<&ufscfg_ao_reg_clk CLK_UFSCFG_AO_REG_U_PHY_TOP_AHB_S_BUS>,
<&ufscfg_pdn_reg_clk CLK_UFSCFG_REG_UFSHCI_UFS>,
<&ufscfg_pdn_reg_clk CLK_UFSCFG_REG_UFSHCI_AES>,
<&ufscfg_pdn_reg_clk CLK_UFSCFG_REG_UFSHCI_U_AHB>,
<&ufscfg_pdn_reg_clk CLK_UFSCFG_REG_UFSHCI_U_AXI>;
clock-names = "ufs_sel",
"ufs_sel_min_src",
"ufs_sel_max_src",
"ufs_fde",
"ufs_mbist",
"unipro_tx_sym",
"unipro_rx_sym0",
"unipro_rx_sym1",
"unipro_sys",
"unipro_phy_sap",
"phy_top_ahb_s_bus",
"ufshci_ufs",
"ufshci_aes",
"ufshci_ufs_ahb",
"ufshci_aes_axi";
freq-table-hz = <26000000 208000000>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>;
vcc-supply = <&mt6359_vemc_1_ldo_reg>;
vccq-supply = <&mt6359_vio18_ldo_reg>;
vccq2-supply = <&mt6359_vufs_ldo_reg>;
resets = <&ufscfgpdn_rst 0>,
<&ufscfgpdn_rst 1>,
<&ufscfgpdn_rst 2>;
reset-names = "unipro_rst",
"crypto_rst",
"hci_rst";
mediatek,ufs-disable-mcq;
mediatek,ufs-rtff-mtcmos;
mediatek,ufs-broken-vcc;
status = "disabled";
};
u3phy3: t-phy@11b00000 {
compatible = "mediatek,mt8189-tphy",
"mediatek,generic-tphy-v2";
reg = <0 0x11b00000 0 0x700>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
u2port3: usb-phy@11b00000 {
reg = <0 0x11b00000 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
u3port3: usb-phy@11b00700 {
reg = <0 0x11b00700 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
};
u2phy4: xs-phy@11b10000 {
compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
#address-cells = <2>;
#size-cells = <2>;
ranges;
u2port4: usb-phy@11b10000 {
reg = <0 0x11b10000 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P4_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
};
u3phy0: xs-phy@11e80000 {
compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
reg = <0 0x11e83000 0 0x200>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
u2port0: usb-phy@11e80000 {
reg = <0 0x11e80000 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
u3port0: usb-phy@11e83000 {
reg = <0 0x11e83400 0 0x500>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
};
u2phy1: xs-phy@11e90000 {
compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
#address-cells = <2>;
#size-cells = <2>;
ranges;
u2port1: usb-phy@11e90000 {
reg = <0 0x11e90000 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P1_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
};
u2phy2: xs-phy@11ef0000 {
compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
#address-cells = <2>;
#size-cells = <2>;
ranges;
u2port2: usb-phy@11ef0000 {
reg = <0 0x11ef0000 0 0x700>;
clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P2_EN>;
clock-names = "ref";
#phy-cells = <1>;
};
};
ufscfg_ao_reg_clk: syscon@112b8000 {
compatible = "mediatek,mt8189-ufscfg-ao", "syscon", "simple-mfd";
reg = <0 0x112b8000 0 0x1000>;
#clock-cells = <1>;
ufscfgao_rst: reset-controller {
compatible = "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
/* ufs mphy reset */
/* 8: mphy */
0x48 8 0x4c 8 0 0
(ASSERT_SET | DEASSERT_SET | STATUS_NONE)
>;
};
};
ufscfg_pdn_reg_clk: syscon@112bb000 {
compatible = "mediatek,mt8189-ufscfg-pdn", "syscon", "simple-mfd";
reg = <0 0x112bb000 0 0x1000>;
#clock-cells = <1>;
ufscfgpdn_rst: reset-controller {
compatible = "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
/* ufs ufschi/crypto/unipro reset */
/* 0: unipro */
0x48 0 0x4c 0 0 0
(ASSERT_SET | DEASSERT_SET | STATUS_NONE)
/* 1: ufs-crypto */
0x48 1 0x4c 1 0 0
(ASSERT_SET | DEASSERT_SET | STATUS_NONE)
/* 2: ufshci */
0x48 2 0x4c 2 0 0
(ASSERT_SET | DEASSERT_SET | STATUS_NONE)
>;
};
};
pwrap: pwrap@1cc04000 {
compatible = "mediatek,mt8189-pwrap", "mediatek,mt8195-pwrap", "syscon";
reg = <0 0x1cc04000 0 0x1000>;
reg-names = "pwrap";
assigned-clocks = <&vlpckgen_clk CLK_VLP_CK_PWRAP_ULPOSC_SEL>;
assigned-clock-parents = <&topckgen_clk CLK_TOP_OSC_D10>;
clocks = <&vlpcfg_ao_clk CLK_VLPCFG_REG_PMIF_SPMI_M_SYS>,
<&vlpcfg_ao_clk CLK_VLPCFG_REG_PMIF_SPMI_M_TMR>;
clock-names = "spi", "wrap";
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
};
vlpcfg_ao_clk: clock-controller@1c00c000 {
compatible = "mediatek,mt8189-vlpcfg-ao", "syscon";
reg = <0 0x1c00c000 0 0x1000>;
#clock-cells = <1>;
};
vlpckgen_clk: clock-controller@1c012000 {
compatible = "mediatek,mt8189-vlpckgen", "syscon";
reg = <0 0x1c012000 0 0x1000>;
#clock-cells = <1>;
};
};
};

View File

@@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
#include "mt8371-genio-common-u-boot.dtsi"

View File

@@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt8189.dtsi"
#include "mt8371-genio-common.dtsi"
/ {
model = "MediaTek Genio-520 EVK";
compatible = "mediatek,mt8371-evk", "mediatek,mt8371", "mediatek,mt8189";
};

View File

@@ -0,0 +1,28 @@
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Copyright (C) 2026 MediaTek Inc.
*/
&mmc1 {
/* U-Boot driver doesn't support UHS yet. */
/delete-property/ sd-uhs-sdr50;
/delete-property/ sd-uhs-sdr104;
mmc-no-1-8-v;
};
/*
* Needed to trigger U-Boot auto-set-voltage. Default voltages for these
* supplies at boot are incorrect and U-Boot MMC drivers don't set them.
*/
&mt6359_vpa_buck_reg {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
&mt6359_vsim1_ldo_reg {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};

View File

@@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2026 MediaTek Inc.
*
* Adjusts for when boot DIP switches/jumpers on EVK are set for UFS boot
* instead of eMMC.
*/
/dts-v1/;
/plugin/;
&ufshci {
status = "okay";
};
&mmc0 {
status = "disabled";
};

View File

@@ -0,0 +1,344 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2026 MediaTek Inc.
* Author: Macpaul Lin <macpaul.lin@mediatek.com>
*/
#include <dt-bindings/gpio/gpio.h>
#include "mt8189.dtsi"
#include "mt8189-pinfunc.h"
#include "mt6359.dtsi"
/ {
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:921600n8";
};
usb_p0_vbus: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "p0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 82 0>;
enable-active-high;
};
usb_p1_vbus: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "p1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 84 0>;
enable-active-high;
};
usb_p2_vbus: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "p2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 85 0>;
enable-active-high;
};
usb_p3_vbus: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "p3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 86 0>;
enable-active-high;
};
usb_p4_vbus: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "p4_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 87 0>;
enable-active-high;
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
};
memory@40000000 {
/* 8GB */
device_type = "memory";
reg = <0 0x40000000 0x2 0x00000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
bl31_secmon_reserved: secmon@54600000 {
no-map;
reg = <0 0x54600000 0x0 0x200000>;
};
/* 12 MiB reserved for OP-TEE (BL32)
* +-----------------------+ 0x43e0_0000
* | SHMEM 2MiB |
* +-----------------------+ 0x43c0_0000
* | | TA_RAM 8MiB |
* + TZDRAM +--------------+ 0x4340_0000
* | | TEE_RAM 2MiB |
* +-----------------------+ 0x4320_0000
*/
optee_reserved: optee@43200000 {
no-map;
reg = <0 0x43200000 0 0x00c00000>;
};
dsi_reserved: dsi@60000000 {
reg = <0 0x60000000 0 0x02000000>;
no-map;
};
};
};
&watchdog {
status = "okay";
};
&uart0 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
status = "okay";
};
&mmc0 {
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x1481b>;
cap-mmc-hw-reset;
vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
vqmmc-supply = <&mt6359_vufs_ldo_reg>;
non-removable;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_default_pins>;
pinctrl-1 = <&mmc0_uhs_pins>;
status = "okay";
};
&mmc1 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
max-frequency = <200000000>;
no-mmc;
no-sdio;
sd-uhs-sdr50;
sd-uhs-sdr104;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc1_default_pins>;
pinctrl-1 = <&mmc1_uhs_pins>;
vmmc-supply = <&mt6359_vpa_buck_reg>;
vqmmc-supply = <&mt6359_vsim1_ldo_reg>;
status = "okay";
};
&mt6359_vufs_ldo_reg {
regulator-always-on;
};
&nor_flash {
pinctrl-names = "default";
pinctrl-0 = <&nor_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <52000000>;
spi-rx-bus-width = <2>;
spi-tx-bus-width = <2>;
};
};
&pio {
mmc0_default_pins: mmc0-default-pins {
pins-clk {
pinmux = <PINMUX_GPIO162__FUNC_MSDC0_CLK>;
drive-strength = <6>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-cmd-dat {
pinmux = <PINMUX_GPIO166__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO165__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO164__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO163__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO159__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO158__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO157__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO156__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO161__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <6>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-rst {
pinmux = <PINMUX_GPIO160__FUNC_MSDC0_RSTB>;
drive-strength = <6>;
bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
};
};
mmc0_uhs_pins: mmc0-uhs-pins {
pins-clk {
pinmux = <PINMUX_GPIO162__FUNC_MSDC0_CLK>;
drive-strength = <8>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-cmd-dat {
pinmux = <PINMUX_GPIO166__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO165__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO164__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO163__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO159__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO158__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO157__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO156__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO161__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <8>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-ds {
pinmux = <PINMUX_GPIO167__FUNC_MSDC0_DSL>;
drive-strength = <8>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-rst {
pinmux = <PINMUX_GPIO160__FUNC_MSDC0_RSTB>;
bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
};
};
mmc1_default_pins: mmc1-default-pins {
pins-clk {
pinmux = <PINMUX_GPIO169__FUNC_MSDC1_CLK>;
drive-strength = <6>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-cmd-dat {
pinmux = <PINMUX_GPIO170__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO171__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO172__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO173__FUNC_MSDC1_DAT3>,
<PINMUX_GPIO168__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <6>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-insert {
pinmux = <PINMUX_GPIO2__FUNC_GPIO2>;
bias-pull-up;
};
};
mmc1_uhs_pins: mmc1-uhs-pins {
pins-clk {
pinmux = <PINMUX_GPIO169__FUNC_MSDC1_CLK>;
drive-strength = <8>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins-cmd-dat {
pinmux = <PINMUX_GPIO170__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO171__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO172__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO173__FUNC_MSDC1_DAT3>,
<PINMUX_GPIO168__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <8>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins-insert {
pinmux = <PINMUX_GPIO2__FUNC_GPIO2>;
bias-pull-up;
};
};
nor_pins: nor-pins {
pins-ck-io {
pinmux = <PINMUX_GPIO150__FUNC_SPINOR_CK>,
<PINMUX_GPIO152__FUNC_SPINOR_IO0>,
<PINMUX_GPIO153__FUNC_SPINOR_IO1>;
drive-strength = <8>;
bias-pull-down;
};
pins-cs {
pinmux = <PINMUX_GPIO151__FUNC_SPINOR_CS>;
drive-strength = <8>;
bias-pull-up;
};
};
uart0_pins: uart0-pins {
pins {
pinmux = <PINMUX_GPIO31__FUNC_UTXD0>,
<PINMUX_GPIO32__FUNC_URXD0>;
bias-pull-up;
};
};
};
&pmic {
interrupts-extended = <&pio 194 IRQ_TYPE_LEVEL_HIGH>;
};
&xhci0{
vbus-supply = <&usb_p0_vbus>;
status = "okay";
};
&xhci1{
vbus-supply = <&usb_p1_vbus>;
status = "okay";
};
&xhci2{
vbus-supply = <&usb_p2_vbus>;
status = "okay";
};
&xhci3{
vbus-supply = <&usb_p3_vbus>;
status = "okay";
};
&xhci4{
vbus-supply = <&usb_p4_vbus>;
status = "okay";
};

View File

@@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
#include "mt8371-genio-common-u-boot.dtsi"

View File

@@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt8189.dtsi"
#include "mt8371-genio-common.dtsi"
/ {
model = "MediaTek Genio-720 EVK";
compatible = "mediatek,mt8391-evk", "mediatek,mt8391", "mediatek,mt8189";
};

View File

@@ -17,10 +17,6 @@
};
};
&usb_1 {
dr_mode = "host";
};
// RAM Entry 0 : Base 0x0080000000 Size 0x003A800000
// RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000
// RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000

View File

@@ -49,7 +49,6 @@
compatible = "renesas,r7s72100-rpc-if";
reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
bank-width = <2>;
num-cs = <1>;
status = "okay";
spi-max-frequency = <50000000>;
#address-cells = <1>;

Some files were not shown because too many files have changed in this diff Show More