Adjust legoev3_defconfig to reduce the binary output size.
As u-boot has bloated a bit over the years, the legoev3_defconfig can no
longer build something that fits in the 256kB size limit of the EV3.
This drops a few unused features, but the real difference-makers are
enabling thumb instructions and using link time optimization to reduce
the size.
This reduced u-boot.bin from 279,920 to 198,416 bytes on my local
machine with arm-none-eabi-gcc (15:13.2.rel1-2) 13.2.1 20231009.
HAS_BOARD_SIZE_LIMIT is also added to catch any future regressions.
Signed-off-by: David Lechner <david@lechnology.com>
The mx6sabresd U-Boot proper binary size has grown beyond the
CONFIG_BOARD_SIZE_LIMIT.
Reduce its size by removing the CONFIG_MULTI_DTB_FIT, BOOTM_PLAN9 and
BOOTM_RTEMS options.
According to doc/README.multi-dtb-fit:
"Usually the DTB is selected by the SPL and passed down to U-Boot. But some
platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
U-Boot with a choice of DTBs"
mx6sabresd uses SPL, so MULTI_DTB_FIT can be safely dropped as the DTB
selection in SPL is done by board_fit_config_name_match().
Tested boot on the imx6dl and imx6q variants.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
This variable might end up being uninitialized if we exit early.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This option is very useful for A/B boot setups with read-only
filesystems: Letting U-Boot fill in the rootfs (and possibly related
parameters) allows keeping all boot parameters except the actual slot
selection in the extlinux.conf file, where they can be updated easily.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
Since commit 51ec8db232 ("pylibfdt: correct license information"), the
License classifiers are gone so I assume setuptools now extract the
license from the license argument to setuptools.setup() function.
It's always been incorrect as far as I could tell, so let's fix this
with the appropriate info from the SPDX License identifier at the top of
the file. It was missing GPL-2.0-or-later and we disambiguate by using
BSD-2-Clause instead of simply BSD.
Fixes: 6b08fb5cc4 ("fdt: Move to setuptools")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
The log level "emergency" cannot be used as that results in compilation
failure. Correct the macro name used to print at this level.
Fixes: 2496796587 ("log: provide missing macros")
Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Observing the crash when we add the i2c-arbitrator node in the device
tree as per the DT bindings. The issue is with the child node of
i2c-arbitrator@72 i.e., i2c@f1950000->i2c-arbitrator@72->i2c-arb, as the
arbitrator uses the uclass of mux(UCLASS_I2C_MUX) and the mux uclass driver
checks for the "reg" property using the i2c_mux_child_post_bind() function,
if it won't find the "reg" property it will return -EINVAL which is leading
to the crash.
So, add the logic to check whether the child node has the "reg" property,
if the "reg" property exists then read the "reg" and update the channel.
https://www.kernel.org/doc/Documentation/devicetree/bindings/i2c/i2c-arb.txt
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The value passed to dcd_skip of build_container() should be obtained by
parsing .cfg file, and should not be fixed to false. For i.MX8QXP, dcd
data needs to be skipped, in which case dcd_skip should be true.
Fixes: 5f28a6599f01("tools: imx8image: add i.MX95 support")
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reported-by: Enric Balletbo i Serra <eballetb@redhat.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Commit 6fe50e3950 ("arm: asm/system.h: mrc and mcr need .arm if
__thumb2__ is not set") is not a proper fix for the LTO link error
mentioned in its description. It causes 32-bit arm instructions to be
mixed with thumb instructions, which the Kirkwood SoCs do not support.
For example, board_init_r() is mostly generated in Thumb-1 mode as
expected since the build flags contain -mthumb -mthumb-interwork. The
MCR instruction corresponding to writefr_extra_feature_reg() is also
correcly emitted as a 32-bit ARM instruction (it cannot be encoded in
Thumb-1 anyways). The problem is, the compiler inlines the MCR without
generating the BX or BLX instruction which are needed to transition
between the ARM and the Thumb-1 states. From the objdump output:
006186a0 <board_init_r>:
board_init_r():
/home/jerome/work/u-boot/common/board_r.c:799
6186a0: b5f0 push {r4, r5, r6, r7, lr}
6186a2: b0ab sub sp, #172 @ 0xac
get_gd():
/home/jerome/work/u-boot/./arch/arm/include/asm/global_data.h:127
6186a4: 464a mov r2, r9
...
/home/jerome/work/u-boot/arch/arm/mach-kirkwood/cpu.c:242
619aae: 9b15 ldr r3, [sp, #84] @ 0x54
writefr_extra_feature_reg():
/home/jerome/work/u-boot/./arch/arm/include/asm/arch/cpu.h:100
619ab0: ee2f3f11 mcr 15, 1, r3, cr15, cr1, {0}
^^^^^^^^
32-bit ARM instruction
Further investigation is needed to understand how to fix the issue so
that the code size is minimal for all boards. In the mean time, this
fix disables LTO for the two problematic files (common/board_f.c and
common/board_r.c). This makes the Kirkwood-based boards bootable again.
The binary size is increased by 1048 bytes which is perfectly
acceptable.
Fixes: 6fe50e3950 ("arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set")
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The function definition of fit_check_sign() is guarded by
"#ifdef CONFIG_FIT_SIGNATURE" in "tools/image-host.c". If we try
to build it without CONFIG_FIT_SIGNATURE, we will get an error:
/usr/bin/ld: tools/fit_check_sign.o: in function `main':
fit_check_sign.c:(.text.startup+0x165): undefined reference to `fit_check_sign'
collect2: error: ld returned 1 exit status
Fixes: 9c79c8fe70 ("tools/fit_check_sign: make key optional")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
The symbol TOOLS_IMAGE_PRE_LOAD doesn't depend on TOOLS_LIBCRYPTO.
If we choose to build tools without openssl, rsa_verify_openssl()
will attempt to call the unavailable openssl library functions.
Fixes: 942c8c8e66 ("rsa: Add rsa_verify_openssl() to use openssl for host builds")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Device bus address might not be valid for direct access when the bus
address and CPU address are not the same. Use dev_bus_to_phys() to
translate bus address back to CPU address.
Fixes: 3d98b8c504 ("net: designware: Invalidate RX buffer cache before freeing the DMA descriptor")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
As stated in 5e847f7729 ("efi_loader: call efi_init_early() earlier"):
efi_init_early() creates an event hook for block device probing.
It has to be called before any block device is probed.
Indeed, efi_bl_init() registers EVT_DM_POST_PROBE event, which calls
efi_disk_probe() whenever any block device is probed. And to make that
hook work, the initialization of all block devices was put after
efi_init_early() in initcall_run_r():
INITCALL(efi_init_early);
INITCALL(initr_nand);
INITCALL(initr_onenand);
INITCALL(initr_mmc);
Because LDFW firmware is being read from MMC, attempt to load LDFW in
board_init() causes MMC driver to be probed. And because board_init() is
executed before efi_init_early(), the hook mentioned above won't work
for MMC devices anymore. So EFI disk objects won't be created, which in
turn makes the EFI subsystem non-functional, showing next symptoms:
- 'efidebug dh' output is empty
- attempt to add boot devices in 'eficonfig' shows this message:
"No block device found!"
- 'bootefi selftest $fdtcontroladdr' shows this warning:
"Cannot persist EFI variables without system partition"
- booting GRUB with 'bootefi' runs minimal GRUB shell which doesn't
see any block devices as well, probably because EFI vars weren't
passed
Load LDFW in board_late_init() instead, as it's called after
efi_init_early(). This fixes the described problem and makes it possible
to run EFI apps like GRUB correctly, add entries in 'eficonfig', and
makes 'efivar --list' command in Linux rootfs actually show EFI
variables.
The only user of LDFW at the moment is the TRNG driver, and it's probed
later, only when it's going to be used (e.g. on "rng" command). So it's
fine to load LDFW in board_late_init(). Now the corresponding call order
will look like this:
efi_init_early()
initr_mmc()
mmc_probe()
EVT_DM_POST_PROBE -> efi_disk_probe()
board_late_init()
load_ldfw() -> fs_read(), blk_dread()
exynos_trng_probe()
Fixes: ccfd8de541 ("board: samsung: e850-96: Report LDFW loading failures")
Fixes: f04e58cc97 ("board: samsung: e850-96: Load LDFW firmware on board init")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
The note about U-Boot not being able to verify server certificates is
false now that WGET_CACERT and WGET_BUILTIN_CACERT have been added.
Remove it.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This fix a possible NULL pointer dereference.
There is also a risk of memory leaking within the same portion of code.
The leak will happen if loaded image is bad or damaged. In this case
u-boot-spl will try booting from the other available media. Unfortunately
resources allocated for previous boot media will NOT be freed.
We can't fix that issue as the memory allocation mechanism used here
is unknown. It can be different kinds of malloc() or something else.
To somewhat reduce memory consumption, one can try to reuse previously
allocated memory as it's done in board_spl_fit_buffer_addr() from
test/image/spl_load.c.
The corresponding comment was put to the code as well.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
load_simple_fit() returns -EPERM for the images with broken signatures.
Unfortunately this may conflict with image loaging selection on the base
of boot phase. See commit 873112db9c
("spl: Support selecting images based on phase in simple FIT").
Thus loading of
configurations {
uboot {
description = "u-boot";
firmware = "atf";
loadables = "atf", "tee", "uboot";
};
};
with damaged "tee" image may finish without errors. This may results in
board bricking.
This patch fixes commit 873112db9c
("spl: Support selecting images based on phase in simple FIT")
by replacing EPERM with EBADSLT places where it should be done.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
The current code have two issues:
1) ineffective NULL pointer check
str = strchr(str, '\0') + 1
if (!str || ...
The str here will never be NULL (because we add 1 to result of strchr())
2) strchr() may go out of the buffer for the special forms of name variable.
It's better use memchr() function here.
According to the code the property is a sequence of C-string like
shown below:
'h', 'e', 'l', 'l', 'o', '\0', 'w', 'o', 'r', 'l', 'd', '\0', '!', '\0'
index is the string number we are interested, so
index = 0 => "hello",
index = 1 => "world",
index = 2 => "!"
The issue will arrise if last string for some reason have no terminating
'\0' character. This can happen for damaged or specially crafted dtb.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
According to include/sysreset.h the reset_cpu() function does not take any args
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
The CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xeb300000 does not make it into
board .config on either R-Car V4H White Hawk or Sparrow Hawk, remove
this configuration option. The early SPL stack is however pointing
into the RT-VRAM and may corrupt payload loaded into the RT-VRAM by
the BootROM. Set the early SPL stack at fixed location at the end of
System RAM instead, where it cannot interfere with the payload loaded
into RT-VRAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Patrick Delaunay <patrick.delaunay@foss.st.com> says:
Fix and add documentation/tests for selection by string for known
partition type GUID introduced by bcb41dcaef ("uuid: add
selection by string for known partition type GUID"):
- split list_guid for short name (used also for partiton
description with type parameter) and full name to display
information
- as the function are uuid_str_to_bin() / uuid_guid_get_str()
are no more under CONFIG_PARTITION_TYPE_GUID, since commit
31ce367cd1 ("lib/uuid.c: change prototype of uuid_guid_get_str()")
and commit c1528f324c ("lib: compile uuid_guid_get_str if
CONFIG_LIB_UUID=y") move the content of array under EFI_PARTITION
and linker will remove it is not used it (in SPL)
- Add and fix documentation for gpt command
- Add test test_gpt_write_part_type to test "type=" parameters
This first patch solves an issue for the "system" shortcut for ESP,
removed by commit d54V3 version solve issue for "ESP" support when
CONFIG_CMD_EFIDEBUG and CONFIG_EFI is not activated
for example for test with qemu-arm-sbsa defconfige1004b8b1 ("lib/uuid.c: use unique name
for PARTITION_SYSTEM_GUID") but used in 2 location (at least):
1- board/samsung/e850-96/e850-96.env:10:
partitions=name=esp,start=512K,size=128M,bootable,type=system;
partitions+=name=rootfs,size=-,bootable,type=linux
2- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:1151
case PART_ESP:
/* EFI System Partition */
459219 type_str = "system"
....
offset += snprintf(buf + offset,
buflen - offset,
",type=%s", type_str);
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26699
Link: https://lore.kernel.org/r/20250616112749.17311-1-patrick.delaunay@foss.st.com
Add information on type partition, copied from README.gpt.
I also correct issue for gpt_parts variable and add example of
"gpt read" usage.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of optional shortname for parameter 'type' of gpt
command (limited by UUID_STR_LEN) and a separate 'description'
for UID format "%pUs" used in 'part list' output.
When 'description' is absent in list_guid[], the optional
shortname is used as fallback.
Many partition types for EFI have no shortcut yet, but only
description as they are only used to display information.
This patch also restores the "system" as short name for EFI
System Partition (ESP).
Fixes: d54e1004b8 ("lib/uuid.c: use unique name for PARTITION_SYSTEM_GUID")
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove duplicate .ops assignment that was overriding the correct
ti_musb_gadget_ops with musb_usb_ops (host ops) in the ti_musb_peripheral
driver. This was causing U-Boot crashes when trying to call the
handle_interrupts operation since the wrong ops structure was being used.
Fixes: 7d98dbcc3d ("usb: musb-new: Add support for DM_USB")
Fixes: 281eaf1ed8 ("usb: gadget: musb: Convert interrupt handling to usb_gadget_generic_ops")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250611171031.840277-1-kory.maincent@bootlin.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
The third_arg for a dfu alt is read as an integer and is overloaded for
different supported backends. For ext4 and fat, this third_arg
represents the partition and forms the dev part string, which should
have its partition in hex. This commit fixes dfu ext4/fat usage for
devices with ten or more partitions.
Signed-off-by: Ivan Pang <ipman@amazon.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Link: https://lore.kernel.org/r/20250611050127.38011-1-ipman@amazon.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Writing to eMMC on RK3528 is affected with the same or a similar issue
as on RK3588, where eMMC must init to HS200 at least once to fully work.
Trying to write u-boot-rockchip.bin to eMMC fails with:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... mmc write failed
0 blocks written: ERROR
For U-Boot to enable HS200 mode the mmc-hs200-1_8v prop must be defined
in the device tree. Linux does not seem to be affected and is able to
detect and use HS200 without this prop.
Enable use of HS200 and fix eMMC write on RK3528 by adding the missing
mmc-hs200-1_8v prop for affected boards:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... 20480 blocks written: OK
Fixes: b112a44531 ("board: rockchip: Add minimal generic RK3528 board")
Fixes: ccbddf6453 ("board: rockchip: Add Radxa E20C")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Raspberry Pi 5 can now have up to 16 GiB of RAM where the memory spans 8
DRAM banks in total. Increase the config value to 8 to initialize the
whole RAM. Without this change, kernel only sees 8 GiB of RAM on the 16
GiB CM5 as reported in [1].
[1] https://github.com/home-assistant/operating-system/issues/3989
Signed-off-by: Jan Čermák <sairon@sairon.cz>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
This patch is to solve the sandbox building error:
$ make O=build-sandbox -s sandbox_defconfig
$ make O=build-sandbox -s -j2
/usr/bin/ld: /tmp/u-boot.27rzOu.ltrans58.ltrans.o: undefined reference to symbol 'pthread_kill@@GLIBC_2.2.5'
/usr/bin/ld: /lib/x86_64-linux-gnu/libpthread.so.0: error adding symbols: DSO missing from command line
collect2: error: ld returned 1 exit status
[...]
Fixes: b989f9ed9f ("test: lib: add initjmp() test")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
If an Unexpected exception is thrown in a test, an undefined variable
error is reported. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 85d7dae377 ("test: Detect dead connections")
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
If a BootFail exception is thrown in a test, it is not handled
correctly. Use the correct fixture variable 'ubman_fix' to resolve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d9ed4b75ad ("test/py: Drop u_boot_ prefix on test files")
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
When the toradex-smarc-imx8mp_defconfig file was first added, SPL_STACK
was set to 0x960000, but SPL_HAVE_INIT_STACK wasn't enabled.
This led to SPL_STACK being correctly dropped in commit 25fefa05d7
("configs: Resync with savedefconfig"), since SPL_HAVE_INIT_STACK was
missing, which ended up making the board not boot.
Fix this by adding SPL_STACK back and making sure SPL_HAVE_INIT_STACK is
enabled.
Fixes: dde53eae88 ("board: toradex: add Toradex SMARC iMX8MP")
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
After enabling some options to support EEPROM read in SPL
(CONFIG_SPL_I2C_EEPROM), the following error appears:
alloc space exhausted
Increasing SYS_MALLOC_F_LEN from 8kB to 64kB fixes the problem.
But instead of manually increasing the value, adopt method used in
commit ce3f23404c ("board: bsh: imx8mn_bsh_smm_s2/s2pro: enlarge
CONFIG_SPL_SYS_MALLOC_F_LEN"):
Dropping CONFIG_SPL_SYS_MALLOC_F_LEN option allows it to be set to the
default value of CONFIG_SYS_MALLOC_F_LEN, which is set by default to 64kB
(0x10000) on i.MX8M platforms.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
i.MX91 device tree still not landed in linux kernel, so drop OF_UPSTREAM
and move the device tree files to arch/arm/dts
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
When doing the investigation for commit 53bb8fdea1 ("mmc: Kconfig:
Correct dependencies SDHCI ADMA options") I missed the implications of
MMC_SDHCI_ADMA_HELPERS. The problem is that FSL_ESDHC via the
FSL_ESDHC_SUPPORT_ADMA2 option will also enable these helper functions.
This in turn means the correct dependency here is
MMC_SDHCI_ADMA_HELPERS and not *MMC_SDHCI_ADMA.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
One more board to support, this time Retronix Sparrow Hawk based on
Renesas R-Car V4H SoC . This is board support, so master branch should
be fine. The DT in dts/upstream/ is a backport from Linux, and will
disappear on next DT sync.
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.
DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Introduce weak renesas_dram_init_banksize() function which is meant
to be used to adjust DRAM bank sizes after the common Renesas board
DRAM bank handling code finished. This is mainly meant for boards
which ship with multiple DRAM size options, which can be detected
at runtime. This allows such boards to ship with single U-Boot
binary on all boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This reverts commit 159b6f0e11.
Since commit 159b6f0e11 ("caam: Fix CAAM error on startup") the following
regression was reported by Tim Harvey:
"I've found that this patch causes a regression on an imx8mm board
(imx8mm_venice_defconfig) where the first call to caam_rng_read fails
here in jr_dequeue but if you call it again it works. With some
debugging added:
SEC0: RNG instantiated
...
Hit any key to stop autoboot: 0
u-boot=> rng list
RNG #0 - caam-rng
u-boot=> rng 0 10
caam_rng_read caam-rng len=16
run_descriptor_jr_idx idx=0
Error in SEC deq: -1
caam_rng_read_one run_descriptor_jr failed: -1
caam_rng_read caam-rng caam_rng_read_one failed: -5
Reading RNG failed
u-boot=> rng 0 10
caam_rng_read caam-rng len=16
run_descriptor_jr_idx idx=0
00000000: ad 2e ad c0 2a 12 27 c4 65 82 66 19 be ef f6 07 ....*.'.e.f.....
If I revert your patch caam_rng_read works initially and on subsequent
calls."
" I ran into this when I was testing
lwIP HTTPS as it causes anything that uses dm_rng to fail the first
time (such as HTTPS)."
Revert it for now to avoid the regression.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Add 'imply CONFIG_POSITION_INDEPENTDENT' for QEMU arm arch. This allows
qemu arm boards to load u-boot.bin at any address. It is skipped by
default when u-boot is loaded by either --bios or --kernel.
To load u-boot.bin at a different address, one can use u-boot
chain-loading or qemu loader device[1].
[1] https://www.qemu.org/docs/master/system/generic-loader.html
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
when CONFIG_BLOBLIST is enabled, the section is switched to .data but is
not switched back to .text. It makes all the code below placed in .data
section, also breaks CONFIG_POSITION_INDEPENDENT.
Fix it by adding `.section .text` to switch the section back to .text.
Fixes: 5103e69344 ("arm: armv7: save boot arguments")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Fix a typo error in gcc.rst, changing "out-out-tree" to
"out-of-tree" in the Out-of-tree section.
Signed-off-by: BehradElmi <behradelmi1@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
There are backslashes in some of the tags which seems to be unnecessary.
Remove then.
Change the word 'either' to 'any' since there are three options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The details of the sysfw.itb from the R5 build that
also needs to be copied as part of the target images
is missing, but is included in the image formats a
little further down, so add it to the instructions.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
%s/data that change/data that changes/
%s/cannot be used has/cannot be used for/
%s/Otherwise/Otherwise,/
%s/allows better measurement/allows for better measurement/
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The val (the bits to set) is the second member of the reg_data structure
and mask the third one. We obviously want to clear bits 6 and 7 in order
to only set bit 7 in there instead of only clearing bit 7 in order to
write bits 6 and 7 (which makes no sense).
Fortunately, according to the datasheet, bit 6 value doesn't matter when
bit 7 is set so this is essentially just a cosmetic change, no intended
change in behavior.
Fixes: f172575d92 ("power: rk8xx: add support for RK806")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The NanoPi RK3399 boards support UHS-I (up to SDR104) SD cards, however
using any of these 1.8v modes results in a boot failure in SPL upon soft
reboot.
The issue is that the "vcc_sdio" regulator is left at 1.8v on reboot
and the corresponding GPIO defaults to 3.3v. This prevents the SD card
from being reinitialized and read successfully.
This change enables the RK8XX regulators and Rockchip IO-domain drivers
in SPL, which initializes "vcc_sdio" regulator to 3.0v and configures
the GPIO for the correct level on boot.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This change removes the "regulator-always-on" property from the
"vcc3v0_sd" (vmmc-supply) and "vcc_sdio" (vqmmc-supply) regulators,
which otherwise prevents the MMC driver from being able to power cycle
the SD card as part of the initialization procedure.
It also removes the "regulator-boot-on" from the "vcc_sdio" regulator,
which could theoretically damage a SD card that is already initialized
in a low voltage mode.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allows use of the regulator functions of the RK8XX PMIC in SPL, which is
necessary to support the functionality of the Rockchip IO-domain driver
on relevant platforms.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allows use of the Rockchip IO-domain driver in SPL to configure
the GPIO to match the voltage supplied by specific regulators
(e.g. "vcc_sdio").
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Log the value of the regulators during initialization of the IO-domain
driver to aid in debugging GPIO voltage configuration problems.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Our upcoming Mass Flasher solution will be storing boot artifacts on an
exFAT partition so enable its support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Our upcoming Mass Flasher solution will be storing boot artifacts on an
exFAT partition so enable its support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Our upcoming Mass Flasher solution will be storing boot artifacts on an
exFAT partition so enable its support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Our upcoming Mass Flasher solution will be storing boot artifacts on an
exFAT partition so enable its support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Because DEBUG_UART_BOARD_INIT depends on DEBUG_UART, hard dependency
to DEBUG_UART_BOARD_INIT in ROCKCHIP_PX30 can cause warnings if
DEBUG_UART is disabled.
The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP entry.
Remove hard dependency from ROCKCHIP_PX30, so that it will be
consistent with other rockchip boards.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In case DEBUG UART is not used, define dummy macros replacing
the actual function implementations that will not be available.
This allows to compile code and avoid linker errors.
Redefine the DEBUG_UART_FUNCS macro if DEBUG UART is not available,
to avoid compilation errors.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RAM_ROCKCHIP_DEBUG can be used only if DEBUG_UART is
available.
The next commit introduces changes in definition of debug
uart functions, so that DEBUG_UART is required to be defined
in order to initialize uart and use print functions.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Update definition of _debug_uart_putc to static inline.
This will allow to avoid compilation warnings about unused code
after introduction of patch changing debug uart functions to
dummies if CONFIG_DEBUG_UART is not set.
This also matches the instructions in include/debug_uart.h and
provides consistency with implementations for other platforms.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update the definition of _debug_uart_putc to static inline.
This matches the instructions in include/debug_uart.h and
provides consistency with implementations for other platforms.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
board_init_f for the am62a is missing the call to spl_enable_cache which
exists for all other am62 platforms (check am625_init.c &
am62p5_init.c).
This allows the usage of caches while loading and parsing the u-boot.img
FIT resulting in ~2x speedup in the A53 SPL stage.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
There are common MMC args for TI plats in include/environment/ti/mmc.env.
Since we already include this, there is no need to redefine these
MMC vars. Use the defaults.
This seems like something that could have been done while refactoring
these vars in the first place as it happened after this AM62A file
was available hence the fixes tag.
Reported-by: Chirag Shilwant <c-shilwant@ti.com>
Fixes: 3709b52915 ("env: ti: mmc.env: Move mmc related args to common place")
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Chirag Shilwant <c-shilwant@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
This clears UHS_MODE_SELECT for timing modes <= MMC_HS_52.
When initializing to HS400 mode, the host controller downgrades to non-uhs
modes so clear UHS_MODE_SELECT at modes <= MMC_HS_52.
This fixes eMMC writes on j7200 EVM.
Fixes: 6067aa66b3 ("mmc: am654_sdhci: Add am654_sdhci_set_control_reg")
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The condition here is reversed, which makes link and coral very slow,
leading to lab failures.
Fixes 6c171f7a18 ("common: board: make initcalls static")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
More Qualcomm fixes for 2025.07
* Adjust fdtfile logic to support more boards
* Support linux,code variable in qcom-pmic button driver
* Minor CLK API adjustments and apq8096/msm8916 fixes
* vbus regulator register fixes
* dragonboard410c KASLR support and other fixes
Change the vcpumntirq in the GICv3 node from SPI to PPI.
Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'
Fixes: 6d722894fd "board: emulation: Add QEMU sbsa support"
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Most device vendors put "Volume Down" button onto PMIC RESIN.
But Sony is special: see
dts/upstream/src/arm64/qcom/sdm630-sony-xperia-nile.dtsi or [1].
They put "Volume Down" on PMIC GPIO 7 where others usually put
"Volume Up", and KEY_VOLUMEUP is inside &pon_resin.
Currently if you boot U-Boot on such Sony device, you end up
with 2 "Volume Down" buttons, and no "Volume Up", which makes
navigating menu problematic.
Support reading devicetree "linux,code" property and override
statically defined button code & label based on that.
[1] https://elixir.bootlin.com/linux/v6.15-rc3/source/arch/
arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi#L263
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424014811.3809818-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
As of commit dc8754e8e4 ("clk/qcom: apq8016: improve clk_enable logging")
there are now warnings in the U-Boot console on DragonBoard 410c:
apq8016_clk_enable: unknown clk id 122
apq8016_clk_enable: unknown clk id 123
apq8016_clk_enable: unknown clk id 124
apq8016_clk_enable: unknown clk id 125
This is because we don't implement enable() properly for the SDCC clocks.
Currently they are being enabled as part of set_rate().
Fix this by moving the enable calls out of the apq8016_clk_init_sdc()
function and convert them to the equivalent GATE_CLK_POLLED() definitions.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-6-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
GATE_CLK() in its current state is unsafe: A simple write to the clock
enable register does not guarantee that the clock is immediately running.
Without polling the clock status, we may issue writes to registers before
the necessary clocks start running. This doesn't seem to cause issues in
U-Boot at the moment, but for example removing the CLK_OFF polling in TF-A
for the SMMU clocks on DB410c reliably triggers an exception during boot.
Make it possible to poll the branch clock status register, by adding a new
GATE_CLK_POLLED() macro that takes the extra register address. Existing
usages work just as before, without polling the clock status. Ideally all
usages should be updated to specify the correct poll address in the future.
The Qualcomm naming for these clocks is "branch" and not "gate", but let's
keep the existing naming for now to avoid confusion until all others
drivers have been converted.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-4-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
The SDCC_...(n) macros in clock-apq8016.c result in the wrong addresses:
- SDCC1: SDCC_APPS_CBCR(0) = ((0 * 0x1000) + 0x41018) = 0x41018
Should be 0x42018, this is an invalid register close to the USB clocks.
- SDCC2: SDCC_APPS_CBCR(1) = ((1 * 0x1000) + 0x41018) = 0x42018
Should be 0x43018, this is the SDCC1 clock.
When we try to enable SDCC2, we actually end up enabling SDCC1. When we try
to enable SDCC1, we just issue some broken register writes.
This hasn't caused any trouble so far, because the boot firmware is keeping
both SDCC clocks running. However, if these clocks are disabled when
entering U-Boot, MMC initialization is failing.
Fix this by using the proper offset for the macros. The SDCC_CMD_RCGR() was
already correct, but change it the same way for consistency.
Fixes: 085921368b ("arm: Add support for Qualcomm Snapdragon family")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-1-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
At the moment, the dragonboard410c_defconfig specifies a custom
SYS_MALLOC_LEN, lower than the default for Qualcomm boards defined in
arch/arm/mach-snapdragon/Kconfig. It looks like it's too low, since
flashing larger sparse partition images using Fastboot fails with:
FAILED (remote: 'Malloc failed for: CHUNK_TYPE_RAW')
We are not really that memory-constrained for U-Boot on DB410c, so fix
this by just dropping the custom malloc size and using the default.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by:
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-db410c-fixes2-v1-2-76ad994da152@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Commit 359e1d4a57 ("board: dragonboard410c: Use button_cmd instead of
custom code") was made in parallel with commit 8f5685d5d3 ("button:
qcom-pmic: prettify and standardise button labels"), which changed the
default button label from "vol_down" to "Volume Down". This is causing
errors in the console during boot now:
No button labelled 'vol_down'
Fix this by using the new label.
Fixes: 359e1d4a57 ("board: dragonboard410c: Use button_cmd instead of custom code")
Fixes: 8f5685d5d3 ("button: qcom-pmic: prettify and standardise button labels")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by:
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-db410c-fixes2-v1-1-76ad994da152@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
i2c bugfixes for v2025.07-rc4
- designware_i2c: fix globally wrong return value -1 into -ETIMEDOUT
in driver, which leaded in silent errors as a timeout resulted in
an uninitialized value being returned, potentially causing
unexpected behavior.
Change the return value for timeout errors in i2c-designware from 1 to
-ETIMEDOUT. Returning errors as negative values is standard practice in the
u-boot, which enhances error handling consistency across the codebase.
The current behavior can lead to silent errors when functions check for
negative return values to identify errors. For example, in
`dm_i2c_reg_read` from i2c-uclass.c, a timeout results in an uninitialized
value being returned, potentially causing unexpected behavior.
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wojciech Szamocki <wojciech.szamocki@nokia.com>
Signed-off-by: Wojciech Szamocki <wojciech.szamocki@nokia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The bitshift in GEM_CLK_CTRL register is five bits, not two. There are
four bits for each GEM, and one bit reserved in between.
This has caused that using more than one GEM is impossible,
additionally corrupting the GEM0's configuration, leaving GEM0
unusable as well (ie. if GEM0 and GEM1 are used, GEM1 configuration is
going to write to GEM0's registers wrong value, leaving GEM0 unusable)
Signed-off-by: Frantisek Bohacek <rutherther@ditigal.xyz>
Link: https://lore.kernel.org/r/20250522060703.4863-1-rutherther@ditigal.xyz
Signed-off-by: Michal Simek <michal.simek@amd.com>
Commit 21e7fa0e3a ("image: android: handle ramdisk default address")
changed the default behavior for header versions less than or equal to 2.
The ramdisk address (img_data.ramdisk_ptr) is only assigned to *rd_data
if the physical load address (img_data.ramdisk_addr) is equal to 0 or
the Android default ramdisk address.
/* Ramdisk can be used in-place, use current ptr */
if (img_data.ramdisk_addr == 0 ||
img_data.ramdisk_addr == ANDROID_IMAGE_DEFAULT_RAMDISK_ADDR) {
*rd_data = img_data.ramdisk_ptr;
} else {
ramdisk_ptr = img_data.ramdisk_addr;
*rd_data = ramdisk_ptr;
memcpy((void *)(ramdisk_ptr), (void *)img_data.ramdisk_ptr,
img_data.ramdisk_size);
}
When the img_data.ramdisk_addr and the img_data.kernel_addr are the same
*rd_data needs to be assigned to the ramdisk address (ramdisk_ptr), not
the physical address (ramdisk_addr).
As a result of the current behavior, we can no longer boot a kernel on
the Renesas R-Car S4 board.
Add an additional check to the if clause so that the ramdisk address is
assigned when the kernel address and the ramdisk address are the same,
restoring the previous default behavior.
Fixes: 21e7fa0e3a ("image: android: handle ramdisk default address")
Signed-off-by: Eddie Kovsky <ekovsky@redhat.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # khadas vim3
When building with only bootz command, without bootm, images pointer
inside bootm_info structure is not initialized. And since this structure
is stored in stack, the generated error is kind of random, but most of
the time this will generate: "ramdisk - allocation error".
Also, after analysis, this problem could occur with the command booti,
if the command bootm is disabled.
Currently bootm_init() is called by: do_bootz(), do_bootm(), do_booti()
and by do_stm32prog(). And all of these commands execute bootm_run_states()
which access the images pointer stored into bootm_info structure.
So, to fix this issue, just do the assignment unconditionally.
Fixes: c2211ff651 ("bootm: Add more fields to bootm_info")
Signed-off-by: Benjamin ROBIN <dev@benjarobin.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
When lwIP (CONFIG_NET_LWIP) is used instead of legacy stack (CONFIG_NET),
environment flags support associated with network was not built: restore
support of "i" and "m" environment flags.
Signed-off-by: Benjamin ROBIN <dev@benjarobin.fr>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The .scmversion is used by oe-core to append U-Boot version string.
LOCALVERSION is not fully compatible replacement as it adds trailing
"-dirty" string at the end of version string in case the U-Boot git
tree contains uncommitted changes. This behavior itself is correct.
However, OE builds do clone U-Boot sources from git and may apply
additional patches on top, which are not tracked in U-Boot git tree,
but rather in the OE metalayer git tree, which leads to the addition
of "-dirty" string as well.
The .scmversion used by oe-core used to replace the version string
suffix fully, including the "-dirty" string. Reinstate support for
the .scmversion to let OE core do exactly that as it used to do it.
Fixes: 5c02350fa0 ("scripts/setlocalversion: sync with linux v6.9")
Signed-off-by: Marek Vasut <marex@denx.de>
Enable CONFIG_SERIAL_RX_BUFFER on all Renesas R-Car devices which
use the SCIF serial port. This allows receiving large strings at
bulk even if the RX FIFO is small and would otherwise overflow.
The usual trigger for the problem addressed here is a paste of a
very long command into U-Boot command line, somewhere between 400
and 500 characters long. The trailing end of the string is usually
not received and the command line input stops responding due to RX
overflow errors. The CONFIG_SERIAL_RX_BUFFER allows efficient read
of data from the RX FIFO, which prevents the overflow, and allows
safe reception of long pasted strings.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The issue here is that the function read_allocated_block() will report
problems via a negative return value. If we say the return value is
stored in an lbaint_t that can no longer happen (and Coverity discovered
this by reporting a no effect comparison and then dead code). The
problem being fixed by allowing for storing a larger block number will
have to be solved in some other manner.
This reverts commit df2ed552f0.
Addresses-Coverity-ID: 131183
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request efi-2025-07-rc3-3
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/26313
UEFI:
* run dhcp if an http boot option is selected
* separate device path into its own header and add it to the API docs
* rename END to EFI_DP_END
* make x86 SMBIOS tables usable in the EFI context
The way we enable ULPI support today isn't something that should work.
The "optional" keyword in a choice statement is not a documented
feature. To make this work in a supported way, make USB_ULPI something
we ask about if USB_HOST is set. Next, we move the choice of what
viewer to use to be after the framework portion and to depend on that.
We then borrow a few words from the top-level README to make the help
text here clearer. Finally we make the Qualcomm driver select ULPI as
it's required and we make the tegra driver not duplicate a check that
Kconfig now handles for us.
Signed-off-by: Tom Rini <trini@konsulko.com>
The last platform to enable this driver was removed in 2019. Remove this
unused code and documentation now.
Signed-off-by: Tom Rini <trini@konsulko.com>
dwc3_core_init loops 'timeout' times to check if the IP block is out
of reset using 'while (timeout--)'. If there is some issue and
the block doesn't come out of reset, the loop will run till
'timeout' becomes zero and the post decrement operator would set
timeout to 0xffffffff. Though the IP block is not out reset, the
subsequent if check 'if !timeout' would fail as timeout is not
equal to zero and the function proceeds with the initialization.
Use poll API instead to resolve this.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
The EFI boot manager relies on having an IP address before trying to
boot an EFI HTTP(s) boot entry. However, defining it as a boot or
pre-boot command is not always the right answer since it will
unconditionally add delay to the board boot, even if we don't boot
over the network.
So let's do a DHCP request from the boot manager, if 'ipaddr' is
empty and fail early if we don't have an address.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
The EFI-loader code has not been fully converted to use bloblist, so
relies on the SMBIOS-table address being set in global_data.
Set this up in write_tables() so that the SMBIOS tables are actually
available.
Enable the command for x86 QEMU so that the SMBIOS tests actually run.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 83ce35d6ebb ("emulation: Use bloblist to hold tables")
Reported-by: Niklas Sombert <niklas.sombert@uni-duesseldorf.de>
Tested-by: Niklas Sombert <niklas.sombert@uni-duesseldorf.de>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This exported symbol has a very generic name. Rename it to indicate that
it relates to EFI and device-paths.
Fix checkpatch warnings related to use of multiple assignments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Include these function so they can be browsed in the API docs. Exclude
END since it causes a warning, which becomes an error:
./include/efi_device_path.h:22: warning: cannot understand function
prototype: 'const struct efi_device_path END; '
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
These functions are useful for the EFI app. As a first step towards
making these available outside lib/efi_loader, create a separate header
file and include it where needed. Add proper comments to the functions,
since many are missing at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use lbaint_t for blknr to avoid overflow in ext4fs_read_file().
Background:
blknr (block number) used in ext4fs_read_file() could be increased to a
very large value and causes a wrap around at 32 bit signed integer max,
thus becomes negative. This results in an out-of-normal range for sector
number (during the assignment delayed_start = blknr) where delayed_start
sector is typed uint64 lbaint_t. This causes the "Read outside partition"
error.
This patch was tested on the Synology DS116 (Armada 385) board, and a
4TB Seagate HDD.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Log the error if fs_devread() fails when trying to reading outside
partition. This will make bug reporting easier.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Add bloblist support to total_comput platform for passing data
from TF-A using the firmware handoff framework.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
CRC16 is used in ext4_common.c. Build fails without it.
PS:
This is my first patch sent to a mailing list.
If there is anything wrong with it (email format, whitespace, etc.)
please let me know.
Signed-off-by: Marius Dinu <m95d+git@psihoexpert.ro>
1. As this is for MTD-based devices, the Kconfig dependency should be MTD
instead of only spi-nor flashes
2. Initialize saved_buf to avoid crash on free()
3. Remaining size should be set correctly to write_size
Fixes: 03fb08d4ae (env: Introduce support for MTD)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Christian Marangi <ansuelsmth@gmail.com>
In rare cases U-Boot returns an error message when intantiating the RNG
of the CAAM device:
“SEC0: RNG4 SH0 instantiation failed with error 0xffffffff”
This means, that even when the CAAM device reports a finished
descriptor, none is found in the output ring.
This might be caused by a missing cache invalidation before
reading the memory of the output ring
This patch moves the cache invalidation of the output ring from start of
the job to immediately after the notification from hardware where the
output ring will be read.
Signed-off-by: Olaf Baehring <olaf.baehring@draeger.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
A small delay between DRAM read access with wrong parameters and
reconfiguration is necessary.
Without a delay between DRAM read access and a following reconfiguration
this reconfiguration fails for certain DRAM chips (Nanya).
Signed-off-by: Michael Bode <michael.bode@bshg.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
When using SPL on i.mx6 we frequently notice some DDR initialization
mismatches between the SPL code and the non-SPL code.
As the non-SPL code have been tested for long time and proves to be
reliable, let's configure the DDR in the exact same way as the non-SPL
case.
The idea is simple: just use the DCD table and write directly to the DDR
registers.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
The commit dda454e933 ("serial: mxc: Support bulk enabling clocks")
breaks the booting of the BSH SMM S2 board. The analysis of the issue
revealed memory allocation failures during the registration of UART4
clocks as well as other peripherals. Increasing SYS_MALLOC_F_LEN to
0x10000 fixed the issue.
Dropping this option allows it to be set to the default value of
CONFIG_SYS_MALLOC_F_LEN, which is set by default to 0x10000 on
i.MX8M platforms.
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Commit 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options") breaks
the boot of the BSH SMM S2 board. Add options to load U-Boot from raw NAND
sector.
Fixes: 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Commit 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options") breaks
the boot of the BSH SMM S2 board. As stated in the dropped comment, "Some
boards use this value even though MMC is not enabled in SPL, for example
imx8mn_bsh_smm_s2".
Support load of the U-Boot image from raw NAND sector.
Fixes: 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Commit 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options") breaks
the boot of the BSH SMM S2 board. As stated in the commit itself, "Some
boards use this value even though MMC is not enabled in SPL, for example
imx8mn_bsh_smm_s2".
Support load of the U-Boot image from raw NAND sector. This is equivalent
to load from MMC raw sector.
Fixes: 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Migrate to OF_UPSTREAM for phyCORE-i.MX93 since board can use upstream
Linux kernel device-tree for phyBOARD-Segin-i.MX93.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The function arch_spl_mmc_get_uboot_raw_sector() was never compiled,
even when the option CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION was
enabled. So rename the macro SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION to
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION.
Fixes: 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Describe the newly-supported clock controller of TH1520 in SoC
devicetree, replace dummy clocks with the controller-supplied ones and
add correct clocks for GPIO controllers.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The clock driver is essential for TH1520 SoCs to operate. Select the
driver in SoC Kconfig entry.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The driver is adapted from Linux kernel's version of clk-th1520-ap.c,
with only output clocks for external sensors, which are barely useful in
bootloaders, removed.
Same as the mainline driver, it currently lacks of ability to enable and
reconfigure PLLs, which could be implemented later.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
TH1520 SoC ships several IOPMPs protecting various on-chip peripherals.
They must be configured before accessing the peripherals. Let's
initialize them in SPL harts_early_init().
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Support for eMMC, SD card, GPIO and SPL have been available in LPi4A
port. Update the documentation of support status and build
instructions.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Adjust Kconfig and defconfig and add SPL initialization code for
Lichee Pi 4A. Then enable SPL support which we've added for TH1520 SoC
earlier. The board devicetree is changed to use TH1520 binman
configuration to generate bootable images.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add binman configuration for TH1520 SoC, whose BROM loads the image
combined into SRAM and directly jumps to it. The configuration creates
u-boot-with-spl.bin where the SPL code locates at the start and the DDR
firmware is shipped.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Describe DRAM controller integrated in TH1520 SoC and preserve it in SPL
devicetree blob.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Memory node is necessary for TH1520 SPL to configure size and base
address of DRAM. Let's preserve it in SPL devicetree blob.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
SPL for TH1520 requires CPU and boot UART nodes to function. Preserve
them in SPL devicetree blob with bootph-pre-ram property.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch cleans the vendor code of DDR initialization up, converts the
driver to fit in DM framework and use a firmware[1] packaged by binman to
ship PHY configuration.
Currently the driver is only capable of initializing the controller to
work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants
of LicheePi 4A boards and I could test with. Support for other
configurations could be easily added later.
Link: https://github.com/ziyao233/th1520-firmware # [1]
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Introduce the SoC-specific code and corresponding Kconfig entries for
TH1520 SoC. Following features are implemented for TH1520,
- Cache enable/disable through customized CSR
- Invalidation of customized PMP entries
- DRAM driver probing for SPL
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The BROM of TH1520 always initializes UART0's parent clock and
configures the baudrate to 115200. Describe the clock frequency to make
UART function correctly in SPL without introducing CCF.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Designed before a standard set of cache management operations defined in
RISC-V, earlier T-Head cores like C906 and C910 provide CMO through the
customized extension XTheadCMO, which has been used in the CV1800B port
of U-Boot.
This patch splits XTheadCMO-related code into a generic module, allowing
SoCs shipping T-Head cores to share the code.
Link: https://github.com/XUANTIE-RV/thead-extension-spec
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
JH7110 drivers are missing support for CPU frequency scaling, so override
upstream device-tree to use default clock rates for syscrg. This override
duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Liang <ycliang@andestech.com>
- use upstream alias name for cpu and timer nodes
- remove bootph-pre-ram hint from parent nodes
- drop S7 cpu core "okay" status
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Move unnecessary clock frequency assignment out of device-tree and into the
board config header so that the ns16550 serial driver can successfully init
during SPL after failing to resolve the parent clock from upstream dts. The
serial driver will then resolve clock frequency from device-tree node parent
clock at init during Main app as it is expected by upstream.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Fix the erroneous header guard for insn-def.h to reflect the correct
header name.
Fixes: bfc8ca3f7f ("riscv: Add support for defining instructions")
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Similar to AArch64's case, Clang may wrongly fold accesses to gd pointer
which is defined with register qualifier into constants, breaking
various components.
This patch defines gd as a macro when building with Clang or LTO, which
expands to get_gd() that accesses gp pointer in assembly, making RISC-V
ports function properly and preparing for introduction of LTO in the
future. Board initialization code is also adapted for non-assignable gd.
Reported-by: Nathaniel Hourt <I@nathaniel.land>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Drop filename property for proper U-Boot entry since binman takes
"u-boot-nodtb.bin" as the default filename for u-boot-nodtb entries.
This follows efe9c12322 ("riscv: dts: binman.dtsi: Switch to
u-boot-nodtb entry for proper U-Boot") to clean binman.dtsi up.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently
not supported for Risc-V. Hence, for bootm, disallow booting a FIT
or a legacy image that was built for an arch type which is different
than the current arch and for booti, set the arch type to be the
same as the current arch.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Select between the 32-bit or 64-bit arch type for the image headers
depending on how the build is configured.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>
That's how it looks like without CONFIG_MMC_SUPPORTS_TUNING before the
patch:
aarch64-buildroot-linux-gnu-ld.bfd: drivers/mmc/cv1800b_sdhci.o: in function `cv1800b_execute_tuning':
drivers/mmc/cv1800b_sdhci.c:47:(.text.cv1800b_execute_tuning+0x50): undefined reference to `mmc_send_tuning'
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When there is no reply from the TFTP server, do_tftpb() should
eventually time out. Add a 10 second timer for that purpose.
Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Functions called from EFI applications should not do console output.
Refactor the wget code to implement this requirement. The wget_http_info
struct is used to hold the boolean that signifies whether the output is
allowed or not.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
wget_do_request() currently does so little before calling the static
function wget_loop() that we may as well rename wget_loop() to
wget_do_request() and put everything in one function.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Pull request efi-2025-07-rc3-2
Documentation:
* Add test/py/requirements.txt to documentation
* Use globing for selecting pytest files
UEFI:
* Provide a function to disable ANSI output during tests
Other:
* test: allow multiple config options in buildconfigspec
* test: allow testing with NET_LWIP=y
In some cases we have alternative configuration options that supply the
same functionality, e.g CONFIG_NET and CONFIG_NET_LWIP.
Allow to specify all of them as arguments for buildconfigspec() and execute
the text if any of these is fulfilled, e.g.
@pytest.mark.buildconfigspec('net', 'net_lwip')
Update the documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
After the original series was merged, Quentin noted that we could handle
adding additional tests more easily by using the glob feature. Do so.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
As noted by Quentin, in CI we should be at least versioning the pytest
that we install. To avoid problems later, go with the whole requirements
file being used. Furthermore, our documentation building for readthedocs
must also have pytest so install the requirements file there as well.
Reported-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
We don't want ANSI escape-sequences written in tests since it is a pain
to check the output with ut_assert_nextline() et al.
Provide a way to tests to request that these characters not be sent.
Add a proper function comment while we are here, to encourage others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Now that cyclic_unregister() is safe to call on a not-registered
cyclic_info, we can make cyclic_register() behave like the mod_timer()
and hrtimer_start() APIs in linux, in that they don't distinguish
between whether the timer was already enabled or not; from the point
of the call it is, with whatever timeout/period is set in that most
recent call.
This avoids users of the cyclic API from separately keeping track of
whether their callback is already registered or not, and even if they
know it is, can be used for changing the period (and/or the callback
function) without first doing unregister().
See also this recent'ish message from kernel maintainer Thomas
Gleixner on that API design for timer frameworks:
https://lore.kernel.org/lkml/87ikn6sibi.ffs@tglx/
First of all the question is whether add() and mod() are really
valuable distinctions. I'm not convinced at all. Back then, when we
introduced hrtimers, we came to the conclusion that hrtimer_start()
is sufficient.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
Make cyclic_unregister() safe to call with an already unregistered, or
possibly never registered, struct cyclic_info. This is similar to how
the various timer APIs in the linux kernel work (they all allow
calling delete/cancel/... on an inactive timer object).
This means callers don't have to separately keep track of whether
their cyclic callback is registered or not, and avoids them trying to
peek into the struct cyclic_info for that information - which leads to
somewhat ugly code as it would have to be guarded by ifdef
CONFIG_CYCLIC.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit f6eff35b8c ("cmd: tlv_eeprom: handle -ENODEV error from
read_eeprom function") removed the needed 'return 0' after a successful
read. As a result, the usage message is shown when 'tlv_eeprom read' is
successfully called.
Let's fix it by adding the needed 'return 0'.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable DM_SERIAL for Marvell Kirkwood boards that have not been converted.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This device has a hardware random number generator. Linux can
use this feature to randomize the location of the kernel in
memory for better security. However, that functionality is only
available if the bootloader firmware provides it. Enable support
for it in the default configuration for this device.
Signed-off-by: Benjamin Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <sr@denx.de>
With commit cc4e8af2c5, fsl_enetc register accessors have been split to
handle different register offsets on different SoCs. However, for
internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed
without adding the SoC specific MAC register offset.
As a result, the network support for the Kontron SMARC-sAL28 and
probably other boards based on the LS1028A CPU is broken.
Add the SoC specific MAC register offset to calculation of imdio.priv to
fix this.
Fixes: cc4e8af2c5 ("net: fsl_enetc: Split register accessors")
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # LS1028A
Tested-by: Tim Harvey <tharvey@gateworks.com> # imx95_19x19_evk
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
On 32-bit systems, e.g. i.mxrt-1170 fdt_addr_t may only be 32-bit.
Cast to a "long long" for garbage avoidance.
Signed-off-by: Jonathan Currier <dullfire@yahoo.com>
The commit ac30d90f33 ("clk: Ensure the parent clocks are enabled
while reparenting") add a call to clk_enable() for the parent clock.
For clock drivers that do not implement the enable() ops, like most
Rockchip clock drivers, this now cause the set_parent() ops to never
be called when CLK_CCF=n (default for Rockchip).
clk_enable() typically return -ENOSYS when the enable() ops is not
implemented by the clock driver, with CLK_CCF=y clk_enable() instead
return 0 when the enable() ops is unimplemented.
Change to ignore -ENOSYS from the newly introduced clk_enable() call to
fix this regression and restore the old behavior of set_parent() ops
being called regardless of if enable() ops is implemented or not.
Fixes: ac30d90f33 ("clk: Ensure the parent clocks are enabled while reparenting")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Dang Huynh <danct12@riseup.net>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Imitate in dtbdump what initrddump does for color,
newlines and input handling. The output parsing in
the CI is strict and with the current output the CI
is not recongnizing the prompt '=>'.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Mention that RISC-V supports semihosting.
Update the link to ARM's semihosting documentation
Update SPDX identifier to current format.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add this test to the documentation. No changes to the test itself were
required.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this test to the documentation. There was already a function comment
that included the argument, so convert it to the right style to be
rendered correctly in output.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this test to the documentation. None of the functions had comments,
so attempt to explain what each does.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this test to the documentation. We need to add a code-block
annotation to the example and indent it correctly. We also need to
document the do_test_efi_helloworld_net function and that in turn means
changing the documentation to test_efi_helloworld_net_http and
test_efi_helloworld_net_tftp to reflect what is and isn't done in those
functions themselves now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this test to the documentation. We need to move the import to follow
the main comment so that it renders correctly, and add a code-block
annotation to the example and indent it correctly. Next, neither of the
functions had comments themselves, so document them now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add this test to the documentation. While the diff appears large at
first, the only changes within the test are to move the imports to
follow the pydoc comment and then to code-block and indent the example
configuration.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some of the functions were missing pydoc comments. Add them so they will
be included in the documentation.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the test_net_boot.py test to the generated documentation. While most
of this was already commented correctly for inclusion the biggest
problem was examples of code without a code-block notation. This in turn
broke parsing. Add the missing notations. We also must have the comment
prior to any import lines or it will not be seen as a comment on the
overall file and thus not included.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to easily document pytests, we need to include the autodoc
extension. We also need to make sure that for building the docs, CI
includes pytest and that we have PYTHONPATH configured such that it will
find all of the tests and related files. Finally, we need to have our
comments in the test file by in proper pydoc format in order to be
included in the output.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Begin the work of documenting all of our pytests. To do this, we should
have a directory under develop for it as there will be a large number of
new files. As the current document is referenced externally in a number
of locations, add the sphinx_reredirects module so that we can redirect
from the old location to the new.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The help string for the `setenv -e' command shows a comma being used as
the separator between address and size for the -i option, which deals
with UEFI Variables contents passed as a buffer in memory.
This is no longer the case since commit 2b3fbcb59f ("efi_loader: use
':' as separator for setenv -i") and commit 8f0ac536d4 ("efi: change
'env -e -i' usage syntax"), which changed the separator from a comma to
a colon.
Therefore fix this last bit of the help string accordingly.
While at it, fix the comment of function do_env_set_efi(), which also
mentions a comma as separator.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The write_host_id is the last element here and order does matter. This
may have gone unnoticed before as by default all elements are 0, but
if this is updated to a different host, it will not work. Update
the order so write_host_id is the last element in all current secure
board configs.
Reported-by: Prashant Shivhare <p-shivhare@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Since Ubuntu Jammy lz4-tools is only a virtual package which pulls in
lz4 as dependency.
Update documentation too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add CMD_CACHE to list of configs implied by TI_COMMON_CMD_OPTIONS.
This allows the usage of cache commands from U-Boot prompt.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
In kernel device tre commit 714d54917147: ("arm64: dts: ti: k3-j722s-evm:
Enable PMIC") adds pmic support.
Above commit of kernel get synched in u-boot by sha ab06a533f08e:("Squashed
'dts/upstream/' changes from 8531b4b4988c..955176a4ff59").
Now, PMIC DT is available in u-boot for J722S EVM,
So enable PMIC in defconfig as well.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
I haven't been involved in U-Boot development for quite a while, so
CCing me on patches isn't currently useful. Add a .mailmap entry that I
believe will turn off patch CCs. This can always be removed if I become
active again! Remove myself from a few MAINTAINERS failed and the git
mailrc file too.
Currently, Synopsis xgmac driver only works if DMA region is under 4GB.
This change enables the DMA buffers allocations above 4GB memory
regions.
Signed-off-by: Nikunj Kela <nikunj.kela@sima.ai>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case, we move to having a
"default FSP_VERSION2 if INTEL_APOLLOLAKE" in order to get the desired
outcome.
Signed-off-by: Tom Rini <trini@konsulko.com>
This change adds `BOOT_DEVICE_NVME` to the `enum` list in
`arch/x86/include/asm/spl.h`,
enabling NVMe as a recognized boot device for SPL (Secondary Program
Loader).
Tested x86 hardware with coreboot + U-Boot payload.
Verified successful boot to NVMe drive.
Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
This was a temporary workaround for the Tegra210 Jetson Nano board. It is
not used by any device anymore, so let's remove it.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since most boards now use the same generic device config header, move its
setup to SoC Kconfig instead of setting SYS_CONFIG_NAME in each board's
Kconfig.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The LG Optimus 2X is a touchscreen-based, slate-sized smartphone designed
and manufactured by LG that runs the Android operating system. The
Optimus 2X features a 4" WVGA display, an Nvidia Tegra 2 dual-core chip,
512 MB of RAM and extendable 8 GB of internal storage. UART-B is default
debug port.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add support for Skyworks AAT2870 LED Backlight Driver and Multiple LDO
Lighting Management Unit. Only backlight is supported as for now. Supported
backlight level range is from 2 to 255 with step of 1.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
LG LH400WV3-SD04 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Hitachi TX10D07VM0BAA is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add support for 8-bit CPU driven (primary and secondary) display signal
interface found in Tegra 2 and Tegra 3 SoC.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
MAX8907 PMIC has embedded poweroff function used by some device to initiane
device power off. Implement it as optional sysreset driver guarded by
kconfig option and system-power-controller device tree property.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Added a new regulator driver for the MAXIM MAX8907 PMIC, providing
essential regulator functionalities and incorporated the necessary binding
framework within the core PMIC driver.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Releasing a GPIO on Tegra necessitates changing its configuration to SFIO
to activate its special function. Without this reconfiguration, the special
function will be unavailable.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it
properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits
(10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii()
function to set the PHY interface field and RMII_MODE bit.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update GMAC speed and flow control fields in GRF_SOC_CON1 to use
RK3288_GMAC_* prefix, ensuring a consistent naming convention. It also
shifts each mask/bit definition to match the actual hardware bits, which
makes future usage easier.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC.
Specification:
- 1/2 Gib RAM
- Optinal EMMC
- SD-Card
- HDMI / MIPI CSI / MIPI DSI
- USB 2.0 Host (Type-A)
- USB 2.0 Host / OTG (Type-C)
- No Ethernet
This patch adds U-Boot support for the LCKFB TaishanPi RK3566 board, including:
- U-Boot device tree
- Default defconfig
- Board documentation
- MAINTAINERS entry
Changes in v2:
- Removed unused configs from `lckfb-tspi-rk3566_defconfig`
- Reordered TaishanPi entry in `doc/board/rockchip/rockchip.rst` alphabetically
Link to v1:
https://lore.kernel.org/u-boot/tencent_95ED0C0545D87B6A8C4B62EC045D53AD2406@qq.com/
Signed-off-by: Jiehui He <jiehui.he@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The 5 Max is another board in the Orange Pi 5 family.
It's overall similar to the 5 Plus, but in a smaller form factor,
which leads to some I/O being reshuffled, but nothing relevant
to u-boot.
So, just reuse the config for the 5 Plus and adjust the DT names.
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Ilya Katsnelson <me@0upti.me>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add fit_addr_r to the environment to allow us to boot from a FIT image.
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
'net_fetch_cmd' is not defined by the K3 board files. They
use the more common 'get_cmd' from NXP products.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Extensions are now handled by the board-code. Remove this non-existing
function to proper boot from network.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
The bootstd code itself does not have any dependency on BLK in order to
build. However, in order to minimize size growth of non-migrated
platforms, change this from being "default y" to "default y if BLK".
This will make it easier to begin migration of platforms which do not
have any BLK-class device but do want to use bootstd.
Signed-off-by: Tom Rini <trini@konsulko.com>
!A || (A && B) is equivalent to !A || B
Drop the unused middle expression to simplify the statement.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.
This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in SFDP. commit bebdc23750 ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().
Adding a bit of debug info to lmb_fix_over_lap_regions() brings:
lmb_fix_over_lap_regions: base1 0x280000-0x6005ac > base2 0x600000-0x6000d1
So this is because the FIT image gets loaded to the kernel_addr_r at
0x280000 while the pxe-file is already living at 0x600000, only 3.5MB
behind.
In commit 4acc8bb044 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS
for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory
layouts for the mentioned socs in sync.
Adjusting the env-layout on px30 to this scheme, magically solves the
overlap issue and also brings px30 more in line with the other mentioned
SoCs.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The IO domain driver controls the I/O voltage for various pins,
MMC included.
Enable it by default for all supported Rockchip SoCs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The logic in the core reads the nr_pins of the controller and uses it as
the index of the first pin in the bank (pin_base) it currently parses.
It then increments the number of pins in the controller before going to
the next bank.
This works "fine" for controllers where nr_pins isn't defined in their
rockchip_pin_ctrl struct as it defaults to 0. However, when it is
already set, it'll make the index pin of each bank offset by the number
in nr_pins declared in the struct at initialization, and it'll keep
growing while adding banks, which means the total number of pins in the
controller will be misrepresented.
Additionally, U-Boot proper may probe this driver twice (pre-reloc and
true proper) and not reset nr_pins of the controller in-between meaning
the second probe will have an offset of the actual correct nr_pins.
Instead, let's just store locally the number of pins in the controller
and make sure it's reset between probes.
Finally, this stops modifying a const struct which will soon be
triggering a CPU abort at runtime.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use of SHA256 checksum validation on ARMv7 SoCs can be very time
consuming compared to when used on a ARMv8 SoC with Crypto Extensions.
Add support for use of the much faster CRC32 hash algo when SHA256 is
not supported in SPL. Also use FIT_HASH_ALGO to simplify the ifdefs when
no known hash algo has been compiled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Provide a compatible string in the config nodes that U-Boot can use to
help decide which configuration to use with SPL_LOAD_FIT_FULL=y and
FIT_BEST_MATCH=y.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO,
0x7f8000.
u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC
media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S
(8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000).
SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the
generated simple-bin binman image, and can be calculated as:
SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000
Add this value as a default value for ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Declare arch and compression at the top of the file to avoid needing
ifdefs in every usage.
Add a few comments to help with the remaining #ifdefs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The U-Boot image is currently being identified as an invalid OS in
spl_fit_image_get_os() due to case sensitive compare.
Use the correct lower-case value to fix this.
Fixes: e0c0efff2a ("rockchip: Support building the all output files in binman")
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
This was only used on RK3288 Chromebooks and the EVB.
If it follows the same pattern as for RK3399 Chromebooks where their
maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that
the generic u-boot-rockchip-spi.bin is now enough, let's do the same for
RK3288 and remove the last Rockchip users of u-boot.rom (and HAS_ROM
symbol).
At the same time, remove HAS_ROM symbol from the RK3288 Chromebooks and
EVB configs since they were used only for that.
SYS_SPI_U_BOOT_OFFS offset in rockchip-u-boot.dtsi for the u-boot-img
node of simple-bin-spi binman image matches the one used in u-boot.rom
except for the EVB.
The EVB doesn't have ROCKCHIP_SPI_IMAGE symbol enabled, so HAS_ROM had
no effect anyway. Even if it had, this would not have been enough
considering that SPL_SPI_LOAD symbol is not set, so U-Boot proper could
not be loaded from SPI even if SPL/TPL does.
Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.
[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
This was only used on RK3399 Gru Chromebooks and their maintainer
(Simon) agreed[1] to its removal on the basis that the generic
u-boot-rockchip-spi.bin is now enough, so let's do that.
At the same time, remove HAS_ROM symbol from the Gru Chromebooks config
since they were used only for that.
Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.
[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Make sure unused exfat_humanize_bytes() and exfat_print_info()
functions are not compiled into U-Boot code base. This also removes
CID 550300: Integer handling issues (INTEGER_OVERFLOW)
in exfat_humanize_bytes() , which is now surely unreachable.
Signed-off-by: Marek Vasut <marex@denx.de>
In case the filename is too long, longer than PATH_MAX - 1, it
would overflow dirs->dirname array. Add missing check and also
use strncpy() to prevent the overflow in any case.
Fixes CID 550305: Security best practices violations (STRING_OVERFLOW)
Signed-off-by: Marek Vasut <marex@denx.de>
On K3 devices two drivers ti_sci and ti_sci_dm are supporting firmware
functions. At run time one of driver is used.
Driver ti_sci already initializing head for dev_list in its probe
function, but it was missed in ti_sci_dm driver.
So add head list init support for ti_sci_dm driver.
While at this, move init of list before usages in both functions.
Fixes: 5d5a699855a7("firmware: ti_sci: Add support for Resoure Management at R5 SPL stage")
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
This config was defined with the default value of 8 MiB. However,
the default value is different when CONFIG_ARM64 is enabled and
should be 64 MiB.
Remove this config from the A53 defconfig and use the correct
default config.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Job IDs are positive integers greater than 1. 0 is not a valid job ID,
therefore fix the comparison in do_wait().
Fixes Coverity defects:
*** CID 550296: Control flow issues (NO_EFFECT)
/cmd/spawn.c: 172 in do_wait()
166 for (i = 0; i < CONFIG_CMD_SPAWN_NUM_JOBS; i++)
167 if (job[i])
168 ret = wait_job(i);
169 } else {
170 for (i = 1; i < argc; i++) {
171 id = dectoul(argv[i], NULL);
>>> CID 550296: Control flow issues (NO_EFFECT)
>>> This less-than-zero comparison of an unsigned value is never true.
"id < 0UL".
172 if (id < 0 || id >
CONFIG_CMD_SPAWN_NUM_JOBS)
173 return CMD_RET_USAGE;
174 idx = (int)id - 1;
175 ret = wait_job(idx);
176 }
177 }
*** CID 550297: Integer handling issues (INTEGER_OVERFLOW)
/cmd/spawn.c: 174 in do_wait()
168 ret = wait_job(i);
169 } else {
170 for (i = 1; i < argc; i++) {
171 id = dectoul(argv[i], NULL);
172 if (id < 0 || id >
CONFIG_CMD_SPAWN_NUM_JOBS)
173 return CMD_RET_USAGE;
>>> CID 550297: Integer handling issues (INTEGER_OVERFLOW)
>>> Expression "idx", where "(int)id - 1" is known to be equal to -1,
overflows the type of "idx", which is type "unsigned int".
174 idx = (int)id - 1;
175 ret = wait_job(idx);
176 }
177 }
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
CC: Tom Rini <trini@konsulko.com>
Clang's preprocessor may emit extra spaces for lines starting with '#'.
Lines with these extra characters cannot be handled by Kconfig and will
be ignored with warnings like,
unexpected data: # CONFIG_OF_BOARD_FIXUP is not set
Those options that is expected to be assigned explicitly with N will be
set to the default value, messing up board configurations.
Let's sed these spaces away to ensure board configurations could be
correctly generated with Clang.
Link: https://github.com/llvm/llvm-project/issues/78778
Fixes: 2027e99e61 ("Makefile: Run defconfig files through the C preprocessor")
Reported-by: Nathaniel Hourt <I@nathaniel.land>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Introduce support for env in generic MTD. Currently we only support SPI
flash based on the lagacy sf cmd that assume SPI flash are always NOR.
This is not the case as to SPI controller also NAND can be attached.
To support also these flash scenario, add support for storing and
reading ENV from generic MTD device by adding an env driver that
base entirely on the MTD api.
Introduce a new kconfig CONFIG_ENV_IS_IN_MTD and
CONFIG_ENV_MTD_DEV to define the name of the MTD device as exposed
by mtd list.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Currently, when decompressing a gzip-compressed image during bootm, a
generic error such as "inflate() returned -5" is shown when the buffer is
too small. However, it is not immediately clear that this is caused by
CONFIG_SYS_BOOTM_LEN being too small.
This patch improves error handling by:
- Detecting Z_BUF_ERROR (-5) returned from the inflate() call
- Suggesting the user to increase CONFIG_SYS_BOOTM_LEN when applicable
- Preserving the original return code from zunzip() instead of overwriting
it with -1
By providing clearer hints when decompression fails due to insufficient
buffer size, this change helps users diagnose and fix boot failures more
easily.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Since 7506c15, HOST_ARCH is now used by the EFI loader even when
CONFIG_SANDBOX is disabled. When cross-compiling, the Makefile defines
HOST_ARCH based on the cross-compiler prefix, but this definition fails
to cover some common compiler prefixes. When cross-compiling U-Boot in
nixpkgs, we use CROSS_COMPILE=armv6l-unknown-linux-gnueabihf-, which
results in HOST_ARCH being undefined and causes a build failure.
Fix this by adding armv6l to the match for ARM. Also add armv5tel,
as this is another possible ARM compiler prefix.
Signed-off-by: ZHANG Yuntian <yt@radxa.com>
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
- CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26081
- STM32 MCUs:
- Fix console cmdline
- Add support NT35510 panel controller on stm32f769i-disco board
- Fix dfu alt buffer clearing
- Enable scan and start for AB schema on STM32MP15 DHSOM
- Add stm32mp2 support for dwc_eth_qos
ubi fixes for v2025.07-rc2
- fix bug: Put MTD device after it is not used
drop MTD device reference after it is not longer used!
port from upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
from Alexander Vickberg
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: ec2933e543 ("board: stm32mp1: move set_dfu_alt_info in st common directory")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Support FRIDA FRD400B25025-A-CTK display on stm32f769-disco board.
As reported in the section 8.3 (i. e. Board revision history) of document
UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes
related to the board revision addressed by the patch:
- Board MB1166 revision A-09:
- LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK
This means that the MB1166-A09 is using an NT35510 panel controller,
unlike the previous versions which use an OTM8009A controller.
Therefore, let's add support for NT35510 panel handling to the
stm32f769-disco board configurations.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
[backport from Linux commits 9b26d5c044d6a29ebfb1845408e0f2a7c5f89818
and 219a1f49094f50bf9c382830d06149e677f76bed]
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the
Novatek NT35510-based panel family.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
[backport from Linux commit db4fc2c79c533986795a7750e9a12caf9d620b48]
As reported in the section 8.3 (i. e. Board revision history) of document
UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes
related to the board revision addressed by the patch:
- Board MB1166 revision A-09:
- LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK
The patch adds the DTS support for the new display which belongs to the
the Novatek NT35510-based panel family.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
For the STM32MP15 DHSOM, change the default environment so an AB schema
on a device can be detected.
For this the define "SCAN_DEV_FOR_BOOT_PARTS" is overwritten and
appended.
The detection works by looking for the partitions with specific lables.
The name of those partitions are in the variables and its defaults:
* dh_ab_partname_primary=rootfs-a
* dh_ab_partname_secondary=rootfs-b
To prevent being hanging at bootcmd, enable "CONFIG_BOOT_RETRY" and
"CONFIG_RESET_TO_RETRY", but the timer will only be activated, if the AB
partitions are detected.
Signed-off-by: Pascal Zimmermann <pzimmermann@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Make it possible to substitute the 'part list' command inside
'scan_dev_for_boot_part' with a custom board specific implementation.
For this the new define 'SCAN_DEV_FOR_BOOT_PARTS' is introduced.
Signed-off-by: Pascal Zimmermann <pzimmermann@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The MTD device reference is dropped via put_mtd_device, however its
field ->index is read and passed to ubi_msg. To fix this, the patch
moves the reference dropping after calling ubi_msg.
Signed-off-by: Pan Bian <bianpan2016@163.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
Signed-off-by: Alexander Vickberg <wickbergster@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
For Ethernet to work on the RZ/G2L board, we need to enable support for
the ksz9131 PHY and enable random MAC address generation (as no MAC
address is programmed into the board).
We also enable the `dhcp`, `mii` and `ping` commands so that Ethernet
functionality can be tested and used to boot Linux.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we introduce optional de-assertion and re-assertion of
a reset signal in ravb_probe() and ravb_remove().
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we move all R-Car specific code into new functions and
introduce a device_ops function pointer table.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Correctly handle RX errors in ravb_recv() by returning 0 instead
of -EAGAIN on RX error.
In case the RAVB driver detects an RX error in ravb_recv(), it must
not return the -EAGAIN, but instead must return 0. Both error codes
are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0
at the end of eth_rx(), but negative return code from the .recv()
callback does not trigger .free_pkt() callback, which would clean
up and re-enqueue the descriptor which holds the currently received
corrupted packet. The .free_pkt() must be called for this descriptor,
otherwise the follow up received data become corrupted too, even if
those packets are correctly received. Returning 0 from the .recv()
callback assures the corrupted packet is not processed by the network
stack, but is skipped instead.
For TFTP loading, an RX error produces the timeout "T" output and
resumes the TFTP loading operation shortly afterward, without any
data corruption.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
When building the flash.bin of i.MX95 with binman,
mkimage.imx-boot.spl, mkimage.imx-boot.u-boot,
mkimage-out.imx-boot.spl and mkimage-out.imx-boot.u-boot are created.
Add these files to CLEAN_FILES so that they can be removed when running
"make clean".
Signed-off-by: Alice Guo <alice.guo@nxp.com>
This patch adds i.MX95 19x19 EVK board basic support.
Messaging unit for EdgeLock Secure Enclave, messaging unit for System
Manager, uSDHC for SD Card, gpio, lpuart are supported now.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds V2X container support for i.MX95. Since V2X container
may not be included in ahab-container.img of i.MX95, check if V2X
container exists in order to get the correct image end.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
i.MX95 uses binman to invoke mkimage to create image container. 2 image
containers are needed currently. The first one is composed of
ahab-container.img, LPDDR firmware images, OEI images, System Manager
image and u-boot-spl.bin. The second one is consisted of ARM Trusted
firmware and u-boot.bin.
Because DDR OEI image and LPDDR firmware images have to be packaged
together and named as m33-oei-ddrfw.bin by binman, so imx9_image.sh does
not check if m33-oei-ddrfw.bin exists.
When using "make imx95_19x19_evk_defconfig; make", imx9_image.sh will
delete the line for u-boot.bin in container.cfg. In fact, binman is
always called after the u-boot.bin is built, so imx9_image.sh does not
check if u-boot.bin exists.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
i.MX95 needs to combine DDR PHY firmware images and their byte counts
together, so add a new entry type nxp-header-ddrfw for this requirement.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
i.MX95 only supports low power boot, which means A55 is kicked by M33.
There is no ROM runs on A55 in such case so that deselect IMX8_ROMAPI
for i.MX95.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
This patch adds i.MX95 Kconfig and Makefile. i.MX95 uses SCMI.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.
So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
@protocols is an array of protocol identifiers that are implemented,
excluding the Base protocol. Four protocol identifiers are packed into
each array element. The number of elements of @protocols is specified by
callee-side.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Clock driver based on SCMI clock management protocol in Linux checks
clock state, parent and rate control permissions. To be consistent with
the kernel driver, add this check here. CLOCK_GET_PERMISSIONS is from
ARM System Control and Management Interface Platform Design Document 3.2.
When using common clock framework (CCF), use the clock signal ID to get
the clock registered by clk_register() in scmi_clk_probe(), and then
obatin the struct clk_scmi variable with container_of().
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds the command CLOCK_PARENT_SET that can be used to set the
parent of a clock. ARM SCMI Version 3.2 supports to change the parent of
a clock device.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
SCMI Performance domain management protocol is intended for performance
management of groups of devices or APs that run in the same performance
domain. The functionality provided by the callee-side can be used by
passing the corresponding message_id.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
SCMI misc protocol is intended for miscellaneous functions which are
device specific and are usually defined to access bit fields. It is i.MX
specific. This patch adds SCMI misc protocol protocol_id and message_id
for getting the ROM passover data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch adds SCMI pin control protocol support to make the pin
controller driver based on SCMI, such as
drivers/pinctrl/nxp/pinctrl-imx-scmi.c, can be bound to the SCMI agent
device whose protocol id is 0x19.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
This patch provides a pinctrl driver based on SCMI pin control protocol.
Currently, only the PINCTRL_CONFIG_SET command is implemented.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
If there is a SoC specific SCMI protocol driver, using
scmi_proto_driver_get() function can avoid to add SoC specific code to
scmi_agent-uclass.c.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
U_BOOT_SCMI_PROTO_DRIVER macro is used to add a SCMI protocol driver to
scmi_proto_driver list. scmi_proto_driver_get() function can be used to
match a SCMI protocol id and its driver.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Just like TF-A and OP-TEE, the documentation states a custom path for DM
can be provided at build time by setting TI_DM. This should then set
ti-dm-path which updates ti-dm node filenames in binman.
Two issues prevent this from functioning for most K3 boards. One is when
then DM firmware name is inside a blob-ext node instead of a ti-dm node.
The second is when the filename in the ti-dm node is a pointer to a
blob-ext node. In this case even though the filename is updated, the
filename in the blob-ext is not, so build can fail if the default
file in the blob-ext cannot be found, even if the updated ti-dm file
does exist.
Fix both of these for all K3 by removing any indirect ti-dm nodes and
making sure all DM nodes are labeled with "ti-dm".
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Rather than hard coding the maximum memory size, lets just define the
CFG_MAX_MEM_SIZE so get_effective_memsize() will return the correct
value without modification.
Signed-off-by: Bryan Brattlof <bb@ti.com>
SeeedStudio BeagleBone Green Eco (BBGE) is a clone of the BeagleBone Green
(BBG). It has minor differences from the BBG, such as a different PMIC,
a different Ethernet PHY, and a larger eMMC.
The PMIC is not yet supported in mainline, but the work is ongoing.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Enable UHS modes for SD by enabling configs for voltage regulator
drivers, IO voltage switching, and configs to support UHS modes.
The am64x SoC has an internal LDO which does voltage switching,
but the MMC_IO_VOLTAGE config is still required to be able to
switch voltage for SD.
While we are here, am64x HS400 mode has been descoped as per
datasheet [0] even though we still initialize to HS200, clean
this up by switching to MMC_HS200_SUPPORT config options.
[0] https://www.ti.com/lit/gpn/am6442
Signed-off-by: Judith Mendez <jm@ti.com>
Like other TI platforms, let's enable the ESM. This allows the ESM to be
programmed during boot, and the PMIC associated with the ESM output,
enabling blocks like the RTI watchdogs to actually cause the system to
reset.
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Initialize the ESM & PMIC ESM. This allows things like
the watchdog to reset the board when tripped.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Enable basic EFI debug features, switch over to stdboot, enable GPIO,
LED and PMIC used on this platform. And enable UHS mode support for SD
cards in U-Boot.
Unlike other BeagleBoard products, BeagleY-AI does not have
alternative onboard non-volatile memories, so capsule support does not
make sense.
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Drop SPI, EMMC, GPIO expanders that come with EVM etc.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Drop using j722s_evm defconfig since the evm has numerous features that
we do not need on BeagleY-AI platform. As new peripherals get added to
EVM support, we end up having to cleanup after in beagle configurations.
Instead of doing that, just split up BeagleY's configuration
independently out.
NOTE: no cleanup has been done to this configuration to allow for
reproducibility. The cleanups are done in follow on patches
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Just enable dfu options, We have MMC and RAM as options here.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Most of the users of BeagleY-AI are headless OR do not use serial port.
In such cases, it is very useful for the device to provide some level of
indication to know what state their board is at.
Unfortunately, with a single LED (ignoring the :heartbeat), the
options are limited. This is a precursor patch to actually enabling
the LED options that will use the same in the follow on patches.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
We just have a single MMC on BeagleY-AI. So drop all other boot options,
In the meanwhile, we also will use efiboot and standard boot methods
consistent with other K3 Beagle products.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
main_gpio1 controls the voltage for the SDcard from 3.3v to 1.8v.
This is required for proper operation of SDcard through various boot
stages.
Fixes the following seen in the boot log:
failed to set vqmmc-voltage to 3.3V
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
just use beagley_ai as pattern match for the files and folders involved.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Simon Glass <sjg@chromium.org> says:
This series includes some precursor patches needed for forthcoming expo
enhancements.
- truetype support for multiple lines
- make white-on-black a runtime option
- support drawing a rectangle
When the cursor position changes, kerning should not be used for the
next character, since it can make the first displayed character shuffle
left or right a bit.
Clear the kern character when setting the position.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a way to draw an unfilled box of a certain width. This is useful
for grouping menu items together.
Add a comment showing how to see the copy-framebuffer, for testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
When using expo we want to be able to control the information on the
display and avoid other messages (such as USB scanning) appearing.
Add a 'quiet' flag for the console, to help with this.
The test is a little messy since stdio is still using the original
vidconsole create on start-up. So take care to use the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to check the display contents in expo tests, so move the two
needed functions to a new header file.
Rename them to have a video_ prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
When writing multiple lines of text we need to be able to control which
text goes on each line. Add a new vidconsole_put_stringn() function to
help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Expo needs to be able to word-wrap lines so that they are displayed as
the user expects. Add a limit on the width of each line and support this
in the measurement algorithm.
Add a log category to truetype while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to embed newline characters in the string and
have the text measured into multiple lines. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the vidconsole API so that measure() can measure multiple lines
of text. This will make it easier to implement multi-line fields in
expo.
Tidy up the function comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The CONFIG_WHITE_ON_BLACK setting is hard-coded at build-time. It is
useful to be able to control this when showing menus.
Create a property to hold this information, using the CONFIG as the
initial value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a console_printf_select_stderr() function so that it is not
necessary for the caller to process the format string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Caleb Connolly <caleb.connolly@linaro.org> says:
Introduce a new event to signal that the live tree has been built,
allowing boards to perform fixups on the tree before devices are bound.
Crucially this allows for devices to be enabled or disabled, but also
allows for properties that are parsed during the bind stage to be
modified (such as dr_mode for dwc3).
With this in place, mach-snapdragon is switched over to use the event
and some hacky U-Boot specific DT overrides (which had to be undone
prior to booting an image) are removed in favour of fixing up the
livetree (which is not passed on to further boot stages).
Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard
is enabled and it now uses USB host mode in U-Boot like it's bigger
sibling the RB2.
Link: https://lore.kernel.org/r/20250411-livetree-fixup-v2-0-1236823377bb@linaro.org
The RB1 and RB2 have a single USB controller which is manually muxed
between a type-c port and an internal USB hub via a DIP switch. OTG is
supported in Linux, but the DWC3 driver in U-Boot can only handle a
single mode, and defaults to peripheral mode.
We did hack around this on the RB2, but the RB1 got left out.
Now that we can fix up the live tree before devices are bound, drop the
DTS hacks and do the fixup at runtime instead.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The debug log here had the logic completely backwards, even though the
code is actually correct. Remove it since it's extraneous anyway.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
This will now apply fixups prior to devices being bound, which makes it
possible to enable/disable devices and adjust more properties that might
be read before devices probe.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
OF_LIVE offers a variety of benefits, one of them being that the live
tree can be modified without caring about the underlying FDT. This is
particularly valuable for working around U-Boot limitations like lacking
USB superspeed support on Qualcomm platforms, no runtime OTG, or
peripherals like the sdcard being broken (and displaying potentially
worrying error messages).
Add an event to signal when the live tree has been built so that we can
apply fixups to it directly before devices are bound.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some drivers call video_set_flush_dcache() to indicate that they want to
have the dcache flushed for the frame buffer. These drivers benefit from
our new video damage control, because we can reduce the amount of memory
that gets flushed significantly.
This patch enables video damage control for all device drivers that call
video_set_flush_dcache() to make sure they benefit from it.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
[Alper: Add to VIDEO_TIDSS, imply instead of select]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The dcache flushing code path was conditional on ARM && !DCACHE config
options. However, dcaches exist on other platforms as well and may need
clearing if their driver requires it.
Simplify the compile logic and always enable the dcache flush logic in
the video core. That way, drivers can always rely on it to call the arch
specific callbacks.
This will increase code size for non-ARM platforms with CONFIG_VIDEO=y
slightly.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gmail.com/
Added workaround for CONFIG_SYS_CACHELINE_SIZE for ibex-ast2700:
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we
print a single character, it will always copy the full range of bytes
from the top left corner of the character to the lower right onto the
uncached frame buffer. This includes pretty much the full line contents
of the printed character.
Since we now have proper damage tracking, let's make use of that to reduce
the amount of data we need to copy. With this patch applied, we will only
copy the tiny rectangle surrounding characters when we print them,
speeding up the video console.
After this, changes to the main frame buffer are not immediately copied
to the copy frame buffer, but postponed until the next video device
sync. So issue an explicit sync before inspecting the copy frame buffer
contents for the video tests.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
[Alper: Rebase for fontdata->height/w, fill_part(), fix memmove(dev),
drop from defconfig, use damage.xstart/yend, use IS_ENABLED(),
call video_sync() before copy_fb check, update video_copy test]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gmail.com/
We are going to introduce image damage tracking to fasten up screen
refresh on large displays. This patch adds damage tracking for up to
one rectangle of the screen which is typically enough to hold blt or
text print updates. Callers into this API and a reduced dcache flush
code path will follow in later patches.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Use xstart/yend, document new fields, return void from
video_damage(), declare priv, drop headers, use IS_ENABLED()]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gmail.com/
Reviewed-by: Simon Glass <sjg@chromium.org>
The video tests have a helper function to generate a pseudo-digest of
frame buffer contents, but it only does so for the main one. There is
another check that the copy frame buffer is the same as that. But
neither is enough to test if only the modified regions are copied to the
copy frame buffer, since we will want the two to be different in very
specific ways.
Add a boolean argument to the existing helper function to indicate which
frame buffer we want to inspect, and update the existing callers.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-3-alpernebiyasak@gmail.com/
While checking frame buffer contents, the video tests also check if the
copy frame buffer contents match the main frame buffer. To test if only
the modified regions are updated after a sync, we will need to create
situations where the two are mismatched. Split this check into another
function that we can skip calling, since we won't want it to error on
those mismatched cases.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-2-alpernebiyasak@gmail.com/
BOOTSTAGE_RECORD_COUNT=30 is too small to record booting a FIT image
with EFI kernel, initrd, dtb as seen on the StarFive VisionFive 2
board.
Increase the default for BOOTSTAGE_RECORD_COUNT to 50.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The EFI sub-system needs the load address and not the entry point
to boot the binary passed from the bootm command. The entry point
is derived from the PE-COFF header of the binary.
Fixes: ecc7fdaa9e ("bootm: Add a bootm command for type IH_OS_EFI")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The code-block directive requires addition of the prompt symbol for each
line, using the prompt directive instead allows for auto insertion of
the symbol per line[1].
For the readers, the character added by the prompt directive is
un-selectable i.e the entire line can be more easily selected for copy
pasting etc. Whereas with code-block, the prompt symbol like "$" is also
selectable which is usually not the intent.
This is mostly a QoL addition + making the docs consistent since k3.rst
makes use of prompt directives which these board docs include from.
[1]: https://pypi.org/project/sphinx-prompt/
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Do not try to create an initrd device path nor try to register
an initrd with the EFI_LOAD_FILE2_PROTOCOL if none is provided.
Handle initrd installation in efi_binary_run_dp with
efi_install_initrd, imitating what is done for the fdt.
Fixes: 36835a9105 ("efi_loader: binary_run: register an initrd")
Reported-by: Weizhao Ouyang <o451686892@gmail.com>
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Tested-by: Weizhao Ouyang <o451686892@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It's currently possible to make the bootloader crash on calling
clk_set_rate caused by the loop in clk_clean_rate_cache.
The loop assume that every child of the clock node are also clock
device but this is not always the case. For example it's common for a
clock to bind to a reset device or also expose a syscon if the clock
register map is also used to apply special configuration.
In such case, on accessing a device as a clock, the bootloader crash. To
correctly handle this, check if the child device is actually a clock and
ignore otherwise.
Fixes: 6b7fd3128f ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
CONFIG_SYS_NONCACHED_MEMORY is defined as hex, not bool. It should be
replaced with CONFIG_SYS_HAS_NONCACHED_MEMORY when switched from #ifdef to
CONFIG_IS_ENABLED().
Fixes: 6c171f7a18 (common: board: make initcalls static)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@codethink.co.uk> # rock5b
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
QSPI driver performs chip select operation before every read/write
access. During this operation, driver needs to enable and disable
the QSPI controller. This may cause data loss if there is inadvertent
halting of any ongoing read/write operation. To avoid this scenario,
waiting for the QSPI status to be idle before next read/write
operation is implemented.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
At the moment a mixture of ifdef(CONFIG_IS_ENABLED) and
CONFIG_IS_ENABLED(SPI_FLASH_BAR) is used in the spi-nor framework.
This leads to misbehaviour in the SPL as there is no Kconfig option
CONFIG_SPL_SPI_FLASH_BAR. This commit standardizes the use of
CONFIG_SPI_FLASH to get SPLs that load U-Boot proper from the
SPI flash to work again.
Fixes: 9bb02f7 (mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled)
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Since the opcode SPINOR_OP_CHIP_ERASE (0xc7) is not supported
for the mt35xu01g/2g flashes, the NO_CHIP_ERASE flag has been added
to enable sector erase functionality instead.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
This adds the vexpress_fvp and vexpress_fvp_bloblist platforms to the
list of platforms we test via emulator in CI. In order to do this we
need to first have our container runtime have TF-A builds for the
vexpress_fvp platform, both with and without transfer list support as
well as installing "telnet" so that we can access console. In the CI
files we check for the existence of /opt/tf-a/${TEST_PY_BD} and if
found, copy bl1.bin and fip.bin to /tmp and set the variables so that we
can later run FVP to run.
Note that we currently disable the hostfs (semihosting) tests as they
trigger a bug in FVP. This has been reported upstream, and can be
enabled when fixed.
Reviewed-by: Harrison Mutai <harrison.mutai@arm.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The mtd partition offset must be calculated first as it will be
referenced when calculating the mtd partition size.
Change-Id: Iccfd101b0a9597ac240c25670da638a82af28980
Fixes: 1ca97ee903 (mtd: mtdpart: Support MTD_SIZE_REMAINING with unallocated memory area)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reported-by: Francesco Dolcini <francesco@dolcini.it>
getopt_long() expects a NULL-terminated list of structures. The current
list in mkimage does not have a zero-filled structure at the end, which
can cause getopt_long() to walk past the end of the array when passing
an unknown option, causing a segmentation fault.
As a reproducer, the following command causes a segmentation fault
(tested in Debian 12):
mkimage --foobar
Signed-off-by: Carlos López <carlos.lopezr4096@gmail.com>
The LMB memory region attributes flags are used to specify the
behaviour of the memory regions with respect to allocations -- for
e.g. it is allowed to re-allocate a memory region already reserved
with the LMB_NONE flag. The flags use values with different bit
positions through the BIT() macro. Move the LMB_NOMAP value to bit
position 1, and also move the other flags accordingly. Using bit
position 0 for LMB_NOMAP results in the logic in
lmb_print_region_flags() to break, which prints an incorrect value for
the regions with LMB_NOMAP atribute.
Fixes: 3d56c06551 ("lmb: Move enum lmb_flags to a u32")
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
fix the following typos
- from "categorys" to "categories"
- from "indivdually" to "individually"
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
As this driver needs to use the special sandbox <asm/malloc.h> header
rather than normal malloc, it must be careful of the includes it brings
in. It does not need <spi.h> for anything, so drop it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, the phy_config() API is invoked by the driver only once since it
has been probed. While this works in general, it doesn't allow the driver
to bring the PHY back to its default reset state. As a result, the driver
might not be able to recover the PHY from a bad state. To address this,
move phy_config() into the driver's start callback (am65_cpsw_start()).
Apart from providing the means to recover the PHY in the event of failure,
the implementation is in line with the idea of "reset and configure" that
is already followed by am65_cpsw_start() when it comes to programming the
CPSW MAC.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The new OSLog region in MTP (firmware 13.3+) persists on handoff to
Linux. To avoid having to come up with some weird DART handoff or DAPF
tricks, let's just steal some of the coprocessor's dedicated SRAM. This
keeps it happy and Linux doesn't need any special handoff then.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
To be used for special-case oslog support in rtkit-helper.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
This will work for u-boot itself, but needs a special workaround in the
MTP driver for Linux handoff to work.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
This driver handles the MTP ASC coprocessor, which does not need any
special handling on the RTKit side and communicates out-of-band.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
For devices without specific buffer methods, just assume we can give
them raw memory pointers when they request a buffer.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
We have improvements to the reliability of H6 and H616 DRAM
initialisation, hopefully avoiding those occasional size misdetections
many people reported before.
Also there is some modernisation of the USB PHY code, to use DT provided
regulators and GPIOs, instead of relying on this being badly duplicated
in Kconfig. This also happens to fix broken USB operations for older
boards (using the A20 SoCs, for instance), which were clashing over
grabbing some GPIOs, leading to a driver bailout. There is also some
rework of the H6/H616 SPL clock code, to prepare it for being reused by
the upcoming Allwinner A523 support. This drops the usage of C structs
to model MMIO register frames, and replaces them by using an addition of
the base address with a macro defined offset. Also in preparation for
A523 there is one fix and one addition for the FEL code, to prepare for
the GICv3 interrupt controller that the new SoC uses. And since this is
a simple fix, and was ready, there is also the watchdog driver for that
new SoC. Finally tossing in an easy fix to some H616 defconfig files to
enable eMMC.
I also use the opportunity to enable proper page table protection
(observing read-only and no-execute attributes), support for which the
arm64 port recently gained. I didn't spot any issues on my arm64 board
tests, but it can be easily disabled or backed out again in case any
issues arise.
Full support for the two new SoC series (A133 and A523) we are working
on is not quite ready yet, but might follow still a bit later if
progress permits.
CI passed, and boot-tested on at least one board with a H616, H6, A64,
H3, A20, T113s.
With the SPL clock code and the DRAM init routine we converted all users
of the H6 class "struct sunxi_prcm_reg" over to use #define'd register
offsets now.
Drop the whole definition of this struct now, since it's not needed
anymore, for all H6 and H616 boards.
This removes the entire fragile and questionable definition, and allows
new SoCs to share the code more easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner H6 and H616 DRAM initialisation code uses a complex C
struct, modelling the PRCM clock register frame. For those SoCs, this
struct contains 20 registers, but the DRAM code only uses two of them.
Since we want to get rid of this struct, drop the usage of the struct in
the H6 and H616 DRAM code, by using #define'd register names and their
offset, and then adding those names to the base pointer.
This removes one more user of the PRCM clock register struct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-Boot drivers often revert to using C structures for modelling hardware
register frames. This creates some problems:
- A "struct" is a C language construct to group several variables
together. The details of the layout of this struct are partly subject
to the compiler's discretion (padding and alignment).
- The "packed" attribute would force a certain layout, but we are not
using it.
- The actual source of information from the data sheet is the register
offset. Here we create an artificial struct, carefully tuning the
layout (with a lot of reserved members) to match that offset. To help
with correctness, we put the desired information as a *comment*,
though this is purely for the human reader, and has no effect on the
generated layout. This sounds all very backwards.
- Using a struct suggests we can assign a pointer and then access the
register content via the members. But this is not the case, instead
every MMIO register access must go through specific accessor functions,
to meet the ordering and access size guarantees the hardware requires.
- We share those structs in code shared across multiple SoC families,
though most SoCs define their own version of the struct. Members must
match in their name, across every SoC, otherwise compilation will fail.
We work around this with even more #ifdefs in the shared code.
- Some SoCs have an *almost* identical layout, but differ in a few
registers. This requires hard to maintain #ifdef's in the struct
definition.
- Some of the register frames are huge: the H6 CCU device defines 127
registers. We use 15 of them. Still the whole frame would need to be
described, which is very tedious, but for no reason.
- Adding a new SoC often forces people to decide whether to share an
existing struct, or to create a new copy. For some cases (say like 80%
similarity) this works out badly either way.
The Linux kernel heavily frowns upon those register structs, and instead
uses a much simpler solution: #define REG_NAME <offset>
This easily maps to the actual information from the data sheet, and can
much simpler be shared across multiple SoCs, as it allows to have all
SoC versions visible, so we can use C "if" statements instead of #ifdef's.
Also it requires to just define the registers we need, and we can use
alternative locations for some registers much more easily.
Drop the usage of "struct sunxi_prcm_reg" in the H6 SPL clock code, by
defining the respective register names and their offsets, then adding
them to the base pointer.
We cannot drop the struct definition quite yet, as it's also used in
other drivers, still.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
With the SPL clock code, the MMC driver, and the DRAM init routine we
converted all users of the H6 class "struct sunxi_ccm_reg" over to use
#define'd register offsets now.
Drop the whole definition of this struct now, since it's not needed
anymore, for all H6 and H616 boards.
This removes the entire fragile and questionable definition, and allows
new SoCs to share the code more easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner H6 DRAM initialisation code uses a complex C struct,
modelling the clock device's register frame. For this SoC, the struct
contains 127 registers, but the DRAM code only uses four of them.
Since we want to get rid of this struct, drop the usage of the struct in
the H6 DRAM code, by using #define'd register names and their offset, and
then adding those names to the base pointer.
This removes one more user of the clock register struct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner H616 DRAM initialisation code uses a complex C struct,
modelling the clock device's register frame. For this SoC, the struct
contains 127 registers, but the DRAM code only uses four of them.
Since we want to get rid of this struct, drop the usage of the struct in
the H616 DRAM code, by using #define'd register names and their offset,
and then adding those names to the base pointer.
This removes one more user of the clock register struct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner MMC code uses a complex C struct, modelling the clock
device's register frame. We rely on sharing the member names across all
Allwinner SoCs, which is fragile.
Drop the usage of the struct in the MMC code, by using #define'd
register names and their offset, and then adding those names to the base
pointer. This requires to define those offsets for all SoCs, but since we
only use between four and six clock registers in the MMC code, this is
easily done.
This removes one common user of the clock register struct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-Boot drivers often revert to using C structures for modelling hardware
register frames. This creates some problems:
- A "struct" is a C language construct to group several variables
together. The details of the layout of this struct are partly subject
to the compiler's discretion (padding and alignment).
- The "packed" attribute would force a certain layout, but we are not
using it.
- The actual source of information from the data sheet is the register
offset. Here we create an artificial struct, carefully tuning the
layout (with a lot of reserved members) to match that offset. To help
with correctness, we put the desired information as a *comment*,
though this is purely for the human reader, and has no effect on the
generated layout. This sounds all very backwards.
- Using a struct suggests we can assign a pointer and then access the
register content via the members. But this is not the case, instead
every MMIO register access must go through specific accessor functions,
to meet the ordering and access size guarantees the hardware requires.
- We share those structs in code shared across multiple SoC families,
though most SoCs define their own version of the struct. Members must
match in their name, across every SoC, otherwise compilation will fail.
We work around this with even more #ifdefs in the shared code.
- Some SoCs have an *almost* identical layout, but differ in a few
registers. This requires hard to maintain #ifdef's in the struct
definition.
- Some of the register frames are huge: the H6 CCU device defines 127
registers. We use 15 of them. Still the whole frame would need to be
described, which is very tedious, but for no reason.
- Adding a new SoC often forces people to decide whether to share an
existing struct, or to create a new copy. For some cases (say like 80%
similarity) this works out badly either way.
The Linux kernel heavily frowns upon those register structs, and instead
uses a much simpler solution: #define REG_NAME <offset>
This easily maps to the actual information from the data sheet, and can
much simpler be shared across multiple SoCs, as it allows to have all
SoC versions visible, so we can use C "if" statements instead of #ifdef's.
Also it requires to just define the registers we need, and we can use
alternative locations for some registers much more easily.
Drop the usage of "struct sunxi_ccm_reg" in the H6 SPL clock code, by
defining the respective register names and their offsets, then adding
them to the base pointer.
We cannot drop the struct definition quite yet, as it's also used in
other drivers, still.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Thanks for Jernej's JTAG debugging effort, it turns out that the BROM
expects SP_IRQ to be saved and restored, when we want to enter back into
FEL after the SPL's AArch64 stint.
Save and restore SP_IRQ as part of the FEL state handling. The banked
MRS/MSR access to SP_IRQ, without actually being in IRQ mode, was
introduced with the ARMv7 virtualisation extensions. The Arm Cortex-A8
cores used in the A10/A13s or older F1C100s SoCs would not support that,
but this code here is purely in the ARMv8/AArch64 code path, so it's
safe to use unconditionally.
Reported-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
To be able to return to the BootROM FEL USB debug code, we must restore
the core's state as accurately as possible after the SPL has been run.
Since the BootROM runs in AArch32, but the SPL uses AArch64, this requires
a core reset, which clears the core's state.
So far we were saving and restoring the required registers like SCTLR
and VBAR, but could ignore the interrupt controller's state (GICC), since
that lives in MMIO registers, unaffected by a core reset.
Newer Allwinner SoCs now feature a GICv3 interrupt controller, which keeps
some GIC state in architected system registers, and those are cleared
when we switch back to AArch32.
To enable FEL operation on the Allwinner A523 SoC,
Add AArch32 assembly code to save and restore the ICC_PMR and ICC_IGRPEN1
system registers. The other GICv3 sysregs are either not relevant for the
BROM operation, or haven't been changed from their reset defaults by the
BROM anyway.
This enables FEL operation on the Allwinner A523 family of SoCs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The Allwinner A523 SoC moved the watchdog into a separate MMIO frame,
and also shifted the registers a bit: the control, config, and mode
register are located four bytes earlier.
Add the new compatible string, and connect it to the new struct
describing the new register layout.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Now that the USB PHY driver uses the device tree to get the VBUS detect
and USB ID GPIOs, these Kconfig symbols are unused. Remove them from
their Kconfig definition, and also from all defconfig files.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
So far Allwinner boards controlled the USB OTG ID detection via the
respective GPIO pin specified in Kconfig, as a string. All boards should
have the same GPIO already specified in the devicetree, in the
usb0_id_det-gpios property.
Convert the usage of the Kconfig configured GPIO over to query that
information from the devicetree, then use the existing DM GPIO
infrastructure to request the GPIO.
Only PHY0 supports USB-OTG, so limit the GPIO request to that PHY, to
avoid claiming it multiple times.
This removes the need to name that GPIO in the defconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
So far Allwinner boards controlled the USB VBUS detection via the
respective GPIO pin specified in Kconfig, as a string. All boards should
have the same GPIO already specified in the devicetree, in the
usb0_vbus_det-gpios property.
Convert the usage of the Kconfig configured GPIO over to query that
information from the devicetree, then use the existing DM GPIO
infrastructure to request the GPIO.
Only PHY0 supports USB-OTG, so limit the GPIO request to that PHY, to
avoid claiming it multiple times.
This removes the need to name that GPIO in the defconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that the USB PHY driver uses the device tree to get VBUS supply
regulators, these Kconfig symbols are unused. Remove them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The device tree binding for the PHY provides VBUS supplies as regulator
references. Now that all boards have the appropriate regulator uclass
drivers enabled, the PHY driver can switch to using them. This replaces
direct GPIO usage, which in some cases needed a special DM-incompatible
"virtual" GPIO from the PMIC.
The following boards provided a value for CONFIG_USB0_VBUS_PIN, but are
missing the "usb0_vbus-supply" property in their device tree. None of
them have the MUSB controller enabled in host or OTG mode, so they
should see no impact:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Ampe_A76_defconfig / sun5i-a13-ampe-a76
- CHIP_pro_defconfig / sun5i-gr8-chip-pro
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Sunchip_CX-A99_defconfig / sun9i-a80-cx-a99
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
- iNet_3F_defconfig / sun4i-a10-inet-3f
- iNet_3W_defconfig / sun4i-a10-inet-3w
- iNet_86VS_defconfig / sun5i-a13-inet-86vs
- iNet_D978_rev2_defconfig / sun8i-a33-inet-d978-rev2
- icnova-a20-swac_defconfig / sun7i-a20-icnova-swac
- sun8i_a23_evb_defconfig / sun8i-a23-evb
Similarly, the following boards set CONFIG_USB1_VBUS_PIN, but do not
have "usb1_vbus-supply" in their device tree. Neither of them have USB
enabled at all, so again there should be no impact:
- Cubieboard4_defconfig / sun9i-a80-cubieboard4 (also for USB3)
- sun8i_a23_evb_defconfig / sun8i-a23-evb
The following boards use a different pin for USB1 VBUS between their
defconfig and their device tree. Depending on which is correct, they
may be broken:
- Linksprite_pcDuino3_Nano_defconfig (PH11) /
sun7i-a20-pcduino3-nano (PD2)
- icnova-a20-swac_defconfig (PG10) / sun7i-a20-icnova-swac (PH6)
Finally, this board has conflicting pins given for its USB2 VBUS:
- Lamobo_R1_defconfig (PH3) / sun7i-a20-lamobo-r1 (PH12)
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: use regulator_set_enable_if_allowed()]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
On many boards, the USB ports are powered by the PMIC's "drivevbus"
regulator. In preparation for switching the USB PHY driver to use the
regulator uclass instead of a virtual GPIO pin, ensure these boards
have AXP PMIC regulator support enabled.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
AXP PMICs have a pin which can either report the USB VBUS state, or
driving a regulator that supplies USB VBUS. Add a regulator driver for
controlling this pin. The selection between input and output is done via
the x-powers,drive-vbus-en pin on the PMIC (parent) node.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Select the new MMU_PGPROT Kconfig symbol for all Allwinner board builds,
to use a write-protected .rodata, non-executable .data and .rodata
sections, and non-writable .text sections.
This might trigger runtime exceptions in misbehaving drivers, which
should then be fixed.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that eMMC is working properly on H616 devices, it became apparent
that some boards were missing the right defconfig bits to enable eMMC
access.
Add the eMMC device number to the Tanix TX1 and the X96 Mate defconfig,
also the eMMC boot option to the TX1. Oddly enough the X96 Mate had
just this bit already.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
H616 rank and size detection code is superior to the H6. Nevertheless,
they are structurally the same. Split functions from H616 into new file
and reuse them in H6 DRAM driver too. This should also fix some bugs for
H6 too, like incorrect DRAM size detection.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
[Andre: back out panic if test fails to allow 2^11 columns]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This change is same as in commit 78aa00c38e ("sunxi: H616: dram: split
struct dram_para"), but for H6. This is needed in order to extract
common code between H6 and H616 later.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Constify parameters for two reasons:
- Allow more compile time optimizations
- It will allow later sharing of common code with H616 (when it will be
rearranged some more)
Commit does same kind of changes as commit 457e2cd665 ("sunxi: H616:
dram: const-ify DRAM function parameters")
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Point fdt_addr to the fdt embedded in the bloblist since fdt_addr
is a default address for bootefi, bootm and booti to look for the
device tree when launching the kernel.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
When a bloblist is valid and contains fdt, it explicitly means
a previous boot stage is passing transfer list compliant with
Firmware Handoff specification, thus the fdt from bloblist should
not be overridden with the ones from board or env variables.
Fixes: 70fe238594 ("fdt: Allow the devicetree to come from a bloblist")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
move the ENV_OFFSET settings from common config settings file
configs/imx8qxp_capricorn.config to defconfig file for the
cxg3 board, as other imx8qxp based boards from siemens has
the environment on other offsets.
Signed-off-by: Heiko Schocher <hs@denx.de>
add ahab command as secure boot is used on this boards,
and enable watchdog, so U-Boot triggers it.
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
for respelling commit subject and message:
Signed-off-by: Heiko Schocher <hs@denx.de>
enable text based default U-Boot Environment by enabling
CONFIG_ENV_SOURCE_FILE
and adding default environment file:
board/siemens/capricorn/capricorn_cxg3.env
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Siemens have some defconfigs for different hardware versions,
all based on mainline cxg3 board. For easier updating the
downstream defconfigs, move common settings into new file.
configs/imx8qxp_capricorn.config
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
Pass the clock controller udevice into clk_register_composite(),
so it can be passed further to any registered composite clocks
and used for look up of parent clock referenced in DT "clocks"
and "clock-names" properties by phandle and name pair.
Use the clock controller udevice in imx8m_clk_mux_set_parent()
to perform accurate look up of parent clock referenced in the
CCM driver by name. If the clock name that is being looked up
matches one of the names listed in the clock controller DT node
"clock-names" array property, then the offset of the name is
looked up in the "clocks" DT property and the phandle at that
offset is resolved to the parent clock udevice. The test to
determine whether a particular driver instance registered with
clock uclass matches the parent clock is done by comparing the
OF nodes of the clock registered with clock uclass and parent
clock resolved from the phandle.
Example:
drivers/clk/imx/clk-imx8mm.c:
static const char * const imx8mm_a53_sels[] = {"osc_24m", "arm_pll_out", ...
_____________|
arch/arm/dts/imx8mm.dtsi: |
clk: clock-controller@30380000 { v
clock-names = "osc_32k", "osc_24m", ...
|
v
clocks = <&osc_32k>, <&osc_24m>, ...
}; _______________________|
... |
/ { v
osc_24m: clock-osc-24m {
compatible = "fixed-clock";
...
};
Signed-off-by: Marek Vasut <marex@denx.de>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Adam Ford <aford173@gmail.com> # imx8mp-beacon
Since commit b4734c9c33 ("clk: imx: Convert clock-osc-* back to osc_*")
SPL takes a long time to load U-Boot proper on an imx8mm-evk board.
The reason for the long delay is because the osc_32k clock is not available
in the SPL phase.
Fix this problem by passing the 'bootph-all' and 'bootph-pre-ram'
properties to make the osc_32k clock available in SPL.
This also aligns with imx8mn and imx8mp-u-boot.dtsi files.
Fixes: b4734c9c33 ("clk: imx: Convert clock-osc-* back to osc_*")
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Adam Ford <aford173@gmail.com>
Prevent enabling/disabling multiple times the same power domain to avoid
breakages due to the same power domains being referenced several times
by different device nodes.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It is very surprising that such an uclass, specifically designed to
handle resources that may be shared by different devices, is not keeping
the count of the number of times a power domain has been
enabled/disabled to avoid shutting it down unexpectedly or disabling it
several times.
Doing this causes troubles on eg. i.MX8MP because disabling power
domains can be done in recursive loops were the same power domain
disabled up to 4 times in a row. PGCs seem to have tight FSM internal
timings to respect and it is easy to produce a race condition that puts
the power domains in an unstable state, leading to ADB400 errors and
later crashes in Linux.
Some drivers implement their own mechanism for that, but it is probably
best to add this feature in the uclass and share the common code across
drivers. In order to avoid breaking existing drivers, refcounting is
only enabled if the number of subdomains a device node supports is
explicitly set in the probe function. ->xlate() callbacks will return
the power domain ID which is then being used as the array index to reach
the correct refcounter.
As we do not want to break existing users while stile getting
interesting error codes, the implementation is split between:
- a low-level helper reporting error codes if the requested transition
could not be operated,
- a higher-level helper ignoring the "non error" codes, like EALREADY and
EBUSY.
CI tests using power domains are slightly updated to make sure the count
of on/off calls is even and the results match what we *now* expect. They
are also extended to test the low-level functions.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Fixup previous merge resolution of this series. Intent is to ease code
readability and logic to match ordering in CONFIG_OF_LIST
- Remove "starfive/" string math
- Remove redundant local cache of calls to get_*_from_eeprom()
- Match name before EEPROM product_id in board_fit_config_name_match()
- Remove single-consumer FDTFILE_* defines
- Do not set fdtfile for visionfive-2-* when unknown model revision
Fixes: 5a0a93a768 ("Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv")
Signed-off-by: E Shattow <e@freeshell.de>
Pull request efi-2025-07-rc1-3
Documentation:
* add documentation for the DeepComputing FML13V01
* fix typos
UEFI:
* build with HII configuration protocol
* print image load address in StartImage
Boards:
* qemu-riscv raise CONFIG_NR_DRAM_BANKS
* add support for the DeepComputing FML13V01 board via
starfive_visionfive2_defconfig
* add UNIT_TESTS to big-endian Malta boards
To avoid duplicate maintenance just include jh7110_common.rst to describe
the usage of the different boot sources.
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Describe building U-Boot for the board and booting.
Carve out common information for JH7110 boards into an include.
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We support all JH7110 boards with starfive_visionfive2_defconfig.
The relevant device-tree is selected at runtime based on EEPROM data.
Support setting $fdtfile to the file name of the DeepComputing Framework
motherboard (FML13V01) device-tree.
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The DeepComputing Framework motherboard is a JH7110 device support by the
upstream kernel. Add its device-tree to the list of device-trees to be
included into the starfive_visionfive_defconfig.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The number of memory banks in QEMU is not bounded by 1.
In this example we have two banks:
qemu-system-riscv64 \
-machine virt \
-nographic \
-m 8192 \
-smp 8,sockets=2,cores=4,threads=1 \
-numa node,cpus=0-3,mem=4096 \
-numa node,cpus=4-7,mem=4096 \
-kernel u-boot
As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.
Use the default value defined in /Kconfig as 4.
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Enable DISTRO_DEFAULT and BOOTCOMMAND flags for stm32mp25
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cover-letter:
arm: stm32mp: STM32MP25 machine update
This series is updating STM32MP25 machine/board support:
_ update cmd_stm32key.
_ update cmd_stm32prog.
_ update STM32MP25 configs.
_ add leds and buttons support.
_ add boot_mode support (USB/PXE/MMC/NOR/NAND).
_ add bootcmd support.
_ enable MMC support.
Currently, it misses clock,reset and regulator support for STM32MP25
which will be added in a next step due to dependencies with OP-TEE.
For example, due to OP-TEE dependencies, all MMC support is ready
but not functional.
END
Series-version: 2
Series-changes: 2
- Enable DISTRO_DEFAULT and BOOTCOMMAND flags
On closed device the PTA BSEC is never supported and the current check if
PTA BSEC is supported cause a OP-TEE error:
E/TC tee_ta_open_session
This patch removed this warning on closed device, because the check is
skipped.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the helper function stm32mp_is_closed() to check the "closed" state in
product life cycle, when product secrets have been provisioned into the
device, by "secure secret provisioning" tools (SSP) for example.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The STM32MP25 revision ID are now defined with the OTP102, this patch
implements this new system.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
For UART serial boot, the console need to be deactivated to avoid issue
with tools STM32CubeProgrammer.
This patch adds also the missing dependency for CMD_STM32PROG_SERIAL,
to allow the silent and disable console. This avoid to add is on
board level for STM32MP15 (with TARGET_ST_STM32MP15X or
TARGET_ST_STM32MP13X)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Depending on Soc (STM32MP25 vs STM32MP21), the memory map can be
different and it generates a different TLB page table configuration/size.
Increase EARLY_TLB_SIZE to 0x10000 to fix following error message
and panic:
"Insufficient RAM for page table: 0xb000 > 0xa000. Please increase the
size in get_page_table_size()"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for booting from USB pen drive, since USB host
port is available on the STM32MP2.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
For nor0 boot for the STMicroelectronics boards, the bootfs
is found in SD-Card = mmc0 for nor0 boot.
Introduce a new file configuration file stm32mp25_st_common.h
to manage this specific behavior for the STMicroelectronics
boards; change the boot order for nor0 boot and don't use
the default DISTRO order define in BOOT_TARGET_DEVICES:
mmc1, ubifs, mmc0, mmc2.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Add support of UBI boot and activate the needed
configuration for U-Boot environment in UBI volume for
NAND or in a MTD partition for NOR device, SPI Flash:
ENV_OFFSET, ENV_OFFSET_REDUND, ENV_SECT_SIZE is
aligned with the default MTD partition on NOR device
of the STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add led support, force default state on U-Boot initialization and put on
the Linux heartbeat led = "blue-led" during U-Boot execution.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use the boot instance to select the correct mmc device identifier,
this patch only to save the environment on eMMC = MMC(1) on
STMicroelectronics boards.
Set the CONFIG_SYS_MMC_ENV_DEV to -1 to select the mmc boot instance
by default.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case of several environment location support, env_get_location
is needed to select the correct location depending of the boot
device .
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of all the boot mode supported by STM32MP25x family
with information provided by TF-A in backup register
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle boot for the 3 instance of MMC and call the command stm32prog
for serial boot on USB or on UART as it is done for other STM32MP platform.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
This driver is checking the access rights of the different
peripherals connected to the RIFSC bus. If access is denied,
the associated device is not binded.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cover-letter:
Enable OF_UPSTREAM for STM32 and STi platforms
This series is enabling OF_UPSTREAM flag for STM32 MCU's, MPU's and
STi platforms.
For some boards, some defconfig and DT update are needed to keep the
same functional level.
The major impact concerns MPU's platform with introduction of STM32
System Bus.
END
Series-version: 2
Series-changes: 2
- Replace LOG_CATEGORY UCLASS_SIMPLE_BUS by UCLASS_NOP in both
/arch/arm/mach-stm32mp/stm32mp2/rifsc.c and
/arch/arm/mach-stm32mp/stm32mp1/etzpc.c.
- Update board/st/stm32mp1/MAINTAINERS.
- Fix DSI clock ssetting.
Enable OF_UPSTREAM flag for STM32MP2 platforms.
Add fixed-clock ck_flexgen_08 and ck_icn_ls_mcu until STM32MP25
clock driver will be available.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The STM32 System Bus is an internal bus on which devices are connected.
ETZPC is a peripheral overseeing the firewall bus that configures
and control access to the peripherals connected on it.
For more information on which peripheral is securable, please read
the STM32MP13 or STM32MP15 reference manual.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
DSI is the peripheral clock, while DSI_K is an internal kernel clock.
Even though they get the same register and same bit set to be gated,
resulting in the same behavior.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
U-Boot DT for stm32mp157c-odyssey is richer than the kernel DT one.
None of the stm32mp157c-odyssey's contributors answered to my request
to update kernel DT and i didn't have this board to test.
The simpler is to add a dedicated stm32mp15-odyssey_defconfig with
OF_UPSTREAM flag unset.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Enable OF_UPSTREAM flag for STM32MP15 platforms, except for
stm32mp15-odyssey,see following patch :
"configs: stm32: introduce stm32mp15-odyssey_defconfig"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Enable OF_UPSTREAM flag for STM32F7 platforms.
Use upstream device tree for DSI and LTDC nodes,
As now in upstream DT, in panel@0 node, power-supply property is
present, which is a fixed-regulator, add DM_REGULATOR_FIXED flag
for stm32f769-disco boards.
Set also DEFAULT_FDT_FILE in defconfigs and use it in stm32f746-disco.h
to indicate which FDT file to load (All STM32F7 boards are using this
file).
If something is missing, it must be added in upstream device tree
in linux kernel ("px_clk" for DSI by example).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
When using CONFIG_FSL_QSPI_AHB_FULL_MAP the fsl_qspi_default_setup() sets
the BFGENCR register to use the LUT(SEQID_LUT_AHB) before the Look Up Table
is populated.
This result in a situation that after 'sf probe' command any memory
read from qspi using AHB will result in undefined behaviour (hang) untill
first 'sf read' op is executed.
Move the BFGENCR write to fsl_qspi_prepare_lut() to ensure that the setup
is consistent. AHB reads will use the default LUT(index 0) setup by previous
boot stage untill the first read op.
Signed-off-by: Pawel Kochanowski <pkochanowski@sii.pl>
The UART clocks were added around the same time some other clock
updates were happening, so converting clock-osc-24 back to osc_24
was missed on the UART clocks for imx8mm and imx8mn, so update
them here.
Fixes: b4734c9c33 ("clk: imx: Convert clock-osc-* back to osc_*")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reported-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Refactor inside-out EEPROM-checking logic to better match the board-seeking
callback and ordered list of targets from starfive_visionfive2_config since
the JH7110 OF_UPSTREAM migration.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
To avoid duplicate maintenance just include jh7110_common.rst to describe
the usage of the different boot sources.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
Describe building U-Boot for the board and booting.
Carve out common information for JH7110 boards into an include.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
We support all JH7110 boards with starfive_visionfive2_defconfig.
The relevant device-tree is selected at runtime based on EEPROM data.
Support setting $fdtfile to the file name of the DeepComputing Framework
motherboard (FML13V01) device-tree.
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
The DeepComputing Framework motherboard is a JH7110 device support by the
upstream kernel. Add its device-tree to the list of device-trees to be
included into the starfive_visionfive_defconfig.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
Binman looks for __image_copy_start to determine the base address of an
entry if elf-base-sym isn't specified, which is missing in RISC-V port.
This causes binman skips RISC-V SPL entries without filling addresses
into its .binman_sym_table section.
This patch defines __image_copy_start in linkerscript of both SPL and
proper U-Boot to ensure binman_sym functions correctly with the default
binman.dtsi. The paired symbol, __image_copy_end, is introduced as well
for completeness.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL and proper U-Boot are split into two images with default binman
configuration of StarFive VisionFive 2, thus proper U-Boot symbols
cannot be found in the SPL image. This fixes errors like
Section '/binman/spl-img': Symbol '_binman_u_boot_any_prop_size'
in entry '/binman/spl-img/mkimage/u-boot-spl/u-boot-spl-nodtb':
Entry 'u-boot-any' not found in list (u-boot-spl-nodtb,
u-boot-spl-dtb,u-boot-spl,mkimage,spl-img)
Fixes: 90602e779d ("riscv: dts: starfive: generate u-boot-spl.bin.normal.out")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Switch to u-boot-nodtb entry which precisely represents a proper U-Boot
and could be matched with u_boot_any. This allows RISC-V ports that make
use of binman to be built without disabling SPL_BINMAN_UBOOT_SYMBOLS
explicitly, which is set to y by default.
Fixes: 0784510f74 ("riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The number of memory banks in QEMU is not bounded by 1.
In this example we have two banks:
qemu-system-riscv64 \
-machine virt \
-nographic \
-m 8192 \
-smp 8,sockets=2,cores=4,threads=1 \
-numa node,cpus=0-3,mem=4096 \
-numa node,cpus=4-7,mem=4096 \
-kernel u-boot
As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.
Use the default value defined in /Kconfig as 4.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add match N:starfive pattern to visionfive2 board. Now
starfive pattern just related to JH7110 IC.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add pinctrl node in device tree and update
in bananapi f3 dts.
Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
CONFIG_OF_BOARD isn't enabled on SiFive Unleashed and Unmatched, thus
board_fdt_blob_setup is actually dead code on these platforms. Let's
remove it.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The default version should work for Starfive VisionFive 2.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
It's common for S-Mode proper U-Boot to retrieve a FDT blob along with
taking control from SBI firmware. Add a weak version of
board_fdt_blob_setup to make use of it by default, avoiding copy-pasting
similar functions among boards.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Recent Ubuntu versions (24.04+) disallow pip by default when
installing packages. The recommended approach is to use a virtual
environment (venv) instead.
Because of this, "make pip" is failing on such versions.
To prepare CI container migration to Ubuntu 24.04, use a venv in the
make_pip script.
Note: This has been reported on [1]
[1] https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/37
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Using some form of sandbox with Python modules is a long standing best
practice with the language. There are a number of ways to have a Python
sandbox be created. At this point in time, it seems the Python community
is moving towards using the "venv" module provided with Python rather
than a separate tool. To match that we make the following changes:
- Refer to a "Python sandbox" rather than virtualenv in comments, etc.
- Install the python3-venv module in our container and not virtualenv.
- In our CI files, invoke "python -m venv" rather than "virtualenv".
- In documentation, tell users to install python3-venv and not
virtualenv.
Signed-off-by: Tom Rini <trini@konsulko.com>
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. To support PCIe functionality with PCIe0
instance in Root-Complex mode enable corresponding configs. Also enable
configs to support NVMe over PCIe.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. Add support to configure PCIe0 in Root-
Complex mode of operation.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Driver uses macro SZ_4G to configure inbound base address register.
The macro is used without including the header file in which it is
defined. Fix this.
Fixes: 59ad548009 ("pci: Add TI K3 Cadence PCIe Controller")
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Bryan Brattlof <bb@ti.com> says:
This small series is here to remove some firewalls setup by ROM during
their boot and clean things up for Linux later on. Ideally this would be
a simple call to remove_fwl_configs() however the location of the
firewall is problematic (could potentially crash the core) when we're
currently executing from the memory region protected by the firewall.
So we need to introduce a function which allows us to disable specific
firewall regions and skip others to ensure boot stability.
Link: https://lore.kernel.org/r/20250414-firewalls-v1-0-89090085c08b@ti.com
ROM will configure a firewall to only allow HSRAM to be touched by the
R5 core. Any outside entity like DMA or the A53s will not have access to
this region. This can be problematic when U-Boot, running on the A53,
loads firmware that runs out of this region.
To simplify things remove the firewall here and let the remote core
firmware place a new firewall themselves if they wish for the memory
region.
Signed-off-by: Bryan Brattlof <bb@ti.com>
During boot some firewall regions could contain the R5's code which if
we change the firewalls settings will crash the core. To get around this
issue, define a new function which allows us to specify specific regions
we want unlocked.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Add TI_COMMON_CMD_OPTIONS config options to Sitara K3 boards at
a53 stage since we rely on most of the commands implied for testing
and debugging purposes. Since all commands are now enabled by
default, remove the redundant CMD_* options in the a53 defconfigs.
Also add MMC_REG & MMC_SPEED_MODE_SET useful commands to
TI_COMMON_CMD_OPTIONS.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
This patch adds am654_sdhci_set_control_reg to am654_sdhci.
This is required to fix UHS_MODE_SELECT for TI K3 boards.
If any of HIGH_SPEED_ENA, V1P8_SIGNAL_ENA, UHS_MODE_SELECT
are set, then data will be launched on the pos-edge of the
clock.
Since K3 SoCs did not meet timing requirements for High Speed
SDR mode at rising clock edge, none of these three should be
set, therefore limit UHS_MODE_SELECT to only be set for modes
above MMC_HS_52.
This fixes MMC write issue on am64x evm at mode High Speed
SDR.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
High Speed enable bit switches data launch from the falling
clock edge (half cycle timing) to the rising clock edge (full
cycle timing). For all SD UHS modes, data launch must happen
at the rising clock edge, so set HIGH_SPEED_ENA for SDR12 and
SDR25 modes. For all HS modes, data launch must happen at the
falling clock edge, so do not set HIGH_SPEED_ENA for MMC_HS_52.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
This patch adds MMC_HS_52 to the timing data structure.
Previously, this bus mode tap settings were not populated and
were instead populated for MMC_HS which is a different bus mode
up to 26MHz. Since we intended these settings according to the
device data sheet[0] for MMC_HS_52 up to 52MHz, populate MMC_HS
tap settings for MMC_HS_52.
While we are here, fix typo in ti,itap-del-sel-mms-hs.
[0] https://www.ti.com/lit/ds/symlink/am625.pdf Table 7-79
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
u-boot-dfu-20250425
Usb gadget:
- Fix ACM gadget release
- Allow ACM gadget restart after releasing it
- Add 'enabled' flag to usb_ep structure
DFU:
- Fix alt buffer clearing for DeveloperBox board
Adding quirk to disable STIG mode since cadence controller has
issue for read/write using the STIG mode. STIG mode is enabled
by default since 2023.04 for small read/write(<8bytes).
Updated STIG mode reading from dev_get_driver_data by assigning
to platdata struct before read quirks variable.
The STIG mode is disabled for normal read case and enabled
for QSPI Jedec ID read/write since it requires STIG read/write.
Porting from linux implementation
https://lore.kernel.org/all/20241204063338.296959-1-niravkumar
.l.rabara@intel.com/T/
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Add clk and dev data for wakeup uart to enable wakeup
UART as console.
Reported-by: KEERTHY <j-keerthy@ti.com>
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Labels are not allowed before declarations. Move the carveout struct
at the beginning and only update 'end' at this point.
This will fix following error:
arch/arm/mach-k3/common_fdt.c: In function 'fdt_fixup_reserved':
arch/arm/mach-k3/common_fdt.c:156:2: error: a label can only be part of a statement and a declaration is not a statement
156 | struct fdt_memory carveout = {
| ^~~~~~
make[1]: *** [scripts/Makefile.build:256: arch/arm/mach-k3/common_fdt.o] Error 1
make: *** [Makefile:1919: arch/arm/mach-k3] Error 2
Fixes: 096aa229a9 ("mach-k3: common_fdt: create a reserved memory node")
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
This makes spl_mmc_boot_mode consistent across am62x, 62a and 62p.
If MMCSD_MODE_EMMCBOOT is returned, FS boot fails since it checks for FS
on the hardware partitions, not the UDA. So to allow FS boot from EMMC,
the function should return MMCSD_MODE_FS instead which allows us to read
from FS on the UDA.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
The bootph-all property in u-boot enables driver initialization prior to
relocation, this is necessary to use the device as boot media.
sdhci0 is the phandle for eMMC on am62a, so this change allows us to use
eMMC as a boot media.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
SPL_TEXT_BASE is used as the load address for the main domain SPL on k3
platforms.
Since the config value is the same for every board, this patch sets the
value 0x80080000 as default for all 64-bit ARCH_K3, 0x43c00000 as
default for the R5 cores and deletes the instances of SPL_TEXT_BASE in
individual defconfigs.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
If there is no UCLASS_SYSINFO device available, parent_node will be
ofnode_null(). Calling ofnode_find_subnode() then triggers an assertion:
drivers/core/ofnode.c:598: ofnode_find_subnode: Assertion `ofnode_valid(node)' failed.
Check for a valid parent_node, not just that OF_CONTROL is enabled.
Fixes: 44ffb6f0ec ("smbios: Allow properties to come from the device tree")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
If eqos_free_pkt() is called after eqos_stop(), eqos_stop_resets() will
have been called already. This may prevent accessing the MMIO space to
update the RX descriptor tail pointer, so we must skip the descriptor
maintenance logic. This is okay because the descriptors and tail pointer
will all be rewritten anyway during the next call to eqos_start().
This hang was observed after a failed TFTP transaction:
eqos_recv(dev=000000047fb57330, flags=1):
eqos_recv: *packetp=000000c3ffb5c080, length=151
TFTP error: 'file <FILE> not found for <IP>' (1)
Not retrying...
eqos_stop(dev=000000047fb57330):
eqos_stop: OK
eqos_free_pkt(packet=000000c3ffb5c080, length=151)
<HANG>
Fixes: ba4dfef146 ("net: add driver for Synopsys Ethernet QoS device")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Jerome Forissier <jerome.forissier@linaro.org> says:
This series introduces threads and uses them to improve the performance
of the USB bus scanning code and to implement background jobs in the
shell via two new commands: 'spawn' and 'wait'.
The threading framework is called 'uthread' and is inspired from the
barebox threads [2]. setjmp() and longjmp() are used to save and
restore contexts, as well as a non-standard extension called initjmp().
This new function is added in several patches, one for each
architecture that supports HAVE_SETJMP. A new symbol is defined:
HAVE_INITJMP. Two tests, one for initjmp() and one for the uthread
scheduling, are added to the lib suite.
After introducing threads and making schedule() and udelay() a thread
re-scheduling point, the USB stack initialization is modified to benefit
from concurrency when UTHREAD is enabled, where uthreads are used in
usb_init() to initialize and scan multiple busses at the same time.
The code was tested on arm64 and arm QEMU with 4 simulated XHCI buses
and some devices. On this platform the USB scan takes 2.2 s instead of
5.6 s. Tested on i.MX93 EVK with two USB hubs, one ethernet adapter and
one webcam on each, "usb start" takes 2.4 s instead of 4.6 s.
Finally, the spawn and wait commands are introduced, allowing the use of
threads from the shell. Tested on the i.MX93 EVK with a spinning HDD
connected to USB1 and the network connected to ENET1. The USB plus DHCP
init sequence "spawn usb start; spawn dhcp; wait" takes 4.5 seconds
instead of 8 seconds for "usb start; dhcp".
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=446674
[2] https://github.com/barebox/barebox/blob/master/common/bthread.c
Link: https://lore.kernel.org/r/20250418141114.2056981-1-jerome.forissier@linaro.org
Add myself as the maintainer for the UTHREAD framework, the spawn/wait
commands and the associated tests.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a spawn command which runs another command in the background, as
well as a wait command to suspend the shell until one or more background
jobs have completed. The job_id environment variable is set by spawn and
wait accepts optional job ids, so that one can selectively wait on any
job.
Example:
=> date; spawn sleep 5; spawn sleep 3; date; echo "waiting..."; wait; date
Date: 2025-02-21 (Friday) Time: 17:04:52
Date: 2025-02-21 (Friday) Time: 17:04:52
waiting...
Date: 2025-02-21 (Friday) Time: 17:04:57
=>
Another example showing how background jobs can make initlizations
faster. The board is i.MX93 EVK, with one spinning HDD connected to
USB1 via a hub, and a network cable plugged into ENET1.
# From power up / reset
u-boot=> setenv autoload 0
u-boot=> setenv ud "usb start; dhcp"
u-boot=> time run ud
[...]
time: 8.058 seconds
# From power up / reset
u-boot=> setenv autoload 0
u-boot=> setenv ud "spawn usb start; spawn dhcp; wait"
u-boot=> time run ud
[...]
time: 4.475 seconds
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use the uthread framework to initialize and scan USB buses in parallel
for better performance. The console output is slightly modified with a
final per-bus report of the number of devices found, common to UTHREAD
and !UTHREAD. The USB tests are updated accordingly.
Tested on two platforms:
1. arm64 QEMU on a somewhat contrived example (4 USB buses, each with
one audio device, one keyboard, one mouse and one tablet)
$ make qemu_arm64_defconfig
$ make -j$(nproc) CROSS_COMPILE="ccache aarch64-linux-gnu-"
$ qemu-system-aarch64 -M virt -nographic -cpu max -bios u-boot.bin \
$(for i in {1..4}; do echo -device qemu-xhci,id=xhci$i \
-device\ usb-{audio,kbd,mouse,tablet},bus=xhci$i.0; \
done)
2. i.MX93 EVK (imx93_11x11_evk_defconfig) with two USB hubs, each with
one webcam and one ethernet adapter, resulting in the following device
tree:
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Hub (480 Mb/s, 100mA)
| GenesysLogic USB2.1 Hub
|
+-3 Vendor specific (480 Mb/s, 350mA)
| Realtek USB 10/100/1000 LAN 001000001
|
+-4 (480 Mb/s, 500mA)
HD Pro Webcam C920 8F7CD51F
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Hub (480 Mb/s, 100mA)
| USB 2.0 Hub
|
+-3 Vendor specific (480 Mb/s, 200mA)
| Realtek USB 10/100/1000 LAN 000001
|
+-4 (480 Mb/s, 500mA)
Generic OnLan-CS30 201801010008
Note that i.MX was tested on top of the downstream repository [1] since
USB doesn't work in the upstream master branch.
[1] https://github.com/nxp-imx/uboot-imx/tree/lf-6.6.52-2.2.0
commit 6c4545203d12 ("LF-13928 update key for capsule")
The time spent in usb_init() ("usb start" command) is reported on
the console. Here are the results:
| CONFIG_UTHREAD=n | CONFIG_UTHREAD=y
--------+------------------+-----------------
QEMU | 5628 ms | 2212 ms
i.MX93 | 4591 ms | 2441 ms
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
To prepare for the introduction of threads in the USB initialization
sequence, move code out of usb_init() into a new helper function:
usb_init_bus() and count the number of USB controllers initialized
successfully by using the DM device_active() function.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Add a thread framework test to the lib tests. Update the API
documentation to use the test as an example.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Introduce a uthread scheduling loop into udelay() when CONFIG_UTHREAD
is enabled. This means that any uthread calling into udelay() may yield
to uthread and be scheduled again later. There is no delay in the
scheduling loop because tests have shown that such a delay can have a
detrimental effect on the console (input drops characters).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Make the schedule() call from the CYCLIC framework a uthread scheduling
point too. This makes sense since schedule() is called from a lot of
places where uthread_schedule() needs to be called.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add struct uthread_mutex and uthread_mutex_lock(),
uthread_mutex_trylock(), uthread_mutex_unlock() to protect shared data
structures from concurrent modifications.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Add a new internal API called uthread (Kconfig symbol: UTHREAD) which
provides cooperative multi-tasking. The goal is to be able to improve
the performance of some parts of U-Boot by overlapping lengthy
operations, and also implement background jobs in the U-Boot shell.
Each uthread has its own stack allocated on the heap. The default stack
size is defined by the UTHREAD_STACK_SIZE symbol and is used when
uthread_create() receives zero for the stack_sz argument.
The implementation is based on context-switching via initjmp()/setjmp()/
longjmp() and is inspired from barebox threads [1]. A notion of thread
group helps with dependencies, such as when a thread needs to block
until a number of other threads have returned.
The name "uthread" comes from "user-space threads" because the
scheduling happens with no help from a higher privileged mode, contrary
to more complex models where kernel threads are defined. But the 'u'
may as well stand for 'U-Boot' since the bootloader may actually be
running at any privilege level and the notion of user vs. kernel may
not make much sense in this context.
[1] https://github.com/barebox/barebox/blob/master/common/bthread.c
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Test the initjmp() function when HAVE_INITJMP is set. Use the test as an
example in the API documentation.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add initjm[() to sandbox, a non-standard extension to setjmp()/
longjmp() allowing to initialize a jump buffer with a function pointer
and a stack pointer. This will be useful to later introduce threads.
With this new function it becomes possible to longjmp() to a particular
function pointer (rather than to a point previously reached during
program execution as is the case with setjmp()), and with a custom stack.
Both things are needed to spin off a new thread. Then the usual
setjmp()/longjmp() pair is enough to save and restore a context, i.e.,
switch thread. The implementation is taken verbatim from barebox [1] with
the exception of the additional stack_sz argument. It is quite complex
because contrary to U-Boot platform code we don't know how the system's
C library implements the jump buffer, so we can't just write the function
and stack pointers into it.
[1] https://github.com/barebox/barebox/blob/b2a15c383ddc/arch/sandbox/os/setjmp.c
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Implement initjmp() for RISC-V, a non-standard extension to setjmp()/
longjmp() allowing to initialize a jump buffer with a function pointer
and a stack pointer. This will be useful to later introduce threads.
With this new function it becomes possible to longjmp() to a particular
function pointer (rather than to a point previously reached during
program execution as is the case with setjmp()), and with a custom stack.
Both things are needed to spin off a new thread. Then the usual
setjmp()/longjmp() pair is enough to save and restore a context, i.e.,
switch thread.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Implement initjmp() for Arm. a non-standard extension to setjmp()/
longjmp() allowing to initialize a jump buffer with a function pointer
and a stack pointer. This will be useful to later introduce threads.
With this new function it becomes possible to longjmp() to a particular
function pointer (rather than to a point previously reached during
program execution as is the case with setjmp()), and with a custom stack.
Both things are needed to spin off a new thread. Then the usual
setjmp()/longjmp() pair is enough to save and restore a context, i.e.,
switch thread.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add the HAVE_INIJMP symbol to be set by architectures that support
initjmp(), a non-standard extension to setjmp()/longjmp() allowing to
initialize a jump buffer with a function pointer and a stack pointer.
This will be useful to later introduce threads. With this new function
it becomes possible to longjmp() to a particular function pointer
(rather than to a point previously reached during program execution as
is the case with setjmp()), and with a custom stack. Both things are
needed to spin off a new thread. Then the usual setjmp()/longjmp() pair
is enough to save and restore a context, i.e., switch thread.
Add the initjmp() prototype to <include/setjmp.h> since it is common to
all architectures.
Add an entry to the API documentation: doc/api/setjmp.rst.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
- Introducing back send_init_stream for omap_hsmmc
to perform the 74 clocks cycle sequence
- Move scmi regulator subnode hack to scmi_regulator
- Typo fix
Add a minimal generic RK3399 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3399 boards that follow reference board
design.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3328 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3328 boards that follow reference board
design.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576
SoC. This adds the needed board infrastructure and config for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As the name implies, it is built around the RK3576 SoC with 4x Cortex-A72
cores, four Cortex-A53 cores and Mali-G52 MC3 GPU.
Storage options are EMMC, SD-Card, a 2242 M.2 slot and the possibility to
use UFS 2.0 storage.
Video Output options are a HDMI port, a DSI connector as well as Display-
Port via the TypeC connector (all of them not yet supported).
Networking options are a Low-profile Gigabit Ethernet RJ45 port with
Motorcomm YT8531 PHY as well as WiFi via an AMPAK AP6256 module.
USB ports on the board are 1x USB 3.0 port, 1x USB 2.0 port, 1x USB Type-C
and it comes with 40-pin GPIO header
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250210205126.1173631-3-heiko@sntech.de
[ upstream commit: 887ff17cdd8f088a52e2b61e71f2b6c9b9678de6 ]
(cherry picked from commit 388e7272d092bd20e414cd408bac39d8fd02d765)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3576.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3576 uses a different base-compatible, as starting with this
generation, the clock phase tuning is done via registers inside
the mmc controller and not from inside the CRU.
In U-Boot we do not tune at all, so no other code changes are
necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for RK3576 to the rockchip sdhci driver.
It's pretty similar to its cousins found in the RK3568 and RK3588 and the
specific hs400-tx-tap number was taken from the vendor-u-boot.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for RK3576 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The current DT bindings for the rk3576 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.
This follows the implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72
and quad-core Cortex-A53 including 6TOPS NPU, Mali-G52 MC3, HDMI Out,
DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, UFS,
USB OTG 3.0, Type-C, USB 2.0, PCIe 2.1, SATA 3, Ethernet, SDIO3.0, I2C,
UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
[adapted for mainline u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Currently the sdram code for arm64 expects CFG_SYS_SDRAM_BASE to be 0.
The ram being in front and the device-area behind it.
The upcoming RK3576 uses a different layout, with the device area
in front the ram, which then also extends past the 4G mark.
Adapt both the generic zone definitions as well as the ATAG parser
to be usable on devices where CFG_SYS_SDRAM_BASE is not 0.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Radxa E20C is an ultra-compact network computer with a RK3528A SoC
that offers a wide range of networking capabilities.
Features tested on a Radxa E20C v1.104:
- SD-card boot
- eMMC boot
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3528 board that only have eMMC and SD-card
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3528 boards that follow reference board design.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.
Add initial support for the RK3528 GMAC variant.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The 480m clk is controlled using regs in the PHY address space and not
in the USB GRF address space on e.g. RK3528 and RK3506.
Add a clkout_ctl_phy usb2phy_reg to handle enable/disable of the 480m
clk on these SoCs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for rkrng variant, used by e.g. RK3528 and RK3576.
Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments for mainline.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Successive Approximation ADC (SARADC) in RK3528 uses the v2
controller and support:
- 10-bit resolution
- Up to 1MS/s sampling rate
- 4 single-ended input channels
- Current consumption: 0.5mA @ 1MS/s
Add support for the 4 channels of 10-bit resolution supported by SARADC
in RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the OTP controller in RK3528. The OTPC is similar to the
OTPC in RK3568 and can use the same ops for reading OTP data.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable clock stopping to gate clock during phase code change to ensure
glitch free phase switching in auto-tuning circuit. Fixes HS200 mode
on RK3528.
POST_CHANGE_DLY
Time taken for phase switching and stable clock output.
- Less than 4-cycle latency
PRE_CHANGE_DLY
Maximum Latency specification between transmit clock and receive clock.
- Less than 4-cycle latency
TUNE_CLK_STOP_EN
Clock stopping control for Tuning and auto-tuning circuit. When enabled,
clock gate control output is pulled low before changing phase select
codes. This effectively stops the receive clock. Changing phase code
when clocks are stopped ensures glitch free phase switching.
- Clocks stopped during phase code change
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add initial support for SDHCI controller in RK3528.
Only MMC Legacy and MMC High Speed (52MHz) mode is supported after this,
more work is needed to get the faster HS200/HS400/HS400ES modes working.
Variant tap and delay num is copied from vendor Linux tag
linux-6.1-stan-rkr5.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3528 and RK3576 use different tap and delay num for cmdout and strbin.
Move tap and delay num for cmdout and strbin to driver data to prepare
for adding new SoCs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip RK3528 is a ARM-based SoC with quad-core Cortex-A53.
Add initial arch support for the RK3528 SoC.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a rk3528-u-boot.dtsi extending the basic dts/upstream rk3528.dtsi
with bare minimum nodes to have a booting system from eMMC and SD-card.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add pinctrl driver for RK3528.
Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with adjustments
to use regmap_update_bits().
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for reading DRAM size information from PMUGRF os_reg18 reg.
Compared to most Rockchip SoCs the RK3528 use os_reg18 for DRAM info,
instead of os_reg2.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for generating Rockchip Boot Image for RK3528.
Similar to RK3568, the RK3528 has 64 KiB SRAM and 4 KiB of it is
reserved for BootROM.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa E20C has two buttons, one SARADC maskrom button and one GPIO user
button.
Add support for the maskrom button using a adc-keys node, also add the
regulators used by SARADC controller.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 3a2819ee9c71d1c6388e456cc4eb042914d15d7e ]
(cherry picked from commit 460ef5b623e5fa69843305faf50f6b1a8e81e1cd)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa E20C has three gpio controlled leds (sys, wan and lan).
Add led nodes and set default trigger to heartbeat for the sys led and
netdev for the lan and wan leds.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250304201642.831218-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 6a709e003492e9878d5f1357be0b2e1162e1e6a6 ]
(cherry picked from commit a3556ede6b48c7760ac3608ad77601fca26d2ce0)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa E20C route UART0 M0 pins (GPIO4_C7 and GPIO4_D0) to the onboard
CH340B for debug console use.
Add pinctrl for UART0 M0 pins used for serial console.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250228064024.3200000-6-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0d2312f0d3e4ce74af0977c1519a07dfc71a82ac ]
(cherry picked from commit 9bcf6ccdd87c3be48fe7d75150c6e403c5c0a42d)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Quality-of-Service (QsS) node stores/restores specific
register contents when the power domains is turned off/on.
Add QoS node so that they can connect to the power domain.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250306123809.273655-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 61a05d8ca3030a544175671f5fab7a8f29c24085 ]
(cherry picked from commit 9ee90dfd6957fcc42ea94c43d195b01d1b286713)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add pinctrl and gpio nodes for RK3528 and import rk3528-pinctrl.dtsi
from vendor linux-6.1-stan-rkr5 kernel with the hdmi-pins-idle node
removed due to missing label reference to pcfg_output_low_pull_down.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250228064024.3200000-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: a31fad19ae39ea27b5068e3b02bcbf30a905339b ]
(cherry picked from commit 89a24fa2e923b68a42ccc8cc9cb2d5bdf291ac40)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dt node for RK3528 clock and reset unit. Clock "gmac0_clk" is
generated by internal Ethernet phy, a fixed clock node is added as a
placeholder to avoid orphans.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250217061142.38480-9-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 858cdcdd11cf9913756297d3869e4de0f01329ea ]
(cherry picked from commit 60741472b42e92d2393327cb70669ab90e3b382f)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are two types of clocks in RK3528 SoC, CRU-managed and
SCMI-managed. Independent IDs are assigned to them.
For the reset part, differing from previous Rockchip SoCs and
downstream bindings which embeds register offsets into the IDs, gapless
numbers starting from zero are used.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250217061142.38480-6-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: e0c0a97bc308f71b0934e3637ac545ce65195df0 ]
(cherry picked from commit 8768d063e732e64892e4d1d09aa583d1394c8388)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Linux commit 6ee0b9ad3995 ("arm64: dts: rockchip: Add rng node to
RK3588") merged for v6.15-rc1 add a proper rng node to the device tree.
The compatible used differs compared to what U-Boot is currently using.
Replace the old trngv1 compatible with the dts/upstream compatible in
the rng driver and remove the old rng node compatible override from SoC
u-boot.dtsi to keep rng working after the driver change.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Linux commit afeccc408496 ("arm64: dts: rockchip: add DT entry for RNG
to RK356x") merged for v6.12-rc1 add a proper rng node to the SoC DT.
Remove the rng node from SoC u-boot.dtsi now that the rng driver support
the compatible used in dts/upstream DT. Ensure the rng node is enabled
to support rng on RK3566 variants.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Linux commit afeccc408496 ("arm64: dts: rockchip: add DT entry for RNG
to RK356x") merged for v6.12-rc1 add a proper rng node to the SoC DT.
The compatible used differs compared to what U-Boot is currently using.
Add support for the rk3568-rng used in upstream Linux. Support for the
cryptov2-rng compatible is still kept because PX30/RK3326 and RK3308 are
still using it.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The meminfo and rng commands are helpful for testing, enable them.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The meminfo and rng commands are helpful for testing, enable them.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
BOARD_LATE_INIT is already selected by ROCKCHIP_RK3588 so there is no
need to select it under any board target config.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
BOARD_LATE_INIT is already selected by ROCKCHIP_RK3568 so there is no
need to select it under any board target config.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Ensure rk3588_common.h can be used by boards directly by defining a
blank ROCKCHIP_DEVICE_SETTINGS unless it already is defined.
Add a default SYS_CONFIG_NAME to include rk3588_common.h unless a board
target overrides it in its board Kconfig.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Ensure rk3568_common.h can be used by boards directly by defining a
blank ROCKCHIP_DEVICE_SETTINGS unless it already is defined.
Add a default SYS_CONFIG_NAME to include rk3568_common.h unless a board
target overrides it in its board Kconfig.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Ensure ROCKCHIP_DEVICE_SETTINGS is defined before including
rk3588_common.h in board include/configs files.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Ensure ROCKCHIP_DEVICE_SETTINGS is defined before including
rk3568_common.h in board include/configs files.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The partitions env variable is using an outdated partition layout that
is typically expected to be used with older vendor miniloader blobs.
Rockchip devices will run fine using any partition layout if the first
16 MiB of MMC storage is ignored/skipped.
Remove the partitions env variable to stop encourage users a continued
use of this outdated partition layout on RK3588 devices.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The partitions env variable is using an outdated partition layout that
is typically expected to be used with older vendor miniloader blobs.
Rockchip devices will run fine using any partition layout if the first
16 MiB of MMC storage is ignored/skipped.
Remove the partitions env variable to stop encourage users a continued
use of this outdated partition layout on RK356x devices.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Define constants for hptimer reg names and use them instead of magic
numbers in rockchip_stimer_init().
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip RK3576 SoC uses a different DRAM base address, 0x40000000,
compared to prior SoCs.
Add default options that should work when 0x40000000 is used as DRAM
base address. Use same offsets as before, just below 64 MiB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
New Rockchip SoCs will typically require use or an external TPL when
support for the SoC is added to U-Boot.
Move imply ROCKCHIP_EXTERNAL_TPL under SoC Kconfig symbol to remove a
future likelihood of a long "default y if" line.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ROCKCHIP_COMMON_STACK_ADDR Kconfig option was originally enabled
in the SoC specific Kconfig files to ease during the initial migration
to use common stack addresses.
All boards for the affected SoCs have been migrated to use common stack
addresses. Migrate to use an imply under the SoC symbol instead of
re-define the symbol in each SoC specific Kconfig file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A few Rockchip ARMv7 SoCs use 0x60000000 as DRAM base address instead of
the more common 0x0 DRAM base address used on AArch64 SoCs.
Add default options that should work for these ARMv7 SoCs. Same offsets
as before are used, just below 64 MiB. Hex values have also been padded
to improve alignment.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The stack-pointer addresses used with ROCKCHIP_COMMON_STACK_ADDR expect
that DRAM is initialized by TPL or ROCKCHIP_EXTERNAL_TPL, that SPL has
access to full DRAM and SPL is loaded to/executed from start of DRAM.
Add depends on to ensure use of the ROCKCHIP_COMMON_STACK_ADDR symbol
does not cause problem for any board not using TPL and back-to-BROM
loading of SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR currently imply the
TPL_ROCKCHIP_COMMON_BOARD option when TPL=y. This is inconvenient for a
SoC with very limited SRAM to use a custom tpl.c together with the
common stack addresses.
Move any imply TPL_ROCKCHIP_COMMON_BOARD to under the SoC symbol, where
it belongs. Add the missing imply to RK3328 and PX30 use a SoC specific
tpl.c and only expect imply TPL_LIBGENERIC_SUPPORT.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Haikou carrierboard allows multiple adapter boards to be connected, for
now there exists the following adapter boards compatible with PX30
Ringneck:
- Haikou Video Demo on the Video Connector,
- Haikou LVDS 9904379 on the Video Connector,
So support DT overlays so we can use this mechanism instead of full DTB
containing both the carrierboard and the adapter.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to be able to use Device Tree Overlays, the fdtoverlay_addr_r
needs to be specified.
Follow what's been done for other Rockchip SoCs and leave 1MiB for the
base DTB before the address for the overlay.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
I don't see a reason why this should only be enabled on a per-board
basis. The rng IP is inside the SoC and doesn't seem to rely on anything
external to it, therefore let's enable it on the SoC DTSI and remove the
now empty px30-evb-u-boot.dtsi.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The build system uses HAVE_VENDOR_COMMON_LIB to automatically include
board/$(VENDOR)/common/Makefile, therefore let's use that to implicitly
include board/theobroma-systems/common/Makefile and compile the common.c
file when building proper.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Nothing is calling the function rk_board_init() and the io-domain driver
can handle the functions intended purpose based on information from DT.
Cleanup by removing the unused rk_board_init() function and re-sort
included headers.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add sandbox64_lwip_defconfig based on sandbox64_defconfig with NET_LWIP
enabled.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that the DSA tests in test/dm/dsa.c are compatible with NET_LWIP,
remove the dependency of DM_DSA on NET.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the tests to use the do_ping() interface which is now
common to NET and NET_LWIP. This allows running most network test with
SANDBOX and NET_LWIP. A few things to note though:
1. The ARP and IPv6 tests are enabled for NET only
2. The net_retry test is modified to use eth0 (eth@10002000) as the
active (but disabled) interface, and therefore we expect eth1
(eth@10003000) to be the fallback when "netretry" is "yes". This is in
replacement of eth7 (lan1) and eth0 (eth@10002000) respectively.
Indeed, it seems eth7 works with NET by chance and it certainly does not
work with NET_LWIP. I observed that even with NET,
sandbox_eth_disable_response(1, true) has no effect: remove it and
the test still passes. The interface ID is not correct to begin with; 1
corresponds to eth1 (eth@10003000) as shown by debug traces, it is not
eth7 (lan1). And using index 7 causes a SEGV. In fact, it is not the
call to sandbox_eth_disable_response() that prevents the stack from
processing the ICMP reply but the timeout caused by the call to
sandbox_eth_skip_timeout(). Here is what happens when trying to ping
using the eth7 (lan1) interface with NET:
do_ping(...)
net_loop(PING)
ping_start()
eth_rx()
sb_eth_recv()
time_test_add_offset(11000UL);
if (get_timer(0) - time_start > time_delta)
ping_timeout_handler() // ping error, as expected
And the same with NET_LWIP:
do_ping(...)
ping_loop(...)
sys_check_timeouts()
net_lwip_rx(...)
sb_eth_recv()
time_test_add_offset(11000UL);
netif->input(...) // the packet is processed succesfully
By choosing eth0 and sandbox_eth_disable_response(0, true), the incoming
packet is indeed discarded and things work as expected with both network
stacks.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make the do_ping() function in cmd/net.c a global one by getting rid of
the static qualifier, and move the prototype declaration from net-lwip.h
to net-common.h. This makes the function available to other parts of
U-Boot when CONFIG_NET=y, as was already the case when
CONFIG_NET_LWIP=y.
This is a peparation step to make the sandbox tests use a common API
between NET and NET_LWIP.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The tests in test/dm/eth.c and test/dm/dsa.c use interfaces that have
no static IP addresses configured in the board's default environment
file. That will be a problem when NET_LWIP=y because the lwIP stack
refuses to send ICMP packets through an interface that doesn't have an
IP ("no route to host"). Therefore and in preparation for enabling the
sandbox tests with NET_LWIP, provide such addresses in
board/sandbox/sandbox.env.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make the sandbox mock ethernet driver (drivers/net/sandbox.c) compatible
with NET_LWIP by not relying on any of the structures or functions
defined in net-legacy.h. This is done by providing local definitions of
the various protocol structures (Ethernet, ARP, IPv4, ICMP). Drop the
stub driver that was introduced specifically for NET_LWIP
(drivers/net/sandbox-lwip.c).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the sandbox timer is available, use it. This allows skipping
time in the tests (sandbox_eth_skip_timeout()).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use net_start_again() in do_ping() to determine if a failed ping should
be restarted on a different interface.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement net_start_again() when NET_LWIP=y in a very similar way to
NET. This will be used in a future commit to determine if a failed
ping needs to be tried again on a different interface.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The things that are done prior to executing a network command with
NET_LWIP are not consistent with what is done with NET. It impacts the
selection of the current device, and more precisely if the active device
is invalid NET would return an error while NET_LWIP would try to pick a
new device. This incorrect behavior was detected thanks to the eth_rotate
sandbox test (dm_test_eth_rotate()).
Fix it by re-using a sequence similar to what NET has in net_loop().
This piece of code is inserted in a function called net_lwip_eth_start()
renamed from net_lwip_eth_set_current().
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
initr_net() initalizes the network devices by calling eth_initalize().
There is no good reason to disable this if no command line interface is
present.
Let initr_net() depend on CONFIG_NET || CONFIG_NET_LWIP.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CMD_PXE is already under CMD_NET in Kconfig that's why make no sense to
have another ifdef inside source code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
!A || (A && B) is equivalent to !A || B
Drop the middle expression from the statement
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
In IPv6, the broadcast MAC address is not used. Instead, it should use
the multicast address (see RFC RFC2464).
Add IPV6_ALL_NODE_ETH_ADDR macro for clarity.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: 6b403ca4dc ("fwu: DeveloperBox: add support for FWU")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Masahisa Kojima <kojima.masahisa@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250407170529.893307-2-vincent.stehle@arm.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
f_acm calls usb_ep_disable(f_acm->ep_notify) unconditionally in
acm_start_ctrl(), even if the USB endpoint was never enabled before. This
causes crashes for some UDC drivers (e.g. ci_udc), because they dereference
data structures that are assigned only after having called usb_ep_enable().
The f_acm driver in U-Boot is similar to the Linux driver, where this issue
does not occur because usb_ep_disable() and usb_ep_enable() internally
track the enabled state. In Linux this change was made in commit
b0bac2581c19 ("usb: gadget: introduce 'enabled' flag in struct usb_ep") by
Robert Baldyga.
Fix the crashes for f_acm by making the same change in U-Boot. This makes
the API less bug-prone and avoids introducing crashes when adapting new
gadget drivers from Linux.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250407-acm-fixes-v1-3-e3dcb592d6d6@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
When using IOMUX, the "usbacm" console can be added/removed dynamically
from the stdout/stderr/stdin environment variables to allow temporarily
starting other USB gadgets (e.g. Fastboot).
However, right now acm_stdio_stop() does not completely undo
acm_stdio_start(): The USB gadget is unregistered, but as long as dev->priv
stays set acm_stdio_start() will never register the USB gadget again.
Clear dev->priv after we detach to make sure a start operation after a stop
operation registers the gadget again.
Fixes: fc2b399ac0 ("usb: gadget: Add CDC ACM function")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250407-acm-fixes-v1-2-e3dcb592d6d6@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
U-Boot has an older version of the Linux gadget API, where USB endpoints
returned by usb_ep_autoconfig() are not automatically claimed. As written
in the documentation comment:
"To prevent the endpoint from being returned by a later autoconfig call,
claim it by assigning ep->driver_data to some non-null value."
Right now f_acm doesn't do that, which means that e.g. ep_in and ep_notify
may end up being assigned the same endpoint. Surprisingly, the ACM console
is still somehow working, but this is not the expected behavior. It will
break with a later commit that disallows calling usb_ep_enable() multiple
times.
Fix this by assigning some data to ep->driver_data, similar to the other
gadget drivers.
Fixes: fc2b399ac0 ("usb: gadget: Add CDC ACM function")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250407-acm-fixes-v1-1-e3dcb592d6d6@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
The current code attempts to bind scmi_voltage_domain to regulator subnode
of the SCMI protocol node, so scmi_voltage_domain can then bind regulators
directly to subnodes of its node. This kind of behavior should not be in
core code, move it into scmi_voltage_domain driver code. Let the driver
descend into regulator node and bind regulators to its subnodes.
Fixes: 1f213ee4db ("firmware: scmi: voltage regulator")
Signed-off-by: Marek Vasut <marex@denx.de>
[Alice Guo: Fix scmi_regulator_bind]
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This callback is used to send the 74 clock cycles after power up.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The default value of 0x800000 (8 MB) is somewhat limiting for us, as our
compressed kernel may grow up to around 4 MB. By choosing the commonly
used value of 0x2000000 (32 MB), we are definitely on the safe side.
This rather large amount should be fine, as we have 128 MB of RAM.
Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Jiaxun Yang <jiaxun.yang@flygoat.com> says:
This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.
I also converted the target to OF_UPSTREAM.
This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```
Link: https://lore.kernel.org/r/20240517-boston-v3-0-1ea7d23f4a1d@flygoat.com
Paul had left MIPS a couple of years ago, his email address is
no longer valid.
Replace it with his kenrel.org email, which has been used in
kernel and QEMU, in case we still want to reach him.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
In upstream devicetree, clk_boston is a child of syscon node
and there is no "regmap" property for clk_boston node.
Try to check parent device first to look for syscon.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Provide default environment variables on image loading address
to make the board useful.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This is a PC-like platform board.
Enable drivers for most on-board devices to make it useful.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Remove hard dependencies to arch headers, get clock from clk
subsystem if arch clock function is not available, align
compatible strings with devicetree binding.
No functional change on existing platforms, just get it build
on other platforms.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Ensure that we are using correct physical/virtual address for
DMA buffer write and hardware register settings.
The convention is: in ahci_ioports all pointers are virtual,
that will be converted to physical address when writing to
hardware registers or into sg/cmd_tbl.
Also fixed 64bit physical address support for dwc_ahsata, ensure
higher bits are written into registers/sg properly.
Use memalign for allocating aligned buffer in dwc_ahsata so we
don't have to do our own alignment in driver.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
For MIPS we are always looking gd->dram in virtual address so
PCI_MAP_SYSTEM_MEMORY should always be enabled.
If in future we ever want to make it physical we have to set
ARCH_MAP_SYSMEM.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Boston has a very limited memory range for PCI controllers, where
1MB can't easily fit into it.
Make alignment boundary of PCI memory resource allocation a Kconfig
option and default to 0x10000 for boston.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Probe size of ecam from devicetree properly and cap accessible
bus number accorading to ecam region size to ensure we don't go
beyond hardware address space.
Also disable all interrupts to ensure errors are handled silently.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Jerome Forissier <jerome.forissier@linaro.org> says:
There is a bug in the print_guid() unit test in test/common/print.c when
PARTITION_TYPE_GUID is not enabled but either CMD_EFIDEBUG or EFI are.
The first patch fixes the issue and the second one enables UNIT_TEST in
the qemu_arm64 defconfig so that the unit tests are run in CI (this
platform has CMD_EFIDEBUG so the bug applies).
Link: https://lore.kernel.org/r/20250416074839.1267396-1-jerome.forissier@linaro.org
The name defined for PARTITION_SYSTEM_GUID in list_guid[] depends on
configuration options. It is "system" if CONFIG_PARTITION_TYPE_GUID is
enabled or "System Partition" if CONFIG_CMD_EFIDEBUG or CONFIG_EFI are
enabled. In addition, the unit test in test/common/print.c is incorrect
because it expects only "system" (or a hex GUID).
Make things more consistent by using a clear and unique name: "EFI
System Partition" whatever the configuration, and update the unit test
accordingly.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the follow board to VIRT which otherwise would be unmaintained:
* qemu-riscv64_smode_acpi_defconfig
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add the following boards to VIRT which otherwise would be unmaintained.
* qemu_arm64_acpi_defconfig
* qemu_arm64_lwip_defconfig
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The qemu* "generic" targets (i.e. not those emulating a particular
board) are typically used for testing as many features as possible,
especially in CI so it makes sense to have UNIT_TEST enabled for
all of the defconfigs for these targets.
Not enabling UNIT_TEST in qemu-x86_defconfig due to:
LD u-boot
ld.bfd: section .rel.dyn VMA wraps around address space
ld.bfd: section .start16 LMA [fffff800,fffff86f] overlaps section .rel.dyn LMA [ffffb77c,0002ac93]
make: *** [Makefile:1824: u-boot] Error 1
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Some test commands (such as "false", or the empty string) need
CONFIG_HUSH_PARSER=y. Fix test/cmd/command.c.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
i2c updates for v2025.07-rc1
- omap24xx_i2c: Enable Repeated Start functionality
add Repeated Start functionality for the DM_I2C xfer
API (omap_i2c_xfer()
from Aniket Limaye
- mediatek i2c driver
fixes from Martin
- add end marker for struct udevice_id mtk_i2c_ids
- remove duplicate entry in mt_i2c_regs_v1
This pull request contains updates for the SoCFPGA platform, targeting
the 2025.07 release cycle. Highlights include enhancements to Agilex5
support, improvements in DDR error handling, and bridge reset handling
for SoC64 devices.
Key updates:
Agilex5 platform enhancements:
* New MMU region mappings and memory layout updates using
LMB_ARCH_MEM_MAP.
* Fixes for bloblist configuration, kernel FIT image generation, and
VAB flow enablement.
* GPIO pin control added for SDIO selection.
* Marvell PHY driver enabled in defconfig.
Agilex5 / SoC64 DDR subsystem:
* Added ECC debug improvements for IOSSM.
* Introduced LPDDR inline ECC support.
* Resolved size calculation overflow in memory driver.
SoC64 improvements:
* Enhanced mailbox communication with the SDM to reflect various
boot stage transitions.
* Implemented F2S bridge reset support and updated related reset
manager registers.
* Expanded SoC64 CPU info reporting.
General maintenance:
* Additional peripherals released from reset for Arria10.
* Cleanup of legacy or incorrect Kconfig implications.
This patch set has been tested on Agilex 5 devkit.
Passing all pipeline tests at:
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/25867
Add a Kconfig option to disable sending Stop conditions between multiple
i2c_msgs within a single xfer. Enable this config by default for ARCH_K3
platforms.
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Repeated Start Condition (Sr) can be used to transfer multiple i2c msgs
without sending a Stop condition (P). So far, the driver default was to
always send a Stop condition after every i2c msg.
Add support for a config option (CONFIG_SYS_I2C_OMAP24XX_REPEATED_START)
to disable sending the Stop condition by default. If this config is
enabled, Stop condition will be sent only if explicitly requested in the
msg flags OR if it is the last msg in the transfer.
Consequently, handle the Repeated Start condition (Sr) in the next msg
by not calling the wait_for_bb() check since it will simply timeout in
the absence of a stop condition (BB will be 1 until Stop is programmed)
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove __omap24_i2c_read/write() usage from omap_i2c_xfer() in favour of
the more flexible __omap24_i2c_xfer_msg().
Consequently, these are also no longer needed when DM_I2C is enabled.
New function __omap24_i2c_xfer_msg() will take care of individual read
OR write transfers with a target device. It goes through below sequence:
- Program the provided Target Chip address (OMAP_I2C_SA_REG)
- Program the provided Data len (OMAP_I2C_CNT_REG)
- Program the provided Control register flags (OMAP_I2C_CON_REG)
- Read from or Write to the provided Data buffer (OMAP_I2C_DATA_REG)
For a detailed programming guide, refer to the TRM[0] (12.1.3.4 I2C
Programming Guide).
This patch by itself should be a transparent change. However this is
needed for implementing a proper Repeated Start (Sr) functionality for
i2c_msgs.
Previous implementation for omap_i2c_xfer called __omap24_i2c_read/write
functions, with hardcoded addr=0 and alen=0 for each i2c_msg. Each of
these calls would program the registers always with a Stop bit set, not
allowing for a repeated start between i2c_msgs in the same xfer().
[0]: https://www.ti.com/lit/zip/spruj28 (TRM)
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove unused piece of code under CONFIG_I2C_REPEATED_START which does
not have any Kconfig entry at all.
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
In-line ECC support was added for LPDDR by reserving the last one-eighth
of the memory space for ECC data. Full memory initialization using the
BIST MEM INIT mailbox command, based on address and size, is required to
correctly generate ECC data and enable proper ECC logic verification.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Cache allocation for dirty writes in the CCU system cache was disabled
for performance optimization.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
LMB_ARCH_MEM_MAP is enabled, and lmb_arch_add_memory() is introduced to
correctly handle memory reservations for the second and third DDR
memory banks.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
As of 2025, Altera is now a standalone company prior to
being a subsidiary of Intel Corporation.
Update CPU info printout naming from Intel to Altera.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Use GPIO hogging method in device tree to set SDIO_SEL pin (portb3)
direction as output with value 0 after power-on reset.
This is to ensure stable 0V voltage reading from SDIO_SEL GPIO pin
after board init.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
CONFIG_BLOBLIST_FIXED and CONFIG_BLOBLIST_ADDR options were
unintentionally removed during recent external updates to the defconfig.
This patch restores the missing entries to ensure proper board
functionality. No new features are introduced.
Fixes: d6a53f523a ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
The use of both "imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION" and
"imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE" here is wrong as
those are both part of the same choice statement. Furthermore you cannot
select/imply something from a choice statement, it must be a "default ...
if ..." construct within the choice statement in question.
Signed-off-by: Tom Rini <trini@konsulko.com>
Vendor Authorized Boot flow configurations are enabled for boards
based on Agilex5 SoCFPGA. Also, required changes are made to the
SoCFPGA make file for building and linking relevant secure source
code files.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Load and entry addresses are corrected for Agilex5 SoCFPGA board
which would enable to generate the kernel itb file with the right
addresses.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Send out "HPS_STAGE_NOTIFY" mailbox command to the
Secure Device Manager (SDM) in SPL to inform SDM on
FSBL execution.
This is necessary for the SDM to recognize that the
FSBL stage has begun its execution and should be
made as early as possible in the FSBL process.
Therefore, the mailbox will initialize and send out
the notification right after the completion of timer
initialization.
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Enable reset support for FPGA2SDRAM bridge for Stratix10, as well as
FPGA2SoC and SoC2FPGA bridges for all SoC64 families.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Add reset manager registers in preparation for F2S bridge reset
support as well as the mask support to enable/disable the bridges.
Mask value:
BIT0: soc2fpga
BIT1: lwhps2fpga
BIT2: fpga2soc
These bridges are available only in Stratix10:
BIT3: f2sdram0
BIT4: f2sdram1
BIT5: f2sdram2
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Introducing a new mailbox command "HPS_STAGE_NOTIFY" to notify Secure
Device Manager (SDM) on the stage of HPS code execution.
Generally, there are three main code execution stages: First Stage Boot
Loader (FSBL) which is U-Boot SPL, Second Stage Boot Loader (SSBL) which
is U-Boot, and the Operating System (OS) which is Linux.
This enables the user to query the SDM for HPS error details.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Current implementation releases most peripherals out of reset for
gen5, but A10 has more peripherals than gen5, hence this patch is
required to release the rest of peripherals to support old kernels.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Data structure, dramaddrw, is defined as u32. Compiler performs
32-bit arithmetic and logic operations on this data structure. Fix
is provided to avoid integer overflow while performing shifting
operations greater than 32-bit.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
* Use calloc() to allocate token_list. This avoids an illegal free if
sqfs_tokenize() fails.
* Do not iterate over token_list if it has not been allocated.
Addresses-Coverity-ID: 510453: Null pointer dereferences (FORWARD_NULL)
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Implement exfat_fs_rename() to rename or move files. This is used
by the 'mv' generic FS interface command. The rename implementation
for other filesystems was added recently and was not part of exfat
porting layer due to merge issue, which made 'mv' command crash,
fix this by adding the missing implementation.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Add test for the 'test -e' command to check for existence of files.
This exercises struct fstype_info .exists callback.
Signed-off-by: Marek Vasut <marex@denx.de>
The exfat_fs_exists() should return 0 in case the path does not exist,
and 1 in case the path does exist. Fix the inverted return value. This
fixes 'test -e' command with exfat.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
The exfat_fs_readdir() depends on state created in exfat_fs_opendir(),
but that state may be disrupted by fs_close() called by the FS layer
in fs_opendir(), because exfat porting layer unmounts the filesystem
in ->close() callback.
To avoid this disruption, avoid creating state in exfat_fs_opendir(),
cache only the directory name to list there, and rework exfat_fs_readdir()
to work in a similar way to exfat_fs_ls(). That is, make exfat_fs_readdir()
open the directory, look up specific entry, extract its properties to be
reported to FS layer, and close the directory. This is slow, but avoids
the disruption. The slowness does not affect regular 'ls' command, which
uses exfat_fs_ls() fast path.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Write into a bogus file, like '/.', triggers an "impossible"
print from the exfat core code. That should not be printed
in U-Boot, because U-Boot prints its own error message sooner.
Inhibit this error message.
The following command triggers the bogus print:
"
=> save host 0:0 1000008 /. 0x10
"
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Make sure the node is never dirty before being released, flush
the node first using exfat_flush_node() and only then release
the node using exfat_put_node(). This now matches the behavior
of exfat_fs_write() too.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
This was applied prematurely by me as I missed the feedback provided at
the time.
This reverts commit c9c8df2c37.
Signed-off-by: Tom Rini <trini@konsulko.com>
Updates for RPi for 2025.07:
- copy over uart clock-frequency in DT
- always set fdt_addr with firmware-provided FDT address
- Set bootm_size to 512MB
- Drop fdt_high and initrd_high
- Update environment to support booti and large initrd
MIPS_RELOCATION_TABLE_SIZE=0x8000 is too small to enable UNIT_TEST.
Increase it by 50 % (16 KiB).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit f98cd471f0 ("clk: clk-composite: Resolve parent clock by
name") the StarFive VisionFive 2 board fails to boot.
Before that patch the SPL debug UART showed warnings like:
clk_register: failed to get pll0_out device (parent of perh_root)
clk_register: failed to get pll0_out device (parent of qspi_ref_src)
clk_register: failed to get pll0_out device (parent of usb_125m)
clk_register: failed to get pll0_out device (parent of gmac_src)
clk_register: failed to get pll0_out device (parent of gmac1_gtxclk)
clk_register: failed to get pll0_out device (parent of gmac0_gtxclk)
The &pllclk clock needs to be enabled early.
Fixes: f98cd471f0 ("clk: clk-composite: Resolve parent clock by name")
Suggested-by: Marek Vasut <marex@denx.de>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use only a single -machine parameter.
Describe that the same invocation of qemu-system-<arch> has to be
used for dumping the device-tree as will be used when executing U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The EFI selftest should match executing a real EFI binary
as closely as possible.
Use do_bootefi_exec() to enter the EFI selftest.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To avoid the problem fixed in commit 57a95d522ca8 ("doc: release_cycle:
fix next release version") moving forward, make use of the variable
substitution feature of rST. This adds a next_ver variable and
references it in all of the places where I had been listing the version
being worked on.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
As the system table already has pointers to the Simple Text Input and
Output Protocols we can directly use these instead of calling
OpenProtocol.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The PIT timer needs to be available early in the SPL phase,
otherwise SPL fails to boot and only prints:
Could not initialize timer (err -96)
Fix this problem by passing 'bootph-all' to the sama5d2 PIT node.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Rather than maintaining custom hush scripting to boot the SDK, migrate
to a 'standard boot' method which simplifies maintenance and enables
multiple distributions to use this evaluation module.
Signed-off-by: Bryan Brattlof <bb@ti.com>
CU_CLKOUT0 can be driven by two input clocks: a 25 MHz and a 50 MHz source.
Currently, the 25 MHz option is not selectable due to an incorrect mux
configuration where the 50 MHz clock is duplicated in the parent list.
This patch fixes the mux setup, allowing proper selection of the 25 MHz
clock source for MCU_CLKOUT0.
Similar configuration is already correctly implemented in AM62 clock
data for 'hsdiv4_16fft_main_2_hsdivout1_clk10', where MCU_CLKOUT0
parent switching behaves as expected.
Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62px/clocks.html#clocks-for-board0-device
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Christian Marangi <ansuelsmth@gmail.com> says:
This is continuation of the initial patchset for airoha
support.
Some are trivial fix for spi.
A new concept to setup SPI from detected NAND.
Sadly DTS node still need to be merged upstream so we
are currently adding them to u-boot dtsi and it's planned
to be dropped once they are accepted in upstream kernel.
Link: https://lore.kernel.org/r/20250407200208.25594-1-ansuelsmth@gmail.com
Add Airoha SPI NAND driver to permit usage of attached SNAND on the
Airoha AN7581 SoC. While SPI controller supports DMA transation, due to
U-Boot limitation we currently limit it to single command in Manual
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Call SPI setup_for_spinand() if supported and defined to configure the
SPI slave for the attached NAND. This is needed to configure the SPI
with the NAND page size and spare size for correct configuration of the
device.
Call it as soon as the NAND is detected to correctly handle SPI
controller with select_op_variant detection.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
A common device attached to SPI are SPI NAND and some device might
require to have info on the attached NAND to know the flash page size
and spare size.
To support this, introduce setup_for_spinand() that pass the attached
spinand info from manufacturer.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[trini: Switch to forward declaration of struct spinand_info]
Signed-off-by: Tom Rini <trini@konsulko.com>
Drop unneeded spi.h header include from spinand.h, nothing included by
spi.h is actually used in this header and .c should correctly included
spi.h if actually needed.
Replace spi.h with linux/bitops.h as this is what is actually required
for spinand.h
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Port Linux kernel regmap_set/clear_bits shorthands to set and clear bits
in a regmap. These are handy if only specific bits needs to be applied
or cleared and makes it easier to port regmap based driver from kernel
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support
for it in default images.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add eMMC nodes with the fixed regulator and fixed clock. It's also
needed to assign the clock and set it to 200MHz as it's set to 150Mhz by
default.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Airoha new SoC implement the same Mediatek driver for MMC. Permit to
also build for Airoha arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly
rewritten and simplified version of the Linux airoha_eth.c driver.
It's has been modified to support a single RX/TX ring to reflect U-Boot
implementation with recv and send API.
The struct and the define are kept as similar as possible to upstream
one to not diverge too much.
The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x
but doesn't require any modification aside from setting the CPU port and
applying the Flood configuration hence it can be handled entirely in the
Ethernet driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.
The driver uses two firmware files, for which updated versions are added to
linux-firmware already.
Based on the Linux upstream 8811 driver code(air_en8811h.c),
I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.
The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini,
and it is loaded from there.
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Line 171 in README is describing that before relocation no code
should use global variable because global variables are placed
to BSS section which is initialized to 0 after relocation.
In the case of ZynqMP, where DTB reselection is enabled, the EEPROM
is read again after relocation. This prevents the issue from being
observed. However, in Versal Gen 2, where DTB reselection is also
enabled, the EEPROM is not read after relocation because it is not
yet wired in board_init(). This leads to a situation where the code
accesses an incorrect memory location, because none is really
checking the board_info is valid or not. To fix, move the board_info
into the data section and also check whether it is valid or not.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162553.588285-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250410092528.3713904-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The mini u-boot is getting exception because of an initial
stack pointer address is used at near the top of memory,
and while executing u-boot is assigned pre-malloc and
global_data memory after initial stack pointer and updated
the stack pointer. Serial driver is used pre-malloc area
for serial operations before relocation. But pre-malloc area
is cleared while doing BSS at relocation time. The u-boot is
called board_init() function and doing printf, relocation serial
driver is not initialized yet, so it is using before relocation
serial operations but it is cleared by BSS and got the exception.
To fix, change an initial stack pointer address from near the
top of memory to near the relocation memory.
Fixes: 685874939a ("configs: versal: update initial stack pointer")
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407134544.3951763-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for loading the secure & non-secure pdi images and PL
bitstream on the Versal Gen2 platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal Gen2 device.
PDI is the new programmable device image format for Versal Gen2,
and the bitstream for the Versal Gen2 platform is generated exclusively
in this format.
With the enhanced SMC format in TF-A ensuring transparent payload
forwarding for Versal Gen2, the u-boot driver must now handle the
word swapping of PDI address that was previously done in TF-A for
this API. The source code for the Versal2 loadpdi command and the
CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.
The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Introducing additional flag to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Generally, flag variable is used to enable or disable certain features,
specify additional parameters (such as error handling), or modify how
the function operates.
Hence, in this function flags is an integer that can be used to pass
configuration options to the fpga_load function. Here, it's
initialized to 0, meaning no special options are enabled, but it could
modify the flags to influence the function's behavior.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-3-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Enabling the capability to automatically perform FPGA configuration
when booting Linux FIT image via bootm command. The FPGA
configuration bitstream shall be packed within the FIT image.
The FPGA data (full or partial) is checked by the SDM hardware,
for Intel SDM Mailbox based devices. Hence always return full
bitstream.
Second function is to enable the HPS to FPGA bridges when FPGA load
is completed successfully. This is to ensure the FPGA is accessible
by the HPS.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-2-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: b86f43de0b ("xilinx: zynqmp: Add support for runtime dfu_alt_info setup")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-6-vincent.stehle@arm.com
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: c67fecd212 ("ARM: zynq: Enable capsule update for qspi and mmc")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-5-vincent.stehle@arm.com
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: 064c8978b4 ("arm64: versal: Enable capsule update (SD)")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-4-vincent.stehle@arm.com
Added extended support for retrieving the PMC muti boot mode
register via the firmware interface, which is preferred when
U-Boot runs in EL2 and cannot directly access PMC registers
via raw reads. Ideally, all secure registers should be accessed
via xilinx_pm_request(). Introduced the secure
zynqmp_pm_get_pmc_multi_boot_reg() call, which uses
xilinx_pm_request() to read the PMC multi boot mode register.
BootROM increments the MultiBoot register (PMC_MULTI_BOOT) read
address offset by 32 KB and retries. For SD and eMMC boot modes,
it can search up to 8191 FAT files for the identification string.
A 13-bit mask (0x1FFF) is applied to PMC_MULTI_BOOT_MASK to obtain
the correct values in BootROM.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250305134845.3182193-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Added extended support for retrieving the boot mode register
via the firmware interface, which is preferred when U-Boot
runs in EL2 and cannot directly access CRP registers via raw
reads. Ideally, all secure registers should be accessed via
xilinx_pm_request(). Introduced the secure zynqmp_pm_get_bootmode_reg()
call, which uses xilinx_pm_request() to read the boot mode register.
When CONFIG_ZYNQMP_FIRMWARE is enabled, the secure
zynqmp_pm_get_bootmode_reg() call is used; otherwise,
direct raw reads are performed in the case of mini U-Boot.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250219115301.3661036-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Turn anonymous enum TCM_LOCK/TCM_SPLIT into enum tcm_mode {}, set
TCM_LOCK as 0 and TCM_SPLIT as 1 to match LOCK and SPLIT macros in
mach-zynqmp/mp.c, and unify all the functions and their parameters
on this one single enum tcm_mode {} instead of a mix of bool and u8.
No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20250206213039.42756-1-marex@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
Raspberry firmware prepares the FDT blob in memory at an address
that depends on both the memory size and the blob size [1].
After commit ade243a211 ("rpi: passthrough of the firmware provided FDT
blob") this FDT is passed to kernel through fdt_addr environment variable,
handled in set_fdt_addr() function in board file.
When u-boot environment is persistently saved, if a change happens
in loaded FDT (e.g. for a new overlay applied), firmware produces a FDT
address different from the saved one, but u-boot still use the saved
one because set_fdt_addr() function does not overwrite the fdt_addr
variable. So, for example, if there is a script that uses fdt commands for
e.g. manipulate the bootargs, boot hangs with error
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Removing the fdt_addr variable in saved environment allows to boot.
With this patch set_fdt_addr() function always overwrite fdt_addr value.
[1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018
Signed-off-by: Mauro Salvini <m.salvini@koansoftware.com>
Cc: Cédric Schieli <cschieli@gmail.com>
Cc: Matthias Brugger <mbrugger@suse.com>
rpi5 firmware sets uart_clk clock-frequency in
the firmware and patches it to the DT, copy it
over when loading a new DT.
Signed-off-by: Bruno Leite <brule@prevas.dk>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. However, it also works as intended
because SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is the default option
within that choice statement. To guard against future regressions, make
the choice statement in common/spl/Kconfig have an explicit default if
MVEBU_SPL_BOOT_DEVICE_MMC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This device uses the SCSI subsystem to interface with SATA devices.
Trying to use the sata command results in an unhandled exception.
This has the side effect of also causing bootflow scan to raise
an unhandled exception when it attempts to probe the SATA
subsystem. Disabling the sata command fixes this issue and does
not remove support for any boot devices.
Signed-off-by: Benjamin Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <sr@denx.de>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing has shown that loading large initramfs causes data corruption
where the kernel image had been loaded to.
Debian 12 installation using a 17M initramfs boots fine, but the final
system with an initramfs of 27M obscurely fails to boot with bootz
reporting "Bad magic!".
Inspecting kernel_addr_r after this failed boot attempt does show
garbage in place of the expected zimage header.
The problem seems to occur on armada 388 only when sdhci sdma is enabled
in defconfig. Other armada boards such as turris omnia did not enable
the option.
Remove sdhci sdma from defconfig for now as a workaround.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.
Enable ODT[0] for both chip-select during write only.
See also commit d09f199097 ("board: solidrun: clearfog: enable ddr odt0
on write for both chip-select") where this was added to SolidRun
Clearfog board which is using the same System on Module but unlike
Helios-4 without ECC memory.
Signed-off-by: Josua Mayer <josua@solid-run.com>
J722S has hw rng, which can be used by OPTEE.
So remove option to use SW TRNG by OPTEE.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
With the switch to using GCC 14.2.0 in commit 001bac5f16 ("Dockerfile:
Update to gcc-14.2.0 and clang-18") in CI, we should make buildman match
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, phytec_get_product_name() function only takes care of PCM
SoM type, however in case of PCL, KSM or KSP SoM type it will return
error:
phytec_get_product_name: Invalid SOM type
Add support for other SoM types as defined in phytec_som_type_str enum
(see phytec_som_detection.h) to get rid of the error.
While at it, also simplify switch case statements by grouping them
together. This makes it more concise and readable.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Add a check for CONFIG_SKIP_RELOCATE in reserve_uboot to skip the
relocation of the U-Boot image.
CONFIG_SKIP_RELOCATE skips relocation of U-Boot to the end of RAM
allowing for systems that have extremely limited RAM to run U-Boot.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Much like what was fixed on the AM62x and AM62Px platforms[0]. The
CU_CLKOUT0 has two (25mhz and 50mhz) mux options however the clock
structure incorrectly duplicated the first 50mhz option twice. Fix this
for the AM62A platforms so the 25mhz option is selectable.
[0] https://lore.kernel.org/all/20250408161211.3165588-1-parth105105@gmail.com/
Reported-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
On the AM3359 ICE we have two modes of operation CPSW mode or PRU-ICSS
mode.
For PRU-ICSS mode, connect Pin2 and Pin3 of J18 and J19 and for CPSW mode,
connect Pin1 and Pin2 of J18 and J19.
This patch adds support for PRUSS mode boot strapping from uboot.
Co-developed-by: Basharath Hussain Khaja <basharath@couthit.com>
Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
A small fix for the cr50 which is a TPM but doesn't support all
the TPM functionality. Since it deviates from our normal TIS compliant
TPMs it can't be started twice since running the selftests twice hangs.
When FIT image with multiple dtbs are involved for R5 boot process,
R5 SPL starts off with the first instance of dtb to probe the
eeprom, then once we have identified the type of board, invocation
of setup_multi_dtb_fit will replace the gd->fdt_blob with the proper
board dtb match. However, when we do this, two things happen:
a) Prior to the invocation of setup_multi_dtb_fit, as part of the eeprom
discovery process, i2c controller device is already probed and marked
as exclusive with the match of the very first tisci match (from the
original boot dtb). This list is stored in the info->dev_list of the
first probe.
b) When the second dtb is loaded, tisci is probed again (since this is a
new node) and the new info->dev_list is empty.
At this stage, the exclusive devices such as i2c instances used to
probe the board information is left in the old info->dev_list that is
no longer used actively by the system using the replaced dtb.
As a result of this, the cleanup we intend to do with
ti_sci_cmd_release_exclusive_devices is no longer complete and
leaves the instances such as i2c for eeprom marked used as we scan just
the new info->dev_list.
This creates a problem when Device Manager(DM) firmware starts up later
on in the boot process and identifies that this instance of i2c is
already marked active, so it assumes this can no longer be controlled
by software and is marked internally as reserved and HLOS can no
longer control these instances. This defeated the purpose of
ti_sci_cmd_release_exclusive_devices.
NOTE: This scheme works just fine if the FIT has just a single dtb as
the info->dev_list is upto date.
To fix this, let us make ti_sci_cmd_release_exclusive_devices scan the
all registrations of tisci instances and cleanup all exclusive devices
that have ever been registered.
As part of this, change the prototype of release_exclusive_devices to
drop the handle since that has no further meaning now.
Though this issue was identified on AM64-sk, this can be present in
other builds which use multi-fit-dtb for R5 SPL startup.
Fixes: 9566b777ae ("firmware: ti_sci: Add a command for releasing all exclusive devices")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
iomux_match_device() returns -ENOENT instead of the end index, which means
console_stop() is never called at the moment for unused consoles.
This prevents e.g. f_acm from releasing the USB gadget interface when
removing it from stdio/stderr/stdin.
Fixes: b672c1619b ("IOMUX: Split out iomux_match_device() helper")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The tpm_auto_start() function is used in tests and assumes that it can
open the TPM even if it is already open and a locality claimed. The cr50
driver does not use the common TPM2 TIS code so lacks a check for the
is_open field of struct tpm_chip and in fact it doesn't use that struct.
Add an equivalent check to cr50_i2c_open().
This fixes all init sequences on that TPM -- e.g 'tpm init && tpm init'
or 'tpm autostart && tpm init' used to hang
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jerome Forissier <jerome.forissier@linaro.org> says:
This series replaces the dynamic initcalls (with function pointers) with
static calls, and gets rid of initcall_run_list(), init_sequence_f,
init_sequence_f_r and init_sequence_r. This makes the code simpler and the
binary slighlty smaller: -2281 bytes/-0.21 % with LTO enabled and -510
bytes/-0.05 % with LTO disabled (xilinx_zynqmp_kria_defconfig).
Execution time doesn't seem to change noticeably. There is no impact on
the SPL.
The inline assembly fixes, although they look unrelated, are triggered
on some platforms with LTO enabled. For example: kirkwood_defconfig.
CI: https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25514
Link: https://lore.kernel.org/r/20250404135038.2134570-1-jerome.forissier@linaro.org
Change board_init_f(), board_init_f_r() and board_init_r() to make
static calls instead of iterating over the init_sequence_f,
init_sequence_f_r and init_sequence_r arrays, respectively. This makes
the code a simpler (and even more so when initcall_run_list() is
later removed) and it reduces the binary size as well. Tested with
xilinx_zynqmp_kria_defconfig; bloat-o-meter results:
- With LTO
add/remove: 106/196 grow/shrink: 10/28 up/down: 31548/-33829 (-2281)
Total: Before=1070471, After=1068190, chg -0.21%
- Without LTO
add/remove: 0/54 grow/shrink: 3/0 up/down: 2322/-2832 (-510)
Total: Before=1121723, After=1121213, chg -0.05%
Execution time does not change in a noticeable way.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
The mcr and msr instructions are available in Thumb mode only if
Thumb2 is supported. Therefore, if __thumb2__ is not set, make
sure we switch to ARM mode by inserting a .arm directive in the
inline assembly.
Fixes LTO link errors with kirkwood platforms, triggered by a later
commit:
tools/buildman/buildman -o /tmp/build -eP sheevaplug
[...]
{standard input}:24085: Error: selected processor does not support `mrc p15,0,r3,c1,c0,0' in Thumb mode
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tom reports that generating the ESL file we need for authenticated
capsule updates fails to work on azure which expects a RO git tree.
Move it to $(objtree)
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UART-A can be exposed through uSD, this was tested on Transformer T20
but should work on all Ventana-based boards.
TX is exported on SDD pingroup corresponding to uSD CLK pin
RX is exported on SDB which is CMD pin in uSD slot
Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Tegra Note 7 is a mini tablet computer and the second Tegra 4
based mobile device designed by Nvidia that runs the Android operating
system. The Tegra Note has a 7" IPS display with 1280 x 800 (217 ppi)
resolution. The 1 GB of RAM and 16 GB of internal memory can be
supplemented with a microSDXC card giving up to 64 GB of additional
storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The ASUS Transformer Pad TF701T is an Android tablet computer made by
ASUS, successor to the ASUS Transformer Pad Infinity. The tablet includes
a Tegra 4 T114 processor clocked at 1.9 GHz, and an upgraded 2560×1600
pixel resolution screen, increasing the pixel density to 300 PPI and
a mobile dock. Transformers (t114) board derives from Nvidia Macallan
development board.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The clock initialization routine sets the DISP* clock parent to PLLC,
resulting in DC failure in the case when PLLD was previously configured.
This issue disrupts chainloading and to prevent failures caused by DISP*
clock parent conflicts, clock initialization should not modify DISP*. The
DC driver handles DISP* configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Most device headers contain SoC specific part and common Tegra post part.
Add a generic header which can be used by any Tegra device of one of the
supported SoC generations (T20, T30, T114, T124 or T210) without need in
device specific configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link CFG_SYS_NS16550_COM1 value to chosen CONFIG_TEGRA_ENABLE_UART Tegra
wide. Remove all CFG_SYS_NS16550_COM1 from device headers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Applies same logic to general Tegra pincontrol driver as is done to Tegra20
by commit:
a35bf832d7 ("pinctrl: tegra20: detect unknown/invalid pin/func
configurations")
Suggested-by: Artur Kowalski <arturkow2000@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra20 driver doesn't know about some pin configurations and even about
some pins. In case when pin configuration is unknown the pin would be
muxed to whatever is under function 0, in case when pin itself is
unknown, it could cause out-of-bounds array access in pinmux_set_func
and pinmux_set_pullupdown.
Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Motorola Atrix 4G (MB860) and Droid X2 (MB870) both featured a
dual-core NVIDIA Tegra 2 AP20H processor clocked at 1GHz, coupled with 1GB
of DDR2 RAM. Storage consisted of 16GB of internal flash memory, expandable
via microSD. The display was a 4.0-inch TFT LCD with a resolution of
960x540 pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The LM3532 is a 500-kHz fixed frequency asynchronous boost converter which
provides the power for 3 high-voltage, low-side current sinks. The device
is programmable over an I2C-compatible interface and has independent
current control for all three channels.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add support for the LCD panel module used in Motorola Atrix 4G or Droid X2.
Exact panel vendor and model are unknown. The panel has a 540x960 (qHD)
resolution and uses 24 bit RGB per pixel.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
CPCAP has a dedicated interrupt for power button. Implement this to have
more input control over the devices.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The CPCAP is a Motorola/ST-Ericsson creation, a multifunctional IC whose
main purpose was power control. It was used in a wide variety of Motorola
products, both Tegra and OMAP based. The most notable devices using this
PMIC are the Motorola Droid 4, Atrix 4G, and Droid X2.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Place Tegra124 SOR and eDP implenetation into common Tegra driver folder
until it is integrated into existing setup.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since this set of drivers suports four Tegra SoC generations, lets name it
just 'tegra'.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
GPIO reset and power-off functionality depends on device tree data, which
is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
config option and add Kconfig option or each phase.
Adjust SYSRESET_GPIO and POWEROFF_GPIO uses to address possible
regressions.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Historically, PLLD2 mirrored PLLD's layout on Tegra30 and 114. However,
with the introduction of Tegra124, this changed. This layout alteration was
not considered, and it now requires a corrective action to prevent future
complications.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
PLLD and PLLD2 clocks possess a unique enable bit within their
miscellaneous register. Take this into account when using clock_set_rate
function.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add missing configuration of chip select polarity. Default polarity is LOW,
which satisfies most cases but some devices require HIGH polarity and will
not work.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Binman includes a good set of tests covering all of its functionality.
This includes a code-coverage test.
However to date the code-coverage test has not been checked
automatically by CI, relying on people to run 'binman test -T'
themselves.
Plug the gap to avoid bugs creeping in future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Newer lz4 util is not happy with any padding at end of file,
it would abort with error message like:
Stream followed by undecodable data at position 43.
Workaround by skipping testCompUtilPadding test case and manually
strip padding in testCompressSectionSize test case.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
The CheckAddHashValue() function is always called before this one, so
the algorithm check is never used. Replace it with an assert to avoid a
coverage error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Newer versions of the python3-coverage tool require a directory
separator before and after the directory name. Add this so that system
package are not included in the coverage report.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini <trini@konsulko.com> says:
This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.
Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
Expand the conditional compilation section to explain when to use
CONFIG_IS_ENABLED rather than IS_ENABLED and provide an example. Next,
note what the PHASE_ macro is supposed to be used for as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to make a start on explaining how and when to use certain
macros, we need to document their usage somewhere. As a first step, take
section 21 of the v6.13 Linux Kernel coding-style document on
conditional compilation, verbatim, and add it to our documentation.
Further rewording to be clearer about U-Boot will be done next.
Signed-off-by: Tom Rini <trini@konsulko.com>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.
Signed-off-by: Tom Rini <trini@konsulko.com>
When the `optee hello' subcommand is called, the do_optee_hello_world_ta()
function passes a NULL pointer to the strcmp() function while verifying its
input argument, which results in the following crash:
=> optee hello
"Synchronous Abort" handler, esr 0x96000010, far 0x0
Fix this by verifying the number of input arguments instead.
Fixes: e3cf80fbe0 ("cmd: Add support for optee commands")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jerome Forissier <jerome.forissier@linaro.org>
Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
The number of memory banks in QEMU is not bounded by 1.
In this example we have two banks:
qemu-system-aarch64 \
-machine virt \
-nographic \
-cpu cortex-a72 \
-m 8G \
-smp 8,sockets=2,cores=4,threads=1 \
-object memory-backend-ram,id=mem0,size=4G \
-numa node,cpus=0-3,memdev=mem0 \
-object memory-backend-ram,id=mem1,size=4G \
-numa node,cpus=4-7,memdev=mem1 \
-bios u-boot.bin
Use the default value defined in /Kconfig as 4.
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Suggested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The AM62x uses the DA8XX (DaVinci) GPIO controller. Enable
CONFIG_DA8XX_GPIO to support GPIO access from the Cortex-A53.
Also enable the 'gpio' command to allow users to interact
with GPIOs from the U-Boot shell.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This enables the 'rproc' command, allowing users to
start, stop, and manage co-processors as well as load firmware
images.
Useful for systems with auxiliary cores, such as the M4 core
in the AM62x soc.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This enables the 'rproc' command, allowing users to
start, stop, and manage co-processors as well as load firmware
images.
Useful for systems with auxiliary cores, such as M4 or R5 cores
in the AM64x soc.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The CI image does not ship with all tools required for the binman tests.
Have binman build the missing tools.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Qualcomm changes for v2025.07:
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/25653
There's been a surprising amount of activity lately on the Qualcomm
side with the two oldest boards getting some fresh attention and a lot
of cleanup and polish going on across the board.
* SDM660 gets USB phy fixes and a pinctrl driver
* The recently added SA8775P/QCS9100 SoC gets a pinctrl driver
* The Qualcomm pinctrl driver now handles reserved pins correctly,
fixing crashes on some boards when running "gpio status -a"
* OF_UPSTREAM_BUILD_VENDOR is enabled in qcom_defconfig
* SDM845 and SC7280 get missing clocks added (since we're now stricter
about those). This gets USB working more reliably in more cases.
* DM_USB_GADGET is enabled for all boards using DWC3 and fasbtoot is
enabled too
* A bug in the livetree fixup code is fixed (making USB work on a lot
more platforms)
* Button label lookup is made case insensitive* bootretry becomes more dynamic, allowing it to be hijacked to make a
"persistent" boot menu that allows dropping to U-Boot shell later on
* A new qcom-phone.config fragment is added along with a phone-specific
default environment and phone-specific debugging/bringup docs. These
make U-Boot more usable on devices without a serial port or keyboard.
* The db820c gets fixed up and updated documentation
* The db410c also gets some love and modernisation as well as a new
reviewer.
* A new driver is added for the USB VBUS regulator found on various
Qualcomm PMICs
* The Qualcomm SPMI driver gets some fixes and cleanup for SPMI v5 and
v7 support.
Pull request efi-2025-07-rc1
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25648
Documentation:
* Update authenticated capsules documentation
UEFI:
* Add support for loading FIT images including initrd
- efi_loader: efi_load_initrd: provide a memory mapped initrd
- efi_loader: binary_run: register an initrd
- bootm: add support for initrd in do_bootm_efi
* efi_selftest: remove un-needed NULL checks
* efi: Fix efiboot for payloads loaded from memory
* Print extra information from the bootmgr
* Move public cert for capsules to .rodata
* Set EFI capsule dfu_alt_info env explicitly
* Make FDT extra space configurable
* Install the ACPI table from the bloblist
* Handle GD_FLG_SKIP_RELOC
* Handle malloc() errors
Others:
* acpi: select CONFIG_BLOBLIST
* smbios: select CONFIG_BLOBLIST
* xilinx: dfu: Fill directly update_info.dfu_string
* cmd: fwu: Dump custom fields from mdata structure
* board: remove capsule update support in set_dfu_alt_info()
local-bd-address in the device tree needs to be formatted with the least
significant byte first (i.e. little endian). We're not doing this when
adding it to the DT, which means the MAC address ends up being reversed in
Linux. Fix this by reversing the array before setting it in the DT.
We're also flipping the wrong bit when generating the BD address. Before
reversing the array, the least significant bit is in the last byte.
Fixes: ff06dc2403 ("db410: alter WLAN/BT MAC address fixup")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-3-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The workaround for the "PSCI bug" on DragonBoard 410c implemented in
arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register
by storing the CurrentEL in there. When running in EL1, the mode switch
sequence implemented there later clears the register again, but this is
skipped when U-Boot is booted in EL2.
This causes crashes in the mach-snapdragon board_fdt_blob_setup() later,
because the invalid address stored in x0 gets dereferenced to check if it
points to a valid DTB.
We can't rely on having a valid values in the CPU registers for the first
stage bootloader configuration on DB410c, and nothing would place a DTB
there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0
hook case to avoid crashing with the clobbered register value.
Fixes: 059d526af3 ("mach-snapdragon: generalise board support")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-1-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
To enable more complex sequencing of the bootmenu, autoboot, and
bootretry, handle changes to the bootretry variable between tries. This
makes it possible to turn bootretry off (e.g. to drop to a shell) and
then back on again.
This makes it possible to have a persistent bootmenu (the only way to
navigate U-Boot on devices like smartphones which lack a physical
keyboard) by having bootcmd be defined to launch the bootmenu. This
allows for menu options like enabling USB mass storage gadget to return
back to the boot menu once the gadget is shut down.
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-3-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a common RAUC boot logic environment and make use of it in the
i.MX93 environment. The RAUC boot logic is deactivated by default and
can be activated by setting "doraucboot" to "1".
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Move the default bootcmd from the defconfig to the board environment in
preparation for RAUC support. No change in functionality.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Add support for disabling external environment import (bootenv.txt) by
setting the ${no_bootenv} environment variable.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Add prepare_mcore script to environment to be able to notify Linux about
the state of M33 core via the kernel cmdline by appending to ${optargs}.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Move the load addresses for FDTs and bootenv.txt to create space for
loading OS image. Otherwise, parts of the image might get corrupted.
and the following boot error will be present:
ERROR: FDT image overlaps OS image (OS=80400000..832a0000)
Moreover, this commit also syncs addresses with downstream PHYTEC
u-boot for i.MX93 in preparation for FIT image support in the future.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Because we've already returned early in the event 'handle' is NULL we
don't need these extra not NULL checks. Remove them
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit 53d5a22163 ("emulation: Use bloblist to hold tables")
`make qemu-riscv64_smode_defconfig acpi.config && make` fails with
drivers/misc/qfw_smbios.c:93:(.text.qfw_evt_write_smbios_tables+0xe):
undefined reference to `bloblist_add'
Build with bloblist support.
Fixes: 53d5a22163 ("emulation: Use bloblist to hold tables")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit 53d5a22163 ("emulation: Use bloblist to hold tables")
`make qemu-riscv64_smode_defconfig acpi.config && make` fails with
qfw_acpi.c:146:(.text.evt_write_acpi_tables+0xc):
undefined reference to `bloblist_add'
Build with bloblist support.
Fixes: 53d5a22163 ("emulation: Use bloblist to hold tables")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
i.MX95 System Manager uses interrupt driven communication which requires
the caller to set Bit[0] of channel flags to 1. When transmission
completes and the previous general purpose interrupt has been processed
by the other core, i.MX95 System Manager will set General Purpose
Interrupt Control Register (GCR). U-Boot polls General-purpose Status
(GSR) to check if the operation is finished.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
If CONFIG_VIDEO_IPUV3 is enabled without also having CONFIG_IMX_HDMI
enabled, the build fails for the Apalis iMX6 board.
Fixes: 592f4aed6d ("arm: imx: initial support for apalis imx6")
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that we moved out the capsule signature from the DTB, remove the
relevant documentation.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
commit ddf67daac3 ("efi_capsule: Move signature from DTB to .rodata")
was reverted in
commit 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to .rodata"")
because that's what U-Boot was usually doing -- using the DT to store
configuration and data. Some of the discussions can be found here [0].
(Ab)using the device tree to store random data isn't ideal though.
On top of that with new features introduced over the years, keeping
the certificates in the DT has proven to be problematic.
One of the reasons is that platforms might send U-Boot a DTB
from the previous stage loader using a transfer list which won't contain
the signatures since other loaders are not aware of internal
U-Boot ABIs. On top of that QEMU creates the DTB on the fly, so adding
the capsule certificate there does not work and requires users to dump
it and re-create it injecting the public keys.
Now that we have proper memory permissions for arm64, move the certificate
to .rodata and read it from there.
[0] https://lore.kernel.org/u-boot/CAPnjgZ2uM=n8Qo-a=DUkx5VW5Bzp5Xy8=Wgmrw8ESqUBK00YJQ@mail.gmail.com/
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com> # on TI sk-am62p-lp
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-A311D-CC
Tested-by: Raymond Mao <raymond.mao@linaro.org>
Instead of just printing the label, add information for the Device
path as well so it's easier to see if we are booting from disk, network
etc
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If the EFI runtime services pointers are relocated even though
relocation is skipped, it corrupts some other data resulting in some
unexpected behaviour.
In this specific case, it overwrote some page table entries resulting in
the device memory address range's mappings getting removed. Eventually,
after the completion of efi_runtime_relocate(), when a driver tries to
access its device's registers it crashes since the mappings are absent.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Calling bootefi on an address that was loaded from memory (e.g., cramfs
or SPI flash via "sf read", etc.), currently results in the EFI binary
not being able to access the EFI image device path.
For example, iPXE would fail with an error "EFI could not get loaded
image's device path: Error 0x7f39e082 (https://ipxe.org/7f39e082)".
This is due to an incomplete special-case in efi_binary_run, where a new
device path was created but not used in all required places.
Fix the in-memory special case, set the "bootefi_device_path" to the
generated "file_path".
iPXE will now boot, and report the device path as
"/MemoryMapped(0x0,0xSTART,0xLEN)"
Signed-off-by: Christian Kohlschütter <christian@kohlschutter.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The commit cb9ae40a16 ("tools: mkfwumdata: add logic to append vendor
data to the FWU metadata") added support for adding vendor data to mdata
structure but it is not visible anywhere that's why extend fwu command to
dump it.
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Pass a pointer to a memory mapped initrd and its size to
efi_binary_run. The EFI stack will register an EFI_LOAD_FILE2_PROTOCOL
for the next boot stage to access this initrd.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot can pass an initrd to subsequent boot stages via the
EFI_LOAD_FILE2_PROTOCOL. The current implementation only supports
this functionality via the efi boot manager: the initrd is taken
from the load options of the BootCurrent variable. This commit adds
support for registering a memory mapped initrd, e.g. loaded from a
FIT image. For now this new method takes precedence over loading the
initrd from the BootCurrent variable (if both are present) because
the BootCurrent variable is not cleared on exiting the boot manager.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot currently reserves only 0x3000 bytes when copying the FDT
in copy_fdt(), which may not be sufficient if additional nodes
(such as FMAN firmware) are added later.
This patch uses the exisitng SYS_FDT_PAD to reserve space for FDT fixup
instead of hardcoded value.
This change prevents potential corruption when resizing FDT after
EFI boot, especially when firmware like FMAN requires additional
space.
Signed-off-by: Gabriel Nesteruk <gnesteruk@sii.pl>
Signed-off-by: Pawel Kochanowski <pkochanowski@sii.pl>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When BLOBLIST_TABLES is used, the ACPI tables are not currently added to
the list of EFI tables. While we don't want to create a new memory
region, we do want to tell EFI about the tables.
Fix this by covering this case. At some point the non-bloblist code can
likely be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 3da59ee9579 ("efi_loader: Avoid mapping the ACPI tables twice")
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so remove the function entirely.
Fixes: a9e6f01a94 ("efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for board/libre-computer/*
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # for
The current implementation of EFI capsule update uses set_dfu_alt_info() to
set the dfu_alt_info environment variable with the settings it requires.
However, set_dfu_alt_info() is doing this for all DFU operations, even
those unrelated to capsule update.
Thus other uses of DFU, such as DFU boot which sets its own value for the
dfu_alt_info environment variable, will have that setting overwritten with
the capsule update setting. Similarly, any user defined value for the
dfu_alt_info environment variable would get overwritten when any DFU
operation was performed, including simply performing a "dfu 0 list"
command.
The solution is stop using the set_dfu_alt_info() mechanism to set the
dfu_alt_info environment variable and instead explicitly set it to the
capsule update's setting just before performing the capsule update's DFU
operation, and then restore the environment variable back to its original
value.
This patch implements the explicit setting and restoring of the
dfu_alt_info environment variable as part of the EFI capsule update
operation.
The fix is fully implemented in a subsequent patch that removes the capsule
update dfu_alt_info support in set_dfu_alt_info().
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Directly fill update_info.dfu_string to prepare platforms to switch
from using dfu_alt_info variable to dfu_string which contains description
for capsule update when switch is done.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Current mmc bootpart-resize command only support Samsung eMMC BOOT/RPMB
hardware partition resizing. Add Sandisk and Micron eMMC BOOT/RPMB hardware
partition resizing support. The commands and parameters for resizing
partitions are different for each manufacturer. Select the corresponding
function according to CID.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Each MMC device has a child which ihs a block device. At present we call
mmc_deinit() when the block device is removed.
But the MMC struct (i.e. struct mmc) is attached to the MMC's device,
not its child.
So at present, when an MMC device is removed, mmc_deinit() is called
twice, once for the MMC device and once for its block device. This
results in a double call to cyclic_unregister().
Fix this by adding a 'remove' method to the uclass and calling
mmc_deinit() from there.
Also drop the call to device_probe() within the block-device's probe()
method. The device is already in the process of being probed, so this
call does nothing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c822c1a50b ("mmc: call device_probe() after scanning")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When MMC_SDHCI_SDMA=y or MMC_SDHCI_ADMA=y and PIO mode is used
dma_unmap_single() is called on an unmapped address, 0x0. This may
result in a Synchronous Abort:
## Checking hash(es) for Image atf-1 ... sha256+ OK
CMD_SEND:16
ARG 0x00000200
MMC_RSP_R1,5,6,7 0x00000900
CMD_SEND:18
ARG 0x00004005
"Synchronous Abort" handler, esr 0x96000147
elr: 00000000400015bc lr : 0000000040012b4c
x 0: 0000000000008000 x 1: 0000000000092600
x 2: 0000000000000040 x 3: 000000000000003f
x 4: 0000000000000030 x 5: 0000000000000001
x 6: 0000000000000001 x 7: 0000000000000000
x 8: 000000000000000a x 9: 0000000000000090
x10: 0000000043dffc68 x11: 0000000043c00440
x12: 0000000043c00440 x13: ffffffffbfe00000
x14: 000000000000031c x15: 0000000240000000
x16: 000000004001145c x17: 0000000000000032
x18: 0000000043dffef0 x19: 0000000043c00000
x20: 0000000043dffbc8 x21: 0000000000000000
x22: 00000000000f3d95 x23: 0000000000000002
x24: 0000000000000493 x25: 0000000000092600
x26: 0000000000000001 x27: 0000000000000001
x28: 0000000000000008 x29: 0000000043dffab0
Code: d2800082 9ac32042 d1000443 8a230000 (d5087620)
Resetting CPU ...
resetting ...
Fix this by only dma_unmap_single() when DMA mode is used and
sdhci_prepare_dma() has been called to map host->start_addr.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Per JESD84-B51 6.6.9 Erase:
The host can erase a contiguous range of Erase Groups. Starting the erase
process is a three steps sequence. First the host defines the start address
of the range using the ERASE_GROUP_START (CMD35) command, next it defines
the last address of the range using the ERASE_GROUP_END (CMD36) command and
finally it starts the erase process by issuing the ERASE (CMD38) command
with argument bits set to zero. See Table 11 for the arguments supported by
CMD38. The address field in the erase commands is an Erase Group address,
in byte units for densities up to 2GB, and in sector units for densities
greater than 2GB. The Device will ignore all LSB's below the Erase Group
size, effectively rounding the address down to the Erase Group boundary.
So choose 2GB bytes as check condition.
If the erase size is larger that 2GB, use 2GB to avoid breaking non high
capacity cards. If erase size is less than 2GB and larger than a grp, use
'grpcnt * mmc->erase_grp_size' to cover all the sectors, else use
the number of sectors.
With test erasing 20GB eMMC
board: Evk_8ulp Evk_8mm Evk_8mn Evk_8mp Mek_8qxpc0 Mek_8qm
kingston sandisk
before: 37.683s 112.738s 129.365s 28.238s 112.605s 500.470s 490.708s
after: 0.093s 0.111s 0.951s 0.080s 0.121s 6.960s 6.915s
Tested-by: Faqiang Zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In case mmc_complete_init() returns error, exit from mmc_init()
without possibly calling cyclic_register(), which at that point
would be undesired.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Simplify 90cc07fd78 ("mmc: Poll CD in case cyclic framework is enabled")
according to suggestions by Rasmus. The struct cyclic_info is zero-size in
case CONFIG_CYCLIC is not enabled and does not add any size to struct mmc,
so it can unconditionally be part of that structure. This allows clean up
of all the other conditionals in mmc.c which can now be unconditionally
present, as they also add no extra space.
Suggested-by: Rasmus Villemoes <ravi@prevas.dk>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The option MMC_SDHCI_ADMA_FORCE_32BIT is only tested or used when
MMC_SDHCI_ADMA or SPL_MMC_SDHCI_ADMA is enabled. And for
MMC_SDHCI_ADMA_64BIT the same is true except we also require
MMC_SDHCI_ADMA_FORCE_32BIT to be disabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
UFS devices uses the block and scsi frameworks. Enable UFS erase
support by adding erase support to SCSI.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Allow invoking fit_check_sig without the key parameter, allowing to
validate only checksums and hashes for unsigned images.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Skip signature verification in case no public key was given in order to
allow using fit_check_sign also to validate uImage.FIT images without
signatures. Guarded by USE_HOSTCC macro the behavior on target is
unchanged.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
As current design, only Manager CPU called armv8_setup_psci() before
jump to next stage(such as Linux Kernel), Subordinate CPUs also need
setup psci vector to handle trap request which comes from higher EL
level.
Signed-off-by: Xu Zhang <423756212@qq.com>
[trini: Guard with !CONFIG_XPL_BUILD check]
Add support for the LCD interfaces (LCDIF1/2). When probed, these
interfaces request numerous clocks and power domains, attach the bridge
and look for a panel in order to retrieve its capabilities and
properties.
There is a similar existing driver in the upper folder for other i.MX
targets, I discovered this driver a bit late. It is not targeting the
i.MX8MP and I have no idea how different can the LCDIF be on this SoC,
but I did not manage to get it work, especially because it is not fully
compliant with the device-model, especially on the clocks/power
management side which is all ad-hoc. This is normal though, it was
contributed more than ten years ago.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add support for the LVDS Display Bridge (LDB) found on i.MX8MP.
When attached, the bridge driver looks for panels connected to one of
its two outputs and adapts its own configuration to use them. There is
currently no support for merged/split displays.
Note regarding the clock configuration:
The LDB output clock should be absolutely identical to the LCDIF output
clock so both blocks can talk to each other synchronously. However, the
LDB clock has an internal divisor of 7 (respectively 3.5 in dual
configuration) which means the LDB input clock must be explicitly set
once we know the configuration.
This driver was tested on i.MX8MP using a single panel connected to the
LVDS2 interface.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The IPUv3 is one IP part of the imx world, there are others, and
selecting the whole imx/ folder based on such a specific Kconfig symbol
is sub-optimal. Let's always enter the imx/ folder, and then selectively
compile parts of the folder based on the configuration.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add support for the i.MX8 MEDIAMIX domain which is driving the power
over the whole display/rendering pipeline.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
These are all the clocks needed to get an LCD panel working, going
through one of the LCDIF and the LDB. The media AXI and APB clocks are
also described.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reparenting a clock C with a new parent P means that C will only
continue clocking if P is already clocking when the mux is updated. In
case the parent is currently disabled, failures (stalls) are likely to
happen.
This is exactly what happens on i.MX8 when enabling the video
pipeline. We tell LCDIF clocks to use the VIDEO PLL as input, while the
VIDEO PLL is currently off. This all happens as part of the
assigned-clocks handling procedure, where the reparenting happens before
the enable() calls. Enabling the parents as part of the reparenting
procedure seems sane and also matches the logic applied in other parts
of the CCM.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It is very surprising that such an uclass, specifically designed to
handle resources that may be shared by different devices, is not keeping
the count of the number of times a power domain has been
enabled/disabled to avoid shutting it down unexpectedly or disabling it
several times.
Doing this causes troubles on eg. i.MX8MP because disabling power
domains can be done in recursive loops were the same power domain
disabled up to 4 times in a row. PGCs seem to have tight FSM internal
timings to respect and it is easy to produce a race condition that puts
the power domains in an unstable state, leading to ADB400 errors and
later crashes in Linux.
CI tests using power domains are slightly updated to make sure the count
of on/off calls is even and the results match what we *now* expect.
As we do not want to break existing users while stile getting
interesting error codes, the implementation is split between:
- a low-level helper reporting error codes if the requested transition
could not be operated,
- a higher-level helper ignoring the "non error" codes, like EALREADY and
EBUSY.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This is a new DM core helper. There is now a graph endpoint
representation in the sandbox test DTS, so we can just use it to verify
the helper proper behavior.
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
There are already several helpers to find a udevice based on its
position in a device tree, like getting a child or a node pointed by a
phandle, but there was no support for graph endpoints, which are very
common in display pipelines.
Add a new helper, named uclass_get_device_by_endpoint() which enters the
child graph reprensentation, looks for a specific port, then follows the
remote endpoint, and finally retrieves the first parent of the given
uclass_id.
This is a very handy and straightforward way to get a bridge or a panel
handle.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
`.priv_data_size` does not exist. I believe the actual structure member
was supposed to be `.priv_auto`.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Naming between the parameter list, the prototype and the main comment do
not match. Fix the comment which seems the be the one that is incorrect.
Fixes: 9057077cf4 ("core: ofnode: add of_graph parsing helpers")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
In console_setfile(), there is some #ifdef'ed code, updating monitor
functions for a U-Boot proper build. This is called inside a switch/case
statement, but the closing "break;" is inside the #ifdef section.
This doesn't look right: we should not fall through to the error case
for an SPL/TPL build.
Move the "break" to be always effective, solving a compiler warning about
an untagged implicit fallthrough.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This data was generated using the ksswtool-autogen project with the
followig commit:
eed7492 ("soc: am62ax: Add cpsw_3guss_main_0 id to the dev list")
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Don't initialize Ethernet2 in SPL. We cannot boot from that source anyways
and it throws an error during boot.
This will remove following error message during network boot:
Error: ethernet@8000000port@2 No valid MAC address found.ethernet@8000000port@1
Waiting for PHY auto negotiation to complete....... done
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add support for ethernet boot in the A53 SPL. Increase the SPL Size
limit and update SPL_STACK_R_ADDR.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add bootph-all tag to phy_gmii_sel node. This is needed for booting via
Ethernet. While at it, drop main_pktdma reg redefinitions which are already
provided by the top-level SoC device tree file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Caleb Connolly <caleb.connolly@linaro.org> says:
SCSI devices like UFS may maintain their own cache to speed up writes,
however this is lost on board reset (and may be lost on device removal
or reset by OS drivers).
Currently this can be worked around by "waiting for a while" after
writing data to disk, but of course this is not an acceptable solution.
Ideally U-Boot would have a mechanism to flush caches during board
reset, but until that logic is hooked up let's be sure that all writes
are actually propagated to the storage device so that we don't lose data
on board reset.
The same logic was already implemented just for the AHCI backend, this
duplicated logic has been removed and support for the SYNC_CACHE command
is added to AHCI.
This is particularly noticeable during capsule updates, since the update
file is deleted and the board is reset immediately afterwards which
resulted in the same capsule update being applied over and over again.
This specifically fixes Qualcomm SDM845 devices with UFS 2.1, but likely
all UFS devices that use a cache.
Link: https://lore.kernel.org/r/20250326-scsi-sync-on-write-v2-0-12ab05bd464b@linaro.org
The SCSI layer now issues a SYNC_CACHE command after every write to
ensure there is no data loss due to a board reset after write.
Implement support for this command and remove the same logic from the
ATA write path to be consistent with other SCSI backends.
Ranges are not supported and the whole cache will be flushed in all
cases.
This was done per iteration in ata_scsiop_read_write(), but it's not
clear why this was the case, calling it once for the entire write ought
to achieve the same result.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
We don't have a mechanism to safely shutdown block devices prior to a
baord reset or driver removal. Prevent data loss by synchronizing the
SCSI cache after every write.
In particular this solves the issue of capsule updates looping on some
devices because the board resets immediately after deleting the capsule
file and this write wouldn't be flushed in time.
This may impact NAND wear, but should be negligible given the usecases
for disk write in U-Boot.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
This clears the 6th byte of cmd twice rather than setting the 9th byte
to 0. Fix it.
The only other command that sets the 9th byte is the 64-bit read, so
this likely never caused issues in practise.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Since introduction of OF_UPSTREAM flag, U-Boot's dtc must be able
to compile Kernel's device tree.
Since kernel commit 7de129f5389b ("ARM: dts: stm32: stm32mp151a-prtt1l:
Fix QSPI configuration"), label relative path references has been
introduced. These label relative path references is not supported
by current U-Boot dtc version 1.5.0: (see mailing list discussion [1]).
In order to support such label relative patch references
adds following commit from upstream DTC tree:
commit 651410e54cb9 ("util: introduce xstrndup helper")
commit ec7986e682cf ("dtc: introduce label relative path references")
[1] https://lore.kernel.org/all/20250115144428.GZ3476@bill-the-cat/T/
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The symbol "ENV_IS_EMBEDDED" is an environment internal define and not a
real CONFIG symbol. The IS_ENABLED() macro is still valid to use here,
so update the check.
Signed-off-by: Tom Rini <trini@konsulko.com>
The cflags and ldflags of preload_check_sign depend on the openssl
package thus pkg-config is needed to get the location where openssl
is installed.
This fix a potential build failure when openssl is not from the
distro and installed in a varied place.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
When using non-trivial values for parameters for this test it
will cause a spurious failure as the test passes a decimal value
to the mtest command which will interpret it as hexadecimal and
result in failure as below.
test/py/tests/test_memtest.py:66: in test_memtest_ddr
assert expected_response in response
E AssertionError: assert 'Tested 16 iteration(s) with 0 errors.' in 'Refusing to do empty test\r\nmtest - simple RAM read/write test\r\n\r\nUsage:\r\nmtest [start [end [pattern [iterations]]]]'
----------------------------- Captured stdout call -----------------------------
U-Boot> mtest 134217728 0x8001000 90 0x10
Refusing to do empty test
mtest - simple RAM read/write test
Usage:
mtest [start [end [pattern [iterations]]]]
The fix is to ensure that all the parameters to the mtest command are
passed as hexadecimal values.
Fixes: 22efc1cf27 ("test/py: memtest: Add tests for mtest command")
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Love Kumar <love.kumar@amd.com>
If a series is sent without a cover letter, there is no indication of
the base commit. Add support for this, since single patches of small
series may not always have a cover letter.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to know which commit patches are based on, even if that
commit might not be available to readers. Add a tag for this in the
cover letter.
Also add the local-branch name since that may be useful to the writer.
Signed-off-by: Simon Glass <sjg@chromium.org>
We had previously gotten this package through a chain of dependencies
with guestfs-tools. Now that we no longer install that package, install
fdisk (for sfdisk) directly.
Fixes: eb1b90ec57 ("Dockerfile: Update to drop virt-make-fs packages")
Signed-off-by: Tom Rini <trini@konsulko.com>
There are some reference platforms from Arm which are not found in QEMU
but instead in the FVP tool. As we can make use of this in CI later on,
download and extract it in our Dockerfile today.
Signed-off-by: Tom Rini <trini@konsulko.com>
Outside of changing versions here the other visible change is that we
tell grub that riscv64 does not have "large model" support. Without this
change the resulting mkimage is non-functional. This is known upstream
already.
Link: https://savannah.gnu.org/bugs/?65909
Signed-off-by: Tom Rini <trini@konsulko.com>
u-boot-dfu-20250410
CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/25615
Usb gadget:
- Add SAM9X60 support to atmel driver
- Fix memory leaks in f_mass_storage gadget driver
- Fix comment typo in dwc3 gadget driver
Fastboot:
- Lift restrictions on !NET_LWIP for USB
Android:
- Fix possible NULL ptr when AVB is out of memory
Recent addition of support for SDM660 inadvertently broke USB PHY power
on sequence on RB1/RB2 and others with following error:
starting USB...
Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
Can't power on PHY0
probe failed, error -16
No USB controllers found
The root cause was the addition of flag se_clk_scheme_default which was
configured correctly for SDM660 but incorrect for all other supported
SoC. Fix that by properly assignment as per upstream Linux driver.
Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by:
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250410080027.208674-3-sumit.garg@kernel.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Currently the msm_sdhci doesn't yet support DLL configurations which are
required to enable bus speeds greater that 100MHz. So disable HS200 mode
support as of now as it requires bus speeds of 200MHz.
This should fix eMMC issues reported on RB1/RB2 although it should fix
issues for all Qcom platforms but it's not seen there as mostly SD cards
available don't support HS200 mode. The SD cards usually works in high
speed mode whose performance remains unaffected by this change. It only
affects RB1/RB2 as eMMC flash on these support HS200 mode but the U-Boot
driver currently is incapable of supporting that.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250410080027.208674-2-sumit.garg@kernel.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
On v5 & v7 controllers, multiple mapping for different
Execution Environment exists, if the mapping owner is for
a different Execution Environment we can only read and
not write any data.
To allow us to find a Write mapping for our Execution
Environment, we can overwritte a mapping if we encounter
a new one which we own.
Implement this logic, the result is the same mapping
table as in Linux.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: caleb.connolly@linaro.org # sdm845
Link: https://lore.kernel.org/r/20250328-topic-sm8x50-spmi-fix-v1-4-a7548d3aef0d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Enable fastboot support over USB, using MMC as the backend. This will be
the internal eMMC on devices that have it, or the sdcard slot on devices
with UFS (if available).
We don't use a fixed address for the fastboot buffer because it's
allocated at runtime per-board. Entering fastboot mode should be done by
executing "run fastboot" or manually running:
fastboot -l $fastboot_addr_r usb 0
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250324-sdm845-fixes-fastboot-v1-4-d177a10f336d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
In fsg_common_init, we allocate some buffers via memalign().
However, these buffers are never freed.
Because of that, we cannot call => ums command multiple times on boards
with low memory (CONFIG_SYS_MALLOC_LEN=0x81000):
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0x3a3e000
|crq->brequest:0x0
CTRL+C - Operation aborted
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0x3a3e000
failed to start <NULL>: -12
g_dnl_register: failed!, error: -12
g_dnl_register failed
Make sure the fsg buffers are freed when the gadget is unbound by
calling fsg_common_release() in fsg_unbind().
Reported-by: Zixun LI <admin@hifiphile.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Zixun LI <admin@hifiphile.com> # on SAM9X60
Link: https://lore.kernel.org/r/20250328-ums-gadget-leak-v1-4-3b677db99bde@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Fastboot works either over TCP, UDP or USB. The latter doesn't have
anything to do with networking, thus should work just fine with
regardless which network stack is selected. In practice, header symbols
are used inside common code paths. Add some ifdeffery to guard against
that.
This will make fastboot over USB work with the new LWIP stack.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250312073655.2281377-1-mwalle@kernel.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Currently, this platform is failing in CI due to seemingly platform
specific reasons. For now, remove it from CI until the maintainers have
a chance to look in to it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara <andre.przywara@arm.com> says:
C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.
So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.
This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.
Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.
Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.
Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
The argument parsing in the SPL configuration command uses an implicit
switch/case fallthrough when dealing with a different number of
arguments.
Add our "fallthrough;" statement-like macro before the respective labels
in the bootm code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The argument parsing code in the pmic command uses an implicit switch/case
fallthrough to handle the common part of having one or two arguments.
Add our "fallthrough;" statement-like macro before the second branch in
the parsing code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The raw NAND flash code uses an implicit switch/case fallthrough to
share code when dealing with different ECC modes, and also when handling
some read command.
Add our "fallthrough;" statement-like macro before the respective labels
in the NAND code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
This copies the fallthrough annotations that the original kernel code
gained, before this function got refactored there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Michael Trimrachi <michael@amarulasolutions.com>
The SPI NOR code uses an implicit switch/case fallthrough when checking
different vendors to determine how to deal with extended addressig modes.
Add our "fallthrough;" statement-like macro before some label in the
4-byte addressing mode code, to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The MMC boot mode selection for the TI AM62P series of SoCs uses an
implicit switch/case fallthrough for falling back to some default
boot mode.
Add our "fallthrough;" statement-like macro before the default branch in
the code, to avoid a warning when GCC's -Wimplicit-fallthrough warning
option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The UBI code uses an implicit switch/case fallthrough when handling two
related cases of bad header errors. Also there is a switch/case for unit
prefix handling (G/M/K), which accumulates multiplications.
Add our "fallthrough;" statement-like macro before the respective labels
in both cases, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The E1000 driver uses an implicit switch/case fallthrough for sharing
some code supporting different PHYs.
Add our "fallthrough;" statement-like macro before the two labels in
e1000_set_phy_type(), to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The generic DM video code uses an implicit switch/case fallthrough to
provide fallback code paths when certain colour depths are not enabled.
Add our "fallthrough;" statement-like macro to the video_fill() function
to avoid a warning when GCC's -Wimplicit-fallthrough warning option is
enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The USB XHCI code uses an implicit switch/case fallthrough to share code
for handling full speed and low speed transfers.
Add our "fallthrough;" statement-like macro before the second label in
the XHCI code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The USB OCHI code uses an implicit switch/case fallthrough after checking
for valid descriptor IDs.
Add our "fallthrough;" statement-like macro before the default branch in
the OHCI code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner sun8i EMAC driver uses an implicit switch/case fallthrough
when setting up the MAC/PHY communication protocol, to handle the case
when RMII is requested, but would not be supported by the hardware.
Add our "fallthrough;" statement-like macro before the default branch in
sun8i_emac_set_syscon(), to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The fastboot command handling uses an implicit switch/case fallthrough
when receiving the OEM_CONSOLE command, but when this command is not
enabled in Kconfig, to report this command as unknown.
Add our "fallthrough;" statement-like macro before the default branch in
the fastboot code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
In some cases in the generic code, we were already using switch/case
fallthrough annotations comments, though in a way which might not be
understood by most compilers.
Replace two non-standard /* no break */ comments with our fallthrough;
statement-like macro, to make this visible to the compiler.
Also use this macro in place of an /* Fall through */ comment, to be
more consistent.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Even though we seem to catch POWEROFF and EFSCLEAR commands in the THOR
protocol request handling, we ultimately do not seem to handle them
(apart from sending a response), so those commands still print an error
message.
Annotate the switch/case fallthrough in this case, to make this clear to
the compiler.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The inflate state machine in zlib uses switch/case fall-through's
extensively, as it sometimes advances the state, and lets the
conveniently placed next case statement handle the new state already.
The pattern here is:
state->mode = LEN;
case LEN:
Annotate those occasions with the "fallthrough;" macro, to let compilers
know this is fine when using -Wimplicit-fallthrough.
This mimics the upstream commit 76f70abbc73f:
Author: Mark Adler <madler@alumni.caltech.edu>
Date: Sun Mar 27 00:12:38 2022 -0700
Subject: Add fallthrough comments for gcc.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://github.com/madler/zlib/commit/76f70abbc73f
Reviewed-by: Tom Rini <trini@konsulko.com>
Depending on the various MMC boot configurations, we might end up with
trying filesystem mode when a raw image boot failed. This fall-through
in the switch/case statement is explained in a comment, but this is not
visible to the compiler, which still will complain.
Add the proper compiler-visible annotation, to allow enabling the
compiler check in the future.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Neha Malcom Francis <n-francis@ti.com> says:
This short series is an ongoing effort to make RAM utilization clearer for
easier debugging and understanding of code. Intention is for users to quickly
be able to identify the CONFIGs needed to modify for their RAM usecase.
Link: https://lore.kernel.org/r/20250319140327.301266-1-n-francis@ti.com
In the case of a memory allocation error, the ahci_port_start() function
tries to free the `pp' pointer.
This pointer was not dynamically allocated but does in fact point to an
element of the port[] array member of the struct ahci_uc_priv.
Remove the erroneous call to free() to fix this.
Fixes: 4782ac80b0 ("Add AHCI support to u-boot")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jason Jin <jason.jin@freescale.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
The ACPI IORT and ACPI MADT needs to use the same IDs when referencing
GIC ITS. The GIC-v3 ITS driver uses dev_seq(dev) to generate a unique ID
for the MADT, but qemu sbsa-ref hardcodes it.
Currently it's not the same ID, breaking interrupt routing on the OS.
Don't assume it's 0 and fetch it from the device instead.
TEST: Fixes non working IRQs in QEMU sbsa-ref.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
If tiny printf is used with 0x%08X (upper case X) the output is
always 0x00000000. It could be confusing if upper case instead
of lower case is used intentionally or accidentally because the
actual value is not output. To avoid this confusion, treat output
of %X as %x. As a compromise for tiny printf, the hex value is
then output correctly, but in lower case. This is done to keep it
tiny printf small.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message s/effective/total to make it more evident.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Now that we do not need nor want people to use virt-make-fs for
filesystem tests, remove the related packages from the installation
list.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we have no users of "virt-make-fs" nor users of "sudo" for
creating disk images update the documentation. We remove packages that
are no longer required (and related text) as well as be firm in our
wording around not using "sudo".
Signed-off-by: Tom Rini <trini@konsulko.com>
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
Signed-off-by: Tom Rini <trini@konsulko.com>
FIXME: Reword more
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
The main change here is that our mount point directory has changed from
"test_efi_capsule" to "scratch" and so we need to update other functions
too. As the disk image that we get created doesn't have a GPT, invoke
sgdisk to do a conversion first.
Signed-off-by: Tom Rini <trini@konsulko.com>
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
As this test already had a number of internal functions, add a
prepare_image function to do this part of the test.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
Signed-off-by: Tom Rini <trini@konsulko.com>
While we can be passed an image size to use, we always called qemu-img
with 20M as the size. Fix this by using the size parameter.
Signed-off-by: Tom Rini <trini@konsulko.com>
The generic function in test_ut.py to create a disk image with partition
table can be useful outside of test_ut.py so move it to be available
more clearly.
To make this a bit more easily used library function, make use of
check_call directly rather than calling things though u_boot_utils. In
turn, to more easily handle stdin here, use the shell "printf" utility
to pass sfdisk the specification to create as we do not have an actual
file descriptor to use here.
Signed-off-by: Tom Rini <trini@konsulko.com>
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
Signed-off-by: Tom Rini <trini@konsulko.com>
The problem with using "virt-make-fs" to make a filesystem image is that
it is extremely slow. Switch to using the fs_helper functions we have
instead from the filesystem tests as these can add files to images and
are significantly faster and still do not require root access.
Signed-off-by: Tom Rini <trini@konsulko.com>
The release commit for version v2025.04 forgot to update the next
version (i. e. v2025.07) in the section where information about the
merge window is provided.
Fixes: 34820924ed ("Prepare v2025.04")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Note that this undoes the changes of commit cf6d4535cc ("x86:
emulation: Disable bloblist for now") as that was intended only for the
release due to time.
Include spl.h to avoid definition errors in custom builds.
Fixes: commit bc07851897 ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Currently in j721e_init.c we check which firewalls to remove using
the board configuration (e.g CONFIG_TARGET_J721E_R5_EVM). We do this
as J721e and J7200 have different IP and firewalls but use the same
SoC definition (SOC_K3_J721E) even though they are different SoCs.
The idea was they would be similar enough that they both could use
the same SoC config to help with common code sharing. Board checks
would then be used differentiate.
This has grown far too messy to maintain any more, especially now
that there is more than one board using J721e (EVM, SK, Beagle AI64).
As differentiation is done based on board, every one of these boards
would have to have checks added for them. Instead let's split J7200
support out from J721e like how normal new SoC support is done.
This patch touches several subsystems and could not be split much better
as when we add SOC_K3_J7200 we want to make use of it in all spots that
once used the combined SOC_K3_J721E so we can turn off SOC_K3_J721E when
building for J7200 boards.
Signed-off-by: Andrew Davis <afd@ti.com>
The file k3-am62a7.dtsi is part of upstream DT and should
have been removed when migrating to OF_UPSTREAM but must
have been missed. Do this here.
Signed-off-by: Andrew Davis <afd@ti.com>
MUX_MMIO is required in SPL stage in order to boot hyperflash
successfully. Add configs to enable MUX_MMIO in SPL stage.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
MUX_MMIO is required in SPL stage in order to boot hyperflash
successfully. Add configs to enable MUX_MMIO in SPL stage.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Jeremy Compostella <jeremy.compostella@intel.com> says:
Introduces a new configuration option X86_RUN_64BIT_NO_SPL to allow
building U-Boot as a 64-bit binary without using the SPL (Secondary
Program Loader). The motivation is to simplify the boot process for
specific x86-based platforms that do not require SPL, such as those
booting directly from a 64-bit coreboot firmware.
Link: https://lore.kernel.org/r/87bjtyutkp.fsf@jcompost-mobl.amr.corp.intel.com
Create a new defconfig file called `coreboot64-no-spl_defconfig`,
tailored specifically for 64-bit X86 architecture systems that operate
without the Secondary Program Loader (SPL). This configuration takes its
inspiration from `coreboot64_defconfig`..
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change aligns the preprocessor directive with the standard
configuration flag used for detecting 64-bit x86 architecture.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct the preprocessor directive used to check for 64-bit kernel
support in the `zboot_go` function. The code previously checked for
`CONFIG_X86_RUN_64BIT`, which is not the correct configuration option
for determining if the kernel should run in 64-bit mode. The correct
option is `CONFIG_X86_64`.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As both CONFIG_X86_RUN_64BIT and X86_RUN_64BIT_NO_SPL cases run U-Boot
in 64-bit mode with the CPU fully initialized already.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit introduces a new configuration option X86_RUN_64BIT_NO_SPL
to allow building U-Boot as a 64-bit binary without using the SPL
(Secondary Program Loader). The motivation is to simplify the boot
process for certain x86-based platforms that do not require SPL, such as
those booting directly from a 64-bit coreboot firmware.
This update revises the `X86_RUN_64BIT` configuration to more accurately
describe its role as "32-bit SPL followed by 64-bit U-Boot." It
clarifies the sequence of operations during the boot process, where the
system transitions from a 32-bit SPL (Secondary Program Loader) to the
main 64-bit U-Boot.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Harsha Vardhan V M <h-vm@ti.com> says:
This patch series introduces the fuse writebuff sub-system command and
makes improvements to the existing fuse implementation by removing the
custom string functions. The patches are required to be applied in
sequence.
The series consists of the following changes:
Patch 1 removes custom string functions and replaces them with standard
string functions.
Patch 2 introduces fuse.rst documentation for fuse commands.
Patch 3 introduces the fuse writebuff sub-system command, allowing to
write a structured buffer in memory to fuses, and implementing the
necessary function calls.
Patch 4 enables the fuse sub-system in the K3 platform.
Patch 5 updates the fuse.rst documentation to include details about the
new fuse writebuff command.
These changes aim to improve the fuse sub-system by the removal of
custom string functions and the addition of the fuse writebuff
command improves fuse programming workflows by allowing to write a
structured buffer in memory to efuses.
Link: https://lore.kernel.org/r/20250319084714.335777-1-h-vm@ti.com
Add K3_FUSE config option to add and enable fuse sub-system
implementation function calls.
Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add CMD_FUSE_WRITEBUFF config option to add and enable fuse writebuff
sub-system command. Add fuse_writebuff function to be invoked on
writebuff command.
Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add documentation for the 'fuse' sub-system commands in
doc/usage/cmd/fuse.rst file.
Remove doc/README.fuse file.
Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Remove custom string functions and replace them with normal string
functions. Remove the custom strtou32 and replace it with
simple_strtoul.
Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We currently set both and print both PXN and UXN bits when removing
execution for pages. This happens even in the existing per platform
definitions of 'struct mm_region'.
That's not entirely correct though. For stage-1 translations, if a
platform runs on a translation regime with a single privilege level or the
the translation regime supports two privilege levels and we are not
in EL1&0 with HCR_EL2.{NV, NV1} = {1, 1} only BIT54 (XN) is needed
and BIT53(PXN) is reserved 0.
Currently we support Non-Secure EL2, Non-secure EL2&0 and Non-secure
EL1&0.
We already have get_effective_el() which returns 1 if we are
- Running in EL1 so we assume an EL1 translation regime but without
checking HCR_EL2.{NV, NV1} != {1,1}
- Running in EL2 with HCR_EL2.E2H = 1
The only problem with the above is that if we are in EL1&0 and
HCR_EL2.{NV1, NV} == {1, 1}, then
- Bit[54] holds the PXN instead of the UXN
- The Effective value of UXN is 0
- Bit[53] is RES0
So let's re-use that function and set PXN only when we are in
and EL[2|1]&0 translation regime.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Simon Glass <sjg@chromium.org> says:
The membuff implementation curently has no tests. It also assumes that
head and tail can never correspond unless the buffer is empty.
This series provides a compile-time flag to support a 'full' flag. It
also adds some tests of the main routines.
The data structure is also renamed to membuf which fits better with
U-Boot.
There may be some cases in the code which could be optimised a little,
but the implementation is functional.
Link: https://lore.kernel.org/r/20250318152059.1464369-1-sjg@chromium.org
Show the start in end in the comment. Comment a missing variable in
membuf_readline() and fix its line length.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename the C and header files to use the membuf basename, to match the
functions.
Add a MAINTAINERS entry while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The double 'f' is not necessary and is a bit annoying as elsewhere in
U-Boot we use 'buf'. Rename all the functions before it is used more
widely.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass <sjg@chromium.org> says:
U-Boot can start and boot an OS in both qemu-x86 and qemu-x86_64 but it
is not perfect.
With both builds, executing the VESA ROM causes an intermittent hang, at
least on some AMD CPUs.
With qemu-x86_64 kvm cannot be used since the move to long mode (64-bit)
is done in a way that works on real hardware but not with QEMU. This
means that performance is 4-5x slower than it could be, at least on my
CPU.
We can work around the first problem by using Bochs, which is anyway a
better choice than VESA for QEMU. The second can be addressed by using
the same descriptor across the jump to long mode.
With an MTRR fix this allows booting into Ubuntu on qemu-x86_64
In v3 some e820 patches are included to make booting reliable and avoid
ACPI tables being dropped. Also, several MTTR problems are addressed, to
support memory sizes above 4GB reliably.
Link: https://lore.kernel.org/all/20250315142643.2600605-1-sjg@chromium.org/
Now that U-Boot can boot this quickly, using kvm, add a test that the
installer starts up correctly.
Use the qemu-x86_64 board in the SJG lab.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the ACPI tables come from an earlier bootloader it is helpful to
see whether the checksums are correct or not. Add a -c flag to the
'acpi list' command to support that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Free the memory used in tests to avoid a leak. Also unmap the addresses
for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This table lacks a correct checksum at present, so fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The values in the FADT are pointers so should not go through sandbox's
normal addr<->pointer mapping. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a condition for sandbox, to match that of x86, to avoid the warning
"FADT not ACPI-hardware-reduced-compliant".
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the string to take account of UARTs which are connected on I/O
ports, as on x86.
Fix a typo in an error message in the same command, while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
If only a single label is provided in the list, bootdev_next_label()
does not operate correctly and reads beyond the end of the pointer list.
Fix this by adding a new check. Also add a note to convert this array
to an alist
Signed-off-by: Simon Glass <sjg@chromium.org>
Any 'bootable' flag in a DOS partition causes boostd to only scan
bootable partitions for that media. This can mean that extlinux.conf
files on the root disk are missed.
Put this logic behind a flag and update the documentation.
For now, the flag is enabled, to preserve the existing behaviour of
bootstd which is to ignore non-bootable partitions so long as there is
at least one bootable partition on the disk. Future work may provide a
command (or some other mechanism) to control this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the size of this struct is too large on 64-bit machines.
Annotate it with __packed to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some missing pieces to bootparams so that a 64-bit ramdisk address
can be used. Tidy up the logging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing QEMU implementation mostly ignored BLOBLIST_TABLES and
allocates the bulk of the tables with malloc(). Update it to place all
tables in the bloblist. Since QEMU declares a size of 128KB regardless
of the size of its tables, this requires a larger bloblist.
Fix up the e820 table to handle this, keeping the old code as an option
for now, to assist with any future bug-fixing.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing mechanism is pretty painful as it requires manual
calculations for anything but a trivial setup.
Add a new API for adding e820 entries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some test can only be run by a particular board in a lab, e.g. because
they are loaded with an OS image used by the test. Add a way to specify
this in tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing run_command() method is not great for sending things other
than U-Boot commands. Add a helper for sending arbitrary strings as well
as control characters.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present the disks end up being 1MB shorter than they should be,
since dd truncates by default.
Move the code into a function and update it to avoid truncation.
This resolves various warnings when running sandbox tests, of the form:
mmc_bread() MMC: block number 0x9801 exceeds max(0x9800)
caused by the FAT partition being scanning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for an environment stored in the first partition of the
disk, which is assumed to hold a FAT filesystem.
Support the 'cat' command as it is useful for looking at extlinux.conf
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
QEMU likes to have an MTRR set up, just like real machines. Add an MTRR
which covers the total RAM size.
This does nothing on machines without MTRRs.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present mtrr_add_request() requires that the size is a power of two.
This is too limiting for machines with 4GB (or more) of RAM, since they
often must take account of a memory hole at 3GB.
Update the function to automatically deal with an unaligned size, using
more MTRRs as required.
The algorithm is taken from coreboot commit 60bce10750
Signed-off-by: Simon Glass <sjg@chromium.org>
The CONFIG option is no-longer correct since we can have SPL and PPL
with different bitness.
Fix this and sync up with Linux 6.13 in this area, since this is where
the code came from many years ago.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing functions work but the register clobbers are wrong, so
strange bugs results.
The original functions were taken from a very old version of Linux.
Update them from Linux 6.13
Signed-off-by: Simon Glass <sjg@chromium.org>
The MTRR registers have 64-bit values. Update the command to use 64-bit
values so that memory larger than 4GB can be handled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than repeating the same code in several places, add some
functions which can do the conversion.
Use the cpu_phys_address_size() function to obtain the physical-address
size, since it is more reliable with kvm, where the host CPU may have a
different value from the emulation CPU.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the 64-bit descriptor we can use a jump instruction, rather than
pushing things on the stack.
Since the processor is in 64-bit mode by this point, pop a 64-bit value
from the stack, containing the target address.
This simplifies the code slightly, in particular its use of the stack.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is required as part of the procedure. The existing code works
because it changes the GDT at the same time, but this makes kvm
unhappy.
Update the algorithm to disable and then re-enable paging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a symbol to select the size of the GDT, rather than hard-coding a
value. This matches how it is done in start64
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to execution 64-bit code without
installing an entire new Global Descriptor Table. This is inconvenient
since kvm does not seem to like switching into long mode with a new
table.
It isn't actually necessary, since we can just extend the existing
table. Add some new entries to this effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot clears the display when it starts up, so there is no need to ask
the VESA driver to do this. Fix this and add a comment explaining the
flags.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is not actually defined in Kconfig anymore. Use a normal
debug print instead, which has a similar effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
BSS is placed in DRAM which is actually available early with QEMU. But
it is cleared by the init sequence, so values stored there are lost.
Move the system-type flag into a function, instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
The vesa display is widely used on hardware, but it is a bit of a pain
with QEMU. It requires executing option ROMs, which either doesn't work
with kvm, or is difficult to do in a kvm/QEMU-friendly way.
THe bochs display is probably better anyway, so switch to that. It works
fine with kvm as it doesn't need an option ROM.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/31
The SPL and pre-reloc malloc()-space is not large enough to start up
with a display. Expand it.
Switch the order of SPL_SYS_MALLOC_F_LEN and SPL_TEXT_BASE since this
matches what 'savedefconfig' gives us.
Signed-off-by: Simon Glass <sjg@chromium.org>
The spec recommends to set the mapping_offset only when there are
ID mappings as indicated by the mapping_count field.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
The IORT spec says that reserved bits must be set to zero, thus clear
all fields of the struct before starting to fill out non-reserved
fields.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Check that the provided offsets are really pointing to a node
that have been previously written and are of the correct type.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Even though the RC node has the correct size and the ID mappings
are written to the end of the node, the ID 'mapping offset' and
'mapping count' are not written in the IORT RC node header, thus it
looks like that the RC node has no ID mappings.
The Linux kernel doesn't complain about the invalid IORT RC node,
even though the spec says that each RC node must have an ID mapping.
The kernel will fail to use MSI IRQs and fall back to a legacy IRQ
mechanism that's not working either.
Finally it will show strange behaviour around PCI interrupts, making it
hard to trace back to an invalid IORT RC nodes.
Add the missing ID mapping count and mapping offset.
TEST: Fixes IRQ usage of PCI devices on qemu/sbsa-ref.
Fixes: bf5d37662d "acpi: acpi_table: Add IORT support"
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Manorit Chawdhry <m-chawdhry@ti.com> says:
The series adds support for J742S2 family of SoCs. Also adds J742S2 EVM
Support and re-uses most of the stuff from the superset device J784s4.
This device is a subset of J784S4 and shares the same memory map and
thus the code is being reused from J784S4 to avoid duplication.
It initially cleans up the J784s4 and AM69 files so that they can be
re-usable for j742s2 and then it introduces J742S2.
The DT for the following SoC will be coming to U-boot during 6.13 Sync
so the series is kept as RFC till then.
Here are some of the salient features of the J742S2 automotive grade
application processor:
The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive, ADAS and industrial
applications requiring AI at the network edge. This SoC extends the K3
Jacinto 7 family of SoCs with focus on raising performance and
integration while providing interfaces, memory architecture and compute
performance for multi-sensor, high concurrency applications.
Some changes that this devices has from J784S4 are:
* 4x Cortex-A72 vs 8x Cortex-A72
* 3x C7x DSP vs 4x C7x DSP
* 4 port ethernet switch vs 8 port ethernet switch
* 2 DDR controller vs 4 DDR controller
Test logs:
https://gist.github.com/manorit2001/f7df0e8cca1e9973b4361f0559c6f53d
Link: https://lore.kernel.org/r/20250317-b4-upstream-j742s2-v4-0-4ba88bfd357a@ti.com
Based off j784s4 configs with delta changes for J742S2
[ Add AVS support for J742S2 ]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Include the U-boot device tree files needed to boot the board.
[ DDR config ]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Re-use j784s4 clocks and power domains for j742s2 family of device.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
J742S2 has the same part number as J784S4 but JTAG_DEVICE_ID has a
PKG bit that tells about J742S2.
Add support for reading JTAG_DEVICE_ID and set family as J742S2 based
on that.
Link: https://www.ti.com/lit/pdf/spruje3 (TRM)
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Refactor J784s4 ddr file to a common file which uses the
superset device to allow reuse in j742s2-evm which uses the subset part.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Clean up templatized boot binaries for j784s4 soc. This includes
modifying the k3-j784s4-binman.dtsi to use SPL_BOARD_DTB,
BOARD_DESCRIPTION and UBOOT_BOARD_DESCRIPTION from the files that
include it to further reuse code.
k3-j784s4-binman.dtsi will contain only templates. Only required boot
binaries can be built from the templates in the boards' respective
-u-boot.dtsi file (or k3-<board>-binman.dtsi if it exists). This allows
clear distinction between the SoC common stuff vs. what is additionally
needed to boot up a specific board.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
[ Do it only for j784s4 ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Dynamically going through the subnode array and deleting leads to
templates being skipped from deletion when templates are consecutive in
the subnode list. Prevent this from happening by first parsing the DT
and then deleting the nodes. Add a testcase as well for this cornercase.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Add MIDR entries for Cortex-A55, Cortex-A73 and
Cortex-A75 cores and update the is_coretex_a entries.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Marek Vasut <marex@denx.de> says:
Import exfat-fuse libexfat, add U-Boot filesystem layer porting glue
code and wire exfat support into generic filesystem support code. This
adds exfat support to U-Boot.
Fill in generic filesystem interface for mkdir and rm commands.
Make filesystem tests test the generic interface as well as exfat,
to make sure this code does not fall apart.
Link: https://github.com/relan/exfat/commits/0b41c6d3560d ("CI: bump FreeBSD to 13.1.")
Link: https://lore.kernel.org/r/20250317031418.223019-1-marex@denx.de
Add tests for the exfat filesystem. These tests are largely an
extension of the FS_GENERIC tests with the following notable
exceptions.
The filesystem image for exfat tests is generated using combination
of exfatprogs mkfs.exfat and python fattools. The fattols are capable
of generating exfat filesystem images too, but this is not used, the
fattools are only used as a replacement for dosfstools 'mcopy' and
'mdir', which are used to insert files and directories into existing
fatfs images and list existing fatfs images respectively, without the
need for superuser access to mount such images.
The exfat filesystem has no filesystem specific command, there is only
the generic filesystem command interface, therefore check_ubconfig()
has to special case exfat and skip check for CONFIG_CMD_EXFAT and
instead check for CONFIG_FS_EXFAT.
Signed-off-by: Marek Vasut <marex@denx.de>
Enable exfat support in sandbox and sandbox64 to assure build and
test coverage of this filesystem on both 32bit and 64bit builds.
Signed-off-by: Marek Vasut <marex@denx.de>
Demote "exFAT file system is not found" message to debug(). This is
printed when U-Boot attempts to auto-detect the filesystem via generic
filesystem API by attempting to mount the device, and fails to do so
because there is another filesystem in place. The libexfat-fuse code
prints this an error, which interferes with 'test_gpt' test. Demote
the message to debug().
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Fix the following conversion overflow errors. The UTF8-to-UTF16
conversion is done through 32bit wchar_t, but U-Boot codebase is
built with -fshort-wchar which limits wchar_t to 16bit. Replace
the built-in wchar_t with u32 to assure the intermediate type is
32bit.
"
fs/exfat/utf.c: In function ‘utf8_to_wchar’:
fs/exfat/utf.c:165:23: warning: overflow in conversion from ‘int’ to ‘wchar_t’ {aka ‘short unsigned int’} changes value from ‘(int)(short unsigned int)*input << 18 & 1835008’ to ‘0’ [-Woverflow]
165 | *wc = ((wchar_t) input[0] & 0x07) << 18;
| ^
fs/exfat/utf.c:170:23: warning: overflow in conversion from ‘int’ to ‘wchar_t’ {aka ‘short unsigned int’} changes value from ‘(int)(short unsigned int)*input << 24 & 50331648’ to ‘0’ [-Woverflow]
170 | *wc = ((wchar_t) input[0] & 0x03) << 24;
| ^
fs/exfat/utf.c:175:23: warning: overflow in conversion from ‘int’ to ‘wchar_t’ {aka ‘short unsigned int’} changes value from ‘(int)(short unsigned int)*input << 30 & 1073741824’ to ‘0’ [-Woverflow]
175 | *wc = ((wchar_t) input[0] & 0x01) << 30;
| ^
"
Signed-off-by: Marek Vasut <marex@denx.de>
Add U-Boot adjustments to the libexfat code and integrate
the result into U-Boot filesystem layer. This provides full
read-write exfat support for U-Boot available via generic
filesystem interface.
FS_DIRENT_NAME_LEN is increased to 1024 in case exfat is
enabled, because EXFAT can use UTF16 names, which do not
fit into current FS_DIRENT_NAME_LEN. To avoid affecting
every configuration, increase FS_DIRENT_NAME_LEN only in
case EXFAT is enabled.
Example usage via sandbox, assuming disk.img with one exfat partition:
Drive info:
$ ./u-boot -Tc 'host bind 0 ../disk.img ; host info 0'
dev blocks blksz label path
0 262144 512 0 ../disk.img
List files:
$ ./u-boot -Tc 'host bind 0 ../disk.img ; ls host 0:1 /api'
475 Kconfig
230 Makefile
1873 README
...
10 file(s), 0 dir(s)
Load and checksum a file:
$ ./u-boot -Tc 'host bind 0 ../disk.img ; load host 0:1 $loadaddr .config ; \
crc32 $loadaddr $filesize'
56724 bytes read in 1 ms (54.1 MiB/s)
crc32 for 00000000 ... 0000dd93 ==> b2e847c9
$ crc32 .config
b2e847c9
Load .config file to RAM, store the file into FS as /newconfig,
load the /newconfig into RAM and checksum the file:
$ ./u-boot -Tc 'host bind 0 ../disk.img ; load host 0:1 $loadaddr .config ; \
save host 0:1 $loadaddr /newconfig $filesize ; \
load host 0:1 0x10000 /newconfig ; \
crc32 0x10000 $filesize'
56724 bytes read in 1 ms (54.1 MiB/s)
56724 bytes written in 0 ms
56724 bytes read in 0 ms
crc32 for 00010000 ... 0001dd93 ==> b2e847c9
Remove file 3.txt and create new directory /newdir:
$ ./u-boot -Tc 'host bind 0 ../disk.img ; ls host 0:1 / ; \
rm host 0:1 3.txt ; mkdir host 0:1 /newdir ; \
ls host 0:1 /'
...
0 1.txt
0 2.txt
0 3.txt
0 4.txt
0 5.txt
7 file(s), 4 dir(s)
...
0 1.txt
0 2.txt
newdir/
0 4.txt
0 5.txt
6 file(s), 5 dir(s)
Acked-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Import most of libexfat from [1] except for log.c verbatim. The code
does not even compile and further adjustments and integration into
U-Boot filesystem code is in the next patch.
[1] https://github.com/relan/exfat
0b41c6d3560d ("CI: bump FreeBSD to 13.1.")
Acked-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Add generic implementation of write into a block device to be used
by filesystem implementations. This is a pair function for already
existing fs_devread().
Signed-off-by: Marek Vasut <marex@denx.de>
Add generic implementation of struct stat {} imported from Linux 6.13.y
commit 27560b371ab8 ("fs: pack struct kstat better"). This can be used
by filesystem code imported from elsewhere. Now struct stat {} becomes
available on all supported architectures.
Signed-off-by: Marek Vasut <marex@denx.de>
The generic filesystem interface was so far untested. The interface
is similar to the FS specific interfaces with FS specific prefixes,
like ext4ls, fatmkdir, ... but it does not have any prefixes, i.e.
it provides plain ls, mkdir, ... commands.
Extend the test parameters to include 'fs_cmd_prefix' and optionally
'fs_cmd_write' parameters. The 'fs_cmd_prefix' allow specifying the
filesystem specific command prefix, like 'ext4' in 'ext4ls'. The
'fs_cmd_write' allows selecting between 'write'/'save' command name
for storing files into the filesystem, see last paragraph.
Introduce new 'fs_generic' fs_type which is used to parametrize existing
tests and run them without any prefixes if detected, thus testing the
generic filesystem interface. Use the fatfs as the backing store for the
generic FS tests.
The check_ubconfig needs to be slightly adjusted to avoid test for
CMD_FS_GENERIC_WRITE which does not exist separately from CMD_FS_GENERIC.
The CMD_FS_GENERIC does not provide generic 'write' command, instead
the generic equivalent command is called 'save' . Add simple ternary
oeprator to use 'save' command for CMD_FS_GENERIC tests and '..write'
commands for filesystem specific tests.
Enable generic filesystem tests for basic/extended/mkdir/unlink tests.
Signed-off-by: Marek Vasut <marex@denx.de>
Add generic implementation of the 'rm' command to delete files
from filesystems using the generic filesystem API.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Add generic implementation of the 'mkdir' command to create directories
in filesystems using the generic filesystem API.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The option ONENAND_BOOT is never set, so remove it. The option
SYS_ONENAND_BOOT was never migrated to Kconfig and any platforms which
supported that have long been removed from the code, so remove the
reference there as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Sam Edwards <cfsworks@gmail.com> says:
This is v2 of my "misc. fixes" series, sent to prepare the codebase for more
direct LLVM support in the near future. This series contains several fixes that
I found in the process of preparing that support and which address issues
independent of any future feature or enhancement. I am sending these now, both
so that their inclusion is not delayed by discussion on my upcoming series and
to make the latter more manageable.
Link: https://lore.kernel.org/r/20250315221813.1265193-1-CFSworks@gmail.com
While the image size is generally a multiple of 8 bytes, this is not
actually guaranteed; some linkers (like LLD) will shave a few bytes off
of the end of output sections if there are no content bytes there. Since
libfdt imposes a hard rule of 8-byte alignment, make the SPL also be
explicit about the alignment when loading the FDT.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
libfdt 1.6.1+ requires the FDT to be 8-byte aligned and returns an error
if not. OpenSBI 1.0+ includes this version of libfdt and will also
reject misaligned FDTs.
However, OpenSBI cannot indicate the error to the user: since it cannot
access the serial console, it can only silently hang. This proved very
difficult to diagnose without proper debugging facilities. Therefore,
give the U-Boot SPL, which *can* print error messages, an additional
check for proper FDT alignment. Hopefully this saves a lot of
development cycles if another developer encounters alignment problems.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
This section is required by .dynamic and llvm-objcopy will exit with a
fatal error if it is not also preserved in the output.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
EFI applications need to be relocatable. Ordinarily, this is achieved
through a PE-format .reloc section, but since that requires toolchain
tricks to achieve, U-Boot's EFI applications instead embed ELF-flavored
relocation information and use it for self-relocation; thus, the
.dynamic section needs to be preserved.
Before this patch, it was tacked on to the end of .text, but this was
not proper: A .text section is SHT_PROGBITS, while the .dynamic section
is SHT_DYNAMIC. Attempting to combine them like this creates a section
type mismatch. While GNU ld doesn't seem to complain, LLVM's lld
considers this a fatal linking error.
This patch moves .dynamic out to its own section, so that the output ELF
has the correct types. (They're all mashed together when converting to
binary anyway, so this patch causes no change in the final .efi output.)
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.
However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.
This patch doesn't affect the final output binaries in any way.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This allows setting READELF=llvm-readelf in order to use the LLVM
version of the readelf utility. It also aligns with the practice of not
using $(CROSS_COMPILE) in any build recipes directly, reducing the
number of places where $(CROSS_COMPILE) is used.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
RELRO is an instruction to a dynamic loader to make a memory range
read-only after relocations are applied, for added security. Some
linkers (e.g. LLD) require that all sections covered by the RELRO are
contiguous, so that only a single RELRO is needed. U-Boot at present
neither satisfies this requirement (e.g. x86_64 linker script currently
puts .dynamic too far from .got) nor preserves the RELRO when converting
away from ELF, therefore add `-z norelro` to global linker options.
This can be brought back in the future when the linker scripts are
cleaned up and U-Boot understands RELROs.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This flag only makes sense for `binary` output, because .hex/.srec are
sparse formats and represent gaps without filler. While the GNU binutils
version of objcopy does not seem to mind the extra flag being passed,
llvm-objcopy considers this a fatal error.
There is already a version of the objcopy command template in the
Makefile that doesn't use --gap-fill, which is provided for EFI. So use
this other version for all .hex/.srec outputs as well.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When a section is not flagged with SHF_ALLOC, LLD's --gc-sections
algorithm fails to visit the sections that it references. As a result of
this, LLD was dropping the call64.o(.data) section, which is itself only
referenced by .text_call64.
This appears to be a bug in LLD, but the .section directive for
.text_call64 should really have the correct flags either way.
Add `"ax"` to mark the section as ALLOC ("supposed to be loaded") and
CODE ("supposed to be executed").
Fixes: 7dc82591d6 ("x86: Move call64 into its own section")
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
LLVM's IAS does not (and cannot easily) support the 'adrl'
pseudoinstruction, and ARM developers generally do not consider it
portable across assembler implementations either.
Instead, expand it into the two subtract instructions it would emit
anyway. An explanation of the math follows:
The .+8 and .+4 refer to the same memory location; this is because the
.+4 expression occurs in a subsequent instruction, 4 bytes after the
first. This memory location is the value of the PC register when it is
read by the first sub instruction. Thus, both inner parenthesized
expressions evaluate to the same result: PC's offset relative to
image_base. The subtract instructions then remove one byte each
(low, then high) of the total offset, thereby getting the absolute
address of image_base loaded in r0.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There are a handful of sections that are not useful in the U-Boot output
binary. At present, the linker script moves these to the end of the
binary, after the _image_binary_end marker symbol, so that they don't
get loaded.
The linker script syntax supports discarding sections that shouldn't be
included in the output. Switch to this instead, to make the intention
clearer and reduce the ELF sections that have to be handled later in the
build. This is also consistent with the other architectures' linker
scripts.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
These are sometimes used by LLVM's code-generator, when it can guarantee that
the memory buffer being passed is aligned on a (4- or 8-byte) boundary. They
can safely be aliased to the unaligned versions.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
LLVM's code generator will sometimes emit calls to __aeabi_memclr. Add an
implementation of this for LLVM compatibility.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
These symbols need to survive the IR-level dead function elimination pass,
since nothing at the IR level is referencing them (calls to these are inserted
later, at codegen time).
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The .mmutable section was deprecated in 2012 [1] and finally removed
entirely from U-Boot in 2022 [2], so this special handling is no longer
necessary. Remove it to tidy up the linker script.
[1]: dde3b70dcf ("arm: add a common .lds link script")
[2]: 3135ba642f ("arm: pxa: Remove CONFIG_CPU_PXA25X")
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This file has about 40 pylint warnings, but no errors.
Quite a few of these warnings have been there for a while, but most are
coming from newer versions of pylint, where people come up with new
warnings.
The f-string warning is the most common one:
C0209: Formatting a regular string which could be an f-string
That feature was not available when the code was written, but it is
often more convenient than using % with a list of arguments.
This patches reduces the number of warnings in this file, with 7 left
remaining.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have three warnings about needing to use quotes around some strings
in Kconfig files today. In two of these cases we can just add the
missing strings. In the case of INTEL_PINCTRL_PADCFG_PADTOL the symbol
is never referenced and should be dropped.
Signed-off-by: Tom Rini <trini@konsulko.com>
Given how LIB_RAND is handled now, we should be depending on one of the
implementations and not selecting one of them.
Signed-off-by: Tom Rini <trini@konsulko.com>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In the case of OF_SEPARATE this is
the default so we do not need to do anything here normally to enforce
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Christian Marangi <ansuelsmth@gmail.com> says:
This little series adds initial support for Airoha AN7581 SoC.
With the help of some backport patch, this use OF_UPSTREAM
directly.
Posting this to have the targer and the very basic driver.
Ethernet, SNAND and eMMC support is already ready downstream
and will be posted shortly after this gets approved.
Having the first driver ready permits to separately push
dedicate series for SNAND, eMMC and Ethrnet as they all depends
on basic support of clock and reset and nothing else.
Link: https://lore.kernel.org/r/20250314185941.27834-1-ansuelsmth@gmail.com
Add driver for controlling the reset lines of AN7581. This is a detached
version of the clock controller driver present in Linux only used to
control reset lines. Driver gets loaded with the bind of the clock
driver and doesn't require a compatible. This is needed as they share
the same registers.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add support for Airoha AN7581 SoC clock driver. This mainly needed for
eMMC support to correctly get the current clock applied.
Based on the Linux clk-en7523.c but majorly reworked for U-Boot that
doesn't require CCF subsystem.
Major modification, support for set_rate, realtime get_rate and split
for reset part to a different driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Increase the size of malloc region allocated before relocation, as
current size is insufficient for DFU boot causing it to overflow and
corrupt the stack.
Fixed regulator configs are required by vtt_supply which is used by
"am654_ddrss" driver. Without it during DFU boot DDRSS initialization
is failing. These configs are enabled in "am65x_evm_r5_defconfig" but
are missing from "am65x_evm_r5_usbdfu_defconfig". Fix that by updating
"am65x_evm_r5_usbdfu_defconfig" to include "am65x_evm_r5_defconfig".
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
The commit 211b3d7263 ("arm: dts: am3x: Non-functional changes sync
with v6.3-rc6") changed the tilcdc clock names.
Fix the tilcdc driver to use the new clock names.
Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
Add CONFIG_ESM_K3 and CONFIG_ESM_PMIC to enable ESM initialization
in J7200.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
On J7200 processor board MCU_SAFETY_ERROR signal is routed to PMIC for
ESM error handling. The PMIC resets the board on receipt of the signal.
Enable the support for the board by adding ESM PMIC node.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
During linux build process the header size is computed including the BSS
whereas it's removed when creating the uncompressed image. Therefore the
size of the uncompressed image on filesystem will be smaller than the
size specified in the header.
This causes issues when loading the kernel image from the SPL (as in
falcon boot) with spl_load since it compares the read file size from the
FS to the header size form the image. Which leads to the following check
in `include/spl_load.h` failing to -EIO when loading kernel image:
return read < spl_image->size ? -EIO : 0;
Therefore we should return the header size back to spl_load instead of
the file size in falcon boot when not loading a FIT image.
Bug report:
https://lore.kernel.org/u-boot/20250214111656.2358748-1-anshuld@ti.com/
Fixes: 775074165d ("spl: Add generic spl_load function")
Reported-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
CFG_SYS_SPI_* are used in falcon boot to specify the offsets and size of
the respective payloads. This patch moves them to Kconfig keeping the
values consistent for each of the affected boards.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
The first 4 block copy channels and rings on AM62P support
High Capacity Block Copy. These channels have approximately
3x improvement over the normal Block copy channels when doing
DDR-to-DDR copy.
Currently, during allocation these channels do not have a
separate interface and are allocated with normal BCDMA channels.
Latest TIFS and DM firmware adds support for differentiating these
High Capcity resources. This update is for allocating these new
resource type to different hosts with below mentioned scheme.
--------------------- --------------- ------------- ----------------
Resource A53_2 MCU_R5 WKUP_R5
--------------------- --------------- ------------- ----------------
BCDMA HC CHAN [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA HC CHAN RING [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA CHAN [4] => 18 (Primary) 2 (Primary) 6 (Primary)
BCDMA CHAN RING[4] => 18 (Primary) 2 (Primary) 6 (Primary)
Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
Signed-off-by: Sebin Francis <sebin.francis@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Enable support for USB mass storage class (UMS) via USB0 instance of
USB on AM64x SoC. UMS allows USB host to access U-Boot block device
and enable file transfer.
Example usage of UMS command :
=> mmc list
mmc@fa10000: 0 (eMMC)
mmc@fa00000: 1
=> ums 0 mmc 1
UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0x3b72400
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
The reserved-memory node 'wmcpu-reserved@50000000' only applies to
linux kernel and is useless in u-boot.
Remove it in *-u-boot.dtsi to make this memory region usable.
Fixes: 2d6962e061 (arm: mediatek: add support for MediaTek MT7987 SoC)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
While the dd command actually writes to the block device the truncate
command only updates the metadata (at least on ext4). This is faster and
reduces wear on the block device.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Some drivers set DM_FLAG_PROBE_AFTER_BIND, this does nothing since it's
only every applied on a per-device basis.
Remove the flags.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@amd.com>
The DM_FLAG_PROBE_AFTER_BIND flag only makes sense on a per-device
basis, however recently added documentation as well as some confused
drivers imply that it might be added to a driver definition, this does
nothing.
Clarify the new documentation and expand on the comment by the
definition to point people in the right direction.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Ouya and Mocha were added around the same time SPL_HAVE_INIT_STACK was
introduced by Simon and therefore do not include this config option. It
is critical to add it before any defconfig resync, since the SPL_STACK
option will then be removed.
Mocha was added and tested right before this config option was added. Add
it to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Ouya was added and tested right before this config option was added. Add it
to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Pass DBSC5 udevice and MODEMR0 register values to board specific
function dbsc5_get_board_data(). The board specific implementation
of dbsc5_get_board_data() can return struct renesas_dbsc5_board_config
which matches the board based on the content of MODEMR0 or content
of DT accessible via the udevice.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Extract wait for completion code from dbsc5_send_dbcmd2() into
new separate function dbsc5_wait_dbwait(). This extracted code
can be used to implement MR register read in the future.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Update dbsc5_send_dbcmd2() such that it takes multiple parameters
instead of one magic register content value. These parameters are
used to form the same resulting register value internally in the
dbsc5_send_dbcmd2() function, but from well defined input constants.
The new input constants are the operation code, channel, rank, and
operation argument. The argument is operation code specific, therefore
it is still a 16-bit magic number, but the rest of the arguments are
now split up. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Rename dbsc5_ddr_register_read() to dbsc5_ddr_register_mr27_mr57_read()
and dbsc5_ddr_register_set() to dbsc5_ddr_register_mr28_set() to make
it clear what those functions really do. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Assorted fixes, refactorings and additions that are ready, and shave
off some load from upcoming series'.
Improves MMC performance on D1/T113 (missed clock divider), enables
eMMC access on the H616 family (never worked, many thanks to Jernej for
the fix!), DRAM detection fixes for the H616 (now reportedly stable).
Some patches for the upcoming Allwinner A133 SoC support: a few
refactorings, plus the DM clock and pinctrl driver. The DRAM init
routines work, but need some more polishing, that also holds back the
actual enablement patch, which will hopefully follow for v2025.07 still.
Also some preparatory patches for the Allwinner A523 SoC support, for
now just to improve the FEL save/restore code. There will be more patches
coming up for this, ideally also in the coming cycle still.
Gitlab CI passed, and I booted that briefly on some boards.
Because the Allwinner BootROM always runs in AArch32, even on ARMv8 SoCs,
we need to switch to AArch64 first, but also need to save the CPU state,
when we later may need to return to the BootROM, for continuing with the
FEL USB protocol. This is done in 32-bit code, which we include into the
AArch64 boot assembly file as a series of .word directives, containing
the encoded AArch32 instructions. To be able to change and verify that
code, we also kept an assembly file with the respective 32-bit code, but
just for reference.
As this code is never compiled or assembled - it's just for
documentation - it became stale over time: we didn't really update this
along with the changes we made to the boot code. In particular the FEL
save code was completely missing.
Update that 32-bit assembly file, to match the current version used in
boot0.h, including the FEL save routine. Also update the build
instructions in the comments, to give people an actual chance to
assemble this code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
To be able to return to the BootROM when booting via the FEL USB
protocol, we need to save the CPU state very early, which we need to do
in the embedded AArch32 code. At the moment the pointer to the buffer for
that state is located *after* the code, which makes the PC relative
code fragile: adding or removing instructions will change the distance
to that pointer variable.
The "new" Allwinner A523 SoC requires more state to be saved (GICv3
system registers), but we must do that *only* on that SoC. Conditional
compilation sounds like the easiest solution, but would mean that the
distance to that pointer would change.
Solve this rather easily by moving the pointer to the *front* of the
code: we load that pointer in the first instructions, so the distance
would always stay the same. Later in the code we won't need PC relative
addressing anymore, so this code can grow or shrink easily, for instance
due to conditional compilation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
To return a 64-bit Allwinner chip back to the 32-bit BootROM code, we
have some embedded AArch32 code that restores the CPU state, before
branching back to the BootROM. At the moment the pointer to the buffer
with that state is located *after* the code, which makes the PC relative
code fragile: adding or removing instructions will change the distance
to that pointer variable.
The "new" Allwinner A523 SoC requires more state to be restored (GICv3
system registers), but we must do that *only* on that SoC. Conditional
compilation sounds like the easiest solution, but would mean that the
distance to that pointer would change.
Solve this rather easily by moving the pointer to the *front* of the
code: we load that pointer in the first instruction, so the distance
would always stay the same. Later in the code we won't need PC relative
addressing anymore, so this code can grow or shrink easily, for instance
due to conditional compilation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Cards should always be reset and threshold set. This fixes eMMC on H616.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
[Andre: use macro-defined offsets to fix build on older SoCs]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that checking just one write is not enough. Due to
unexplained reasons scan procedure detected double the size. By making
16 dword writes and comparisons that never happens.
New procedure is also inverted. Instead of writing two different values
to base address and some offset and then reading both and comparing
values, simplify this by writing pattern at the base address and then
search for this pattern at some offset.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Ryan Walklin <ryan@testtoast.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Since there is quite a few possible DRAM configurations in terms of bus
width, rank and rows and columns count, size detection algorithm must be
very careful not to test combination which would be bigger than H616 is
actually capable of handling.
Ideally, we should always detect memory aliasing, even for 4 GB memory
size, which is the maximum amount of memory that H616 is capable of
handling. For this reason, we have to configure minimum amount of
supported rows when testing for columns and vice versa. This way test
code will never step out of 4 GB boundary.
While at it, check for 17 rows maximum. This aligns code with BSP DRAM
driver. There is probably no such configuration which would make sense
with 4 GB memory.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.
Add the required mapping between the pinmux group strings and their
respective mux value, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can build on the
names already used there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.
Add support for the CCU, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can already use the
existing binding headers.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reorder the Kconfig defaults for the maximum SPL size, to make the
Allwinner specific values more readable and extensible: many older SoCs
need to be limited to 32KB, so make this the last ARCH_SUNXI entry, used
as a fallback unless explicitly overridden before.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Most Allwinner SoCs (used on 107 out of 172 boards) use a default CPU
frequency of 1008 MHz during the initial setup in the SPL.
Make this the fallback default, in case nothing else is selected, to
simplify the Kconfig stanza and make future additions easier.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Some of the X-Power AXP PMICs can be ordered with an alternative I2C
address, for instance an AXP717 could be shipped with address 0x34 or
with address 0x35. Similarly the AXP803 lists two possible addresses.
For DM (DT) based drivers this is no problem, but the Allwinner SPL
code relies on exactly one hardcoded address per PMIC so far.
Add a Kconfig variable that holds the I2C address used by the PMIC
accessed in the SPL, and provide the (mostly only one) supported address
as its default, for the PMICs we use. Boards using the other address
can easily set this in their defconfig.
This effectively moves the hardcoding from C code to Kconfig.
That enables to use the AXP717 on some boards with the new Allwinner
A523 chip, which use the other I2C address there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The AXP803 has been around for about a decade now, but so far we didn't
need SPL support, since the DRAM rail was wired up correctly at reset.
Now some boards using the A133 SoC use the (compatible) AXP707 with DDR4
memory, which requires the SPL to set the required 1.1V voltage manually.
Add the descriptions for the DC/DC regulators of the AXP803, and enable
that when CONFIG_AXP803_POWER is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
On the Allwinner D1/R528/T113-s3 SoCs (NCAT2) the factors encoded in
the PLL register describe the doubled clock rate, as in the other SoCs.
Correct for that by always dividing the calculated rate by 2, except on
the H6, where we need a divisor of 4 (no change here).
This corrects the PERIPH0 clock rate as read by the MMC driver, and
actually doubles the MMC performance on those NCAT2 chips.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Kuba Szczodrzyński <kuba@szczodrzynski.pl>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
On the Allwinner D1/R528/T113-s3 SoCs the MMC clock source selected by
mux value 1 is PLL_PERIPH0(1x), not (2x), as in the other SoCs.
But we have still the hidden divisor of 2 in the MMC mod clock, so
need to explicitly compensate for that on those SoCs.
This leads to the actually programmed clock rate to be double compared
to before, which increases the MMC performance on those SoCs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Kuba Szczodrzyński <kuba@szczodrzynski.pl>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The CHIP_DIP_SCAN configuration option
is relevant only to ARCH_SUNXI.
Make CHIP_DIP_SCAN dependent
on ARCH_SUNXI so that it does not show up on other goals.
Signed-off-by: Liya Huang <1425075683@qq.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
When trying to boot an OS installer or a live image via EFI HTTP the
following happens
- U-Boot downloads the image and mounts it in memory
- The EFI subsystem is invoked and the image is started
- The OS calls ExitBootServices and the memory that holds the mounted
image might get overwritten
This results in installers complaining that they can't find installer
medium or live images complaining they can't find the root filesystem.
ACPI already deals with it by having NFIT and NVDIMM to provide ramdisks
that need to be preserved by the OS. Linux and device trees have support
for persistent memory devices (pmem).
We can use them and inject a pmem node in the DT to preserve memory across the
entire boot sequence. Linux will just create a block device over the reserved
memory and installers/images can re-discover it.
This is what it looks like from the OS perspective:
nd_pmem namespace0.0: unable to guarantee persistence of writes
pmem0: p1 p2 p3
EXT4-fs (pmem0p3): mounted filesystem f40f64a4-5b41-4828-856e-caaae2c1c2a0 r/w with ordered data mode. Quota mode: disabled.
EXT4-fs (pmem0p3): re-mounted f40f64a4-5b41-4828-856e-caaae2c1c2a0 r/w. Quota mode: disabled.
Adding 45052k swap on /dev/pmem0p2. Priority:-2 extents:1 across:45052k SS
root@genericarm64:~# mount | grep pmem
/dev/pmem0p3 on / type ext4 (rw,relatime)
/dev/pmem0p1 on /boot type vfat (rw,relatime,fmask=0022,dmask=0022,codepage=437,iocharset=iso8859-1,shortname=mixed,errors=remount-ro)
It's worth noting that Linux behaves differently with reserved memory
(at least on arm64) and that depends on kernel config options.
CONFIG_ZONE_DEVICES and CONFIG_ARM64_PMEM are such options. It boils down to
how the kernel tries to map pages. If devm_memremap_pages() gets called instead
of devm_memremap() mapping the memory fails.
The only safe way is to remove the memory from the EFI memory map,
rather than defining it as /reserved no-map;/ in the DT.
Commit 56f186a68b ("lmb: check if a region can be reserved by
lmb_reserve()") fixed the lmb_reserve() and lmb_alloc_addr() API's for
some corner case scenarios, and also added corresonding test cases for
these corner cases. These tests were checking, among other things, the
lmb_alloc_addr() API. The above commit was applied to the next branch.
Subsequently, there was commit 67be24906f
("lmb: change the return code on lmb_alloc_addr()") which was first
applied on the master branch, and subsequently got merged to next as
part of the rebase. The second commit changes the return value of the
lmb_alloc_addr() API, which now results in some of the tests added as
part of the first commit to fail. Fix those test cases.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The EFI HTTP boot puts the ISO installer image at some location in
memory. Information about this image has to be passed on to the OS
kernel, which is done by adding a persistent memory(pmem) node to the
devicetree(DT) that is passed to the OS. The OS kernel then gets
information about the presence of this ISO image and proceeds with the
installation.
In U-Boot, this ISO image gets mounted as a memory mapped blkmap
device slice, with the 'preserve' attribute. Add a helper function
which iterates through all such slices, and invokes a callback. The
callback adds the pmem node to the DT and removes the corresponding
memory region from the EFI memory map. Invoke this helper function as
part of the DT fixup which happens before booting the OS.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Tobias Waldekranz <tobias@waldekranz.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Some blkmap memory mapped devices might have to be relevant even
after U-Boot passes control to the next image as part of the platform
boot. An example of such a mapping would be an OS installer ISO image,
information for which has to be provided to the OS kernel. Use the
'preserve' attribute for such mappings. The code for adding a pmem
node to the device-tree then checks if this attribute is set, and adds
a node only for mappings which have this attribute.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add information about the type of blkmap slices as an attribute in the
corresponding slice structure. Put information in the blkmap slice
structure to identify if it is associated with a memory or linear
mapped device. Which can then be used to take specific action based on
the type of the blkmap slice.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
ACPI has NFIT and NVDIMM support to provide ramdisks to the OS. Linux
and device trees have support for persistent memory(pmem) devices. The
firmware can then add a pmem node for the region of memory occupied by
the ramdisk when passing the device-tree to the OS.
It's worth noting that for linux to instantiate the /dev/pmemX device,
the memory described in the pmem node has to be omitted from the EFI
memory map we hand over to the OS if ZONE_DEVICES and SPARSEMEM is
enabled. With those enabled the pmem driver ends up calling
devm_memremap_pages() instead of devm_memremap(). The latter works
whether the memory is omitted or marked as reserved, but mapping pages
only works if the memory is omitted.
On top of that, depending on how the kernel is configured, that memory
area must be page aligned or 2MiB aligned. PowerPC is an exception here
and requires 16MiB alignment, but since we don't have EFI support for
it, limit the alignment to 2MiB.
Ensure that the ISO image is 2MiB aligned and remove the region
occupied by the image from the EFI memory map.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With upcoming changes supporting pmem nodes, we need to remove the
pmem area from the EFI memory map. Rename efi_add_memory_map_pg() to
efi_update_memory_map(), and allow removing memory from the EFI memory
map.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
One of the problems an OS may face, when running in EFI, is that
a mounted ISO, after calling ExitBootServices goes away, if that ISO
is resident in RAM memory as a ramdisk.
ACPI has NFIT and NVDIMM support to provide ramdisks to the OS, but we
don't have anything in place for DTs. Linux and device trees have support
for persistent memory devices. So add a function that can inject a pmem
node in a DT, so we can pass information on the ramdisk the OS.
Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The efi_install_fdt() function is called before booting an EFI binary,
either directly, or through a bootmanager. This function installs a
copy of the device-tree(DT) on the EFI configuration table, which is
passed on to the OS.
The current logic in this function does not install a DT if a
device-tree is already installed as an EFI configuration
table. However, this existing copy of the DT might not be up-to-date,
or it could be a wrong DT for the image that is being booted. Always
install a DT afresh to the configuration table before booting the EFI
binary.
Installing a new DT also involves some additional checks that are
needed to clean up memory associated with the existing DT copy. Check
for an existing copy, and free up that memory.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There is logic in the copy_fdt() function which is iterating over the
platform's DRAM banks and setting the fdt_ram_start variable. However,
this variable is not used subsequently in the function. Remove this
superfluous code.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The imx8_cpu driver is a CPU Driver that supports the i.MX9
family to display the CPU type, temperature grade and
current operating temperature. The older file,
arch/arm/mach-imx/cpu.c, does not support i.MX9, so this config
is enabled in various IMX9 boards. Instead of having this option
enabled in every IMX9, select this driver by default for the
platform.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The imx8_cpu driver is a CPU Driver that supports the i.MX8Q
family. When it is enabled, it acts as an alternative to
arch/arm/mach-imx/cpu.c, but the imx8_cpu supports the driver
model where cpu.c does not. Imply this newer driver by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The imx8_cpu driver is a CPU Driver that supports the i.MX8M
family, and when it is enabled, it acts as an alternative to
arch/arm/mach-imx/cpu.c, but the imx8_cpu supports the driver
model where cpu.c does not. Imply this newer driver by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Much of the data that is display by imx8_cpu.c is also displayed from
arch/arm/mach-imx/cpu.c, except the temperature grade and active
temperature are only displayed when SoC is an i.MX9. Since IMX9 now
implies IMX_TMU, change this to check for IMX_TMU in the same way
it's done in mach-imx/cpu.c to enable displaying this information
for any SoC with either of this config enabled.
Since additional text may appear due to this commit, remove
the extra space in the message displaying the temperature
grade.
Before:
CPU: NXP i.MX8MP Rev1.1 A53 at 1200 MHz
Model: Beacon EmbeddedWorks i.MX8MPlus Development kit
After:
CPU: NXP i.MX8MP Rev1.1 A53 at 1200 MHz
CPU: Industrial temperature grade (-40C to 105C) at 28C
Model: Beacon EmbeddedWorks i.MX8MPlus Development kit
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If the CPU Information is displayed from imx8_cpu, it displays the
cpu temperature grade and operating temperature if CONFIG_IMX9 is
defined. This behavior is similar to what happens mach-imx/cpu.c,
except that the latter checks for IMX_THERMAL or IMX_TMU.
In preparation to make imx8_cpu act like the previous implementation
for any CPU, make IMX8M imply IMX_TMU so it will be always displayed
unless a user decides to disable it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The imx8_cpu is capable of running on IMX8, IMX8M, and IMX9
families, but the CPU list is limited on the 8M variants. Expand
this list to show more variants and their respective names.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If the CPU Information is displayed from imx8_cpu, it displays
the cpu temperature grade and operating temperature if
CONFIG_IMX9 is defined. This behavior is similar to what
happens arch/arm/mach-imx/cpu.c except that the latter
checks for CONFIG_IMX_THERMAL or CONFIG_IMX_TMU.
In preparation to make imx8_cpu act like the previous
implementation for any CPU, make IMX9 imply IMX_TMU, so
it will be always displayed unless a user decides to
disable it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There is a config option to run the PMIC at nominal voltages
which is not enabled on the i.MX8MP Beacon kit, so it the PMIC
runs at overdrive voltages. Unfortuately, the check for this
condition to set the GIC clock parent and rate is backwards from
what it should be, and accidentally sets the GIC clock to nominal
if the PMIC is in overdrive, and sets the GIC clock to overdrive
if the PMIC is in nominal. Fix this by inverting the logic on the
check.
Fixes: ab53bd43db ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
The configuration descriptions generated by binman contain the vendor
device-tree directory. Instead of adding it to all match strings just strip
it off.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
JH7110 boards are currently the only use case for multi DTB FIT images
on RISC-V.
Booting JH7110 systems with a VisionFive 2 device-tree used to kind of
work without causing harm to the hardware. But there is no guarantee
that this will hold true in future. So we should not rely on it.
Before the current patch series booting failed on unsupported boards due
to the lack of a device-tree in the binman generated default configuration
when reaching main U-Boot.
By not setting a default configuration booting will now fail on
unsupported boards already in SPL. This allows SPL to
continue with the next boot source for a possible recovery.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
Binman can automatically generate device-tree and configuration entries in
the FIT image based on CONFIG_MULTI_DTB_FIT if the binman node includes the
right sub-nodes.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
Remove CFG_SYS_SDRAM_BASE so that we can get DRAM base
from dt instead of compile time config.
Removing this config helps the u-boot more portable.
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Introduced in commit 5a4e0625ac ("riscv: dts: sophgo: Add ethernet
node"), eth_{csrclk,ptpclk} were used as placeholders for ethernet
controller. As the real clock controller has been added, drop them to
clean the devicetree up.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The zkr ISA extension can be used to generate random numbers. Since RVA22
zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
driver detects if the extension is usable during driver binding. Let's
enable it by default on QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Without 'nvme scan' the ESP on the NVMe drive is not found early.
EFI variables cannot be persisted.
Hit any key to stop autoboot: 0
Cannot persist EFI variables without system partition
** Booting bootflow '<NULL>' with efi_mgr
Loading Boot0000 'mmc 0' failed
EFI boot manager: Cannot load any image
Boot failed (err=-14)
scanning bus for devices...
** Booting bootflow 'nvme#1.blk#1.bootdev.part_1' with efi
Booting /\EFI\BOOT\BOOTRISCV64.EFI
error: no suitable video mode found.
GNU GRUB version 2.12
With 'nmve scan' booting works as expected.
Hit any key to stop autoboot: 0
** Booting bootflow '<NULL>' with efi_mgr
Loading Boot0000 'mmc 0' failed
Loading Boot0001 'nvme 0' failed
Booting: nvme 1
error: no suitable video mode found.
GNU GRUB version 2.12
Reported by Yuri Zaporozhets <yuriz@vodafonemail.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
qcom-next-20230324:
* msm8916 gets proper sysreset and spin-table support
* The first new IPQ platform is added - the IPQ9574. The IPQ series are
used in routers. The flashing process is also documented
* mach-snapdragon gains the ability to boot with an internal FDT and
still parse memory from an externally provided one
* SC7280 gets a pinctrl driver and various clock driver improvements.
* Qualcom clock drivers will now actually return an error when
attempting
to enable a clock which isn't described.
* Qualcomm pinctrl drivers will now return an error when attempting to
configure an invalid function mux
In case ENV_IS_IN_SPI_FLASH is disabled, returning ENVL_SPI_FLASH
leads to failure to find environment driver on start up. Fix this
by testing whether ENV_IS_IN_SPI_FLASH is enabled and if not, then
return ENVL_NOWHERE instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_fixed_factor*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Use U-Boot specific struct udevice instead of Linux compatibility
struct device in clk-fixed-factor registration.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_divider*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Use U-Boot specific struct udevice instead of Linux compatibility
struct device in clk-divider clock registration.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_pllv3*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Convert clock-osc-24m back to osc_24m and clock-osc-32k back to osc_32k.
These are the clock which match clock tables in Linux. This is now
possible because the clock drivers now resolve clock names based on
clock-names DT property in the CCM DT node.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_composite*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Use U-Boot specific struct udevice instead of Linux compatibility
struct device in clk-composite registration.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass U-Boot specific struct udevice pointer to clock parent device
to clk_register_gate*(), so clk_register_gate*() can access the parent
udevice.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_gate*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Use U-Boot specific struct udevice instead of Linux compatibility
struct device in gate2 clock registration.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass U-Boot specific struct udevice pointer to clock parent device
to clk_register_mux(), so clk_register_mux() can access the parent
udevice.
Signed-off-by: Marek Vasut <marex@denx.de>
Pass struct udevice * into imx_clk_mux*() functions, so the
clock core would have access to parent struct udevice *.
Signed-off-by: Marek Vasut <marex@denx.de>
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Signed-off-by: Marek Vasut <marex@denx.de>
Neither clk_register_mux_table() nor clk_hw_register_mux_table()
are called outside of clk-mux.c , fold both into clk_register_mux().
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Add clk_resolve_parent_clk() to resolve parent clock udevice name
based on clock-names DT property. This is used in SoC clock drivers
to look up the clock name in clock tables, which matches a clock
name in DT clock-names property, and convert it into udevice name
which is used by U-Boot clock framework to look up parent clock in
e.g. clk_register() using uclass_get_device_by_name(UCLASS_CLK,
parent_name, &parent);
Signed-off-by: Marek Vasut <marex@denx.de>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25267
- Allow the registration and enablement of the i.MX UART clocks via DM,
without the need of manually calling init_uart_clk().
- Remove duplicated 'mmc dev ${mmcdev}' commands.
- Rework some of the RAM related Kconfig symbols for phycore_imx8mp.
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case we can easily fix this
by dropping the select line as the following choice statement handles
things correctly. We also drop the "default false" line as false / n is
the default.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In preparation to remove manual references for enabling some clocks,
enable SPL_CLK_IMX8MP which automatically enables SPL_CCF and
SPL_CLK_COMPOSITE_CCF which permit various drivers to activate
their respective clocks automatically.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable. This requires a small re-order
of a couple functions.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9. If/when the UART clock
registration is done for older boards, this limitation
could be updated.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Ouya microconsole is build on Nvidia Tegra 3 (T33) SoC, featuring a
quad-core 1.7 GHz ARM Cortex-A9 CPU and a ULP GeForce GPU, paired with 1GB
of DDR3 RAM and 8GB of internal flash storage. Running a modified Android
4.1 (Jelly Bean) OS with a custom launcher, it aimed for open-source gaming
via a digital storefront.
This implementation is mostly based on upstream Linux device tree and
fragments of work done by previous developers.
Co-developed-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The names used for displaya, displayb and i2c1 do not align with their
corresponding Linux counterparts. This inconsistency can cause pins to be
configured incorrectly, potentially breaking existing functionality.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Modify the pin state lists for lock, io-reset, rcv-sel, and e-io-hv
properties by repositioning the default value to the end. This change
addresses conflicts with device tree representations of TEGRA_PIN_DISABLE
and TEGRA_PIN_ENABLE.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The current default pin and drive values were more of temporary
placeholders. They have to be replaced with accurate default values as
specified in the TRM and header file.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Align TF700T bindings with existing upstream device trees. OF_UPSTREAM
migration is possible already but resulting size of binary exceeds maximum
allowed size with full size trees.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Upgrade HTC One X device tree to comply possible upstream Linux device
tree. Once Linux catches up, HTC One X can be switched to OF_UPSTREAM.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Upgrade LG P895 and P880 device tree bindings according to preliminary
upstream Linux tree. Once Linux catches up, LG X3 can be switched to
OF_UPSTREAM without regressions.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since EDID only indicates supported standard timings, a large table with
detailed timing information is necessary, consuming significant space. To
mitigate this, the table is made configurable via kconfig, allowing it to
be excluded when not needed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.
Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.
This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.
[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf
Based on commit 0316c7e66bbd in the Linux kernel.
Tested-by: Quentin Schulz <quentin.schulz@cherry.de> # RK3588 Tiger
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
To simply porting phy drivers from Linux to U-Boot, define
phy_set_bits() and phy_clear_bits() functions with a similar API to
those used in Linux.
The U-Boot versions of these functions include the `devad` argument
which is not present in the Linux versions, to keep them aligned with
the other phy functions in U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
In ravb_probe(), we were missing a couple of things in the error
handling path:
* We must unregister the MDIO bus before freeing the corresponding
struct mii_dev instance to avoid the potential for use-after-free
bugs.
* We must free the resources acquired by clk_get_bulk() even if the
clocks have not yet been enabled.
Fixes: 8ae51b6f32 ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Enable support for USB 2.0, USB 1.1 and USB storage devices on the
Renesas RZ/G2L EVK.
Also enable the 'usb' command to support USB scanning and debugging.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Extend the existing Renesas R-Car Gen3 USB 2.0 PHY driver to support the
RZ/G2L and related SoCs.
Also enable this driver by default for the RZ/G2L SoC family.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Simon Glass <sjg@chromium.org> says:
This series includes some patches related to allowing read_all() to be
used with the extlinux / PXE bootmeths.
These patches were split out from the stb4 series, since it will need to
have additional patches for LWIP, to avoid breaking PXE booting when
LWIP is used.
Link: https://lore.kernel.org/r/20250306002533.2380866-1-sjg@chromium.org
Add a new netboot_run() function which can be used for simple network
operations, such as loading a file. Put the implementation in an
internal function, used by the existing code.
Place this function into the net/ code, so that it does not need the
command line to be available.
Document which network operations are supported, i.e. a limited subset,
for now.
For the one board which uses lwip, it is not quite clear how to avoid
using the cmdline interface. This will need some discussion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the core code for starting an netboot operation into a separate
function, so that we can (with additional work) move towards calling it
from outside the file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than setting global variables, return the size, if provided. For
tftput, use the addr argument to store the save address, to avoid adding
yet another parameter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than updating the global, update the value of some parameters,
so the action of the function is simpler.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than updating the global, update the value of a parameter, so the
action of the function is simpler.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function repeats the same code in a few places, namely setting
net_boot_file_name_explicit and copying of the filename to
net_boot_file_name
Move these two operations to the caller, with just the filename (or
NULL) returned by parse_args()
This makes things a little easier to follow.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is a bit vague as to what it does. Expand the comment a
little, to specify which args are provided and which variables are
updated.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Adjust the remaining call in this function to use the bootm API. This
will allow PXE to work without the command line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tidy up this code a little to avoid two calls to env_get() for both
fdt_addr and fdtcontroladdr
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Rather than building a command line for each operation, use the
functions provided by the bootm API.
Make sure that the bootm functions are available if pxe_utils is used.
Since SYS_BOOTM_LEN is not present for the tools-only build, adjust the
code to handle that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
A compressed booti image relies on the compression-format's header at
the start to indicate which compression algorithm is used.
We don't support this elsewhere in U-Boot, so assume that a compressed
file is always a booti file. Once it is compressed, a check is made to
make sure that it actually is.
Simplify the implementation by adding a new function which returns the
booti image-type if compression is detected.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the booti format is handled separately, in its own command.
Provide a way to boot uncompressed booti images within the bootm code,
so that eventually we can boot these images without CONFIG_CMDLINE
Update bootm_init() to attach the images for all formats which use them.
Add some debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Arm invented a new format for arm64 and something similar is also used
with RISC-V. Add this to the list of supported formats and provide a way
for the format to be detected on both architectures.
Update the genimg_get_format() function to support this.
Fix up switch() statements which don't currently mention this format.
Booti does not support a ramdisk, so this can be ignored.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an enum so it is clearer that these options are related. Update
genimg_get_format(), tidy up the function comment and move it to the
header file, since it is exported.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code cannot be compiled by boards which don't have this option. Add
an accessor in the header file to avoid another #ifdef
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Since this function only adjusts one element of the bootm command, pass
just that. This will make it easier to refactor things to remove the
bootm command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
This function is quite long. Split out the FDT processing into its own
function.
Add a function comment for the new label_process_fdt() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
This function is far too long. Split out the part which builds and runs
the bootm/i/z commands into its own function.
Add a function comment for the new label_run_boot() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
The address of the bzImage is not recorded in the bootflow, so we cannot
actually locate the version at present. Handle this case, to avoid
showing invalid data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than holding the state in the implementation code, move it to the
command code. The state is now passed to the implementation functions
and can there (with future work) be pass in from bootstd, without going
through the commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
This structure is supposed to handle any type of booting
programmatically, i.e. without needing a command to be executed. Move
the x86-specific members into it and use it instead of
struct zboot_state. Provide a macro so access is possible without adding
lots of #ifdefs to the code.
This will allow the struct to be used for all four types of booting
(bootm, bootz, booti and zboot).
Call bootm_init() to init the state, to match other boot methods.
Note that some rationalisation could be performed on this. But this
is tricky since addresses are stored as strings in several places. Also
some strings combine multiple arguments into one. So to keep this task
somewhat manageable, we content ourselves with just getting everything
into the same struct
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the phyCORE-AM62Ax to our common board directory to
enable our SOM detection for this product.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add the bootph-all tag to usb0_phy_ctrl node to ensure it is
properly initialized during the boot process. This fixes the
following issue:
dwc3-am62 dwc3-usb@f900000: unable to get ti,syscon-phy-pll-refclk regmap
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add the bootph-all tag to usb0_phy_ctrl node to ensure it is
properly initialized during the boot process. This fixes the
following issue:
dwc3-am62 dwc3-usb@f900000: unable to get ti,syscon-phy-pll-refclk regmap
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which
is incompatible with our board configuration. Replace it with a custom
variant that better aligns with our setup, ensuring correct offsets and
eliminating unnecessary entries.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This config includes the phycore_am62ax_r5_defconfig file as well as
the am62x_r5_usbdfu.config fragment. We need another defconfig
because the AM62Ax has not enough internal SRAM to support all boot
sources. The normal phycore_am62ax_r5_defconfig should allow to boot
from MMC and OSPI while this new defconfig allows to boot from USB.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Provide a common part for our K3 based boards including general details
about environment handling and EFI capsule updates.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Enable raw & on disk capsule updates and provide configs required
for updating MTD devices. Also resync after savedefconfig.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add documentation on how to run FVP with U-Boot and TF-A. This helps
users configure and run U-Boot correctly on Arm models.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On fast models, the CRC32 feature is disabled by default. When enabled
in U-Boot, it leads to synchronous aborts due to unrecognized
instructions. This change ensures CRC32 is disabled by default to
maintain compatibility.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently this platform implicity builds CONFIG_TPL_DM_I2C support
without setting the symbol. Add it for clarity.
Signed-off-by: Tom Rini <trini@konsulko.com>
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.
Signed-off-by: Tom Rini <trini@konsulko.com>
Since removing reset_cpu() in mach-snapdragon, all Qualcomm platforms
now depend on CONFIG_SYSRESET and will fail to build without it.
Move the dependency from qcom_defconfig to kconfig so that we use
SYSRESET for all platforms.
Fixes: 61a1a1b8ca ("mach-snapdragon: use PSCI sysreset driver")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Sughosh Ganu <sughosh.ganu@linaro.org> says:
The patch series contains some fixes and improvements in the lmb
code, along with addition of corresponding test cases for the changes
made.
The lmb_reserve() function currently does not check if the requested
reservation would overlap with existing reserved regions. While some
scenarios are being handled, some corner cases still exist. These are
being handled by patch 1, along with adding test cases for these
scenarios.
Patch 2 is handling the case of reserving a new region of memory, but
that region overlaps with an existing region. The current code only
handles one particular scenario, but prints a message for the other
scenario of an encompassing overlap and returns back. The patch
handles the encompassing overlap.
Patch 3 is an improvement whereby we allow coalescing a newly reserved
region with an existing region. The current code exits this check
prematurely.
Patch 4 is removing a now superfluous check for overlapping regions
with flag other than LMB_NONE. This now gets handled at an earlier
point in lmb_reserve().
Patch 5 is clubbing the functionality to check if two regions are
adjacent, or overlap, allowing some code re-use.
Patch 6 is optimising the lmb_alloc() function by having it call
_lmb_alloc_base() directly.
Link: https://lore.kernel.org/r/20250303133231.405279-1-sughosh.ganu@linaro.org
The actual logic to allocate a region of memory is in the
_lmb_alloc_base() function. The lmb_alloc() API function calls
lmb_alloc_base(), which then calls _lmb_alloc_base() to do the
allocation. Instead, call the _lmb_alloc_base() directly from both the
allocation API's, and move the error message to the _lmb_alloc_base().
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The functions to check if the two said regions are adjacent or overlap
are pretty similar in nature. Club the functionality into a single
function lmb_regions_check() and return the appropriate return value
to signify this aspect.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
U-Boot allows re-use of already reserved memory through the
lmb_reserve() and lmb_alloc_addr() API's. This memory re-use is
allowed only when the flag of the existing reserved region and that of
the requested region is LMB_NONE. A check was put in the
lmb_add_region_flags() in commit 8b8b35a4f5 to handle the scenario
where an already reserved region was re-requested with region flag
other than LMB_NONE -- the function then returns -EEXIST in such a
scenario.
The lmb_reserve() function now does a check for a reservation request
with existing reserved regions, and returns -EEXIST in case of an
overlap but when the flag check fails. Remove this now redundant check
from lmb_add_region_flags().
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The lmb_add_region_flags() first checks if the new region to be added
can be coalesced with existing regions. The check stops if the two
regions are adjecent but their flags do not match. However, it is
possible that the newly added region might be adjacent with the next
existing region and with matching flags. Check for this possibility by
not breaking out of the loop.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The lmb_fix_over_lap_regions() function is called if the added region
overlaps with an existing region. The function then fixes the overlap
and removes the redundant region. However, it makes certain
assumptions. One assumption is that the overlap would not encompass
the existing region. Another assumption is that the overlap only
occurs between two regions -- the scenario of the added region
overlapping multiple existing regions is not being handled. Handle
these cases by instead calling lmb_resize_regions(). Also remove the
now superfluous lmb_fix_over_lap_regions().
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The logic used in lmb_alloc() takes into consideration the existing
reserved regions, and ensures that the allocated region does not
overlap with any existing allocated regions. The lmb_reserve()
function is not doing any such checks -- the requested region might
overlap with an existing region. This also shows up with
lmb_alloc_addr() as this function ends up calling lmb_reserve().
Add a function which checks if the region requested is overlapping
with an existing reserved region, and allow for the reservation to
happen only if both the regions have LMB_NONE flag, which allows
re-requesting of the region. In any other scenario of an overlap, have
lmb_reserve() return -EEXIST, implying that the requested region is
already reserved.
Add corresponding test cases which check for overlapping reservation
requests made through lmb_reserve() and lmb_alloc_addr(). And while
here, fix some of the comments in the test function being touched.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If we try to enable a gate clock that doesn't exist, we used to just
fail silently. This may make sense for early bringup of some core
peripherals that we know are already enabled, but it only makes
debugging missing clocks more difficult.
Bubble up errors now that qcom_gate_clk_en() can return an error code to
catch any still-missing clocks and make it easier to find missing ones
as more complicated peripherals are enabled.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250314-sc7280-more-clocks-v1-1-ead54487c38e@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Most MSM8916 devices shipped without PSCI support. The history is quite
nuanced (a good overview can be found in [1]), but the end result is
that the upstream DTs for this SoC pretend that PSCI exists, and it's
expected that the bootloader handles the case where it doesn't. This is
codified by the de-facto bootloader for MSM8916 devices, lk2nd [2].
So we handle it here by deleting the /psci node if we detect the absence
of PSCI. We need to do this early to ensure sysreset works correctly,
since the PSCI firmware driver is PRE_RELOC and binds the PSCI sysreset
driver.
Additionally, show_psci_version is updated to check that PSCI exists.
Currently this banner outputs "PSCI: 65535.65535" on devices without
PSCI support, which isn't very useful :)
[1]: https://github.com/msm8916-mainline/linux/issues/388
[2]: https://github.com/msm8916-mainline/lk2nd/blob/8183ea2/lk2nd/smp/spin-table/spin-table.c#L237
Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250127-qcom-handle-absent-psci-v1-1-e762f2db938c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
qcom_parse_memory is updated to return a -ENODATA error if the passed
FDT does not contain a /memory node, or that node is incomplete (size=0)
board_fdt_blob_setup first tries to call qcom_parse_memory with the
internal FDT (if present+valid). If that fails, it tries again with the
external FDT (again, if present+valid).
When booting with an internal FDT from upstream, it's likely that this
change results in a slight performance hit, since virtually all upstream
qcom DTs lack a fully specified memory node. The impact should be
negligible, though.
qcom_parse_memory was given a detailed docstring adapted from Caleb's
original commit message that introduced the function.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250123-qcom-parse-memory-updates-v3-1-c5332b81ea9f@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.
Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-5-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
This fails on samus_tpl as there is no 'net' command.
=> net list
Unknown command 'net' - try 'help' !
Fix it by adding a condition for the test.
Add a blank line to keep pylint happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.
Add a section which lists the modules loaded as well as those not
found.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have a shorter name, we don't need this sort of thing.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android
We know this is U-Boot so the prefix serves no purpose other than to
make things longer and harder to read. Drop it and rename the files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android / test_dfu
This fixture name is quite long and results in lots of verbose code.
We know this is U-Boot so the 'u_boot_' part is not necessary.
But it is also a bit of a misnomer, since it provides access to all the
information available to tests. It is not just the console.
It would be too confusing to use con as it would be confused with
config and it is probably too short.
So shorten it to 'ubman'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/CAFLszTgPa4aT_J9h9pqeTtLCVn4x2JvLWRcWRD8NaN3uoSAtyA@mail.gmail.com/
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
The Cadence NAND is a configurable mtd raw block which
supports multiple options for chipsets, clocking and reset structure, and
feature list.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.
It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.
Link: https://lore.kernel.org/u-boot/20250129-rockchip-pinctrl-const-v1-0-450ccdadfa7e@cherry.de/
Link: https://lore.kernel.org/u-boot/20250130133646.2177194-1-andre.przywara@arm.com/
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.
The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).
The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.
Due to the above ignore EFI for now and fix it later once we have the
rest in place.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.
This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
- Check return value of fdt_getprop for NULL.
- Return -EFAULT if 'algo' property is missing.
- Prevent NULL pointer dereference in strcmp."
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.
Fixes: 9b0b5648d6 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
While the code was removed in commit 3766a249a3 ("fs: drop reiserfs")
this reference in the Makefile was missed. Remove it now.
Fixes: 3766a249a3 ("fs: drop reiserfs")
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.
This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.
Signed-off-by: Marek Vasut <marex@denx.de>
On i.MX8M SoCs, the /firmware/optee Devicetree node is created just before
booting the OS when OP-TEE is found running. If the node already exists,
this results in an error, which prevents the OS to boot:
Could not create optee node.
ERROR: system-specific fdt fixup failed: FDT_ERR_EXISTS
- must RESET the board to recover.
failed to process device tree
On the i.MX8M systems where CONFIG_OF_SYSTEM_SETUP is defined, the
ft_add_optee_node() function is called before booting the OS. It will
create the OP-TEE Devicetree node and populate it with reserved memory
informations gathered at runtime.
On on most i.MX8M systems the Devicetree is built with an optee node if
CONFIG_OPTEE is defined. This node is indeed necessary for commands and
drivers communicating with OP-TEE, even before attempting OS boot.
The aforementioned issue can happen on the Compulab IOT-GATE-iMX8, which is
the only in-tree i.MX8M system where both CONFIG_OPTEE and
CONFIG_OF_SYSTEM_SETUP are defined (see the imx8mm-cl-iot-gate*
defconfigs).
Deal with an existing optee node gracefully at runtime to fix this issue.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tim Harvey <tharvey@gateworks.com>
When "fdtfile" is not set, use the "variant" environment variable to
select the correct DTB.
Apalis/Colibri iMX6 V1.2 replaced the STMPE811 ADC/Touch controller
which is EOL with the TLA2024 ADC and AD7879 touch controller. They thus
require a different DTB, which we can easily select with the variant env
variable.
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Apalis/Colibri iMX6 V1.2 will replace the STMPE811 ADC/Touch controller
which is EOL by the TLA2024 ADC and AD7879 touch controller.
To support this new version, we detect the presence of the TLA2024
during boot and set a new environment variable named "variant". This
will allow us and users to select the correct DT easily.
By probing via I2C we have a robust detection method instead of relying
on the existing "board_rev" environment variable which is set by the
config block. Users can use "variant" in their DT selection and do not
have to map the board revision to a device tree.
"variant" environment variable behaviour:
* Empty or absent for all versions below v1.2 (STMPE811)
* "-v1.2" for all versions starting from v1.2 (TLA2024 + AD7879)
Usage example:
setenv fdtfile imx6q-apalis${variant}-${fdt_board}.dtb
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Guard the inclusion of tee.bin with the CONFIG_OPTEE symbol to fix the
following build warning:
CHECK u-boot-container.cfgout
WARNING './tee.bin' not found, resulting binary may be not-functional
BINMAN .binman_stamp
OFCHK .config
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Due to the use of the Tegra DC backlight feature by the HTC ONE X,
backlight requests MUST NOT be made during probe or earlier. This is
because it creates a loop, as the backlight is a DC child.
To mitigate this issue, backlight requests can be made later, once the
backlight is actively used.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Video operations are not required by the Tegra Display Controller
and should therefore be removed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
If device uses native Tegra DSI or HDMI, DC clock MUST use the same
parent as DSI/HDMI clock uses. Hence remove need in device tree
configuration and satisfy this condition by default.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Use OF graph as a main bridge/panel source, preserving
backwards compatibility with phandle implementation.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Rework existing DC driver configuration to support bridges (both external
and internal DSI and HDMI controllers) and align video devices chain logic
with Linux implementation. Additionally, this should improve communication
between DC and internal DSI/HDMI controllers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra platforms feature native HDMI support. Implement a driver to enable
functionality. This driver will initially support Tegra 2 and 3, with
future extensibility.
Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Introduce a simplified HOST1X driver, limited to the basic clock and reset
initialization of the bus.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
VPL has the same needs as TPL in situations where the stack is at the
top of SRAM. Add an option for this and implement it for arm
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have the same option for SPL and TPL, simplify the logic for
determining the initial stack.
Note that this changes behaviour as current SPL_STACK is a fallback for
TPL. However, that was likely unintended and can be handled with Kconfig
defaults if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Tom Rini <trini@konsulko.com>
At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.
Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]
The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.
Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.
Move the option just above TPL_STACK which depends on it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.
This removes the default empty implementations of both from mach-sc5xx.
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Update the DDR Configurations for AM62Px SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62Ax SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62x LP SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62x SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM64x EVM according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112
- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the description and add a link to documentation.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add optional argument git_branch to build_from_git. The new argument
allows specifying which branch of the repo to use.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Greg Malysa <malysagreg@gmail.com> says:
This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.
Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.
TEST: U-Boot logo, version, log output and the U-Boot shell is visible
on the display device.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
prefetchable 32-bit BARs, while PCIe devices are not allowed to have
32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
typically the prefetch MMIO window is also 64-bit and placed above
4GiB, as it's the case on qemu sbsa-ref.
Currently the U-Boot code assumes that prefetchable BARs are
64-bit BARs and always tries to assign them into the prefetch
MMIO window.
When a 32-bit BAR is marked as prefetch, but the prefetch area is
not within the first 4GiB of the address space, then downgrade the
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Since commit 948da7773e ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.
So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).
It's more needed to call debug_uart_init() in stm32mp1/cpu.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable the following configs:
* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables support for the STM32 PWM devices
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The value written to the RFLR register includes the length of the CRC
data at the end of each Ethernet frame. So we need to increase the value
written to this register to ensure that we can receive full size frames.
While we're here we can also copy the improved comment from the Linux
kernel.
Fixes: 8ae51b6f32 ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Following on from commit 9a699a0a0d ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
These functions are no longer necessary, remove them.
The struct bb_miiphy_bus is no longer necessary either,
remove it as well.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes: 08eefb5e79 ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes: 079eaca6e7 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.
Fixes: cbb69c2faf ("net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Remove the priv member from struct bb_miiphy_bus and its assignment
from drivers. This turns struct bb_miiphy_bus int struct mii_dev
wrapper, to be cleaned up next.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Access to MDIO bus private data can be provided by both
struct mii_dev .priv member and struct bb_miiphy_bus .priv
member, use the former directly and remove .priv from the
later. Drop unused bb_miiphy_getbus(). This removes any
dependency on struct bb_miiphy_bus from the miiphybb code,
except for helper functions which will be removed later.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
The access to struct bb_miiphy_bus_ops via ops pointer in
struct bb_miiphy_bus is not necessary with wrappers added
in previous patch. Pass the ops pointer directly to both
bb_miiphy_read() and bb_miiphy_write() functions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Do not call bb_miiphy_read()/bb_miiphy_write() accessors directly
in drivers, instead call them through wrapper functions. Those are
meant to be used as function parameter adaptation layer between
struct mii_dev callback function parameters and what the miiphybb
does expect and will soon expect. This is a preparatory patch, no
functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Move miiphybb operations into separate struct bb_miiphy_bus_ops
structure, add pointer to struct bb_miiphy_bus_ops into the base
struct bb_miiphy_bus and access the ops through this pointer in
miiphybb generic code. The variable reshuffling in miiphybb.c
cannot be easily avoided.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.
Fixes: e4aea57fa7 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
The Renesas R-Car Gen3 Salvator-X(S) boards contain USB micro-B port
on which the USBHS controller is accessible. Enable the USBHS UDC
driver to make this port usable, enable UMS USB Mass Storage support
to make it possible to expose block devices as USB Mass Storage to
Host PC.
The USB VID/PID is picked from R-Car Series, 3rd Generation reference
manual Rev.2.00 chapter 19.2.8 USB download mode, and matches R-Car H3
BootROM USB download mode VID/PID.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
For the Tegra 2, similar to other Tegra SoC generations, 'bootph-all'
must be applied to both display controllers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
While PLLD/D2 is the nominal parent clock, all derived clocks are generated
from its single output, plld_out0, which is PLLD/D2 divided by two. Direct
use of PLLD/D2 is absent in peripheral clock configurations. Therefore,
clock derivation formulas must take in account this division.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Older EDID timing algorithms relied solely on detailed timings, typically
optimized for a display's native resolution. This caused issues with newer
4K panels on older hardware, which couldn't handle those high resolutions.
To address this, the algorithm now also considers standard timings, offering
lower, compatible resolutions. Future improvements may include checking
established timings for even broader compatibility.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of
internal memory that can be supplemented with a microSDXC card giving up to
128 GB of additional storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Using HTTPS without root (CA) certificates is a security issue. Print a
warning in this case. Also, when certificate verification fail, print
an additional message because "HTTP client error 4" is not very
informative (4 is HTTPC_RESULT_ERR_CLOSED).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of relying on some build time configuration to determine if
server certificates need to be checked against CA certificates, do it
based on the availability of such certificates. If no CA is configured
then no check can succeed; on the other hand if we have CA certs then
we should not ignore them. It is always possible to remove the CA certs
(via 'wget cacert 0 0') to force an HTTPS download that would fail
certificate validation.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Some boards use a CONFIG option to specify the value of this variable.
This is normally handled by efi_get_distro_fdt_name() but in the case
of sunxi this does not work, since 'soc' is sunxi, but the files are
in the allwinner directory.
Provide a work-around for this particular case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Pull request efi-next-20250310
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25043
UEFI:
* Clean up usage of structure jmp_buf_data
* Refactor EFI network protocol implementation for future support
of multiple network interfaces.
- efi_net: let efi_net_set_dp properly update the device path
- expose symbols to be used by the EFI network stack
- efi_setup: Add efi_start_obj_list() to efi_setup.c
- efi_net: Add efi_net_do_start() to efi_net.c
- efi_device_path: Pass net udevice as argument
- efi_net: Add device path cache
- efi_net: Add dhcp cache
- efi_net: Add support for multiple efi_net_obj
Others:
* legacy-net: wget: fix wget_info handling after new tcp legacy stack
* lib: correct description of CONFIG_SYS_FDT_PAD
* Separate setjmp.h into architecture dependent and independent parts
- sandbox: remove linux/types.h dependency in setjmp.h
- arm: include asm-generic/int-ll64.h in setjmp.h
- common: clean up setjmp.h
* arm: use type jmp_buf instead of struct jmp_buf_data
Enable support for environment in eMMC on STM32MP13xx DHCOR SoM,
in addition to existing support for environment in SPI NOR. The
environment size is the same, except in case the environment is
placed in eMMC, it is stored at the end of eMMC BOOT partitions
in the last 32 sectors of each eMMC HW BOOT partition.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Move stm32mp15_dhcom_basic_defconfig into stm32mp15_dhcom_basic.config.
Retain legacy stm32mp15_dhcom_basic_defconfig as multi-config for all
DH STM32MP15xx DHCOM based boards. Move stm32mp15_dhsor_basic_defconfig
into stm32mp15_dhsor_basic.config. Retain stm32mp15_dhsor_basic_defconfig
as multi-config for all DH STM32MP15xx DHCOR based boards.
Introduce separate stm32mp15_dhcom_drc02_basic_defconfig,
stm32mp15_dhcom_pdk2_basic_defconfig, stm32mp15_dhcom_picoitx_basic_defconfig
for each STM32MP15xx DHCOM based board and separate
stm32mp15_dhcor_avenger96_basic_defconfig,
stm32mp15_dhcor_drc_compact_basic_defconfig,
stm32mp15_dhcor_testbench_basic_defconfig for each
STM32MP15xx DHCOR based board, to make build for those boards easier.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The environment is missing closing quotes for string variable, but the
variable is empty on this system, remove the CONFIG_BOOTCOUNT_ALTBOOTCMD
assignment entirely.
Fixes: 940135eea5 ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The removal of the "st,button1" and "st,led1" compatibles has emptied
the board_late_init(), so let's remove it along with the configuration
that allows its invocation.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
It is pointless to use the custom compatible "st,led1" when
stm32746g-eval.dts and stm32f769-disco.dts already contain the
"gpio-leds" compatible, which is specifically used for GPIO LEDs
management.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
It is pointless to use the custom compatible "st,button1" when
stm32746g-eval.dts and stm32f769-disco.dts already contain the
"gpio-keys" compatible, which is specifically used for button
management.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
LDO2 is expansion connector supply on STM32MP13xx DHCOR DHSBC rev.200.
LDO5 is carrier board supply on STM32MP13xx DHCOR DHSBC rev.200. Keep
both regulators always enabled to make sure both the carrier board and
the expansion connector is always powered on and supplied with correct
voltage.
Describe ST33TPHF2XSPI TPM 2.0 chip reset lines.
This is a port of Linux kernel patch posted at:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20250302152605.54792-1-marex@denx.de/
This change shall be removed when the Linux kernel DT change lands
and Linux kernel DTs get synchronized with U-Boot DTs.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
CONFIG_SYS_FDT_PAD defines the number of unused bytes added to a
device-tree and not the total size.
Fixes: 40ed7be4af ("Convert CONFIG_SYS_FDT_PAD to Kconfig")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Structure jmp_buf_data provides the underlying format of jmp_buf, which
we actually don't care about. Clean up existing code to use the standard
jmp_buf type. This introduces no functional change.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Separate setjmp.h into an architecture independent part and an architecture
specific part. This simplifies moving from using struct jmp_buf_data
directly to using type jmp_buf in our code which is the C compliant way.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add support for multiple efi_net_obj structs in efi_net.c. This comes
in preparation for an EFI network driver supporting multiple network
interfaces. For now the EFI network stack still registers a single ethernet
udevice as an EFI network device even if multiple are present, namely
the one that was the current device at the moment of EFI initialization.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
In preparation to support mutiple efi net udevices. Add a device path
cache to support device paths from multiple ethernet udevices.
The device paths can be added to the cache before EFI gets initialized and
the protocols get installed.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
In preparation to support multiple EFI net objects, support
constructing device paths using an ethernet device different
than the default. Add a udevice argument to the device path
generation, and keep the callsites with eth_get_dev() to
preserve existing functionality.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
This gets called each time a payload is to get executed by bootefi.
For now this only updates the PXE IP address.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
The coomand bootefi calls efi_init_obj_list to do the efi set up
before launching an .efi payload, but efi_init_obj_list is called
only once. There are some initializations which depend on the
environment and should be done each time a payload gets launched and
not only once. A motivation for this changes is the following order
of events:
1. Launch an EFI application (e.g. bootefi hello)
2. Change the ip address
3. Launch another application which uses the pxe protocol
As the EFI pxe protocol was initialized when the handles
for efi net were created in 1., the ip was hardcoded there.
In this example, another possibility would be to make a callback for ip
address changes to go all the way up to efi_net.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
The following symbols are exposed:
- efi_reinstall_protocol_interface
This is done so that the device path protocol interface
of the network device can be changed internally by u-boot
when a new bootfile gets downloaded.
- eth_set_dev
To support multiple network udevices
- efi_close_event
This comes in preparation to support unregistering
an EFI network device from the EFI network stack when
the underlying U-boot device gets removed
- efi_[dis]connect_controller
The EFI network driver uses ConnectController to add a
NIC to the EFI network stack.
- efi_uninstall_protocol_interface
connect_controler for the efi network driver can install
protocols, which need to be uninstalled in disconnect_controller
- EFI_SIMPLE_NETWORK_PROTOCOL_GUID
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Check wget_info->buffer_size for overflow and do not clean the wget_info struct
on failure, let the owner of the struct handle the error. The latter is necesary
, e.g., for when a request fails because the provided buffer was too small.
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
This commit fixes an use after free introduced in Commit e55a4acb54
(" efi_loader: net: set EFI bootdevice device path to HTTP when loaded
from wget"). The logic in efi_net_set_dp is reworked so that when the
function is invoked it not only changes the value of the static variable
net_dp (this is how the function was implemented in e55a4acb54) but also
updates the protocol interface of the device path protocol in case efi
has started.
Fixes: e55a4acb54 ("efi_loader: net: set EFI bootdevice device path to HTTP when loaded from wget")
Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Add a simple and transparent LVDS de/encoder driver with a powerdown
gpio and a power supply.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hide video bridge functions behind config condition and add inline
fallbacks to avoid erroring out when using header without config
enabled.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add get_display_timing ops for internal bridges linked to
panels that do not support EDID (MIPI-DSI panels for example)
or have EDID not routed.
Tested-by: Dang Huynh <danct12@riseup.net> (PineTab 2)
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The existing memory layout places the bloblist at 0xb000 and the fdt at
0x100, resulting in a 0xaf00 size constraint for the fdt. This constraint
has been reached. Lets modify the layout by moving the bloblist to 0x100,
device tree to 0x1000 and placing early memory allocation after pre-console
buffer at 0xf4000. This should guarantee sufficient memory allocation for
future expansion.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Gabriel Dalimonte <gabriel.dalimonte@gmail.com> says:
This series adds support for file renaming to EFI_FILE_PROTOCOL.SetInfo().
One of the use cases for renaming in EFI is to facilitate boot loader
boot counting.
No existing filesystems in U-Boot currently include file renaming,
resulting in support for renaming at the filesystem level and a
concrete implementation for the FAT filesystem.
Link: https://lore.kernel.org/r/20250217182648.31294-1-gabriel.dalimonte@gmail.com
Following the UEFI specification. The specification did not seem to
delineate if file_name was explicitly a file name only, or could
include paths to move the file to a different directory. The more
generous interpretation of supporting paths was selected.
Signed-off-by: Gabriel Dalimonte <gabriel.dalimonte@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In order to support renaming via SetInfo(), path must allow for longer
values than what was originally present when file_handle was allocated.
Signed-off-by: Gabriel Dalimonte <gabriel.dalimonte@gmail.com>
POSIX filesystem functions that create or remove directory entries contain
text along the lines of "[function] shall mark for update the last data
modification and last file status change timestamps of the parent
directory of each file." [1][2][3] The common theme is these timestamp
updates occur when a directory entry is added or removed. The
create_link() and delete_dentry_link() functions have been changed to
update the modification timestamp on the directory where the direntry
change occurs. This differs slightly from Linux in the case of rename(),
where Linux will not update `new_path`'s parent directory's timestamp if
it is replacing an existing file. (via `vfat_add_entry` [4])
The timestamps are not updated if the build configuration does not support
RTCs. This is an effort to minimize introducing erratic timestamps where
they would go from [current date] -> 2000-01-01 (error timestamp in the
FAT driver). I would assume an unchanged timestamp would be more valuable
than a default timestamp in these cases.
[1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/rename.html
[2] https://pubs.opengroup.org/onlinepubs/9799919799/functions/unlink.html
[3] https://pubs.opengroup.org/onlinepubs/9799919799/functions/open.html
[4] https://elixir.bootlin.com/linux/v6.12.6/source/fs/fat/namei_vfat.c#L682
Signed-off-by: Gabriel Dalimonte <gabriel.dalimonte@gmail.com>
The implementation roughly follows the POSIX specification for
rename() [1]. The ordering of operations attempting to minimize the chance
for data loss in unexpected circumstances.
The 'mv' command was implemented as a front end for the rename operation
as that is what most users are likely familiar with in terms of behavior.
The 'FAT_RENAME' Kconfig option was added to prevent code size increase on
size-oriented builds like SPL.
[1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/rename.html
Signed-off-by: Gabriel Dalimonte <gabriel.dalimonte@gmail.com>
The create_link() code was previously duplicated in two existing functions.
The two functions will be used in a future commit to achieve renaming.
Signed-off-by: Gabriel Dalimonte <gabriel.dalimonte@gmail.com>
Add a helper to avoid needing to use a list within a list for this
simple case.
Update existing users of runpipe() to use this where possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file has a lot of warnings. Before adding any more features, fix
those which are straightforward to resolve.
Signed-off-by: Simon Glass <sjg@chromium.org>
Throwing an Exception is not very friendly since it is the top-level
class of all exceptions. Declare a new class instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Ensure `free_ctx` is called in both error and success paths.
- Fix memory leak in `ctx.signature` when `do_add` fails."
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
The current code has a problematic corner case with formar "%c" and
0 as parameter. The proper zero byte is being emitted into digit buffer
but the final copy into outstr expects null-terminated string and doesn't
copy the required \0 byte. This has lead to malformed TFTP packets, refer
to tftp_send() which relies on %c to generate multiple zero-terminated
strings in one buffer.
Introduce a variable to force the copy of one character in this case.
The new behaviour is consistent with non-tiny implementation.
Reported-by: Chintan Vankar <c-vankar@ti.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Siddharth Vadapalli <s-vadapalli@ti.com> says:
This series enables configs for USB DFU boot, USB DFU flash and USB Mass
Storage command for J784S4. The device-tree changes required for enabling
these features will be posted as patches to Linux device-tree mailing lists
and will eventually make it to U-Boot via DT Sync.
Link: https://lore.kernel.org/r/20250218094950.2542006-1-s-vadapalli@ti.com
Enable support for USB DFU boot via USB0 instance of USB on J784S4 SoC
which is a Cadence USB Controller. Additionally, enable support for USB
DFU flash and USB Mass Storage (UMS) command. While at it, sync with
savedefconfig.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The USB0 instance of USB on J784S4 SoC is a Cadence USB Controller and
supports USB DFU boot. Enable support for it.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Enable ESM configs. ESMs are a prerequisite to enable
watchdog reset functionality. The ESM aka error signalling module
is primarily responsible for sensing the watchdog reset event.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Initialize MCU & MAIN Domain ESMs as a prerequisite to enable
watchdog reset functionality. The ESM aka error signalling module
is primarily responsible for sensing the watchdog reset event.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
rsa_verify_openssl() is used in lib/rsa/rsa-verify.c to authenticate data
when building host tools.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Use preload_check_sign to authenticate the generated image when testing the
preload signature in testPreLoad().
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
pre-load related config options are enabled to have support of it in host
tools.
'CONFIG_FIT_SIGNATURE=y' is being automatically removed since it is
selected by CONFIG_IMAGE_PRE_LOAD_SIG.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
preload_check_sign is added so that it can be used to authenticate images
signed with the pre-load signature supported by binman and U-Boot.
It could also be used to test the signature in binman tests signing
images with the pre-load.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Add an empty inline declaration when compiling tools for a host where
unmap_sysmem() is not defined.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Baocheng Su <baocheng.su@siemens.com> says:
This introduces a sysinfo driver which also permits SMBIOS support.
The first 10 patches of v2 have already been applied. The remaining is
solely the sysinfo driver. To maintain consistency and ease of searching
through the history, the series title remains unchanged.
Link: https://lore.kernel.org/r/20250218023614.52574-1-baocheng.su@siemens.com
Drop the info structure parsing of the board in favor of our new sysinfo
driver to avoid code duplication.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
[Jan: rebasing, split-up, cleanup]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This brings a sysinfo driver and DT entry for the IOT2050 board series.
It translates the board information passed from SE-Boot to SPL into
values that can be retrieved via the sysinfo API. Will is already used
to fill the SMBIOS table when booting via EFI.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
[Jan: split-off as separate patch, cleanup]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Add a new field SYSID_BOARD_RAM_SIZE_MB to sysinfo structure to store
the size of RAM in MB. dram_init can use this field to get the RAM size
via sysinfo driver.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
This commit introduces a new API to the sysinfo module, allowing access
to data elements. This is particularly useful for handling data with
multiple instances, such as MAC addresses.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
During dma memcpy, bcdma descriptor gets allocated for each
transaction and not freed after completion of that transaction.
So, avoid the memory allocation for every transaction.
Add one descriptor per dma device and allocate it once in
resource setup. This descriptor can now be used for all
dma memcpy transactions optimally.
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
serial_out_dynamic() takes a u8* addr and uses it for 8-bit or 32-bit
accesses, depending on the value of plat->reg_width. This results in a
pointer type mismatch that the compiler may even turn into an error:
drivers/serial/ns16550.c: In function ‘serial_out_dynamic’:
drivers/serial/ns16550.c:115:42: error: passing argument 1 of ‘out_be32’ from incompatible pointer type [-Wincompatible-pointer-types]
115 | out_be32(addr, value);
| ^~~~
| |
| u8 * {aka unsigned char *}
This error was observed on PowerPC.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
If there is an unallocated memory area before the last, filling parting
the size calculation for MTD_SIZE_REMAINING does not take this hole
into account.
Fix this by calculating the remaining size just based on total size
and partition offset.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Rename the variants of env_mmc_load() for redundant and non-redundant
environment to env_mmc_load_redundant() and env_mmc_load_singular()
respectively and convert the env_mmc_load() implementation to use of
if (IS_ENABLED(...)). As a result, drop __maybe_unused from
mmc_env_is_redundant_in_both_boot_hwparts().
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Introduce a new function mmc_env_is_redundant_in_both_boot_hwparts()
which replaces IS_ENABLED(ENV_MMC_HWPART_REDUND) and internally does
almost the same check as the macro which assigned ENV_MMC_HWPART_REDUND
did, and call it in place of IS_ENABLED(ENV_MMC_HWPART_REDUND).
The difference compared to IS_ENABLED(ENV_MMC_HWPART_REDUND) is
in the last conditional, which does not do plain macro compare
(CONFIG_ENV_OFFSET == CONFIG_ENV_OFFSET_REDUND), but instead does
mmc_offset(mmc, 0) == mmc_offset(mmc, 1). If OF_CONTROL is not
in use, this gets optimized back to original macro compare, but
if OF_CONTROL is in use, this also takes into account the DT
properties u-boot,mmc-env-offset and u-boot,mmc-env-offset-redundant.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/24876
- Convert imx6q-lxr and imxrt1050 to OF_UPSTREAM.
- Fix potential memory leak on ]imx/imx8/imx8m]image.
- Restrict DDR_SI_TEST to only Siemens Capricorn board.
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD on Data Modul and DH imx8m boards.
The imx6q-lxr devicetree has landed in kernel 6.13.
Switch to OF_UPSTREAM to make use of the upstream devicetree.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Move content of dh_imx6_defconfig into dh_imx6.config. Retain legacy
dh_imx6_defconfig as multi-config for all DH i.MX6 DHSOM based boards.
Introduce separate imx6_dhcom_drc02_defconfig, imx6_dhcom_pdk2_defconfig
and imx6_dhcom_picoitx_defconfig for each i.MX6 DHSOM based board, to
make build for those boards easier. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Deduplicate the config files again, move CONFIG_BOOTCOUNT_ALTBOOTCMD
into common imx8mp_dhsom.config .
Fixes: 940135eea5 ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Deduplicate the config files again, move CONFIG_BOOTCOUNT_ALTBOOTCMD
into common imx8m_data_modul.config .
Fixes: 940135eea5 ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
The environment is missing quotes for string variable, add them.
Fixes: 940135eea5 ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Dynamic memory, referenced by 'line', is allocated at imx8mimage.c:187
by calling function 'getline' and lost at imx8mimage.c:210.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Dynamic memory, referenced by 'line', is allocated at imx8image.c:270
by calling function 'getline' and lost at imx8image.c:294.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Dynamic memory, referenced by 'line', is allocated at imximage.c:761
by calling function 'getline' and lost at imximage.c:793.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
The DDR_SI_TEST config option is only relevant to the i.MX8 Capricorn
board.
Make DDR_SI_TEST depend on DDR_SI_TEST so that it does not show up
on other targets.
Signed-off-by: Liya Huang <1425075683@qq.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The device tree for imxrt1050 is now
available in the /dts/upstream directory.
Migrate board to use OF_UPSTREAM.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
The struct bb_miiphy_bus embeds struct struct mii_dev, which
already contains one copy of name field. Drop the duplicate
top level copy of name field.
The a38x code does static assignment of disparate names, use
snprintf(...) to fill in matching name in probe to avoid any
breakage.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Replace the name based look up in bb_miiphy_getbus() with trivial
container_of() call. This works because the struct bb_miiphy_bus
always embeds the matching struct mii_dev . This also makes the
code much simpler and more efficient.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers to allocate and free
struct bb_miiphy_bus. Make struct bb_miiphy_bus wrap struct mii_dev, which
will become useful later in bb_miiphy_bus accessors, which would be able
to access struct bb_miiphy_bus using container_of, even if the PHY stack
only passes in the inner struct mii_dev .
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Pull the bbmiiphy initialization code from designware_eth_probe() into
dedicated function, dw_bb_mdio_init(), just like all the other MDIO
initialization functions.
Keep check for "snps,bitbang-mii" in the designware_eth_probe(), so the
driver can initialize this MDIO only in case the property is present,
and initialize regular DW MDIO in case it is not present.
The dw_bb_mdio_init() allocates its own MDIO instance, because thus far
code gated behind "snps,bitbang-mii" did depend on allocation of MDIO bus
by the other two MDIO bus options and then rewrote the newly allocated
MDIO bus callbacks, which is wrong, instead allocate proper MDIO bus with
the correct callbacks outright.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
The .init callback is not called by any function, drop it.
There are no more users of the init callback, drop the entire
mechanism.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
All the resources needed by this .init callback should already
be available by the time probe function runs, simply call the
init callback directly and set the bb_miiphy init callback to
NULL. This shouldn't break anything on this hardware, but would
be nice if someone could double-check and test that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This function allows updating bootloader from u-boot
on production devices without need in host PC.
Be aware! It works only with re-crypt BCT and AES
encrypted devices.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 1536x2048
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add support for National Semiconductor/TI LP8550/1/2/3/5/6/7
LED Backlight. Driver is based on Linux version but is
reworked and optimised for U-Boot DM framework. Currently
only register driven backlight control is supported, PWM
driver backlight control may be added later if needed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra 124 is fully compatible with existing Tegra pincontrol
driver, but it needs a specific MIPI PAD control pinconfig.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Parametrize DSI configuration by passing DC source pipe. This
should resolve possible failure if second DC is used with DSI
for some reason.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Calculate packet parameters for video mode same way it is done or
command mode, by halving timings plugged into equations.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Since pinmux driver now is available for Tegra 2, these parts may
be removed from here and defined either in device tree or in
the device board files.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Saved environments lead to inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Saved environments cause inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816
Please pull the SoCFPGA changes for next from u-boot-socfpga, containing
boot support for the Altera SoCFPGA Agilex 5 platform in U-Boot. The
changes include:
1. Board-specific configurations and setup required to enable Agilex 5
operation in U-Boot.
2. Integration of cache coherency unit (CCU) initialization routine,
including CCU conguration in DT.
3. Clock, firewall (configured in DT), SMMU, low level initialization
specific to Agilex 5.
4. Integration of memory initialization routine, including DDR setup.
This patch set has been tested on Agilex 5 devkit with QSPI boot
(UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).
Automatically start watchdog timer for Agilex5. This
configuration is enabled by default in the Kconfig,
hence removing this configuration from Agilex5 defconfig.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Add board_boot_order() to retrieve the list of boot devices from
spl-boot-order property in device tree. This board_boot_order()
would be used for all Intel SOC64 devices.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Introduce a new symbol in the beginning of .data section in
the common ARMv8 linker script and use that as a reference
for data save and restore.
Previously, the code would rely on calculating the start of
the .data section address via data size, however, we observed
that the data size does not really reflect the SPL mapped
addresses.
In our case, the binman_sym section size was not included in
the data size, which will result in a wrong address for the
.data start section, which prevents us from properly saving
and restoring SPL data.
This approach skips the calculation for the starting address
of the .data section, and instead just defines the beginning
address of the .data section and calling the symbol as needed,
in which we think as a simpler and much more robust method.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Allow non-secure accesses only with SMMU peripherals. This would protect
the content in DDR secure region from accidentally modified by SMMU
peripherals.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
set/way instructions "dc cisw" which is used by the "dcache flush" command
only flushing CPU data caches from L1 -> L2 -> L3 to system memory cache in
cache coherency unit, hence this patch enables data flush from system
memory cache of CCU into DDR memory.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
These firewall configure settings are needed to disable firewall on
respective hardware component so both secure and non-secure transactions
are allowed.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
These configuration settings are required to enable cache maintenance and
access between initiators and targets.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Agilex5 supports both HPS handoff data and DDR handoff data.
Existing HPS handoff functions are restructured to support both existing
devices and Agilex5 device.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Status polling is used instead of using interrupt controller for Agilex5.
Disabling GICV3 in Agilex5 target, as well as disabling GICV2 enabled by
default for all SoCFPGA devices.
All the other SoCFPGA devices uses GICV2, thus enabling GICV2 in each of
the devices.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
There are 5 L4 watchdogs and one SDM triggered warm reset bit
in Agilex5 reset manager "stat" register where bit 16:20 for L4
watchdogs. Assigning value 1 to these bits in the register address
will initiate SDM to trigger warm reset.
Introducing new warm reset mask for Agilex5 to trigger warm reset
to all five L4 watchdogs.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
PLL frequency would overshoot from the original target in
synchronous mode during low VCC voltage condition.
To resolve this issue, PLL is set to run on asynchronous mode
instead of enabling synchronous mode in the clock driver.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Some customers prefer to minimize the use of external oscillators,
especially when using the FPGA first configuration mode.
By enabling the configuration of the HPS internal oscillator as
the boot_clk source instead of the default external oscillator,
(HPS_OSC_CLK) in non-secure boot scenarios, this allows them
to eliminate the need for an additional oscillator device and
a dedicated HPS pin, simplifying board layout and routing.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Agilex5 retrieves its clock manager address via probing its own clock
driver model during SPL initialization.
Therefore, excluding Agilex5 from calling generic clock driver in misc
driver.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Initial creation of new system manager driver.
Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.
The base address of system manager can be retrieved
using DT framework through the System Manager driver.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
This reverts commit c8750efe02, reversing
changes made to 8c6cf8aeea.
Unfortunately these changes do not build on macOS hosts.
Signed-off-by: Tom Rini <trini@konsulko.com>
Recent versions of this module call time.perf_counter() so add a patch
for this also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
This merges a set of patches from myself and Simon Glass to resolve
various problems that the current version of pylint will report with our
codebase. After the problems are fixed, we update to the now current
version which is 3.3.4.
Memory region used by remote cores was set to non-cached region but
commit 7c9c6e1925 ("arm: mach-k3: Merge initial memory maps") makes
all memory region as cached, unified across K3 devices.
This causes inconsistency while booting remote cores on devices, due to
cache incoherency between remote core and boot code.
So to make this operation coherent, cache the address and len while
loading ELF program headers to memory and flush that region in the next
cycle of load.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Defining CONFIG_MT8512 is unnecessary as now board for mediatek
target can be changed in config.
Use CONFIG_TARGET_MT8512 to replace CONFIG_MT8512.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Not all MediaTek platforms needs u-boot-mtk.bin.
This patch will let u-boot generates u-boot-mtk.bin only if
CONFIG_MTK_BROM_HEADER_INFO is not empty.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Use preload_check_sign to authenticate the generated image when testing the
preload signature in testPreLoad().
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
pre-load related config options are enabled to have support of it in host
tools.
'CONFIG_FIT_SIGNATURE=y' is being automatically removed since it is
selected by CONFIG_IMAGE_PRE_LOAD_SIG.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
preload_check_sign is added so that it can be used to authenticate images
signed with the pre-load signature supported by binman and U-Boot.
It could also be used to test the signature in binman tests signing
images with the pre-load.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
Add an empty inline declaration when compiling tools for a host where
unmap_sysmem() is not defined.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
rsa_verify_openssl() is used in lib/rsa/rsa-verify.c to authenticate data
when building host tools.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
This newer pylint produces errors about variables possibly being used
before being set. Adjust the code to pass these checks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
With a newer pylint, we get a warning that 'br' could be used before
assignment. Fix this by declaring br first as an empty bytearray.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With a newer pylint we get a warning about how offset could be used
before assigned. This is because when the underlying filesystem wasn't
one that is supported we would have runtime test failures. Address this
by raise'ing an Exception if fs is not supported.
Signed-off-by: Tom Rini <trini@konsulko.com>
With a newer pylint version we get a warning about how mounted_test_fn
could be used before assignment. Evaluating the code, this can't happen
because we check for "not have_writable_fs_partition" and return before
moving to the part of the tests which use mounted_test_fn. However, we
should instead have this written so that we only try this part of the
test if have_writable_fs_partition is set, and this also fixes the
warning. As part of this we also move test_f and mounted_test_fn to the
section of code that already only does this if
have_writable_fs_partition is set.
Signed-off-by: Tom Rini <trini@konsulko.com>
When running a newer version of pylint it will complain that page_size
may be used before being assignment. Looking deeper what is going on is
that we could run in to the case where the regex we run for any of the
flash information fails but since we don't have a result, we don't check
it either. In the case of the rest of the numerical values we then have
some assignment (multiplying by some value) and so pylint doesn't
complain. Rework things to assert that each regex has a result and so
failure will stop the test and we won't have any use before assignment.
Signed-off-by: Tom Rini <trini@konsulko.com>
As AM57x uses overlays for display and camera interfaces, add support to
load DT overlay files to MMC boot.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
TI AM57x boards use a custom (though family common to TI boards) mechanism
for booting Linux. Add support to enable custom MMC boot as a default
option along with the distroboot approach.
Also, add supporting mmc boot environment variables which shall be used for
custom MMC boot
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Kernel commit 837833a724 ("environment: ti: Add get_fit_config command
to get FIT config string") introduced "get_fit_config" in ti_armv7_common.h
to mangle the fdtfile name when used to select a config node from the OE
made FIT image. However, the ti_armv7_common.h is common for both K3 and
AM57xx platforms. AM57xx platforms' fdtfile name does not have '/' and
"conf-" prefix so the setexpr command fails and boot hangs.
Override the get_fit_config in AM57x specific config header to get the
correct FIT config name.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Enable ENV_IS_IN_SPI_FLASH to read the environment from the SPI
flash when booting from it. The oftree, kernel and ramdisk sizes
are located in this environment and therefore required to boot
an initramfs.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Enable ENV_IS_IN_SPI_FLASH to read the environment from the SPI
flash when booting from it. The oftree, kernel and ramdisk sizes
are located in this environment and therefore required to boot
an initramfs.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The USB0 instance of USB on AM62 SoC when configured to operate in the
Gadget mode of operation can be used to mount an MMC/SD card on the USB
Host. Hence, enable support for the USB Mass Storage (ums) command.
Since this config fragment corresponds to USB DFU functionality which
configures the USB Controller in Gadget mode of operation, other SoCs
which include this fragment for DFU functionality can make use of the
USB MASS Storage functionality as well.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The USB0 instance of USB on J722S SoC is a Designware USB Controller with
the same glue layer (wrapper) as AM62 SoC. In order to support USB DFU boot
and USB DFU flash with USB0, enable the corresponding glue layer driver.
While at it, sync with savedefconfig.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The config fragment "am62x_a53_usbdfu.config" which adds USB DFU support
for AM62x SoC is applicable to the AM62Px SoC as well. Hence, include it
in "am62px_evm_a53_defconfig" in order to enable support for USB DFU
flash and boot. Remove those configs from "am62px_evm_a53_defconfig" which
are present in the "am62x_a53_usbdfu.config" config fragment that is being
included.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Disable configs which are not required for USB DFU functionality, in
order to allow reusing this fragment for AM62Px SoC.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Include the TI K3 DFU environment to support DFU Boot and DFU Flash.
Also add "usb" to the list of "boot_targets". While at it, add a newline
at the end of the file.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
The config fragment "am62x_a53_usbdfu.config" which adds USB DFU support
for AM62x SoC is applicable to the AM62Ax SoC as well. Hence, include it
in "am62ax_evm_a53_defconfig" in order to enable support for USB DFU flash
and boot.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
In previous commit, incoming standard passage is used by default
when initializing the bloblist, so explicitly BLOBLIST_PASSAGE is
no more needed.
Rename it as BLOBLIST_PASSAGE_MANDATORY to determine the behaviors
when an incoming transfer list does not exist or is invalid.
When it is selected, incoming standard passage is mandatory and
U-Boot will report an error when a valid incoming transfer list is
missing.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Refactor the xferlist to remove the relocating when bloblist passed
from the boot args.
Refactor bloblist init to use incoming standard passage by default
if a valid transfer list exists in the boot args.
For bloblist relocation, use the actual total size if it has a smaller
BLOBLIST_SIZE_RELOC.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The PCS exists only in GMAC1 and relates to SGMII interface and
is used to control the SGMII PHY.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
[trini: Adjust slightly for white space and to move 'start' to within if
block]
Add the dram_init_banksize function to the board file to properly set
DRAM memory sizes during boot.
The commit bc07851897 ("board: ti: Pull redundant DDR functions to a
common location and Fixup DDR size when ECC is enabled") relocated the
dram_init_banksize function from architecture specific initialization to
the TI board initialization code. As a result, boards relying on the
previous setup now require this function to be defined within their
board file to handle DRAM sizing correctly.
Without this function defined the following error appears during boot:
ERROR: Failed to allocate 0x1000 bytes below 0x0.
Fixes: bc07851897 ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add a new event which handles this function refer to commit
("91caa3bb89b1 event: Use an event to replace last_stage_init()")
Signed-off-by: Michael Chang <zhang971090220@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Return value of a function 'strtok_r' is dereferenced at kwbimage.c:1655
without checking for NULL, but it is usually checked for this function.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
When performing a build consisting of only a defconfig target and then
this tool, we were missing two dependencies. Add them.
Signed-off-by: Tom Rini <trini@konsulko.com>
First set of u-boot-at91 features for the 2025.07 cycle:
This feature set includes improvements on the atmel-quadspi driver, a
fix for the nand driver, and improvements on the pinctrl driver to be
able to use the Linux DT (also sync on the DT side as well).
When 3-wire mode is claimed on the bus, use the MOSI (output) pin to
receive data. In this mode, since the transfer can only be either TX
or RX, return -EINVAL if both are required at the same time.
Signed-off-by: Hironori KIKUCHI <kikuchan98@gmail.com>
Tom Rini <trini@konsulko.com> says:
A challenge we've run in to is making it easier for more people to use
various python tools that we include in the tree. Part of the problem is
that when we have a requirements.txt file, aside from the doc one we
share with the kernel, I created it using "pip freeze". And while this
might have been a best (or at least OK) practice at the time, that's no
longer the case and is why our files have so many things in them. What
this series does is create multiple files, one per project/tool and then
has CI install them as needed. There's a few places here where this
means that we update the requirements as well, but we keep a few big
things where they are currently. This is because updating them
introduces problems of their own and delaing with that would best be a
follow up series. I've put this through GitLab and Azure to make sure
everything is still going fine on both platforms.
Link: https://lore.kernel.org/r/20250205000743.949790-1-trini@konsulko.com
Now that we have more requirements.txt files we need to grab all of them
for creating our cache. Also, we do longer should install
python3-pyelftools on the host as it's not used.
Signed-off-by: Tom Rini <trini@konsulko.com>
Use the "pipreqs" tool to re-create these files, with a few manual
corrections. We still need to include pytest-xdist which the tool does
not detect. We also for now don't upgrade most of the required tools as
that creates problems with various tests, which should be resolved
independently.
Signed-off-by: Tom Rini <trini@konsulko.com>
We can invoke pip once to install the various requirements.txt files
that we need rather than invoking the tool multiple times.
Signed-off-by: Tom Rini <trini@konsulko.com>
We should install all of our requirements.txt files after starting the
virtualenv rather than ad-hoc throughout each test.
Signed-off-by: Tom Rini <trini@konsulko.com>
Before we invoke pip we should always have first created and started our
virtualenv. This was done most of the time, but not always.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than have a requirements.txt file that's shared between multiple
python projects within U-Boot, create one for each using "pipreqs".
Signed-off-by: Tom Rini <trini@konsulko.com>
The CPSW3G instance of CPSW on AM62PX SoC provides Ethernet functionality.
Currently, Ethernet is supported on Linux which runs on the A53 core on the
SoC, by allocating all of the DMA resources associated with CPSW to A53_2.
In order to enable use-cases where the Ethernet traffic is sent from or
consumed by various CPU cores on the SoC simultaneously, while at the
same time, maintaining backward compatibility with the existing use-case
of A53 being the sole entity that exchanges traffic with CPSW via DMA,
update the DMA resource sharing scheme on AM62PX SoC to the following:
--------------- -------------- ------------- ----------------
Resource WKUP_R5 MCU_R5 A53_2
--------------- -------------- ------------- ----------------
TX Channels [8] => 4 (Primary) 4 (Primary) 8 (Secondary)
TX Rings [64] => 32 (Primary) 32 (Primary) 64 (Secondary)
RX Channels [1] => 1 (Primary) 0 1 (Secondary)
RX Flows [16] => 6 (Primary) 10 (Primary) 16 (Secondary)
In the absence of primary owners of resources (existing use-case
where A53 owns all of the CPSW DMA resources), the secondary owner
can claim all of the resources as its own. For shared use-cases,
the resources that are not claimed by the primary are communicated
to the secondary owner allowing it to claim them. This ensures that
Linux on A53_2 can continue claiming all DMA resources associated
with CPSW in the absence of primary owners, while at the same time
providing users the flexibility to share CPSW DMA resources across
various CPU cores listed above if needed.
While Linux has been mentioned as the Operating System running
on A53, there is no dependency between the Operating System
running on A53 and its ability to claim the CPSW DMA resources
listed above.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Judith Mendez <jm@ti.com> says:
Some K3 devices like am62x and am64x have a M4 processor in the MCU
voltage domain. This patch series introduces remoteproc M4 driver which
will be used to load firmware into and start the M4 remote core.
This series also adds support for R5F cores on am64x SoCs in patch 2 and
sets up environment to load FW in remote cores in patch 3,4,5.
This patch series also enables remoteproc drivers by default as per what
remoteproc sybsystem is supported per SoC, thus all remoteproc options
are now deleted in configs/* since they are no longer required.
This patch series was tested on am64x EVM, am62x SK, am62ax SK,
am62px SK boards.
Any additional tested by's are welcome since I was not able to
test any additional boards.
Tested by running the following commands in u-boot prompt:
=> setenv dorprocboot 1
=> run boot_rprocs
Link: https://lore.kernel.org/r/20250210202944.1071931-1-jm@ti.com
Now that remoteproc configs are enabled by default in Kconfig
files, remove these configs which are no longer needed to be
defined here in configs/.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Add remoteproc config options to enable remoteproc drivers by
default as per what remotproc subsystem is supported on each
SoC.
Signed-off-by: Judith Mendez <jm@ti.com>
Enable CMD_REMOTEPROC by default if building for K3 ARCH so
that it does not have to be defined in each board defconfig
file.
Signed-off-by: Judith Mendez <jm@ti.com>
If building for v7R and K3 architecture, enable SPL
remoteproc so that it does not have to be defined in each
board defconfig file.
Signed-off-by: Judith Mendez <jm@ti.com>
If SYS_K3_SPL_ATF is enabled, for K3 ARCH enable the
remoteproc ARM64 driver by default so that it does not
have to be defined in each board defconfig file.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Add remoteproc specific env support for am62px device. If the
remoteproc CMD is defined, include the K3 remoteproc environment.
Also define rproc_fw_binaries which holds a list of remoteproc FW
binaries for u-boot loading of remote cores.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Add remoteproc specific env support for am62x device. If the
remoteproc CMD is defined, include the K3 remoteproc environment.
Also define rproc_fw_binaries which holds a list of remoteproc FW
binaries for u-boot loading of remote cores.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Add remoteproc specific env support for am64x device. If the
remoteproc CMD is defined, include the K3 remoteproc environment.
Also define rproc_fw_binaries which holds a list of remoteproc FW
binaries for u-boot loading of remote cores.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
AM64x SoCs have two R5F clusters in the main power domain.
Extend support for R5F remote proc driver on AM64x with compatible
strings.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Some K3 devices like AM64, AM62 devices have a M4 processor in MCU
voltage domain.
Add a remote proc driver to support this subsystem to be able to load
and boot the M4 core.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[Ryan: Fix implicitly include warning]
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
[Judith: Cleanup driver, fix warnings, remove lreset logic]
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Add CONFIG_BOOTCOUNT_ALTBOOTCMD so the developer is able to add
custom altbootcmd via Kconfig when they enable BOOTCOUNT. With this now
in Kconfig, we need to move it from environment files / config.h files
and in to the defconfig file.
This was done by generating u-boot-initial-env for all platforms before
the Kconfig change, to extract altbootcmd values and then again after to
compare the result.
[trini: Perform migration to defconfigs, reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass <sjg@chromium.org> says:
This series completes the removal of test commands for suites. With this
it is possible to declare a suite (including init and uninit functions)
without needing to write a command.
It also adds timing for test suites, so we can keep track of how long
things take.
Link: https://lore.kernel.org/all/20250207183121.117663-1-sjg@chromium.org/
From reading the S34ML02G1 and the SAM9X60 datasheets again, it seems
like we have to wait tREA after rising RE# before sampling the data.
Thus pulse time must be at least tREA.
Without this fix we got PMECC errors when reading, after switching to
ONFI timing mode 3 on SAM9X60 SoC with S34ML02G1 raw NAND flash chip.
The approach to set timings used before worked on sam9g20 and sama5d2
with the same flash (S34ML02G1), probably because those have a slower
mck clock rate and thus the resolution of the timings setup is not as
tight as with sam9x60.
The approach to fix the issue was carried over from at91bootstrap, and
has been successfully tested in at91bootstrap, U-Boot and Linux.
Link: https://github.com/linux4sam/at91bootstrap/issues/174
Cc: Li Bin <bin.li@microchip.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
The GPIO banks are added as sub nodes or child nodes under the
pinctrl node (as per Linux ABI) and the reg property which points
to an array of controllers physical base address is removed
to align with the Linux devicetree.
Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
U-Boot pinctrl driver expects a reg property explicitly unlike linux.
To align the DT of U-boot with the Linux, reg property is also arrvied
from child GPIO bank nodes when configured under the pinctrl node.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
In Linux DT,the pinctrl node acts as parent nodes with all other
gpio banks as child nodes and a single driver in Linux handles both
pinctrl settings and gpio requests.Current U-Boot DT maintains both
pinctrl and gpio nodes as separate nodes and offers two different class
of U-Boot drivers: UCLASS_PINCTRL which handles pin functions and
UCLASS_GPIO which handles gpio requests. In order to align the DT
of U-Boot with the DT of Linux, a hook is been added in the pinctrl
driver to bind the gpio driver with the pinctrl driver so that
when adding gpio nodes as subnodes to pinctrl node (as per the Linux ABI),
the corresponding APIs will be redirected and handled by valid
drivers attached to the pinctrl driver.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Add the missing properties for the pinctrl node and for its
corresponding GPIO bank nodes to align with the Linux DT.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Move pinmux nodes defined under the pinctrl node from sam9x60 SoC
DT to its board specific DTS files.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Define the pinctrl nodes with its label to align with the Linux DT.
Without this change the pinmux nodes are grouped under an additional
'pinctrl' child node which is not identified by the pinctrl driver
when the GPIO banks are made as child nodes of pinctrl node.
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Add Advanced Interrupt Controller node and define it as interrupt
parent in sam9x60 SoC DT.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
The qspi controller on sama5d2 and sam9x60 supports "classic" SPI mode
without spi-mem enhancements and accelerations, very similar to the old
SPI controller on sam9g20 or the modern flexcom controllers of the same
SoC family.
Register interface differs somewhat, especially because only one
hardware controlled CS line is supported. Some fields are missing, some
are in different registers, but in principal it works similar. So code
is very much inspired by the old atmel-spi driver.
Tested on sam9x60 with a non-mainline driver to configure an FPGA.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Switching between Serial Memory Mode (SMM) and (classic) SPI mode is a
preparation for implementing .xfer() in the future.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
The Serial Memory Mode (SMM) is enabled with atmel_qspi_set_cfg() on
each invocation of atmel_qspi_exec_op(). Setting SMM through
atmel_qspi_init() at probe time is redundant.
Removing the SMM setting at probe time should therefore 1) be safe to do
and 2) allows for setting it to a different value in a future
implementation of .xfer() which needs to disable SMM.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Port these commits:
- v6.11-rc5-90-g329ca3eed4a9a ("spi: atmel-quadspi: Avoid overwriting delay register settings")
- v6.12-rc1-1-g162d9b5d2308c ("spi: atmel-quadspi: Fix wrong register value written to MR").
- v6.13-rc2-27-gf663898d047a7 ("spi: atmel-quadspi: Factor out switching to Serial Memory Mode to function")
Cc: Csókás Bence <csokas.bence@prolan.hu>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Port changes from a 4 piece patch series from Linux kernel v5.10, merged
with v5.10-rc1-83-gc732b7567d869 ("Merge series "spi: atmel-quadspi: Fix
AHB memory accesses" from Tudor Ambarus …").
Port the single fix v5.15-rc1-14-g09134c5322df9 ("spi: Fixed division by
zero warning").
Reduces differences between linux and u-boot driver.
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: Yoshitaka Ikeda <ikeda@nskint.co.jp>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Most other spi-mem drivers also depend on SPI_MEM. Fixes this build
error:
arm-v5te-linux-gnueabi-ld.bfd: drivers/spi/atmel-quadspi.o: in function `atmel_qspi_supports_op':
/mnt/data/adahl/src/u-boot/drivers/spi/atmel-quadspi.c:460: undefined reference to `spi_mem_default_supports_op'
make[1]: *** [/mnt/data/adahl/src/u-boot/Makefile:1821: u-boot] Error 1
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is inside of an 'if DM_SPI' block, and thus always true.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present the 'ut' command handles its flags in a strange way, in that
they must come after the subcommand.
So, we must use 'ut bloblist -r2' to run the bloblist tests twice. This
is an artefact of the way tests were run, through subcommands.
It is now possible to correct this, by doing flag-processing before
running the suite.
Update the code to handle this, so that 'ut -r2 bloblist' works. Update
the 'test_suite' test to check the new arguments.
Add a sanity-check for -I while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the logic from this function into run_suite(), on the way to having
flag parsing in the top-level 'ut' command instead of its children.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enhance the ut command to accept a comma-separated list of test suites
to run. Report the summary information for these at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that everything is using the new test-suite features, drop support
for running commands.
Fix a missing closing-bracket while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
These tests run three different checks on the nodes, but the logic is
currently all in one tests.
Split the code out into three different tests, which do different setup
and then run the same checks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having an init function and then running the tests, create a
test-init function to do it. This will allow us to get rid of the
command function.
Fix the comment abotu 'environment' while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having an init function and then running the tests, create a
test-init function to do it. This will allow us to get rid of the
command function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having an init function and then running the tests, create a
test-init function to do it. This will allow us to get rid of the
command function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the helpers provided for this purpose, rather than different ones in
this particular test.
Leave fdt_getprop_str() alone as it seems to have more value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the init code into a separate function since it is quite large.
Adjust it to use unit-test functions which have become available since
the test was written.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having this condition defined separately for each suite,
bracket all options with 'if UNIT_TEST'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some suites need things to be set up before they can run. Add a way to
declare an init function using the UNIT_TEST_INIT() macro. The init
function is just like any other test, but is always placed first so that
it runs before all the other test functions in the suite.
Add an uninit function as well, to clean up after the test.
Signed-off-by: Simon Glass <sjg@chromium.org>
When tests are all in the same suite it is annoying to have to read all
the common text after each name. Skip this to help the user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Show the average duration of a test, so we can keep track of how it is
trending. Report the suite with the longest average test to encourage
people to improve it.
Add a function to update the stats based on the results from a single
suite and another to show the summary information.
Make this optional, since sandbox's SPL tests do not have a timer driver
and people may want to print results without times.
Signed-off-by: Simon Glass <sjg@chromium.org>
Show the time taken by each test suite with 'ut all' and the total time
for all suites.
Take care to remove any sandbox time-offset from the values.
Fix the comment-format on timer_test_add_offset() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
All tests should belong to a suite, but if there is a suite we don't
know about (e.g. not added to cmd_ut.c) then the totals will not add up.
Add a check for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This test does not appear to use sandbox's memory-mapped I/O so there is
no need to enable it.
Even if there were a need, it should be disabled at the end of the test,
so as not to affect other tests.
Drop these lines from the test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Harrison Mutai <harrison.mutai@arm.com> says:
This series of patches enhances the vexpress64 platform by enabling bloblist
support. It also introduces support for CONFIG_BLOBLIST_PASSAGE. This is
necessary to boot vexpress64 and other boards without manually specifying a
fixed address and size for the bloblist.
After this change, all the bloblist init modes are supported (i.e., fixed,
alloc, passage) and Vexpress64 boots with CONFIG_BLOBLIST_PASSAGE.
Link: https://lore.kernel.org/r/20250204175844.19890-1-harrison.mutai@arm.com
Enable bloblist on vexpress64 platforms to facilitate information
passing from TF-A using the firmware handoff framework.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
When the configuration option CONFIG_BLOBLIST_PASSAGE is selected, the
bloblist present in the incoming standard passage is utilised in-place.
There is no need to specify the size of the bloblist as the system
automatically detects it using the header information.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
When booting into the Linux kernel with semi-hosting, use the device
tree provided by hardware unless one is provided in the current
directory.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
- Check return value of xrealloc for NULL.
- Free allocated memory and return NULL if xrealloc fails.
- Prevent NULL pointer dereference in strlen and strcat.
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
- Check return value of malloc_cache_aligned for presskey and sha.
- Return -ENOMEM if memory allocation fails.
- Free allocated memory in error paths."
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
Dynamic memory, referenced by 'line', is allocated by calling
function 'calloc' and lost when the function terminates with code -1.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Dynamic memory, referenced by 'line', is allocated at ublimage.c:159
by calling function 'getline' and lost at ublimage.c:184.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
Report of the static analyzer:
1. NULL_AFTER_DEREF Pointer 'str', which is dereferenced at
image-host.c:688 by calling function 'strdup', is compared to a NULL
value at image-host.c:691.
2. NULL_AFTER_DEREF Pointer 'list', which is dereferenced at
image-host.c:689, is compared to a NULL value at image-host.c:691.
Corrections explained:
1. Checking for NULL before using pointers: The if (!list || !str) check
is now performed before calling strdup and realloc, which prevents
null pointer dereferences.
2. Checking the result of strdup: strdup can return NULL if memory
allocation fails. This also needs to be checked.
3. Checking the result of realloc: If realloc returns NULL, then memory
has not been allocated and dup must be freed to avoid memory leaks.
Triggers found by static analyzer Svace.
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
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