This series brings our zlib code more up to date. However, it drops an
important performance improvement that is required on some of our
supported platforms in order to boot Linux before the watchdog resets
the system. Furthermore, the "post increment" version of this
performance loop was not tested, so while we can fix it, it would then
require re-testing all platforms. At this point in time, we will revert
updating zlib (which has had a potential security issue since 2016) and
fix this in the v2024.10 release.
This reverts commit 4914263c9a, reversing
changes made to ef8ef5f77c.
Reported-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass <sjg@chromium.org> says:
This series includes fixes to get some rockchip and nvidia boards
working again. It also drops the broken Beaglebone Black config and
provides a devicetree fix for coral (x86).
Now that am335x_evm boots OK on the Beaglebone black, drop the latter
and update the docs to cover the change.
Also add a few updates about 'make fit' and drop the note about the
security review, as U-Boot's verified boot has had quite extensive
review now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This causes a hang, so disable it. Unfortunately the RAM-size fix does
not resolve the problem and I am unsure what is wrong. As soon as the
cache is enabled the board appears to hang.
Fixes: 6d8cdfd153 ("rockchip: spl: Enable caches to speed up checksum validation")
Signed-off-by: Simon Glass <sjg@chromium.org>
The dcache may not be enabled in SPL. Add a check to avoid trying to
use an undefined function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With a recent change, regulators_enable_boot_on() returns an error if a
regulator is already set. Check for and handle this situation.
Fixes: d99fb64a98 power: regulator: Only run autoset once for each regulator
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Add better logging for power init so that CONFIG_LOG_ERROR_RETURN can
be enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Set a size limit for this board so that we get a build error if it grows
too much.
Note that the limit is approximately, since it does not include the FDT,
microcode and fdtmap, which can change in size. However this board is
fairly stable, so overflowing this limit will likely result in the image
not fitting in the ROM space available for U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
It does not make sense to enable all SHA algorithms unless they are
needed. It bloats the code and in this case, causes chromebook_link to
fail to build. That board does use the TPM, but not with measured boot,
nor EFI.
Since EFI_TCG2_PROTOCOL already selects these options, we just need to
add them to MEASURED_BOOT as well.
Note that the original commit combines refactoring and new features,
which makes it hard to see what is going on.
Fixes: 97707f12fd tpm: Support boot measurements
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
This cannot be enabled early in boot since some other init is needed.
At this point it is unclear exactly what init is needed, so disable
the debug UART to avoid a hang.
Signed-off-by: Simon Glass <sjg@chromium.org>
RAM init on mt7622 based bananapi R64 is broken since v2023.10.
Increasing the mem-map does not help here, so i reduced the maximum
available ram in get_ram_size call from 2G to 1G (board has only 1G).
Fixes: 5fd6d4c7b3 ("arm: mediatek: retrieve ram_base from dts node for armv8 platform")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Padmarao is leaving Microchip soon, and suggested that I should take
over maintaining the Icicle in U-Boot in his stead.
Suggested-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Unfortunately when enabling FDT fixups for the AM62x family of SoCs and
moving TF-A to the bottom of RAM we missed the BeaglePlay. This is
causing Linux's memory allocator to clobber TF-A and break its boot.
Enable OF_SYSTEM_SETUP to fixup the kernel's FDT to inform it of the
actual location of the firmware
CC: Andrew Davis <afd@ti.com>
CC: Nishanth Menon <nm@ti.com>
CC: Robert Nelson <robertcnelson@gmail.com>
Reported-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Chirag Shilwant <c-shilwant@ti.com>
Tested-by: Dhruva Gole <d-gole@ti.com>
When the EFI TCG measurement code moved from EFI to the TPM subsystem for
general use some prototypes changed from returning efi_status_t to int,
which is more appropriate for the non-EFI APIs. However, some of the
EFI callsites never changed and we ended up assigning the int value to
efi_status_t.
This is unlikely to cause any problems, apart from returning invalid
values on failures and violating the EFI spec.
A while back we moved the core functions of the EFI TCG protocol to the
TPM APIs in order for them to be used with bootm, booti etc.
Some prototypes changed from returning efi_status_t to int, which is more
appropriate for the non-EFI APIs. However, some of the EFI callsites never
changed and we ended up assigning the int value to efi_status_t.
This is unlikely to cause any problems, apart from returning invalid
values on failures and violating the EFI spec. Let's fix them
by looking at the new return code and map it to the proper EFI return
code on failures.
Fixes: commit 97707f12fd ("tpm: Support boot measurements")
Fixes: commit d6b55a420c ("efi_loader: startup the tpm device when installing the protocol")
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We currently return 'No space left on device' if the eventlong buffer
we allocated is not enough. On a similar check later on that function
during the call to tcg2_log_init() we return 'No buffer space
available'. So switch both error codes to -ENOBUFS since we are always
checking a buffer and not a device.
Fixes: commit 97707f12fd ("tpm: Support boot measurements")
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pull request doc-2024-07-rc5-2
Documentation:
* Fix broken references to pytest suite and test writing
* Fix links to FIT documentation
* Add capsule documentation for TI K3 devices
Added introductory documentation about capsule support for TI devices,
including links to more detailed information.
Also added a note in the build secction that points to the host package
dependency docs.
This patch is followup from a request in the series introducing capsule
update for TI boards.
https://lore.kernel.org/r/20240618145058.552eapp5iiz772ej@hardcore
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Add missing colon in :doc: link.
Fixes: fc32833145 ("doc: Explain briefly how to write new tests")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This should have been adapted directly with or after
v2021.01-693-gca6583d4e08 ("doc: move test/README to HTML
documentation") or v2021.01-694-g0157619d5c8 ("doc: move
test/py/README.md to HTML documentation") already.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For some reason none of these debug prints have newlines, resulting in a
"fun" surprise when attempting to debug this driver.
The other parts of the dwc3 driver have newlines, add them here too (and
fix some minor nearby indent issues to make checkpatch happy).
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
The default value CYCLIC_MAX_CPU_TIME_US was 1000, which is
a little bit too low for slower hardware and sandbox.
On my MIPS Boston FPGA board with interaptiv CPU, wdt_cyclic
can easily take 3200 us to run.
On azure pipeline sandbox_clang, wdt_cyclic some times goes
beyond 1300 us.
Raise default value to 5000, which is the value already taken
by octeon_nic32. This is still sufficent to maintain system
responsiveness.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pull request for u-boot-nand-20240617
The first patch is by Arseniy Krasnov and adds support for OTP area
access on MX30LFxG18AC chip series.
The second patch is by John Watts and adds MTD dependency in Kconfig
for UBI.
The last patch is by Ravi Minnikanti and fixes bitflip return value on
page read.
Make sure the OS would not get any spurious IWDG pretimeout IRQ
right after the system wakes up. This may happen in case the SoC
got woken up by another source than the IWDG pretimeout and the
pretimeout IRQ arrived immediately afterward, but too late to be
handled by the suspend main loop. In case either of the IWDG is
enabled, ping it first and then return to the OS.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Once a page is read with higher bitflips all subsequent reads
are returning the same bitflip value even though they have none.
max_bitflip variable is not being reset to 0 across page reads.
This is causing problems like incorrectly
marking erase blocks bad by UBI and causing read failures.
Verified the change with both MTD reads and UBI.
This change is inline with other NFC drivers.
Sample error log where a block is marked bad incorrectly:
ubi0: fixable bit-flip detected at PEB 125
ubi0: run torture test for PEB 125
ubi0: fixable bit-flip detected at PEB 125
ubi0 error: torture_peb: read problems on freshly erased PEB 125,
must be bad
ubi0 error: erase_worker: failed to erase PEB 125, error -5
ubi0: mark PEB 125 as bad
Link: https://lore.kernel.org/all/ea0422cd-a8e6-3c36-f551-a0142893301b@marvell.com
Signed-off-by: rminnikanti <rminnikanti@marvell.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: rminnikanti <rminnikanti@marvell.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
We currently only describe the process to enable measured boot using
bootm. Describe the UEFI requirements as well which predate bootm.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The PC client spec [0], doesn't describe measurements for DTBs. It does
describe what do to for ACPI tables though.
There is a description for ACPI in 3.3.4.1 PCR[0] – SRTM, POST BIOS,
and Embedded Drivers and they explicitly mention ACPI in there. There's
no mention of ACPI in 3.3.4.2 PCR[1] – Host Platform Configuration.
However, in Figure 6 -- PCR Mapping of UEFI Components ACPI is shown
in PCR1. The general description also mentions PCR0 is for code and PCR1
is for data such as ACPI and SMBIOS.
So let's switch over the DTB measurements to PCR1 which seems a better
fit.
[0] https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The timing upstream was wrong corresponding to the production.
This come evident after commit b614ddb5d3
(ddr: imx: Save the FW loading if it hasn't changed). This
change fix booting from usb
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Unlike fdt_node_check_compatible() which returns 0 if node is compatible,
ofnode_device_is_compatible() return true which is non-zero if node is
compatible. The intention of the code is to exit from the function in
case the node is not compatible with "micrel,ks8851-mll". Add the missing
invert into the conditional to reinstate original behavior.
This exposes a follow up problem caused by conversion to DM based FMC2 EBI
driver, where the FMC2 EBI is not configured when accessed by this code.
Probe the KS8851 MAC, which also configures the FMC2 EBI as a dependency,
so that the KS8851 MAC CCR register can be accessed over the FMC2 EBI bus
and checked for EEPROM present bit.
Fixes: 5a605b7c86 ("board: dhelectronics: stm32mp1: convert to livetree")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
There are two paths to reach this function, either through mkimage -l or
through dumpimage -l. The latter passes a NULL imagename while the
former passes an empty string. Therefore, let's make both tools behave
the same by handling the empty string the same way as for NULL.
Without this, the only way to get some information out of mkimage -l is
to provide "-n rk3399" for example, which isn't documented in the usage
of the tool.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
GPIO IOMUX control is located at PMU2_IOC or BUS_IOC offset on RK3588.
Based on Linux commit fdc33eba11c5 ("pinctrl/rockchip: add rk3588
support").
Compared to the Linux commit, this include a fix so that the iomux of
GPIO0_B4-D7 is reported correctly.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
GPIO0_C0-C4 iomux is set using PMUGRF_GPIO0C_IOMUX_L reg on RV1126. This
is indicated using the IOMUX_L_SOURCE_PMU flag. Fix reading current mux
by fully adopting the IOMUX_L_SOURCE_PMU related code in Linux kernel.
Based on Linux commit fd4ea48688c6 ("pinctrl: rockchip: Add RV1126
pinctrl support").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
GPIO0_A0-A7 on RK3188 is IOMUX_GPIO_ONLY, however, trying to set gpio
mux return an -ENOTSUPP error code. Fix this by validating using the mux
function type and not the iomux flag.
Based on Linux commit c4a532dee6b6 ("pinctrl: rockchip: handle first
half of rk3188-bank0 correctly").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For the sake of consistency, make all internal (starting with _)
functions expect a pmic udevice instead of a regulator udevice.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-bob
_ldo_get_suspend_value and _ldo_set_suspend_value get passed the parent
of the regulator (so the pmic) as first argument, therefore this udevice
should be used for pmic_* callbacks instead of using the parent of the
pmic.
To avoid further confusion, let's rename the argument to pmic instead of
dev, highlighting which kind of device we expect as argument.
Fixes: f047e4ab97 ("regulator: rk8xx: add indirection level for some ldo callbacks")
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-bob
Some of the rgxx3 devices do not have a way to recover from a poor
flash of a bootloader to eMMC. Set the device to always attempt to boot
from sdmmc0 first which ensures that we can override the boot from
emmc if we have a card present with a valid fit signature. The
expectation is that this will protect from the very unlikely chance
we have a valid FIT signature on the eMMC but the U-Boot stage fails
for some other reason.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This reverts commit 41a60d0e5c.
On some of the supported devices the adc detect code always returns
that the button has been pushed, and as a result the device will
not boot normally.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's never been a -q or -s argument handled in the command, so let's
remove it. This was highlighted during review[1] but somehow still got
through.
While at it, slightly "reword" in the help text how the len + freq
arguments are defined. Indeed, len and freq work in pair, it is possible
to define none of either, n of both, or n - 1 of freq if there are n
len, in which case the freq that goes with the last len would be the n -
1 (and not the default of 400Hz if neither len nor freq is passed). I
assume this isn't what's expected but leaving it for another patch if
need be to fix what happens in that very odd scenario.
[1] https://lore.kernel.org/u-boot/CAPnjgZ0QWNqVFZfEWHxRcFOA3E3gRAZCYs77nGUXKL0pLp+JLQ@mail.gmail.com/
Fixes: ea58b9a404 ("cmd: allow sound command to play multiple sounds")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The issue described in https://github.com/psf/requests/pull/6655 has
been assigned as a security issue. While unlikely to be exploited in our
usage, update to the current release to fix it. Furthermore, upstream
has now moved on to v2.23.2 as the release to use which has all of the
issues resolved.
Reported-by: GitHub dependabot
Signed-off-by: Tom Rini <trini@konsulko.com>
Comment is not kernel-doc format that's why don't label it like that and
also fix indentation to have proper multiline comment.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
According to UEFI v2.10 spec section 8.2.6, if a caller invokes the
SetVariables() service, it will produce a digest from hash(VariableName,
VendorGuid, Attributes, TimeStamp, DataNew_variable_content), then the
firmware that implements the SetVariable() service will compare the
digest with the result of applying the signer’s public key to the
signature. For EFI variable append write, efitools sign-efi-sig-list has
an option "-a" to add EFI_VARIABLE_APPEND_WRITE attr, and u-boot will
drop this attribute in efi_set_variable_int(). So if a caller uses
"sign-efi-sig-list -a" to create the authenticated variable, this append
write will fail in the u-boot due to "hash check failed".
This patch resumes writing the EFI_VARIABLE_APPEND_WRITE attr to ensure
that the hash check is correct. And also update the "test_efi_secboot"
test case to compliance with the change.
Signed-off-by: Weizhao Ouyang <o451686892@gmail.com>
Documentation:
* Update netconsole examples mentioning stderr.
* Describe what an "fpga" image is in FIT files.
* process.rst: Document device tree resync rules.
Document the logic of when we do a full resync of the device trees used
by OF_UPSTREAM as well as that cherry-picking is allowed as needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
These sections which talk about the different phases of the development
process should be using the subsubheading identifier.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Stderr was missing from the initial description and example.
As I understand the env command documentation the subcommand style is
preferred, though the old format is still fully supported.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This adds details that I would have liked to have readily available,
in particular how to activate the network interface before enabling
netconsole, and how to integrate netconsole so you can use the U-Boot
prompt.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
The ENV size and offset were changed to different
values in Beacon's downstream release. Change them to the
same values as the downstream for consistent behavior.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Since any changes to the RZ/G2 family go through Marek's tree,
update the MAINTAINER file to automatically show his name
when running get_maintainer.pl. Without this, he is not
copied.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reserve 4 kiB of space in 64bit R-Car DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node,
possibly also additional /memory@ nodes and RPC node by TFA.
This duplicates behavior in arch/arm/dts/Makefile with OF_UPSTREAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Remove leftover DTSI files after OF_UPSTREAM conversion.
Those are no longer used and no longer necessary, remove them.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Adam Ford <aford173@gmail.com>
grepping for usb_ether_curr_dev in u-boot source code shows
$ grep -r usb_ether_curr_dev .
./cmd/usb.c:static int __maybe_unused usb_ether_curr_dev = -1; /* current ethernet device */
$
only declared but never used, so it can safely
removed from code.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Javier Martinez Canillas <javier@dowhile0.org> says:
Hello,
I noticed that the IGEPv2 board did not boot anymore with mainline U-Boot.
This was caused by a driver change to allocate its platform data before
relocation and U-Boot not having enough pre-relocation heap size for this.
This series fixes this issue and also makes the board support more modern,
by enabling DM for SPL and migrating the IGEP boards to use upstream DTBs.
Enable OF_UPSTREAM to use upstream DT and add a ti/omap/ prefix to the
DEFAULT_DEVICE_TREE config option.
That way, a DTS from the upstream dts/upstream/src/ directory is used
instead of the arch/$(ARCH)/dts/ directory. These in turn are removed.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This change is heavily based on commit e0cc7df9fd ("omap3_beagle: Update
for DM SPL support"), that did the same update for the OMAP3 Beagle board.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
There are no SPI peripherals in neither the IGEPv2 board nor the IGEP COM
Module, so there's no reason to have this enabled in the boards defconfig.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
The IGEPv2 board boot started to fail since the commit afd4f15a39 ("spi:
omap3_spi: Read platform data in ofdata_to_platdata()"). Because this made
the OMAP3 SPI controller driver to allocate its platform data before doing
a relocation, but the igep0x00 config sets this pool size to just 1 KiB.
Increase the pre-relocation malloc heap size to 16 KiB, as is set by other
OMAP3 boards. This not only restores booting but also makes it consistent.
Leave the SPL pool size to the previous 1 KiB size since 16 KiB may not be
a possible size in that constrained environment and is also the value that
is set by other OMAP3 boards.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Use CSR_UCCTLCOMMAND instead of CSR_MCCTLCOMMAND
to do cache flush operation in M-mode and S-mode.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cache could be enabled in harts_early_init board-specific hook,
so remove cache enablement in start.S
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
A given AMP configuration for a board may make either one, or neither
of, the ethernet ports available to U-Boot. The Icicle's init code will
fail if mac1 is not present, so move it to the optional approach taken
for mac0.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Node offsets returned by libfdt can contain negative error numbers, so
the variable type should be "int". As things stand, if the ethernet
nodes are not found in the early init callback, the if (node < 0) tests
pass and the code errors out while trying to set the local-mac-address
for a non-existent node.
Fixes: 64413e1b7c ("riscv: Add Microchip MPFS Icicle Kit support")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Most of the current URLs should be redirected but some aren't already,
so let's anticipate more IT hiccups by migrating to new URLs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
The Theobroma address bounces as Philipp is not working there anymore,
so let's update with the one that seems to be working right now.
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
The address we load TFA and OPTEE is configurable by the
CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
static which can cause some confusion about where exactly these firmware
are exactly. Fix this by updating the reserved-memory{} nodes when the
loaded address does not match the address in DT.
Reported-by: Andrew Davis <afd@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
This iRAM APM area is needed for I3C access to PMIC via APM block.
Without this mapping any access to APM iRAM leads to "Synchronous Abort"
exception.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Most of the nodes in e850-96 appended device tree that add bootph-all
flags are not necessary. All those nodes are instantiated as
dependencies of other nodes anyway. Remove those nodes to avoid
cluttering the appended dts. 'bdinfo' reports 768 bytes reduction for
"Early malloc usage", and 'dm tree' output doesn't change. Keep only
pmu_system_controller changes, which are actually needed for serial to
work properly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Use upstream device tree files and bindings. To do so:
- imply (enable) OF_UPSTREAM option for E850-96 target
- point DEFAULT_DEVICE_TREE in E850-96 config to upstream dts
- remove now not needed local dts files, binding docs and headers
- update MAINTAINERS and board/samsung/e850-96/MAINTAINERS
correspondingly
Upstream device tree files for Exynos850 SoC and E850-96 board are
pretty much the same as local (removed) ones, so the conversion is
rather straightforward and painless in this case. The appended dts file
(arch/arm/dts/exynos850-e850-96-u-boot.dtsi) stays unchanged.
The only remaining local dt-bindings doc for E850-96 board is
exynos-pmu.yaml. It wasn't removed as it's quite different from Linux
kernel version. Particularly U-Boot local version of exynos-pmu.yaml
describes "samsung,uart-debug-1" property, which is not present in Linux
kernel binding. Later it might be upstreamed to Linux kernel, and once
it's done the U-Boot exynos-pmu.yaml binding can be removed.
No functional change.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
For pcr_read and pcr_extend commands allow the digest algorithm to be
specified by an additional argument. If not specified it will default to
SHA256 for backwards compatibility.
Additionally update test_tpm2.py for the changes in output in pcr_read
which now shows the algo and algo length in the output.
A follow-on to this could be to extend all PCR banks with the detected
algo when the <digest_algo> argument is 'auto'.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM display a warning that
having a gpio reset on a TPM should not be used for a secure production
device.
TCG TIS spec [1] says:
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the
platform CPU Reset signal such that it complies with the requirements
specified in section 1.2.7 HOST Platform Reset in the PC Client
Implementation Specification for Conventional BIOS."
The reasoning is that you should not be able to toggle a GPIO and reset
the TPM without resetting the CPU as well because if an attacker can
break into your OS via an OS level security flaw they can then reset the
TPM via GPIO and replay the measurements required to unseal keys
that you have otherwise protected.
Additionally restructure the code for improved readability allowing for
removal of the init label.
Before:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm_tis_spi_probe: missing reset GPIO
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
After:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1: TPM gpio reset should not be used on secure production devices
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
[1] https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientTPMInterfaceSpecification_TIS__1-3_27_03212013.pdf
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.
Specifications:
Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
Optional eMMC
2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
1x MIPI-CSI Port (4-lane or 2x 2-lane)
1x MIPI-DSI 4-lane connector
1x Micro HDMI 2.1 output, 1x DP 1.4 output
Gigabit Ethernet
Realtek RTL8821CS WiFi
4 pin debug UART connector
40 pin GPIO header
Size: 85mm x 56mm (Raspberry Pi Form Factor)
Kernel commit:
3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.
Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot proper pre-reloc is currently running out of memory and it is
thus impossible to boot into U-Boot CLI.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
See commit 008ba0d56d ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra careful about what goes into the TPL and how much we can
allocate there, so let's keep the current value for
TPL_SYS_MALLOC_F_LEN (already present in the PX30-specific Kconfig, from
an earlier commit).
This will allow us to use the same memory layout on one more Rockchip
SoC, which is always a nice thing. Additionally, this will make it
easier to fix U-Boot proper pre-reloc running out of memory on PX30 in a
subsequent commit.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ
declaring this rate and in the kernel it's a fixed clock definition.
While everything is expecting 702MHz, the SPLL is not running that
frequency when coming from the bootrom though, instead it's running
at 351MHz and the vendor-u-boot just sets it to the expected frequency.
The SPLL itself is located inside the secure-BUSCRU and in theory
accessible as an SCMI clock, though this requires an unknown amount
of cooperation from trusted-firmware to set at a later stage, though
during the SPL stage we can still access the relevant CRU directly.
The SPLL is for example necessary for the DSI controllers to produce
output.
As the SPLL is "just" another rk3588 pll, just set the desired rate
directly during the SPL stage.
Tested on rk3588-rock5b and rk3588-tiger by reading back the PLL rate
and also observing working DSI output with this change.
Fixes: 6737771600 ("rockchip: rk3588: Add support for sdmmc clocks in SPL")
Suggested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate RV1126 boards that exists in Linux v6.8 to use OF_UPSTREAM.
Following targets is migrated to use OF_UPSTREAM:
- rv1126-edgeble-neu2 : Board is an industrial form factor
IO board.
- sonoff-ihost-rv1126 : Gateway device designed to provide a
Smart Home Hub.
Cc: Tim Lunn <tim@feathertop.org>
Cc: Jagan Teki <jagan@edgeble.ai>
Reviewed-By: Tim Lunn <tim@feathertop.org>
Tested-By: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Anand Moon <anand@edgeble.ai>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
After the conversion of RV1108 to OF_UPSTREAM,
include/dt-bindings/clock/rv1108-cru.h is no longer needed because
there is dts/upstream/include/dt-bindings/clock/rv1108-cru.h from
upstream Linux.
Remove the unneeded rv1108-cru.h file.
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d, reversing
changes made to 2ee6f3a5f7.
Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
Specifying a file in an EXT4 or FAT partition on a virtio device as
environment location failed because virtio hadn't been initialized by
the time the environment was loaded. This patch mirrors commit
54ee5ae841 ("Add SCSI scan for ENV in EXT4 or FAT") in issue and
fix, just for a different kind of block device.
The additional include in include/virtio.h is needed so all functions
called there are defined, the alternative would have been to include
dm/device.h separately in the env/ sources.
Checkpatch suggests using "if (IS_ENABLED(CONFIG...))" instead of
"#if defined(CONFIG_...)", I'm sticking to the style of the existing
code here.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Bin Meng <bmeng.cn@gmail.com>
CC: Rogier Stam <rogier@unrailed.org>
u-boot-dfu-20240516
- Fix cdns3 low power hang via fast access bit
- Multiple dwc3 gadget fixes, mainly for USB support on TI AM6232
- Consistent USB_GADGET_MANUFACTURER for PHYTEC boards
- MAINTAINERS file update for u-boot-dfu
Upstream Linux commit 87dd96111b0b.
When operating in USB 2.0 speeds (HS/FS), if GUSB2PHYCFG.ENBLSLPM or
GUSB2PHYCFG.SUSPHY is set, it must be cleared before issuing an endpoint
command.
Current implementation only save and restore GUSB2PHYCFG.SUSPHY
configuration. We must save and clear both GUSB2PHYCFG.ENBLSLPM and
GUSB2PHYCFG.SUSPHY settings. Restore them after the command is
completed.
DWC_usb3 3.30a and DWC_usb31 1.90a programming guide section 3.2.2
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20240412202611.3565052-5-alexander.sverdlin@siemens.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This [pull request] for master fixes framebuffer video on almost all
Qualcomm platforms where the framebuffer is initialised by the first
stage bootloader.
* We already have a header 'backtrace', there is no need to repeat the
word backtrace on every line.
* Add a blank line before the backtrace section of the crash report for
improved readability.
* If U-Boot is compiled without backtrace, there is no need to write a
message at all.
* Avoid #ifdef. We prefer functions to always be compiled and let
the linker remove them if not needed.
* Foresee 3 digits for the backtrace index.
For testing the 'exception' command can be used.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
As boards from multiple vendors (Milk-V, StarFive, Pine64) use the mac
command provide a sub-command to set the vendor string.
Reported-by: E. Shattow <lucent@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We can use U-Boot for recovering JH7110 based boards via UART
if CONFIG_SPL_YMODEM_SUPPORT=y.
* Send u-boot-spl.normal.out via XMODEM.
* Send u-boot.itb via YMODEM.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E. Shattow <lucent@gmail.com>
Provide a man-page describing the usage of U-Boot on
the Milk-V Mars CM and Milk-V Mars CM Lite boards.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <lucent@gmail.com>
We already support the VisionFive 2 and the Milk-V Mars board by
patching the VisionFive 2 device tree. With this patch the same
is done for the Milk-V Mars CM.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: E. Shattow <lucent@gmail.com>
Reviewed-by: E. Shattow <lucent@gmail.com>
The EEPROM provides information about the size of the eMMC.
Provide a new function get_mmc_size_from_eeprom() to read it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E. Shattow <lucent@gmail.com>
Without the NULL check, if the devicetree that u-boot loads does not have a
compatible property then a store access fault will be raised and force the
machine to reset, due to the NULL pointer we passed to strlen. This commit
adds this check and will return -ENOSPC to indicate the get_desc failed.
Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
When the device port is in a low power state [U3/L2/Not Connected],
accesses to usb device registers may take a long time. This could lead to
potential core hang when the controller registers are accessed after the
port is disabled by setting DEVDS field. Setting the fast register access
bit ensures that the PHY clock is keeping up in active state.
Therefore, set fast access bit to ensure the accesses to device registers
are quick even in low power states.
commit b5148d946f45 ("usb: cdns3: gadget: set fast access bit") in the
upstream kernel is taken as reference.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20240424073911.1943-1-r-gunasekaran@ti.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The newly introduced carve_out_reserved_memory causes issues when
U-Boot is chained from the lk2nd bootloader. lk2nd provides a
simple-framebuffer device and marks the framebuffer region as no-map in
the supplied /reserved-memory. Consequently, the simple_video driver
triggers a page fault when it tries to write to this region.
As per Caleb's advice, this simple patch only does the carveouts for the
qcs404 SoC for which it was originally designed. The intent is to do the
carveouts for more Qualcomm SoCs in future.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Move GPIO pinmux to MDIO node. Add GB Ethernet reset GPIO.
Add PIN_INPUT to Fix SPE ethernet reset gpio so that
reading the GPIO can give correct status.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
While we unlikely to have an issue with CVE-2024-22195, it is simple
enough to bump our version of Jinja2 to receive the fix, do so.
Reported-by: GitHub dependabot
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
On all Raspberry Pi platforms, we're loaded by a prior stage firmware
that has assembled and passed on a device tree binary for us to use.
Switch to using this tree by default.
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: François Ozog <francois.ozog@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Remove DTs which are now replaced by OF_UPSTREAM counterparts.
No functional change expected.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Adam Ford <aford173@gmail.com> #beacon boards
MD Danish Anwar <danishanwar@ti.com> says:
This series adds AM64x related compatibles to PRUSS and PRU_RPROC drivers.
This series is a prerequisite for ICSSG Ethernet driver.
Once Support for AM64x is added to PRUSS and PRU_RPROC driver, I'll send
another series to enable ICSSG Ethernet driver for AM64x as well.
Let's provide get_boot_device() for AM64, similar to what we did
in commit 2f9095e2bf ("arm: mach-k3: am625: Provide a way to obtain boot
device for non SPLs") for AM62.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add support for AM64x by adding it's compatible in pruss driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Add support for AM64x PRU cores by adding compatibles for AM64x.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
J7200 has SR1.0 and SR2.0 having three variants of each GP, HS-FS and
HS-SE. Current build does not generate HS-SE SR1.0 and HS-FS SR1.0 so
add support for them.
Reported-by: Suman Anna <s-anna@ti.com>
Reported-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and
HS-SE. Current build does not generate HS-FS SR1.1 so add support for
them.
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Enable CONFIG_BOARD_LATE_INIT to use PHYTECs common board_late_init()
to set handy environment variables for u-boot.
Also, resync after savedefconfig.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Environment handling code can be reused across all our K3 based SoMs.
Instead of adding the same code for every new SoM, move it to a common
board.c file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Currently we have the option to tell the console code that we should
ignore the SPL banner. We also have an option to say that we can see it
a second time, and ignore it. However, some platforms such as TI AM64x
will have us see the SPL banner three times. Rather than add an
"spl3_skipped" option, rework the code. By default we expect to see the
banner once, but boards can specify seeing it as many times as they
expect to.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver support the Synopsys Designware Ethernet 10G
IP block refer from the driver dwc_eth_qos.
The driver MAC register mapping is different between
Synopsys QoS IP and Synopsys 10G IP, and thus new file
is created meant for Sysnopsys 10G IP.
The dwc_eth_xgmac_socfpga.c is specific to a device family,
the driver support the specific configuration used in
Intel SoC FPGA Agilex5.
This driver is extensible for other device family to use.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Greg Malysa <greg.malysa@timesys.com> says:
This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver, the gptimer driver which is used as a clock reference (CNTVCNT
is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our
corresponding Linux support relies on u-boot configuring the clocks
correctly before booting, so it is not possible to boot any board
without the CGU/CDU configuration happening here. There are also no
board files, device trees, or defconfigs included here, but some common
definitions that will be used to build board files currently are. The
sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and
sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended
to be a drop-in replacement for the SC594 in terms of peripherals, with
a Cortex-A55 instead.
Some of the configuration code in dmcinit and clkinit is quite scary and
causes a lot of checkpatch violations. It is modified from code
initially provided by ADI, but it has not been fully rewritten. There's
a question of how important it is to clean up this code--it has some
quality violations, but it has been in use (including in production) for
over two years and is known to work for performing the low level SoC
initialization, while a rewrite might introduce timing or sequence bugs
that could take a significant amount of time to detect in the future.
Add support for the SC5xx machine type from Analog Devices. This
includes support for the SC57x, SC58x, SC59x, and SC59x-64 SoCs, which
have many common features such as common ADI IP blocks, and SHARC DSP
cores. This commit introduces core functionality required for all boards
using an SC5xx SoC, such as:
- SPL configuration
- Required CPU hooks such as reset
- Boot ROM interaction to load the stage 2 bootloader in the reference
configuration. Other options are possible but not officially supported
at this time
- SoC-common configuration expected to be reused by all boards
- Early initialization for system clocks and DDR controller
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
The DM37 and OMAP35 SOM-LV share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford <aford173@gmail.com>
V2: Remove DT from Makefile
The DM37 and OMAP35 Torpedo share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford <aford173@gmail.com>
V2: Remove DT from Makefile
With the feature of OF_UPSTREAM now available, the device trees
for the SOM and baseboard can now deleted and the device tree
locations need to point to the ti/omap directory.
Signed-off-by: Adam Ford <aford173@gmail.com>
V2: Remove DT reference from Makefile.
The da850-evm can remove the U-Boot device trees if migrated
to OF_UPSTREAM. This means pointing the device trees to the
ti/davinci directory.
Signed-off-by: Adam Ford <aford173@gmail.com>
v2: Remove DTS from Makefile.
- Merge the four series that I made to finally remove include/common.h.
For the most part, this is just removing <common.h> entirely. In a few
cases we needed to add <linux/types.h> or <time.h>. In the case of
PowerPC related code, we instead need to bring in <asm/ppc.h>.
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of PowerPC, this file needs to include <asm/ppc.h> in order
to resolve all of the references it makes.
Signed-off-by: Tom Rini <trini@konsulko.com>
The constraints on the MMC_SUPPORTS_TUNING symbol can easily be
expressed in Kconfig (with the addition of SPL_MMC_SUPPORTS_TUNING).
Furthermore, in order to remove <common.h> from the MMC subsystem, the
way this symbol is used today needs to be changed in order to continue
functioning.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com> # on Zyxel NSA310s
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Ian Ray <ian.ray@gehealthcare.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: David Lechner <david@lechnology.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-By: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Ian Ray <ian.ray@gehealthcare.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
While the Turing RK1 board has a pad on the PCB for SPI flash, it is
not populated at the factory: supporting SPI flash boot is a user
modification, not an out-of-the-box feature. The defconfig for this
board should therefore not be enabling the SPI flash image nor SPI
support in the SPL, as it causes confusion among downstream users as to
whether the SPI image needs to be distributed.
Fixes: 153ac950a5 ("board: rockchip: Add the Turing RK1 SoM")
Suggested-by: Florian Klink <flokli@flokli.de>
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Acked-by: Joshua Riek <jjriek@verizon.net>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SCLK_USB3OTG_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of SCLK_USB3OTG_REF clocks to fix
reference clock period configuration.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph-some-ram props to pinctrl nodes related to eMMC, SD-card and
SPI flash to match e.g. RK3308 and RK3399.
Also adjust bootph props for sdio_vcc_pin, pinctrl and uart2m1_xfer.
Fixes: 1e21f56930 ("rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Instead of using the local rv1108 devicetree copies from U-Boot,
let's convert the rv1108 boards to OF_UPSTREAM so that the upstream kernel
devicetrees can be used instead.
Tested on a rv1108-elgin-r1 board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove redundant device tree files now that RK3588 boards have been
migrated to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate RK3588 boards that exists in Linux v6.8 to use OF_UPSTREAM.
Following targets is not migrated to use OF_UPSTREAM:
- generic-rk3588: Generic target only meant for U-Boot use
- toybrick-rk3588: Merged in v6.9-rc1
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The USB3 related DT nodes in SoC u-boot.dtsi is slightly different from
the final nodes being targeted for Linux kernel v6.10.
Sync USB3 related nodes from Linux maintainer v6.10-rockchip-dts64-1 tag
to prepare for migration of RK3588 to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The usb-typec related nodes and props added in the board u-boot.dtsi
file has not yet landed in upstream Linux kernel DT, and they are not
needed for U-Boot to use the USB Type-C port in peripheral mode.
Remove superfluous usb-typec related nodes and props and replace them
with a simple dr_mode and maximum-speed prop to cleanup the board
u-boot.dtsi file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The upstream DT binding added in linux-phy next commit a75d8056e9fe
("dt-bindings: phy: add rockchip usbdp combo phy document") does not
define subnodes for the type of PHY, instead it is expected that phandle
args are used for setting the type of the PHY.
phys = <&usbdp_phy0 PHY_TYPE_USB3>
Adopt the usbdp phy driver to work with upstream DT binding targeted for
Linux kernel v6.10.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the rockchip_u3phy_uboot_init() function, it has no caller and is
not needed with proper driver model use.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The upstream Linux kernel driver find the phy-id from the io address.
Change to use a similar method as the U-Boot inno-usb2 phy driver and
the Linux kernel driver to set correct phy-id.
This is based on the linux-phy next commit 2f70bbddeb45 ("phy: rockchip:
add usbdp combo phy driver").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove redundant device tree files now that RK356x boards have been
migrated to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Migrate RK356x boards that exists in Linux v6.8 to use OF_UPSTREAM.
Following targets is not migrated to use OF_UPSTREAM:
- anbernic-rgxx3-rk3566: Multi device target
- generic-rk3568: Generic target only meant for U-Boot use
- pinetab2-rk3566: Merged in v6.9-rc1
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a <CONFIG_SYS_SOC>-u-boot.dtsi file that gets included by default
for RK356x boards when a board specific u-boot.dtsi file dont exists.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove redundant device tree files now that RK3399 boards have been
migrated to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
All RK3399 boards has now been synced to Linux kernel v6.8 DTs and can
migrate to use OF_UPSTREAM.
Migrate RK3399 boards that exists in Linux v6.8 to use OF_UPSTREAM.
Following target is not migrated to use OF_UPSTREAM:
- nanopi-m4-2gb-rk3399: DDR3 variant of nanopi-m4-rk3399 (LPDDR3)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove redundant device tree files now that RK3328 boards have been
migrated to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
All RK3328 boards has now been synced to Linux kernel v6.8 DTs and can
migrate to use OF_UPSTREAM.
Migrate all RK3328 boards to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove redundant device tree files now that RK3308 boards have been
migrated to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
All RK3308 boards has now been synced to Linux kernel v6.8 DTs and can
migrate to use OF_UPSTREAM.
Migrate all RK3308 boards to use OF_UPSTREAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the obsolete ethernet0 alias now that all board device tree files
have been fully synced with Linux kernel v6.8.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Sync rk3399-pinephone-pro device tree from Linux kernel v6.8.
Add SPI flash related node and options to support boot from SPI flash.
Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.
Add SYS_NS16550_MEM32=y to use readl/writel for serial console.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-pinebook-pro device tree from Linux kernel v6.8.
Add SF_DEFAULT_SPEED=10000000 and SPI_FLASH_SFDP_SUPPORT=y to improve
support for booting from SPI flash.
Add CMD_POWEROFF=y to support poweroff using cmdline and power on using
the pwr button on the board.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-rockpro64 device tree from Linux kernel v6.8.
Add SF_DEFAULT_SPEED=10000000 and SPI_FLASH_SFDP_SUPPORT=y to improve
support for booting from SPI flash.
Remove USE_PREBOOT=y to speed up booting, standard boot will init USB
after faster boot media has been evaluated.
Add CMD_POWEROFF=y to support poweroff using cmdline and power on using
the pwr button on the board.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-rock-pi-4 related device tree from Linux kernel v6.8.
Add SPI flash related nodes and options to support boot from SPI flash.
Add AHCI=y, SCSI_AHCI=y, AHCI_PCI=y and SCSI=y to support SATA HAT.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-khadas related device tree from Linux kernel v6.8.
Add SPI flash related options to support booting from SPI flash.
Add DM_RESET=y to support reset signals.
Add PCI=y, CMD_PCI=y and NVME_PCI=y to support PCIe and NVMe boot.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add CMD_ROCKUSB=y, CMD_USB_MASS_STORAGE=y and USB_GADGET=y to support
RockUSB and UMS gadget.
Remove CONFIG_NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on
cpuid read from eFUSE.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-rock960 related device tree from Linux kernel v6.8.
Add DM_RESET=y to support reset signals.
Add PCI=y, CMD_PCI=y and NVME_PCI=y to support PCIe and NVMe boot.
Add AHCI=y, SCSI_AHCI=y, AHCI_PCI=y and SCSI=y to support PCIe SATA boot.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Remove CONFIG_NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on
cpuid read from eFUSE.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove REGULATOR_PWM=y and DM_REGULATOR_GPIO=y, boards does not use
pwm-regulator or regulator-gpio compatible.
Add USB_XHCI_HCD=y, USB_DWC3=y and USB_DWC3_GENERIC=y to support USB3.
Remove USE_PREBOOT=y to speed up booting, standard boot will init USB
after faster boot media has been evaluated.
Add CMD_ROCKUSB=y, CMD_USB_MASS_STORAGE=y and USB_GADGET=y to support
RockUSB and UMS gadget.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-nanopi-4 related device tree from Linux kernel v6.8.
Add DM_RESET=y to support reset signals.
Add PCI=y, CMD_PCI=y and NVME_PCI=y to support PCIe and NVMe boot.
Add AHCI=y, SCSI_AHCI=y, AHCI_PCI=y and SCSI=y to support M4 SATA HAT.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove REGULATOR_PWM=y, boards does not use pwm-regulator compatible.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-roc-pc related device tree from Linux kernel v6.8.
Add SF_DEFAULT_SPEED=30000000 and SPI_FLASH_SFDP_SUPPORT=y to improve
support for booting from SPI flash.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Remove USE_PREBOOT=y to speed up booting, standard boot will init USB
after faster boot media has been evaluated.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-orangepi device tree from Linux kernel v6.8.
Add DM_RESET=y to support reset signals.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-firefly device tree from Linux kernel v6.8.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-evb device tree from Linux kernel v6.8.
Drop bootph prop for i2c0 and rk808 node, PMIC support is not included
in TPL/SPL and PMIC regulators are working fine in U-Boot proper.
Change to use sdmmc_cd pinconf and drop cd-gpios for card detect pin.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Remove CONFIG_NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on
cpuid read from eFUSE.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-leez-p710 device tree from Linux kernel v6.8.
Add DM_RESET=y to support reset signals.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-eaidk-610 device tree from Linux kernel v6.8.
Add DM_RESET=y to support reset signals.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.
Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.
Remove SPL_TINY_MEMSET=y to use full memset in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-rock-pi-n10 related device tree from Linux kernel v6.8.
Remove SPL_GPIO=y, board does not use gpio in SPL.
Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.
Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.
Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.
Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.
Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-puma related device tree from Linux kernel v6.8.
The vdd_log node is already part of rk3399-puma.dtsi, only keep the
regulator-init-microvolt prop in u-boot.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-gru related device tree from Linux kernel v6.8.
The spi_flash symbol is no longer part of upstream DT, it is re-defined
to allow existing reference use in related u-boot.dtsi-files.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync RK3399 SoC common .dtsi-files from Linux kernel v6.8.
The ethernet0 alias is moved to rk3399-u-boot.dtsi in this patch, the
alias will be added in board specific .dts-files and finally removed
from rk3399-u-boot.dtsi in following patches.
The rng node is replaced with crypto0 and crypto1, both can supply
random numbers.
There is no other intended change with this patch.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SCLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of SCLK_USB3OTGx_REF clocks to fix
reference clock period configuration.
Also replace use of 24000000 with the OSC_HZ constant.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3399-nanopi-4.dtsi try to set parent of and set rate to 100 MHz of the
SCLK_PCIEPHY_REF clock.
The existing enable/disable ops for SCLK_PCIEPHY_REF currently force
use of 24 MHz parent and rate.
Add improved support for setting parent and rate of the pciephy refclk
to driver to better support assign-clock props for pciephy refclk in DT.
This limited implementation only support setting 24 or 100 MHz rate,
and expect npll and clk_pciephy_ref100m divider to use default values.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to
400 MHz using an assigned-clock-rates prop of the CRU node.
U-Boot does not use or need this clock so add dummy support for getting
and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an
updated rk3399.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3399-cru.h with one from Linux kernel v6.2+ and fix use of the
SCLK_DDRCLK name that was only used by U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A few boards have shown to be required to properly configure pinctrl
for the fixed regulator gpio pin used by sdmmc before being able to read
from SD-cards.
Include the related gpio, regulator and pinctrl nodes and enable related
Kconfig options so that pinctrl can be configured in SPL for boards that
may be affected by such issue.
Also change to imply SPL_DM_SEQ_ALIAS for all boards because it must be
enabled for working gpio usage in SPL after a future DT sync.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When RK3399 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:
U-Boot SPL 2024.04-rc4 (Mar 17 2024 - 22:54:45 +0000)
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC1
Card did not respond to voltage select! : -110
mmc_init: -95, time 12
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices (err=-6)
### ERROR ### Please RESET the board ###
Fix this by tagging related sdhci, sdmmc and spi flash pinctrl nodes
with bootph props. Also move bootph for common nodes shared by all
boards to the SoC u-boot.dtsi.
eMMC, SD-Card and SPI flash nodes are also changed to only be tagged
with bootph props for SPL and U-Boot pre-reloc phases.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The initial serial console UART iomux is typically configured in
board_debug_uart_init() at TPL stage on Rockchip platform.
Later stages typically use pinctrl driver to configure iomux UART once
again based on the control FDT.
Include uart related pinctrl nodes in TPL/SPL control FDT to make it
possible for pinctrl driver to configure UART iomux at TPL/SPL stage.
Following debug log message may also be seen at U-Boot pre-reloc stage:
ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
This can be resolved by including bootph prop for U-Bood pre-reloc
phase (bootph-some-ram or bootph-all). However, this has intentionally
been excluded due to including it unnecessarily slows down boot around
200-400 ms.
Also add the clock-frequency prop similar to what has been done for
other Rockchip SoCs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3399-puma is the only supported board that use uart0 for serial
console, other RK3399 boards typically use uart2 for serial console
and may use uart0 for bluetooth.
Move setting bootph prop to board u-boot.dtsi to only include the uart0
node in TPL/SPL control FDT for the rk3399-puma target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The vop nodes should not be included in TPL/SPL control FDT, it should
only be included at U-Boot proper pre-reloc phase.
Change to use bootph-some-ram prop to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort nodes alphabetically by name, symbol or reg addr in RK3399 related
u-boot.dtsi files. Also remove one of the duplicated &pmu nodes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove superfluous bootph-all props already inherited from main soc
u-boot.dtsi file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A lot of RK3399 boards use a u-boot,spl-boot-order of "same-as-spl",
&sdhci and &sdmmc.
Move this to rk3399-u-boot.dtsi and make this default for boards
currently missing a u-boot,spl-boot-order prop.
Before commit a7e69952eb ("rockchip: spl: Cache boot source id for
later use") it was required to include the SPI flash node in the
u-boot,spl-boot-order prop to successfully load FIT from SPI flash.
The SPI flash node reference has been dropped from spl-boot-order from
pinebook-pro, roc-pc and rockpro64 now that "same-as-spl" also gets
resolved to the SPI flash node and loading FIT from SPI flash works
without having the node explicitly referenced in spl-boot-order prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The TPL and/or SPL control FDT on RK3399 boards does not contain any
node with a compatible that is supported by driver/misc/ drivers.
Remove use of xPL_MISC_DRIVERS options to stop including e.g an unused
efuse driver in TPL and/or SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK3399 SoC contain a crypto engine block that can generate random
numbers.
Imply DM_RNG and RNG_ROCKCHIP Kconfig options to take advantage of the
random generator on all RK3399 boards. Also remove the unnecessary use
of a status = "okay" prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The RK3399 SoC support the ARMv8 Cryptography Extensions, use of ARMv8
crypto can speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation to almost all RK3399 boards.
The following boards have been excluded:
- chromebook_bob: SPL max size limitation of 120 KiB
- chromebook_kevin: SPL max size limitation of 120 KiB
Also imply OF_LIVE to help speed up init of U-Boot proper and disable
CONFIG_SPL_RAW_IMAGE_SUPPORT on leez-rk3399 to ensure SPL does not try
to jump to code that failed checksum validation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399-ficus board is only using SPL and not TPL+SPL like all other
RK3399 boards, chromebook bob/kevin excluded. It does not seem to be any
technical reason why this board was left using only SPL.
Switch to use TPL+SPL and to use the common bss and stack addresses
introduced in commit 008ba0d56d ("rockchip: Add common default bss and
stack addresses"). Also add the missing DEFAULT_FDT_FILE option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399-puma board is currently using SPL stack and bss addr in SRAM,
the same addr typically used by TPL, this differs from most other RK3399
boards.
Switch to use the common bss and stack addresses introduced in commit
008ba0d56d ("rockchip: Add common default bss and stack addresses").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On rk3399-puma the FIT payload is located at sector 0x200 compared
to the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and IDBlock is located at
sector 64, the combined size of TPL+SPL (idbloader.img) cannot take up
more than 224 KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chromebook bob and kevin typically run coreboot as the initial boot
loader, however, U-Boot proper can be used as a secondary boot loader.
It is also possible to run U-Boot SPL and proper bare metal, with SPL
and the U-Boot payload loaded from SPI flash.
Because of this chromebook bob and kevin only use SPL and not TPL+SPL
like other RK3399 boards, this mean that SPL is loaded to and run from
SRAM instead of DRAM.
The U-Boot payload is located at 0x40000 (256 KiB) offset in SPI flash
and because the BROM only read first 2 KiB for each 4 KiB page, the size
of SPL (idbloader.img) is limited to max 128 KiB.
The chosen bss start address further limits the size of SPL to 120 KiB.
0xff8e0000 (SPL_BSS_START_ADDR) - 0xff8c2000 (SPL_TEXT_BASE) = 0x1e000
Update SPL_MAX_SIZE to reflect the 120 KiB max size limitation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Tested-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The file include/eeprom.h is used only in some legacy non-DM I2C EEPROM
access cases. Remove most inclusions of this file as they are not
needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
This follows the example of RISC-V where <asm/global_data.h> includes
<asm/u-boot.h> directly as "gd" includes a reference to bd_info already
and so the first must include the second anyhow. We then remove
<asm/u-boot.h> from all of the places which include references to "gd"
an so have <asm/global_data.h> already.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from the remainder of the files under arch/arm and
when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all fsl-layerscape related files and when needed
add missing include files directly.
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-aspeed files and when needed add missing
include files directly.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-bcmbca, mach-bcm283x and bcm* CPU
directory files and when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-imx, CPU specific sub-directories and
include/asm/arch-mx* files and when needed add missing include files
directly.
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-meson files and when needed add missing
include files directly.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-rockchip and include/asm/arch-rockchip
files and when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-s5pc1xx and cpu/armv7/s5p-common files
and when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-sunxi and board/sunxi files and when
needed add missing include files directly.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-stm32 and mach-stm32mp files and when
needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-tegra and include/asm/arch-tegra files
and when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-u8500 files and when needed add missing
include files directly.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all mach-versal-net, mach-versal, mach-zynq and
mach-zynqmp files and when needed add missing include files directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
A few headers rely on indirect inclusion of <linux/types.h> or
<linux/kernel.h> so add them directly. In the case of <netdev.h> add a
"struct bd_info;" as well rather than the large header chain to resolve
that.
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove <common.h> from all powerpc architecture files and when needed add
missing include files directly. This typically involves using
<asm/u-boot.h> instead due to the difficult nested structure of the
PowerPC includes themselves.
Signed-off-by: Tom Rini <trini@konsulko.com>
With the migration to Kconfig complete, we can now add some previously
missing dependencies to some commands.
Signed-off-by: Tom Rini <trini@konsulko.com>
To ensure that board config headers which set values here in the CFG_SYS
range are used, this header needs to include <config.h> directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to avoid needing to add <command.h> to this file, add "struct
cmd_tbl" before the prototype for do_bdinfo().
Signed-off-by: Tom Rini <trini@konsulko.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20614
- Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL if
necessary. This may be necessary due to e.g. size constraints of the SPL.
- dd SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be
disabled in SPL if necessary. This may be necessary due to e.g. size
constraints of the SPL.
- Differentiate between CAAM and DCP in Kconfig entry.
Differentiate between "Enable Random Number Generator support" and
"Enable Random Number Generator support" in Kconfig entry, mark the
first as CAAM and the second as DCP, otherwise users cannot easily
decide which of the options is which and enable the correct one.
Signed-off-by: Marek Vasut <marex@denx.de>
Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can
be disabled in SPL if necessary. This may be necessary due to e.g.
size constraints of the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL
if necessary. This may be necessary due to e.g. size constraints of
the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Joel is no longer with Broadcom. Remove his email from bcmbca maintainer
list and replace him with myself for stack protection maintainer.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
On AM62x SK we can see a boot failure with signature "alloc space
exhausted", so fix by increasing size of SPL_STACK_R_MALLOC_SIMPLE_LEN.
Fixes: 128f81290b ("arm: dts: k3: binman: am625: add support for signing TIFSSTUB Images")
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
For 4GB dram size, the dram is divided into 2 banks and
the address space of these 2 banks are not concatenated.
Limit the gd->ram_top to not exceed bank0 top to prevent
accessing invalid memory region.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
When u-boot enable CONFIG_SYS_BOOT_RAMDISK_HIGH, rootfs image relocated
from FIU address space to memory address before jump to kernel.
Since Arbel reserved memory from 0x00000000 to 0x06200000 for tip image,
and rootfs image may too large that cannot found a suitable location
before 128MB(0x8000000), so increase mapping size from 128MB to 192MB.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
When parsing option 40 (network information service domain) the
option length is in variable 'oplen' and not in 'size'.
Addresses-Coverity-ID: 492765 Uninitialized variables (UNINIT)
Fixes: 8ab388bfdb ("net: add support to parse the NIS domain for the dhcp options")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Change in v2:
- Fix applies to all block devices, not just MMC.
If partition init is not completed within the gpt write,
the gpt partition list will not be updated.
Signed-off-by: Kishan Dudhatra <kishan.dudhatra@siliconsignals.io>
Commit 37cb626da2 ("mmc: sdhci: Add Support for ADMA2") introduced
ADMA_DESC_LEN == 16 (64 bit case), but it was never used before commit
74755c1fed ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops").
"sizeof(struct sdhci_adma_desc)" (== 12 for 64bit case) was used instead.
Confusion probably originates from Linux commit 685e444bbaa0
("mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode"), but
the latter "V4 mode" was never ported to U-Boot.
Fixes: 74755c1fed ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops")
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Tested-by: Judith Mendez <jm@ti.com>
Pull request efi-2024-07-rc2
Documentation:
* correct description of 'env print -e'
UEFI:
* remove superfluous efi_restore_gd after EFI_CALL
* terminate efidebug test bootmgr early on error
* do not install device-tree if bootmgr fails
* pass GUID by address to efi_dp_from_lo
* remove dead code in efi_var_mem_init()
* enable QueryVariableInfo at runtime for file backed variables
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add configs related to ethernet and ethernet boot command for Sophgo Milk-V
Duo board
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Initialize register in cv1800b ethernet phy to make it compatible with
generic phy driver
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Let the sbi command detect the coreboot and oreboot SBI Implementation IDs
defined in SBI specification v2.0.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
OpenSBI has implemented the Supervisor Software Events Extension.
Allow detecting it in the sbi command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add sysreset configs as well as poweroff and reset commands for Sophgo
Milk-V Duo board.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Bind cv1800b sysreset driver for Sophgo Milk-V Duo board in board_init
function.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Currently, only the receive delay is configured while the transmit delay
is not set, which may result in errors when writing to the file. This issue
can be resolved by setting PHY_TX_SRC_INVERT to SDHCI_PHY_TX_RX_DLY.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The instruction and data cache line sizes of Andes core
are 64-byte. Select SYS_CACHE_SHIFT_6 for RISCV_NDS so
the SYS_CACHELINE_SIZE is enabled with a default value.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Previous patches added QueryVariableInfo at runtime tests and
split a common function that can be used at boottime. Weire it
up and run a similar set of tets. While at it move a test which is
checiking for 0 available storage in the common code
Add tests for
- Test QueryVariableInfo returns EFI_SUCCESS
- Test null pointers for the function arguments
- Test invalid combination of attributes
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Since we support QueryVariableInfo at runtime now add the relevant
tests. Since we want those to be reusable at bootime, add them
in a separate file
Add tests for
- Test QueryVariableInfo returns EFI_SUCCESS
- Test null pointers for the function arguments
- Test invalid combination of attributes
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Since commit c28d32f946 ("efi_loader: conditionally enable SetvariableRT")
we are enabling the last bits of missing runtime services.
Add support for QueryVariableInfo which we already support at boottime
and we just need to mark some fucntions available at runtime and move
some checks around.
It's worth noting that pointer checks for maxmimum and remaining
variable storage aren't when we store variables on the RPMB, since the
Secure World backend is already performing them.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The check of the return code is already done a few lines above.
Although it doesn't cause any functional issues, remove the superfluous
checks
Addresses-Coverity-ID: 492766 Control flow issues (DEADCODE)
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If 'env print -e' is invoked without variable name, all UEFI variables are
listed.
Describe that 'env print -e' requires CONFIG_HEXDUMP=y to print content of
UEFI variables.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If the UEFI boot manager fails there is no point in installing the
device-tree as a configuration table.
Unload image if device-tree cannot be installed.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The image is not unloaded if a security violation occurs.
If efi_set_load_options() fails, we do not free the memory allocated for
the optional data. We do not unload the image.
* Unload the image if a security violation occurs.
* Free load_options if efi_set_load_options() fails.
* Unload the image if efi_set_load_options() fails.
Fixes: 53f6a5aa86 ("efi_loader: Replace config option for initrd loading")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
EFI_CALL() invokes __efi_entry_check() which executes set_gd(efi_gd).
There is no need to execute set_gd(efi_gd) again via efi_restore_gd().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Daniel Schultz <d.schultz@phytec.de> says:
This patch series extends PHYTEC's SOM detection by minor
fixes, a generic helper function and a new valid flag.
Moreover, it adds a module to provide access to the SOM
detection for our TI AM6 products.
Add all functions to read each SOM option from the EEPROM
image and detect whether it's the correct product for this
image.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
The ptr variable is currently defined as int and sizeof
returns the size of the eeprom data struct as Byte (32 in total).
In case the eeprom is empty, the check, if the eeprom is empty,
will most likely stop after 8 iterations because it will continue
with the stack which should contain some data. Therefore, the
init function will detect an empty EEPROM as API0 and return with
the valid flag set to True.
Fixes: dc22188cdc ("board: phytec: Add common PHYTEC SoM detection")
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
For all of the functions that access the eeprom_data, make sure these
data are valid. Use the valid member of the phytec_eeprom_data struct.
This fixes a bug where only the API revision check guarded against
accessing rubbish. But if API revision was e.g. 6, eeprom setup failed
before, but phytec_get_imx8m_eth would still happily access the data.
Fixes: dc22188cdc ("board: phytec: Add common PHYTEC SoM detection")
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Add a new nember to the eeprom_data that indicates whether the
associated data is valid or not. Make use of this new member in the
phytec_eeprom_data_init function by setting the valid value
appropriately.
Move the eeprom data to a new struct payload that holds
the payload of the eeprom.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Add a generic function to apply overlays in our board code to not
implement the same logic in different PHYTEC products.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
The phycore-rk3288 can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for rockchip vendor prefix accordingly.
Move device tree nodes required for u-boot to rk3288-phycore-rdk-u-boot.dtsi
such as chosen, i2c_eeprom_id and it's alias.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
The phycore-am64x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
While at it, drop the redundant definitions of AM642_PHYBOARD_ELECTRA_DTB
& SPL_AM642_PHYBOARD_ELECTRA_DTB from the binman dtsi file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
The phycore-am62x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Judith Mendez <jm@ti.com> says:
The following patch series includes a MMC tuning algorithm
fix according to the following published paper [0].
This seris also includes fixes for OTAP/ITAP delay values
in j721e_4bit_sdhci_set_ios_post and for HS400 mode.
For DDR52 mode, also set ENDLL=1 and call am654_sdhci_setup_dll()
instead of am654_sdhci_setup_delay_chain() according to
device datasheet[1].
[0] https://www.ti.com/lit/an/spract9/spract9.pdf
[1] https://www.ti.com/lit/ds/symlink/am62p.pdf
At HS400 mode the ITAPDLY value is that from High Speed mode
which is incorrect and may cause boot failures.
The ITAPDLY for HS400 speed mode should be the same as ITAPDLY
as HS200 timing after tuning is executed. Add the functionality
to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY.
Fixes: c964447ea3 ("mmc: am654_sdhci: Add support for input tap delay")
Signed-off-by: Judith Mendez <jm@ti.com>
According to the device datasheet [0], ENDLL=1 for
DDR52 mode, so call am654_sdhci_setup_dll() and write
itapdly after since we do not carry out tuning.
[0] https://www.ti.com/lit/ds/symlink/am62p.pdf
Fixes: c964447ea3 ("mmc: am654_sdhci: Add support for input tap delay")
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Set itap_del_ena if ITAPDLY is found in DT or if the tuning
algorithm was executed and found the optimal ITAPDLY. Add the
functionality to save ITAPDLYENA that can be referenced later
by storing the bit in array itap_del_ena[].
Signed-off-by: Judith Mendez <jm@ti.com>
U-Boot is failing to boot class U1 UHS SD cards due to incorrect
OTAP and ITAP delay select values. Update OTAP and ITAP delay select
values from DT.
Fixes: c7d106b4eb ("mmc: am654_sdhci: Update output tap delay writes")
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Currently the sdhci_am654 driver only supports one tuning
algorithm which should be used only when DLL is enabled. The
ITAPDLY is selected from the largest passing window and the
buffer is viewed as a circular buffer.
The new tuning algorithm should be used when the delay chain
is enabled; the ITAPDLY is selected from the largest passing
window and the buffer is not viewed as a circular buffer.
This implementation is based off of the following paper: [1].
Also add support for multiple failing windows.
[1] https://www.ti.com/lit/an/spract9/spract9.pdf
Fixes: a759abf569 ("mmc: am654_sdhci: Add support for software tuning")
Signed-off-by: Judith Mendez <jm@ti.com>
Caleb Connolly <caleb.connolly@linaro.org> says:
This is a subset of [1]. With more platform maintainers switching to
OF_UPSTREAM I didn't want to get in the way (it has also proven more
difficult than I hoped to remove only the fully compatible header
files).
This series removes only the dt-bindings headers which contain generic
data like GPIO flags, input event codes, etc.
It then implements support for building all DTBs for a vendor with
OF_UPSTREAM_BUILD_VENDOR. This removes the need to maintain a set list
of DTBs that can be built by U-Boot and opens up the possibility of new
boards becoming supported "by default" just by landing their DT
upstream.
[1]: https://lore.kernel.org/u-boot/20240321-b4-upstream-dt-headers-v2-0-1eac0df875fe@linaro.org
This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
all the devicetree files for a given vendor to be compiled. This is
useful for Qualcomm in particular as most boards are supported by a
single U-Boot build just provided with a different DT.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Amlogic boards builds
MD Danish Anwar <danishanwar@ti.com> says:
The series introduces device tree and config changes and AM65x
to enable ICSSG driver. The series also enables SPL_LOAD_FIT_APPLY_OVERLAY
for AM65x in order to load overlay over spl.
The ICSSG2 node is added in device tree overlay so that it remains in
sync with linux kernel.
This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.
The users need to set env variables fw_storage_interface, fw_dev_part,
fw_ubi_mtdpart, fw_ubi_volume to indicate which storage medium and
partition they want to use to load firmware files from. By default the env
fw_storage_interface=mmc and fw_dev_part=1:2 but users can modify these
envs as per their requirements.
When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
When CONFIG_TI_ICSSG_PRUETH is enabled, add config name check for the
icssg2 overlay in board_fit_config_match() API.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Add ICSSG2 overlay and configuration to tispl and u-boot images.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Currently, keep-syms-lto.c is being generated if LTO is enabled but unlike
keep-syms-lto.o it is not being ignored, so lets add keep-syms-lto.* to
.gitignore.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
With CONFIG_CMD_BLOBLIST=y, CONFIG_BLOBLIST=n linker errors occur:
usr/bin/ld: cmd/bloblist.o: in function `do_bloblist_list':
cmd/bloblist.c:27:(.text.do_bloblist_list+0x6):
undefined reference to `bloblist_show_list'
/usr/bin/ld: cmd/bloblist.o: in function `do_bloblist_info':
cmd/bloblist.c:19:(.text.do_bloblist_info+0x6):
undefined reference to `bloblist_show_stats'
Fixes: 4aed227623 ("bloblist: Add a command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To workaround an issue in AM642 we reset the SoC in early boot. For that
we first probed the sysreset driver by calling uclass_get_device(). The
ti-sci sysreset driver is now probed during the ti-sci firmware probe.
Update this call to probe the firmware driver which will then probe
the sysreset driver allowing do_reset() to again function as expected.
Reported-by: Jonathan Humphreys <j-humphreys@ti.com>
Fixes: fc5d402834 ("firmware: ti_sci: Bind sysreset driver when enabled")
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Kamlesh Gurudasani <kamlesh@ti.com>
Remove not needed variables from environment.
- boot_scripts is not needed, the default value is just fine and
already includes boot.scr
- setup variable used to be executed from some bootscript, however
it's not required and there is no point on having this small helper
here
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add files produced by compilation of TI platforms:
*.ti-secure(-rom)
*.map
*-board-config
custMpk.pem
*.bin_*
*.fit
*.itb
tispl.bin_unsigned
Signed-off-by: Andrea Calabrese <andrea.calabrese@amarulasolutions.com>
In Linux, we allow sleep moci to be turned off when the carrier board
supports it and the system is in suspend. In U-Boot, however, we want
the sleep moci to be always on. So we use a gpio hog and disable the
regulator. This change is necessary because we switched to upstream
device tree files with commit c07bba7a2c ("verdin-am62: move verdin
am62 to OF_UPSTREAM"). A recent upstream patch removes the gpio hog from
the Linux device tree, so we need to add it to the u-boot dtsi. The
following patch will remove the gpio hog from the Linux device tree:
https://lore.kernel.org/linux-devicetree/20240301084901.16656-1-eichest@gmail.com/
The U-Boot patch can be applied without it and will not break the build.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
At present only MCU domain ESM is probed, this means errors
occurred in mcu domain will be propagate to MCU_SAFETY_ERRORn.
MCU ESM accepts SOC_SAFETY_ERRORn signal as Error
event and propagate to MCU_SAFETY_ERRORn.[0]
Therefore adding support to probe both main domain and mcu
domain ESM.
[0]: https://www.ti.com/lit/zip/spruil1
spruil1c.pdf from zip
Figure 12-1244. ESM Modules Overview
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Adds tifsstub binaries, this is required for deepsleep functionality.
This implements the same change as commit 128f81290b ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Linux kernel driver drivers/mfd/tps6594-i2c.c is using different
name for compatible for tps6594 family PMIC.
After sync of Linux kernel DT to u-boot for TI platforms
J7200, J721S2 and J784S4 PMIC is no longer getting probed.
So updating compatible field to align with Linux driver and DT.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reuse TPS65941 regulator driver to adds support for
TPS65224 PMIC's regulators. 4 BUCKs and 3 LDOs, where
BUCK1 and BUCK2 can be configured in dual phase mode.
Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Use function callbacks for volt2val, val2volt and slewrate lookups.
This makes it easier to add support for TPS65224 PMIC regulators.
Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Adds macros for buck and ldo ids and switched to using switch
case instead of if else in probe functions. Helps in adding
support for TPS65224 PMIC.
Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Adds compatible and data field values of TPS65224 driver in
TPS65941 PMIC driver.
Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Re-use the TPS65941 PMIC driver for TPS65224 PMIC.
Add additional macros of TPS65224 to aid in the driver
re-use.
Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Rework the flash.bin image generation such that it uses the new binman
nxp_imx8mimage etype. This way, the flash.bin is assembled in correct
order using plain binman, without any workarounds or sections assembled
in special DT node order.
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> # imx8mm_venice
Tested-by: Fabio Estevam <festevam@gmail.com> # imx8mm-evk and imx8mn-evk
Signed-off-by: Marek Vasut <marex@denx.de>
Include imx8mq-u-boot.dtsi in the board -u-boot.dtsi to pull in binman
configuration instead of duplicating it in the board -u-boot.dtsi again.
Drop the duplicate binman configuration.
Signed-off-by: Marek Vasut <marex@denx.de>
Add new binman etype derived from mkimage etype which generates configuration
input file for mkimage -T imx8mimage, and runs the mkimage on input data. The
mkimage -T imx8mimage is used to generate combined image with SPL and DDR PHY
blobs which is bootable on i.MX8M.
The configuration file generated here is equivalent of imx8mimage.cfg, which
is the file passed to '$ mkimage -T imx8mimage -n imx8mimage.cfg ...' . The
settings generated into the imx8mimage.cfg file are configured via supported
binman DT properties, nxp,boot-from, nxp,loader-address, nxp,rom-version.
Signed-off-by: Marek Vasut <marex@denx.de>
Enable PCIe/NVMe support on DH i.MX8M Plus DHCOM PDK3. Except for
the configuration options which are enabled, add slight adjustment
to board u-boot.dtsi, which is necessary as there is currently no
driver for the I2C PCIe clock generator. Since the generator is
strapped to be always on, it is possible to supplant the generator
functionality by fixed-clock.
Signed-off-by: Marek Vasut <marex@denx.de>
In commit 51aaaf5e79 ("board: toradex: imx: Remove not needed env variables")
the empty definition of fdt_fixup variable was removed, however this was
still referenced from the boot command leading to boot failures:
## Error: \"fdt_fixup\" not defined`
Fix this by removing "run fdt_fixup" from the boot command and instead
enable CONFIG_OF_ENV_SETUP in the defconfig that would achieve the same
but in a more robust way (it works fine even if the variable is not
defined).
Fixes: 51aaaf5e79 ("board: toradex: imx: Remove not needed env variables")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Minor changes on this PR.
Igor added some orphaned OP-TEE related files on the proper section
of MAINTAINERS and fixed a potential buffer overflow in tee-sandbox
RK356x-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once
since they are impacted by this change.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When Rockchip TPL blob is used, the memory areas that can be used for
DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if
Rockchip TPL blob is used. Note that it is technically possible we need
more if one of those 10 areas overlaps with reserved memory area,
forcing us to split it in two. But a default doesn't need to handle all
cases, only most.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allow RK3568 and RK3588 based boards to get the RAM bank configuration
from the ROCKCHIP_TPL stage instead of the current logic. This fixes
both an issue where 256MB of RAM is blocked for devices with >= 4GB
of RAM and where memory holes need to be defined for devices with
more than 16GB of RAM. In the event that neither SoC is used or the
ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas
defined in mem_map data struct in SoC C files, but only if the DRAM area
overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward
to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1
(e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as
well, but the DDR_MEM tag seems to be pretty much stable (though BL31
seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and
it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some variants of the ROCK Pi 4 series have an SPI flash chip populated
which can be booted from. This patch enables support in U-Boot for
building the image for the SPI flash, support for booting U-Boot from the
SPI flash chip and support in U-Boot for accessing the SPI flash using
`sf` commands.
Not all variants (e.g. ROCK Pi 4B, ROCK 4 Model C Plus, ROCK 4SE) come
populated with an SPI flash chip, but have the footprint on the board so
a user could solder their own to the board. With this patchset applied,
these board variants without an SPI flash chip still boot from MMC.
I have enabled support for both Winbond and XTX SPI flash devices since
different hardware variants have different devices populated:
- `rockpi4_v13_sch_20181112.pdf` contains a Winbond part `W25Q64FWZPIG`
- `rockpi4_v14_sch_20210114.pdf` contains an XTX part `XT25F32BWOIGT`
The ROCK Pi 4 I have is marked as "ROCK PI 4 v1.48" and contains an SPI
flash chip from XTX:
=> sf probe
SF: Detected xt25f32 with page size 256 Bytes, erase size 4 KiB, total 4 MiB
In the interest of supporting all board variants and not regressing
existing users who boot from MMC, I have enabled support for booting from
both SPI flash chip variants in the defconfig and left the environment
storage location as MMC to not break existing users who have the
environment stored on MMC.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
To prepare for ROCK Pi 4A SPI flash support, sync the DTS from Linux which
includes an SPI flash node.
Kernel tag: v6.6-rc1
Kernel commits:
- eddf73029770 ("arm64: dts: rockchip: Enable internal SPI flash for ROCK \
Pi 4A/B/C")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
The vop node should not be included in TPL/SPL control FDT, it should
only be included at U-Boot proper pre-reloc phase.
Change to use bootph-some-ram prop to fix this.
Fixes: 6794063d50 ("ARM: dts: rk3328: Enable VOP for bootph-all")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Port the RK3328 part of the Rockchip IO-domain driver from linux.
This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.
Enable by default on all RK3328 boards, skip rk3328-evb because this
target is typically also used on miscellaneous boards and boxes not
fully supported by U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK3328 SoC support ARMv8 Cryptography Extensions and use of the
ARMv8 crypto extensions help speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Also imply OF_LIVE to help speed up init of U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort imply statements under ROCKCHIP_RK3328 alphabetically and remove
ENABLE_ARM_SOC_BOOT0_HOOK, DEBUG_UART_BOARD_INIT and SYS_NS16550, they
are already implyed or selected by ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use a wildcard to simplify the list of board DT files in the MAINTAINERS
file for the Radxa Rock 2 Square board.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Display TPL init information message only when TPL_BANNER_PRINT
configuration entry is set. This allows to disable information
message in case logs on UART are unwanted.
Update parent ifdef condition to check also CONFIG_TPL_SERIAL
to match logic of the non-PX30 TPL implementation.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The commit 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f1 ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The generic RK35xx board targets are intended to be used as a bare
minimum target that can be used to e.g. boot boards that mostly follow
reference hw design before a board spefic target has been added or for
flashing and recovery purposes.
Disable BOOTMETH_VBE, NET and ADC as these features are not intended to
ever be used by these minimal generic board targets.
Enable SYSRESET_PSCI to let TF-A handle sysreset from U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for USB OTG, RockUSB and UMS to the generic RK3588S/RK3588
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The default pinctrl for UART2 is using M1 iomux, however, all other
supported RK3588 boards in U-Boot use M0 iomux for UART2.
Change to use the M0 pinctrl for UART2 to match other supported boards.
Fixes: b54c3d0dd6 ("rockchip: board: Add minimal generic RK3588S/RK3588 board")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for USB OTG, RockUSB and UMS to the generic RK3566/RK3568
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for booting from SPI flash using the generic RK3566/RK3568
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing emmc_datastrobe and sdmmc0_det pinctrl to fix possible issue
reading from eMMC or SD-card. Also use correct node for mmc1 alias.
Fixes: 683f61a13f ("rockchip: board: Add minimal generic RK3566/RK3568 board")
Fixes: 363cbd5781 ("rockchip: rk3568-generic: Enable eMMC HS200 mode")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable SPL_FIT_SIGNATURE=y and LEGACY_IMAGE_FORMAT=y to validate FIT
images checksum in SPL.
Change to SPL_MAX_SIZE=0x40000 to allow SPL up to 256 KiB in size.
Enable SPL_DM_SEQ_ALIAS=y and SPL_PINCTRL=y to ensure eMMC and SD-card
pinctrl is configured in SPL.
Enable SYS_NS16550_MEM32=y to use readl/writel in serial driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK35xx boards are expected to use the dwc3-generic driver and not the
xhci-dwc3 driver.
Remove the USB_XHCI_DWC3 option to ensure that the dwc3-generic driver
is used.
Fixes: 153ac950a5 ("board: rockchip: Add the Turing RK1 SoM")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the
storage device sequence number matches in both SPL and U-Boot proper.
Fixes: 9fdd9a5469 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fix CoolPi 4 Model B and CoolPi CM5 EVB .dtb-file entries in Makefile.
Fixes: 3e15dee38d ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation.
Fixes: 3e15dee38d ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SF_DEFAULT_SPEED Kconfig option got lost during merge and this
prevent reading FIT from SPI flash.
Restore the SF_DEFAULT_SPEED option to fix this.
Fixes: 8a94c376f6 ("rockchip: Use common bss and stack addresses on RK356x")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the
storage device sequence number matches in both SPL and U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After the commit aca95282c1 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After the commit aca95282c1 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes
is sorted by reg addr then by alphabetical order.
This has no intended change beside sorting existing nodes and removing
a duplicated usbdpphy0_grf node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK35xx SoCs contain a crypto engine block that can generate random
numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take
advantage of the random generator.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL_ROCKCHIP_BACK_TO_BROM should normally only be enabled when BROM
should load U-Boot binary. SPL on Anbernic RGxx3 devices load TF-A and
U-Boot proper from FIT images and does never jump back to BROM from SPL.
Remove the superfluous Kconfig option from defconfig to align with other
RK356x boards.
This patch have no intended change in boot behavior.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop
the superfluous REGULATOR_PWM Kconfig options.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SCLK_SFC can be set to a rate of 24, 50, 75, 100, 125 or 150 MHz.
However, clk_set_rate() will fail unless one of those exact rates are
used, and with newer and updated device tree files that contain
spi-max-frequency values that does not exactly match these rates use of
SPI flash may fail.
Fix this by using the highest possible rate that exceeds or is equal to
the requested rate.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block.
Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix
reference clock period configuration.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix
reference clock period configuration.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move cru_rk3308.h and grf_rk3308.h to arch-rockchip to match path used
for all other Rockchip SoCs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3308-rock-pi-s with new defaults.
Add OF_LIBFDT_OVERLAY=y to support device tree overlays.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to
allow use of U-Boot cmdline.
Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to
allow full use of USB 2.0 host and otg ports.
Enable EFI_LOADER to allow EFI boot.
Also fix use of USB 2.0 otg port by removing improper use of phy-supply
and regulator-always-on props.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3308-roc-cc with new defaults.
Add OF_LIBFDT_OVERLAY=y to support device tree overlays.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to
allow use of U-Boot cmdline.
Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to
allow full use of USB 2.0 host and otg ports.
Enable EFI_LOADER to allow EFI boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3308-evb with new defaults.
Add OF_LIBFDT_OVERLAY=y to support device tree overlays.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Use DEBUG_UART_BASE=0xFF0E0000 and disable DEBUG_UART_BOARD_INIT to
make debug uart use uart4, same as stdout-path prop.
Remove BOOTDELAY=0, SYS_CONSOLE_INFO_QUIET=y and enable more CMD to
allow use of U-Boot cmdline.
Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
Add PHY_ROCKCHIP_INNO_USB2=y, DM_USB_GADGET=y and remove USB_DWC2=y to
allow full use of USB 2.0 host and otg ports.
Enable EFI_LOADER to allow EFI boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync device tree from linux v6.8 and rename the rockchip,rk3308-mac
compatible in gmac_rockchip driver to match upstream linux.
Also move rk3308-roc-cc gmac node to u-boot.dtsi to not break features
not enabled in upstream device tree.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add clkout_ctl and phy_sus regs to support USB2PHY for RK3308.
Based on linux commit 31f840e7ff3e ("phy: phy-rockchip-inno-usb2: add
support for RK3308 USB phy").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support to get and set the SCLK_RTC32K clock rate.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
[jonas@kwiboo.se: Update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When RK3308 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:
U-Boot SPL 2024.04-rc4 (Mar 16 2024 - 12:36:12 +0000)
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC1
Card did not respond to voltage select! : -110
mmc_init: -95, time 12
spl: mmc init failed with error: -95
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices (err=-6)
### ERROR ### Please RESET the board ###
Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.
Imply SPL_PINCTRL and SPL_DM_SEQ_ALIAS to apply correct pinconf before
trying to load FIT from a device.
Move u-boot,spl-boot-order to soc u-boot.dtsi and define both sdmmc and
emmc nodes as fallback.
Also fix boot from eMMC (SD NAND) on ROCK Pi S by using correct pinctrl.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK3308 SoC contain a crypto engine block that can generate random
numbers.
Add rng node to soc u-boot.dtsi and enable Kconfig options to take
advantage of the random generator.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
memory. The rockchip_otp driver already support the RK3308 variant.
However, the device tree is missing a node to enable use of OTP.
Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
driver and enable use of misc_init_r() to set ethaddr based on cpu id.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK3308 SoC support ARMv8 Cryptography Extensions and use of the
ARMv8 crypto extensions help speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation on all RK3308 boards.
Also disable CONFIG_SPL_RAW_IMAGE_SUPPORT in board defconfigs to ensure
SPL does not try to jump to code that failed checksum validation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sort imply statements under ROCKCHIP_RK3308 alphabetically and remove
the config SPL_SERIAL statement from soc Kconfig file, it is already
implyed in arch Kconfig.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update MAINTAINERS files for RK3308 boards to include related device
tree files. Also add myself as a reviewer for the ROCK Pi S board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When debugging the SPL boot order, the node ID of a device which hasn't
been found is printed but it can be quite hard to relate that to the
specific devicetree node. To aid debugging, print the node path instead of
the cryptic node ID.
Original debug message:
board_boot_order: could not map node @73c to a boot-device
With this patch applied this becomes e.g:
board_boot_order: could not map node /spi@ff1d0000/flash@0 to a boot-device
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The STM32_RST line is routed to the ATtiny microcontroller
PA0/RESET/UPDI pin. By driving the PX30 SoC pin as GPIO output high, we
prevent external UPDI to be used for flashing without first putting this
pin as GPIO input, an extra step we could avoid in userspace.
There's an external hardware pull-up strong enough to keep the STM32_RST
state high on ATtiny side but weak enough it can be overridden by
external UPDI. This also means it is safe to use for the STM32 variant,
where STM32_RST line will be in the same state as if output high was
used.
The Q7 standard specifies that MFG_NC1 and MFG_NC2 (used for UPDI for
Ringneck) pins should neither be driven by the carrierboard, nor have
pull-up or pull-down resistors. This means this commit is safe to use
regardless of the carrierboard this module would be connected to
(provided it follows the Q7 standard).
Fixes: 6acdd63e87 ("rockchip: ringneck-px30: always reset STM32 companion controller on boot")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing boot source id <-> device tree node path mapping for SPI NOR
flash on PX30, RK3288, RK3308, RK3368 and RV1126.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Rockchip BROM writes a boot source id at CFG_IRAM_BASE + 0x10, this id
indicates from what storage media TPL/SPL was loaded from.
SPL uses this id to determine what device "same-as-spl" represent when
determining from where FIT should be loaded. This works as long as the
boot_devices array contain a matching id <-> node path entry.
However, SPL typically load a small part of TF-A into SRAM and on RK3399
this overwrites the CFG_IRAM_BASE + 0x10 addr used for boot source id.
For affected devices the u-boot,spl-boot-device would not be set when
booting from SPI flash and the flash@0 node was not explicitly listed
in the u-boot,spl-boot-order prop.
Here boot source id is 3 before FIT images is loaded, and 0 after:
U-Boot SPL 2024.04-rc4 (Mar 15 2024 - 17:26:19 +0000)
board_spl_was_booted_from: brom_bootdevice_id 3 maps to '/spi@ff1d0000/flash@0'
Trying to boot from SPI
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256+ OK
## Checking hash(es) for Image u-boot ... sha256+ OK
## Checking hash(es) for Image fdt-1 ... sha256+ OK
## Checking hash(es) for Image atf-2 ... sha256+ OK
## Checking hash(es) for Image atf-3 ... sha256+ OK
board_spl_was_booted_from: failed to resolve brom_bootdevice_id 0
spl_decode_boot_device: could not find udevice for /mmc@fe330000
spl_decode_boot_device: could not find udevice for /mmc@fe320000
spl_perform_fixups: could not map boot_device to ofpath: -19
Use a static brom_bootsource_id_cache to save the boot source id after
an initial read from SRAM to fix this, this allow spl_perform_fixups()
to resolve correct boot source path for "same-as-spl" after SPL have
loaded TF-A related FIT images into memory.
With this the spl-boot-device prop can correctly be resolved to the
SPI flash node in the control FDT:
=> fdt addr ${fdtcontroladdr}
Working FDT set to f1ee6710
=> fdt list /chosen
chosen {
u-boot,spl-boot-device = "/spi@ff1d0000/flash@0";
stdout-path = "serial2:1500000n8";
u-boot,spl-boot-order = "same-as-spl", "/mmc@fe330000", "/mmc@fe320000";
};
Fixes: d57e16c7e7 ("rockchip: find U-boot proper boot device by inverting the logic that sets it")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Currently fetching files bigger that cause a data transfer greater than
U16_MAX fails.
The reason is that the specification defines the datalength register
as a 16 bit wide register, but in u-boot it is used as if it is an
32 bit register. Therefore values greater than U16_MAX cause an
infinite loop inside u-boot. U-boot expects to get more data from
interface/hardware then it will ever get and therefore inifintely waits
for more data that will never come.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
According to the SD Host Controller Simplified Specification v4.20,
the multiplier value M is one more than the Clock Multiplier field.
Copied code from Linux project. drivers/mmc/host/sdhci.c line 4405
Signed-off-by: cmachida <curtis.machida@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
The linux commit f722e650d965 ("mmc: core: add support for disabling
HS400 mode via DT") added support for a no-mmc-hs400 prop.
Add support for the no-mmc-hs400 prop to disable HS400 host caps.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
eMMC nodes in linux device tree files typically only contain a mmc-hs400
prop to signal support for both HS400 and HS200. However, U-Boot require
an explicit mmc-hs200 prop to signal support for the HS200 mode.
Fix this by follow linux and imply HS200 cap when HS400 cap is signaled
using a mmc-hs400 prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobrma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.
Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.
sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.
The above is a port of Linux kernel commit 54552e4948cbf
In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.
Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Add orphaned TEE/OP-TEE-related files to TEE subsystem entry in
MAINTAINERS. This includes:
- optee_rpmb cmd and test for it
- Misc. OP-TEE tests
- OP-TEE SCMI agent implementation
- Documentation, including device tree bindings
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Support is added for 5 new Qualcomm SoCs:
* QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2
respectively. SM6115 is also used in some mid-range smartphones/tablets.
Initial support includes buttons and USB (host and gadget).
* SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship
smartphones. The board can boot to a U-Boot prompt, but is missing regulators
necessary for USB support.
* SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024
respectively. Found on many high end smartphones.
In addition:
* Support is added for the Schneider HMIBSC board.
* mach-snapdragon switches to OF_UPSTREAM
* IPQ40xx gets several regressions fixed and some overall cleanup.
* The MSM serial driver gains the ability to generate the bit-clock
automatically, no longer relying on a custom DT property.
* The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles
don't need to be added).
* Support for the GENI I2C controller is added.
* The qcom SPMI driver has SPMI v5 support fixed, and v7 support added.
* The qcom sdhci driver gets some fixes for SDCC v5 support.
* SDM845 gains sdcard support
* Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650)
* SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs.
* RB2 gets a work-around to fix the USB dr_mode property before booting Linux.
Use the new device devicetree files in dts/upstream/ and delete the old
ones. Still keep the -u-boot.dtsi with all u-boot specifics around.
There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which
is not available upstream (yet!). For now, the base dts is used for this
variant as this only differ in the compatible and the (human readable)
model name.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add Support for the Qualcomm Generic Interface (GENI) I2C interface
found on newer Qualcomm SoCs.
The Generic Interface (GENI) is a firmware based Qualcomm Universal
Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
bus protocols depending on the firmware type loaded at early boot time
based on system configuration.
It also supports the "I2C Master Hub" which is a single function Wrapper
that only FIFO mode I2C.
It replaces the fixed-function QUP Wrapper found on older SoCs.
The geni-se.h containing the generic GENI Serial Engine registers defines
is imported from Linux.
Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
EFI initialisation fails without this, and with proper SMBIOS v3 support
in (and automatic generation of useful tables) there's no reason for us
not to do this on qcom platforms.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Defining this as 0 results in bootm causing a null pointer exception...
Define it at a safe default which is valid RAM on most qcom boards.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some Qualcomm boards have only one USB controller which is muxed between
the type-c port and an internal USB hub for type-A and ethernet. We
modify the DT for these to force them to host mode in U-Boot. However in
Linux DRD role switching is supported (required, even). Use
ft_board_setup() to adjust the dr_mode property for these boards.
While we're here, define pr_fmt for this file so we can more easily
identify log messages.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
There is a clock associated with this phy, but it's always from the
rpmhcc and isn't actually needed for the hardware to work.
Drop all the clock handling from the driver.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
With the exception of SDM845, most other Qualcomm SoCs have the Qualcomm
specific (but not SoC) specific SMMU compatible string. Add it here so
we can match those without having to add individual SoCs to the list
here.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add the defines and support for SPMI arbiters version 7,
which can handle up to 1024 peripherals, and can also drive
a secondary bus which is not implemented yet.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The cnfg registers provides the owner id for each peripheral,
so we can use this id to check if we're allowed to write register
to each peripherals.
Since the v5 can handle more peripherals, add the max_channels to
scan more starting from version 5, make the channel_map store
32bit values and introduce the SPMI_CHANNEL_READ_ONLY flag to
mark a peripheral as read-only.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Since version 2, the cmd format has changed, takes helpers
from Linux driver and use a switch/case to handle all
versions in msm_spmi_write/read() command.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
SE HMIBSC board uses UART1 as the main debug console, so add
corresponding clocks and pinmux support. Along with that update
instructions to enable clocks for debug UART support.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Enabling LINUX_KERNEL_IMAGE_HEADER by default doesn't allow
ENABLE_ARM_SOC_BOOT0_HOOK to work properly on db410c when U-Boot is
loaded as a first stage bootloader. It leads to secondary CPUs bringup
failure and later causing the Linux kernel to freeze.
So fix it via selectively enabling LINUX_KERNEL_IMAGE_HEADER where it's
actually required.
Fixes: 059d526af3 ("mach-snapdragon: generalise board support")
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Currently, IPQ4019 pinctrl driver supports only a very limited number of
pin functions and is not fully DT compatible with Linux pinctrl nodes.
IPQ40xx SoC-s sometimes use different pin function numbers for the same
function depending on the pin number, so for example I2C0 on GPIO58 uses
function number 3 while on GPIO59 it uses function number 2.
So, in order to make the driver compatible with upstream DTS to avoid the
need to patch the pinctrl nodes in U-Boot and support all of the missing
pin functions lets rework the driver based on upstream Linux IPQ4019
pinctrl driver and the pending SM8150 U-Boot pinctrl driver which also uses
different function numbers pased on the exact pin number.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
If compiled with logging and debug UART support, the following is printed:
serial_msm serial@78af000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
This is due to the fact that IPQ4019 pinctrl driver is not available prior
to relocation and thus MSM serial will fail probing as pinctrl provider is
not available.
So, lets enable DM_FLAG_PRE_RELOC for IPQ4019 pinctrl to fix this.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
as a preparation update pinctrl driver to look for the upstream pin format.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Pinctrl driver was refactored and moved, but the required header that
it depends on was not included.
Fixes: 24d2908e98 ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
IPQ4019 pinctrl driver was moved to the dedicated Qualcomm pinctrl
directory, but the KConfig depends on ARCH_SNAPDRAGON only and thus
PINCTRL_QCOM_IPQ4019 cannot be selected when ARCH_IPQ40XX is used.
Fixes: 24d2908e98 ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
IPQ40xx SoC-s dont have proper SMEM support like more modern Qualcomm
SoC-s so there is no point in selecting the required drivers.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
These files are all identical (or older) than those in dts/upstream.
Drop them as we now use upstream DTS files with OF_UPSTREAM.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The driver currently requires the bit clock divider be hardcoded in
devicetree (or use the hardcoded default from apq8016).
The bit clock divider is used to derive the baud rate from the core
clock:
baudrate = clk_rate / csr_div
clk_rate is the actual programmed core clock rate which is returned by
clk_set_rate(), and this UART driver only supports a baudrate of 115200.
We can therefore determine the appropriate value for UARTDM_CSR by
iterating over the possible values and finding the one where the
equation above holds true for a baudrate of 115200.
Implement this logic and drop the non-standard DT bindings for this
driver.
Tested on dragonboard410c.
Tested-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
clk_set_rate() should return the clock rate that was set. The IPQ4019
clock driver doesn't set any rates yet but it should still return the
expected value so that drivers can work properly.
For a baud rate of 115200 with an expected bit clock divisor of 16, the
clock rate should be 1843200 so return that frequency.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The clk_init_uart() helper always returns 0, but we're meant to return a
real clock rate. Given that we hardcode 115200 baud, just return the
clock rate that we set.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
MSM serial in DEBUG UART mode is trying to set .clk_rate, but the
msm_serial_data structure does not have such property at all, so lets
remove it as otherwise it will fail compiling.
Fixes: 90023bdfe9 ("serial: msm: add debug UART")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Currently, DEBUG_UART_MSM depends on ARCH_SNAPDRAGON only, but IPQ40XX
devices also use the same UART HW so they can also use the debug UART.
So, allow selecting DEBUG_UART_MSM when using ARCH_IPQ40XX as well.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The addresses were mistakenly swapped. Put them right.
Reported-by: Sumit Garg <sumit.garg@linaro.org>
Fixes: a737d8962cae ("mmc: msm_sdhci: correct vendor_spec_cap0 register for v5")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add the newly created u-boot-qcom mailing list to keep track of Qualcomm
patches.
Additionally, link to the U-Boot Snapdragon custodian tree.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Qcom SoCs derived boards can come from various OEMs/ODMs and not just
Qcom itself. So allow CONFIG_SYS_VENDOR to be set correctly
corressponding to the actual board vendor.
Suggested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add the GCC and TCSRCC clock driver for the SM8650 SoC.
The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.
The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add the GCC and TCSRCC clock driver for the SM8550 SoC.
The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.
The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Remove the reference to the xo clock which is on the unsupported rpmhcc
clock controller. It isn't needed for MMC functionality.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Adjust sdm845_get_pin_name() to return the correct names for the special
pins. This fixes a non-fatal -ENOSYS error when probing MMC.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Allow setting the clock rate for the SD card core clock. This is
required for SD card support on SDM845 devices.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We currently default to the lowest rate but this actually doesn't work
on most platforms. Default to the HS400 speed instead which is most
common on Qualcomm platforms.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
using fdtdec_* functions is incompatible with OF_LIVE and generally
offers a less friendly interface. Update to use dev_read_* functions
instead.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The V4 and V5 controllers have quite varied register layouts. Inherit
the register offsets and naming from the Linux driver. More version
specific offsets can be inherited from Linux as needed.
Fixes: 364c22a ("mmc: msm_sdhci: Add SDCC version 5.0.0 support")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a clock driver for the SM8250 SoC. This driver can enable necessary
clocks for UART, UFS, USB, and MMC.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a driver for the clock controller in the SM6115 SoC, this is used in
the QRB4210 RB2 board.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Move node name checks to a proper data struct with all information
for the supported subnodes.
Replace the key offset defines with the Linux driver ones.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add support for PM8550 GPIO controller variant, keep read-only
until the GPIO and Pinctrl setup is fixed for new PMICs.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Janne Grunau <j@jannau.net> says:
This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
displays
- enables 64-bit LBA addressing
The bootflow list is only seen briefly and is probably more confusing
than helpful.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Use standard boot instead of the distro boot scripts. Use
BOOTSTD_FULL instead of BOOTSTD_DEFAULTS for easier interactive use.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Apple devices have high DPI displays so the larger fonts are preferable
for improved readability. This does not yet change the used font based
on the display's pixel density so the standard 8x16 font is still used
by default.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
The display size querying in efi_console relies on this order. The
display should be the primary output device and should be used to
display more than 80x25 chars.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
This makes USB HDDs >2TiB work. The only reason this hasn't bitten us
for the internal NVMe yet is the 4K sector size, because the largest SSD
Apple sells is 8TB and we can handle up to 16TiB with that sector size.
Close call.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Michal Simek <michal.simek@amd.com> says:
I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.
UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <kabel@kernel.org>
Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: style: quotes recommended around default value for string symbol
EFI_VAR_SEED_FILE (defined at lib/efi_loader/Kconfig:130)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
drivers/crypto/Kconfig:9: warning: style: quotes recommended around
'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig'
Signed-off-by: Michal Simek <michal.simek@amd.com>
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: SPL_CLK_CCF (defined at drivers/clk/Kconfig:59) has leading or
trailing whitespace in its prompt
Signed-off-by: Michal Simek <michal.simek@amd.com>
While I have said this in various release emails, it should be
documented here as well that the next branch opens with the second
release candidate.
Signed-off-by: Tom Rini <trini@konsulko.com>
Not many and nothing really exciting this time: there are more patches
in fly, but they are not ready yet. I will also send some DT updates
and new board defconfig files later, once they have seen the list. I am
aware of the USB rebasing repo efforts, but would like to see how this
plays out, also we have one compatibility issue that I painstakingly
work around in the U-Boot tree for the last three years or so. So for
now I stick to the previous approach.
So now just some easy changes: support for USB peripheral mode on the
Allwinner F1C100s, T113-s3 SPI boot support, and some SPL cleanup
patches.
The branch passed the gitlab CI run, and brief boot testing on some
boards didn't turn up any issues.
Of all T30 transformers, only the TF700T has a FullHD DSI panel,
which is connected via tc358768 RGB to DSI bridge. Since the
bridge driver is available now, TF700T can have video support.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Of all T30 transformers, only the TF700T uses GPIO i2c muxing
for one of the i2c lines and needs this driver to properly work.
Disable this configuration for all transformers except tf700t
in their fragments.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Of all T30 transformers, only the TF600T uses SPI flash and
needs SLINK driver to work with it. Move this configuration
to the tf600t fragment from common defconfig.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
T20 and T30 have 5 UARTs, while T114+ have only 4. Fix this by
adding missing UARTE Kconfig for T20/T30.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
For lock and io-reset pins 0 is the default value, while 1 is disabled
and 2 is enabled. This should be corrected to avoid regressions.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
TF600T is pretty picky in terms of LV pinmux configuration.
The wrong setup will cause issues with eMMC and video.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Unlike all other transformers, TF600T has an SPI flash to store
boot firmware and requires precise SPI pinmux configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
CONFIG_SYS_L2CACHE_OFF is not affecting these devices in any way.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Drop the distro-boot scripts and use standard boot instead.
Inspired by:
'commit 7755dc58af ("rockchip: Move to standard boot")'
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Paz00 can have multiple panels with different timings, but they
all share common feature - panel exposes EDID.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
In clock_sun9i.c, responsible for (mostly early) clock setup on the
Allwinner A80 SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM, and
they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Move some functions around, to group all SPL-only function within
one #ifdef guard. Some functions were exported, but never used outside
of this file, so remove their prototypes from the header file and mark
them as static.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In clock_sun8i_a83t.c, responsible for (mostly early) clock setup on the
Allwinner A83T SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In clock_sun50i_h6.c, responsible for (mostly early) clock setup on
newer generation Allwinner SoCs, many functions are only needed by the
SPL, and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only. By moving the clock_get_pll6()
function to the end of the file, all SPL-only clocks can be contained
within one #ifdef guard.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In clock_sun6i.c, responsible for (mostly early) clock setup on older
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In clock_sun4i.c, responsible for (mostly early) clock setup on early
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
With the clock_twi_onoff() function now being called only from the SPL,
the whole clock.c file in arch/arm/mach-sunxi is needed by SPL code
only.
Remove the redundant #ifdef from the clock_init() function, actually
this function was already only called from the SPL.
Then adjust the Makefile to compile clock.c only with CONFIG_SPL_BUILD
defined.
This avoids unnecessary code in U-Boot proper and allows further
refactoring and code-split between the SPL and U-Boot proper.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The driver used for the Allwinner I2C IP is using proper DT and DM
enablement for a while: we enable the clock gate and de-assert the reset
line in the driver's probe() routine, and the pinmux setup is taken care
of by the DM framework.
This means the explicit call to the i2c_init_board() routine is not
needed for U-Boot proper. As the board_init() function in board.c is
only called for U-Boot proper, we can remove the call, something that
the comment there hinted at already.
Fix the comment for the board_init() function on the way: we were not
really doing board specific setup there. The fact that this function
is called from U-Boot proper only is probably more helpful for reasoning
about this code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some later 32-bit SoCs require some setup of the Secure Peripherals
Controller, which is handled in tzpc_init().
At the moment this is guarded in board.c by some #ifdefs selecting the
SoCs that need it.
Move those #ifdef guards into the header file, providing an empty stub
function for all other SoCs, so that the #ifdefs can be removed from the
.c file, to improve readability.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner F1C100s SoC has a MUSB controller like the one in the A33,
but needs an SRAM region to be claimed like the A10. We do the latter
anyway, even on chips that don't need it, so there is no real difference
in our compatible string matching.
Add a mapping between the config struct used in the Linux to our
requirements here on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks
and reset bits layout, but the CCU base is different. Another difference
is that the new SoCs do not have a clock divider inside. Instead of this
we should configure sample mode depending on input clock rate.
The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4
instead. This makes for a change in spi0_pinmux_setup() routine.
This patch extends the H6/H616 #ifdef guards to also cover the R528/T113,
using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528
symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig
dependency.
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-video/-/pipelines/20466
- simple_panel: support timing parsing from EDID
- dw_hdmi: fix gcc-14 compiler warnings
- dw_hdmi: support vendor PHY for HDMI
- rockchip: add Rockchip INNO HDMI PHY driver
- rockchip: RK3328 HDMI and VOP support
- evb-rk3328: enable vidconsole support
- Tegra DC and DSI improvements and Tegra 114 support
- add LG LG070WX3 MIPI DSI panel driver
- add Samsung LTL106HL02 MIPI DSI panel driver
- add Toshiba TC358768 RGB to DSI bridge support
- add basic support for the Parade DP501 transmitter
- Tegra 3 panel and bridge driver improvements
- simplefb: modernise DT parsing
- fdt_simplefb: Enumerate framebuffer info from video handoff
- preserve framebuffer if SPL is passing video hand-off
- fdt_support: allow reserving FB region without simplefb
Create separate helper for just reserving framebuffer region without
creating or enabling simple-framebuffer node.
This is useful for scenarios where user want to preserve the bootloader
splash screen till OS boots up and display server gets started without
displaying anything else in between and thus not requiring
simple-framebuffer.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
If SPL is passing video handoff structure to U-boot then it is safe to
assume that SPL has already enabled video and that's why it is passing
video handoff structure to U-boot so that U-boot can preserve the
framebuffer.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Enable and update simple-framebuffer node using the video handoff
bloblist if video was enabled at SPL stage and corresponding video
bloblist was received at u-boot proper with necessary parameters.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
simplefb was using old style FDT parsing which doesn't behave well in
combination with livetree. Update it to use ofnode instead and add a
missing null check for the "format" property.
Standardise the error logging while we're here.
Fixes: 971d7e6424 ("video: simplefb")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It
enables an RGB/Parallel SOC output to be converted, packed and
serialized into either DP or TMDS output device. Only DisplayPort
functionality of this transmitter has been implemented and tested.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add initial support for the Toshiba TC358768 RGB to DSI bridge.
The driver is based on the mainline Linux Toshiba TC358768
bridge driver and implements the same set of features.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
LTL106HL02 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD) that uses amorphous silicon TFT as
switching devices. This model is composed of a TFT LCD panel, a
driver circuit and a backlight unit. The resolution of a 10.6"
contains 1920 x 1080 pixels and can display up to 16,8M color
with wide viewing angle.
Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
The LD070WX3 is a Color Active Matrix Liquid Crystal Display with
an integral Light Emitting Diode (LED) backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It
is a transmissive type display operating in the normally Black
mode. This TFT-LCD has 7.0 inches diagonally measured active
display area with WXGA resolution (800 by 1280 pixel array).
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
According to Thierry Reding's commit in the linux kernel
976cebc35bed0456a42bf96073a26f251d23b264
"drm/tegra: dsi: Make FIFO depths host parameters"
correct depth of the video FIFO is 1920 *words* no *bytes*
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Implement reset use to discard any changes which could have been
applied to DSI before and can interfere with current configuration.
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Existing Tegra DSI driver mostly fits T114 apart MIPI calibration
which on T114 has dedicated driver. To resolve this MIPI calibration
logic was split for pre-T114 and T114+ devices.
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Dedicated MIPI calibration driver is used on T114 and newer. Before
T114 MIPI calibration registers were part of VI and CSI.
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
The goal of panel_set_backlight() is to enable backlight. Hence,
it should be called at the probe end.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
If DISP1 is a PLLD/D2 child, it cannot go over 370MHz. The cause
of this is not quite clear. This can be overcomed by further
halving the PLLD/D2 if the target parent rate is over 800MHz.
This way DISP1 and DSI clocks will have the same frequency. The
shift divider in this case has to be calculated from the
original PLLD/D2 frequency and is passed from the DSI driver.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Microsoft Surface 2
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Add powergate use on T114 to complete resetting of DC.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
T30+ SOC have second PLLD - PLLD2 which can be actively used by
DC and act as main DISP1/2 clock parent.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tegra SoC has 2 independent display controllers called DC_A and
DC_B, they are handled differently by internal video devices like
DSI and HDMI controllers so it is important for last to know
which display controller is used to properly set up registers.
To achieve this, a pipe field was added to pdata to pass display
controller id to internal Tegra SoC devices.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Consolidate HD headers and place the result into video/tegra20
since it is used only by devices from this directory.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Subtracting 1 from x and y fixes image shifting on rotated
panels.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS Grouper E1565
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diverge DC driver setup to better fit each of supported generations
of Tegra SOC.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
GCC-14 find more warnings like
"make pointer from integer without a cast"
fix them by adding a type cast.
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Model: Firefly roc-rk3328-cc
DRAM: 1 GiB (effective 1022 MiB)
Video device 'vop@ff370000' cannot allocate frame buffer memory -ensure the device is set up before relocation
Error binding driver 'rockchip_rk3328_vop': -28
Some drivers failed to bind
initcall sequence 000000003ffcd5e8 failed at call 000000000021a5c4 (err=-28)
### ERROR ### Please RESET the board ###
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for dsp registers.
Group the dsp register set via dsp_regs pointers so that dsp_offset
would point the dsp_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for win registers.
Group the win register set via win_regs pointers so that win_offset
would point the win_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Get the regs from priv pointer instead of passing it an argument.
This would simplify the code and better readability.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
HPD detection on some DW HDMI designed SoC's would need to read and
setup the HPD status explicitly.
So, extend the HPD detection code by adding the dw_hdmi_detect_hpd
function and move the default detection code caller there.
The new read and setup hdp will integrate the same function in
later patches.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
Extend the vendor phy handling by adding platform phy hooks.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
HDP is a hardware connector event, so detect the same once the
controller and attached PHY initialization are done.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Support timing parsing from EDID if panel device tree node
provides DDC i2c bus instead of timings node.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF201
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
[agust: reworked to fix dm_i2c_* build errors and to big img size]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20444
- Make i.MX93 boot less verbose.
- Remove unneedd environment variables from Toradex i.MX boards.
- Use gpio-hog on verdin-imx8mm/imx8mp.
- Add PCIe support for i.MX8MM.
- Add TPM support for imx8m*-venice.
Pull request efi-2024-07-rc1-3
Documentation:
* sort env sub-commands alphabetically
* update list of aliases for the env command
UEFI:
* allow enabling SetVariable at runtime
for future OS supported writing to ubootefi.var
* use event callback for initrd deregistration
Others:
* correct alignment of x86 firmware tables
On qemu-x86_64_defconfig the following was observed:
=> efidebug tables
00000000000f0074 eb9d2d31-2d88-11d3-9a16-0090273fc14d SMBIOS table
The SMBIOS configuration table does not point to a paragraph-aligned
(16 byte aligned) address. The reason is that in write_tables() rom_addr is
not aligned and copied to gd->arch.smbios_start.
The Simple Firmware Interface requires that the SFI table is paragraph-
aligned but our code does not guarantee this.
As all tables written in write_tables() must be paragraph-aligned, we
should implement the address rounding in write_tables() and not in table
specific routines like copy_pirq_routing_table().
Add paragraph-alignment in write_tables().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since we support SetVariableRT now add the relevant tests
- Search for the RTStorageVolatile and VarToFile variables after EBS
- Try to update with invalid variales (BS, RT only)
- Try to write a variable bigger than our backend storage
- Write a variable that fits and check VarToFile has been updated
correclty
- Append to the variable and check VarToFile changes
- Try to delete VarToFile which is write protected
- Try to add/delete runtime variables
- Verify VarToFile contains a valid file format
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Previous patches enabled SetVariableRT using a RAM backend.
Although EBBR [0] defines a variable format we can teach userspace tools
and write the altered variables, it's better if we skip the ABI
requirements completely.
So let's add a new variable, in its own namespace called "VarToFile"
which contains a binary dump of the updated RT, BS and, NV variables
and will be updated when GetVariable is called.
Some adjustments are needed to do that.
Currently we discard BS-only variables in EBS(). We need to preserve
those on the RAM backend that exposes the variables. Since BS-only
variables can't appear at runtime we need to move the memory masking
checks from efi_var_collect() to efi_get_next_variable_name_mem()/
efi_get_variable_mem() and do the filtering at runtime.
We also need an efi_var_collect() variant available at runtime, in order
to construct the "VarToFile" buffer on the fly.
All users and applications (for linux) have to do when updating a variable
is dd that variable in the file described by "RTStorageVolatile".
Linux efivarfs uses a first 4 bytes of the output to represent attributes
in little-endian format. So, storing variables works like this:
$~ efibootmgr -n 0001
$~ dd if=/sys/firmware/efi/efivars/VarToFile-b2ac5fc9-92b7-4acd-aeac-11e818c3130c of=/boot/efi/ubootefi.var skip=4 bs=1
[0] https://arm-software.github.io/ebbr/index.html#document-chapter5-variable-storage
Suggested-by: Ard Biesheuvel <ardb@kernel.org> # dumping all variables to a variable
Co-developed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> # contributed on efi_var_collect_mem()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Previous patches enable SetVariable at runtime using a volatile storage
backend using EFI_RUNTIME_SERVICES_DATA allocared memory. Since there's
no recommendation from the spec on how to notify the OS, add a volatile
EFI variable that contains the filename relative to the ESP. OS'es
can use that file and update it at runtime
$~ efivar -p -n b2ac5fc9-92b7-4acd-aeac-11e818c3130c-RTStorageVolatile
GUID: b2ac5fc9-92b7-4acd-aeac-11e818c3130c
Name: "RTStorageVolatile"
Attributes:
Boot Service Access
Runtime Service Access
Value:
00000000 75 62 6f 6f 74 65 66 69 2e 76 61 72 00 |ubootefi.var. |
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When we store EFI variables on file we don't allow SetVariable at runtime,
since the OS doesn't know how to access or write that file. At the same
time keeping the U-Boot drivers alive in runtime sections and performing
writes from the firmware is dangerous -- if at all possible.
For GetVariable at runtime we copy runtime variables in RAM and expose them
to the OS. Add a Kconfig option and provide SetVariable at runtime using
the same memory backend. The OS will be responsible for syncing the RAM
contents to the file, otherwise any changes made during runtime won't
persist reboots.
It's worth noting that the variable store format is defined in EBBR [0]
and authenticated variables are explicitly prohibited, since they have
to be stored on a medium that's tamper and rollback protected.
- pre-patch
$~ mount | grep efiva
efivarfs on /sys/firmware/efi/efivars type efivarfs (ro,nosuid,nodev,noexec,relatime)
$~ efibootmgr -n 0001
Could not set BootNext: Read-only file system
- post-patch
$~ mount | grep efiva
efivarfs on /sys/firmware/efi/efivars type efivarfs (rw,nosuid,nodev,noexec,relatime)
$~ efibootmgr -n 0001
BootNext: 0001
BootCurrent: 0000
BootOrder: 0000,0001
Boot0000* debian HD(1,GPT,bdae5610-3331-4e4d-9466-acb5caf0b4a6,0x800,0x100000)/File(EFI\debian\grubaa64.efi)
Boot0001* virtio 0 VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,0000000000000000)/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,850000001f000000)/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,1600850000000000){auto_created_boot_option}
$~ efivar -p -n 8be4df61-93ca-11d2-aa0d-00e098032b8c-BootNext
GUID: 8be4df61-93ca-11d2-aa0d-00e098032b8c
Name: "BootNext"
Attributes:
Non-Volatile
Boot Service Access
Runtime Service Access
Value:
00000000 01 00
FWTS runtime results
Skipped tests are for SetVariable which is now supported
'Passed' test is for QueryVariableInfo which is not yet supported
Test: UEFI miscellaneous runtime service interface tests.
Test for UEFI miscellaneous runtime service interfaces 6 skipped
Stress test for UEFI miscellaneous runtime service i.. 1 skipped
Test GetNextHighMonotonicCount with invalid NULL par.. 1 skipped
Test UEFI miscellaneous runtime services unsupported.. 1 passed
Test: UEFI Runtime service variable interface tests.
Test UEFI RT service get variable interface. 1 passed
Test UEFI RT service get next variable name interface. 4 passed
Test UEFI RT service set variable interface. 8 passed
Test UEFI RT service query variable info interface. 1 skipped
Test UEFI RT service variable interface stress test. 2 passed
Test UEFI RT service set variable interface stress t.. 4 passed
Test UEFI RT service query variable info interface s.. 1 skipped
Test UEFI RT service get variable interface, invalid.. 5 passed
Test UEFI RT variable services unsupported status. 1 passed, 3 skipped
[0] https://arm-software.github.io/ebbr/index.html#document-chapter5-variable-storage
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently efi_initrd_deregister() is called in bootefi.c
when the image started from bootefi command returns.
Since efi_guid_event_group_return_to_efibootmgr event is
implemented, so let's use this event for invoking
initrd deregistration.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
After allocating memory for the initrd file path we need to check the
initrd buffer pointer is not NULL.
Fixes: 87d791423a ("eficonfig: menu-driven addition of UEFI boot option")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add support for the IMX8MM SoC by adding driver data with the compatible
string of the GPR controller.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add support for PCIe clocks required to enable PCIe support on
iMX8MM SoC.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Remove not needed variables from environment and include config files.
- setup variable used to be executed from some bootscript, however
it's not required and there is no point on having this small helper
here
- boot_file, kernel_file, ip_dyn variables are not used anywhere
- fdt_fixup variable is just set empty
- defargs, vidargs variables used to be used from some bootscript,
however there is no point on having it here and even old legacy
bootscript can work without them
- removed CONFIG_ENABLE_DDR_TRAINING_DEBUG, this is a leftover from
some copy/paste
On colibri imx6ull/imx7 NAND module, remove consoleblank=0, this is
already the Linux kernel default therefore useless.
Various Linux Kernel command line options removed are not-existing
left-over that applied to some old NXP i.MX downstream branch
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
The GW73xx baseboard needs a PCI dt adjustment for revC/D based on a
change of the PCIe switch. Make sure we are only doing this for a pci
based ethernet to avoid causing a boot hang when the ethernet1 alias
points to eqos or fec. To know this is a pcie device ensure the alias
begins with the pcie controller.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In Linux, we allow sleep moci to be turned off when the carrier board
supports it and the system is in suspend. In U-Boot, however, we want
the sleep moci to be always on. So we use a gpio hog and disable the
regulator. This change is necessary because we switched to upstream
device tree files with commit 23fe2def1e
("verdin-imx8mm/verdin-imx8mp: move imx verdins to OF_UPSTREAM"). A
recent upstream patch removes the gpio hog from the Linux device tree,
so we need to add it to the u-boot dtsi. The following patch will remove
the gpio hog from the Linux device tree:
https://lore.kernel.org/linux-devicetree/20240405160720.5977-1-eichest@gmail.com/
The U-Boot patch can be applied without it and will not break the build.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
The following information printed on every boot is not very
helpful for the users:
SOC: 0xa0009300
LC: 0x40040
Move them to debug() level.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Mathieu Othacehe <othacehe@gnu.org>
Enable support for TPM2 devices. As the ATTPM20P TPM2 used on the
Gateworks Venice boards hangs off the SPI bus we enable SPI support
as well.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
MP1:
_ Add OHCI HCD support for STM32MP15xx DHSOM
_ Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
_ Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx
_ Jump to ep on successful resume in PSCI suspend code
_ Add FASTBOOT support for STM32MP13
_ Fix/Rework key and leds management for STM32MP13/15
_ net: dwc_eth_qos: Clean up STM32 glue code and add STM32MP13xx support
MP2:
_ Add stm32-fmc-ebi support
_ Add: sdmmc2 support and fix AARCH64 compilation
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds"; which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds" which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename "red" led node's name to "led-red".
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
led-red and button dedicated to fastboot share the same gpio GPIOA13.
led-blue and button dedicated to stm32prog share the same gpio GPIOA14.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from led-red and
led-blue led's node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Instead of using gpio directly to detect key pressed on button
dedicated for fastboot and stm32mprog, make usage of BUTTON UCLASS.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix flash@0 partition node name with correct offset.
Fixes: 90f992e6a5 ("arm: dts: stm32: Add partitions in flash0 and nand
node for stm32mp15xx-dhcom/dhcor")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix flash@0 partition node name with correct offset.
Fixes: 90f992e6a5 ("arm: dts: stm32: Add partitions in flash0 and nand node for
stm32mp15xx-dhcom/dhcor")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix flash@0 and nand@0 partition node name with correct offset.
Fixes: e91d3c6176 ("arm: dts: stm32: Add partitions in flash0 and nand
node for stm32mp15xx-ev1")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case of an OTP-CLOSED STM32MP15xx system, the CPU core 1 cannot be
released from endless loop in BootROM only by populating TAMP BKPxR 4
and 5 with magic and branch address and sending SGI0 interrupt from
core 0 to core 1 twice. TAMP_SMCR BKP..PROT fields must be initialized
as well to release the core 1 from endless loop during the second SGI0
handling on core 1. Initialize TAMP_SMCR to protect the first 32 backup
registers, the ones which contain the core 1 magic, branch address and
boot information.
This requirement seems to be undocumented, therefore it was necessary
to trace and analyze the STM32MP15xx BootROM using OpenOCD and objdump.
Ultimately, it turns out that a certain BootROM function reads out the
TAMP_SMCR register and tests whether the BKP..PROT fields are non-zero.
If they are zero, the BootROM code again waits for SGI0 using WFI, else
the execution moves forward until it reaches handoff to the TAMP BKPxR 5
branch address.
This fixes CPU core 1 release using U-Boot PSCI implementation on an
OTP-CLOSED system, i.e. system with fuse 0 bit 6 set.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
SoC revision is only accessible via DBUMCU IDC register,
which requires BSEC.DENABLE DBGSWENABLE bit to be set to
make the register accessible, otherwise an access to the
register triggers bus fault. As BSEC.DBGSWENABLE is zero
in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
bit as this might open a brief window for timing attacks.
Instead, report that this system is OTP-CLOSED and do not
report any SoC revision to avoid confusing users. Use an
SEC/C abbreviation to avoid growing SOC_NAME_SIZE .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The source file is in arch/arm/mach-stm32mp/ecdsa_romapi.c and not
in arch/arm/mach-stm32mp/stm32mp1/ecdsa_romapi.c . There are two
Makefile entries in each subdirectory. Drop the bogus one and keep
only the correct one, the one in arch/arm/mach-stm32mp/Makefile .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case the system has resumed successfully, the PSCI suspend resume
code has to jump to the 'ep' successful resume entry point code path,
otherwise the code has to jump to content of the LR register, which
points to failed resume code path.
To implement this distinction, rewrite LR register stored on stack
with 'ep' value in case of a successful resume, which is really in
every case unless some catastrophic failure occurred during suspend.
Without this change, Linux counts every resume as failed in
/sys/power/suspend_stats/fail
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The "st,ext-phyclk" property is a unification of "st,eth-clk-sel"
and "st,eth-ref-clk-sel" properties. All three properties define
ETH CK clock direction, however:
- "st,eth-clk-sel" selects clock direction for GMII/RGMII mode
- "st,eth-ref-clk-sel" selects clock direction for RMII mode
- "st,ext-phyclk" selects clock direction for all RMII/GMII/RGMII modes
The "st,ext-phyclk" is the preferrable property to use.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Manage 2 ethernet instances, select which instance to configure with mask
If mask is not present in DT, it is stm32mp15 platform.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Rework the code
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Use const bool for the values parsed out of DT. Drop the duplicate
assignment of false into those bool variables, assign them directly
with the content parsed out of DT. Abbreviate the variable name too.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Use dev_*() only to print all the logs from this glue code,
instead of mixing dev_*(), log_*(), pr_*() all in one code.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Move the log_debug() calls on top of the bit manipulation code.
No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Use FIELD_PREP to configure content of ETH_SEL bitfield in SYSCFG_PMCSETR
register. No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Replace ifdef CONFIG_CLK with if (CONFIG_IS_ENABLED(CLK)) to improve code
build coverage. Some of the functions printed debug("%s: OK\n", __func__);
on exit with and without CLK enabled, some did not, make it consistent and
print nothing if CLK is disabled.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Move board_interface_eth_init() into eqos_probe_syscfg_stm32() in STM32
driver glue code. The eqos_probe_syscfg_stm32() parses STM32 specific DT
properties of this MAC and configures SYSCFG registers accordingly, there
is nothing board specific happening in this function, move it into generic
driver code instead. Drop the now unused duplicates from board files.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The current glue code is specific to STM32MP15xx, the upcoming STM32MP13xx
will introduce another entry specific to the STM32MP13xx. Rename the current
entry to eqos_stm32mp15_config in preparation for STM32MP13xx addition. No
functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Move STM32 glue code into separate file to contain the STM32 specific
code outside of the DWMAC core code. No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER<christophe.roullier@foss.st.com>
FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are
available when on MP25 SoC, the 4 chip select are available.
Let's use a platform data structure for parameters that will differ.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The FMC2 revision 2 supports security and isolation compliant with
the Resource Isolation Framework (RIF). From RIF point of view,
the FMC2 is composed of several independent resources, listed below,
which can be assigned to different security and compartment domains:
- 0: Common FMC_CFGR register.
- 1: EBI controller for Chip Select 1.
- 2: EBI controller for Chip Select 2.
- 3: EBI controller for Chip Select 3.
- 4: EBI controller for Chip Select 4.
- 5: NAND controller.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the support of the revision 2 of FMC2 IP.
- PCSCNTR register has been removed,
- CFGR register has been added,
- the bit used to enable the IP has moved from BCR1 to CFGR,
- the timeout for CEx deassertion has moved from PCSCNTR to BCRx,
- the continuous clock enable has moved from BCR1 to CFGR,
- the clk divide ratio has moved from BCR1 to CFGR.
The MP1 SoCs have only one signal to manage all the controllers (NWAIT).
The MP25 SOC has one RNB signal for the NAND controller and one NWAIT
signal for the memory controller.
Let's use a platform data structure for parameters that will differ
between MP1 and MP25.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
This used to be enabled implicitly before, now that implicit dependency
disappeared and this got disabled. Enable it manually.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch avoids compilation issue when CONFIG_USB_GADGET is deactivated
in defconfig, with undefined reference to run_usb_dnl_gadget and to
g_dnl_set_product.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This prints the MMC device being read similar to how we print the MMC
device we write to when e.g. calling saveenv.
One of the side effects is that the boot log now shows from which MMC
device the env was loaded:
Loading Environment from MMC... Reading from MMC(1)... OK
This is useful to identify which MMC device the environment was loaded
from for boards where there are more than one (e.g. eMMC and SD card)
without adding some debug messages manually.
Sadly, there's no way to know which of the default or redundant
environment is being read from env_mmc_load before env_import_redund is
called so it is printing a bit later (and possibly after error/warning
messages).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
default n doesn't need to be specified. It is default option anyway.
Similar changes have been done by commit 18370f1497 ("Kconfig: Remove all
default n/no options").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In case of systems where DRAM bank ends at the edge of 32bit boundary,
start + size calculations would overflow. This happens on STM32MP15xx
with 1 DRAM bank starting at 0xc0000000 and 1 GiB of DRAM. This is a
usual 32bit system DRAM size overflow, fix it by doing all DRAM size
and offset calculations using u64 types. This also covers a case where
a 32bit PAE system might be able to address up to 36bits of DRAM.
Fixes: a4df06e41f ("boot: fdt: Change type of env_get_bootm_low() to phys_addr_t")
Signed-off-by: Marek Vasut <marex@denx.de>
This patch adds DEFLATE compression algorithm support. It's a good choice
to trade off between compression ratios and performance compared to LZ4.
Alternatively, DEFLATE could be used for some specific files since EROFS
supports multiple compression algorithms in one image.
Signed-off-by: Jianan Huang <jnhuang95@gmail.com>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
There is code in the bootp parsing for NIS domain and add the
same support for the dhcp options as well. This allows the same
usage of the data when the dhcp command is used in the boot
command.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
If a button device fails to probe, it will still be added to the uclass
device list, and therefore will still be iterated over in
button_read_keys() resulting in a UAF on the buttons private data.
Resolve this by unbinding button devices that aren't active after
probing, and print a warning so it's clear that the button is broken.
Fixes: e877996289 ("dm: input: add button_kbd driver")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reading the boot mode from RTC memory requires a real time clock.
Add the missing Kconfig dependency.
Fixes: c74675bd90 ("reboot-mode: read the boot mode from RTC memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Igor says:
"The problem initially was in the TEE sandbox driver implementation
(drivers/tee/sandbox.c) and it's limitations, which doesn't
permit to have multiple simultaneous sessions with different TAs.
This is what actually happened in this CI run [1], firstly "optee_rpmb"
cmd was executed (and after execution we had one session open), and
then "scp03", which also makes calls to OP-TEE, however it fails
in sandbox_tee_open_session() because of this check:
if (state->ta) {
printf("A session is already open\n");
return -EBUSY;
}
I had two ways in mind to address that:
1. Close a session on each optee_rpmb cmd invocation.
I don't see any reason to keep this session open, as obviously
there is no other mechanism (tbh, I don't know if DM calls ".remove" for active
devices) to close it automatically before handing over control to
Linux kernel. As a result we might end up with some orphaned sessions
registered in OP-TEE OS core (obvious resource leak).
2. Extend TEE sandbox driver, add support for multiple
simultaneous sessions just to handle the case.
I've chosen the first approach, as IMO it was "kill two birds with one stone",
I could address resource leak in OP-TEE and bypass limitations of
TEE sandbox driver."
Link: https://lore.kernel.org/u-boot/CAByghJZVRbnFUwJdgU534tvGA+DX2pArf0i7ySik=BrXgADe3Q@mail.gmail.com/
The CI https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/20414
showed no problems
MCR boards are plugged in racks. The position in the rack can be read
in a register.
For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.
For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Unlike CMPC885 and CMPCPRO boards, the FPGA of MCR3000 board doesn't
load code automatically but needs to be loaded by software through SPI.
Until now it was loaded later by Linux, but we'd like U-boot to have
access to some information that require the FPGA, like board address
in racks.
So, implemented the load of FPGA in U-boot.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
To avoid spamming your email boxes, the code isn't included in
the emailed patch but will be present in the PULL request
Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Set the speed requested through mpc8xx_spi_set_speed() instead
of hardcoding a fixed speed.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.
So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.
This change allows setting higher speed for transfer. For instance
on an MPC 8xx (CPM1 comms RISC processor), the documentation tells
that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load
at 25 MHz while a word transfer at the same speed uses 0.032%
of CPM load. This means the speed can be 6 times higher in
word mode for the same CPM load.
For small transfers, the load reduction is not worth the CPU load
required to allocate the temporary buffer, so do it only when data
size is over 64 bytes.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Perform multiple transfer of size MAX_BUFFER when the data to be
transferred is longer than MAX_BUFFER.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
SDMA configuration register needs to be set up only once and doesn't
belong to drivers. Also, the value to be used is different on mpc885.
So do the init in cpu_init_f() with 0x40 for mpc885 and 0x1 for others.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.
Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively activates one of the
7 possible chipselects and value 0 sets all chipselets to inactive.
So add a special GPIO driver that simulates GPIOs for those chipselect.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
xfer ops can be passed a NULL input or output buffer. At the
time being the driver ignores it and overwrites memory at 0.
Define a dummy buffer and use it when either input or output
buffer is NULL. Bail out when both are NULL as it shouldn't.
Also increase MAX_BUFFER len to 32k as the current is pretty
low.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Since commit 773ad4ebb1 ("spi, mpc8xx: Add support for chipselect via
GPIO and fixups"), DM_GPIO is required for 8xx SPI.
Add the missing dependency to avoid build failures.
Fixes: 773ad4ebb1 ("spi, mpc8xx: Add support for chipselect via GPIO and fixups")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
When equipped with the SRSA audio board, MIAE equipment
has an additional port called port F.
Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.
Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu>
Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
When adding additional SPI peripherals, the reg property needs to
be added, and this leads to the following error:
arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): /immr@ff000000/spi@aa0/temp@1:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): /immr@ff000000/spi@aa0/temp@2:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Fix it by removing cell-index and cell-size which is unused and add
reg property. Also fix node name to be in line with reg value.
Also add missing compatible for eeprom node.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
The usage of the common.h include file is deprecated [1], and has already
been removed from several files.
Get rid of all inclusions in the "drivers/tee" directory, and replace it
with required include files directly where needed.
[1] doc/develop/codingstyle.rst
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Close tee session after each optee_rpmb invocation, as there is no
reason to keep it open, considering the absence of any available mechanism
to clean up all open sessions automatically before handing over control
to the Linux kernel. Without proper clean-up we might end up with orphaned
sessions registered in OP-TEE OS core (obvious resource leak).
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently, fastboot protocol in U-Boot has no opportunity
to execute vendor custom code with verifed boot. This patch
introduce new fastboot subcommand fastboot oem board:<cmd>,
which allow to run custom oem_board function.
Default implementation is __weak. Vendor must redefine it in
board/ folder with his own logic.
For example, some vendors have their custom nand/emmc partition
flashing or erasing. Here some typical command for such use cases:
- flashing:
$ fastboot stage bootloader.img
$ fastboot oem board:write_bootloader
- erasing:
$ fastboot oem board:erase_env
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240418100129.1691822-2-avromanov@salutedevices.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE and OF_LIST. And thereby directly build DTB from
dts/upstream/src/ including *-u-boot.dtsi files from arch/$(ARCH)/dts/
directory.
The configuration update has been done using the following script:
```
sed -i '/^CONFIG_DEFAULT_DEVICE_TREE/ s@="@&renesas/@' `git grep -li renesas configs`
sed -i '/^CONFIG_OF_LIST/ s@r8a@renesas/&@g' `git grep -li renesas configs`
```
The RZN1 Snarc board does not seem to have a matching Linux kernel
DT counterpart, this is currently not switched to OF upstream.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE and OF_LIST. And thereby directly build DTB from
dts/upstream/src/ including *-u-boot.dtsi files from arch/$(ARCH)/dts/
directory.
The configuration update has been done using the following script:
```
sed -i '/^CONFIG_DEFAULT_DEVICE_TREE/ s@="@&renesas/@' `git grep -li renesas configs`
sed -i '/^CONFIG_OF_LIST/ s@r8a@renesas/&@g' `git grep -li renesas configs`
```
There are SoCs which are not included in this patch. The 32bit SoCs
require further infrastructure work. R8A779H0 is coming during the
next upstream DT synchronization cycle as it is not included in
current upstream DTs yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com> # Beacon boards
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
R-Car R8A77950 H3 ES1.* was only available to an internal development
group and needed a lot of quirks and workarounds. Public users only
have R-Car R8A77950 H3 ES2 and newer. Switch existing systems to use
R8A77951 device trees.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The U-Boot build system can automatically paste -u-boot.dtsi at the
end of matching .dts during build. Stop emulating this behavior and
rename the -u-boot.dts files to -u-boot.dtsi, drop "#include...dts"
from those new u-boot.dtsi files, and update board configuration
accordingly.
The rename, '#include...dts` scrubbing and configuration update has
been done using the following script:
```
$ find . -name r[78]\*-u-boot.dts | sort -u | while read line ; do \
git mv ${line%-u-boot.dts}-u-boot.dts ${line%-u-boot.dts}-u-boot.dtsi ; \
done
$ sed -i '/^#include.*dts"/ d' `find . -name r[78]\*-u-boot.dtsi`
$ sed -i 's@-u-boot@@g' `git grep -li renesas configs`
```
The Salvator-X and ULCB board files have been updated manually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Adam Ford <aford173@gmail.com>
If open() fails it returns -1. Calling close() with this value
makes no sense. Return -EIO instead.
Addresses-Coverity-ID: 185828 Improper use of negative value
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 566bf3a869 ("sandbox: Add a function to read a host file")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
When we find a certificate on an image to be booted on a GP device we
print out a message explaining that the certificate is being skipped.
This message is rather long and is printed for every image. Shorten
the message and make the long version into a debug message.
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
EMMC boot can fail due to the size of R5 SPL image growing beyond the
500KB of memory allocated in eMMC. Update offsets for eMMMC raw boot
to load each binary from the correct address in eMMC according to the
following eMMC layout:
boot0/1 partition
0x0+----------------------------------+
| tiboot3.bin (1 MB) |
0x800+----------------------------------+
| tispl.bin (2 MB) |
0x1800+-----------------------------------+
| u-boot.img (4 MB) |
0x3800+-----------------------------------+
| environment (128 KB) |
0x3900+-----------------------------------+
Signed-off-by: Judith Mendez <jm@ti.com>
The FAT specification requires that the change date is set.
If a DM RTC device exists, set the creation and change date to the current
date when updating the directory entry. Otherwise use the date 2020-01-01.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The month is stored in 5 - 8. We need to shift it by 5 bits.
Cf. Microsoft FAT Specification, 2005-08-30
Fixes: 13c11c6653 ("fs: fat: add file attributes to struct fs_dirent")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This is a trivial but significant optimization:
mkimage took >200ms (and 49489 writes (of which 49456 512)),
now it takes 110ms (and 419 writes (of which 386 64k)).
sendfile is much more appropriate for this and is done in one syscall,
but doesn't bring any significant speedups over 64k r/w
at the 13M size ranges, so there's no need to introduce
#if __linux__
while((size = sendfile(fd_dst, fd_src, NULL, 128 * 1024 * 1024)) > 0)
;
if(size != -1) {
ret = 0;
goto out;
}
#endif
Also extract the buffer size to a macro.
Signed-off-by: Ahelenia Ziemiańska <nabijaczleweli@nabijaczleweli.xyz>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
When CONFIG_OF_UPSTREAM is enabled, DTS files are in SOC subdirectories (vs the
top level dts directory), but when CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled,
the dynamically created dtsi file containing the capsule ESL DT node is in the
parent directory. This results in a build failure because the #include inserted
in the DTS file is local to the current directory. Update Makefile to have the
DT preprocessing of #includes search in the parent (dts top level) directory
too.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Jonathan Humphreys <j-humphreys@ti.com> says:
Set basic settings needed for System Ready IR ACS testing, for several TI SoC
based platforms: AM64, AM62, AM62p, BeaglePlay, J7, and BeagleboneAI.
For AM64, AM62, and AM62p, also includes some config cleanup. Should be no
functional change.
mwleeds@mailtundra.com <mwleeds@mailtundra.com> says:
This patch series is needed to get U-Boot to boot from a ZFS filesystem
on an aarch64 computer. Some of the patches are not architecture specific
and would be needed to boot ZFS on other platforms as well. The ZFS
support in U-Boot hasn't been substantively touched in several years and
to me it seems like it must have been broken for a long time on all
platforms, but I have only tested on aarch64.
Since there doesn't seem to be a mantainer for this area who I can cc,
I'm hoping these patches get seen and pulled in by a general U-Boot
maintainer.
[trini: Per Igor's comment and Phaedrus agreement, dropped his Tested-by
on the patches themselves]
Without this patch, the while loop being modified goes on infinitely,
but with the patch I am able to boot linux on zfs on a jetson tx2 nx.
It seems like this code was never tested because the logic is clearly
wrong. The function do_div(a,b) does a division that modifies the first
parameter to have a = a / b, and returns the remainder of the division.
So clearly in the usual case when file->offset = 0, the line
"blkid = do_div(blkid, blksz);" just results in blkid being set to zero
on every iteration of the loop, rather than being incremented as blocks
are read. Hence the zeroth block is read over and over and this becomes
an infinite loop.
So instead capture the remainder of the division in a "blkoff" variable,
and use that to properly calculate the memory address to move from in
memmove() below.
For example, if file->offset were 1337, on the first iteration of the
loop blkid would be 0 and blkoff would be 1337. If the blksz is 131072
(as it was for me), that amount of data would be copied into
data->file_buf. movesize would be 131072 - 1337 = 129735 so 129735 bytes
would be moved into buf. On the second iteration of the loop (assuming
there is one), red would be 129735, blkid would be 1, blkoff would be 0,
and 131072 bytes would be copied into buf. And so on...
Signed-off-by: Phaedrus Leeds <mwleeds@mailtundra.com>
As evidenced by how other filesystems handle it, a return value of 0
from fs_devread() means failure; nonzero means success. The opposite
assumption was being made in zfs.c for the use of zfs_devread() so fix
the confusion by making zfs_devread() return 0 on success.
It probably doesn't make sense to change the handling of zfs_devread()
in zfs.c instead, because as it is it matches the semantics of the other
functions there.
Signed-off-by: Phaedrus Leeds <mwleeds@mailtundra.com>
Without this patch, when trying to boot zfs using U-Boot on a Jetson TX2
NX (which is aarch64), I get a CPU reset error like so:
"Synchronous Abort" handler, esr 0x96000021
elr: 00000000800c9000 lr : 00000000800c8ffc (reloc)
elr: 00000000fff77000 lr : 00000000fff76ffc
x0 : 00000000ffb40f04 x1 : 0000000000000000
x2 : 000000000000000a x3 : 0000000003100000
x4 : 0000000003100000 x5 : 0000000000000034
x6 : 00000000fff9cc6e x7 : 000000000000000f
x8 : 00000000ff7f84a0 x9 : 0000000000000008
x10: 00000000ffb40f04 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000001
x14: 00000000ff7f84bc x15: 0000000000000010
x16: 0000000000002080 x17: 00000000001fffff
x18: 00000000ff7fbdd8 x19: 00000000ffb405f8
x20: 00000000ffb40dd0 x21: 00000000fffabe5e
x22: 000000ea77940000 x23: 00000000ffb42090
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000bab10c x29: 00000000ff7f85f0
Code: d00001a0 9103a000 94006ac6 f9401ba0 (f9400000)
Resetting CPU ...
This happens when be64_to_cpu() is called on a value that exists at a
memory address that's 4 byte aligned but not 8 byte aligned (e.g. an
address ending in 04). The call stack where that happens is:
check_pool_label() ->
zfs_nvlist_lookup_uint64(vdevnvlist, ZPOOL_CONFIG_ASHIFT,...) ->
be64_to_cpu()
Signed-off-by: Phaedrus Leeds <mwleeds@mailtundra.com>
Fixes: 4d3c95f5ea ("zfs: Add ZFS filesystem support")
This code was hitting the error code path whenever malloc() succeeded
rather than when it failed, so presumably this part of the code hasn't
been tested. I had to apply this fix (and others) to get U-Boot to boot
from ZFS on an Nvidia Jetson TX2 NX SoM (an aarch64 computer).
Signed-off-by: Phaedrus Leeds <mwleeds@mailtundra.com>
The server sends multiple packets without waiting for an ACK
by window control and if some packets are dropped,
wget will return an ACK including the dropped packets.
Following log indicates this issue.
wget_handler() wget: Transferring, seq=97bbdd4a, ack=30,len=580
wget_handler() wget: Transferring, seq=97bbedca, ack=30,len=580
First packet of TCP sequence number is 0x97bbdd4a.
Second packet of TCP sequence number should be 0x97bbe2ca,
however it is 0x97bbedca and returns its ACK, so the server
suppose that 0x97bbe2ca and 0x97bbedca are received appropriately.
In this case, 0x97bbe2ca was lost and the data of wget was broken.
In this patch, next_data_seq_num holds the next expected
TCP sequence number.
If the TCP sequence number different from next_data_seq_num,
trying to retransmit the packet.
Signed-off-by: Yasuharu Shibata <yasuharu.shibata@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20348
- Update the imx_rgpio2p to only access one address as per the
dt-schema.
- Remove unused imx9_cpu.c file.
- Only use the LPUART ipg clk for i.MX7ULP.
- Use the correct anatop base for accessing the PLL clocks on i.MX93.
- Add option to reprogram FPGA every reboot, enable this as default in
chameleonv3 defconfig.
- Fixes: Rename CONFIG_SPL_SOCFPGA_SEC_REG to CONFIG_SPL_SOCFPGA_DT_REG,
so the driver can be built when CONFIG_SPL_SOCFPGA_DT_REG is set in
defconfig.
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The value defaults to 0 and is ignored by dw_mmc code, so the other
users are not affected.
Setting this explicitly fixes some weird reading error found on Hi3798MV200.
Fixes: 8a5dc8140e ("mmc: hi6220_dw_mmc: add compatible for HC2910 support")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This can avoid hardcoding a clock rate in driver. Also can enable the
clocks and deassert the resets if the pre-bootloader does not do this
for us.
Currently only enabled for Hi3798MV200.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Place the SDR104/HS200/HS400 checks into the mmc_deinit() and always
call it. This simplifies the code and removes ifdeffery. No functional
change is expected.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Do not access SCC when sending commands during tuning operation as that
will disrupt the tuning operation. The tuning operation is adjusting the
SCC settings itself in execute_tuning callback.
When renesas_sdhi_execute_tuning() is called by the MMC core code, a loop
which consists of renesas_sdhi_prepare_tuning(), mmc_send_tuning() and
renesas_sdhi_compare_scc_data() iterates over each SCC tuning tap.
The renesas_sdhi_prepare_tuning() configures the SCC tuning tap number into
hardware, mmc_send_tuning() triggers transfer of tuning block which depends
on the bus mode for which the bus is currently being tuned, this information
is supplied by the MMC core code, and finally renesas_sdhi_compare_scc_data()
tests the received tuning block for validity.
Because renesas_sdhi_prepare_tuning() configures the SCC tuning tap into
the hardware to fit the tuning operation, mmc_send_tuning() which triggers
command transfer using renesas_sdhi_send_cmd() must not manipulate with
the SCC in any way. Currently renesas_sdhi_send_cmd() does unconditionally
call renesas_sdhi_check_scc_error(), which may adjust the SCC tuning tap
position by writing RENESAS_SDHI_SCC_TAPSET, which would overwrite the
required tuning configuration set by renesas_sdhi_prepare_tuning() and
disrupt the tuning operation.
Fix this by skipping the renesas_sdhi_check_scc_error() call in case the
MMC subsystem is in tuning state. This way, the SCC settings are left
unmodified by command transfer during tuning operation.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Set generic mmc->tuning flag when performing tuning to indicate
this condition to drivers. Drivers may use this to bypass various
checks during tuning.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This hs400_tuning is a flag, make it bool. No functional change.
This will be useful in the following patch, which adds another
more generic flag, where the compiler can better use the space
now reserved for the u8 to store more flags in it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The current code uses the state of tuning block received by SCC to
determine whether or not to send transmission stop command. This is
not correct. Use the state of tuning block transfer to determine
whether or not to send transmission stop command instead, because
the transmission stop command has to be sent in case the tuning
block transfer failed.
This requires two changes, separate variable to store and check the
state of tuning block received by SCC, and another separate variable
to store and check return value from transmission stop command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
In case a CRC error occurs during DMA transfer, the transfer completion
flag is not set in TMIO_SD_DMA_INFO1 and the transfer would eventually
time out. The timeout could be very long in case the transfer consists
of a large amount of blocks, the base timeout is 10 seconds and every
block adds 100 us more.
In case a CRC error does occur, a completion flag is set in a different
register, TMIO_SD_INFO1. Use this other completion flag to detect DMA
transfer ended and stop waiting for TMIO_SD_DMA_INFO1 completion flag.
This reduces the lengthy timeout in case of an error. The unconditional
check of TMIO_SD_DMA_INFO2 register for DMA related errors must not be
skipped in any case to actually recognize the DMA error and report it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The PL180/MMCI driver is implied to use CONFIG_DM and the ARM
defconfigs such as configs/vexpress_ca9x4_defconfig will get it
as well.
With a simple oneline to default to not being the v2 variant,
the original ARM MMCI variant works fine with the driver as well.
The IP version actually needs to be read out from a register on
the ARM versions, but we will simply assume we are running on the
original hardware if arm,primecell-periphid is not explicitly
specified in the device tree.
Drop the !CONFIG_DM code and depend on DM_MMC.
Tested on the Versatile Express CA9x4 board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With MMC_PWRSEQ enabled the following link issue may happen when
building SPL and SPL_PWRSEQ is not enabled.
aarch64-linux-gnu-ld.bfd: drivers/mmc/meson_gx_mmc.o: in function `meson_mmc_probe':
drivers/mmc/meson_gx_mmc.c:295: undefined reference to `pwrseq_set_power'
Fix this by adding a SPL_MMC_PWRSEQ Kconfig option used to enable mmc
pwrseq support in SPL.
Also add depends on DM_GPIO to fix following link issue:
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.o: in function `mmc_pwrseq_set_power':
drivers/mmc/mmc-pwrseq.c:26: undefined reference to `gpio_request_by_name'
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.c:29: undefined reference to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.c:31: undefined reference to `dm_gpio_set_value'
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ferass El Hafidi <vitali64pmemail@protonmail.com>
Commit 3f190c55a4
("drivers: misc: Add socfpga_dtreg driver for Intel SoCFPGA")
This commit rename CONFIG_SPL_SOCFPGA_SEC_REG to CONFIG_SPL_SOCFPGA_DT_REG
in Makefile.
Signed-off-by: Wan Yee Lau <wan.yee.lau@intel.com>
Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.
Signed-off-by: Michał Barnaś <barnas@google.com>
The first patch is by Weizhao Ouyang and avoids sf probe crashes.
The second patch is by Arseniy Krasnov and adds basic support for Amlogic
Meson NAND controller on AXG.
The following four patches are by Alexander Dahl and apply some fixes to
drivers/mtd/nand/raw/ and port some changes applied in Linux.
The following patch is by Bruce Suen and adds support for XTX SPINAND.
Finally, the last patch is again by Arseniy Krasnov and adds access to
OTP region, supporting info, dump, write and lock operations.
Add access to OTP region. It supports info, dump, write and lock
operations. Usage example:
'mtd otpread nand0 u 0 1024' - dump 1024 bytes of user area starting
from offset 0 of device 'nand0'.
'mtd otpwrite nand0 10 11223344' - write binary data 0x11, 0x22, 0x33,
0x44 to offset 10 to user area of device 'nand0'.
'mtd otplock nand0 0 1024' - lock 1024 bytes of user area starting
from offset 0 of device 'nand0'.
'mtd otpinfo nand0 f' - show info about factory area of device 'nand0'.
Link: https://lore.kernel.org/all/20240326223919.3781-1-avkrasnov@salutedevices.com
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Introduced in upstream Linux with commit 7a08dbaedd365 for release v5.0.
When the new atmel nand driver was backported to U-Boot with commit
6a8dfd5722 ("nand: atmel: Add DM based NAND driver") that definition
was added to the driver instead of the header file. Move it over to the
other definitions with the same help text it has in Linux.
Code actually using this has not been ported over to raw nand base yet.
Link: https://lore.kernel.org/all/20240320090214.40465-3-ada@thorsis.com
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Pull request efi-2024-07-rc1-2
Documentation:
* bump build dependency idna to 3.7
* update docker image reference to latest
* fix section levels in gen_compile_commands
* fix references to trace doc
UEFI:
* eliminate duplicate runtime section definitions
* let 'EFI using ACPI tables at' be a debug message
* sanitize efi_tcg2_final_events_table definition
* move efi_var_collect to common functions
* improve error messages in variables unit test by using
EFI_UNSUPPORTED for private authenticated variables
While we unlikely to have an issue with CVE-2024-3651, it is simple
enough to bump our version of idna to receive the fix, do so.
Reported-by: GitHub dependabot
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The length of the variable name typically is not 1.
Neither the length of the variable name nor the size of the appended
data is known in the include.
* Define the size of element variable_name as variable.
* Remove the unusable element variable_data.
Addresses-Coverity-ID: 467400 Out-of-bounds read
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The following symbols are defined in two includes:
* __efi_runtime_start[]
* __efi_runtime_stop[]
* __efi_runtime_rel_start[]
* __efi_runtime_rel_stop[]
Eliminate the definitions in efi_loader.h.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_var_collect() was initially placed in efi_var_file.c, since back
then we only supported efi variables stored in a file. Since then we
support variables stored in an RPMB as well and use that function to
collect variables that should be present at runtime.
So let's move it around in efi_var_common.c which makes more sense
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The 2 subsections of this page ("Compatible IDEs" and "Usage") are using
the same header level as the title (with "===").
Because of this, they always appear in the HTML rendered ToC.
Drop the subsections one level lower by replacing "=" by "-".
This fixes the HTML rendering.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
commit cacc0b2678 ("CI: Move to latest container image") updated the
docker container image.
Reflect the change in the documentation.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Eugene Uriev <eugeneuriev@gmail.com> says:
There was no "mcheck" for U-Boot before.
Since U-Boot has only 1 thread, and normally makes 4000+ - 6000+
mallocs, it's better to use havier canaries to protect heap-chunks.
My variant uses 2x8 = 16byte-long protector. And
the multiplier could be changed to tune speed/protection tradeoff.
This protects not only against memset()-s, but against "near" wild
pointers too, and makes more probable to catch "distant" ones.
The core file of the set is included into the C-file, not complied
separately in order to enable (potential) coexisting of
mcheck-protectors, e.g. malloc_simple(.) and dlmalloc simultaneously.
My tests were for ARM SoC, 64bit, so the patch is
aware of alignment.
Primary this patch is for using by developers: to verify,
if a change doesn't break the heap integrity.
By default the mcheck is disabled and wouldn't affect the boot.
I used pedantic mode, canary=16byte, registry-size=6608.
For my system the overhead was 230ms.
The using of pre-reloc/malloc_simple heap is
too hard to follow after the relocation.
So lets drop it from the pedantic registry
and switch to dlmalloc, when moved.
The offset is ignored, but kept in the API
for the probable case, when that early
heap is relocated too.
Signed-off-by: Eugene Uriev <eugeneuriev@gmail.com>
The pedantic mode is run-time contolled, so
appropriate registry take place everytime.
Maybe it's worth to use compile-time control only.
So, the registry could be optimized out by an #ifdef.
Signed-off-by: Eugene Uriev <eugeneuriev@gmail.com>
This changes are probable worth to be generalized in a
separate .h-file so, making it able to cover
libc-mallocs and others, without too much copy-paste.
But the malloc<=>mALLOc substitutions interfere
with an elegant way to do this.
Signed-off-by: Eugene Uriev <eugeneuriev@gmail.com>
These fast helpers sometimes breach mem-chunk boundaries.
Thus they trigger mcheck alarm. Standard ones are accurate though.
Signed-off-by: Eugene Uriev <eugeneuriev@gmail.com>
Allowing multicast packets is required for IPv6 neighbor discovery
protocol.
Signed-off-by: Parvathi Bhogaraju <pbhogaraju@microsoft.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
In IPv6 context, the ICMP and UDP checksum byte in the RX packet
is initially set to 0, recaclculated, and then re-inserted.
This process can result in a dirty cache line. To prevent issues,
it is essential to invalidate cache for the RX buffer before freeing
the descriptor for next DMA transfer.
This ensure that the dirty cache line doesn't inadvertently written back
due to cache eviction, there by corrupting the RX buffer
Signed-off-by: Parvathi Bhogaraju <pbhogaraju@microsoft.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
MD Danish Anwar <danishanwar@ti.com> says:
Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI
AM654 SR2.0.
The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces
support for ICSSG driver in uboot.
This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.
To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC
cores and RPROC cores need to be booted with the firmware. This step is
done inside driver similar to kernel.
The remoteproc driver uses request_fw_into_buf() API from fs-loader driver
to load and start rproc with the required firmwares.
This series only introduces driver files. The device tree and config
changes to enable ICSSG driver will be introduced later.
ICSSG firmware supports FDB commands. Add support to send FDB commands
from driver. Once rx_flow_id is obtained from dma, let firmware know that
we are using this rx_flow_id by sending a FDB command.
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
This is the PRUSS Ethernet driver for TI AM654 SR2.0 and later SoCs with
the ICSSG PRU Sub-system running EMAC firmware. ICSSG Subsystem supports
two slices per instance. This driver caters to both slices / ports of
the icssg subsystem.
Since it is not possible for Ethernet driver to register more than one
port for a given instance, this patch introduces top level PRUETH as
UCLASS_MISC and binds UCLASS_ETH to individual ports in order to support
bringing up more than one Ethernet interface in U-Boot.
Since top level driver is UCLASS_MISC, board files would need to
instantiate the driver explicitly.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Add icssg_queue.c file. This file introduces macros and APIs related to
ICSSG queues. These will be used by ICSSG Ethernet driver.
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Add icssg_config.h / .c and icssg_classifier.c files. These are firmware
configuration and classification related files. Add MII helper APIs and
MACROs. These APIs and MACROs will be later used by ICSSG Ethernet driver.
Also introduce icssg_prueth.h which has definition of prueth related
structures.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Add firmware interface related headers and macros for ICSSG Ethernet
driver. These macros will be later used by the ICSSG ethernet driver.
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Michal Simek <michal.simek@amd.com> says:
It looks like that only CVE-2016-9841 is not fixed and this series is
trying to address it. The first two patches are just preparation based on
changes which happened in past. The third one is actual fix and the last
one is following what has been done in Linux kernel long time ago and don't
use incorrect zlib version string.
I tested it with and I can't see any issue.
./test/py/test.py --bd sandbox --build -s
And gitlab CI is also not showing any issue.
Get rid of zlib version which is not correct because of U-Boot related
changes and various CVE backports.
The change in inspired by Linux kernel commit 4f3865fb57a0 ("[PATCH]
zlib_inflate: Upgrade library code to a recent version") which described
ZLIB_VERSION removal as
"This patch also removes ZLIB_VERSION as it no longer has a correct value.
We don't need version checks anyway as the kernel's module handling will
take care of that for us. This removal is also more in keeping with the
zlib author's wishes (http://www.zlib.net/zlib_faq.html#faq24) and I've
added something to the zlib.h header to note its a modified version."
Author describes wish to follow this guidance at
https://www.zlib.net/zlib_faq.html#faq24:
"The license says that altered source versions must be "plainly marked". So
what exactly do I need to do to meet that requirement?
You need to change the ZLIB_VERSION and ZLIB_VERNUM #defines in zlib.h. In
particular, the final version number needs to be changed to f, and an
identification string should be appended to ZLIB_VERSION. Version numbers
x.x.x.f are reserved for modifications to zlib by others than the zlib
maintainers. For example, if the version of the base zlib you are altering
is 1.2.3.4, then in zlib.h you should change ZLIB_VERNUM to 0x123f, and
ZLIB_VERSION to something like 1.2.3.f-zachary-mods-v3. You can also update
the version strings in deflate.c and inftrees.c."
But U-Boot is not exact version that's why following the same style which
has been used by Linux kernel where ZLIB_VERSION is completely removed.
Signed-off-by: Michal Simek <michal.simek@amd.com>
The patch corresponds to zlib commit at
9aaec95e82
which declares that it is fixing CVE-2016-9841.
Here is c&p description from zlib:
"Use post-increment only in inffast.c.
An old inffast.c optimization turns out to not be optimal anymore
with modern compilers, and furthermore was not compliant with the
C standard, for which decrementing a pointer before its allocated
memory is undefined. Per the recommendation of a security audit of
the zlib code by Trail of Bits and TrustInSoft, in support of the
Mozilla Foundation, this "optimization" was removed, in order to
avoid the possibility of undefined behavior."
Origin patch also updates the code when
INFLATE_ALLOW_INVALID_DISTANCE_TOOFAR_ARRR is present but this code is not
the part of U-Boot hence it is ignored.
Also do not deal with state->sane variable which requires other changes
which are also not the part of zlib.
Commit 92faa8b109 ("zlib: handle overflow while calculating available
stream input size") is kept in inffast.c too not to break described case.
Signed-off-by: Michal Simek <michal.simek@amd.com>
There is no particular patch/description which described the reason for
this change but it was done as the part of zlib 1.2.3.5 release done by
zlib commit d004b047838a ("zlib 1.2.3.5"). It is preparation for followup
patch.
Signed-off-by: Michal Simek <michal.simek@amd.com>
There is no particular patch/description which described the reason for
this change but it was done as the part of zlib 1.2.3.5 release done by
zlib commit 639be997883d ("zlib 1.2.3.3") It is preparation for followup
patch.
Signed-off-by: Michal Simek <michal.simek@amd.com>
The function uniphier_mem_map_init() is to change global variable
'mem_map', which is referenced to get_page_table_size() to calculate
the size of page table.
However, uniphier_mem_map_init() is called after get_page_table_size(),
so the size of page table and 'mem_map' become inconsist each other.
After all, U-Boot fails to boot on chip with memory map different from
default map,
uniphier_mem_map_init() should be moved to dram_init(), which is
called before get_page_table_size().
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
When "memory" node is being processed in fdt_pack_reg() on ARM64
platforms, an unaligned bus access might happen, which leads to
"synchronous abort" CPU exception. Consider next dts example:
/ {
#address-cells = <2>;
#size-cells = <1>;
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x3ab00000>,
<0x0 0xc0000000 0x40000000>,
<0x8 0x80000000 0x80000000>;
};
};
After fdt_pack_reg() reads the first addr/size entry from such memory
node, the "p" pointer becomes 12 bytes shifted from its original value
(8 bytes for two address cells + 4 bytes for one size cell). So now it's
not 64-bit aligned, and an attempt to do 64-bit bus access to that
address will cause an abort like this:
"Synchronous Abort" handler, esr 0x96000021, far 0xba235efc
This issue was originally reported by David Virag [1] who observed it
happening on Samsung Exynos7885 SoC (ARM64), and later the same issue
was observed on Samsung Exynos850 (ARM64).
Fix the issue by using put_unaligned_be64() helper, which takes care of
possible unaligned 64-bit accesses. That solution was proposed by Simon
Glass in the original thread [1].
[1] https://lists.denx.de/pipermail/u-boot/2023-July/522074.html
Fixes: 739a01ed8e ("fdt_support: fix an endian bug of fdt_fixup_memory_banks")
Suggested-by: Simon Glass <sjg@google.com>
Reported-by: David Virag <virag.david003@gmail.com>
Closes: https://lists.denx.de/pipermail/u-boot/2023-July/522074.html
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We may enter the command line interface in a state where on the remote
console the cursor is not shown. Send an escape sequence to enable it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In part_get_info_by_name() the inability to get some partition info
shouldn't be a reason for dropping out of the loop. That might happen
e.g. if the partition is hidden or unused. An example of such case are
Samsung devices, where they use the "unused" GUID type
(00000000-0000-0000-0000-000000000000) to indicate that the partition
should be hidden from the OS. Such partitions might not be seen in
"part list" output, which creates "gaps" in numbering in between of the
visible partitions:
Part Start LBA End LBA Name
1 0x00000400 0x0000a3ff "efs"
5 0x00026420 0x00026c1f "dtbo"
12 0x0003f390 0x0074738f "super"
In that case, the loop in part_get_info_by_name() would break after
partition #1, so any attempt to obtain "dtbo" or "super" partition will
fail. Fix that by continuing to iterate over the remaining partitions to
make sure none of the visible ones is missed. That makes "part" command
(e.g. "part start", "part size") able to work with such tables.
Fixes: 87b8530fe2 ("disk: part: implement generic function part_get_info_by_name()")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A recent refactoring in image-host.c messed up the return values of
the function that reads the encryptiong keys. This patch fixes this
and also makes sure that error output goes to stderr instead of to
stdout.
Signed-off-by: Hugo Cornelis <hugo.cornelis@essensium.com>
Mentions that command line option --signal is needed to make use of this
configuration option.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Instead of checking a configuration setting in booti_start() adjust the
sandbox implementation of booti_setup().
Write a console message when trying to run the booti command on the sandbox
indicating that it is not supported.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We should check the return value of fcntl().
Addresses-Coverity-ID: 131108 ("Unchecked return value from library")
Addresses-Coverity-ID: 131109 ("Unchecked return value from library")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Those keyboards do not return the current device state. Polling will
timeout unless there are key presses. This is not a problem during
operation but the initial device state query during probing will fail.
Skip this step in usb_kbd_probe_dev() to make these devices useable.
Not all Apple keyboards behave like this. A keyboard with USB
vendor/product ID 05ac:0221 is reported to work with the current code.
Unfortunately some Keychron keyboards "re-use" Apple's vendor ID and
show the same behavior (Keychron C2, 05ac:024f for example).
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Add the environment variable "usb_ignorelist" to prevent USB devices
listed in it from being bound to drivers. This allows to ignore devices
which are undesirable or trigger bugs in u-boot's USB stack.
Devices emulating keyboards are one example of undesirable devices as
u-boot currently supports only a single USB keyboard device. Most
commonly, people run into this with Yubikeys, so let's ignore those in
the default environment.
Based on previous USB keyboard specific patches for the same purpose.
Link: https://lore.kernel.org/u-boot/7ab604fb-0fec-4f5e-8708-7a3a7e2cb568@denx.de/
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Janne Grunau <j@jannau.net>
Select environment location based on the device we boot from.
Also, introduce a "boot" variable that represents the current boot
device and can be used by scripts.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it is
booting from.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Relocate booindex to OCRAM region after it gets opened by TIFS so
the main domain bootloaders can have access to this data.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Add support for detecting and processing TIFSSTUB images for HS, HSFS
and GP devices.
TIFSSTUB image for related device type will be loaded, rest TIFSSTUB
images will be discarded.
Example, for GP device, tifsstub-gp will be loaded, tifsstub-hs and
tifsstub-fs will be discarded.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Move verdin-am62 to OF_UPSTREAM:
- handle the fact that dtbs now have a 'ti/' prefix
- imply OF_UPSTREAM
- remove redundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files
- update MAINTAINERS file
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
This extra binding is non-standard and now unneeded as we bind the
sysreset driver automatically. This matches what is done in Linux
and allows us to more closely match the DTBs. Remove the binding
and all users.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
The sysreset TI-SCI API is available with TI-SCI always, there is no need
for a DT node to describe the availability of this. If the sysreset driver
is available then bind it during ti-sci probe.
Remove the unneeded device tree matching.
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The device name is a concatenation of the device node name of the cpsw
device and of the device node name of the port. In my case that is
ethernet@8000000
port@1
First the buffer is really too small, but more importantly, there is no
boundary check. Use snprintf() and increase the buffer size.
Fixes: 38922b1f4a ("net: ti: am65-cpsw: Add support for multi port independent MAC mode")
Signed-off-by: Michael Walle <mwalle@kernel.org>
During the boot, the EFI loader maps the memory from ram_top to ram_end
as EFI_BOOT_SERVICES_DATA. When LMB does boot_fdt_add_mem_rsv_regions()
to OPTEE, TFA, R5, and M4F DMA/memory "no-map" for the kernel it produces
the following error message:
ERROR: reserving fdt memory region failed (addr=9cb00000 size=100000 flags=4)
ERROR: reserving fdt memory region failed (addr=9cc00000 size=e00000 flags=4)
ERROR: reserving fdt memory region failed (addr=9da00000 size=100000 flags=4)
ERROR: reserving fdt memory region failed (addr=9db00000 size=c00000 flags=4)
ERROR: reserving fdt memory region failed (addr=9e780000 size=80000 flags=4)
ERROR: reserving fdt memory region failed (addr=9e800000 size=1800000 flags=4)
To avoid this, don't flag with EFI_BOOT_SERVICES_DATA the memory from
ram_top to ram_end by the EFI loader.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
With the current config for tha SK-AM62, fdtfile isn't set in the U-Boot
environment. When using bootflow to boot from a block device, where the
extlinux.conf file specifies `fdtdir`, a fallback device tree is being
constructed from the `soc` (`k3`) and `board` (`am62x`) environment
variables, resulting in u-Boot trying to retrieve
`/dtbs/6.8.1+/k3-am62x.dtb`. This file doesn't exist.
The environment variables `default_device_tree` and
`default_device_tree_arch` are set in the config, the `findfdt` script
can be called to construct `fdtfile` from the environment variables set
by these config options, however this script currently isn't being run.
Calling this script results in the correct device tree being retrieved:
Retrieving file: /dtbs/6.8.1+/ti/k3-am625-sk.dtb
Many boards are calling this script as part of their boot command. The
am62x currently isn't. Rectify this so that booting works correctly.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
When there is a lint error the user gets the following cryptic message:
binman: Node '/path/to/some/node': Yamllint error: 18: comments
This isn't very helpful. Improve the message to tell the user that the
number is actually a line number and also tell the user in which file
they have to look.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The maximum frequency of the A53 CPU on the AM62 depends on the speed
grade of the SoC. However, this value is hardcoded in the DT for all
AM62 variants, potentially causing specifications to be exceeded. Moreover,
setting a common lower frequency for all variants increases boot time.
To prevent these issues, modify the DT at runtime from the R5 core to
adjust the A53 CPU frequency based on its speed grade.
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
AM62 SoC has multiple speed grades. Add function to return max A53 CPU
frequency based on grade. Fastest grade's max frequency also depends on
PMIC voltage, to simplify implementation use the smaller value.
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Reduce tmp variable use and remove unnecessary type cast in
env_get_bootm_mapsize(). This aligns the env variable parsing
with env_get_bootm_low(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change type of 'tmp' variable from phys_size_t to phys_addr_t and
rename it to 'low' to better describe what the variable represents,
which is either the bootm_low address from environment or start of
DRAM address.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce tmp variable use and remove unnecessary type cast in
env_get_bootm_size(). This aligns the env variable parsing
with env_get_bootm_low(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change type of ulong env_get_bootm_low() to phys_addr_t env_get_bootm_low().
The PPC/LS systems already treat env_get_bootm_low() result as phys_addr_t,
while the function itself still returns ulong. This is potentially dangerous
on 64bit systems, where ulong might not be large enough to hold the content
of "bootm_low" environment variable. Fix it by using phys_addr_t, similar to
what env_get_bootm_size() does, which returns phys_size_t .
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Simon Glass <sjg@chromium.org> says:
This little series reprises the EFI-video fix, fixes a USB problem and
enables a boot script for coreboot.
It also moves to truetype fonts for coreboot and qemu-x86, since the
menus look much better and there are no strong size constraints.
With these changes it is possible to boot a Linux distro automatically
with U-Boot on x86, including when U-Boot is the second-stage
bootloader.
Enable this feature to provide a larger font choice and more attractive
menus. Expand the ROM for x86_64 to 2MB to make space for the font.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed to support Truetype fonts. In any case, the compiler
expects SSE to be available in 64-bit mode. Provide an option to enable
SSE so that hardware floating-point arithmetic works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Saving and restoring entries is used for expo and for the command line,
which we don't use in SPL. Drop these methods.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The ANSI codes are not correctly handled at present, in that the
requested X position is added to the current one.
Correct this and also call vidconsole_entry_start() to start a new text
line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Provide the user with a list of available boot options. Selecting one
causes it to be booted. Pressing <ESC> causes U-Boot to return to the
command-line prompt.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass <sjg@chromium.org> says:
This series is the culmanation of the current line of refactoring
series. It adjusts pxe to call the booting functionality directly
rather than going through the command-line interface.
With this is is possible to boot using the extlinux bootmeth without
the command line enabled.
It also updates fastboot to do a similar thing.
Use zboot_run() to boot rather than the command line. This allows
extlinux to be used (on x86) without CMDLINE being enabled.
Collect any error but do not return it, to match the existing code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use bootm_run() and booti_run() to boot rather than the command line.
This allows extlinux to be used without CMDLINE being enabled.
Collect any error but do not return it, to match the existing code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code undertakes a separate task from the main logic of
label_run_boot() so move it into its own function.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bootm_argv[3] expression is used in many places. It is the FDT
address, so use that name throughout.
Assign it to bootm_argv[3] only at the end, when all the conditions are
resolved.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is far too long and complicated. Split out the part
which actually calls the boot commands into a separate function.
Change a strncpy() to strlcpy() to keep checkpatch happy.
No functional change is intended.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is possible to boot a kernel without CMDLINE being enabled. Update
the implementation to handle this, and drop the condition from the
FASTBOOT config.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Given the name of this variable, it should be an address, not a
pointer. Update this, to make it easier to use with sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dmitrii Merkurev <dimorinny@google.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3
Use the new CONFIG_BOOTM symbol to determine whether SYS_BOOT_LEN is
visible or not, since we want to support decompression when CMDLINE is
disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow these functions to be compiled in when CONFIG_BOOTM is enabled,
even if CONFIG_CMD_BOOTM is not.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Booting an OS does not require the 'bootm' command, so change the
condition for these options.
Move them into boot/ so they don't depend on CMDLINE
Note that CMD_BOOTM_PRE_LOAD has been put directly into the bootm code
so will need some additional refactoring (and a test!) to allow it to
change over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Create a separate Kconfig option which enables the bootm logic,
separate from the 'bootm' command. This will eventually allow booting
without CMDLINE enabled.
Update boards which disable CMD_BOOTM to disable BOOTM instead, since
CMD_BOOTM now depends on BOOTM
Signed-off-by: Simon Glass <sjg@chromium.org>
The boot menu shows Android first and then a timestamp option. Move
these later since they are less commonly used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass <sjg@chromium.org> says:
This series refactors the zboot code to allow it to be used with
CONFIG_COMMAND disabled.
A new zboot_run() function is used to boot a zimage.
The current use case (ChromeOS) is the uncommon case. Document how this
function is more normally used, where base is 0 and cmdline is NULL
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have a function to start the process of booting a zimage,
use it in zboot_run() to avoid duplicated logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move zboot_start() and zboot_info() in with the other logic functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The term 'start' is used withint bootm and zboot to indicate the first
phase of booting an image.
Since zboot_start() does the whole boot, rename it to zboot_run() to
align with bootm_run() etc.
Fix a log message while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Process the arguments before calling zboot_start() so that we can
separate the command line from the internal logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
The only difference between the command and the underlying logic is the
setting of envrionment variables. Move this out of the command
processing since it needs to be done in any case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Separate out the commands from the logic. This will eventually allow
the logic to be used when CONFIG_CMDLINE is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the iteration and write out each state in full. This will allow
the arguments to be reduced and adjusted in future patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the functionality of zboot is contained in the logic which
handles a zimage. Create a separate Kconfig for the logic so that it can
(later) be used without the command itself being enabled.
Enable ZBOOT by default on x86, with the command depending on that. The
existing 'imply' can therefore be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Much of the code in zimage.c deals with the zboot command. Move it into
a sepatate zboot.c file within the cmd/ directory. This will eventually
allow use of the zimage logic without the command being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
In preparation for splitting the zboot-command code into a separate
file, move the definitions into the header file.
While we are here, mention when load_address and base_ptr are set up
and explain bzimage_addr better. Make cmdline const since it cannot be
changed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Xilinx changes for v2024.07-rc1
xilinx:
- Do not call env_get_location when !ENV_IS_NOWHERE
- Add FDT_FIXUP_PARTITIONS support
- Fix legacy format MAC decoding
zynqmp:
- Enable semihosting SPL support
- DT updates
- Kconfig resort/cleanup
- Don't describe second image/capsule if !SPL
- Add support for dfu/capsule description via MTD
- Support JTAG as alternative boot mode
- Add support for TEG soc variant
zynqmp-kria:
- Wire usb4 boot device
- Update SDIO tristate pin configuration
- Disable SPI_FLASH_BAR to avoid issue with SPI after update
mbv:
- Enable SPL and binman
- Small platform changes
zynqmp-nand:
- Error out in case of unsupported SW ECC
- Clean error path
versal-net:
- Support multiple locations for variables
The str[] buffer declared in make_flamegraph() is used to hold strings
representing the full call-stacks recorded in traces. The size of this
buffer is currently 500 characters and this works well for the documented
examples.
However, it is possible to exhaust this buffer when processing traces
captured when running the UEFI shell on aarch64 sandbox for example.
Indeed, the maximum length needed for such traces can reach 780 characters.
As it is difficult to evaluate the maximum size that would ever be needed
for all the possible traces, let's use a dynamically allocated `abuf'
instead, which we reallocate when needed.
This fixes the following error:
String too short (500 chars)
While at it, fix a few typos in strings and comments.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@amd.com>
Missing line-feeds in error messages lead to output like:
phy_startup() failed: -110FAILED: -110=>
Output like the following is much easier to read:
phy_startup() failed: -110
FAILED: -110
=>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The NFS protocol uses file handles to refer to file or directory.
In NFSv2 file handles have a fixed size of 32 bytes.
In NFSv3 file handles have a variable length up to 64 bytes. This is
also true for the MOUNT protocol. [1]
When the NFSv3 server replies with a file handle length > 32 bytes, U-Boot
only copies 32 bytes of that file handle and the next LOOKUP Call fails:
BIOS> nfs ${loadaddr} 192.168.1.51:/nfsroot/opos93dev-br/boot/Image
Using ethernet@428a0000 device
File transfer via NFS from server 192.168.1.51; our IP address is 192.168.1.133
Filename '/nfsroot/opos93dev-br/boot/Image'.
Load address: 0x80400000
Loading: *** ERROR: File lookup fail
done
BIOS>
Looking at this transfer in Wireshark, we can see that the server
replies with the following file handle:
length: 36
[hash (CRC-32): 0x230ac67b]
FileHandle: 0100070101005e000000000091763911f87c449fa73c298552db19ba0c9f60002980cfd2
and U-Boot sends the following file handle in the next LOOKUP Call:
length: 32
[hash (CRC-32): 0x6314131b]
FileHandle: 000000240100070101005e000000000091763911f87c449fa73c298552db19ba
Fix this by using a variable length file handle for dirfh.
[1] https://www.rfc-editor.org/rfc/rfc1813.html#page-106
Fixes: b0baca9820 ("net: NFS: Add NFSv3 support")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Tested-by: Andrew Davis <afd@ti.com>
Open for reading as O_RDONLY instead of O_RDWR:
the only usage of the fd is for the single read() below;
this prevented
mkimage -f auto -A arm64 \
-T kernel -C lz4 -d Image-6.6.15.lz4 \
-b mt8173-elm-hana-6.6.15.dtb outf
when the inputs were unwritable.
Link: https://bugs.debian.org/1063097
Signed-off-by: Ahelenia Ziemiańska <nabijaczleweli@nabijaczleweli.xyz>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
When accessing an ext2 system the message "File System is consistent\n" is
shown after each write. This is superfluous noise. Only write a debug
message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
LDR format files are used primarily by Analog Devices processors but may
be of interest to other vendors. Previously support existed for this
format as part of the U-Boot build, but it has been unmaintained and
unused for a long time. In preparation for adding support for modern ADI
processors that use LDR, modernize the LDR support:
- Introduce CONFIG_LDR_CPU as the CPU string recognized by the LDR tool
may not be the same as CONFIG_CPU
- Add an SPL target that repackages u-boot-spl inside an LDR file
An almost identical target for packaging u-boot into an LDR file already
exists and did not need to be created.
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
With configs such as "am64x_evm_a53" or "imx8mp_venice" which list
multiple device trees to build we get a warning such as:
scripts/Makefile.spl:578: target 'spl/dts/freescale/' given more than once in the same rule
If we sort this list first the warning goes away.
Tested-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
When a file is created in the linux and corresponding file permission
is set, if the file needs to be modified in uboot during the startup
process, the modified file permission will be reset to 755. Therefore,
when the ext4fs_write() function is called, if the file already exists,
the file permission of the new file is equal to the file permission of
the existing file.
Currently if ${bootfile} is unset and sysboot is invoked with no
filename specified then U-Boot will crash will a null-pointer
dereference. Add the missing check and a matching error print.
Fixes: 993c912d30 ("cmd: sysboot: Create a sysboot command dedicated file")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The implementation of map_range() creates the requested mapping by
walking the page tables, iterating over multiple PTEs and/or descending
into existing table mappings as needed. When doing so, it assumes any
pre-existing valid PTE to be a table mapping. This assumption is wrong
if the platform code attempts to successively map two overlapping ranges
where the latter intersects a block mapping created for the former.
As a result, map_range() treats the existing block mapping as a table
mapping and descends into it i.e. starts interpreting the
previously-mapped range as an array of PTEs, writing to them and
potentially even descending further (extra fun with MMIO ranges!).
Instead, pass any valid non-table mapping to split_block(), which
ensures that it actually was a block mapping (calls panic() otherwise)
before splitting it.
Fixes: 41e2787f5e ("arm64: Reduce add_map() complexity")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Verdin AM62
Reviewed-by: Marc Zyngier <maz@kernel.org>
The Kria board features a recovery application that activates
when the FW_EN button is pressed.
Upon power-up flash operates in 3B mode, However, the recovery
application changes it back to 4B mode.
Currently, after a reset, u-boot activates CONFIG_SPI_FLASH_BAR
and assumes the flash is in 3B mode. However, there's no code
or reset lines connected to the flash that could return it to
3B mode. To resolve this issue, changes were made to disable
CONFIG_SPI_FLASH_BAR, which activates 4-byte opcodes.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20240409094826.4131643-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The differences between the Milk-V Mars board and the VisionFive 2 board
are small enough that we can support both using the same U-Boot build.
* The model and compatible property are taken from proposed Linux patches.
* The EEPROM is atmel,24c02 according to the vendor U-Boot.
* The second Ethernet port is not available.
usb@10100000 does not exist in U-Boot yet. So we don't have to reflect
differences in usage here.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Export a function get_product_id_from_eeprom() to read the product ID.
This value can be used for fixing up the device-tree on JH7110 based
products.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Currently in set_fdtfile() we set the value of environment variable fdtfile
unconditionally. The implies that a value in the environment will be
ignored.
With the patch environment variable fdtfile will only be set if it does not
yet exist. This requires that CONFIG_DEFAULT_FDT_FILE is not set.
Now the user can either set and save fdtfile interactively or in the U-Boot
configuration to overrule the device-tree name chosen based on the
hardware in set_fdtfile().
Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
When virtio_init() gets called from board_init() PCI isn't ready. Thus,
virtio-over-PCI (e.g. network interfaces) devices can't be detected and
used without additional `virtio scan` scan in the shell or a script.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
A new property has been added, with an extensive rationale at [1], that
can be used in place of "riscv,isa" to indicate what extensions are
supported by a given platform that is a list of strings rather than a
single string. There are some differences between the new property,
"riscv,isa-extensions" and the incumbent "riscv,isa" - chief among them
for the sake of parsing being the list of strings, as opposed to a
string. Another advantage is strictly defined meanings for each string
in a dt-binding, rather than deriving meaning from RVI standards. This
will likely to some divergence over time, but U-Boot's current use of
extension detection is very limited - there are just four callsites of
supports_extension() in mainline U-Boot.
These checks are limited to two checks for FPU support and two checks
for "s" and "u". "s" and "u" are not supported by the new property, but
they were also not permitted in "riscv,isa". These checks are only
meaningful (or run) in M-Mode, in which case supports_extension() does
not parse the devicetree anyway.
Add support for the new property in U-Boot, prioritising it, before
falling back to the, now deprecated, "riscv,isa" property if it is not
present.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
cpu_get_desc() for the RISC-V CPU currently reads "riscv,isa" to get
the description, but it is no longer a required property and cannot be
assummed to always be present, as the new "riscv,isa-extensions" and
"riscv,isa-base" properties may be present instead.
On RISC-V, cpu_get_desc() has two main uses - firstly providing an
informational name for the CPU for smbios or at boot with
DISPLAY_CPUINFO etc and secondly it forms the basis of ISA extension
detection in supports_extension() as it returns (a portion of) an ISA
string.
cpu_get_desc() returns a string, which aligned with "riscv,isa" but
the new property is a list of strings. Rather than add support for
the list of strings property, which would require creating an isa
string from "riscv,isa-extensions", modify the RISC-V CPU's
implementaion of cpu_get_desc() return the first compatible as the
cpu description instead. This may be fine for the informational cases,
but it would break extension dtection, given supports_extension()
expects cpu_get_desc() to return an ISA string.
Call dev_read_string() directly in supports_extension() to get the
contents of "riscv,isa" so that extension detection remains functional.
As a knock-on affect of this change, extension detection is no longer
broken for long ISA strings. Previously if the ISA string exceeded the
32 element array that supports_extension() passed to cpu_get_desc(),
it would return ENOSPC and no extensions would be detected.
This bug probably had no impact as U-Boot does not currently do anything
meaningful with the results of supports_extension() and most SoCs
supported by U-Boot don't have anywhere near that complex of an ISA
string. The QEMU virt machine's CPUs do however, so extension detection
doesn't work there.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add dcache operations invalidate_dcache_range and flush_dcache_range for
cv1800b.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
When debugging, it is useful to have a backtrace to find
out what is in the call stack as the previous function (RA)
may not have been the culprit.
Since this adds size to the build, do not add it by default
and avoid putting it in the SPL build if not needed.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Tested-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Pull request efi-2024-07-rc1
Documentation:
* improve description of FAT partition name generation
* add missing :: in doc/usage/cmd/itest.rst
UEFI:
* fix address mode for __efi_runtime_start/stop,
__efi_runtime_rel_start/stop
* fix size of variable attribute constants
* enable booting via EFI boot manager by default
* correct the sequence of the EFI boot methods
* correct finding the default EFI binary
* don't delete variable from memory if update failed
* fix append write behavior to non-existent variable
* Use binman for testing capsule updates on the sandbox
* Consider capsule test files in .gitignore and make clean
A symbol defined in a linker script (e.g. __efi_runtime_rel_start = .;)
is only a symbol, not a variable and should not be dereferenced.
The common practice is either define it as
extern uint32_t __efi_runtime_rel_start or
extern char __efi_runtime_rel_start[] and access it as
&__efi_runtime_rel_start or __efi_runtime_rel_start respectively.
So let's access it properly since we define it as an array
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A symbol defined in a linker script (e.g. __efi_runtime_start = .;) is
only a symbol, not a variable and should not be dereferenced.
The common practice is either define it as
extern uint32_t __efi_runtime_start or
extern char __efi_runtime_start[] and access it as
&__efi_runtime_start or __efi_runtime_start respectively.
So let's access it properly since we define it as an array
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* The sandbox must not use an arbitrary file name bootsbox.efi but the
file name matching the host architecture to properly boot the respective
file. We already have an include which provides a macro with the name of
the EFI binary. Use it.
* The path to the EFI binary should be absolute.
* The path and the file name must be capitalized to conform to the UEFI
specification. This is important when reading from case sensitive
file systems.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_default_filename.h requires HOST_ARCH to be defined. Up to now we
defined it via a CFLAGS. This does not scale. Add the symbol to
version_autogenerated.h instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If UEFI is enabled in U-Boot, we want it to conform to the UEFI
specification. This requires enabling the boot manager boot method.
Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The default sequence of boot methods is determined by alphabetical sorting
during linkage.
* efi_mgr must run before efi to be UEFI compliant
* pxe should run as last resort
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Our efi_var_mem_xxx() functions don't have a replace variant. Instead we
add a new variable and delete the old instance when trying to replace a
variable. Currently we delete the old version without checking the new
one got added
Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We don't yet support EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS for file
based variables, but we should pass it to TEE based variable stores.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
GetVariable() and SetVariable() only accept a 32bit value for attributes.
It makes not sense to define EFI_VARIABLE_READ_ONLY as unsigned long.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
GetVariable() and SetVariable() use an uint32_t value for attributes.
The UEFI specification defines the related constants as 32bit.
Add the missing EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS constant.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Current "variables" efi_selftest result is inconsistent
between the U-Boot file storage and the tee-based StandaloneMM
RPMB secure storage.
U-Boot file storage implementation does not accept SetVariale
call to non-existent variable with EFI_VARIABLE_APPEND_WRITE,
it return EFI_NOT_FOUND.
However it is accepted and new variable is created in EDK II
StandaloneMM implementation if valid data and size are specified.
If data size is 0, EFI_SUCCESS is returned.
Since UEFI specification does not clearly describe the behavior
of the append write to non-existent variable, let's update
the U-Boot file storage implementation to get aligned with
the EDK II reference implementation.
Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
List all prefix currently used for generating FAT partition names.
Describe which device class uses which prefix.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A certain set of capsule files are now generated as part of the
sandbox build. Add these files to the CLEAN_FILES list for deletion on
invoking any of the cleanup targets.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canoncal.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The sandbox platform build now generates a set of capsules. Put the
related files generated into gitignore.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Currently, all the capsules for the sandbox platform are generated at
the time of running the capsule tests. To showcase generation of
capsules through binman, generate all raw(non FIT payload) capsules
needed for the sandbox platform as part of the build. This acts as an
illustrative example for generating capsules as part of a platform's
build.
Make corresponding change in the capsule test's configuration to get
these capsules from the build directory.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The capsule update testing is carried out only on the sandbox and
sandbox_flattree variants. Remove the capsule update related configs
from the other sandbox variants. This ensures that the capsule files
are generated only on variants which are used for the feature's
testing.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20228
- Convert imx8mp-beacon and verdin-imx8mm/verdin-imx8mp to OF_UPSTREAM.
- Enable PCIe NVMe support on imx8mp_beacon.
- Fix Ethernet and board detection on mx6cuboxi.
- Fix signature_block_hdr struct fields.
- Fix imx9_probe_mu prototype and make it to get called in
EVT_DM_POST_INIT_R.
- Test whether ethernet node is enabled before reading MAC EEPROM on
DHSOM SoMs.
- Ethernet, i2c, and USB support are now enabled by default
- The clock driver gets some bug fixes and cleanup
- Invalid FDTs are now properly detected in board_fdt_blob_setup().
- The pinctrl driver gains preparatory support for per-pin function
muxes.
- Support is added for two generations of Qualcomm HighSpeed USB PHY
- A power domain driver is added for the Globall Distributed Switch
Controllers on the GCC hardware block.
- SDM845 gains USB host mode support.
- OF_LIVE is enabled by default for Qualcomm platforms
- Some U-Boot devicetree compatibility fixups are added during init to
improve compatbility with upstream DT.
According to the documentation (for example NXP's AN13994 on encrypted
boot on AHAB-enabled devices), the format of the signature block is:
+--------------+--------------+--------------+-------------+
| Tag | Length - msb | Length - lsb | Version |
+--------------+--------------+--------------+-------------+
| SRK Table offset | Certificate offset |
+-----------------------------+----------------------------+
| Blob offset | Signature offset |
+-----------------------------+----------------------------+
There is no runtime error in the current u-boot code. The only user of
struct signature_block_hdr is the "get_container_size" function in the
"arch/arm/mach-imx/image-container.c" file, and it's only using the very
first fields of the struct (which are in the correct position) and thus
there is no runtime failure.
On the other hand, extending the code to get the data encryption key
blob offset on the signature header gives a wrong value as the field is
in the wrong order.
Signed-off-by: Javier Viguera <javier.viguera@digi.com>
Move verdin-imx8mm and verdin-imx8mp to OF_UPSTREAM:
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove redundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files
- update MAINTAINERS files
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
This event callback imx9_probe_mu needs to be called in board_r
as well, because many ELE APIs depending on this MU probed
Signed-off-by: Ye Li <ye.li@nxp.com>
The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
addresses. U-Boot needs to auto-detect which phy is actually present,
and at which address it is responding.
Auto-detection from multiple phy nodes specified in device-tree does not
currently work correct. As a work-around merge all three possible phys
into one node with the special address 0xffffffff which indicates to the
generic phy driver to probe all addresses.
Signed-off-by: Josua Mayer <josua@solid-run.com>
[fabio: Added the changes to imx6qdl-sr-som-u-boot.dtsi.]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Christian Gmeiner <cgmeiner@igalia.com>
The mx6cuboxi_defconfig target supports several board
variants. All of these variants use the hummingboard devicetree in U-Boot.
Currently, the devicetree model as well as the board variant name
are shown:
...
Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
Board: MX6 Cubox-i
...
Printing the devicetree model that is used internally by U-Boot
may confuse users.
Unselect the CONFIG_DISPLAY_BOARDINFO option so that only the
board name is printed in board_late_init() instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Christian Gmeiner <cgmeiner@igalia.com>
Check whether the ethernet interface is enabled at all before reading
MAC EEPROM. As a cost saving measure, it can happen that the MAC EEPROM
is not populated on SoMs which do not use ethernet.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The baseboard supports and NVMe drives via the PCIe slot. This
requires a few extra config options to be enabled.
The NVMe can be enumerated with the following commands:
u-boot=> pci enum
PCIE-0: Link up (Gen1-x1, Bus0)
u-boot=> nvme scan
u-boot=> nvme info
Device 0: Vendor: 0x15b7 Rev: 20120022 Prod: 184960441105
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
u-boot=>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
The imx8mn-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Discovered while trying to use the second interface in the USB keyboard
driver necessary on Apple USB keyboards.
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
The xhci driver currently only does the necessary initialization for
endpoints found in the first interface descriptor. Apple USB keyboards
(released 2021) use the second interface descriptor for the HID keyboard
boot protocol. To allow USB drivers to use endpoints from other
interface descriptors the xhci driver needs to ensure these endpoints
are initialized as well.
Use USB_MAX_ACTIVE_INTERFACES to control how many interface descriptors
are considered during endpoint initialisation.
For now define it to 2 as that is sufficient for supporting the Apple
keyboards.
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
In the next step endpoints for multiple interfaces are set up. Move most
of the per endpoint initialization to separate function to avoid another
identation level.
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
Enable support for the DWC3 USB controller and required dependencies for
Qualcomm boards, specifically the DB845c:
* IOMMU / SMMU
* USB high-speed PHYs
* Mass storage and ACM gadgets
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Qualcomm FDTs are on the larger size, and with the addition of DT
modifications during board_init() it makes sense to enable OF_LIVE
globally. The cost of building the tree should be offset by the
increased efficiency at which we can walk it.
Some rough measurements with CONFIG_BOOTSTAGE suggests that this might
add 0.1-0.2ms to the boot-to-console time. However the reset-to-reset
timer difference is in the range of 0.5ms so this could just be noise.
Suffice to say, no significant slow down.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The USB VBUS supply for the type-A port is enabled via a GPIO regulator.
This is incorrectly modelled in Linux where only the PCIe dependency is
expressed. The correct way to handle this will be through a
usb-connector node, but for now we'll just mark the regulator as
always-on so that it will be enabled automatically during boot.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We don't support the RPM(h)PD power domains in U-Boot, and we don't need
to - the necessary resources are on, and we aren't going to enter any
low power modes.
We could try using a no-op device, but this requires adding a compatible
for every platform, and just pollutes the driver model. So instead let's
just remove every "power-domains" property that references the RPM(h)pd
power controller. This takes <1ms as we're using OF_LIVE.
Of note, this only applies to drivers which are loading post-relocation.
Drivers loaded pre-reloc that reference the rpm(h)pd still need
DM_FLAG_DEFAULT_PD_CTRL_OFF in their flags.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
We don't support USB super-speed in U-Boot yet, we lack the SS PHY
drivers, however from my testing even with a PHY driver there seem to be
other issues when talking to super-speed peripherals.
In pursuit of maintaining upstream DT compatibility, and simplifying
porting for new devices, let's implement the DT fixups necessary to
configure USB in high-speed only mode at runtime. The pattern is
identical for all Qualcomm boards that use the Synaptics DWC3
controller:
* Add an additional property on the Qualcomm wrapper node
* Remove the super-speed phy phandle and phy-name entries.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
When using OF_LIVE, the debug UART driver won't be probed if it's a
subnode of the geni-se-qup controller. Add a NOP driver for the
controller to correctly discover its child nodes.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The .direction_input and .direction_output ops are deprecated, and don't
seem to behave properly for us. Implement our own .set_flags op to
handle this correctly.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Most devices only initialise the USB clocks for us if we boot via
"fastboot boot", add the missing clock configuration to get both USB
ports working regardless of the bootloader state.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The RCG registers always have the same offsets, so only store the base
CMD register address and calculate the others relative to that.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some devices like the UART and clock controller reference an RPM(h)
power domain. We don't support this device in U-Boot, so add
DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the
power domain.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some Qualcomm SoCs newer than SDM845 feature a so-called "7nm phy"
driver, notable the SM8250 SoC which will gain U-Boot support in
upcoming patches.
Introduce a driver based on the Linux driver.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[code cleanup, align symbol names with Linux, switch to clk/reset_bulk APIs]
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The Snapdragon 845 and several other Qualcomm SoCs feature this
USB high-speed phy. Add a driver for it based on the Linux driver, with
support for the SDM845, and the QCM2290 and SM6115 SoCs which will gain
support in U-Boot in future patches.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[code cleanup, switch to clk_bulk]
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The current behaviour does a bitwise OR of the previous and new
divider values, this is wrong as some bits may be set already. We
need to clear all the divider bits before applying new ones.
This fixes potential issue with 1Gbit ethernet on SA8155P-ADP boards.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
[caleb: minor wording fix]
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
There are cases when previous bootloader stage leaves some seemingly
valid value in r0, which in fact does not point to valid FDT
blob. This behavior was encountered when trying to boot U-Boot as
"hyp" loader on SA8155P-ADP.
To be sure that we really got the pointer to a device tree we need to
validate it with fdt_check_header() function.
Note: This approach is not 100% fool-proof, as get_prev_bl_fdt_addr()
theoretically can return a pointer to a region that is not physically
mapped and we will get data abort exception when fdt_check_header()
will try to access it. But at this early boot stage we don't know
where RAM is anyways so there is little we can do.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This patch is the preparation for SM8150 support. This new SoC
depending on the particular pin can have different numbers for the
same function. For example "rgmii" function for GPIO4 has id=2 while
for GPIO59 it has id=1. So, to support this type of SoCs,
get_function_mux() callback needs to know for which pin the function
is requested.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Now sub-drivers for particular SoCs can register them as power domain
drivers. This is needed for upcoming SM8150 support, because it needs
to power up the Ethernet module.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
[caleb: make ARCH_SNAPDRAGON select POWER_DOMAIN]
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
QCS404 supports Synopsys Designware Ethernet QOS IP and we already have
the corresponding glue layer present upstream as:
drivers/net/dwc_eth_qos_qcom.c. So enable corresponding support.
Along with that it is possible for Qualcomm platforms to retrieve MAC
address from I2C eeprom present on board. So enable corresponding
support as well.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Now that Turris Omnia has a rng driver provided in the MCU driver,
enable the rng command in defconfig.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for true random number generator provided by the MCU on
Turris Omnia. The MCU firmware supports TRNG if the FEAT_TRNG bit is set
in features. In that case we bind the rng driver.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
In the rng command, print
Abort
instead of
Reading RNG failed
if the error number is -EINTR, which can happen if the user pressed
CTRL-C.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable support for the poweroff command via sysreset for Turris Omnia.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for system power off via UCLASS_SYSRESET. Newer versions of
Turris Omnia MCU firmware can power off the board (MCU will disable
almost all voltage regulators and go into low power mode).
Move the MCU driver into drivers/misc and register it under UCLASS_MISC.
The sysreset and gpio device are bound as child devices of the MCU device.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Update firmware features reading to try reading 32 bits of features and
fallback to reading 16 bits.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Use byteorder conversion function instead of manually assembling data
from/to MCU.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add driver model support for sysreset via mvebu system controller. This is
currently only available for U-Boot proper.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The mvebu-reset driver is only needed by the mvebu PCIe driver, but
currently it is automatically selected if DM_RESET is enabled. Add the
condition of PCI_MVEBU also being enabled for mvebu-reset to be
selected.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The system-controller driver for 32-bit Armada is currently registered
as UCLASS_RESET, since it only provides enabling/disabling PCIe ports.
Rework it as UCLASS_SYSCON and bind mvebu-reset as a child device.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 35e29e89a3 ("arm: mvebu: Implement simple mvebu-reset driver
for enabling/disabling PCIe ports") made it so that the mvebu reset
driver for enabling/disabling PCIe ports is build if CONFIG_DM_RESET is
enabled. This is because PCI_MVEBU depends on DM_RESET.
But the driver should not be built for SPL. Indeed the PCI_MVEBU driver
is not supported in SPL now, and so the mvebu-reset driver is not needed.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
If the FEAT_CRYPTO feature bit is present in MCU features, the board
crypto is implemented by MCU and the Atmel SHA chip is not present.
Disable Atmel SHA device-tree node in that case.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
If MCU supports the FEAT_CRYPTO feature, read board ECDSA public key
from MCU and print it.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Implement reading board serial number, first MAC address and board
version from MCU. MCU supports board information if the FEAT_BOARD_INFO
feature bit is set in MCU features.
Prefer getting board information from MCU if supported, fallback to
Atmel SHA chip.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Refactor MCU status word and MCU firmware features reading to make it
simpler to use.
Try reading 32 bits of features, if that fails, read 16 bits. Older MCU
firmware supports only 16-bit wide features, and if more bytes are read,
either 0xff is sent or I2C transaction fails. Handle both cases.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Since commit 8cd4bf7dc9 ("turris: Use checkboard() instead of
show_board_info()") the model is show two times during boot:
Model: Turris Omnia
Model: Turris Omnia
This is because the common function show_board_info() shows it, and
Turris' checkboard() also does.
Remove the second print.
Fixes: 8cd4bf7dc9 ("turris: Use checkboard() instead of show_board_info()")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add header containing all MCU command definitions and use it in board
code and in MCU driver.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot builds for Turris Omnia are approaching the limit of 0xf0000
bytes, which is the size of the U-Boot partition on Omnia.
Enable LTO to get more size optimized binaries.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the
DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build
DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi
files from arch/arm/dts/ directory.
Background:
The following 2 commands and filters were used in the analysis to determine
which upstream DTS and DTSI files can be used as they are, or need to have
modified/created *-u-boot.dtsi for u-boot specific implementation, and
which board should be opt-out from OF_UPSTREAM.
"git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 | xargs -n1 sh -c 'diff -qs arch/arm/dts/$1.dts dts/upstream/src/arm/marvell/$1.dts' sh | grep differ"
"diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep ".dtsi ""
More detailed information can be found at:
https://lore.kernel.org/u-boot/20240328021825.17935-1-mibodhi@gmail.com/T/#u
I've regression tested this patch with the Zyxel NSA325 (Kirkwood 88F6282)
and Zyxel NSA310S (Kirkwood 88F6281). The Zyxel NSA325 board has a
USB 3.0 controller attached to the PCIe bus. And the Zyxel NSA310S
has an extensive overhaul in bindings and styles in upstream DTS version.
Tested-by: Michael Walle <michael@walle.cc> # on lschv2
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
u-boot-dfu-next-20240402
- Implement Qualcomm wrapper for dwc3
- Multiple sector size support for UMS
- CDC ACM gadget initialization fix
- Refactor board code from dwc3 to prepare better interrupt support
- Bugfix for for qcom-smmu when compiling with -DDEBUG
Private function for finding out location of environment is not working
when ENV_IS_NOWHERE is disabled.
The reason is that current fallback is ENVL_UNKNOWN when
CONFIG_ENV_IS_NOWHERE is not enabled. The code could be updated like this
- return ENVL_NOWHERE;
+ if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
+ return ENVL_NOWHERE;
+ return ENVL_UNKNOWN;
But then boot is still not working because ENVL_UNKNOWN has no driver and
env_init() returns -ENODEV. That's why it is better not to define board
specific env_get_location() because then weak env_get_location() is used
which is going over env_locations[] and returning locations which are
actually enabled in u-boot instance.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/830b9c93d30688cfa8a5cbb0388e79deb7731f29.1711107795.git.michal.simek@amd.com
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20128
- Allow accessing job-rings from non-TrustZone on colibri-imx7.
- Add support for reading XEA hardware revision.
- Convert imx8mq/8mm/8mn/8mp-evk to OF_UPSTREAM.
- Add TMP support on imx8m*-venice-gw72xx.
- Miscellaneous fixes and improvements.
The XEA board has following hard constraints regarding size of binaries:
- u-boot.sb < 48 KiB
- u-boot.img < 448 KiB
Added values are supposed to avoid exceeding size of binaries during
future u-boot development.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The XEA board now has several HW revisions for SoM boards.
This patch provides support for reading this revision ID values in early
u-boot proper as production devices boot via falcon boot with correct DTB
flashed at production (so there is no need to alter SPL).
Additionally, the maximal SPL size (~55KiB) constraint is not allowing
having even simplified FIT support in it.
As a result it was necessary to handle reading GPIOs values solely in
u-boot proper as one configuration (i.e. 'single binary' -
imx28_xea_sb_defconfig) is not using SPL framework.
Moreover, the 'board_som_rev' environment variable will be used to point
correct configuration from the Linux FIT file.
Additionally, as now XEA has its second HW revision - this information is
printed when u-boot proper starts.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The imx287 based XEA board's revision 2 uses GPIO_3_21 for PHY reset
It is safe to keep the GPIO_2_13 as well, as in the SPL SPI1 is not
used for transmission. This simplifies the code, as the proper
configuration is performed either in falcon boot's read DTB or in
u-boot proper (with correct FIT configuration chosen).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With Ethernet DM in place, there is no longer the need for having
the board_phy_config() and setup_fec() functions anymore.
Remove them.
Successfully tested a TFTP transfer after these changes.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Change to regulator_set_enable_if_allowed to avoid enable failure,
in case same phy supply shared by multiple FEC controllers.
Signed-off-by: Ye Li <ye.li@nxp.com>
Set FSL_CAAM_JR_NTZ_ACCESS configuration since colibri-imx7
uses Freescale CAAM Job Ring linux driver
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Add a new kconfig option to allow non-secure world access
to the CAAM Job Ring.
This is needed, for example, when running linux without
OP-TEE services, as it's done on Colibri iMX7.
Fixes: 51f1357f34 ("Revert "drivers/crypto/fsl: assign job-rings to non-TrustZone"")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
On Colibri iMX8X, the gpio initialization and usage should be handled by
the device tree, not by the colibri-imx8x.c code. Therefore, remove it.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Add a weak default reset_cpu() implementation just like
it is done on arch/arm/mach-imx/cpu.c.
This allows the removal of the empty reset_cpu() in several
board files.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Colibri iMX8X
The GW71xx baseboard has a TPM that defined in the upstream dt however
we need to ensure the GPIO reset line is de-asserted which we do in boot
firmware with a gpio hog.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW7901 has GPIO's to configure the direction of its isolated
digital I/O signals. Add the GPIO pinmux, line names, and hog
configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
CONFIG_USB_GADGET_VENDOR_NUM is a 16-bit number, so remove
the leading zero.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Ilias Apalodimas <ilias.apalodimas@linaro.org> says:
The arm linker scripts had a mix of symbols and C defined variables in an
effort to emit relative references instead of absolute ones e.g [0]. A
linker bug prevented us from doing so [1] -- fixed since 2016.
This has led to confusion over the years, ending up with mixed section
definitions. Some sections are defined with overlays and different
definitions between v7 and v8 architectures.
For example __efi_runtime_rel_start/end is defined as a linker symbol for
armv8 and a C variable in armv7.
Linker scripts nowadays can emit relative references, as long as the symbol
definition is contained within the section definition. So let's switch most
of the C defined variables and clean up the arm sections.c file.
There's still a few symbols remaining -- __secure_start/end,
__secure_stack_start/end and __end which can be cleaned up
in a followup series.
For both QEMU v7/v8 bloat-o-meter shows now size difference
$~ ./scripts/bloat-o-meter u-boot u-boot.new
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Function old new delta
Total: Before=798861, After=798861, chg +0.00%
The symbols seem largely unchanged apart from a difference in .bss
as well as the emited sections and object types of the affected variables.
On the output below the first value is from -next and the second comes from
-next + this patchset. The .bss_start/end sections have disappeared from
the newer binaries.
# For example on QEMU v8:
efi_runtime_start
7945: 0000000000000178 0 OBJECT GLOBAL DEFAULT 2 __efi_runtime_start
7942: 0000000000000178 0 NOTYPE GLOBAL DEFAULT 2 __efi_runtime_start
efi_runtime_stop
9050: 0000000000000d38 0 OBJECT GLOBAL DEFAULT 2 __efi_runtime_stop
9047: 0000000000000d38 0 NOTYPE GLOBAL DEFAULT 2 __efi_runtime_stop
__efi_runtime_rel_start
7172: 00000000000dc2f0 0 OBJECT GLOBAL DEFAULT 10 __efi_runtime_rel_start
7169: 00000000000dc2f0 0 NOTYPE GLOBAL DEFAULT 10 __efi_runtime_rel_start
__efi_runtime_rel_stop
7954: 00000000000dc4a0 0 OBJECT GLOBAL DEFAULT 10 __efi_runtime_rel_stop
7951: 00000000000dc4a0 0 NOTYPE GLOBAL DEFAULT 10 __efi_runtime_rel_stop
__rel_dyn_start
7030: 00000000000dc4a0 0 OBJECT GLOBAL DEFAULT 11 __rel_dyn_start
7027: 00000000000dc4a0 0 NOTYPE GLOBAL DEFAULT 11 __rel_dyn_start
__rel_dyn_end
8959: 0000000000102b10 0 OBJECT GLOBAL DEFAULT 12 __rel_dyn_end
8956: 0000000000102b10 0 NOTYPE GLOBAL DEFAULT 11 __rel_dyn_end
image_copy_start
9051: 0000000000000000 0 OBJECT GLOBAL DEFAULT 1 __image_copy_start
9048: 0000000000000000 0 NOTYPE GLOBAL DEFAULT 1 __image_copy_start
image_copy_end
7467: 00000000000dc4a0 0 OBJECT GLOBAL DEFAULT 11 __image_copy_end
7464: 00000000000dc4a0 0 NOTYPE GLOBAL DEFAULT 11 __image_copy_end
bss_start
12: 0000000000102b10 0 SECTION LOCAL DEFAULT 12 .bss_start
8087: 0000000000000018 0 NOTYPE GLOBAL DEFAULT 1 _bss_start_ofs
8375: 0000000000102b10 0 OBJECT GLOBAL DEFAULT 12 __bss_start
8084: 0000000000000018 0 NOTYPE GLOBAL DEFAULT 1 _bss_start_ofs
8372: 0000000000102b10 0 NOTYPE GLOBAL DEFAULT 12 __bss_start
bss_end
14: 000000000010bc30 0 SECTION LOCAL DEFAULT 14 .bss_end
7683: 000000000010bc30 0 OBJECT GLOBAL DEFAULT 14 __bss_end
8479: 0000000000000020 0 NOTYPE GLOBAL DEFAULT 1 _bss_end_ofs
7680: 000000000010bbb0 0 NOTYPE GLOBAL DEFAULT 12 __bss_end
8476: 0000000000000020 0 NOTYPE GLOBAL DEFAULT 1 _bss_end_ofs
# For QEMU v7:
efi_runtime_start
10703: 000003bc 0 OBJECT GLOBAL DEFAULT 2 __efi_runtime_start
10699: 000003c0 0 NOTYPE GLOBAL DEFAULT 2 __efi_runtime_start
efi_runtime_stop
11796: 000012ec 0 OBJECT GLOBAL DEFAULT 2 __efi_runtime_stop
11792: 000012ec 0 NOTYPE GLOBAL DEFAULT 2 __efi_runtime_stop
__efi_runtime_rel_start
9937: 000c40dc 0 OBJECT GLOBAL DEFAULT 8 __efi_runtime_rel_start
9935: 000c40dc 0 NOTYPE GLOBAL DEFAULT 9 __efi_runtime_rel_start
__efi_runtime_rel_stop
10712: 000c41dc 0 OBJECT GLOBAL DEFAULT 10 __efi_runtime_rel_stop
10708: 000c41dc 0 NOTYPE GLOBAL DEFAULT 9 __efi_runtime_rel_stop
__rel_dyn_start
9791: 000c41dc 0 OBJECT GLOBAL DEFAULT 10 __rel_dyn_start
9789: 000c41dc 0 NOTYPE GLOBAL DEFAULT 10 __rel_dyn_start
__rel_dyn_end
11708: 000da5f4 0 OBJECT GLOBAL DEFAULT 10 __rel_dyn_end
11704: 000da5f4 0 NOTYPE GLOBAL DEFAULT 10 __rel_dyn_end
image_copy_start
448: 0000177c 0 NOTYPE LOCAL DEFAULT 3 _image_copy_start_ofs
11797: 00000000 0 OBJECT GLOBAL DEFAULT 1 __image_copy_start
445: 0000177c 0 NOTYPE LOCAL DEFAULT 3 _image_copy_start_ofs
11793: 00000000 0 NOTYPE GLOBAL DEFAULT 1 __image_copy_start
image_copy_end
450: 00001780 0 NOTYPE LOCAL DEFAULT 3 _image_copy_end_ofs
10225: 000c41dc 0 OBJECT GLOBAL DEFAULT 10 __image_copy_end
447: 00001780 0 NOTYPE LOCAL DEFAULT 3 _image_copy_end_ofs
10222: 000c41dc 0 NOTYPE GLOBAL DEFAULT 10 __image_copy_end
bss_start
11: 000c41dc 0 SECTION LOCAL DEFAULT 11 .bss_start
11124: 000c41dc 0 OBJECT GLOBAL DEFAULT 11 __bss_start
11120: 000c41dc 0 NOTYPE GLOBAL DEFAULT 11 __bss_start
bss_end
13: 000cbbf8 0 SECTION LOCAL DEFAULT 13 .bss_end
10442: 000cbbf8 0 OBJECT GLOBAL DEFAULT 13 __bss_end
10439: 000cbbf8 0 NOTYPE GLOBAL DEFAULT 11 __bss_end
It's worth noting that since the efi regions are affected by the change, booting
with EFI is preferable while testing. Booting the kernel only should be enough
since the efi stub and the kernel proper do request boottime and runtime
services respectively.
Something along the lines of
> virtio scan && load virtio 0 $kernel_addr_r Image && bootefi $kernel_addr_r
will work for QEMU aarch64.
Tested platforms:
- QEMU aarch64
- Xilinx kv260 kria starter kit & zynq
- QEMU armv7
- STM32MP157C-DK2
[0] commit 3ebd1cbc49 ("arm: make __bss_start and __bss_end__ compiler-generated")
[1] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
Previous patches cleaning up linker symbols, also merged any explicit
. = ALIGN(x); into section definitions -- e.g
.bss ALIGN(x) : instead of
. = ALIGN(x);
. bss : {...}
However, if the output address is not specified then one will be chosen
for the section. This address will be adjusted to fit the alignment
requirement of the output section following the strictest alignment of
any input section contained within the output section. So let's get rid
of the redundant ALIGN directives when they are not needed.
While at add comments for the alignment of __bss_start/end since our
C runtime setup assembly assumes that __bss_start - __bss_end will be
a multiple of 4/8 for armv7 and armv8 respectively.
It's worth noting that the alignment is preserved on .rel.dyn for
mach-zynq which was explicitly aligning that section on an 8b
boundary instead of 4b one.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
image_copy_start/end are defined as c variables in order to force the compiler
emit relative references. However, defining those within a section definition
will do the same thing since [0].
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
a section.
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
__efi_runtime_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
commit 47bd65ef05 ("arm: make __rel_dyn_{start, end} compiler-generated")
were moving the __rel_dyn_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].
However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable
type with the value being a fixed offset from the base of a section [1].
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html
Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
__efi_runtime_rel_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
commit 3ebd1cbc49 ("arm: make __bss_start and __bss_end__ compiler-generated")
and
commit f84a7b8f54 ("ARM: Fix __bss_start and __bss_end in linker scripts")
were moving the bss_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].
However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable type with
the value being a fixed offset from the base of a section [1].
So let's start cleaning this up starting with the bss_start and bss_end
variables. Convert them into symbols within the .bss section definition.
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Qualcomm sdm845
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
commit 3d74a0977f ("ti: am335x: Remove unused linker script") removed
the linker script for the TI variant. This linker script doesn't seem to
do anything special and on top of that, has no definitions for the EFI
runtime sections.
So let's get rid of it and use the generic linker script which defines
those correctly
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
- A few ncsi PHY fixes, clean up PHY GPIO reset code, support LEDs on
BCM54210E PHY, fix a signed shift overflow in the PHY code, hifemac
updates, E1000 i225-IT support, improve DM_MDIO+DM_PHY support and
enable it on the BeaglePlay platform.
Pull request acpi-next-20240328
ACPI:
* rename fields rename aslc_id, aslc_revision to match ACPI specification
* remove duplicate declaration of acpi_fill_header()
* document fields of HETP table
* MAINTAINERS: add include/acpi/ to ACPI
SMBIOS:
* provide wake-up type in SMBIOS table
* display wake-up type in smbios command
We should not use the reserved value 0x00 for the wake up type but
use 0x02 (Unknown).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct type 1 output
* render wake up time as string
* print family string
* remove duplicate serial number output
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Document struct acpi_gen_regaddr and struct acpi_hpet.
Sphinx requires that the __packed attribute is at the end of the structure
definitions.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The fields Creator ID and Creator Revision contain information about the
tool that created an ACPI table. This may be the ASL compiler for some
tables but it is not for others. Naming these fields aslc_id and
aslc_revision is misleading.
It is usual to see diverse values of Creator ID. On a laptop I saw these:
'AMD ', 'INTL, 'MSFT', 'PTEC'. Obviously not all relate to the Intel
ASL compiler.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reset GPIO handling is done in ETH PHY Class driver.
Enable DM_ETH_PHY.
We don't use Fixed PHY so disable PHY_FIXED.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
If DM_ETH_PHY is enabled then try to bind and probe the
generic Ethernet PHY driver for each child of MDIO bus.
This is to ensure that GPIO reset handling is done if available
before MDIO bus driver scans for the PHYs.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Pull the PHY GPIO reset code into separate function, since
this is and will be reused multiple times. Set up default
reset assert and deassert timing to generous 20ms and 1ms
for maximum compatibility in case those DT properties are
missing.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
From the ethernet header is not on aligned, because the length
of the ethernet header is 14 bytes.
Therefore, unaligned access must be done here.
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
shrink the first argument of log_msg_ret(), add dev_xxx() functions for
error reporting.
Fixes: 9d8f78a2a7 ("net: add hifemac Ethernet driver for HiSilicon platform")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
The initial commit used log_msg_ret() wrongly. Fix that by moving error
report to a separate dev_err() call and shrink the first argument of
log_msg_ret() to no more than 4 chars.
Fixes: 6b5c8d98e2 ("net: add hifemac_mdio MDIO bus driver for HiSilicon platform")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
As with fixed-link phy device, the NC-SI phy devive does not
require an mdio bus. So, a condition is added to check the
NC-SI phy id to avoid accessing the bus pointer that is NULL.
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Booting R-Car Gen3 arm64 U-Boot with CONFIG_UBSAN=y resulted in:
=====================================================================
UBSAN: Undefined behaviour in drivers/net/phy/phy.c:728:19
left shift of 1 by 31 places cannot be represented in type 'int'
=====================================================================
Fix it by appending the UL suffix to the numeric literal. While at it,
convert the type of "addr" variable from signed to unsigned, to protect
against shifting the numeric literal by a negative value (which would
lead to yet another undefined behavior).
Fixes: 1adb406b01 ("phy: add phy_find_by_mask/phy_connect_dev")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
* Using U-suffix for integer is sufficient.
* ffs() of non-zero value cannot be 0. But addr being unsigned is
* preferable.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Configure LEDs on BCM54210E so they would blink on activity
and indicate link speed. Without this the LEDs are always on
if cable is plugged in.
Signed-off-by: Marek Vasut <marex@denx.de>
The issue occurs the UAF (use-after-free) to cause double free
when do the realloc function for the pointers during the
reinitialization NC-SI process, and it will cause the memory
management occurs error.
So, nullify these pointers after free.
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
CMU_CORE generates clocks needed for eMMC enablement, and CMU_HSI
provides clocks for SD card and USB. Most of the code is copied from the
Linux kernel counterpart driver.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Samsung clock drivers usually define the clock indices that are unique
per one CMU, but are not unique across all CMUs. That is, clock indices
start from 1 for each CMU, as provided in CMU bindings header. The way
the clock lookup via clk_get_by_index() works at the moment is by using
clk_of_xlate_default(), which returns globally non-unique clock ids for
for clocks registered with Samsung CCF API, which leads to incorrect
clocks being obtained. One way to fix that would be to make all clock
ids defined in the bindings header unique, but it'd make it incompatible
with Linux kernel bindings header. A better way to solve this issue is
to calculate the global clock id and use it when registering a clock
with clk_dm() and when obtaining it, in a custom .of_xlate function.
This patch adds an API for such mapping calculation, introducing the
necessary modifications to CMU registering functions in Samsung CCF.
Exynos850 clock driver (the only driver that uses Samsung CCF at the
moment) is modified accordingly, as it uses the changed API. So the
clock lookup with clk-exynos850.c driver is also fixed here.
The global clock id is calculated from CMU id and local clock id in
SAMSUNG_TO_CLK_ID() macro like this:
clk_id_global = cmu_id * 256 + clk_id_local
leaving a range of up to 256 clocks for each CMU. Then this mapping
macro is used in clk_dm() to register clocks using their global ids, and
in .of_xlate() to lookup the clock by its local id correctly. Because
.of_xlate() operation has a separate function for each CMU, it "knows"
the correct way of finding the correct clk_id_global by provided
clk_id_local.
Fixes: ff3e8b8c6c ("clk: exynos: Add Samsung clock framework")
Fixes: a36cc5e3ef ("clk: exynos: Add Exynos850 clock driver")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Samsung CCF is meant to be used from the clock drivers by calling the
CMU registration API, i.e.:
- samsung_cmu_register_one() -- for top-level CMU
- samsung_register_cmu() -- for the rest of CMUs
Functions for registering separate clocks is probably not going to be
very useful, and isn't used at the moment. Remove prototypes of those
functions to make the Samsung CCF interface more compact and clear.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Group CMU_TOP clocks to make it easier to add the support for more CMUs.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Since the zynqmp pinctrl driver now includes support for the
tri-state registers, ensure that the pins needing output-enable
are correctly configured for SOMs.
Currently, there is an issue with the detection of the MMC for
the SOM kv260, resulting in the following error:
ZynqMP> mmc dev 1
Card did not respond to voltage select! : -110
To address this problem, configure the SDIO pins for output-enable
to enable MMC detection.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240321085220.2920792-2-tejas.arvind.bhumkar@amd.com
- Add ahab_commit command support.
- Add USB support for the imx93-phyboard-segin board.
- Add i.MX8MP PCIe support.
- Fix netboot environment on phycore_imx8mp.
The "run netargs" command should come later in the "netboot" command
order when using dhcp since it sets the server and client ip addresses.
The previous order led to misconfigured kernel boot params and thus
kernel panic when serverip was not manually set.
Further, following Linux FHS 3.0, change the nfsroot default directory
to /srv/nfs.
Fixes: 60f64bec41 ("board: phytec: phycore_imx8mp: Add fec support")
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are
not connected to the SoC.
This addition to imx93-phyboard-segin-u-boot.dtsi is temporary,
until USB support is added to imx93-phyboard-segin.dts in Linux.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This message is used to commit into the fuses any new SRK revocation and
FW version information that have been found into the NXP (ELE FW) and
OEM containers.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Enable PCIe/NVMe support. Also, enable the reset, regmap and syscon
drivers which are a prerequisite for PCIe support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
[SG: rebased to next branch tip]
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Since now we have the modern pcie_dw_imx.c driver for iMX SoCs,
encourage people to switch to that for any further new iMX SoC support
or even for the older iMX6 SoCs too.
Suggested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
add support for other iMX8 variants to this driver.
iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
can reuse the generic PHY infrastructure to power on PCIe PHY.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice*
Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
reference commit 7559e7572c03 ("phy: Explicitly include correct DT
includes").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice*
Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Expose the high performance PLL as clock framework clock, so the
PCIe PHY can use it when there is no external refclock provided.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver
reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to
platform remove callback returning void").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice*
Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Add support for i.MX8MP reset controller, it has same reset IP inside
as the other iMX7 and iMX8M variants but with different module layout.
Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/reset/reset-imx7.c. Use last Linux kernel driver reference
commit bad8a8afe19f ("reset: Explicitly include correct DT includes").
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice*
Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
imx7_reset_{deassert/assert}_imx* are a bit more confusing when compared
with imx*_reset_{deassert/assert}. So refactor driver to use function
names easier to understand. This shouldn't affect the functionality
though.
Suggested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Add APIs to set a firmware_name to a rproc and boot the rproc with the
same firmware.
Clients can call rproc_set_firmware() API to set firmware_name for a rproc
whereas rproc_boot() will load the firmware set by rproc_set_firmware() to
a buffer by calling request_firmware_into_buf(). rproc_boot() will then
load the firmware file to the remote processor and start the remote
processor.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain,
and there are no C66x DSP subsystems on these SoCs. The C71x DSP subsystem
is a slighly updated version of the C71x DSP subsystem on J721e. The
C71x DSPs are 64 bit machine with fixed and floating point DSP
operations.
Extend support to the C71x DSPs with J721S2 compatible strings.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
The K3 J721S2 SoCs have three dual-core R5F subsystems, one in MCU
voltage domain and the other two in MAIN voltage domain. These R5F
clusters are similar to the R5F clusters in J7200 SoCs.
Compatible Info is updated to support J721S2 SoCs.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
mach Kconfig file select some options independently of if SPL is actually
enabled. It ends up in situation that SPL is disabled but symbols are still
present in .config. That's why add SPL dependency for them but also group
them with other SPL options in ARCH_ZYNQMP fragment with using imply
option. This should ensure the same behavior as default y.
Also fixed SPL_ZYNQMP_PSU_INIT_ENABLED for the same.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8dc4b799d36f963a3e1ebb5b24793632dc360b61.1710258674.git.michal.simek@amd.com
UFS storage often uses a 4096-byte sector size, add support for dynamic
sector sizes based loosely on the Linux implementation.
Support for dynamic sector sizes changes the types used in some
divisions, resulting in the compiler attempting to use
libgcc helpers (__aeabi_ldivmod).
Replace these divisions with calls to lldiv() to handle this correctly.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20240320-b4-qcom-usb-v4-4-41be480172e1@linaro.org
[mkorpershoek: squashed the lldiv() fix from caleb]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Pull request efi-next-20240321
Documentation:
* Avoid short reference link names in device-tree documentation.
UEFI/Video:
* Support code page 437 code points 1 - 31 used by GRUB
Test that Unicode code points which map to CP437 code points 1-31 are
converted to '_'. This ensures no FAT file names do not contain chars
which are control characters in other code pages (CP 1250 for example).
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Draw symbols from Unicode's "Geometric shapes" page which translate to
code page 437 code points 1-31. These are used by UEFI applications to
draw user interfaces using EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.
The output has to be checked manually on the screen for correctness.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
UEFI applications rely on Unicode output capability, and might use that
for drawing pseudo-graphical interfaces using Unicode defined box
drawing characters.
Add a simple test to display the most basic box characters, which would
need to be checked manually on the screen for correctness.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
UEFI relies entirely on unicode output, which actual fonts displayed on
the screen might not be ready for.
Add a test displaying some international characters, to reveal missing
glyphs, especially in our builtin fonts.
This would be needed to be manually checked on the screen for
correctness.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Code page 437 uses code points 1-31 for glyphs instead of control
characters. Map the appropriate Unicode code points to this code points.
Fixes rendering of grub2's menu as EFI application using the
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL on a console with bitmap fonts.
Signed-off-by: Janne Grunau <j@jannau.net>
efi_console / UEFI applications (grub2, sd-boot, ...) pass UTF-8
character sequences to vidconsole which results in wrong glyphs for code
points outside of ASCII. The truetype console expects Unicode code
points and bitmap font based consoles expect code page 437 code points.
To support both convert UTF-8 to UTF-32 and pass Unicode code points in
vidconsole_ops.putc_xy(). These can be used directly in console_truetype
and after conversion to code page 437 in console_{normal,rotate}.
This fixes rendering of international, symbol and box drawing characters
used by UEFI applications.
Signed-off-by: Janne Grunau <j@jannau.net>
Short reference link names like "dtspec", "dtrepo", "dttweaks" etc.
interrupt the flow of the document text. Lets avoid them and instead
expand in place for better readability.
Suggested-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Add a test for the button_cmd feature. This validates that commands can
be mapped to two buttons, that the correct command runs based on which
button is pressed, that only 1 command is run, and that no command runs
if button_cmd_0_name is wrong or unset.
Additionally, fix a potential uninitialised variable use caught by these
tests, the btn variable in get_button_cmd() is assumed to be null if
button_get_by_label() fails, but it's actually used uninitialised in
that case.
CONFIG_BUTTON is now enabled automatically and was removed when running
save_defconfig.
Fixes: e761035b64 ("boot: add support for button commands")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
There could be two memory allocation scheme in SPL phase.
Explicitly print the corresponding error message.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
- TI J7200 updates, GIC-600 support, 2 more tests, fix parsing
ccsidr_el1 register in some cases, prepare for allowing remoteproc to
use fs_loader and make the binary_size_check rule not require 'bc'.
Add a test for reset commands which performs resetting of CPU, It does
COLD reset by default and WARM reset with -w option.
Signed-off-by: Love Kumar <love.kumar@amd.com>
Add test case for saveenv command in non-JTAG bootmode which saves the
u-boot environment variables in persistent storage.
Signed-off-by: Love Kumar <love.kumar@amd.com>
The error message "bc: command not found" is easily missed since the
build continues.
bc is not a part of coreutils or base-devel. POSIX sh can also do the
calculation.
Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Current Cache Size ID Register (ccsidr_el1) has two "flavors"
depending on whether FEAT_CCIDX is implemented or not.
When FEAT_CCIDX is implemented Associativity parameter
is coded on bits [23:3] and NumSets parameter on bits [55:32].
When FEAT_CCIDX is not implemented then Associativity parameter
is coded on bits [12:3] and NumSets parameter on bits [27:13].
Current U-Boot code does not check whether FEAT_CCIDX is implemented
and always parses ccsidr_el1 as if FEAT_CCIDX was not implemented.
This is of course wrong on systems where FEAT_CCIDX is implemented.
This patch fixes that problems and tests whether FEAT_CCIDX
is implemented or not and accordingly parses the ccsidr_el1 register.
Signed-off-by: Lukasz Wiecaszek <lukasz.wiecaszek@gmail.com>
Arm's GIC-600 features a Power Register (GICR_PWRR),
which needs to be programmed to enable redistributor
operation. Power on the redistributor and wait until
the power on state is reflected by checking the bit
GICR_PWRR.RDPD == 0. While running U-Boot in EL3
without enabling this register, GICR_WAKER.ChildrenAsleep
bit is not getting cleared and loops infinitely.
This register(GICR_PWRR) must be programmed to mark the frame
as powered on, before accessing other registers in the frame.
Rest of initialization sequence remains the same.
ARM GIC-600 IP complies with ARM GICv3 architecture.
Enable this config if GIC-600 IP present.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Corrects the ti,sci property to point to dm_tifs node for proper
functioning of mcu_ringacc and mcu_udmap.
Fixes: df73e791ce ("arm: dts: j7200: dts sync with Linux 6.6-rc1")
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
- Add the missing bootph-all property in the flash subnode for ospi
- Add the missing overrides for the ospi node in the r5 devicetree
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Add the necessary configs required for OSPI functionality.
Also update the ospi flash partition offsets as per the devicetree.
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
load_firmware() API calls fs-loader APIs and checks for CONFIG_FS_LOADER
before calling those APIs. The if check only checks for CONFIG_FS_LOADER
but not for CONFIG_SPL_FS_LOADER.
When CONFIG_FS_LOADER is enabled, load_firmware() API calls fs-loader APIs
but this is done at SPL stage and at this time FS_LOADER is not built yet
as a result we see below build error.
AR spl/boot/built-in.o
LD spl/u-boot-spl
arm-none-linux-gnueabihf-ld.bfd: arch/arm/mach-k3/common.o: in function
`load_firmware':
/home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:184: undefined
reference to `get_fs_loader'
arm-none-linux-gnueabihf-ld.bfd:
/home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:185: undefined
reference to `request_firmware_into_buf'
make[2]: *** [/home/danish/workspace/u-boot/scripts/Makefile.spl:527:
spl/u-boot-spl] Error 1
make[1]: *** [/home/danish/workspace/u-boot/Makefile:2055:
spl/u-boot-spl] Error 2
make[1]: Leaving directory '/home/danish/uboot_images/am64x/r5'
make: *** [Makefile:177: sub-make] Error 2
Fix this by modifying the if check to CONFIG_IS_ENABLED(FS_LOADER) instead
of IS_ENABLED(CONFIG_FS_LOADER) as the former will check for the
appropriate config option (CONFIG_SPL_FS_LOADER / CONFIG_FS_LOADER) based
on the build stage.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
- A new driver in the misc to register setting from device tree. This
also provides user a clean interface and all register settings are
centralized in one place, device tree.
- Enable Agilex5 platform for Intel product. Changes, modification and
new files are created for board, dts, configs and makefile to create
the base for Agilex5.
Build-tested on SoC64 boards, boot tested on some of them.
This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19975
- Select polling-rate from cpu-thermal devicetree node on imx_tmu.
- Re-organize the U-Boot environment and add RAUC logic for
phycore_imx8mp.
- Enable watchdog on colibri-imx7.
- Move imx8mm-venice to use OF_UPSTREAM.
Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
- replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
dt's from the OF_LIST
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove rudundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Add RAUC boot logic to the environment. This is the first board to
utilize this environment.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Add logic for booting systems with the RAUC update mechanism. This can
be reused by other phytec boards.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Move the default bootcmd from the defconfig to the board environment.
No change in functionality.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Move the environment into the board directory and convert it from a C
header to a text file. Sort the variables alphabetically.
No functional changes.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
The polling rate is already specified in some devicetrees, like
imx8mp.dtsi for example, but was not selected so far. For the
trippoints, the cpu-thermal node is used. Also get the polling rate from
this node. Use the default of 5000ms if the polling rate should not be
specified in the devicetree.
NOTE: The polling rate from the devicetree will be used after this
patch. In imx8*.dtsi devicetrees the polling delay is set to 2000ms for
example.
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Please pull the updates for rockchip platform:
- Add board: rk3588 Generic, Cool Pi CM5, Theobroma-Systems RK3588 Jaguar SBC,
Toybrick TB-RK3588X;
rk3588s Cool Pi 4B;
rk3566 Pine64 PineTab2;
- Add saradc v2 support;
- Add PMIC RK806 support;
- rk3588 disable force_jtag by default;
- Migrate to use IO-domain driver for all boards;
- Use common bss and stack addresses for rk33xx and rk35xx boards;
- Other updates for driver, config and dts;
ADC support is implied by the Rockchip arch Kconfig but that means it
should be possible to disable ADC support and still be able to build.
However the weak implementation of rockchip_dnl_key_pressed() currently
blindly use functions from the ADC subsystem which do not exist when ADC
is not enabled, failing the build.
Therefore, let's encapsulate this logic with a check on the ADC symbol
being selected.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The BUTTON_ADC symbol guards the compilation of button-adc driver whose
name very well makes it explicit that it requires ADC support to be
enabled.
Fix build issue of button-adc driver when ADC support isn't enabled by
making sure it cannot be built without ADC support.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The ADC controller drivers are obviously all depending on ADC symbol
being selected.
While they don't seem to fail to build without, they won't be useful
without that symbol selected, so let's make sure the options aren't
shown in menuconfig when ADC isn't selected.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The SARADC is used on Jaguar for multiple things:
- channel 0 is used (at runtime) as a BIOS button,
- channel 2 is exposed on the Mezzanine connector for customer specific
logic,
- channel 5 and 6 are used for identification,
Since the SARADC requires a vref-supply provided by the RK806 PMIC, its
support and the support for its regulators are also enabled.
The button, adc, pmic and regulator commands are also enabled for CLI
use in U-Boot for debugging and scripting purposes.
The RK806 PMIC on Jaguar being routed on the SPI bus, let's enable
Rockchip SPI controller driver.
Finally, the SARADC channel 1 on Jaguar is hardwired so will never
change in the lifetime of a unit, for that reason, disable the Rockchip
Download Mode check by setting ROCKCHIP_BOOT_MODE_REG symbol to 0.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
SPL_PMIC_RK8XX and PMIC_RK8XX both share the same prompt making it
difficult to know at first glance in menuconfig what's for what, let's
fix this by adding "in SPL" at the end of the prompt for the SPL symbol.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This adds support for the SARADCv2 found on RK3588.
There is no stop callback as it is currently configured in single
conversion mode, where the ADC is powered down after a single conversion
has been made.
Due to what seems to be a silicon bug, a controller reset needs to be
issued before starting a channel conversion otherwise Rockchip says that
channel 1 will error whatever that means. This is aligned with upstream
and downstream Linux kernel as well as downstream U-Boot.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
SARADC v2 doesn't have a stop mechanism once in single mode. In series
conversion, the logic is different anyway. Therefore, let's abstract
this function so that it can be provided from the udevice.data pointer.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This adds support for RK806, only the SPI variant has been tested.
The communication "protocol" over SPI is the following:
- write three bytes:
- 1 byte: [0:3] length of the payload, [6] Enable CRC, [7] Write
- 1 byte: LSB register address
- 1 byte: MSB register address
- write/read length of payload
The CRC is always disabled for now.
The RK806 technically supports I2C as well, and this should be able to
support it without any change, but it wasn't tested.
The DT node name prefix for the buck converters has changed in the
Device Tree and is now dcdc-reg. The logic for buck converters is
however manageable within the current logic inside the rk8xx regulator
driver. The same cannot be said for the NLDO and PLDO.
Because pmic_bind_children() parses the DT nodes and extracts the LDO
index from the DT node name, NLDO and PLDO will have overlapping
indices. Therefore, we need a separate logic from the already-existing
ldo callbacks. Let's reuse as much as possible though.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
By passing a rk8xx_reg_info directly to the internal get_value, it'd be
possible to call this same function with a logic for getting the
rk8xx_reg_info different from the current get_ldo_reg, e.g. for NLDO and
PLDO support for RK806.
No logic change is expected.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
On RK809 in PMIC_POWER_ENX registers, in order to set or clear a bit N,
the bit at offset N + 4 needs to be set otherwise nothing is done.
This fixes the inability to modify the SWITCH state on RK809.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: William Wu <william.wu@rock-chips.com>
[reworded commit log]
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The read-only mode is currently supported but only for 16b-aligned
buffers. For unaligned buffers, the last byte will be read in RW mode
right now, which isn't what is desired. Instead, let's put the
controller back into RO mode for that last byte and skip any write in
the xfer loop.
This is required for 3-wire SPI mode where PICO/POCI lanes are shorted
on HW level. This incidentally the recommended design for RK806 PMIC for
RK3588 products.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Currently, if the environment is stored on an MMC device, the device
number is hardcoded by CONFIG_SYS_MMC_ENV_DEV. This is problematic
because many boards can choose between booting from an SD card or a
removable eMMC. For example, the Rock64 defconfig sets
CONFIG_SYS_MMC_ENV_DEV=1, which corresponds to the SD card. If an eMMC
is used as the boot device and no SD card is installed, it is impossible
to save the environment.
To avoid this problem, we can choose the environment MMC device based on
the boot device. The theobroma-systems boards already contain code to do
this, so this commit simply moves it to the common Rockchip board file,
with some refactoring. I also removed another implementation of
mmc_get_env_dev() from tinker_rk3288 that performed MMC boot device
detection by reading a bootrom register.
This has been tested on a Rock64v2.
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Add ADC button detect for early SPL stage for RGxx3 device. This is
important because on at least the RG353P and RG353V a clk pin is not
exposed that would allow us to take the eMMC out of the boot path.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Based on feedback from the mailing list while adding support for a new
device (the Powkiddy X55), correct the config options for the RGxx3
as well to remove unnecessary drivers and increase the SPL stack size.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support to the RGxx3 device for the Powkiddy RGB10MAX3. This device
is extremely similar to all the other devices and can use the same
bootloader with the same detection logic.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove unnecessary clock frequency defines from the RGxx3 u-boot dts.
Move the necessary defines to the RGxx3 main dts file.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the call to gpt_capsule_update_setup() from the weak function
rk_board_late_init() into the main board_late_init() function.
Also change to use IS_ENABLED() instead for defined().
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Port the RK3399 part of the Rockchip IO-domain driver from linux.
This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move ROCK Pi 4 specific board code from the shared evb_rk3399 target
into its own board target and update related defconfigs to use the new
TARGET_ROCKPI4_RK3399 option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
These functions is excluded from SPL build and BOARD_EARLY_INIT_F is not
enabled for any of the affected boards, so this legacy code is not used.
Rockchip common board code already enable all regulators flagged as
always-on or boot-on in device tree, and fixed/gpio regulators now have
basic reference counting support so the original intent of this code is
no longer valid.
Remove the unneeded and unused code that used to enable usb regulators.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add myself as a reviewer for RK3399 boards that I have and can help with
review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update MAINTAINERS files for RK3399 boards to include related device
tree files. Also correct a few filenames.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
USB gadget is not working fully as expected on RK3328, it uses a
board_usb_init() function to initialize the DWC2 OTG port.
The board_usb_init() function does not intgrate with the generic phy
framework and as a result the USB phy is not properly configured before
or after USB gadget use.
Having both USB_DWC2 and DWC2_OTG enabled for the same board is also
causing some issues.
Trying to use rockusb or ums command after usb stop result in a freeze
due to usb stop is putting the phy in a suspended state.
=> usb start
=> usb stop
=> ums 0 mmc 0
--> freeze due to usb phy is suspended <--
Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral)
depending on the most likely usage of the otg port and by migrating to
use DM_USB_GADGET instead of a board_usb_init() function.
The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a
Type-C connector, mark these boards dr_mode as peripheral, the most
likely usage is for recovery and image download.
The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG
driver from these boards to ensure that the USB_DWC2 driver is used.
The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2
and DWC2_OTG is removed from this board.
Enable RockUSB and UMS on all boards with a otg port in peripheral mode.
Also with the migration to DM_USB_GADGET completed the U-Boot specific
change to reorder usb nodes in the soc device tree can be reverted.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to use the common Product ID 0x0010 when the ums command is used.
This matches downstream vendor U-Boot and is a Product ID that tools
such as rkdeveloptool and RKDevTool will identify as MSC mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The board_usb_init() and board_usb_cleanup() functions is always
included when USB_GADGET and USB_GADGET_DWC2_OTG is enabled.
Prepare for a change to use DM_USB_GADGET with DWC2_OTG by adding an
extra ifdef condition. The extra separate ifdef for USB_GADGET prepare
for next patch that adds a g_dnl_bind_fixup() function.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3036 is using the USB product id normally used by RK3066B, and RK3328
is using the product id normally used by RK3368.
Fix this and update the default USB_GADGET_PRODUCT_NUM Kconfig option
for remaining supported Rockchip SoCs to match the product id used in
Maskrom mode.
Also remove a reference to an undefined ROCKCHIP_RK3229 Kconfig symbol.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Currently the following memory layout is typically used on RK3588:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ 3.5M, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[ 10M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[11.5M, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
SPL can safely load U-Boot proper + FDT to [10M, 11.5M) with this layout.
However, on ROCK 5A the SPL stacks is overlapping:
[ -X, 16M) - SPL pre-reloc stack (SPL_STACK)
[15.5M, 16M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 16M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 15M, 16M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
Because bind and probe udevice instanses is allocated on the pre-reloc
malloc heap, there is going to be an overlap when reloc malloc heap
reaches close to 512 KiB of usage.
Migrate to use common bss, stack and malloc heap size and addresses to
mitigate these limitations and allow for a larger U-Boot proper size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for new boards defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
With the stack and text base used by U-Boot SPL and proper on RK3399
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.
Currently the following memory layout is typically used on RK3399:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[ -16K, 3M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ -16K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ 4M, +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
[ -X, 64M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 63M, 64M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
SPL can safely load U-Boot proper + FDT to [2M, 4M-16K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.
Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With the stack and text base used by U-Boot SPL and proper on RK3328
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.
Currently the following memory layout is typically used on RK3328:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[ -8K, 3M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ -8K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[ 32M, +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
SPL can safely load U-Boot proper + FDT to [2M, 4M-8K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.
Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On Rockchip the typical aarch64 boot steps are as follows:
- BROM load TPL to SRAM
- TPL init full DRAM
- use stack in SRAM at TPL_STACK addr
- use malloc heap on stack, size is TPL_SYS_MALLOC_F_LEN
- TPL jump back to BROM
- BROM load SPL to beginning of DRAM
- SPL init storage devices
- use bss in DRAM at SPL_BSS_START_ADDR, size is SPL_BSS_MAX_SIZE
- use stack in DRAM at SPL_STACK addr (or CUSTOM_SYS_INIT_SP_ADDR)
- use malloc heap on stack, size is SPL_SYS_MALLOC_F_LEN
- SPL load FIT images from storage to DRAM
- use stack in DRAM at SPL_STACK_R_ADDR
- use new malloc heap on stack, size is SPL_STACK_R_MALLOC_SIMPLE_LEN
- SPL jump to TF-A at 0x40000
- (optional) TF-A load OPTEE
- TF-A jump to U-Boot proper at TEXT_BASE
- U-Boot proper init pre-reloc devices
- use stack in DRAM at CUSTOM_SYS_INIT_SP_ADDR
- use malloc heap on stack, size is SYS_MALLOC_F_LEN
- U-Boot proper relocate to end of usable DRAM
- U-Boot proper init devices and complete boot
SPL have access to full DRAM, however, current configuration for text
base, stack addr and malloc heap size used at the different boot steps
are at risk of overlapping, e.g. when U-Boot proper + FDT grows close
to 1 MiB on RK3328/RK3399 or when pre-reloc and reloc stack and malloc
heap overlap on ROCK 5A.
Fix this by defining safe defaults for bss, stack and malloc size and
addresses. A range at around [60 MiB, 64 MiB) was chosen to be used for
bss and stack until U-Boot proper have been relocated to end of usable
DRAM. The range was primarily chosen to be able to accommodate SoCs with
a small amount of embedded DRAM, e.g. RK3308G has 64 MiB DRAM.
Overiew of the new common memory layout:
[ 0, 2M) - SPL / TF-A / reserved
[ 2M, +X) - U-Boot proper pre-reloc
[ -X, 64M) - bss, stack and malloc heap
During SPL pre-reloc phase:
[ 0, 256K) - SPL binary is loaded by BROM to beginning of DRAM
[ -X, 63M) - SPL pre-reloc stack
[ -32K, 63M) - SPL pre-reloc malloc heap
[63.5M, +32K) - SPL bss
After SPL reloc phase:
[ 0, 256K) - SPL binary
[ 256K, +X) - TF-A image is loaded by SPL
[ 2M, +X) - U-Boot proper + FDT image is loaded by SPL
[ -X, 62M) - SPL reloc stack
[ 60M, 62M) - SPL reloc malloc heap
[ -32K, 63M) - SPL init malloc heap, memory allocated during SPL
pre-reloc phase is still in use at reloc phase
[63.5M, +32K) - SPL bss
During U-Boot proper pre-reloc phase:
[ 0, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper + FDT
[ -X, 63M) - U-Boot proper pre-reloc stack (shared addr with SPL)
[ -64K, 63M) - U-Boot proper pre-reloc malloc heap
After U-Boot proper has relocated to top of memory we should be able to
use 2M+ for loading kernel, initrd, scripts etc.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 PineTab2 is a tablet computer based on the Rockchip RK3566
SoC. The table features 4/8 GB LPDDR4 RAM and 64/128 GB eMMC storage.
Features tested on a Pine64 PineTab2 8GB v2.0:
- SD-card boot
- eMMC boot
- SPI Flash boot
- USB host
Device tree is imported from linux maintainer branch v6.9-armsoc/dts64,
commit 1b7e19448f8f ("arm64: dts: rockchip: Add devicetree for Pine64
PineTab2").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3588S/RK3588 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3588S/RK3588 boards that follow reference board design.
Also fix the alphabetical order of RK3588 boards listed in Makefile and
documentation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
TB-RK3588X board is a Rockchip Toybrick RK3588 based development board.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB Memory LPDDR4x
Mali G610MC4 GPU
2× MIPI-CSI0 Connector
1x 2Lanes PCIe3.0 Connector
1x SATA3.0 Connector
32GB eMMC Module
2x USB 2.0, 2x USB 3.0
1x HDMI Output, 1x HDMI Input
2x Ethernet Port
Functions work normally:
[1] USB2.0 Host
[2] Ethernet0 with PHY RTL8211F
More information can be obtained from the following websites:
[1] https://t.rock-chips.com/en/wiki/EN/tb-rk3588x_en/index.html
[2] http://t.rock-chips.com/
Kernel commits:
8ffe365f8dc7 ("arm64: dts: rockchip: Add devicetree support for TB-RK3588X board")
7140387ff49d ("dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X")
Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The USB2PHY regs already contain working default reset values for RK3328
and RK35xx as evidenced by the fact that this driver never has changed a
single value for these SoCs.
Reduce to only configure utmi_suspend_n and utmi_sel bits similar to
what is currently done on RK3399. Also add missing clkout_ctl for RK3588.
When enabled utmi_suspend_n is changed to normal mode and utmi_sel to
use otg/host controller utmi interface to phy. When disabled
utmi_suspend_n is changed to suspend mode and utmi_sel to use GRF utmi
interface to phy.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
On RK3399 the USB2PHY regs are located in the common GRF, remaining SoCs
that is supported by this driver have the USB2PHY regs in a different
GRF.
When support for RK356x, RK3588 and RK3328 was added this driver was
never updated to use correct GRF and have instead incorrectly written
to wrong GRF for these SoCs.
The default reset values for the USB2PHY have made USB mostly working
even when wrong GRF was used, however, following have been observed:
scanning bus usb@fd840000 for devices...
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
unable to get device descriptor (error=-1)
Fix this by using a regmap from rockchip,usbgrf prop and fall back to
getting a regmap for parent udevice instead of always getting the
common GRF.
Also protect against accidental clear of bit 0 in a reg with offset 0,
only bind driver to enabled otg/host-ports and remove unused headers.
Fixes: 3da15f0b49 ("phy: rockchip-inno-usb2: Add USB2 PHY for rk3568")
Fixes: cdf9010f6e ("phy: rockchip-inno-usb2: add initial support for rk3588 PHY")
Fixes: 9aa93d8403 ("phy: rockchip-inno-usb2: Add USB2 PHY for RK3328")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
FIT checksum validation is very slow in SPL due to D-cache not being
enabled.
Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation,
from seconds to milliseconds.
This change enables caches in SPL on all Rockchip ARM64 boards, the
Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to
disable caches for a specific board or SoC if needed.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Cool Pi CM5 EVB works as a mother board connect with CM5.
CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S
CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
The NanoPi R4S has an RK3399 SoC, which has efuse supported by
ROCKCHIP_EFUSE, not ROCKCHIP_OTP.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The rockchip-efuse driver supports the efuse found on RK3399. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.
Enable the driver and reading cpuid by default for RK3399.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The rockchip-efuse driver supports the efuse found on RK3328. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.
Enable the driver and reading cpuid by default for RK3328.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Add Kconfig options to enable support for booting from SPI NOR flash on
Orange Pi R1 Plus boards.
The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.
=> sf probe
SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1376768 bytes read in 66 ms (19.9 MiB/s)
=> sf update ${fileaddr} 0 ${filesize}
device 0 offset 0x0, size 0x150200
1126912 bytes written, 249856 bytes skipped in 14.22s, speed 100542 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.
The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.
=> sf probe
SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1359872 bytes read in 65 ms (20 MiB/s)
=> sf update ${fileaddr} 0 ${filesize}
device 0 offset 0x0, size 0x14c000
1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as it does for SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This reverts commit 3523c07867.
Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.
This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.
Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:
U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000)
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC2
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.
Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-nanopi-r2* boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add DM_REGULATOR_GPIO=y and SPL_DM_REGULATOR_GPIO=y to support the
regulator-gpio compatible.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-rock-pi-e with new defaults.
Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_MDIO=y to ensure device tree props can be used by PHY driver.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add myself as a reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-roc-cc with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-rock64 with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.
Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-evb with new defaults.
Add DM_RESET=y to support using reset signals.
Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.
Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Add SYSINFO=y to support the sysinfo uclass.
Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This architecture and related board are unmaintained currently and have
been for a long time. Remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 2027e99e61 ("Makefile: Run defconfig files through the C
preprocessor") adds `generated_defconfig' file, but fails to clean that
up. It might be useful to have that file around after `make' is done,
but it's better to clean that up on `make clean'. Also we probably want
to hide it in `git status' list. This patch makes the described changes,
and also adds `-P' parameter to the CPP command that produces the
`generated_defconfig' to avoid generating linemarkers.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 2027e99e61 ("Makefile: Run defconfig files through the C preprocessor")
Acked-by: Andrew Davis <afd@ti.com>
Added the ability to use FDT for ELF applications, required to run some
OS. To make FDT setup, you need to set the -d fdt_addr_r cmd option for
bootelf command. Enable by selecting CMD_ELF_FDT_SETUP.
Signed-off-by: Maxim Moskalets <Maxim.Moskalets@kaspersky.com>
The setup of global variable mem_map was moved into enable_caches()
by commit a70c75caba ("board: developerbox: move mem_map setup later")
since U-Boot was directly booted from NOR flash in XIP
and bss is not yet available in dram_init() at that time.
This has a problem, mem_map variable is used by
the get_page_table_size() to calculate the page table size,
but get_page_table_size() is called earlier than enable_caches()
which fills mem_map variable. With that, U-Boot fails to boot when
64GB DIMM is installed.
Currently U-Boot on the Developerbox board is not booted in XIP
and bss is available in dram_init(), let's move mem_map setup
in dram_init().
Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com>
Enable OF_UPSTREAM for AM64-EVM and SK-AM64 boards. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.7-rc7).
Signed-off-by: Andrew Davis <afd@ti.com>
The current ordering always results in func pointing to the next
function in the init_sequence. e.g. if fdtdec_setup() fails, ret will
be set to the error code, then func will be updated to point to
initf_malloc(), only then is ret checked and the loop broken. The end
result of this is that the "initcall failed at ..." error will point you
to initf_malloc(), when the error actually occured in fdtdec_setup()!
This can be quite confusing and result in a lot of time wasted debugging
code that has nothing to do with the failure (ask me how I know :P).
Adjust the for loop to check ret immediately after the call and break
early so that func will correctly reference the failed function.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
According to README CFG_SYS_BOOTMAPSZ section, in case both "bootm_low" and
"bootm_size" variables are defined, "bootm_mapsize" variable is not defined
and CFG_SYS_BOOTMAPSZ macro is not defined, all data for the Linux kernel
must be between "bootm_low" and "bootm_low" + "bootm_size".
Currently, for systems with DRAM between 0x4000_0000..0x7fff_ffff and with
e.g. bootm_low=0x60000000 and bootm_size=0x10000000, the code will attempt
to reserve memory from 0x4000_0000..0x4fff_ffff, which is incorrect. This
is because "bootm_low" is not taken into consideration correctly.
The last parameter of lmb_alloc_base() is the maximum physical address of
the to be reserved LMB area. Currently this is the start of DRAM bank that
is considered for LMB area reservation + min(DRAM bank size, bootm_size).
In case bootm_low is set to non-zero, this maximum physical address has to
be shifted upward, to min(DRAM bank start + size, bootm_low + bootm_size),
otherwise the reserved memory may be below bootm_low address.
In case of multiple DRAM banks, the current change reserves top part of
the first bank, and reserves the rest of memory in the follow up banks.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit allows users to choose the appropriate memory
allocation method between static allocated and dynamically
calloc. The previous static-array way will not obviously
contribute to the final binary size since it is uninitialized,
and might have better performance than the dynamical one.
Now we provide the users with both the two options.
Signed-off-by: Hanyuan Zhao <hanyuan-z@qq.com>
This commit simply modifies the history initialize function,
replacing the return value by panic with reasons. The calling
chains of hist_init don't have steps explicitly throwing or
dealing with the ENOMEM error, and once the init fails, the
whole system is died. Using panic here to provide error
information instead.
Signed-off-by: Hanyuan Zhao <hanyuan-z@qq.com>
While there are currently uses for a stanza of "config BOARD_SPECIFIC_OPTIONS"
followed by "def_bool y" and a series of select/imply statements, having
this option set followed by nothing else doesn't provide anything.
Remove these stanzas.
Signed-off-by: Tom Rini <trini@konsulko.com>
The 'rng list' command probes all RNG devices and list those devices
that are successfully probed. Also update the help info.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Weizhao Ouyang <o451686892@gmail.com>
According to PSCI specification DEN0022F, PSCI_FEATURES is used to check
whether the SMCCC is implemented by discovering SMCCC_VERSION.
Signed-off-by: Weizhao Ouyang <o451686892@gmail.com>
In the Makefile there is a line that says this:
# the checker needs the correct machine size
CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)
Set CONFIG_64BIT for ARM64 so that we pass -m64 to the static checkers
instead of -m32.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
These configs are used in multiple places so put them in a shared
Kconfig file.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bryan Brattlof <bb@ti.com> says:
Hello Again Everyone!
The AM62Px is an extension of the existing Sitara AM62x low-cost family
of application processors built for Automotive and Linux Application
development. Scalable Arm Cortex-A53 performance and embedded features,
such as: multi high-definition display support, 3D-graphics
acceleration, 4K video acceleration, and extensive peripherals make the
AM62Px well-suited for a broad range of automation and industrial
application, including automotive digital instrumentation, automotive
displays, industrial HMI, and more.
Some highlights of AM62P SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
Dual/Single core variants are provided in the same package to allow HW
compatible designs.
* One Device manager Cortex-R5F for system power and resource
management, and one Cortex-R5F for Functional Safety or
general-purpose usage.
* One 3D GPU up to 50 GLFOPS
* H.264/H.265 Video Encode/Decode.
* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized Hardware Security Module with support for secure
boot, debug security and crypto acceleration and trusted execution
environment.
* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
enabling battery powered system design.
For those interested, more details about this SoC can be found in the
Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83
Proof-of-Life: https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71
The SPDX ID format usese a single space used after the
'SPDX-License-Identifier:'. Fix all files that use any other white-space
character other than a single space.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
[bb@ti.com: rebased to U-Boot v2024.01]
Signed-off-by: Bryan Brattlof <bb@ti.com>
Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Currently, for the K3 generation of SoCs, there are more SoCs that
utilize the split firmware approach than the combined DMSC firmware.
Invert the logic to avoid adding more and more SoCs to this list.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
The am62px family of SoCs uses the same DDR controller as found on the
am62ax family. Enable this option when building for the am62px family
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Include the part number for TI's am62px family of SoCs so we can
properly identify it during boot
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Add default configuration for nand-flash to boot the linux kernel.
Add default configuration for qspi-flash to boot the linux kernel.
Add default configuration for sd-card to boot the linux kernel.
Configs are synced with savedefconfig.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
This migrates the plaintext README in
board/theobroma-systems/ringneck_px30 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This migrates the plaintext README in
board/theobroma-systems/puma_rk3399 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Since commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper
bind the device before relocation.
While this is usually not much of an issue, it is when there's a lookup
for devices by code running before the relocation. Such is the case of
env_init() which calls env_driver_lookup() which calls
env_get_location() which is a weak symbol and may call
arch_env_get_location() also a weak symbol. Those are two functions that
may traverse UCLASS to find some devices (e.g.
board/theobroma-systems/common/common.c:arch_env_get_location()).
This allows something in the env_init() call stack to be able to use
uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the
behavior with what seems to be all SoCs except RK356x family.
Additionally, if any other env function (e.g. env_load) were to be used
before relocation, this is also required as otherwise it wouldn't be
able to find the MMC device(s).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.
While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
hardware.h is only defining macros which are "wrappers" around writel().
writel() is however not available in hardware.h, <asm/io.h> needs to be
included. This means in order to use the wrappers in hardware.h, one
also needs to include the <asm/io.h> header.
However, this cannot be done currently because hardware.h is included in
include/configs files, which are implicitly included by every code file
by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
fail because ALIGN (the ARM assembly directive) got redefined by some
of the include files coming from <asm.io.h>.
Because nothing in the include/configs file actually use hardware.h,
let's remove the inclusion of hardware.h from the include/configs files
and explicitly add it wherever it is required.
This prepares for the next commit where <asm/io.h> will be included in
hardware.h.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
It's one thing to have the register mapped via a well-defined struct but
it's another to be able to make use of it. For that to happen, one needs
to cast the physical address memory of the beginning of the register
address space with the struct. Since this cannot change, let's hardcode
it in the include files so that users do not need to duplicate this line
of code in their own implementation.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Rockchip SoCs can automatically switch between jtag and sdmmc based on
the following rules:
- all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF,
- force_jtag bit in GRF is 1,
- SDMMC_DET is low (no card detected),
Note that the BootROM may mux all SDMMC pins in their SDMMC function or
not, depending on the boot medium that were tried.
Because SDMMC_DET pin is not guaranteed to be used as an SD card card
detect pin, it could be low at boot or even switch at runtime, which
would enable the jtag function and render the SD card unusable.
This is the case for RK3588 Jaguar for example which has an SD card
connector without an SD card card detect signal and has SDMMC_DET
connected to ground.
Because enabling JTAG at runtime could be a security issue and also to
make sure that we have a consistent behavior on all boards by default,
let's disable this force_jtag feature.
However, let's make it easy to reenable it for debugging purposes by
hiding it behind a Kconfig symbol.
Note that soc_con[0] is reserved. But considering that it's way more
user-friendly to access soc_con1 from the TRM with soc_con[1] than
soc_con[0], and that soc_con0 would actually be located at 4 bytes
before soc_con1, let's just make soc_con0 part of the soc_con array.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The functions aren't used anywhere else than in board.c, therefore,
let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from
the misc.h header file.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.
Instead of using hardcoded values, derive them from cpuid_length.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Drop old implementation and use hash_command() instead, as
how it's currently done for crc32 and sha1sum cmds.
Test:
=> md5sum 0x60000000 0x200
md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Return value of a function 'malloc_cache_aligned'
is dereferenced at autoboot.c:207 without checking for NULL,
but it is usually checked for this function.
Found by RASU JSC.
Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.
If MDIO_TI_CPSW is not enabled then we continue to
behave like before.
Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
If mixed rsa and ecdsa keys are specified in dtsi, an rsa key can be sent
into the ecdsa verify. Without the ecdsa,curve property, this function will
crash due to lack of checking the null pointer return.
Signed-off-by: Bob Wolff <bob.wolff68@gmail.com>
The current address of TF-A in DRAM is just below the 512MB address line.
This means if the DRAM in a system is 512MB then TF-A is right at the
end of memory which is often reused, for instance U-Boot relocates itself
here. If a system has less than 512MB then that system wouldn't work at
all as TF-A would fail to load.
To avoid the issues above, move TF-A to the start of DRAM, which doesn't
change from system to system.
As TF-A is position independent, this has no dependency on TF-A. We
also fixup DT as needed when TF-A address is moved, so this change also
has no dependency on Linux and is fully forward/backward compatible.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
The address we load TFA and OP-TEE to is configurable by
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are static. Fix that by updating this node when the loaded address
does not match the address in DT.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
The address we load TF-A and OP-TEE to is configurable by Kconfig
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are often statically defined. As these binaries are dynamically loadable,
and in the case of OP-TEE may not even be loaded at all, hard-coding these
addresses is not a hardware description, but rather a configuration.
If the address that U-Boot loaded TF-A or OP-TEE does not match the
address in hard-coded in DT, then fix that node address. This also handles
the case when no reserved memory for these is provided by DT, which is
more correct as explained above.
Add this fixup function, and enable it for AM62.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The fixups provided by ft_system_setup() are applicable for all AM62 based
boards. Select this at the target selection level for all AM62 boards and
remove it from any specific defconfig.
Signed-off-by: Andrew Davis <afd@ti.com>
Much like we have for ATF, OP-TEE has a standard address that we load
it too and run it from. Add a Kconfig item for this to remove some
hard-coding and allow this address to be more easily changed.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
There is a default ATF load address that is used for devices that have
ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead
of having to override the address in every defconfig, make add a
default for these ATF in DRAM devices.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Allow boards that use ti_spl_template to not use optee part in
configuration.
Vendor can have module with 256 Mb of memory and they try to optimize
the available memory just using the essential components.
This change allow to remove tee from configuration without binman
fail.
configurations {
default = "conf-0";
conf-0 {
description = "k3-am62_ccm_m3";
firmware = "atf";
loadables = "dm", "spl";
fdt = "fdt-0";
};
};
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The phy calibration pattern partition isn't needed as the Cadence driver isn't
calibrating the phys.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Fixes: 58d61fb5a7 ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")
Add boot ROM XSPI bootmode, and set to BOOT_DEVICE_SPI if detected.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Add bootph DT tags to enable OSPI in SPL.
Set OSPI regs for R5 SPL to address OSPI's boot region.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Clock names has been updated in kernel 5.19+ with the removal of
non-standard node names [1]. Due to this change, ft_opp_clock_fixups()
doesn't work anymore since ft_fixup_clocks() is looking to the clock
name and ft_opp_clock_fixups() error out with the following message:
ft_fixup_clocks failed for DSP voltage domain: <valid offset/length>
We can't use the new clock name since several clock are using the same
generic name "clock". ft_opp_clock_fixups() is looking at the clocks
node in cm_core_aon@0:
/sys/firmware/devicetree/base/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks
...
clock@120
clock@160
clock@1a0
clock@1e0
clock@210
clock@234
clock@284
clock@2a8
clock@2d8
When fdt_subnode_offset() fail, we can look at clock-output-names
property as fallback since it contain the previous clock name.
libfdt doesn't provide any support to replace fdt_subnode_offset() by
a new function looking for clock-output-names property instead of the
node name. So we have to implement it in arch/arm/mach-omap2/omap5/fdt.c
for now.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e4920169e7a2a839836d3a0d8cda1bae8caa3056
Cc: Suman Anna <s-anna@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Andrew Davis <afd@ti.com>
Signed-off-by: Romain Naour <romain.naour@skf.com>
The functions virtio_pci_get_config() and virtio_pci_set_config() don't
take the offset into account when reading the config space. For example
this manifests when U-Boot tries to read the MAC address of the VirtIO
networking device. It reads 6 equa bytes instead of the proper addess.
Fix those functions by taking the offset in the config space into
account.
Fixes: 4135e10732 ("virtio: Add virtio over pci transport driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Michał Barnaś <barnas@google.com> says:
Fix the driver to behave like the chip datasheet requires.
Improve wake up function to send low signal on SDA line for at least
60us as chip requires to wake up. Fix sleep function to move the chip
into sleep mode, not into idle mode. Remove unnecessary for loop,
which would never run for more than one iteration.
The ATSHA204A chip requires SDA line to go low for at least 60us to
wake up the chip. Previous implementation did not meet this requirement
due to the NAK received on bus and not sending the zeroes.
The function to ignore the NAK and send bytes regardless is not
supported in the u-boot making it impossible to wake up the chip
this way.
Instead, the bus speed, if needed, is set to lowest value and the
message is sent to the address 0x0. This way, the address of zero
makes the SDA line go low for about 80us, meeting the required time
to wake up the chip. The zero length packet is not sent by the i2c,
so the one byte is sent to the transfer function, but only the address
is sent anyway.
After sending the zero address, the bus speed is restored to the
previous value if it was slowed down to wake up the chip.
Signed-off-by: Michał Barnaś <barnas@google.com>
Some previous commit changed the continue statement to return,
making the for loop used to retry waking up the chip to always
return after one iteration. This commit removes the loop, cleaning
the code a little.
Signed-off-by: Michał Barnaś <barnas@google.com>
Apurva Nandan <a-nandan@ti.com> says:
Hello Everyone!
This series will introduce basic support (SD and UART) support for Texas
Instruments J784S4 EVM.
The J784S4 SoC device tree patches are taken from kernel patch submissions
and will be updated as they are accepted and merged to the kernel tree.
All other patches are specific to SPL and u-boot and do not have
dependency on other trees. Appreciate a review for acceptance to u-boot
tree.
Here are some of the salient features of the J784S4 automotive grade
application processor:
The J784S4 SoC belongs to the K3 Multicore SoC architecture
platform, providing advanced system integration in automotive,
ADAS and industrial applications requiring AI at the network edge.
This SoC extends the K3 Jacinto 7 family of SoCs with focus on
raising performance and integration while providing interfaces,
memory architecture and compute performance for multi-sensor, high
concurrency applications.
Some highlights of this SoC are:
* Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs,
4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for
deep learning and CNN.
* 3D GPU: Automotive grade IMG BXS-4-64 MC1
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one
DPI interface.
* Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports
support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role
device subsystems, Up to 20 MCANs, among other peripherals.
See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
for further details: http://www.ti.com/lit/zip/spruj52
In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It
supports the following interfaces:
* 32 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x2 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances
Schematics: https://www.ti.com/lit/zip/sprr458
AM69 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/1b2c55d0204ff0f5a47ebbc196a97e99/raw/
J784S4 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/5e2ef85ee4322798d22b57a60dc917db/raw/
eMMC UDA moode bootlog: https://gist.githubusercontent.com/apurvanandan1997/3cffada252d50a8aa0c00a91f1f2f856/raw/
ring_idx was not correctly assigned in case of tflow_id is zero.
Which leads to wrong pairing of DMA for drivers like OSPI.
Fixes: 4312a1dfca ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
TI K3 J784S4 and AM69 are new additions to the K3 SoC family.
Add documentation about the J784S4 EVM and AM69 SK.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
With the latest TIFS firmware, an additional virtual interrupt and
event is reserved for TIFS usage on am62x and am62ax devices.
Update the rm-cfg to reflect this new reservation.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
In udma_probe() the return value of setup_resources() is stored in the
u32 "ch_count" member of "struct udma_dev", due to which any negative
return value which indicates an error is masked.
Fix this by storing the return value of setup_resources() in the already
declared integer variable "ret", followed by assigning it to the "ch_count"
member of "struct udma_dev" in case of no error.
While at it, change the "return ret" at the end of udma_probe() to a
"return 0", to explicitly indicate that probe was successful.
Fixes: a8837cf438 ("dma: ti: k3-udma: Query DMA channels allocated from Resource Manager")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
With the default size the stack grows into the malloc, pool leading to
stack corruption and boot failure.
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Read the max temperature for the SoC temperature grade from the hardware
and change the critical trip nodes on each thermal zone of FDT at
runtime so they are correct with the hardware value for its grade.
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
AM62x SoC is available in multiple temperature grade:
- Commercial: 0° to 95° C
- Industrial: -40° to 105° C
- Automotive: -40° to 125° C
Add a new function that returns the am62 max temperature value
accordingly to its temperature grade in Celsius.
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Like we did with R5, move ARM64 code into a specific directory to make
it clear what code is only meant to run on each core type.
Signed-off-by: Andrew Davis <afd@ti.com>
The disable_linefill_optimization() function is only ever loaded by the
R5 core, move the code into the R5 directory.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Loading ATF is only supported from the R5, move the Kconfig symbol
definition to match.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Introduce the base dts files needed for u-boot or to augment the linux
dtbs for use in the u-boot-spl and u-boot binaries.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
Introduce the base dts files needed for u-boot or to augment the linux
dtbs for use in the u-boot-spl and u-boot binaries.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[ add binman and ddr dtsi files ]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
Add board files for J784S4 EVM.
SYS_DISABLE_DCACHE_OPS is selected in the Kconfig because
J784S4/AM69 are a coherent architecture at A72 level by
MSMC support.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
Add J784S4 initialization files for initial SPL boot.
config SYS_K3_MCU_SCRATCHPAD_BASE default value is same
for J721E, J721S2, J784S4. So combined them into a single
default.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[ add firewall configurations and change the R5 MCU scratchpad ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
Nishanth Menon <nm@ti.com> says:
Hi,
Rev 2 of the series.
This is a follow up from [1] - Without the 32k crystal configuration,
wlan doesn't work. Debounce is needed for HDMI Hot plug detect(hpd)
gpio interrupt not storming.
At least the 32k configuration has been done for toradex and phytec
boards, follow similar model of programming.
Series is now based off master branch.
Bootlog: https://gist.github.com/nmenon/75df38bee907785d1d78d1ec4abd7304
Changes from V2:
- Removed depedency on [2] - depending on which way
the merge sequence goes, one of the series will need a rebase.
- Added a patch for a bug that Jan noticed
- Fixup for the fat finger missing 0x in 0x4080 :(
[1] https://lore.kernel.org/u-boot/20230725185253.2123433-4-nm@ti.com/
[2] https://lore.kernel.org/u-boot/20240212194726.1093771-1-nm@ti.com/
We had enabled USB and network pxe boot with the hope to get it all
merged on time. However, it has not panned out. Drop usb and pxe boot
else bootflow scan -l throws in:
a) Unknown uclass 'usb' in label
b) Crashes when attempting pxe - cpsw/mdio driver apparently has missing
error handling of what ever form. This is the one that Jan noticed in
his log.
We can enable these on a later date once things are working.
Cc: Roger Quadros <rogerq@kernel.org>
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Closes: https://lore.kernel.org/all/782ea2c0-eef5-478d-a122-cc6e2d066762@siemens.com/
Signed-off-by: Nishanth Menon <nm@ti.com>
Add the Debounce configuration registers that need to be configured one
time for the platform for the entire SoC.
Signed-off-by: Nishanth Menon <nm@ti.com>
Enable the external 32k crystal similar to that found on other
production AM62X board. The trim settings for the crystal is board
dependent, so the sequences tend to be board specific. Since this is
a configuration that needs to be done prior to DM managing the system
and all other muxes get set, do the same from R5 context.
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
- Assorted MediaTek, ASPEED, xenguest, s5p4418 and qemu-arm fixes
- Assorted test fixes/updates/additions.
- A few bootstd/related fixes.
- Remove common.h from some files
- Drop reiserfs
- A few other assorted fixes throughout the tree.
Add myself as maintainer for SynQuacer Developerbox,
as I'm currently working on it.
This commit also removes Jassi from maintainer since he
no longer has a Developerbox.
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
We should have CONFIG_DM_I2C or CONFIG_SYS_I2C_LEGACY enabled in
order for `cmd/eeprom.c` to compile as it depends on the i2c functions
which are not compiled otherwise. Update the Kconfig entry for the
'eeprom' command correspondingly.
Signed-off-by: Ivan Orlov <ivan.orlov@codethink.co.uk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Without the '-undef' option, the 'linux' string in .env files is
replaced with the string '1 '.
For example, in the board/armadeus/opos6uldev/opos6uldev.env file,
kernelimg=opos6ul-linux.bin
becomes
kernelimg=opos6ul-1 .bin
in the include/generated/env.in file.
That's because 'linux' is a System-specific Predefined Macros. [1]
Pass the '-undef' option to fix this issue.
[1] https://gcc.gnu.org/onlinedocs/gcc-13.2.0/cpp/System-specific-Predefined-Macros.html
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The "bootflow" command currently doesn't support scanning a single
partition. This is inconvenient in setups with multiple bootable
partitions within a single disk, but only one is desired.
Support scanning a single disk partition. Specifically, support the
syntax:
bootflow scan mmc1:4
which scans only mmc device 1, partition 4.
Signed-off-by: Nam Cao <namcao@linutronix.de>
This code assumes that CONFIG_MMC and it causes a build error when
the config is disabled.
aarch64-linux-gnu-ld.bfd: test/boot/bootstd_common.o: in function `bootstd_test_check_mmc_hunter':
test/boot/bootstd_common.c:83:(.text.bootstd_test_check_mmc_hunter+0x70):
undefined reference to `_u_boot_list_2_bootdev_hunter_2_mmc_bootdev_hunter'
Fixes: 66e3dce787 ("bootstd: Allow hunting for a bootdev by label")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
The bootflow testing assumes that BOOTMETH_CROS is enabled but it
might not be which leads to a build error.
aarch64-linux-gnu-ld.bfd: test/boot/bootflow.o: in function `prep_mmc_bootdev':
test/boot/bootflow.c:549:(.text.prep_mmc_bootdev+0x1c8):
undefined reference to `_u_boot_list_2_driver_2_bootmeth_cros'
Fixes: d08db02d2d ("bootstd: Add a test for bootmeth_cros")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
While fat_exists() reports directories and files as existing
ext4fs_exists() only recognizes files. This lead to errors
when using systemd-boot with an ext4 file-system.
Change ext4fs_exists() to find any type of inode:
files, directories, symbolic links.
Fixes: a1596438a6 ("ext4fs ls load support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
It was only included by a single board which doesn't appear to have
ever used it for any default use cases so drop the filesystem now
that isn't used by any in-tree configurations.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
This is the only board that enables it, and looking generally I don't
believe it's used. All use cases I could fine for the board rub by
default off jffs on the nand and it doesn't enable USB storage.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: egnite GmbH <info@egnite.de>
The Broadcom Northstar 2 support was removed when the
bcm958712k board was removed but the target entry was
missed so clean that up as well.
Fixes: d59bc09d82 ("arm: Remove bcm958712k board")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
During address translation #address/size-cells props are expected to
apply to child nodes. However, devfdt_get_addr_index() incorrectly use
the parent offset of the udevice parent instead of getting the offset of
the node parent. This will work in most cases when there is only one
udevice tied to a node.
On e.g. an Orange Pi R1 Plus TLS board the dwc3-generic (parent) and
dwc3-generic-host (child) udevice is tied to the same node.
In that case both the offset and parent values end up being the same.
As a result, the #address/size-cells props intended for child nodes
incorrectly gets applied to the node itself resulting in wrong addr
being returned, 0x0 instead of 0xff600000.
The following can be seen on console:
dwc3-generic-host usb@ff600000: this is not a DesignWare USB3 DRD Core
dwc3-generic-host usb@ff600000: failed to initialize core
Fix this by using the offset of the parent node and not the offset to
the node the parent udevice is tied to.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Pinconfig nodes normally bind recursively with PINCTRL_FULL and
PINCONF_RECURSIVE enabled. However, during U-Boot proper pre-relocation
any node marked with e.g. bootph-all will not bind unless its parent is
also marked for pre-reloc.
group1 {
pinconf1 {
bootph-all;
};
};
This cause the following warning message to be shown during U-Boot
proper pre-reloc stage on Rockchip devices, e.g on RK3568:
ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
and on RK3328:
ns16550_serial serial@ff130000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Check pinconfig nodes pre-reloc status recursively to fix this and to
make pinconfig_post_bind work same at both U-Boot proper pre-reloc and
at TPL/SPL stage.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Some boards that choose to utilize the OF_UPSTREAM directory for their
device tree files will need to specify that directory instead of the
traditional arch/$(ARCH)/dts/* path.
Include the correct path to the board's dtbs depending on if OF_UPSTREAM
is selected or not.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Fabio Estevam <festevam@gmail.com>
Don't define checksum algos when the underlying hashes are not enabled.
This allows disabling these hashes in SPL (or U-Boot).
Fixes: d16b38f427 ("Add support for SHA384 and SHA512")
Fixes: 646257d1f4 ("rsa: add sha256-rsa2048 algorithm")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
FDT functions is not working when OF_LIVE is enabled.
Convert fdt parsing functions to ofnode parsing functions
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
When `gd` is relocated during `spl_relocate_stack_gd()` the
doubly-linked circular list in the `log_head` member is broken.
The last element of the list should point back to the initial
`list_head`, but as the initial `list_head` is moved the pointer becomes
stale. As a result the loop in `log_dispatch` would never finish.
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Usage of common.h is deprecated.
* Remove common.h from RNG drivers.
* Sort includes.
* Add time.h to sandbox driver.
* Add linux/types.h to rng.h to provide size_t.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Not all flows have a device and the function already contains logic to
handle this case.
Fixes: eccb25cd59 ("bootstd: Allow the bootdev to be optional in bootflows")
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
In gsub, when the destination string is empty, the string 't' is
provided and the regular expression doesn't match, then the final result
is an empty string.
Example:
=> echo ${foo}
=> setenv foo
=> setexpr foo gsub e a bar
=> echo ${foo}
=>
The variable ${foo} should contain "bar" and the lack of match shouldn't
be considered an error.
This patch fixes the erroneous behavior by removing the return
statement and breaking out of the loop in case of lack of match.
Also add a test for the no match case.
Signed-off-by: Massimiliano Minella <massimiliano.minella@se.com>
The FWU Multi Bank Update feature allows the platform to boot the
firmware images from one of the partitions(banks).
On the Developerbox, SCP-firmware running on the SCB(Cortex-M3)
passes the value of the boot index on the NOR flash.
Add a function to read the boot index value from the NOR flash.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
The actual driver does not work when there is no linked PHY. These
changes add support for fixed-link feature in the device tree.
Signed-off-by: BELOUARGA Mohamed <m.belouarga@technologyandstrategy.com>
Prevent the error messages produced by which(1), such as the one quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
QEMU's -m option can take fractional megabyte values,
and lowest granularity seems to be 0x2000.
For example, run qemu with amount of memory set to 100005k (0x61A9400):
$ qemu-system-arm -machine virt -cpu cortex-a15 -m 100005k \
-bios denx/u-boot.bin -nographic
=> fdt addr $fdt_addr
=> fdt print /memory@40000000
memory@40000000 {
reg = <0x00000000 0x40000000 0x00000000 0x061aa000>;
device_type = "memory";
};
When LPAE is enabled, 1:1 mapping is created using 2 MB blocks.
In case amount of memory provided to QEMU is not multiple
of 2 MB, hang occurs during MMU initialization.
How to reproduce:
qemu-system-arm -machine virt -m 1058 -nographic -bios u-boot.bin - boots
qemu-system-arm -machine virt -m 1057 -nographic -bios u-boot.bin - hangs
DRAM: 1 GiB
initcall: 60011df8
initcall: 60011904
New Stack Pointer is: 80fffe90
initcall: 60011a20
initcall: 60011bcc
initcall: 60011bd4
initcall: 600119b4
Relocation Offset is: 22042000
Relocating to 82042000, new gd at 81001ed0, sp at 80fffe90
initcall: 60011b8c
initcall: 82053ea0
initcall: 82053ea8
initcall: 60012040 (relocated to 82054040)
dram_bank_mmu_setup: bank: 0
- hang here during mmu init -
This patches rounds down to the nearest multiple of 2MB when
CONFIG_ARMV7_LPAE=y.
Fixes: 3fa914af82("arm: qemu: implement enable_caches()")
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Abort the dhcp request in the middle by pressing ctrl + c on u-boot
prompt and validate the abort status.
Signed-off-by: Love Kumar <love.kumar@amd.com>
The header (NSIH) used for the s5p4418-SoC is not loaded into RAM by the
2nd-bootloader, see boot0.h. Therefore, use an adapted version of
relocate_vectors which relocates the vectors after the header (at _start)
instead of the 'dummy'-vectors at the start of the header (at
__image_copy_start).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
ARCH_NEXELL: Change calculation of monitor length (gd->mon_len) to fix
relocation at boards with s5p4418-SoC (ARCH_NEXELL). At s5p4418, _start
is after the header (NSIH). Therefore the monitor length has to be
calculated using __image_copy_start instead of _start in order the
whole monitor code is relocated.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
When run `virtio scan` on i.MX95, there is abort when accessing virtio
mmio region. The issue is the mmio region is not mapped. So let's map
all virtio mmio regions.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently, if boot with extlinux.conf and do not set the fdt
U-Boot will provide its own device tree. This behavior is
beneficial if the U-Boot device tree is in sync with Linux,
but it totally halts the booting of pre-dtb kernels (3.4 for
example) since it uses ATAGs. To fix this, pass `-` in the
fdt extlinux field as a signal that no tree should be used.
Suggested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Tested-by: Jethro Bull <jethrob@hotmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
- Reworks Qualcomm support to be more generic, dropping board specific
build targets and relying on DT as the only source of truth
- Switches all Qualcomm devices to use upstream devicetree
When U-Boot as running as the first stage bootloader on MSM8916 devices,
early debug UART requires turning on the clocks (for some reason the
pre-loader turns them off?!).
To simplify developing for this platform, allow the
apq8016_clk_init_uart() function to be called externally. Developers can
call this from the serial_msm debug uart driver to configure the clocks
before the driver model is available.
As it is only possible to enable early debug UART in custom builds of
U-Boot, this solution at least gives developers the option.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Drop the U-Boot specific DTS in favour of upstream. We'll only include
the -4000 variant as that is what U-Boot already supported.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Drop the U-Boot specific dragonboard820c.dts file in favour of the
upstream apq8096-db820c.dts and an additional -u-boot.dtsi with the
U-Boot specific additions.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Don't use hardcoded clock IDs, use the IDs from the dt-bindings to be
compatible with upstream.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Import PM8994 and PMI8994 DTSI files in preparation for switching
MSM8996 boards to upstream DTS.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Drop the U-Boot specific dragonboard410c.dts in favour of the upstream
msm8916-sbc.dts. No additional changes are needed to this DTS for U-Boot
support.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Import the supporting pm8916.dtsi and msm8916-pm8916.dtsi files from
upstream in preparation for switching boards over.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Import sdm845.dtsi from upstream, as well as the upstream DTS files for
the db845c and Samsung starqltechn. Delete the old board files.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Import the PM8998 and PMI8998 PMIC DTSI files from Linux as well
as the common audio codec in preperation for replacing board DTS files
with upstream.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The MSM8916/APQ8016 Technical Reference Manual is publicly available and
contains a lot of useful register maps for many core parts of the SoC.
Include an archive.org link to it in the dragonboard410c documentation.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Replace the board specific docs with a generic board.rst file which
documents the build/boot process for the sdm845 and qcs404 boards now
that the only differences are the DTB in use.
At the same time, create a debugging page to document some useful
snippets and tips for working with Qualcomm platforms.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This board is entirely supported by the generic arch code and DTS. The
board code used to handle turning on the vbus regulator, however this is
now handled via DT.
With this, the board specific defconfig is also no longer needed, so
drop it as well.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
On Qualcomm platforms, the TZ may already have certain memory regions
under protection by the time U-Boot starts. There is a rare case on some
platforms where the prefetcher might speculatively access one of these
regions resulting in a board crash (TZ traps and then resets the board).
We shouldn't be accessing these regions from within U-Boot anyway, so
let's mark them all with PTE_TYPE_FAULT to prevent any speculative
access and correctly trap in EL1 rather than EL3.
Some lower level FDT functions are used here relying on some assumptions
about how Qualcomm devicetrees are laid out (#address/size-cells being 2
for reserved-memory), as this is the only way to make this acceptably
fast enough with dcache off. The full fat implementation takes 1800ms on
SDM845, the implementation in this patch takes <1.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
With just a few basic rules, we can generate the $fdtfile environment
variable to match the format used in Linux. This uses the root
compatible property inside u-boot, with specific handling for the
Dragonboard845c which is a special case, and for the qrb robotics
boards.
This is known to work on supported platforms, and lets us avoid having a
big lookup table.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Heavily inspired by Apple board code. Use the LMB allocator to configure
load addresses at runtime, and implement a lookup table for selecting a
devicetree.
As some Qualcomm RBx boards have different RAM capacities and base
addresses, it isn't possible to hardcode these regions.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Historically, Qualcomm boards have relied on heavy hardcoding in U-Boot,
in many cases to the specific SoC but also to the board itself (e.g.
memory map). This has been largely resolved by modernising the Qualcomm
drivers in U-Boot, however the board code still largely follows this
model.
This patch removes the board specific memory maps and duplicated board
init code, replacing it with generic init code.
The memory map is now built at runtime based on data read from DT, this
allows for the memory map to be provided without having to recompile
U-Boot. Support is also added for booting with appended DTBs, so that
the first-stage bootloader can populate the memory map for us.
The sdm845 specific init code is dropped entirely, it set an environment
variable depending on if a button was pressed, but this variable wasn't
used in U-Boot, and could be written to use the button command instead.
The KASLR detection is also dropped as with appended dtb, the kaslr seed
can be read directly from the DTB passed to U-Boot.
A new qcom_defconfig is added, with the aim of providing a generic
U-Boot configuration that will work on as many Qualcomm boards as
possible. It replaces the defconfig files for the Dragonboard 845c,
Galaxy S9, and QCS404 EVB. For now the db410c and 820c are excluded as
they still have some board code left.
Similarly, the config headers for db845c, starqltechn, and qcs404-evb
are replaced by a single qcom header.
The previously db410c-specific board_usb_init() function is made to be
generic and is added to mach-snapdragon. While we lack proper modelling
for USB configuration, using a well-known named pinctrl state is a
reasonably generic middleground, and works using upstream DT. This
function will do nothing unless the USB node has a pinctrl state named
"device", in which case it will be set when entering USB peripheral
mode.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some of the db410c board support code was written to be generic and
placed in mach-snapdragon. However, as the db410c is the only board
using this, move the code out of mach-snapdragon. This makes is more
obvious what code is relevant for which targets and helps tidy things up
a little more.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Use the root compatible strings from upstream Linux, add missing
'#clock-cells' property to the gcc node.
Adjust some of the msm8916/apq8016 drivers to use the correct upstream
compatible properties and DT bindings.
This prepares us to switch to upstream DT in a future patch.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
On the DB410c we support running as a first stage bootloader. This
requires initialising the GPIOs which are muxed to UART before they can
be used. Add DM_FLAG_PRE_RELOC to the apq8016 pinctrl driver to ensure
that we do this early enough.
This is required to prevent the first few lines of UART log from being
dropped.
Reported-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Most platforms have a handful of "special" GPIOs, like the MMC
clock/data lanes, UFS reset, etc. These don't follow the usual naming
scheme of "gpioX" and also have unique capabilities and registers. We
can get away without supporting them all for now, but DT compatibility
is still an issue.
Add support for allowing these to be specified after the other pins, and
make all pinmux/pinconf calls for them nop.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Introduce a basic pinctrl driver for the SPMI PMIC GPIOs. This is
necessary to make proper use of upstream DT bindings specifically on the
dragonboard410c where they're used to switch between USB host and device
modes.
Only support for driving the pins as output low or high is enabled for
now.
To minimise duplicated code and allow for sharing common DT data, the
pinctrl driver is initialised as a child of the existing GPIO driver.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Some platforms hard reset when attempting to configure PMIC GPIOs. Add
support for quirks specified in match data with a single quirk to skip
this configuration. We rely on the GPIO already be configured correctly,
which is always the case for volume up (the only current user of these
GPIOs).
This is not expected behaviour but appears to be due to a U-Boot
specific bug. This quirk at least allows for the volume buttons to be
used on platforms where this bug is apparent.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Use the modern helpers to fetch the clock and use the correct property
("clocks" instead of "clock"). Drop the call to pinctrl_select_state()
as no boards have a "uart" pinctrl state and this prints confusing
errors.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Introduce support for early debugging. This relies on the previous stage
bootloader to initialise the UART clocks, when running with U-Boot as
the primary bootloader this feature doesn't work. It will require a way
to configure the clocks before the driver model is available.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add support for a vbus-supply regulator specified in devicetree. This
provides generic support to avoid hardcoded GPIO configuration in board
init code.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
When booting U-Boot on board with a locked down first-stage bootloader,
we emulate the Linux boot header. By passing the U-Boot FDT through this
first-stage bootloader and retrieving it afterwards we can pre-populate
the memory nodes and other info like the KASLR address.
Add a function to export the FDT addr so that boards can use it over the
built-in FDT.
Don't check is_addr_accessible() here because we might not yet have a
valid mem_map if it's going to be populated from the FDT, let the board
do their own validation instead.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Currently, when we boot from JTAG we try to boot U-Boot from RAM.
However, this is a bit tricky to time, since the debugger has to wait
for SPL to initialize RAM before it can load U-Boot. This can result in
long waits, since occasionally initializing RAM (and other things in
psu_init) takes a long time to complete and the debugger must wait for
this worst case.
Support semihosting if it is enabled, as it lets U-Boot tell the
debugger when we are ready for the image. This means we don't have to
wait any more than necessary. We don't change the default config to
ensure we don't break compatibility with existing debuggers that don't
expect us to hit semihosting breakpoints.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Link: https://lore.kernel.org/r/20240222200512.2679830-1-sean.anderson@linux.dev
Signed-off-by: Michal Simek <michal.simek@amd.com>
Sumit Garg <sumit.garg@linaro.org> says:
Prerequisite
------------
This patch series requires devicetree-rebasing git repo to be added as a
subtree to the main U-Boot repo via:
$ git subtree add --prefix dts/upstream \
https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \
v6.7-dts --squash
Background
----------
This effort started while I was reviewing patch series corresponding to
Qcom platforms [1] which was about to import modified devicetree source
files from Linux kernel. I suppose keeping devicetree files sync with
Linux kernel without any DT bindings schema validation has been a pain
for U-Boot SoC/platform maintainers. There has been past discussions
about a single DT repo but that hasn't come up and Linux kernel remained
the place where DT source files as well as bindings are placed and
maintained.
However, Linux kernel DT maintainers proposed [2] for U-Boot to rather
use devicetree-rebasing repo [3] which is a forked copy from Linux
kernel for DT source files as well as bindings. It is tagged at every
Linux kernel major release or intermideate release candidates. So here I
have tried to reuse that to bring DT bingings compliance as well as a
standard way to maintain a regular sync of DT source files with Linux
kernel.
In order to maintain devicetree files sync, U-Boot will maintains a Git
subtree for devicetee-rebasing repo as `dts/upstream` sub-directory.
U-Boot will regularly sync `dts/upstream/` subtree whenever the next window
opens with the next available kernel major release.
`dts/update-dts-subtree.sh` script provides a wrapper around git subtree
pull command, usage from the top level U-Boot source tree, run:
$ ./dts/update-dts-subtree.sh pull <devicetree-rebasing-release-tag>
If required it is also possible to cherry-pick fixes from
devicetree-rebasing tree prior to next sync, usage:
$ ./dts/update-dts-subtree.sh pick <devicetree-rebasing-commit-id>
The RFC/prototype for this series has been discussed with Linux DT
maintainers as well as U-Boot maintainers here [4]. Now we would like to
reach out to wider U-Boot community to seek feedback.
[1] https://lore.kernel.org/all/CAFA6WYMLUD9cnkr=R0Uur+1UeTMkKjM2zDdMJtXb3nmrLk+pDg@mail.gmail.com/
[2] https://lore.kernel.org/all/CAL_JsqKEjv2tSGmT+0ZiO7_qbBfhTycbGnhJhYpKDFzfO9jzDg@mail.gmail.com/
[3] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
[4] https://github.com/u-boot/u-boot/pull/451
Changes
-------
Traditionally, U-Boot placed copies of devicetree source files from Linux
kernel into `arch/<arch>/dts/<name>.dts` which can be selected via setting
"<name>" when prompted for `DEFAULT_DEVICE_TREE` by Kconfig.
SoC/board maintainers are encouraged to migrate to use synced copies from
`dts/upstream/src/<arch>/<vendor>`. To do that enable `OF_UPSTREAM` for the
SoC being used via Kconfig and set up "<vendor>/<name>" when prompted for
`DEFAULT_DEVICE_TREE` by Kconfig.
An example have been shown for Amlogic meson-gxbb SoC and corresponding
derived boards via patch #10 and #11.
Devicetree bindings schema checks
---------------------------------
With devicetee-rebasing Git subtree, the devicetree bindings are also
regularly synced with Linux kernel as `dts/upstream/Bindings/`
sub-directory. This allows U-Boot to run devicetree bindings schema checks
which will bring compliance to U-Boot core/drivers regarding usage of
devicetree.
Dependencies
------------
The DT schema project must be installed in order to validate the DT schema
binding documents and validate DTS files using the DT schema. The DT schema
project can be installed with pip:
$ pip3 install dtschema
Note that 'dtschema' installation requires 'swig' and Python development
files installed first. On Debian/Ubuntu systems:
$ apt install swig python3-dev
Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be
installed. Ensure they are in your PATH (~/.local/bin by default).
Recommended is also to install yamllint (used by dtschema when present).
$ apt install yamllint
Running checks
--------------
In order to perform validation of DTB files, use the ``dtbs_check`` target:
$ make dtbs_check
It is also possible to run checks with a subset of matching schema files by
setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files
or patterns (partial match of a fixed string). Each file or pattern should
be separated by ':'.
$ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml
$ make dtbs_check DT_SCHEMA_FILES=/gpio/
$ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml
Since meson-gxbb based boards switched to using upstream DT, so drop
redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Although there were still some variations in board DTS files based on
meson-gxbb SoC but I think those were minor differences from upstream
and shouldn't impact boot on these devices.
So enable OF_UPSTREAM to use upstream DT and add amlogic/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Encourage SoC/board maintainers to migrate to using devicetree-rebasing
subtree and maintain a regular sync with Linux kernel devicetree files
and bindings.
Along with that add documentation regarding how to run DT bindings
schema checks.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
dts/update-dts-subtree.sh is just a wrapper around git subtree commands.
Usage from the top level U-Boot source tree, run:
$ ./dts/update-dts-subtree.sh pull <release-tag>
$ ./dts/update-dts-subtree.sh pick <commit-id>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Allow platform owners to mirror devicetree files from devitree-rebasing
directory into dts/upstream/src/$(ARCH) (special case for arm64). Then
build then along with any *-u-boot.dtsi file present in arch/$(ARCH)/dts
directory. Also add a new Makefile for arm64.
This will help easy migration for platforms which currently are compliant
with upstream Linux kernel devicetree files.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Allow platforms to reuse DT headers and dtsi includes directly form
upstream DT subtree which will be frequently synced with Linux kernel.
This will further allow us to drop corresponding DT includes copy from
U-Boot tree.
Also, since the DT includes from upstream DT subtree are done after DT
includes from U-Boot tree, so it shouldn't cause any conflicts.
Tested-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Allow u-boot to build DTB from a different directory tree such that
*-u-boot.dtsi files can be included from a common location. Currently
that location is arch/$(ARCH)/dts/, so statically define that common
location.
This is needed for platform owners to start building DTB files from
devicetree-rebasing directory but still being able to include
*-u-boot.dtsi files.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
This adds the build infrastructure for checking DT binding schema
documents and validating dtb files using the binding schema. Here we use
devicetree-rebasing subtree to provide the DT bindings. Along with that
adapt dts/upstream/Bindings/Makefile to align with old U-Boot Kbuild
infrastructure.
Dependency:
-----------
The DT schema project must be installed in order to validate the DT schema
binding documents and validate DTS files using the DT schema. The DT schema
project can be installed with pip::
pip3 install dtschema
Note that 'dtschema' installation requires 'swig' and Python development
files installed first. On Debian/Ubuntu systems::
apt install swig python3-dev
Testing:
--------
Build dts files and check using DT binding schema:
$ make dtbs_check
Optionally, DT_SCHEMA_FILES can be passed in with a schema file(s) to
use for validation. This makes it easier to find and fix errors
generated by a specific schema.
Note, at this point dtbs_check is an optional build target as there are
many warnings generated due to custom DT properties used by many
platforms in u-boot. It is expected with these checks that compliance
with DT bindings to take place. Once that's done it can be added to CI
builds to remain compliant with DT bindings.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Raymond Mao <raymond.mao@linaro.org> says:
This patch set adds/adapts a few bloblist APIs and implements Arm arch
custom function to retrieve the bloblist (aka. Transfer List) from
previous loader via boot arguments when BLOBLIST option is enabled and
all boot arguments are compliant to the register conventions defined
in the Firmware Handoff spec v0.9.
If an arch wishes to have different behaviors for loading bloblist
from the previous boot stage, it is required to implement the custom
function xferlist_from_boot_arg().
When BLOBLIST is enabled, FDT is expected to be from bloblist
carried from previous stage, instead of from OF_BOARD, therefore
only enable OF_HAS_PRIOR_STAGE when BLOBLIST is disabled.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
During bloblist initialization, load the bloblist via boot arguments
from the previous loader.
If a valid bloblist exists in boot arguments, relocate it into the
fixed bloblist memory region.
If not, fallback to support BLOBLIST_ADDR or BLOBLIST_ALLOC.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Add arch custom function to get bloblist from boot arguments.
Check whether boot arguments aligns with the register conventions
defined in FW Handoff spec v0.9.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
The current bloblist pointer and size can be retrieved from global
data, so we don't need to pass them from the function arguments.
This change also help to remove all external access of gd->bloblist
outside of bloblist module.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of expecting the bloblist total size to be the same as the
pre-allocated buffer size, practically we are more interested in
whether the pre-allocated buffer size is bigger than the bloblist
total size.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add bloblist_check_reg_conv() to check whether the bloblist is compliant
to the register conventions defined in Firmware Handoff specification.
This API can be used for all Arm platforms.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Roger Quadros <rogerq@kernel.org> says:
MUX driver should autoprobe if the device tree has "idle-states"
property. Drop using the custom "u-boot,mux-autoprobe" property
in TI device trees.
As it is present for USB and USB won't work without the MUX
initialized correctly, add "bootph-all" property to MUX nodes.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
MUX driver should autoprobe if the device tree has "idle-states"
property. Drop using the custom "u-boot,mux-autoprobe" property.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Some platforms need the MUX state to be auto initialized at
boot time even if there are no explicit users for the MUX.
In these cases, the MUX device tree has "idle-states" property
which specifies what state the MUX should be initialized to.
So far we were relying on custom u-boot property "u-boot,mux-autoprobe"
to autoprobe such MUXes. This patch causes the MUX to autoprobe
if it has "idle-states" property in device tree.
This should allow us to stop using the custom "u-boot,mux-autoprobe"
property.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Pull request efi-next-2024-02-28
* set IMAGE_DLLCHARACTERISTICS_NX_COMPAT in EFI binaries
* provide SBI based runtime system reset
* page align EFI binary section on ARMv7
* separate .data and .text sections of EFI binaries on ARMv7
EFI binaries should not contain sections that are both writable and
executable. Separate the RX .text section from the RW .data section.
We currently don't created relocation sections (.rel.*) for our EFI
binaries. Anyway these would have to be converted to PE/COFF relocations.
Enumerate them under DISCARD and add a comment.
Correct the characteristics of the sections.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
On RISC-V systems system the Supervisory Binary Interface provides system
reset and poweroff. Use it at EFI runtime.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The IMAGE_DLLCHARACTERISTICS_NX_COMPAT flag marks an EFI binary where
the following conditions are met [1]:
* Executable and writable sections are separated.
* The application does not run self-modifying code.
* The application uses the EFI_MEMORY_ATTRIBUTE_PROTOCOL when loading
executable code.
* The application does not assume that all memory ranges are usable.
* The stack is not expected to be executable.
The only EFI binaries U-Boot provides that do not fulfill these
requirements are the EFI app and the EFI payload.
Once we have implemented separation of writable and executable memory in
U-Boot we can use the IMAGE_DLLCHARACTERISTICS_NX_COMPAT flag to decide
if we will load an EFI binary.
[1] New UEFI CA memory mitigation requirements for signing
https://techcommunity.microsoft.com/t5/hardware-dev-center/new-uefi-ca-memory-mitigation-requirements-for-signing/ba-p/3608714
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Perform a little re-organization of Kconfig so that we can have
CONFIG_SYS_CONFIG_NAME be unset and so not require a "board.h" file.
Then go and remove a number of now not required header files.
Generally speaking, we do not prompt for this value and define it in the
board specific Kconfig file. There are some valid use cases however
today where we do prompt for this value, so instead of having this be
done in a number of locations, do this at the top-level location only.
This removes the question from a number of other locations and makes it
consistent that when we do set the value directly, we always do it the
same way. We don't need to specify the type, it's always string.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the hc2910-2aghd05 platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the slimbootloader platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the qemu-x86* platforms and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the minnowmax platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the galileo platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the efi-x86_payload* platforms and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the efi-x86_app* platforms and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the edison platform and remove
the otherwise empty file.
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the crownbay platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the cougarcanyon2 platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the cherryhill platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the bayleybay platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the coreboot platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the xilinx_mbv platforms and remove
the otherwise empty file.
Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
It is possible to have a platform which does not require a board.h file
to build, but today we need an empty one for our generated config.h file
to be valid. Allow for omitting this file if CONFIG_SYS_CONFIG_NAME is
not set.
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-02-27 14:18:30 -05:00
13645 changed files with 2097066 additions and 30372 deletions
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