Second set of u-boot-atmel fixes for the 2023.10 cycle:
Two small fixes , one for an array not initialized and the second one
fixes an error case when a DT property is missing for the atmel NAND
driver.
Arrays are not cleared entirely because ARRAY_SIZE
returns the number of elements in an array, not the size
in bytes.
This commit fixes the calls to memset by providing the
array size in bytes instead of the number of elements
in the array.
Signed-off-by: Francois Berder <fberder@outlook.fr>
`part` option is in hexadecimal, so information is missing in usage
documentation.
Callgraph for `part` parsing is :
do_load -> fs_set_blk_dev -> part_get_info_by_dev_and_name_or_num ->
blk_get_device_part_str -> hextoul (This is why it is hexadecimal)
Signed-off-by: Mickaël Tansorier <mickael.tansorier@smile.fr>
Reviewed-by: Yoann Congal <yoann.congal@smile.fr>
Reviewed-by: Simon Glass <sjg@chromium.org>
We only have serial as console option, and leaving this on turns on
SYS_CONSOLE_IS_IN_ENV which is also not true for these devices, leaving
an ugly
In: No input devices available!
Out: No output devices available!
Err: No error devices available!
behind.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CONFIG_SYS_BOOT_LOCKED means that a restricted boot environment will
be used. In this case, hab_auth_img_or_fail should be called to prevent
U-Boot to continue running when the fitImage authentication fails.
Fix the logic accordingly.
Additionally, select CONFIG_SYS_BOOT_LOCKED by default.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
After the refactor with conf- nodes in fitImage, overlaystring wasn't
didn't handle the new conf- nodes in FIT Booting. Fix get_overlaystring
to handle conf- nodes.
Fixes: 837833a724 ("environment: ti: Add get_fit_config command to get FIT config string")
Reported-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd5722 ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Multiple revisions of the StarFive VisionFive 2 board exist. They can be
identified by reading their EEPROM.
Linux uses two differently named device-tree files. To load the correct
device-tree we need to set $fdtfile to the device-tree file name that
matches the board revision.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Set CONFIG_SYS_LOAD_ADDR=0x88000000 and use this address for
loading fitImage.
Also pass the standard CONFIG_BOOTFILE option to indicate
the fitImage file.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Trying to boot a fitImage after a successful hab_auth_img operation
causes the following error:
## Loading kernel from FIT Image at 88000000 ...
Using 'conf-imx7d-smegw01.dtb' configuration
Trying 'kernel-1' kernel subimage
Description: Linux kernel
Type: Kernel Image
Compression: uncompressed
Data Start: 0x8800010c
Data Size: 9901752 Bytes = 9.4 MiB
Architecture: ARM
OS: Linux
Load Address: 0x80800000
Entry Point: 0x80800000
Hash algo: sha256
Hash value: 28f8779bbf010780f16dd3d84ecb9b604c44c5c2cf7acd098c264a2d3f68e969
Verifying Hash Integrity ... sha256Error in SEC deq
CAAM was not setup properly or it is faulty error!
The reason for this error is that the BootROM uses the CAAM Job Ring 0,
so disable its node in U-Boot to avoid the resource conflict.
imx8m dtsi files also have the Job Ring 0 disable since the following
kernel commit:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch?h=v6.5&id=dc9c1ceb555ff661e6fc1081434600771f29657c
For a temporary solution, disable the Job Ring 0 in imx7s-u-boot.dtsi.
Reported-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
The ivt_offset parameter is optional for both hab_auth_img_or_fail
and hab_auth_img commands.
Document it in their usage texts to make it clearer.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Since commit ea91031b22 ("imx: hab: extend hab_auth_img to calculate
ivt_offset"), it is possible to call the hab_auth_img command without the
last ivt_offset argument.
Currently, calling hab_auth_img_or_fail without the last
ivt_offset parameter causes a failure and the command usage text is shown.
Fix this problem by adjusting the argc logic to allow
calling hab_auth_img_or_fail with only the address and size parameters.
This way, both hab_auth_img and hab_auth_img_or_fail have the same
behavior with respect to the allowed number of command parameters.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
up with a linking error [1]. Select LIB_ELF to fix the building
issue.
[1]
ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image'
Fixes: c0f037f6a2 ("mach-imx: bootaux: elf firmware support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Current alignment which is using 16 bytes is not correct in connection to
trace_clocks description and it's length.
That's why use start_addr variable and record proper size based on used
entries.
Fixes: be16fc81b2 ("trace: Update proftool to use new binary format").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Flyrecord tracing data are page aligned that's why it is necessary to
calculate alignment properly. Because trace_clocks description is the part
of record length it is necessary to have information about length earlier.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
tputq() requires variables to have 64bit width that's why make them 64bit
to clean alignment requirement.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
People may put their user name and email in a local config file and
reference it by the include.* directives, however `git config --global`
doesn't look up the included configs by default.
Enable the --includes option explicitly to support such use cases.
Signed-off-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reproduct warning:
$ git clean -dfx
$ make CROSS_COMPILE="" qemu-x86_64_defconfig
$ make -j8
...
u-boot/tools/binman/etype/section.py:25:
SyntaxWarning: invalid escape sequence '\('
"""Entry that contains other entries
Signed-off-by: Rong Tao <rongtao@cestc.cn>
With Python versions older than 3.9 Buildman produces an error on
start-up. Fix this with a workaround for importlib.
There is already a workaround for v3.6 but I am not sure if that is still
functioning.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no "run_patman" procedure in patman's __main__.py file, which
would cause the following error at execution:
"AttributeError: module 'patman.__main__' has no attribute 'run_patman'"
Signed-off-by: Maxim Cournoyer <maxim.cournoyer@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vanessa's NXP e-mail is no longer active.
Contacted her offline and she told me that she does not have
access to the board anymore and it is OK to remove her
from MAINTAINERS.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Errors were handled only if an I2C transfer timed out
and received a NACK which is very unlikely. This commit
changes the condition such that errors are handled if
an I2C transfer times out or received a NACK.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
The NETSEC GMAC occasionally falls into a weird state where
MAC_REG_DESC_SOFT_RST has never been cleared and shows errors like the
below when networking commands are issued:
=> ping 192.168.1.1
ethernet@522d0000 Waiting for PHY auto negotiation to complete... done
netsec_wait_while_busy: timeout
Using ethernet@522d0000 device
ARP Retry count exceeded; starting again
ping failed; host 192.168.1.1 is not alive
It happens on not only 'ping' but also 'dhcp', 'tftp' and so on.
Luckily, restarting the NETSEC GMAC and trying again seems to fix the
problematic state. So first ensure that we haven't entered the state by
checking MAC_REG_DESC_SOFT_RST to be cleared; otherwise, restarting
NETSEC/PHY and trying again would work as a workaround.
Signed-off-by: Ryosuke Saito <ryosuke.saito@linaro.org>
Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org>
commit 280f45d239 ("configs: get rid of build warnings due to
SPL_USB_DWC3_GENERIC") missed enabling DWC3 glue layer for
usbmsc_defconfig and this broke boot from USB mass storage.
Fix this by enabling DWC3 glue layer.
Fixes: 280f45d239 ("configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC")
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Make sure to stay within bounds, as a misbehaving HTTP server
can trigger a buffer overflow if not properly handled.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Use fdt_fixup_memory to make the memory size data from dtb match
the actual size.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Enable CONFIG_OF_BOARD_SETUP, so we could use ft_board_setup() to fixup
memory size passed to kernel.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software
to identify the PHY model at any time, regardless of the state of
the PHY reset line.
This is a fix for missed addition of these properties on Salvator-X
boards.
Ported from Linux kernel commit 722d55f3a9bd810f3a1a31916cc74e2915a994ce .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Move BinmanLogging reference tag after section "Signing FIT container
with private key in an image" and just before section "Logging".
Fixes: 0f40e23fd2 ("binman: add documentation for binman sign option")
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The test_event_base and test_event_probe unit tests use function
event_register() which depends on CONFIG_EVENT_DYNAMIC=y.
Fixes: 7d02645fe4 ("event: Add a simple test")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request doc-2023-10-rc5
Documentation:
* move more TI board documentation to HTML
* update TPM usage instructions for qemu-arm
* update the EFI app documentation
Other:
* tpm: Fix autostart for TPM1.2 devices
* spl: fix undefined return value in spl_blk_load_image
Previously, the file extension was .txt, and it referenced the uImage.FIT
directory, which no longer exists. This commit updates the path accordingly.
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To avoid confusion document that timer_dev_priv.clock_rate and
timer_get_rate() yield the timer rate in hertz.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We don't have a documentation page for our TPM subsystem. I plan
on sending one in the future, but in the meantime document the
new 'tpm autostart' command in the QEMU instructions while using
a SWTPM
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
On commit e663b2ff4ba2("tpm: Add 'tpm autostart' shell command") an
autostart function was added for both TPM1.2 and 2.0 devices. Instead
of correctly wiring the autostart command for TPM1.2 devices that patch
mistakenly added it on 'tpm init'
Fixes: commit e663b2ff4ba2("tpm: Add 'tpm autostart' shell command")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
spl_blk_load_image() should not return an uninitialized value if
blk_get_devnum_by_uclass_id() fails.
Fixes: 8ce6a2e175 ("spl: blk: Support loading images from fs")
Reported-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
+ Implement OpenSBI DBCN extension for early debug console
+ Fixes for VisionFive2 board
+ Fix timer missing
+ Fix L2 LIM issue
+ Enable PCIE auto enumeration to support USB and NVMe by default
+ Set eth0 mac address properly
+ Add __noreturn attribute to spl_invoke_opensbi
Use the DBCN SBI extension to implement a debug console.
Make it the default for S-mode RISC-V.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The DBCN extension provides a Console Write Byte call.
Implement function sbi_dbcn_write_byte to invoke it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
spl_invoke_opensbi function is not returned to SPL. Thus, we need to
set __noreturn function attribute.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
SPL_SYS_MALLOC_CLEAR_ON_INIT would enable SYS_MALLOC_CLEAR_ON_INIT by
default, but that's not need on JH7110, so disable that.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Starfive JH7110 needs to clear L2 LIM to zero before use or ECC error
would be triggered. Currently, we use DDR ram for SPL malloc arena on
Visionfive 2 board in defconfig, but it's also possible to use L2 LIM as
SPL malloc arena. To avoid triggering ECC error in this scenario, we
imply SPL_SYS_MALLOC_CLEAR_ON_INIT as default.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
To support SPL_SYS_MALLOC_CLEAR_ON_INIT, we have to modify
#ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT
to #if CONFIG_IS_ENABLED(SYS_MALLOC_CLEAR_ON_INIT)
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add SPL version of SYS_MALLOC_CLEAR_ON_INIT, this would help devices
that need to clear ram before use to work correctly.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Since PLDA PCIE driver is added and VL805 support is enabled in
defconfig for Starfive Visionfive 2, modify the document to keep
consistent.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Although PCIE driver already exists, board defconfig isn't configured to
enable PCIE enum on boot, thus USB storage device and NVME drive are not
supported by default. So modify defconfig to enable PCIE auto enum, then
start USB subsystem and scan nvme drive on boot.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
Note that in the device tree.
Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
For the architectural timer on riscv, there already is a defined
device tree binding[1]. Allow timer instances to be created from
device tree matches, but for now retain the old mechanism, which
registers the timer biggy-back with the CPU.
[1] linux/Documentation/devicetree/bindings/timer/riscv,timer.yaml
Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
fdt_fixup_ethernet() sets eth0 mac address from ethaddr. Set
ethaddr to environment instead of eth0addr.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This platform is behind on migrations (it is the sole user of the oldest
legacy version of the USB gadget stack and is long overdue for
migration) and with Pali no longer being a maintainer, we remove this
platform.
Signed-off-by: Tom Rini <trini@konsulko.com>
Polling every second to check whether the CPU has cooled down is
too frequent.
Allow more time for the CPU to cool down by increasing the polling
interval to 5 seconds by defaut.
This value is used in the absence of the 'polling-delay' devicetree
property.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The temperature unit is millidegree Celsius, so divide by 1000 to correctly
print the temperature values in Celsius.
While at it, also change a typo: "has beyond" to "is beyond".
Signed-off-by: Fabio Estevam <festevam@denx.de>
dev_info() message is not printed by default. Increase the log level
to dev_crit(). This allows the critical messages related to the temperature
getting beyong the alert threshold to be displayed.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
When the 'polling-delay' property is not passed via devicetree,
pdata->polling_delay keeps at 0. This causes the imx_tmu driver to get
stuck inside the busy while() loop when the CPU temperature is above
the alert point.
Fix this problem by passing a one second polling interval, which provides
a proper delay to let the system to cool down and exit the while() loop
when the temperature is below the alert point.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Select the i.MX8MM thermal driver as it is useful for displaying
the CPU temperature and its grading:
CPU: Commercial temperature grade (0C to 95C) at 38C
It also prevents booting when the temperature is above the alert
point.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The original logic always enables USB_DR_MODE_HOST operation mode in
dwc3_layerscape_bind() in u-boot. Prevent choosing USB_DR_MODE_HOST
operation mode if USB_HOST is not enabled.
Fixes: 2b0b51d0be ("usb: dwc3: add layerscape support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.
Fix original logic in dwc3_layerscape_bind() - do not enable
Fixes: 333e4a621d ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
If dram_init_banksize() is called from SPL, the rom_pointer, at that
point, is not correctly initialized. This causes wrong calculation of
DRAM start and size in dram_init_banksize(). The issue became apparent
only in Falcon Mode. Added an extra condition to prevent using
rom_pointer in SPL.
Signed-off-by: Elena Popa <elena.popa@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
U-Boot splits DRAM bank spanning addresses below and above the 32bit
boundary into two DRAM banks. Since this platform may come with 4GiB
of DRAM, increase the DRAM bank count to 2.
Signed-off-by: Marek Vasut <marex@denx.de>
This board certainly does use default 'run distro_bootcmd' boot command,
make sure this is set in 'bootcmd' variable.
Fixes: 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Disable this option to reclaim some space, since bootstd requires less
functionality to operate (e.g. hush parser).
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop use of the distro scripts and use standard boot instead.
We don't need to specify the mmc devices individually, since they are
used in order from 0 to 2, and standard boot uses that order anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request doc-2023-10-rc4-2
* Man-page for gpt command
* Fix long text help of gpt command
* Add events to HTML documentation
* Update Toradex documentation
This help text appears to be a fragment of the text shown when
CONFIG_CMD_GPT_RENAME is enabled, but is confusing so remove it.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Update SPDX-License-Identifier from obsolete GPL-2.0+ to
GPL-2.0-or-later.
- Add links to product websites of SoM and carrier board where missing.
- Add information about update U-Boot wrapper where missing.
- Add sectionauthor where missing.
- Update information about imx-seco from version 3.7.4 to 3.8.1.
- Various minor grammatic and spelling fixes.
- Improve whitespace by adding or removing new lines.
- Change from code-block for output to just Output::.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
- A few platform-specific config/dts updates to fix issues, drop a
temporary change in binman, update the MAINTAINERS file to remove
Wolfgang Denk, fix a typo, fix a corner case with bootstd, update
Azure to not timeout so easily, and fix a case where we would omit
some files in SPL.
Adding a phandle to a template node is not allowed, since when the node is
instantiated multiple times, we end up with duplicate phandles.
Drop this invalid constructs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Tim Harvey <tharvey@gateworks.com>
If one of SHA* algorithms is disabled in u-boot, its code is not
included in SPL even if a given SHA* option is enabled in SPL. Fix
this.
Fixes: 603d15a572 ("spl: cypto: Bring back SPL_ versions of SHA")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Similar to MT7981 and MT7986 also MT7988 can have a high number of
reserved-memory regions used by the various hardware offloading
subsystems.
Raise CONFIG_LMB_MAX_REGIONS to 64 to avoid errors when trying to boot
Linux with more then 6 reserved regions:
ERROR: reserving fdt memory region failed (addr=4f700000 size=240000 flags=4)
ERROR: reserving fdt memory region failed (addr=15194000 size=1000 flags=4)
ERROR: reserving fdt memory region failed (addr=15294000 size=1000 flags=4)
ERROR: reserving fdt memory region failed (addr=15394000 size=1000 flags=4)
ERROR: Failed to allocate 0xb161 bytes below 0x80000000.
device tree - allocation error
Fixes: bc4adc97cf ("board: mediatek: add MT7988 reference boards")
Reported-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This should have already been enabled but was missed when converting the
base platform defconfig, fix this here.
Fixes: 3c5aa6cacc ("configs: Enable CONFIG_BLK in am57xx_evm and am57xx_hs_evm")
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The existing distro scripts check extlinux and scripts before EFI. Adjust
the default ordering to do the same, to avoid breaking existing flows.
Add some documentation, mentioning that this order will likely change in
future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Da Xue <da@libre.computer>
Ethernet on Bananapi-r3 is broken after
commit bd70f3cea3 ("net: mediatek: add support for SGMII 1Gbps auto-negotiation mode")
because changes from this commit were not applied to bpi-r3 devicetree too:
commit aef54ea16c ("arm: dts: medaitek: convert gmac link mode to 2500base-x")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
The Kconfig references a readme file that's moved and
converted to rst so update the reference.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request efi-2023-10-rc4
Documentation:
* describe TPL/VPL/SPL boot
* Add support for sphinx-prompt and convert TI K3 to use it
* board: sdm845: Explicitly add boot.img flashing command
EFI:
* remove handle from events when deleting it
Others:
* fix gpt sub-commands setenv and enumerate
* add a parameter check in hash_calculate()
When a notification event is registered for a protocol the handle of the
protocol is added in our event notification list. When all the protocols
of the handle are uninstalled we delete the handle but we do not remove
it from the event notification list.
Clean up the protocol removal functions and add a wrapper which
- Removes the to-be deleted handle from any lists it participates
- Remove the handle if no more protocols are present
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This is a stub describing how TPL, VPL, and SPL load the next boot stages
on a detail level for users.
For sure we will need a few patches on top to catch the whole complexity.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
In commands like 'ls mmc 0:f' the partition number is hexadecimal.
In command 'gpt setenv' variable gpt_partition_entry needs to be set
to a hexadecimal value to allow its use as a parameter in a
subsequent command.
Fixes: 57f8cf1b9aea ("cmd: fix gpt enumerate")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Do not assume that partitions are numbered continuously starting at 1.
Only a single partition table type can exist on a block device. If we found
a GPT partition table, we must not re-enumerate with the MBR partition
driver which would find the protective partition.
Fixes: 12fc1f3bb2 ("cmd: gpt: add eMMC and GPT support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Do not assume that partitions are continuously numbered starting at 1.
Having a partition table with a single partition 63 is valid.
Fixes: 12fc1f3bb2 ("cmd: gpt: add eMMC and GPT support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If hash_calculate is invoked with region_count = 0, it will try to hash
INT_MAX regions. We should check this parameter.
* Avoid a comparison with different signedness.
* Check that region_count is at least 1.
* Avoid a superfluous assignment.
Fixes: b37b46f042 ("rsa: Use checksum algorithms from struct hash_algo")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x
SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE
native shared memory registered by clients.
To be compatible by default with this configuration this patch removes
the shared memory in the SCMI configuration and the associated reserved
memory in SRAM.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since OP-TEE commit 89ba3422ee80 ("plat-stm32mp1: scmi_server: default
use OP-TEE shared memory"), integrated in OP-TEE 3.22.0-rc1
the default configuration for STM32MP15x SoCs changes,
CFG_STM32MP1_SCMI_SHM_SYSRAM is disabled by default and the OP-TEE SMCI
server uses ithe OP-TEE native shared memory registered by clients.
To be compatible by default with this configuration and the next OP-TEE
version, this patch removes the SHMEM in the SCMI configuration and the
associated reserved memory in the last 4KByte page of SRAM,
in the STM32MP15 device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
use CONFIG_IS_ENABLED for clock enable/disable and change printf's
to dev_err. Additionlly remove the comment that does not make sense.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add support for enabling and disabling vbus-supply regulator found
on several imx8mp boards in the usb3_phy0 and usb3_phy1 nodes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As ulpi_reset gpio is now optional, we need to check it when doing
the 'dwc3_generic_remove' function. Check if it is declared before
accessing the ulpi_reset.
Fixes: 237d1f60b1 ("usb: dwc3: Use the devm_gpiod_get_optional()
API for reset gpio")
Reported-by: Thomas Nizan <tnizan@witekio.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Pull request for doc-2023-10-rc4
Documentation:
* Fix documentation for TI boards
* Describe running on VirtualBox
* List build dependencies for building documenation
* Add references to U-Boot talks
Other:
* Fix error handling in the setexpr command (printf_str)
The list of u-boot talks on elinux.org is quite long, so let's highlight
the talks which are likely most relevant for newcomers.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The configuration for EFI is enhanced to start U-Boot at VirtualBox (x86_64)
with all features like booting with help of boot scripts and extended linux.
This documentation describes how to use U-Boot at VirtualBox to boot
Linux systems with a some simple example.
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Fix minor path and config macro name updates to sync with latest
OpenOCD and U-Boot configurations.
Fixes: effe50854a ("doc: board: ti: k3: Add a guide to debugging with OpenOCD")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide alternative text for image.
Fixes: 3b83dff183 ("doc: board: ti: j721e: Convert the image format to svg")
Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Provide alternative text for image.
Fixes: f4ade09a1e ("doc: board: ti: j7200: Convert the image format to svg")
Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Provide alternative text for image.
Fixes: fd358121bd ("doc: board: ti: am65x: Update with boot flow diagram")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Provide alternative texts for images.
Fixes: 34f76921d8 ("doc: board: ti: am62x: Convert the image format to svg")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Provide alternative texts for images.
Fixes: 6e8fa0611f ("board: ti: k3: Convert boot flow ascii flow to svg")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
If vsnprintf() returns a negative number, (i >= remaining) will
possibly be true:
'i' is of type signed int and 'remaining' is of the unsigned type size_t.
The C language will convert i to an unsigned type before the comparison.
This can result in the wrong error type being indicated.
Checking for negative i should be done first.
Fixes: f4f8d8bb1a ("cmd: setexpr: add format string handling")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the Patch 55171aedda, VisionFive2 booting has been broken [1].
VisionFive2 board requires to enable CONFIG_TIMER_EARLY but booting went
to panic from initr_dm_devices due to lack of a timer device.
- Error logs
initcall sequence 00000000fffd8d38 failed at call 00000000402185e4
(err=-19)
Thus, we need to move riscv_cpu_probe function in order to register
the timer earlier than initr_dm_devices.
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev>
Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev>
Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64
the same way drivers/cpu/cpu_sandbox.c does, that is in case
CONFIG_PHYS_64BIT is enabled, assume 64bit address width, else
assume 32bit address width. This fixes ut_dm_dm_test_cpu test
failure on sandbox64.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys
test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16
and ut_dm_dm_test_video_bmp24 tests .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pinctrl-single driver uses %pa to print register value
in its single_get_pin_muxing() output. Handle this properly
in the test based on CONFIG_PHYS_64BIT .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Increase the
console record size. This fixes ut_bootstd_bootflow_cmd_scan_e .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the
rmobile_cpuinfo array.
At the end of the loop, i is equal to the array size, i.e.
rmobile_cpuinfo[i] accesses one entry past the end of the array. The
last entry in the array is a fallback value so the loop should count to
ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the
index of the fallback value if no match is found.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Originally, exporting the ATF_LOAD_ADDR was required, but since binman has
been used to generate the flash.bin, it is no longer needed to do
such manual export.
The ATF address is now passed via binman.
Remove the unneeded export ATF_LOAD_ADDR line.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The usage of proftool in docs is incorrect. If proftool is used without
'-o' argument, it will show the usage like following
$ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>
Change '>' to '-o' to fix it.
Signed-off-by: Puhan Zhou <puh4n.zhou@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no requirement that a partition 1 exists in a partition table.
We should not try to retrieve information about it.
We should not even try reading with partition number
CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev()
call anyway.
Fixes: 8ce6a2e175 ("spl: blk: Support loading images from fs")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present listing a partition produces lots of errors about this
filesystem:
=> part list mmc 4
cannot find valid erofs superblock
cannot find valid erofs superblock
cannot read erofs superblock: -5
[9 more similar lines]
Use debugging rather than errors when unable to find a signature, as is
done with other filesystems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and
can help with review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include
related device tree files. Also replace space with tabs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Update Rockchip documentation to include RK3566/RK3568 boards already
supported. Also list Pine64 boards under RK3566 and drop defconfig to
match other listed boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no
longer valid.
Adding Bhupesh Sharma who has been using this framework working on
Qualcomm Snapdragon SoCs as well as sending out fixes.
Adding myself as well to support in reviewing and testing patches.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use a recent coreboot build for this test.
The coreboot commit is:
6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings
This is build with default settings, i.e. QEMU x86 i440fx/piix4
Add some documentation as to how to update it next time.
Signed-off-by: Simon Glass <sjg@chromium.org>
In order to reduce the number of people that are cc'd on a patch for
simply touching arch/arm/dts/Makefile (which is a big common file) add
an entry specifically to MAINTAINERS under the ARM entry.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DHSOM: Power cycle Buck3 in reset
DHCOM: Switch DWMAC RMII clock to MCO2
stm32f746: fix display pinmux
stm32mp: psci: Inhibit PDDS because CSTBYDIS is set
stm32mp1: DT alignment with v6.4
stm32mp1: add splashscreen with STMicroelectronics logo
stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent
serial: stm32: Extend TC timeout
Waiting 150us TC bit couldn't be enough.
If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).
Fixes: b4dbc5d65a ("serial: stm32: Wait TC bit before performing initialization")
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC
block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK
pad for the PHY and the same 50 MHz clock are fed back to ETHRX via
internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at
all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and
the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad
using external pad-to-pad connection.
Option (1) has two downsides. ETHCK_K is supplied directly from either
PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and
since the same PLL output is also used to supply SDMMC blocks, the
performance of SD and eMMC access is affected. The second downside is
that using this option, the EMI of the SoM is higher.
Option (2) solves both of those problems, so implement it here. In this
case, the PLL4_P is no longer limited and can be operated faster, at
100 MHz, which improves SDMMC performance (read performance is improved
from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M
count=1). The EMI interference also decreases.
Ported from Linux kernel commit
73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.
With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never
enter CStandby state and would always end up in CStop state. Clear
the PDDS bit, which indicates the CA cores can enter CStandby state
as it makes little sense to keep it set with CSTBYDIS also set.
This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR
PDDS bits are set, then the chip enters CStandby state even though the
PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that
from happening.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9 -> LCD_B4
- AF14 -> LCD_B1
So replace AF14 with AF9 for PG12 in the dts.
Fixes: fe63d3cfb7 ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:
no parents defined for clk id 123
This patch change the level of this message to avoid this trace for
valid clock tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:
"
RAM: DDR3L 32bits 2x4Gb 533MHz
DDR invalid size : 0x4, expected 0x40000000
DRAM init failed: -22
### ERROR ### Please RESET the board ###
"
Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Pull request for efi-2023-10-rc3
Documentation:
* Correct description of board_get_usable_ram_top
* Add partition API to HTML documentation
* Describe lmb_is_reserved
* doc/sphinx/requirements.txt: Bump certifi up
UEFI:
* Fix efi_add_known_memory
* Make distro_efi_boot() static
Other:
* Correct return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In efi_add_known_memory() we currently call board_get_usable_ram_top() with
an incorrect value 0 of parameter total_size. This leads to an incorrect
value for ram_top depending on the code in board_get_usable_ram_top().
Use the value of gd->ram_top instead which is set before relocation by
calling board_get_usable_ram_top().
Fixes: 7b78d6438a ("efi_loader: Reserve unaccessible memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Convert comments in part.h to Sphinx style.
* Create documentation page for the partition API.
* Add the partition API page to the API index page.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
* provide a description for function lmb_is_reserved()
* improve the description of funciton lmb_is_reserved_flags()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The MVTWSI controller can act either as a master or slave device. When
acting as a master, the FSM is driven by the CPU. As a slave, the FSM is
driven by the bus directly. In what is (apparently) a safety mechanism,
if the bus transitions our FSM in any improper way, the FSM goes to a
"bus error" state (0x00). I could find no documented or experimental way
to get the FSM out of this state, except for a controller reset.
Since U-Boot only uses the MVTWSI controller as a bus master, this
feature only gets in the way: we do not care what happened on the bus
previously as long as the bus is ready for a new transaction. So, when
trying to start a new transaction, check for this state and reset the
controller if necessary.
Note that this should not be confused with the "deblocking" technique
(used by the `i2c reset` command), which involves pulsing SCL repeatedly
if SDA is found to be held low, in an attempt to force the bus back to
an idle state. This patch only resets the controller in case something
else had previously upset it, and (in principle) results in no
externally-observable change in behavior.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
On RK3568 most pins have a configurable drive strength of level 0-5 and
some pins level 0-11. When rk3568_set_drive is called with a strength
value above 7 the drv value written to reg may overflow into the write
enable bits, resulting in a bad configuration.
This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after
drive is configured according to the device tree.
Could not get PHY for ethernet@fe010000: addr 0
Level 6-11 can be configured using a second reg for some pins, however
the drv value is reused resulting in lower 6 bits being written to reg.
Input schmitt is configured in 2-bit fields on RK3568 compared to
earlier generation and 2'b10 should be used to enable input schmitt.
Change to use regmap_update_bits with a rmask to fix the overflow issue
and closer match the linux driver. Bit shift the drv value used for the
second reg to configure drive strength level 6-11. Also write correct
values for input schmitt setting.
Fixes: 1977d746aa ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When raspberrpi-4b platform boots up, there are 2 sets of same bootup
log displayed on HDMI monitor screen, it looks like the screen is split
into 2 parts. The root cause is that video format of u-boot is different
from kernel. The fixing "a8r8g8b8" video format is used in u-boot, but
"r5g6b5" video format from framebuffer node is used in kernel image. In
order to avoid weird display status on screen, it needs to set the correct
parameter for simple framebuffer node even if it has existed.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
When the fkms dtb overlay is used only the simple-framebuffer is
presented as a usable video display. So, add "simple-framebuffer"
compatible to enable video driver bcm2835.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Meng Li <Meng.Li@windriver.com>
At present vidconsole_measure() tests ops->select_font before calling
ops->measure, which would result in a null dereference when the console
driver provides no ops for measure.
Fixes: b828ed7d79 ("console: Allow measuring the bounding box of text")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since srecord v1.60, option "-Little_Endian_CONSTant" is deprecated.
Fix the build warnings by updating little‐endian byte order option in
srec_cat command when generating loader header.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Once all the other drivers got torn down in preparation for the OS
to start, tear down the clock controller last. The clock controller
must be torn down last as some of the clock which get turned off
might have still been needed during the teardown stage of the other
drivers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
align with other ROCK series.
Fixes: 2b506407c8 ("rockchip: Add MAINTAINERS entry for Radxa Rock 4C+")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Make device tree complete and consistent for pre relocation phase. Some
nodes are missing, causing warnings to be issued on serial port probing
during pre relocation phase (uclass_get_device_by_phandle_id fails when
called by pinctrl_select_state_full: none of these failures is fatal
nor causing issues). Add to *-u-boot.dtsi all required nodes with the
'bootph-some-ram' attribute.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support to read RK3308 registers used to configure UART clocks, and
thus to get UART rate and baudrate. This fixes clock_get_rate returning
error on serial device probing. Moreover, there is no need anymore to
use 'clock-frequency' property for UART nodes in *-u-boot.dtsi files
for all cases where UART is not inited by U-Boot proper or by SPL o by
TPL code but by a preliminary external boot phase (for Rock PI S, UART
is inited by external TPL).
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As per definitions of masks and shift offsets in cru_rk3308.h, values
read from registers must be first masked and then shifted. By the way,
this fix is binary invariant, because in all of fixed cases the shift
offset is zero.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Debug uart is no more inited in board_init_f function: remove this
debug message from board_init_f. If an earliest-as-possible message
after debug uart initialization is needed, enable DEBUG_UART_ANNOUNCE
Kconfig option, instead.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Since commit 0dba45864b ("arm: Init the debug UART") function
debug_uart_init is called in crt files _main before calling
board_init_f. Therefore, there is no need to call it again
inside board_init_f implementation in arm/mach-rockchip/spl.c.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Most board device trees for RK356x set max-frequency = <200000000> in
the sdhci node, some boards like Quartz64 do not. This result in an
error message due to sdhci driver trying to set a clock rate of 0
instead of the max-frequency value.
rockchip_sdhci_probe clk set rate fail!
Fix this by setting a common max-frequency in rk356x-u-boot.dtsi. A
patch to set default max-frequency of sdhci node in linux is planned.
Also remove the forced status = "okay" for the sdhci and sdmmc0 nodes,
boards already set correct state for these nodes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Pine64 Quartz64 boards DT reference SCLK_GMAC1_RGMII_SPEED in the
assigned-clocks property of the gmac1 node. This result in a ENOENT
error when driver core tries to set a parent for this clock.
The clock speed in rgmii/rmii mode is changed using clk_set_rate of the
tx_rx clock and not using clk_set_parent of the speed clock.
Add dummy support for SCLK_GMAC1_RGMII_SPEED and similar clocks to clk
driver to allow a driver for gmac node to probe.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The clock driver for RK3568 does not include support for UART clocks in
SPL. This result in the following message with high enough loglevel.
ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Fix this by including support for UART clocks in SPL.
Fixes: 4a262feba3 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide,
not 5 bits wide as currently defined in CPLL_25M_DIV_MASK.
Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate.
Fixes: 4a262feba3 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add cru structure definition in head file to support cpu_info driver.
Series-version: 2
Series-changes: 2
Format the patch header, add commit message and signature.
Signed-off-by: Anton <vao@asu-vei.ru>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
533ad9dc avoided an overflow but causes compilation
failure on 32bit boards (eg. veyron speedy)
this commit uses div_u64 which has a fallback codepath
for 32bit platforms
Signed-off-by: Alvaro Fernando García <alvarofernandogarcia@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
LubanCat2 is a rk3568 based SBC from EmbedFire.
Specification:
- Rockchip rk3568
- LPDDR4/4X 1/2/4/8 GB
- TF scard slot
- eMMC 8/32/64/128 GB
- Gigabit ethernet x 2
- HDMI out
- USB 2.0 Host x 1
- USB 2.0 Type-C OTG x 1
- USB 3.0 Host x 1
- Mini PCIE interface for WIFI/BT module
- M.2 key for 2280 NVME
- 40 pin header
The dts file is sync from linux mainline.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add fdtoverlay_addr_r and enable OF_LIBFDT_OVERLAY for the
use of DT overlay in RV1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the rk3328 rng details to the u-boot.dtsi and
enable the RNG on the Rock64 to be able to provide
a random seed via UEFI.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Fix typo message)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable the rockchip efuse driver on the Rock64 to
provide a stable ethernet address on the device.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The PCIe driver for RK3399 is affected by a similar issue that was fixed
for RK35xx in the commit e04b67a7f4 ("pci: pcie_dw_rockchip: release
resources on failing probe").
Resources are not released on failing probe, e.g. regulators may be left
enabled and the ep-gpio may be left in a requested state.
Change to use regulator_set_enable_if_allowed and disable regulators
after failure to keep regulator enable count balanced, ep-gpio is also
released on regulator failure.
Also add support for the vpcie12v-supply, remove unused include and
check return value from dev_read_addr_name.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
An earlier commit makes the common SPL code call
regulators_enable_boot_on and regulators_enable_boot_off before
iterating over possible boot media for U-Boot proper. There is therefore
no need to do this in the rk3399-specific code, so let's remove it.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
+ Add USB host support on VisionFive2 board
+ Enable SPI flash support on VisionFive2 board
+ Enable Random Number Generator in RISC-V QEMU board
+ Display new SBI extension
+ Add SPL_ZERO_MEM_BEFORE_USE Kconfig for jh7110 L2 LIM
(Loosely-Integrated Memory)
ftwdt010_wdt_start() has to call ftwdt010_wdt_reset() after setting-up
the timeout in the same fashion ftwdt010_wdt_expire_now() does it.
Without this patch the "wdt start <ms>" command does not actually start
the watchdog timer until the "wdt reset" command is executed.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Function 'cmd_usage()' already prints one command in usage before
printing out the help text given to the U_BOOT_CMD_WITH_SUBCMDS macro.
Wrong previous output:
Usage:
cyclic cyclic demo <cycletime_ms> <delay_us> - register cyclic demo function
cyclic list - list cyclic functions
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove
existing Starfive JH7110's L2 LIM clean code, since existing code has
following issues:
1. Each hart (in the middle of a function call) overwriting its own
stack and other harts' stacks.
(data-race and data-corruption)
2. Lottery winner hart can be doing "board_init_f_init_reserve",
while other harts are in the middle of zeroing L2 LIM.
(data-race)
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
On Starfive Visionfive 2, the u-boot environment settings are saved to
on-board SPI flash. Enable relative configs by default and set offset
and size according to upstream linux dts.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add XHCI_PCI to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The EFI_RNG_PROTOCOL is needed for Linux' KASLR.
QEMU can provide a virtio-rng device to emulate a hardware random number
generator which is supported by our virtio_rng driver.
Enabling CONFIG_DM_RNG will enable CONFIG_VIRTIO_RNG and
CONFIG_EFI_RNG_PROTOCOL by default too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These files rely on the config.h file provided this include. Add it
explictily so we can move to a text environment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include. Drop the unnecessary changes, since missing
stdio drivers will be ignored.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include along with some additions.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop common env from slimbootloader.env]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include. The existing environment includes "vga" but that
is not valid anymore, so let it use vidconsole
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include and add some options specific to this board.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is only used in one file and the value is the same for both boards
which define it. Use the fixed value of 32KB and drop the CFG. This will
allow removal of the config.h files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'environment' word is too long. We mostly use 'env' in U-Boot, so use
that as the name of the include directory too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add some hints and observations related to booting distros on QEMU on x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This build can be used to boot 32-bit standard-distro builds. Enable some
more options, so that all possible EFI UUIDs are decoded, we can search
memory for tables, support the full set of standard-boot features, have
full logging along with debug UART and can boot from CDROM media.
This mirrors a similar patch for qemu-x86_64
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop the unknown option from defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this feature is enabled in SPL if a bloblist is available.
Some platforms may not want to use this, so add an option to allow the
feature to be disabled.
Note that the feature unfortunately only fills in part of the
video-handoff information, so causes failures on x86 platforms. For now,
disable it there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
This is copying beyond the end of the destination buffer. Correct the code
by using the size of the vesa_mode_info struct. We don't need to copy the
rest of the bytes in the buffer.
This long-standing bug prevents virtio bootdevs working correctly on
qemu-x86 at present.
Fixes: 0ca2426bea ("x86: Add support for running option ROMs natively")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
Unfortunately the bochs driver does not currently work with distros.
It causes a hang between grub menu selection and the OS displaying
something.
Preliminary investigation shows that GRUB does not jump to the kernel
at all.
This reproduces reliably.
This reverts commit b8956425d5.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
[Slightly modify the commit message about preliminary investigation]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Call the hardware-init function from QEMU from SPL. This allows the
video BIOS to operate correctly.
Create an x86-wide qemu.h header to avoid having to #ifdef the header
in spl.c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
Drop the duplication and add a single rule which can handle SPL as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an example to show how cbfs is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Removed CONFIG_CMD_CBFS from defconfig files]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add some more output to make it easier to see what is going wrong when
a bootdev hunter fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This name is a little confusing since it suggests that it sets up the
sibling block device. In fact it sets up a bootdev for it. Rename the
function to make this clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
When CONFIG_ERRNO_STR is not enabled this shows a spurious 'E' from the
format string. Fix this.
Fixes: 7f33194132 ("lib: Support printing an error string")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When USB finds no devices it currently returns -EPERM which bootstd does
not understand. This causes other bootdevs of the same priority to be
skipped.
Fix this by returning the correct error code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for doc-2023-10-rc3
Documentation:
* Update examples for imx8mp_evk
* OpenOCD debugging guide for TI K3 boards
* Explain using gadget devices on TI boards
* Describe best practices for board ports
To help guide developers down the right path, begin a document that
lists some best practices to follow when creating a new board port.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To make it consistent with the instructions from other NXP imx8m boards,
such as imx8mm-evk and imx8mn-evk, use U-Boot in-tree build in the
examples.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Originally, exporting the ATF_LOAD_ADDR was required, but since binman has
been used to generate the flash.bin, it is no longer needed to do
such manual export.
The ATF address is now passed via binman in imx8mp-u-boot.dtsi:
atf {
description = "ARM Trusted Firmware";
type = "firmware";
arch = "arm64";
compression = "none";
load = <0x970000>;
entry = <0x970000>;
atf_blob: atf-blob {
filename = "bl31.bin";
type = "atf-bl31";
};
};
Remove the unneeded export ATF_LOAD_ADDR line.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Describe the current situation wrt the handling of USB devices on AM33xx
based boards, taking the example of a common board (the Beagle Bone
Black) and explaining how the different USB gadgets can be used.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Fix the Verdin module output which was missing white space for correct
rendering.
While at it also leave product links, add section author also for the
Verdin iMX8M Mini and Plus, and add a missing CROSS_COMPILE export for
the Verdin iMX8M Mini.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Nishanth Menon <nm@ti.com> #verdin-am62
Reviewed-by: Tom Rini <trini@konsulko.com>
Bootloader debug usually tends to be a bit dicey prior to DDR and
serial port getting active in the system. JTAG typically remains the
only practical debug option during the initial bringup.
OpenOCD is one of the most popular environment for providing debug
capability via a GDB compatible interface for developers to work with.
Debugging U-Boot and bootloaders on K3 platform does have a bit of
tribal knowledge that is better documented in our common platform
documentation.
Signed-off-by: Jason Kacines <j-kacines@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
To quote the author:
Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [A].
FF-A specifies interfaces that enable a pair of software execution
environments aka partitions to communicate with each other. A partition
could be a VM in the Normal or Secure world, an application in S-EL0, or
a Trusted OS in S-EL1.
FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed by
the PSCI driver.
=> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
...
firmware 0 [ + ] psci |-- psci
ffa 0 [ ] arm_ffa | `-- arm_ffa
...
Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).
This implementation of the specification provides support for Aarch64.
The FF-A driver uses the SMC ABIs defined by the FF-A specification to:
- Discover the presence of secure partitions (SPs) of interest
- Access an SP's service through communication protocols
(e.g: EFI MM communication protocol)
The FF-A support provides the following features:
- Being generic by design and can be used by any Arm 64-bit platform
- FF-A support can be compiled and used without EFI
- Support for SMCCCv1.2 x0-x17 registers
- Support for SMC32 calling convention
- Support for 32-bit and 64-bit FF-A direct messaging
- Support for FF-A MM communication (compatible with EFI boot time)
- Enabling FF-A and MM communication in Corstone1000 platform as a use case
- A Uclass driver providing generic FF-A methods.
- An Arm FF-A device driver providing Arm-specific methods and reusing the Uclass methods.
- A sandbox emulator for Arm FF-A, emulates the FF-A side of the Secure World and provides
FF-A ABIs inspection methods.
- An FF-A sandbox device driver for FF-A communication with the emulated Secure World.
The driver leverages the FF-A Uclass to establish FF-A communication.
- Sandbox FF-A test cases.
- A new command called armffa is provided as an example of how to access the
FF-A bus
For more details about the FF-A support please refer to [B] and refer to [C] for
how to use the armffa command.
Please find at [D] an example of the expected boot logs when enabling
FF-A support for a platform. In this example the platform is
Corstone1000. But it can be any Arm 64-bit platform.
More details:
[A]: https://developer.arm.com/documentation/den0077/latest/
[B]: doc/arch/arm64.ffa.rst
[C]: doc/usage/cmd/armffa.rst
[D]: example of boot logs when enabling FF-A
Add MM communication support using FF-A transport
This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.
An MM shared buffer and a door bell event are used to exchange
the data.
The data is used by EFI services such as GetVariable()/SetVariable()
and copied from the communication buffer to the MM shared buffer.
The secure partition is notified about availability of data in the
MM shared buffer by an FF-A message (door bell).
On such event, MM SP can read the data and updates the MM shared
buffer with the response data.
The response data is copied back to the communication buffer and
consumed by the EFI subsystem.
MM communication protocol supports FF-A 64-bit direct messaging.
We tested the FF-A MM communication on the Corstone-1000 platform.
We ran the UEFI SCT test suite containing EFI setVariable, getVariable and
getNextVariable tests which involve FF-A MM communication and all tests
are passing with the current changes.
We made the SCT test reports (part of the ACS results) public following the
latest Corstone-1000 platform software release. Please find the test
reports at [1].
[1]: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-test-report/-/tree/master/embedded-a/corstone1000/CORSTONE1000-2023.06/acs_results_fpga.zip
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Tested-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Provide armffa command showcasing the use of the U-Boot FF-A support
armffa is a command showcasing how to invoke FF-A operations.
This provides a guidance to the client developers on how to
call the FF-A bus interfaces. The command also allows to gather secure
partitions information and ping these partitions. The command is also
helpful in testing the communication with secure partitions.
For more details please refer to the command documentation [1].
A Sandbox test is provided for the armffa command.
[1]: doc/usage/cmd/armffa.rst
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support
Features of the sandbox FF-A support:
- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs
The sandbox FF-A emulator supports only 64-bit direct messaging.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0
The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.
This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.
The driver uses SMC32 calling convention which means using the first
32-bit data of the Xn registers.
All supported ABIs come with their 32-bit version except FFA_RXTX_MAP
which has 64-bit version supported.
Both 32-bit and 64-bit direct messaging are supported which allows both
32-bit and 64-bit clients to use the FF-A bus.
FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.
Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).
The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.
The driver exports its operations to be used by upper layers.
Exported operations:
- ffa_partition_info_get
- ffa_sync_send_receive
- ffa_rxtx_unmap
Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c).
Arm specific methods are implemented in the Arm driver (arm-ffa.c).
For more details please refer to the driver documentation [2].
[1]: https://developer.arm.com/documentation/den0077/latest/
[2]: doc/arch/arm64.ffa.rst
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_$(SPL_TPL_)SYS_MALLOC_F_LEN is defined as hex. If set to zero
manually, .config contains '0x0' and not '0' as value.
The default value for CONFIG_SPL_SYS_MALLOC_F_LEN should not be set to 0
but to 0x0 if CONFIG_SPL_FRAMEWORK=n to match a manually set value.
Fixes: c0126bd862 ("spl: Support bootstage, log, hash and early malloc in TPL")
Fixes: b616947052 ("SPL: Do not enable SPL_SYS_MALLOC_SIMPLE without SPL_FRAMEWORK by default")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
All SPL hash algorithm options are collected in lib/Kconfig. Move
SPL_CRC32 there as well.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is another SPL_MD5 option defined in lib/Kconfig.
Renaming SPL_MD5_SUPPORT introduced duplicate option with
different description. As for now FIT and hash algorithm options
are not related to each others, removing a duplicate option seems OK.
Fixes: 4b00fd1a84 ("Kconfig: Rename SPL_MD5_SUPPORT to SPL_MD5")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
In the common bloblist code we call crc32 to get a checksum for the
data. Ensure we will have the CRC32 code via select.
Signed-off-by: Tom Rini <trini@konsulko.com>
With this change the DT and binding files are under the at91 tree
maintainer, and get_maintainer.pl correctly reports the entry.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
The retimer reset/power on logic was changed in a recent commit,
however, it neglected to check if the commands sent to the
board microcontroller (to control power to the retimer chip)
actually completed.
Add return checks for these operations so any failures will
be reported to the user.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Fixes: 7a041fea2 ("board: traverse: ten64: ensure retimer reset
is done on new board revisions")
Update MAINTAINERS file. Add missing MAINTAINERS file for Spider,
Whitehawk and V3HSK boards. Update mail addresses. Add file globs
to match on DT and driver files related to these boards.
The GRPEACH and R2DPLUS are special in that they are not R-Car
and have their own set of specialized drivers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
As Pali Rohár has asked to not be copied on changes to files he is not
a specific maintainer of, add his address to .get_maintainer.ignore.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
To reduce overall job time, move a number of smaller jobs together.
These should still be safely under 1 hour total time, but reducing the
overall number of jobs should help with the queue slightly.
Signed-off-by: Tom Rini <trini@konsulko.com>
The job for rockchip vendor platforms has again gotten close to or
exceeded one hour. Rework things such that we move the 32bit platforms
back to the general 32bit ARM job (as there's time there) and make these
build only the 64bit platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Some boards use a MAINTAINERS entry to specify common files without
referencing any defconfigs. This is allowed and should not result in a
warning.
Drop the warning in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Recent refactoring changed buildman to continue operation after fetching
a toolchain. Fix this.
Fixes: b868064652 ("bulidman: Move toolchain handling to a function")
Signed-off-by: Simon Glass <sjg@chromium.org>
DM_POST_INIT was changed to DM_POST_INIT_F.
To debug correct message, change type_name from dm_post_init to
dm_post_init_f.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
s/an/a/ :
Signed-off-by: Simon Glass <sjg@chromium.org>
Add test for the 'xilinx-bootgen' etype
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow missing bootgen tool; comment testXilinxBootgenMissing() comment:
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a new etype 'xilinx-bootgen'. By using this etype it is
possible to created an signed SPL (FSBL in Xilinx terms) for
ZynqMP boards.
The etype uses Xilinx Bootgen tools in order to transform the SPL into
a bootable image and sign the image with a given primary and secondary
public key. For more information to signing the FSBL please refer to the
Xilinx Bootgen documentation.
Here is an example of the etype in use:
spl {
filename = "boot.signed.bin";
xilinx-bootgen {
pmufw-filename = "pmu-firmware.elf";
psk-key-name-hint = "psk0";
ssk-key-name-hint = "ssk0";
auth-params = "ppk_select=0", "spk_id=0x00000000";
u-boot-spl-nodtb {
};
u-boot-spl-dtb {
};
};
};
For this to work the hash of the primary public key has to be fused
into the ZynqMP device and authentication (RSA_EN) has to be set.
For testing purposes: if ppk hash check should be skipped one can add
the property 'fsbl_config = "bh_auth_enable";' to the etype. However,
this should only be used for testing(!).
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the Xilinx Bootgen as bintool. Xilinx Bootgen is used to create
bootable SPL (FSBL in Xilinx terms) images for Zynq/ZynqMP devices. The
btool creates a signed version of the SPL. Additionally to signing the
key source for the decryption engine can be passend to the boot image.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
The nature of the network stack means that if we are going to use the
gadget mode USB network driver there's no easy path to implicitly
bind/unbind the driver. Enable the "bind" command by default here so
that we can bind/unbind this as needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Move the ethernet gadget driver registration and removal from ethernet
bind and unbind callbacks into driver DM probe and remove callbacks.
This way, when the driver is bound, which is triggered deliberately
using 'bind' command, the USB ethernet gadget driver is instantiated
and bound to the matching UDC. In reverse, when the driver is unbound,
which is again triggered deliberately using 'unbind' command, the USB
ethernet gadget driver instance is removed.
Effectively, this now behaves like running either 'ums' or 'dfu' or
any other commands utilizing USB gadget functionality.
This also drops use of usb_gadget_release() and moves the use of
usb_gadget_initialize() into usb_ether_init() used only by legacy
platforms that do not use 'bind' command properly yet. Those have
no place in drivers.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move the driver probe function above the driver structure, so it
can be placed alongside other related functions, like upcoming
remove function. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions here are only ever called once since drop of non-DM
networking code. Inline them. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Two Toradex platform series. First, to quote Andrejs:
This series adds Yavia Carrier board name string to the known
Toradex carrier board list, and reworks carrier board and display
adapter name handling.
And then to quote Marcel:
This series adds initial support for the Toradex Verdin AM62 SoM.
The first commit adds resp. PID4s to the ConfigBlock, the second one
fixes an early clocking issue confirmed to be a weird bug in TI's
scripting, the third one fixes some binman labeling issue. And last but
not least support for the Toradex Verdin AM62 is added.
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT
V1.0A module and subsequent V1.1 launch configuration SKUs. They are
strapped to boot from their on-module eMMC. U-Boot supports booting
from the on-module eMMC only, DFU support is disabled for now due to
missing AM62x USB support.
The device trees were taken straight from Linux v6.5-rc1.
Boot sequence is:
SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE
---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img)
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Fix rcfg_yaml to really point to rm-cfg.yaml and pcfg_yaml to really
point to pm-cfg.yaml which likely is the intention.
While at it also add labels for the remaining items like custmpk_pem,
dkey_pem, bcfg_yaml_sysfw, scfg_yaml_sysfw, pcfg_yaml_sysfw and
rcfg_yaml_sysfw.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Rework the rather big array of zero length strings with 4 entries of
actual display adapter names to a array of structs which ties a pid4
to its correspondent human readable string.
Provide an accessor to get the string for a given PID4.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Rework the rather big array of zero length strings with 4 entries of
actual carrier board names to a array of structs which ties a pid4
to its correspondent human readable string.
Provide an accessor to get the string for a given PID4.
Rework the user of the information to use the accessor.
Note that check_pid8_sanity() is used for early samples of Dahlia and
the development board. Yavia isn't affected.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
The implementation in extlinux_pxe_getfile() does not pass a valid size
to bootmeth_read_file(), so this can fail if the uninited value happens to
be too small.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The implementation in distro_efi_try_bootflow_files() does not pass a
valid size to bootmeth_common_read_file(), so this can fail if the
uninted value happens to be too small.
Fix this.
This was reported by someone but I cannot now find the email.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current bootflow-iteration algorithm reads the bootflow file into
an allocated memory buffer so it can be examined. This works well in
most cases.
However, while the common case is that the first bootflow is immediately
booted, it is also possible just to scan for available bootflows, perhaps
selecting one to boot later.
Even with the common case, EFI bootflows can be quite large. It doesn't
make sense to read it into an allocated buffer when we have kernel_addr_t
providing a suitable address for it. Even if we do have plenty of malloc()
space available, it is a violation of U-Boot's lazy-init principle to
read the bootflow before it is needed.
So overall it seems better to make a change.
Adjust the logic to read just the size of the EFI file at first. Later,
when the bootflow is booted, read the rest of the file into the designated
kernel buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Da Xue <da@libre.computer>
Reported-by: Vincent Stehlé <vincent.stehle@arm.com>
This checks for a network-based bootflow in two places, one of which is
less than ideal. Move the correct test into a function and use it in both
places.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a driver cannot be bound, provide the driver name in the debug
message. Now the debug message may look like this:
(virtio-pci.l#0): virtio-rng driver not configured
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The FAT file systems uses character '\xe5' to mark a deleted directory
entry. If a file name starts with this character, it is substituted by
'\x05' in the directory entry.
While (signed char)'\xe5' is a negative number 0xe5 is a positive integer
number. We therefore have define a constant DELETED_MARK which matches the
signedness of the characters in the directory entry.
Correct a comparison where we used the constant 0xe5 with the wrong sign.
Use the constant aRING instead of 0x05 like in the rest of the code.
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Fixes: 57b745e238 ("fs: fat: call set_name() only once")
Fixes: 28cef9ca2e ("fs: fat: create correct short names")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As the defconfig files here have been removed we can also remove the
entries.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given that we no longer have a configs/vexpress_aemv8a_defconfig file,
drop that and then include at least the aarch64-specific config.h file
here. Also move Linus and Peter up to the main entry as well so that
they'll get tagged for the board code too and not literally only the
defconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rajesh's email bounces. Remove his email from all boards he maintains.
Fortunately, he has co-maintainers on most boards. I have taken the
liberty of volunteering Pramod to maintain the LS1012AFRDM, since he
also maintains the LS1012AFRWY. Let me know if the board should be
orphaned instead.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Merge in a series for MediaTek update and another for Ten64.
To quote Weijie Gao for MediaTek:
This patch series add support for MediaTek MT7988 SoC with its reference
boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for
these boards. The clock, pinctrl drivers and the SoC initializaton code
are also included.
Product spec for MT7988:
https://www.mediatek.com/products/broadband-wifi/mediatek-filogic-880
And to quote Mathew McBride for Ten64:
This is a series of updates for the Ten64 board,
that are part of our firmware releases but not yet upstreamed
into U-Boot.
Changes of note include:
- Turning on standard boot support
Standard boot improves the user experience over distroboot on Ten64,
as we had various hacks in our firmware to solve some corner-case
issues (e.g DTB handling) in distroboot, which are not needed with the
bootflow system.
- Recognition of the new 'RevD' board variant distributed to OEM
customers
- Fixing various boot issues related to FIT images and operating systems
running out of the NAND (OpenWrt, recovery environment).
- A better 'opt-out' solution for fsl_setenv_bootcmd for Layerscape
platforms booting from TF-A.
This was discussed when the Ten64 was upstreamed into U-Boot. I think
declaring fsl_setenv_bootcmd as __weak and allowing individual boards
to override is the best way to do this without significant rework.
(We actually depend on a similar feature for the DPAA2/MC firmware
loading)
Compared to our firmware branch, there is still a few features missing (e.g USB
Hub, fan controller and fixes for the VSC8514). Some of these depend on other
things (like sorting out device tree schemas) so may not appear in mainline
U-Boot for a while yet.
The u-boot version of the LS1088A device tree has
an extra compatible (simple-mfd) added to &fsl_mc
to facilitate usage with U-Boot's device model.
Unfortunately FreeBSD will only match the single
"fsl,qoriq-mc" exactly when the node is a "bus"
object, so we need to strip out the extra compatible
before presenting it to the operating system.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Our bootcmd is the same regardless of where the SoC
loaded it's code from, so we don't want
fsl_setenv_bootcmd to do anything.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Allow individual Layerscape boards to opt-out of fsl_setenv_bootcmd
by declaring the original function as weak.
fsl_setenv_bootcmd is used to change the bootcmd based on the
TF-A boot source (e.g QSPI vs SD/MMC) for reasons including
secure boot / integrity measurements and DPAA2 configuration loading.
See previous discussion at [1].
On the Ten64 board, our bootcmd is the same across
all TF-A boot sources so we don't want this behaviour.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] https://patchwork.ozlabs.org/project/uboot/patch/20211110044639.7070-3-matt@traverse.com.au/#2790037
Reviewed-by: Peng Fan <peng.fan@nxp.com>
With the previous updates to the device tree, Ten64
can use Standard Boot 'out of the box'.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The watchdog driver was previously enabled but not used
until U-Boot's fsl-ls1088a.dtsi was updated to describe them.
Some Linux distributions (e.g Debian 11) do not engage the
SP805 watchdogs, causing unexpected resets after boot.
To conserve the user experience, turn off the autostart,
and we will provide a mechanism to turn them on at boot
via env vars.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The GE0 (first Gigabit Ethernet interface) is used as the
'serial number' for the board and appliance.
To ensure the 'true' board S/N is available regardless of how
the DPAA2 subsystem is configured, use serial# so it is passed in
the device tree.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
On Ten64 boards, the "serial number" is the MAC address of the
first Gigabit Ethernet interface (labelled GE0 on the appliance),
and counted up from there.
The previous logic did not take into account U-Boot's ordering
of the network interfaces. By setting aliases/ethernetX in the device
tree we can ensure the U-Boot 'ethX' is the same as the labelled
port order on the unit, as well as the one adopted by Linux.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Ensure nvme devices are scanned before reaching the shell,
otherwise extra user intervention ("nvme scan") is required
before they are visible to bootdev/bootflow.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This restores NVMe functionality after PCI(e) NVMe support
was split out from the NVMe driver.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The recovery-firmware and OpenWrt-NAND do not yet have bootflow
/bootstd entrypoints, so add bootmenu entries to make them
accessible.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The default Ten64 MTD configuration reserves two ubifs partitions
for OpenWrt residing on NAND flash. Add the bootcmd for this system
into the default environment.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The recovery environment[1] on the Ten64 is a OpenWrt-
based ramdisk stored on the NAND intended to help with
system setup tasks.
Before the bootargs were not being set for the recovery
command, relying instead on the existing bootargs variable.
Ensure the bootargs are set correctly prior to booting recovery.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] https://ten64doc.traverse.com.au/software/recovery/
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Change the firmware on microSD path to "firmware/traverse/ten64"
as per EBBR section 4.2[1].
The Traverse firmware tools now locate the DPAA2 firmware
and configuration files under that path on the rescue
SD card image.
If a user then installs a standard Linux
distribution over the top of that sdcard, (in theory)
it will be left alone by distribution boot tooling.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] https://arm-software.github.io/ebbr/index.html#firmware-partition-filesystem
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The DPAA2 DPL (data plane layout) file was previously
being loaded into 0x80300000, and set to be applied
just before hand off to the kernel.
When a FIT image with a load_address of 0x80000000 was
booted with bootm, the DPL in memory was overwritten.
Move the DPL load to 0x8E000000 (196MiB away from 0x80000000,
and below the other typical load addr of 0x90000000).
Ideally in the future, the DPL lazyapply command
("fsl_mc lazyapply DPL $dpl_addr") should be set to
load the DPL contents into a memory area owned by U-Boot.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Board revision C (production) and later require the SFP+
retimer to be turned on (or reset) on boot, by way of issuing
a command to the board's microcontroller (via I2C).
The comparison statement here was incorrect, as the board
ID decrements every revision (from 0xFF downwards),
so this was matching board RevA,B,C instead of Rev >= C.
Another oops that transpired when working on this issue,
is that if the board controller is not called (such as
CONFIG_TEN64_CONTROLLER=n or earlier board rev), then
the retimer udevice was not obtained. So the board
version check has to be moved inside board_cycle_retimer
(which probes/fetches the retimer device) as well.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Ten64 board revision D is a variant that removes the USB hub
and PCIe expander/switch, but is otherwise compatible with the
main production "C" version.
At the same time, revise the printf specifiers (PCB version
"1064-0201%s") to reduce the number of string characters related
to the boot printout.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds general board files based on MT7988 SoCs.
MT7988 uses one mmc controller for booting from both SD and eMMC,
and the pins of mmc controller booting from SD are also shared with
one of spi controllers.
So two configs are need for these boot types:
1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
2. mt7988_sd_rfb_defconfig - SPI-NAND and SD
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds basic support for MediaTek MT7988 SoC.
This includes files that will initialize the SoC after boot and
its device tree.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch converts magic and version fields of ghf common header
to one field with the type of uint32_t to make this header flexible
for futher updates.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek MT7988.
MT7988 features MediaTek NETSYS v3, including three GMACs, and two
of them supports 10Gbps USXGMII.
MT7988 embeds a MT7531 switch (not MCM) which supports accessing
internal registers through MMIO instead of MDIO.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
MT7981 has its GMAC2 PHY shared with USB3. To enable GMAC2, mux
register must be set to connect the SGMII phy to GMAC2.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Now that individual 2.5Gbps SGMII support has been added to
mtk-eth, all boards that use 2.5Gbps link with mt7531 must be
converted to use "2500base-x" instead of "sgmii".
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Existing SGMII support of mtk-eth is actually a MediaTek-specific
2.5Gbps high-speed SGMII (HSGMII) which does not support
auto-negotiation mode.
This patch adds SGMII 1Gbps auto-negotiation mode and rename the
existing HSGMII to 2500basex.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
mt7531_mmd_ind_read and mt753x_switch_init are defined without static.
Since they're not used outside this file, we should add them back.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
fixup to add static qualifier
The original direct MDIO clause 45 access via SoC is missing the
data output. This patch adds it back to ensure MDIO clause 45 can
work properly for external PHYs.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Not all switches requires 1 second delay after deasserting reset.
MT7531 requires only maximum 200ms.
This patch defines dedicated reset wait time for each switch chip, and will
significantly improve the boot time for boards using MT7531.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
So far the switch is initialized in probe stage and is connected to PSE
unconditionally. This will cause all packets being flooded to PSE and may
cause PSE hang before entering linux.
This patch changes the connection between switch and PSE:
- Still initialize switch in probe stage, but disconnect it with PSE
- Connect switch with PSE on eth start
- Disconnect on eth stop
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The original mediatek pinctrl functions for driving configuration
'mtk_pinconf_drive_set_*' do not return -ENOSUPP even if input
parameters are not supported.
This patch fixes the return value in those functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
There exists a situation of the mediatek pinctrl driver that may return
wrong pin function value for the pinmux driver:
- All pin function arrays are defined without const
- Some pin function arrays contain all-zero value, e.g.:
static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
- These arrays will be put into .bss section during compilation
- .bss section has no "a" attribute and does not exist in the final binary
file after objcopy.
- FDT binary blob is appended to the u-boot binary, which occupies the
.bss section.
- During board_f stage, .bss has not been initialized, and contains the
data of FDT, which is not full-zero data.
- pinctrl driver is initialized in board_f stage, and it will get wrong
data if another driver is going to set default pinctrl.
Since pinmux information and soc data are only meant to be read-only, thus
should be declared as const. This will force all pinctrl data being put
into .rodata section. Since .rodata has "a" attribute, even the all-zero
data will be allocated and filled with correct value in to u-boot binary.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
MT7981 actually uses MediaTek I2C controller v3 instead of v1.
This patch adds support for I2C controller v3 fix fixes the I2C usability
for MT7981.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add missing return value check for allocating the driver's
private data. -ENOMEM will be returned if malloc() fails.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch ensures driver private data being fully initialized in
_debug_uart_init which is not covered by .priv_auto ops.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.
However these IRQ enable bits may be set in previous boot stage (BootROM).
If we leave these bits not cleared, although u-boot has disabled IRQ and
nothing will happen, the linux kernel may encounter panic during
initializing the spim driver due to IRQ event happens before IRQ handler
is properly setup.
This patch clear IRQ bits to prevent this from happening.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node
and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed.
Also, since mt7622 always passes fdt to linux kernel, there's no need to
assign value to gd->bd->bi_boot_params.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Check the uuid_str_to_bin return value, skip the node
if the image-type-id property is wrong format.
Addresses-Coverity-ID: 463145 ("Error handling issues")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* If an error occurs in efi_disk_add_dev(), don't leak resources.
* If calloc() fails while creating the file system protocol interface,
signal an error.
* Rename efi_simple_file_system() to efi_create_simple_file_system().
* Drop a little helpful debug message.
Fixes: 2a92080d8c ("efi_loader: add file/filesys support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
On 32bit systems (pages << EFI_PAGE_SHIFT) may lead to an overflow which
does not occur in 64bit arithmetics.
An overflow of (pages << EFI_PAGE_SHIFT) on 64bit systems should be treated
as an error.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If the hard coded array hash_algo_list[] contains an entry for an
unsupported algorithm, we should not leak resources new_efi and regs.
We should still extend the log with the digests for the supported
algorithms and not write any message.
The same holds true of tcg2_create_digest(): just continue in case
hash_algo_list[] contains an unsupported entry.
Fixes: 163a0d7e2c ("efi_loader: add PE/COFF image measurement")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In test_hii_database_list_package_lists() 'ret' is used for the return code
of EFI API calls and 'result' for the return value of the function. Writing
EFI_ST_FAILURE to ret is superfluous.
Fixes: 4c4fb10da2 ("efi_selftest: add HII database protocols test")
Fixes: ee3c8ba855 ("efi_selftest: fix memory allocation in HII tests")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The efi_parse_pkcs7_header() function returns NULL on error so the check
for IS_ERR() should be changed to a NULL check.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While UPDATE_CAPSULE api is not fully implemented, this interface and
capsule-on-disk feature should behave in the same way, especially in
handling an empty capsule for fwu multibank, for future enhancement.
So move the guid check into efi_capsule_update_firmware().
Fixed: commit a6aafce494 ("efi_loader: use efi_update_capsule_firmware() for capsule on disk")
Reported-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reported-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
It's pretty unlikely that anyone is going to be using EFI authentication
on a 32bit system. However, if you did, the efi_prepare_aligned_image()
function would write 8 bytes of data to the &efi_size variable and it
can only hold 4 bytes so that corrupts memory.
Fixes: 163a0d7e2c ("efi_loader: add PE/COFF image measurement")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Enhance the description of QEMU block devices
* Describe how to attach a virtio-blk device.
* Sort the command lines for MMC to match the other devices.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add more detail to the description of U-Boot boot phases:
* describe which steps are optional
* mentions alternative boot flows
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Three boards use a phandle in a FIT generator and the maintainer is
away. For now, add a hack to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
device_probe() called by the 'bootdev info' command
returns 0 or a negative error code.
itoa() cannot print negative numbers.
Convert the error code to a positive number.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
uclass_get_device_by_name() is meant to return 0 or a negative error code.
simple_itoa() cannot handle negative numbers.
This leads to output like:
=> bootdev list -p
Seq Probed Status Uclass Name
--- ------ ------ -------- ------------------
c [ ] 18446744073709551614 spi_flash spi.bin@0.bootdev
Convert the status to a positive number. Now we get
Seq Probed Status Uclass Name
--- ------ ------ -------- ------------------
c [ ] 2 spi_flash spi.bin@0.bootdev
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This provides support for phandles to be copied over from templates. This
is not quite safe, since if the template is instantiated twice (i.e. in
two different nodes), then duplicate phandles will be found. This will
result in an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is not necessary to keep templates around after they have been
processed. They can cause confusion and potentially duplicate phandles.
Remove them.
Use the same means of detecting a template node in _ReadImageDesc so that
the two places are consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow phandles to be copied over from a template. This can potentially
cause duplicate phandles, so detect this and report an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Show the operations being performed, when debugging is enabled.
Convert a mistaken 'print' in test_copy_subnodes_from_phandles() while we
are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Without the 'dirty' flag properties are not written back to the
devicetree when synced. This means that new properties copied over to a
node are not always written out.
Fix this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file aids debugging when binman fails to get far enough to write out
the final devicetree file. Write it immediate after template processing.
Signed-off-by: Simon Glass <sjg@chromium.org>
When binman is invoked during a build of U-Boot and an external blob is
missing, the user is usually presented with a generic file not found in
input path message.
Invoke binman with --allow-missing so that binman can show relevant
missing blob help messages. Build continue to fail with missing blobs
unless BINMAN_ALLOW_MISSING=1 is used, same as before.
This changes the following error message during a normal build:
binman: Filename 'atf-bl31' not found in input path (...)
to the following:
Image 'itb' is missing external blobs and is non-functional: atf-blob
/binman/itb/fit/images/atf/atf-blob (bl31.bin):
See the documentation for your board. You may need to build ARM Trusted
Firmware and build with BL31=/path/to/bl31.bin
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Show the filename next to the node path in missing blob help messages,
also show a generic missing blob message when there was no help message
for the help tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no blank line between last missing blob help message and the
header line for optional blob help messages.
Image 'simple-bin' is missing external blobs and is non-functional: atf-bl31
/binman/simple-bin/fit/images/@atf-SEQ/atf-bl31:
See the documentation for your board. You may need to build ARM Trusted
Firmware and build with BL31=/path/to/bl31.bin
Image 'simple-bin' is missing external blobs but is still functional: tee-os
/binman/simple-bin/fit/images/@tee-SEQ/tee-os:
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Some images are invalid
With this a blank line is inserted to make the text more readable.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Missing optional blobs was not reported for generated entries, e.g.
tee-os on rockchip targets. Implement a CheckOptional to fix this.
After this the following can be shown:
Image 'simple-bin' is missing optional external blobs but is still functional: tee-os
/binman/simple-bin/fit/images/@tee-SEQ/tee-os (tee-os):
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Print missing external blobs using error level and missing optional
external blobs using warning level. Also change to only print the header
line in color, red for missing and yellow for optional.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make it more clear that the missing external blob is optional in the
printed warning message.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make it a little bit more clear that it is U-Boot that should be built
with TEE=/path/to/tee.bin and not OP-TEE itself.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
+ Fix compilation error for CI when enabling RTL8169 driver
+ Fix compilation error for pci_mmc.c by adding acpi_table header file
+ Support video console and usb keyboard on RISC-V QEMU virt machine
+ Support StarFive JH7110 PCIe driver
+ Enable PCI on Unmatched board
Check if elf tools are available when running DecodeElf(). Also
remove superfuous semicolon at line ending.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Revert part of patch to make binman test pass
Signed-off-by: Simon Glass <sjg@chromium.org>
This brings PCI xHCI support to QEMU RISC-V and uses a usb keyboard
as one of the input devices.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 66ffe57 ("riscv: qemu: detect and boot the kernel passed by QEMU")
added some logic to handle "riscv,kernel-start" in DT and stored the
address to an environment variable kernel_start.
However this "riscv,kernel-start" has never been an upstream DT binding.
The upstream QEMU never generates such a DT either. Presumably U-Boot
development was based on a downstream QEMU fork.
Now we drop all codes in commit 66ffe57, except that BOARD_LATE_INIT
is kept for later use.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default the video console only outputs messages after it's ready.
Messages before that won't show on the video console, but U-Boot has
an option to buffer the console messages before it's ready.
Enable this support, and carefully select an address for the buffer.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present if both CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are on,
during boot, the printed out stdio devices are incomplete, e.g.:
with "stdout=serial,vidconsole", only "vidconsole" is printed.
For such case, we can print out the stdio device name from the
environment variables.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h. This file does not exist for the RISC-V architecture
and thus code compilation fails when using this driver on RISC-V
Create an empty include file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The Unmatched board is typically booted from NVMe which requires PCI.
When dropping to a console PCI is not initialized yet. 'pci enum' has to be
called.
Change the configuration to call pci_init() in board_init_r().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
While compiling rtl8169.c, There are many "make pointer from
integer without a cast" compile warnings. fix them with
adding cast.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file cannot be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
- dm video cosmetic style fix
- bochs: remove the x86 limitation
- correct kconfig text for PCI default FB size
- kconfig: drop the superfluous PCI dependency
- set up default FB size for Bochs
Perform removal of DSS if kconfigs VIDEO_REMOVE or SPL_VIDEO_REMOVE is
set by user. Otherwise if above Kconfigs are not selected, it is assumed
that user wants splash screen to be displayed until linux kernel boots
up. In such scenario, leave the power domain of DSS as "on" so that
splash screen stays intact until kernel boots up.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Change remove method of DSS video driver to disable video port instead
of performing a soft reset, as soft reset takes longer duration. Video
port is disabled by setting enable bit of video port to 0.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
At present the uclass stored frame buffer size is set to a hard
coded value, but we can calculate the correct value based on what
is configured.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
Set up a default frame buffer size of 8MiB for Bochs for non-x86
architecturs as PCI is normally not enumerated before relocation
on these architectures.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI is always selected by X86 architecture hence "X86 && PCI" does
not make it better.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
There is an example in the VIDEO_PCI_DEFAULT_FB_SIZE help text to
tell people how to calculate its value but the resolution given
does not match the value. Fix it.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that the driver is legacy free, remove the x86 dependency so
that it can be used on non-x86 architectures.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
At present the driver uses IO instructions to access the legacy
VGA IO ports, which unfortunately limits the driver to work only
on x86. It turns out the IO instruction is not necessary as Bochs
VGA card remaps the legacy VGA IO ports (0x3c0 -> 0x3df) to its
memory mapped register space from offset 0x400.
Update the driver to use MMIO access for VGA IO port.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
bochs_vga_write() takes 'index' as one argument, but never uses it.
While we are here, use macros instead of magic numbers for the
VGA IO port register name and value.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
Show the number of records in the table and the total table size in
bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function used to be for adding a list of requests to be actioned on
relocation. Revert it back to this purpose, to avoid problems with boards
which need control of their MTRRs (i.e. those which don't use FSP).
The mtrr_set_next_var() function is available when the next free
variable-MTRR must be set, so this can be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 3bcd6cf89e ("x86: mtrr: Skip MSRs that were already programmed..")
Fixes: 596bd0589a ("x86: mtrr: Do not clear the unused ones..")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
needs to program MTRRs too. With current testing logic of mtrr
commit in init_cache_f_r(), the mtrr commit is skipped which won't
work as the queued mtrr requests include setup for DRAM regions.
Change the logic to allow such configuration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tweak to put back CONFIG_FSP_VERSION2 at top:
Signed-off-by: Simon Glass <sjg@chromium.org>
- Update dwc3 generic driver and update support for rk3568/rk3328;
- Add boards:
rk3566: Pine64 Quartz64-A/B, SOQuartz on Model A/Blade/CM4-IO
rk3568: Radxa E25 Carrier Board
rk3588: Radxa ROCK5A
- Fixes and updates for chromebook veryon/jerry/speedy;
- SPI support fixes for rk3399/rk3568/rk3588;
- rk3588 usbdp phy support;
- dts and config updates for different boards;
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.
Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA
Device tree is imported from linux next-20230728.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Enable USB 3.0 in all RK3328 boards.
=> usb start
starting USB...
Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: 1 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (12 Mb/s, 0mA)
U-Boot Root Hub
1 Hub (5 Gb/s, 0mA)
| U-Boot XHCI Host Controller
|
+-2 Mass Storage (5 Gb/s, 224mA)
SanDisk Dual Drive 040130e3ee554b7078843f4eb331646
1 Hub (480 Mb/s, 0mA)
U-Boot Root Hub
Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Like Rockchip RK3568, the RK3328 also have single node to
represent the glue and ctrl for USB 3.0.
So, use the driver data to use single ctrl for RK3328 DWC3.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3328-xhci has been added due to the fact that the upstream
dwc3 is unsupported. Moreover, the driver for rk3328-xhci is
not added to the code tree.
By considering these facts and unsupported rk3328-xhci this
patch is dropping all related code from DT. However, the DWC3
is fixed now in dwc3-generic and RK3328 USB 3.0 is functional
in upcoming patches.
Let's drop it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A quick power cycle of a LDO regulator during dw-mmc signal voltage
change has shown that SD-card does not always get recognized.
Linux driver use an enable_time of 400us for LDO regulators. Apply a
500us delay when a LDO regulator is enabled to fix possible issues.
Fixes: 94afc1cb46 ("power: regulator: rk8xx: update the driver for rk808 and rk818")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: elaine.zhang<elaine.zhang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There is an Errata with the built-in I2C controller where various I2C
hardware errors cause a complete lockup of the CPU (which eventually
results in an watchdog reset).
Put the I2C MPP pins into GPIO mode and use the i2c-gpio driver instead.
This uses a bit-banged implementation of an I2C controller and avoids
triggering the Errata.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
gpio_request_list_by_name() returns the number of gpios requested.
Notably it swallows the underlying -ENOENT when the "gpios" property
does not exist.
Update the i2c-gpio driver to check for ret == 0 before trying the new
sda-gpios/scl-gpios properties.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move bootph-all prop to common SoC dt file, because they are typically used
by multiple boards.
Unreferenced nodes are removed from the SPL device tree during a
normal build.
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pcie pinctrl override added in the commit a76aa6ffa6 ("rockchip:
rk3568-rock-3a: Enable PCIe and NVMe support") is causing a pinmux issue
on linux when using a EFI boot flow.
The pcie reset-gpios must however be configured with gpio function, or
the device will freeze running pci enum and nothing is connected.
Adjust the pinctrl override in u-boot.dtsi to fix this issue. PCIe/NVMe
continues to work in both U-Boot and linux after this change.
Also revert disable of sdmmc2 and uart1 to fix use of wifi in linux when
using a EFI boot flow.
Fixes: a76aa6ffa6 ("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support")
Fixes: 073d911ae6 ("rockchip: rk3568-rock-3a: Sync device tree from linux")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
The commit fd6e425be2 ("rockchip: rk3588-rock-5b: Enable boot from SPI
NOR flash") enabled SPI flash support by adding a spi0 alias.
Correct this by adding spi0-spi5 aliases in rk3588s-u-boot.dtsi and
SF_DEFAULT_BUS=5 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled
support for parsing and auto discovery of parameters, SFDP.
Fixes: fd6e425be2 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The commit 64f79f88a7 ("rockchip: rk3568-rock-3a: Enable boot from SPI
NOR flash") enabled SPI flash support by overriding the spi0 alias.
Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and
SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled
support for parsing and auto discovery of parameters, SFDP.
Fixes: 64f79f88a7 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update documentation on how to write a bootable u-boot-rockchip-spi.bin
image into SPI flash. This removes the reference to a hardcoded and now
obsolete 0x60000 payload offset.
Also remove an obsolete reference to pad_cat.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also remove CONFIG_LTO=y now that there is sufficient space for SPL in
SPI flash, and to fix a build issue reported by Peter Robinson.
Fixes: 5713135ecc ("rockchip: rockpro64: Build u-boot-rockchip-spi.bin")
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
BootRom will try to load TPL+SPL from media in the following order:
- SPI NOR Flash
- SPI NAND Flash
- NAND Flash
- eMMC
- SDMMC
SPL will try to load FIT from media in the order defined in the device
tree u-boot,spl-boot-order property.
Change the default order to load FIT from to:
- same media as TPL+SPL
- SDMMC
- eMMC
Boards with strict load order requirements should override the
u-boot,spl-boot-order property in the board specific u-boot.dtsi.
Fixes: 42f67fb51c ("rockchip: rk3568: Fix boot device detection")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph-all prop to common pinctrl nodes for eMMC, FSPI, SD-card and
UART2 that are typically used by multiple boards. Unreferenced nodes are
removed from the SPL device tree during a normal build.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi
CM4 form factor. Therefore, it can slot into the official Raspberry Pi
CM4 IO carrier board. Add this configuration to U-Boot.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz
CM4-compatible compute module. It features PoE, an M.2 slot, an SD card
slot, HDMI, USB, serial and ethernet.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz
CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI,
CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 Quartz64 Model B is a credit-card sized single-board
computer based on the Rockchip RK3566 SoC. The board features an M.2
PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a
40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi.
Features tested on a Quartz64-B 4GB v1.4 2022-06-06:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 Quartz64 Model A is a single-board computer based on the
Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0,
CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a
20 pin GPIO header.
Features tested on a Quartz64-A 8GB v2.0 2021-04-27:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change RK3568 devices to use the newer dwc3-generic driver instead of
the old xhci-dwc3 driver for USB 3.0 support.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3568 share glue and ctrl in a single node. Use glue_get_ctrl_dev to
return the glue node as the ctrl node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Marek Vasut <marex@denx.de>
When dr_mode is peripheral or otg and U-Boot has not been built with
DM_USB_GADGET support, booting such device may end up with:
dwc3_glue_bind_common: subnode name: usb@fcc00000
Error binding driver 'dwc3-generic-wrapper': -6
Some drivers failed to bind
initcall sequence 00000000effbca08 failed at call 0000000000a217c8 (err=-6)
### ERROR ### Please RESET the board ###
Instead fail gracfully with ENODEV to allow board continue booting.
dwc3_glue_bind_common: subnode name: usb@fcc00000
dwc3_glue_bind_common: unsupported dr_mode 3
Also use CONFIG_IS_ENABLED(USB_HOST) and change switch to if statements
to improve readability of the code.
Fixes: 446e3a205b ("dwc3-generic: Handle the PHYs, the clocks and the reset lines")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
The current error check for device_find_first_child is not working as
expected, the documentation for device_find_first_child mention:
@devp: Returns first child device, or NULL if none
Return: 0
Change to return early when there is no child node to avoid any possible
null pointer dereference.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove regulator-boot-on prop from regulators now that the phy core has
support for phy-supply after the commit c57e0dcd93 ("phy: add support
for phy-supply").
This reverts commit 7911f409ff.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit ec107f04b6 ("rockchip: chromebook_minnie: Enable sound") and
commit 2d0c01b8f0 ("sound: rockchip: Add sound support for jerry")
enable audio support for chromebook_minnie and chromebook_jerry. Enable
it for chromebook_speedy as well, but put the non-upstream sound node
in the board -u-boot.dtsi instead.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sound support for chromebook_jerry needs the MAX98090 codec driver. This
was enabled in commit 2d0c01b8f0 ("sound: rockchip: Add sound support
for jerry"), but apparently lost in commit 7ae2729401 ("configs:
Resync with savedefconfig"). Enable it again.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit 815ed79d83 ("video: rockchip: Use TrueType fonts with jerry")
enables makes chromebook_jerry use TrueType fonts. Make other veyron
boards switch to it as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit eba768c545 ("rockchip: jerry: Add serial support") enables
ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work
correctly. Enable it also for other veyron boards.
Also enable logging and disable scrolling multiple lines at once as in
chromebook_jerry, and enable silent console as chromebook_minnie does.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts
fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that.
Deduplicate these into the latter file, which should also make the eMMC
available to the other veyron boards' SPL.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit 9b312e26fc ("rockchip: Enable building a SPI ROM image on
jerry") produces a u-boot.rom file for chromebook_jerry, intended to be
written to SPI flash. Build this file for other veyron boards as well,
especially because they are already configured only to boot from SPI.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit 70e351bdfe ("rockchip: jerry: Enable RESET driver") enables
DM_RESET for chromebook_jerry to fix its display as required by changes
to the Rockchip video drivers. Enable it for other veyron boards as
well.
Fixes: cd529f7ad6 ("rockchip: video: edp: Add missing reset support")
Fixes: 9749d2ea29 ("rockchip: video: vop: Add reset support")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
DEBUG_UART_SKIP_INIT feature is implemented only by s5p (DEBUG_UART_S5P)
and pl01x (DEBUG_UART_PL010 or DEBUG_UART_PL011) serial drivers, but all
ARCH_ROCKCHIP configs rely on default DEBUG_UART_NS16550. The ns16550
serial driver does not depends on DEBUG_UART_SKIP_INIT, so drop it from
rockchip configs.
Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Boot devices defined in rk3308.c and in rk3308.dtsi do not match, causing
'same-as-spl' feature not to work. Update DTS definitions, aligning to
Linux kernel DTS and to other Rockchip DTS files, i.e. from dwmmc to mmc.
Add rk3308-rock-pi-s.dtb in dtb-y targets for CONFIG_ROCKCHIP_RK3308.
Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some ROCK Pi S SKU/models are not equipped with SD-NAND (eMMC),
therefore SPL needs access to sdmmc: add it to rk3308-u-boot.dtsi
with bootph-all property.
Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Call to board_debug_uart_init() is useless, as mainline U-Boot can
not build TPL for rk3308, and proprietary ddr.bin to be used as TPL
is responsible to init debug uart. Moreover current implementation
of board_debug_uart_init() is not compatible with ROCK Pi S, as it
sets pins for UART2 channel 1 breaking access to sdmmc due to pinmux
conflict. Debug uart for ROCK Pi S is UART0.
Thus, avoid ROCKCHIP_RK3308 to select DEBUG_UART_BOARD_INIT and allow
to deselct it in rock-pi-s-rk3308_defconfig. The DEBUG_UART_BOARD_INIT
is already implied by ARCH_ROCKCHIP, therefore other boards based on
rk3308 chip are not affected by change.
Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Definition of function board_debug_uart_init() must be under
CONFIG_DEBUG_UART_BOARD_INIT and not under CONFIG_DEBUG_UART,
as it was: see debug_uart.h. In this way the debug uart can
be used but its board-specific initialization skipped by
configuration, if useless.
Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MMC, SATA, and USB may be using PCI based controllers.
Initialize the PCI sub-system before trying to boot.
Remove the initialization for NVMe that is now redundant.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Loading u-boot.itb from device 0x00, partition 0x0f fails with:
Trying to boot from NVME
Device 0: Vendor: 0x4x Rev: 8.0.50 Prod: nvme-1
Type: Hard Disk
Capacity: 3814.6 MB = 3.7 GB (7812500 x 512)
** Invalid partition 21 **
Couldn't find partition nvme 0:15
Like the command line interface fs_det_blk_dev() expects that the device
number and the partition number are hexadecimal.
Fixes: 8ce6a2e175 ("spl: blk: Support loading images from fs")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
We should target to unify the code for different block devices in SPL to
reduce code size.
MMC, USB, SATA, and Semihosting use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to
indicate the filename to load.
NVMe uses CONFIG_SPL_PAYLOAD in spl_blk_load_image().
CONFIG_SPL_PAYLOAD is meant to define which binary to integrate into
u-boot-with-spl.bin. See commit
7550dbe38b ("spl: Add option SPL_PAYLOAD").
Change spl_blk_load_image() to use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.
Fixes: 8ce6a2e175 ("spl: blk: Support loading images from fs")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Pull request for efi-2023-10-rc2
Documentation:
* Update the documentation for TI K3 boards (use SVG images)
* Update doc/sphinx/requirements.txt
* Describe QEMU emulation of block devices
UEFI
* Fix device paths for special block devices
- Resync some of the K3 DTS files with the kernel, and pull in some
required related updates to keep drivers in sync with the dts files
now. Bring in some incremental fixes on top of one of the series I
applied recently as well as updating the iot2050 platform. Also do a
few small updates to the K2 platforms.
- Enable pcie support for rk3568;
- Add boards:
rk3399: Radxa ROCK 4SE;
rk3328: Orange Pi R1 Plus, Orange Pi R1 Plus LTS
rk3568: FriendlyARM NanoPi R5S/R5C, Hardkernel ODROID-M1
rk3588: Edgeble Neu6B
- support OP-TEE with binman;
- support Winbond SPI flash;
- rk3588 usbdp phy support;
- dts and config updates for different boards;
Move to using .env file for setting up environment variables for K2x_evm.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is more complex than it needs to be and makes converting these
boards over to plain text env files more difficult. Remove setting
mtdparts as the DTS already contain the partitions. While here also
drop the conflicting definitions from the K2 defconfigs.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The following checks are more reasonable as the previous logs were a bit
misleading as we could still get the logs that the authetication is
being skipped but still authenticate. Move the debug prints and checks
to proper locations.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Similar to get_fdt_mmc make get_overlays_mmc look at /boot/dtb/* path
for overlay files.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
All K3 SoCs use same set of args to load kernel for MMC. So move this to
common place to avoid duplication.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
This was regressed by the following commit and is required to build with
additional configs enabled.
Fixes: 14439cd71c ("configs: k3: make consistent bootcmd across all k3 socs")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Fix missing declaration of fdt_del_node_path() while compiling am625_fdt.c and
missing common_fdt.h include in common_fdt.c
Fixes: 70aa5a94d4 ("arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Only accept SPACE to stop autobooting. This is safer to avoid accidental
interruptions on unattended devices.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
ATF is now called BL31, and OP-TEE since 3.21 suggests to use
tee-raw.bin instead of (the still identical) tee-pager_v2.bin.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This avoids having to maintain to defconfigs that are 99% equivalent.
The approach is to use binman to generate two flash images,
flash-pg1.bin and flash-pg2.bin. With the help of a template dtsi, we
can avoid duplicating the common binman image definitions.
Suggested-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The underlying issue was fixed in the meantime. Also signing the U-Boot
proper fit image now works. Just supporting custom cert templates
remains a todo.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The common env bits now come via ti_armv7_common.env, include it.
Furthermore restore the board-specific boot targets and their ordering
that is now enforced k3-wide differently. Finally, enable
CONFIG_LEGACY_IMAGE_FORMAT explicitly which got lost while turning
FIT_SIGNATURE on by default for k3 devices.
Fixes: 53873974 ("include: armv7: Enable distroboot across all configs")
Fixes: 4ae1a247 ("env: Make common bootcmd across all k3 devices")
Fixes: 86fab110 ("Kconfig: Enable FIT_SIGNATURE if ARM64")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Update the am62 and am625 device-trees from linux v6.5-rc1. This needed
the following tweaks to the u-boot specific dtsi as well:
- Switch tick-timer to the main_timer as it's now defined in the main dtsi
- Secure proxies are defined in SoC dtsi
- Drop duplicate nodes - u-boot.dtsi is includes in r5-sk, no need for
either the definitions from main.dtsi OR duplication from u-boot.dtsi
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Maxime Ripard <mripard@kernel.org>
Cc: Francesco Dolcini <francesco@dolcini.it>
Cc: Sjoerd Simons <sjoerd@collabora.com>
Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.
Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host
Device tree is imported from linux v6.4.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Building U-Boot with CMD_INI=y result in following build warning:
cmd/ini.c: In function 'memgets':
include/linux/kernel.h:184:24: warning: comparison of distinct pointer types lacks a cast
184 | (void) (&_min1 == &_min2); \
| ^~
cmd/ini.c:92:15: note: in expansion of macro 'min'
92 | len = min((end - *mem) + newline, num);
| ^~~
Fix this by adding an int cast to the pointer arithmetic result.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The dwc_ahci driver use platform specific defines, place the platform
specific code behind a ifdef CONFIG_ARCH_OMAP2PLUS to allow build and
use of the driver on Rockchip platform.
Fixes: 02a4b42979 ("drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
The standard boot path expects the kernel_comp_addr_r and kernel_comp_size
variables for booting compressed kernel images. Define them using the previous
kernel_addr_c value (likely initially meant for this purpose) and usual size.
This was tested on the PX30 EVB to successfully boot compressed Linux kernel
images.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update config, IO and memory regions used based on [1] with pcie3x2
config reg address and reg size corrected.
Before this change:
PCI Autoconfig: Bus Memory region: [0-3eefffff],
PCI Autoconfig: Bus I/O region: [3ef00000-3effffff],
After this change:
PCI Autoconfig: Bus Memory region: [40000000-7fffffff],
PCI Autoconfig: Bus I/O region: [f0100000-f01fffff],
[1] https://lore.kernel.org/lkml/20221112114125.1637543-2-aholmes@omnom.net/
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing pinctrl and defconfig options to enable PCIe and NVMe
support on Radxa ROCK 3 Model A.
Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1.
The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is
restored to the perstn pin, a workaround to avoid having to define
a new rockchip,pins.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The commit 12df2c182ccb ("regulator: dt-bindings: fixed-regulator: allow
gpios property") in linux v6.3-rc1 added support for use of either a
gpios or gpio prop with a fixed-regulator.
This adds support for the new gpios prop to the fixed-regulator driver.
gpios prop is used by vcc3v3-pcie-regulator on Radxa ROCK 3 Model A.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Root Complex BARs default to claim the full 1 GiB memory region on
RK3568, leaving no space for any attached device.
Fix this by disable the unused BAR 0 and BAR 1 of the RC.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[jonas@kwiboo.se: Move to rk_pcie_configure and use PCI_BASE_ADDRESS_0/1 const]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use a similar pattern and delay values as the linux mainline driver to
speed up failing when nothing is connected.
Reduce fail speed from around 5+ seconds down to around one second on a
Radxa ROCK 3 Model A, where pcie2x1 is probed before pcie3x2 M2 slot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The vpcie3v3 regulator is typically a fixed regulator controlled using
gpio. Change to use enable and disable calls on the regulator instead
of trying to set a voltage value.
Also remove the delay to match linux driver, for a fixed regulator the
startup-delay-us prop can be used in case a startup delay is needed.
Limited testing on ROCK 3A, ROCK 5B, Quartz64, Odroid-M1 has shown that
this delay was not needed.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Get the config region to use from the reg prop. Also update the
referenced region index used in comment.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dev_read_addr_size_index_ptr function with the same functionality as
dev_read_addr_size_index, but instead a return pointer is given.
Use map_sysmem() function as cast for the return.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add board-specific devicetree/config for the RK3399T-based Radxa ROCK 4SE
board. This board offers similar peripherals in a similar form-factor to
the existing ROCK Pi 4B but uses the cost-optimised RK3399T processor
(which has different OPP table than the RK3399) and other minimal hardware
changes.
Kernel tag: next-20230719
Kernel commits:
- 86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
To prepare for ROCK 4 SE support, changes are needed to the common ROCK
Pi 4 devicetree to move the OPP from the common devicetree to individual
board devicetrees. Sync the Rockchip RK3399 ROCK Pi 4-related DTs from
Linux to gain from these changes.
Kernel tag: next-20230719
Kernel commits:
cfa12c32b96f ("arm64: dts: rockchip: correct wifi interrupt flag in Rock \
Pi 4B")
cee572756aa2 ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK Pi 4")
2bd1d2dd808c ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK 4C+")
fd2762a62646 ("arm64: dts: rockchip: Move OPP table from ROCK Pi 4 dtsi")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This updates the evb_rk3229's README on howto create / use the FIT image
created by binman.
Also fix some wrong paths and update filenames which have changed in recent
upstream optee-os versions.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For RK322x series ARM SoCs the OP-TEE is non-optional, as besides the TEE
it also provides the PSCI implementation, which is expected to be available
by upstream linux.
Select CONFIG_SPL_OPTEE_IMAGE if an FIT image is built.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
An OP-TEE FIT image will fail to extract in SPL because the malloc stack
size is currently limited to 0x2000 for evb-rk3229 board.
In SPL we do not have to care about size limitations, since we are no
longer bound to SRAM limits after DRAM initialization has been done in TPL.
Use the default value for CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN in order
successfully unpack the FIT image.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_SPL_OPTEE_IMAGE option is used during DRAM size detection for
Rockchip ARM platform to indicate that an OP-TEE binary was already loaded
and a Trusted Execution Environment (TEE) is available in order to
block/reserve a memory-region for it.
This adds a bunch of new `#if's` to u-boot-rockchip.dtsi to include the
OP-TEE binary in the FIT image for ARM SOCs if CONFIG_SPL_OPTEE_IMAGE is
selected.
That makes it a little harder to read, but I opted for that, because all
the duplicates in an extra ARM-OP-TEE-specfic .dtsi would be the greater
evil, IMHO. Besides it's more likley being "forgotten" to sync when changes
in u-boot-rockchip.dtsi are made.
The no longer required rockchip-optee.dtsi and it's inclusions are dropped.
The hardcoded load address is common across all OP-TEE implemenations for
Rockchip (vendor and upstream).
The OP-TEE-binary is non-optional if CONFIG_SPL_OPTEE_IMAGE is selected and
there will be an error if the file does not exist and/or `TEE=` build
option is missing.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable CONFIG_PCI_INIT_R for rock5b pci enumeration during boot in order
to autodetect the PCI ethernet NIC during the boot process.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Current SYS_MALLOC_F_LEN of 0x2000 (8 KB) used in SPL is too small for
some RK3568 boards. SPL will print following during boot:
alloc space exhausted
Increase the default SYS_MALLOC_F_LEN to 0x20000 (128 KB) to mitigate.
Fixes: 2a950e3ba5 ("rockchip: Add rk3568 architecture core")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip boot blocks are written per 4 x 512 byte sectors per page.
Each page must have a page address (PA) pointer in OOB to the next page.
Pages are written in a pattern depending on the NAND chip ID.
This logic used to build a page pattern table is not fully disclosed and
is not easy to fit in the MTD framework.
The formula in rk_nfc_write_page_hwecc() function is not correct.
Make hwecc and raw behavior identical.
Generate boot block page address and pattern for hwecc in user space
and copy PA data to/from the already reserved last 4 bytes before EEC
in the chip->oob_poi data layout.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Puma supports upstream TF-A and is configured to output serial on UART0
instead of the default UART2. Since U-Boot is properly configured to
output on UART0, let's pass the DT to TF-A so there is no need for a
custom TF-A to make the latter output to UART0 too.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Long are gone the times TF-A couldn't handle the FDT passed by U-Boot.
Specifically, since commit e7b586987c0a ("rockchip: don't crash if we
get an FDT we can't parse") in TF-A, failure to parse the FDT will use
the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two
years ago.
New boards should likely have this option disabled or explicitly enable
it in their respective defconfig.
Because existing boards might depend on a TF-A version that predates
v2.4, let's just enable this option in all RK3399 defconfigs.
Maintainers of each board can decide for themselves if they would prefer
to disable this option and allow U-Boot to pass the DT to TF-A.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.
Add support for this SoM and IO board.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.
General features:
- Rockchip RK3588J
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
- On module WiFi6/BT
Neural Compute Module 6B(Neu6B) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.
General features:
- microSD slot
- 1x HDMI Out
- 1x HDMI In
- 2x DP
- 1x eDP
- 2x MIPI DSI connector
- 4x MIPI CSI2 connector
- 2x USB Host
- 2x USB 3.0 OTG/Host
- 1x SATA
- 1x 2.5Gbps Ethernet
- 1x M.2 B-Key for 4G/5G cards
- 1x M.2 M-Key slot
- 1x Onboard PoE
- 1x RS485, RS232, CAN
- 1x Audio, MIC port
- RTC battery slot
- 40-pin GPIO expansion
Neu6B needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6B(Neu6B) IO platform.
Kernel commits:
commit <5f06c3f508f7> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6
Model B SoM")
commit <3a9181a43b94> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6
Model B IO")
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk3588j-u-boot.dtsi for adding U-Boot specific nodes and
properties for Rockchip RK3588J SoC.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip RK3588J is the industrial-grade version of RK3588 SoC and
is operated with -40 °C to +85 °C temparature.
Add rk3588j specific dtsi for adding rk3588j specific operating points
and other changes to be add in future.
Kernel commit:
commit <8274a04ff1dc> ("arm64: dts: rockchip: Add Rockchip RK3588J")
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.
Specification:
- Rockchip RK3568
- 1/4GB LPDDR4X RAM
- 8/32GB eMMC
- SD card slot
- M.2 Connector
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125)
- HDMI 2.0
- MIPI DSI/CSI
- USB Type C 5V
The device tree is taken from kernel v6.4-rc1.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
FriendlyARM NanoPi R5S is an open-sourced mini IoT gateway device.
Board Specifications
- Rockchip RK3568
- 2 or 4GB LPDDR4X
- 8GB or 16GB eMMC, SD card slot
- GbE LAN (Native)
- 2x 2.5G LAN (PCIe)
- M.2 Connector
- HDMI 2.0, MIPI DSI/CSI
- 2xUSB 3.0 Host
- USB Type C PD, 5V/9V/12V
- GPIO: 12-pin 0.5mm FPC connector
The device tree is taken from kernel v6.4-rc1.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and RAM type
changed from DDR4 to LPDDR3.
The device tree is taken from kernel v6.4-rc1.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.
The device tree and description are taken from kernel v6.3-rc1.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Update the Anbernic RGxx3 documentation to note that panel detection
has been added and how it works.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update the anbernic-rgxx3_defconfig file to support panel autodetection
and automatically updating the compatible string in the devicetree.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support to automatically detect the panel for the Anbernic RGxx3.
This is done by creating a "pseudo driver" that provides only the bare
minimum to start the DSI controller and DSI DPHY. Once started, we then
can query the panel for its panel ID and compare it to a table of known
values. The panel compatible string (which corresponds to the upstream
Linux driver) is then defined as an environment variable "panel". The
panel compatible string is also changed automatically via an
ft_board_setup() call if what is detected differs from what is in the
loaded tree. This way, end users can use the same bootloader without
having to worry about which panel they have (as there is no obvious
way of knowing).
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the RG353PS to the Anbernic RGxx3. This device is a
slightly pared down version of the RG353P with no eMMC, no touchscreen,
and only 1GB of RAM.
Refactor board logic so that all supported devices are defined with
ADC values and that future boards can be added by just defining the
board values in the device array.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the DSI and DSI-DPHY to U-Boot for the RGxx3. These are
needed so we can send a panel ID request to determine which panel is
being used.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pinctrl on the Anbernic RGxx3 for the i2c2 bus does not use the
default value, so explicitly define it.
Fixes: 6cf6fe2537 ("board: rockchip: add Anbernic RGXX3 Series Devices")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the USB3.0 host node, and gadget node.
The gadget is available through the USB type C connector on the board.
The connector is tied to a Fairchild fusb302b device, which currently
does not have a driver in U-boot, but the node is here for correct
description of the board + Linux future compatibility.
It will be easier to move the node as-is when it will be available
in the DT from Linux
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the USB 3.0 devices in rk3588:
- USB DRD(dual role device) 3.0 #0 as usbdrd3_0 which is available in
rk3588s
- USB DRD(dual role device) 3.0 #1 as usbdrd3_1 which is available in
rk3588 only
- USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #0 phy interface
as usbdp_phy0
- USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #1 phy interface
as usbdp_phy1
- USB 2.0 phy #2 , the USB 3.0 device can work with this phy in USB 2.0
mode
- associated GRFs (general register files) for the devices.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[eugen.hristev@collabora.com: move nodes to right place, adapt from latest
linux kernel]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This adds a new USBDP combo PHY with Samsung IP block driver.
The PHY is a combo between USB 3.0 and DisplayPort alt mode.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
[eugen.hristev@collabora.com: ported to 2023.07, clean-up]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update the board.c file for the Odroid Go Advance to support the
Black Edition and the Odroid Go Super. The Odroid Go Advance Black
Edition differs from the original model with the addition of 2
extra buttons and an ESP8266 WiFi module. The Odroid Go Super
adds an additional 2 buttons compared to the Black Edition, along
with a larger panel and larger battery.
This change uses the value of ADC0 to determine which of these
3 models it is, and then changes the ${fdtfile} environment variable
to match the proper devicetree name in mainline Linux.
Tested on an Odroid Go Advance (first revision) and an Odroid Go Super.
The correct ${fdtfile} variable was set for each device.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the rtl8169 driver, which supports the rtl8125b device, which is
connected on the pciE bus on this board.
Enable also CONFIG_SYS_HAS_NONCACHED_MEMORY to have the descriptors stored.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Introduce common variables to define a generic build instruction that is
then used in specific board specific description.
Labels are introduced in the evm.rst files to be then reused in variant
board documentation as well.
While at this, drop using ARCH=arm when building u-boot sources. This
practice has been discouraged for some time and can potentially create
problems with Kconfig rules related to aarch64. It's best to avoid
this approach.
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram instead of the ascii version
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram instead of the ascii version
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram and reuse across the platforms as they
are common.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
We have duplication of sources which makes it hard to sustain across the
board, but at the same time, we'd like to ensure readers get specific
information without having to cross refer to different documentation to
get piecemeal information that they need to put together.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Now that we are using binman in all cases on these platforms, reword
things to be clearer that for filesystem booting we need to use a
specific name for each component.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The EFI doesn't allow removal of handles, unless all hosted protocols
are cleanly removed. Our efi_delete_handle() is a bit intrusive.
Although it does try to delete protocols before removing a handle,
it doesn't care if that fails. Instead it only returns an error if the
handle is invalid. On top of that none of the callers of that function
check the return code.
So let's rewrite this in a way that fits the EFI spec better. Instead
of forcing the handle removal, gracefully uninstall all the handle
protocols. According to the EFI spec when the last protocol is removed
the handle will be deleted. Also switch all the callers and check the
return code. Some callers can't do anything useful apart from reporting
an error. The disk related functions on the other hand, can prevent a
medium that is being used by EFI from removal.
The only function that doesn't check the result is efi_delete_image().
But that function needs a bigger rework anyway, so we can clean it up in
the future
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Add a new page about the emulation of block devices
* Add semihosting to the emulation index page
* Set toc maxdepth to 1 to improve readability
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the recursive dp_fill(dev->parent) call to a single location.
Determine uclass_id only once.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The UEFI specification does not provide node types matching UCLASS_BLKMAP,
UCLASS_HOST, UCLASS_VIRTIO block devices.
The current implementation uses VenHw() nodes with uclass specific GUIDs
and a single byte for the device number appended. This leads to unaligned
integers in succeeding device path nodes.
The current implementation fails to create unique device paths for block
devices based on other uclasses like UCLASS_PVBLOCK.
Let's use a VenHw() node with the U-Boot GUID with a length dividable by
four and encoding blkdesc->uclass_id as well as blkdesc->devnum.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Update the following requirements to their latest version:
* Pygments - syntax highlighting
* pytz - world timezone definitions
* certifi - Mozilla's CA bundle
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Approved DT binding has the port mode register in the
"phys" property. Get it from there instead of the custom
"cpsw-phy-sel" property.
This will allow us to keep DT in sync with Linux.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
The approved DT property for MAC efuse (ROM) address is
"ti,syscon-efuse".
Use that and drop custom property "mac_efuse".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
The binding represents the MDIO controller as a child device tree
node of the MAC device tree node.
The U-Boot driver mostly ignores that child device tree node and just
hardcodes the resources it uses to support both the MAC and MDIO in a
single driver.
However, some resources like pinctrl muxing states are thus ignored.
This has been a problem with some device trees that will put some
pinctrl states on the MDIO device tree node, like the SK-AM62 Device
Tree does.
Let's rework the driver a bit to create a dummy MDIO driver that we will
then get during our initialization to force the core to select the right
muxing.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
The adin phy has extended registers that can be accessed using
adin_ext_read and adin_ext_write. These registers can be read directly
using the mdio command using readext and writext. For example:
=> mdio rx ethernet@428a0000 0xff23
Reading from bus ethernet@428a0000
PHY at address 0:
65315 - 0xe01
Signed-off-by: Nate Drude <nate.d@variscite.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Copy and tweak the required code from the linux kernel.
Only the KSZ9893 has been tested.
Signed-off-by: Karsten Wiese <karsten.wiese@protechna.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The argument len passed to function process_ra is the length of the IPv6
router advertisement message and needs to be between 0 and MTU because
it is assigned to remaining_option_len and used as a loop variable.
Addresses-Coverity-ID: 450971 ("TAINTED_SCALAR")
Signed-off-by: Ehsan Mohandesi <emohandesi@linux.microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
drivers/core/device.c will call `device_free()` after xhci_register
already frees the private device data. This can cause a crash later
during the boot process, observed on aarch64 RPi4b as a synchronous
exception. All callers of xhci_register use priv_auto, so this won't
lead to memory leaks.
Signed-off-by: Richard Habeeb <richard.habeeb@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit was not intended for this tree but rather
u-boot-test-scripts (where it is applied).
This reverts commit f04ef0a7a0.
Signed-off-by: Tom Rini <trini@konsulko.com>
This watchdog driver applies to the following
mcf families:
- mcf52x2 (5271 5275 5282)
- mcf532x (5329 5373)
- mcf523x (5235)
Cpu's not listed for each family does not have WDT module.
Note, after some attempts testing by qemu on 5208 i
finally abandoned, watchdog seems not implemented properly.
The driver has been tested in a real M5282EVM.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- remove unnecessary hardcoded timeouts
- remove unnecessary hw_watchdog_xxx stuff
- rewrite wdog module reg calculation
- using IS_ENABLED() where possible
Changes for v3:
- remove hardcoded 4s test
Add myself as a maintainer for orphaned boards.
All these boards are covered by buildman m68k test.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Add arch/arm/mach-keystone/ into K2 board directory MAINTAINERS file.
Convert current entries into regex match style.
Assign maintainership to myself.
Signed-off-by: Andrew Davis <afd@ti.com>
POSIX does not defined longopts for sort, use shortops
for even more compatibility.
Fixes: cc5a490cf4 ("Makefile: Sort u-boot-initial-env output")
Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Milan P. Stanić <mps@arvanta.net>
In a few cases we have MAINTAINERS entries that are missing obvious
paths or files. Typically this means a board directory that did not list
itself, but in a few cases we have a Kconfig file or similar.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The listed paths are allowed to contain wildcards. This includes the
'+' character which we have as a literal part of the path in a few
cases. Escape the '+' here so that files are matched.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have a number of cases where the in-tree path of files and where
they presumably were when the first version of a patch were posted
differ slightly. Correct these to point at where the files are now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A number of platforms have "common" directories that are in turn not
listed by the board MAINTAINERS file. Add these directories in many
cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The platforms here have been removed, but the common code directory was
forgotten. Clean up.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These platforms have been removed, but the MAINTAINERS file was missed,
clean up.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This file is in alphabetical order, move CAAM up to where it should be.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This defconfig was added without a MAINTAINERS entry, add one.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This defconfig was added without a MAINTAINERS entry, add one.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have a few places where defconfigs were added (or renamed) and not
included in their previously listed MAINTAINERS entry, correct this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are a few entries where minor mistakes mean that we don't match up
with obviously expected files, correct those.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 56670d6fb8 ("disk: part: use common api to lookup part
driver") part_get_info_by_name_type() ignores the part_type parameter
used to restrict the partition table type.
omap_mmc_get_part_size() and part_get_info_by_name() are the only
consumers.
omap_mmc_get_part_size() calls with part_type = PART_TYPE_EFI because at
the time of implementation a speed up could be gained by passing the
partition table type. After 5 years experience without this restriction
it looks safe to keep it that way.
part_get_info_by_name() uses PART_TYPE_ALL.
Move the logic of part_get_info_by_name_type() to part_get_info_by_name()
and replace the function in omap_mmc_get_part_size().
Fixes: 56670d6fb8 ("disk: part: use common api to lookup part driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
His entries had the correct email address listed last rather than first,
correct this.
Fixes: 4fa4227cdd (".mailmap: Record all address for main U-Boot contributor")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@amd.com>
It is not visible anywhere in Trial State if this is the first, second, etc
attempt that's why show a message to be aware about status.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Code rewrites the last char of size with adding &. It is visible from
dfu_alt_info print before this patch:
Make dfu_alt_info: 'mtd nor0=bank0 raw 2320000 80000;bank1 raw 27a0000
8000&mtd nor0=bank0 raw 23a0000 4000000;bank1 raw 2820000 4000000'
And after it:
Make dfu_alt_info: 'mtd nor0=bank0 raw 2320000 80000;bank1 raw 27a0000
80000&mtd nor0=bank0 raw 23a0000 4000000;bank1 raw 2820000 4000000'
Size for bank0 and bank1 must be the same because it is the same image.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Current code after capsule update (mtd write) is not changing active_index
in mdata to previous_active_index.
On the reboot this is shown but showing message
"Boot idx 1 is not matching active idx 0, changing active_idx"
which is changing active_idx and writing mdata to flash.
But when this message is visible it is not checking which state that images
are. If they have acceptance bit setup to yes everything is fine and valid
images are booted (doesn't mean the latest one).
But if acceptance bit is no and images are in trial state in_trial variable
is never setup. Which means that from new flashed image stable image can be
rewritten because in_trial is not setup properly.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
In some designs the MAX313xx RTC may need calibration to cope with
oscillator inaccuracies. Provide read8/write8 ops so that the registers
can be accessed. Because the driver covers a range of MAX313xx variants
no attempt is made to ensure the register is valid.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Commit 62649165cb ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
fixed cache alignment for systems with a D-CACHE.
However it introduced some performance regressions [1] on system
flashing huge images, such as Android.
On AM62x SK EVM, we also observe such performance penalty:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 23.954s]
Writing 'super' OKAY [ 75.926s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.641s]
Writing 'super' OKAY [ 62.849s]
Finished. Total time: 182.474s
The reason for this is that we use an arbitrary small buffer
(info->blksz * 100) for transferring.
Fix it by using a bigger buffer (info->blksz * FASTBOOT_MAX_BLK_WRITE)
as suggested in the original's patch review [2].
With this patch, performance impact is mitigated:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 23.912s]
Writing 'super' OKAY [ 15.780s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.581s]
Writing 'super' OKAY [ 17.192s]
Finished. Total time: 76.569s
[1] https://lore.kernel.org/r/20221118121323.4009193-1-gary.bisson@boundarydevices.com
[2] https://lore.kernel.org/r/all/43e4c17c-4483-ec8e-f843-9b4c5569bd18@seco.com/
Fixes: 62649165cb ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This driver considers that a node with an empty label is the top.
But the led class has changed, if a label is not provided for a led,
the label is filed with the node name. So we update this driver
to use a wrapper to manage the top led node.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Sec proxy data buffer is 60 bytes with the last of the registers
indicating transmission completion. This however poses a bit of a
challenge.
The backing memory for sec_proxy is regular memory, and all sec proxy
does is to trigger a burst of all 60 bytes of data over to the target
thread backing ring accelerator. It doesn't do a memory scrub when
it moves data out in the burst. When we transmit multiple messages,
remnants of previous message is also transmitted which results in
some random data being set in TISCI fields of messages that have been
expanded forward.
The entire concept of backward compatibility hinges on the fact that
the unused message fields remain 0x0 allowing for 0x0 value to be
specially considered when backward compatibility of message extension
is done.
So, instead of just writing the completion register, we continue
to fill the message buffer up with 0x0 (note: for partial message
involving completion, we already do this).
This allows us to scale and introduce ABI changes back also work with
other boot stages that may have left data in the internal memory.
While at this, drop the unused accessor function.
Fixes: f9aa41023b ("mailbox: Introduce K3 Secure Proxy Driver")
Signed-off-by: Nishanth Menon <nm@ti.com>
The default output directory is generally '../' in tests so we end up
trying to create '../.bm-work'. This does not work with azure, so update
these tests to use the temporary directory instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This reverts commit d927d1a808, reversing
changes made to c07ad9520c.
These changes do not pass CI currently.
Signed-off-by: Tom Rini <trini@konsulko.com>
To quote the author:
Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [A].
FF-A specifies interfaces that enable a pair of software execution
environments aka partitions to communicate with each other. A partition
could be a VM in the Normal or Secure world, an application in S-EL0, or
a Trusted OS in S-EL1.
FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.
=> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
...
firmware 0 [ + ] psci |-- psci
ffa 0 [ ] arm_ffa | `-- arm_ffa
...
Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).
This implementation of the specification provides support for Aarch64.
The FF-A driver uses the SMC ABIs defined by the FF-A specification to:
- Discover the presence of secure partitions (SPs) of interest
- Access an SP's service through communication protocols
(e.g: EFI MM communication protocol)
The FF-A support provides the following features:
- Being generic by design and can be used by any Arm 64-bit platform
- FF-A support can be compiled and used without EFI
- Support for SMCCCv1.2 x0-x17 registers
- Support for SMC32 calling convention
- Support for 32-bit and 64-bit FF-A direct messaging
- Support for FF-A MM communication (compatible with EFI boot time)
- Enabling FF-A and MM communication in Corstone1000 platform as a use case
- A Uclass driver providing generic FF-A methods.
- An Arm FF-A device driver providing Arm-specific methods and
reusing the Uclass methods.
- A sandbox emulator for Arm FF-A, emulates the FF-A side of the
Secure World and provides FF-A ABIs inspection methods.
- An FF-A sandbox device driver for FF-A communication with the
emulated Secure World. The driver leverages the FF-A Uclass to
establish FF-A communication.
- Sandbox FF-A test cases.
- A new command called armffa is provided as an example of how to
access the FF-A bus
For more details about the FF-A support please refer to [B] and refer to [C] for
how to use the armffa command.
Please find at [D] an example of the expected boot logs when enabling
FF-A support for a platform. In this example the platform is
Corstone1000. But it can be any Arm 64-bit platform.
[A]: https://developer.arm.com/documentation/den0077/latest/
[B]: doc/arch/arm64.ffa.rst
[C]: doc/usage/cmd/armffa.rst
[D]: example of boot logs when enabling FF-A
Add MM communication support using FF-A transport
This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.
An MM shared buffer and a door bell event are used to exchange
the data.
The data is used by EFI services such as GetVariable()/SetVariable()
and copied from the communication buffer to the MM shared buffer.
The secure partition is notified about availability of data in the
MM shared buffer by an FF-A message (door bell).
On such event, MM SP can read the data and updates the MM shared
buffer with the response data.
The response data is copied back to the communication buffer and
consumed by the EFI subsystem.
MM communication protocol supports FF-A 64-bit direct messaging.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Tested-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support
Features of the sandbox FF-A support:
- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs
The sandbox FF-A emulator supports only 64-bit direct messaging.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide armffa command showcasing the use of the U-Boot FF-A support
armffa is a command showcasing how to invoke FF-A operations.
This provides a guidance to the client developers on how to
call the FF-A bus interfaces. The command also allows to gather secure
partitions information and ping these partitions. The command is also
helpful in testing the communication with secure partitions.
For more details please refer to the command documentation [1].
[1]: doc/usage/cmd/armffa.rst
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0
The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.
This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.
The driver uses SMC32 calling convention which means using the first
32-bit data of the Xn registers.
All supported ABIs come with their 32-bit version except FFA_RXTX_MAP
which has 64-bit version supported.
Both 32-bit and 64-bit direct messaging are supported which allows both
32-bit and 64-bit clients to use the FF-A bus.
FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.
Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).
The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.
The driver exports its operations to be used by upper layers.
Exported operations:
- ffa_partition_info_get
- ffa_sync_send_receive
- ffa_rxtx_unmap
Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c).
Arm specific methods are implemented in the Arm driver (arm-ffa.c).
For more details please refer to the driver documentation [2].
[1]: https://developer.arm.com/documentation/den0077/latest/
[2]: doc/arch/arm64.ffa.rst
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Actually merge the assorted K3 platform improvements that were
supposed to be in commit 247aa5a191 ("Merge branch
'2023-07-21-assorted-TI-platform-updates'")
In poking around it seems that many boards don't define a CONFIG_TARGET
Kconfig variable. This is not strictly necessary, but add an option to
buildman so these can be viewed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change -D to mean --debug for consistency with other tools. This is not a
commonly used option, so the impact should be minimal.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is probably a little more efficient and it allows passing the object
to another function to write data. Convert config_out to use a string I/O
device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move more of the argument-building code into this function. Fix a missing
assignment for out_rel_dir too.
Rename the function since it now builds all the arguments.
Signed-off-by: Simon Glass <sjg@chromium.org>
This variable has a different meaning in the outer scope. Use a different
name to avoid confusion, or bugs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple functional test for the --boards option. Fix the example in
the docs while we are here. Also improve the docs for Builder.count so it
is clearer what it contains.
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid an unnecessary local variable by moving this code to a function.
This fixes the pylint warning about too many local variables.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not needed until the builder is run. Move it there to reduce the
size of the do_buildman() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move setting of show_bloat to adjust_options() and adjust how the commits
variable is set. Together these remove the pylint warning about too many
statements.
Signed-off-by: Simon Glass <sjg@chromium.org>
Do these all in the constructor, so it is consistent.
Move the stray builder comment into the correct place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Commits are numbered for use in tests. Do this in determine_series() since
it is already dealing with the series.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a separate function to adjust options. Also move show_actions() up
as far as we can in the function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the code for dealing with toolchains out into its own function, to
reduce the size of the main function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the code which obtains a Boards object into its own function, to
reduce the size of the main function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function only needs the output directory from the builder. This is
passed into the builder, so just pass the same value to show_actions().
The avoids needing a builder to call show_actions().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reduce the size of the do_buildman() function a little by moving the code
that handles --fetch-arch into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reduce the size of the do_buildman() function a little by moving the code
that figures out the series into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not need any of the control features. Move it out of main to
reduce the size of the do_buildman() function.
For Python 3.6 the -H feature will not work, but this does not seem to be
a huge problem, as it dates from 2016.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than using the -R option to get this report as a side effect, add
a dedicated option for it.
Disable CI for now as there are some missing maintainers, unfortunately.
Signed-off-by: Simon Glass <sjg@chromium.org>
An orphaned board should produce a warning, as should a missing name for
the maintainer (when '-' is provided). Add these cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sort the warnings into alphabetical order, for easier reading. Also make
sure that the buildman test files are ignored.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we get multiple lines of output when a board has no MAINTAINERS
entry:
WARNING: no status info for 'bananapi-m2-pro'
WARNING: no maintainers for 'bananapi-m2-pro'
Suppress the 'status' one since it is implied by the other.
Signed-off-by: Simon Glass <sjg@chromium.org>
This doesn't work as intended. Instead it scans every defconfig file
in the source tree.
Fix it and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
We generally expected exactly one of these. Add a check for it.
Note: This warning is not displayed by default. An option will be added
to enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The TARGET_xxx options are special in that they refer to a single target.
Exactly one should be enabled for each target, corresponding to a
defconfig file.
Detect configs which result in two TARGET_xxx options being set. For
example, at present, TARGET_POLEG and TARET_POLEG_EVB are enabled for the
same board.
Note: This warning is not displayed by default. An option will be added
to enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the assert to the top of the function and provide an explicit
variables for the target name and base name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Other than the top-level MAINTAINERS file, all maintainer entries should
actually reference a target. Add a warning to detect those that do not.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a new function which has the non-UI parts of ensure_board_list().
Add some tests for everything except the N: tag.
While we are here, fix the confusing usage of fname inside a loops that
also uses fname.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test for this code. It requires some defconfig files and a test
Kconfig to work with, so copy these into the temporary directory at the
start.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than using the global thoughout each function, pass in these
values. This allows tests to use different values when testing the same
functions.
Improve a few comments while we are here.
No functional change is intended.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not needed anymore, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 252ed872 ("kconfig: remove meaningless prefixes in defconfig files")
The -D option is used, but plumb it through --debug to enable a full
traceback when something goes wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add test for u_boot_spl_pubkey_dtb. The test adds a public key to the
dtb and checks if the required nodes will be added to the images dtb.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new etype 'u-boot-spl-pubkey-dtb'. The etype adds the public
key from a certificate to the dtb. This creates a '/signature' node which
is turn contains the fields which make up the public key. Usually this
is done by 'mkimage -K'. However, 'binman sign' does not add the public
key to the SPL. This is why the pubkey is added using this etype.
The etype calls the underlying 'fdt_add_pubkey' tool.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The method 'connect_contents_to_file()' calls ObtainsContents() with
'fake_size' argument. Without providing the argument in the blob_dtb
we are not able to call this method without error.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
While signing a fit compressed data (i.e. 'blob-ext') is decompressed,
but never compressed again. When compressed data was wrapped in a
section, decompression leads to an error because the outer section had
the original compressed size but the inner entry has the
uncompressed size now.
While singing there is no reason to decompress data. Thus, decompression
should be disabled.
Furthermore, bintools should be collected before loading the data. This
way bintools are available if processing is required on a node.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The new encrypted etype generates a cipher node in the device tree
that should not be evaluated by binman, but still be kept in the
output device tree.
Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new etype encrypted.
It creates a new cipher node in the related image similar to the
cipher node used by u-boot, see boot/image-cipher.c.
Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop the use of a numbered key file since numbering is just for the test
devicetree files. Also adjust the tests to avoid putting a hard-coded
path to binman in the file, using the entry arg instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
First set of u-boot-atmel fixes for the 2023.07 cycle:
This small fixes set includes the LTO configs for the boards that had
the SPL size up to the limit (sama5d2-based), such that more code can be
added. It also includes a fix for mmc non-removable.
If the device attached to the MMC bus is not removable, set force card-detect
bit to bypass card detection procedure, so card detection pin can be used for
other purposes.
It's also a workaround for SAMA5D2 who doesn't drive CMD if using GPIO for card
detection.
Signed-off-by: Zixun LI <zli@ogga.fr>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
arm-none-linux-gnueabihf-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram'
arm-none-linux-gnueabihf-ld.bfd: region `.sram' overflowed by 100 bytes
SPL is at limit so to stop seeing above error in built, enable
link time optimizations CONFIG_LTO.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
Adding just a tiny bit more code for sama5d2_icp_mmc leads to a SRAM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Tested-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: restrict patch just to CONFIG_LTO]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set.
Define the cache line size for QEMU on RISC-V to be 64 bytes.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Adds a trailing space to SYS_PROMPT to make it easier to distinguish
between commands and the prompt.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Harts need to use per-hart stack before any function call, even if that
function is a simple one. When the callee uses stack for register save/
restore, especially RA, if nested call, concurrent access by multiple
harts on the same stack will cause data-race.
This patch sets up SP before `board_init_f_alloc_reserve`. A side effect
of this is that the memory layout has changed as the following:
+----------------+ +----------------+ <----- SPL_STACK/
| ...... | | hart 0 stack | SYS_INIT_SP_ADDR
| malloc_base | +----------------+
+----------------+ | hart 1 stack |
| GD | +----------------+ If not SMP, N=1
+----------------+ | ...... |
| hart 0 stack | +----------------+
+----------------+ ==> | hart N-1 stack|
| hart 1 stack | +----------------+
+----------------+ | ...... |
| ...... | | malloc_base |
+----------------+ +----------------+
| hart N-1 stack| | GD |
+----------------+ +----------------+
| | | |
Signed-off-by: Bo Gan <ganboing@gmail.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Leo <ycliang@andestech.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Do not limit the maximum size of the buffer that is used to decompress
the OS image in to, this causes issue while inflating the image, if image
size is greater than the buffer.
Remove CONFIG_SYS_BOOTM_LEN
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Enabling FIT_SIGNATURE required the old authentication method to be
disabled so disable this for K3 SOCs and enable FIT_SIGNATURE for K3
Platforms.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
[ cleanup the patch ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
We are using our custMpk for signing that is a 4096 bit key, 4096 bit
rsa key requires a SHA512 hashing algorithm to be enabled as per the
source. Even though it is not mandated but this is how it works and is
tested.
Enables SHA512 if fit signature is enabled on K3 platforms.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
FIT signature requires the updates to u-boot.dtb and the DTB that we
pack don't get updates with the changes of the signature node.
Pack u-boot.dtb as the default DTB so that the signature node changes
can be reflected in them.
(Note, this is only packaging the primary platform and the secondary
platform will require manual changes for the FIT signature enablement)
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[ add additional boards that were missing ]
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fit signature mechanism through the standards require the presence of
.key and .crt in the folder with the same name, since we are using our
custMpk only for the signing, update the format to that of standards to
be compatible for packaging easily.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Default to common bootcmd that is set across all k3 devices.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Since K3 devices are moving towards distroboot, remove duplicates and
add it in common file to import from.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[trini: Add am65x_evm to this patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
The 'gsub' setexpr sub command is using when creating the FIT image
configuration string on K3 devices. Enable this for K3.
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
This is used when building the FIT image configuration string. Enable
it for all FIT using TI platforms.
Signed-off-by: Andrew Davis <afd@ti.com>
[ extend to other k3 boards ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Since get_fdt_mmc is common, factor it out into mmc.env and remove
it from each platform env file along with changing the directory path to
reflect the standards. Use it in mmcloados but keep loadfdt
defined in case it is still used by some external uEnv.txt script.
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
In Linux the ARM64 DTSs are stored in vendor directories to help organize
the files and prevent naming collisions. The deployed DTBs will mirror
this and so the vendor prefix should be added to the variable used to
locate these files.
Suggested-by: Ryan Eatmon <reatmon@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Having saved environments usually causes inconsistencies while in
development workflow. The saved environments conflict with the
default ones that U-boot should be updating during development
but that doesn't happen and the saved environments need to be
reset during bootups to test the changes causing extra debugs.
Remove the saved environments as a default. Environments can always
be re-enabled locally if one does like them or needs them for
some production environment. Optionally, Uenv.txt can also be used on
some of the boot media.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
The background firewall calculations were wrong, fix that to determine
both the background and foreground correctly.
Fixes: 8bfce2f998 ("arm: mach-k3: common: reorder removal of firewalls")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Set fdtfile env variable similar to other k3 socs.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Fix the regression that occurred during the alignment of binman series
merges along with these HS fixes that caused silent regression in this.
Fixes: 30a7ee87fd ("Kconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Fix regression occurred during refactoring for the mentioned commit.
Fixes: bd6a247593 ("arm: mach-k3: security: separate out validating binary logic")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Now that buildman has a requirements.txt file we need to make use of it.
Reviewed-by: Simon Glass <sjg@chromium.org>
[n-francis@ti.com: Adding missing command from .azure-pipelines.yml]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point, buildman requires a few different modules and so we need
a requirements.txt to track what modules are needed.
Cc: Simon Glass <sjg@chromium.org>
Cc: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Without this re-building will fail with an error when trying to create
the symlink for the second time with an already exists error.
Signed-off-by: Andrew Davis <afd@ti.com>
[n-francis@ti.com: Added support for test output dir and testcase]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Since binman is used to package bootloader images for all K3 devices, we
do not have to rely on the earlier methods to package them.
Scripts that were used to generate x509 certificate for tiboot3.bin and
generate tispl.bin, u-boot.img have been removed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Move to using binman to generate tispl.bin which is used to generate the
final flash.bin bootloader for iot2050 boards.
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it with the help of TI signing
entry and generate the final tiboot3.bin.
Entries for A72 build have been added to k3-j721e-binman.dtsi to
generate tispl.bin and u-boot.img.
Support has been added for both HS-SE(SR 1.1), HS-FS(SR 2.0) and GP images
In HS-SE, the encrypted system firmware binary must be signed along with
the signed certificate binary.
HS-SE:
* tiboot3-j721e_sr1_1-hs-evm.bin
* sysfw-j721e_sr1_1-hs-evm.itb
* tispl.bin
* u-boot.img
HS-FS:
* tiboot3-j721e_sr2-hs-fs-evm.bin
* sysfw-j721e_sr2-hs-fs-evm.itb
* tispl.bin
* u-boot.img
GP:
* tiboot3.bin -->tiboot3-j721e-gp-evm.bin
* sysfw.itb --> sysfw-j721e-gp-evm.itb
* tispl.bin_unsigned
* u-boot.img_unsigned
It is to be noted that the bootflow followed by J721E requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OP-TEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.
Board config files must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML configs for J721E in particular.
Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Board config binary artifacts must be generated to be used by binman to
package sysfw.itb and tiboot3.bin for all K3 devices.
For devices that follow combined flow, these board configuration
binaries must again be packaged into a combined board configuration
blobs to be used by binman to package tiboot3.bin.
Add common k3-binman.dtsi to generate all the board configuration
binaries needed.
Also add custMpk.pem and ti-degenerate-key.pem needed for signing GP and
HS bootloader images common to all K3 devices.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
The ti-secure entry contains certificate for binaries that will be
loaded or booted by system firmware whereas the ti-secure-rom entry
contains certificate for binaries that will be booted by ROM. Support
for both these types of certificates is necessary for booting of K3
devices.
Reviewed-by: Simon Glass <sjg@chromium.org>
[vigneshr@ti.com: fixed inconsist cert generation by multiple packing]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
The ti-board-config entry loads and validates a given YAML config file
against a given schema, and generates the board config binary. K3
devices require these binaries to be packed into the final system
firmware images.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Using `default y` will not select BMP when CMD_BMP has been enabled, if
it was already configured.
By using `select`, if `CMD_BMP` is turned on, it will force the presence
of `BMP`.
Fixes: 072b0e16c4 ("common: Kconfig: Add BMP configs")
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
To understand usage of DDR in A53 SPL stage, add a table showing region
and space used by major components of SPL.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Use config SPL_VIDEO_REMOVE to remove video driver at SPL stage before
jumping to next stage, in place of CONFIG_SPL_VIDEO, to allow user to
remove video if required.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is required since user may want to either call the remove method
of video driver and reset the display or not call the remove method
to continue displaying until next stage.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
U-boot proper can use frame buffer address passed from SPL to reserve
the memory area used by framebuffer set in SPL so that splash image
set in SPL continues to get displayed while u-boot proper is running.
Put the framebuffer address and size in a bloblist to make them
available at u-boot proper, if in u-boot proper CONFIG_VIDEO is defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add method to reserve video framebuffer information using blob,
received from previous stage.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use spl_dcache_enable, in place of setup_dram, arch_reserve_mmu to set
up pagetable, initialise DRAM and enable Dcache to avoid multiple
function calls.
Check for CONFIG_SPL_VIDEO in place of CONFIG_SPL_VIDEO_TIDSS to prevent
any build failure in case video config is not defined and video related
functions are called.
Check for CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_BMP before calling
splash_display to avoid compilation failure.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
In spl_dcache_enable after setting up page table, set gd->relocaddr
pointer to tlb_addr, to get next location to reserve memory. Align
tlb_addr with 64KB address.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
At SPL stage when stack is relocated, the stack pointer needs to be
updated, the stack pointer may point to stack in on chip memory even
though stack is relocated.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is little need to print the devstat information or when we exit a
function during a typical boot. Remove them to reduce the noise during
typical operation
Signed-off-by: Bryan Brattlof <bb@ti.com>
During LPDDR initialization we will loop through a series of frequency
changes in order to train at the various operating frequencies. During
this training, accessing the DRAM_CLASS bitfield could happen during a
frequency change and cause the read to hang.
Store the DRAM type into the main structure to avoid multiple readings
while the independent phy is training.
Signed-off-by: Bryan Brattlof <bb@ti.com>
The function declaration for force_emif_self_refresh takes no parameters
but does not specify this, only the prototype in the headers do. As
clang will warn about this, correct it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Non-HS boards can use FIT images so include the env var commands
for these unconditionally.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
AM62x SoC is available in multiple variant:
- CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores)
- GPU AM625x with GPU, AM623x without GPU
- PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4
Remove the relevant FDT nodes by reading the actual configuration
from the SoC registers, with that change is possible to have a single
dts/dtb file handling the different variant at runtime.
While removing GPU node and CPU nodes also the watchdog node
in the same Module Domain is removed.
A similar approach is implemented for example on i.MX8 and STM32MP1 SoC.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add register address and relevant bitmasks and shifts.
Allow reading these information:
- device identification
- number of cores (part of device identification)
- features (currently: PRU / no PRU)
- security
- functional safety
- speed grade
- temperature grade
- package
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Andrew Davis <afd@ti.com>
ft_system_setup cannot be enabled on SoC without msmc sram otherwise
fdt_fixup_msmc_ram function fails causing system reset.
Fix by moving fdt_fixup_msmc_ram to common_fdt.c file and creating
SoC (AM654, J721E and J721S2) specific files for fdt fixups.
This change was verified to not change anything on any existing board
(all the J721S2, AM654 and J721E boards requires it,
none of the remaining k3 boards require it).
Fixes: 30e96a2401 ("arm: mach-k3: Move MSMC fixup to SoC level")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
On security enforced (HS-SE) devices ROM firewalls OSPI data region3 that
is present in above 64bit region. Open this up in bootloader to allow
Linux to access OSPI flashes in mmap mode.
Without this kernel will crash when accessing this region due to
firewall violations on HS-SE devices.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
During compilation splash_source puts out below warning for type
conversion in splash_load_fit for bmp_load_addr and fit_header.
Change their type to uintptr_t to fix the warnings.
common/splash_source.c: In function ‘splash_load_fit’:
common/splash_source.c:366:22: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
366 | img_header = (struct legacy_img_hdr *)bmp_load_addr;
| ^
common/splash_source.c:376:49: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
376 | res = splash_storage_read_raw(location, (u32)fit_header, fit_size);
| ^
common/splash_source.c:401:25: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
401 | memmove((void *)bmp_load_addr, internal_splash_data, internal_splash_size);
The above warnings are generated if CONFIG_FIT is enabled.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
At the time of compilation evm.c gives below warning for implicit
declaration of enable_caches, to mitigate this include cpu_func.h.
board/ti/am62x/evm.c: In function ‘spl_board_init’:
board/ti/am62x/evm.c:90:9: warning: implicit declaration of function ‘enable_caches’ [-Wimplicit-function-declaration]
90 | enable_caches();
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
For once this adds USB support for two SoCs: the H616 and the F1C100s
series. The rest is support for LPDDR3 DRAM chips on H616 boards.
Gitlab CI passed, and I booted that briefly on an H616 and an F1C200s
board. I don't have an H616 board with LPDDR3 DRAM, but reportedly that
works for Mikhail, and doesn't regress on my DDR3 boards.
Xilinx changes for v2023.10-rc1 v2
axi_emac:
- Change return value if RX packet is not ready
cadence_qspi:
- Enable flash reset for Versal NET
dt:
- Various DT syncups with Linux kernel
- SOM - reserved pmufw memory location
fpga:
- Add load event
mtd:
- Add missing dependency for FLASH_CFI_MTD
spi/nand:
- Minor cleanup in Xilinx drivers
versal-net:
- Prioritize boot device in boot_targets
- Wire mini ospi/qspi/emmc configurations
watchdog:
- Use new versal-wwdt property
xilinx:
- fix sparse warnings in various places ps7_init*
- add missing headers
- consolidate code around zynqmp_mmio_read/write
- switch to amd.com email
zynqmp_clk:
- Add handling for gem rx/tsu clocks
zynq_gem:
- Configure mdio clock at run time
zynq:
- Enable fdt overlay support
zynq_sdhci:
- Call dll reset only for ZynqMP SOCs
If there is no incoming package than axiemac_recv will return -1 which
in turn leads to printing `eth_rx: recv() returned error -1` error
message in eth_rx function. But missing a package is not an fatal error,
so return -EAGAIN in that case would be more suitable.
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Link: https://lore.kernel.org/r/20230719065337.69280-1-bigunclemax@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The commit a4180c3696 ("arm64: zynqmp: Add mode-pin GPIO controller DT
node") added usb phy reset over bootmode pins by default on usb0 only.
zcu100 is using usb0 as peripheral and usb1 as host. Unfortunately reset
line is shared for both usb ulpi phys but usb_rst_b is connected to usb5744
hub which is used only in host mode. Especially this chip requires reset to
operate properly that's why better assign gpio reset to usb1 instead of
usb0.
Without this change usb start crashed when runs.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1ca80ec5bf7a595c03822f3e4e3683298205067a.1688992653.git.michal.simek@amd.com
Increase reset assert time for TI SGMII PHY on KR260 CC starting
6.1 kernel. This PHY does not come out of reset with the existing
100us pulse width as per testing on multiple carrier cards. The reset
is driven via a PCA9570 I2C expander. The expander driver was updated
to an upstream version in 6.1 where gpio_chip _set was optimized.
Delays in earlier kernels may have masked this issue. This is a safe
workaround value for assert pulse width before the discussions are
resolved with TI.
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8fb9f17d43a43ef504c9f29006cd686cce8ac98b.1688992653.git.michal.simek@amd.com
Enable flash reset functionality for Versal NET platform.
In cadence_qspi.c there is weak function defined for reset, hence remove
the check for config, so that it will work for Versal and Versal NET
platforms.
Add register defines in Versal NET hardware.h for mini U-Boot flash
reset.
Add read_delay initialization for Versal NET also.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614120452.21019-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Currently xspi0 is used for all spi boot modes, it means it will use "sf
probe 0 0 0" for all spi's irrespective of which node it is wired.
Get boot sequence from dev_seq() and update boot command for xspi
dynamically.
As a result bootcmd for spi is updated as below when two instances of spi
are present in DT node.
bootcmd_xspi0=devnum_xspi=0; run xspi_boot
bootcmd_xspi1=devnum_xspi=1; run xspi_boot
xspi_boot=sf probe $devnum_xspi:0 0 0 && sf read $scriptaddr
$script_offset_f $script_size_f && echo XSPI: Trying to boot script at
${scriptaddr} && source ${scriptaddr}; echo XSPI: SCRIPT FAILED:
continuing...;
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614093058.30438-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
When one of the functions does not support super speed, the composite
driver forces the gadget to high speed. But the speed is never
configured in the cdns3 gadget driver. So configure the speed
in cdns3_gadget_udc_start just like in the kernel.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Remove the regulator_set_enable() call from device probe which
resolves a regulator imbalance. This is unnecessary as
regulator_set_enable() will be called when ehci_register calls the
init_after_reset hook.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The H616 SoC has support for several types of DRAM: DDR3, LPDDR3,
DDR4 and LPDDR4.
At the moment, the driver only supports DDR3 memory.
Let's extend the driver to support the LPDDR3 memory. All "magic"
values obtained from the boot0.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Allwinner H616 SoC supports several types of DRAM memory. To further
integrate other types of memory, we need to add this delimitation.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently there is one DRAM parameter struct for the Allwinner H616 DRAM
"driver". It contains many fields that are compile time constants
(set by Kconfig variables), though there are also some fields that are
probed and changed over the runtime of the DRAM initialisation.
Because of this mixture, the compiler cannot properly optimise the code
for size, as it does not consider constant propagation in its full
potential.
Help the compiler out by splitting that structure into two: one that only
contains values known at compile time, and another one where the values
will actually change. The former can then be declared "const", which will
let the compiler fold its values directly into the code using it.
We also add "const" tags for some new "struct dram_config" pointers, to
further increase code optimisation.
To help the compiler optimise the code further, the definition of the
now "const struct dram_para" has to happen at a file-global level, so
move that part out of sunxi_dram_init().
That results in quite some code savings (almost 2KB), and helps to keep
the code small with the LPDDR3 support added later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
There are quite some functions in the Allwinner H616 DRAM "driver", some
of them actually change the parameters in the structure passed to them,
but many are actually not.
To increase the optimisation potential for the code, mark those functions
that just read members of the passed dram_para struct as "const".
This in itself does not decrease the code size, but lays the groundwork
for future changes doing so.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The usage of the C keyword "inline" seems to be a common
misunderstanding: it's a *hint* only, and modern compilers will inline
(or not) functions based on their own judgement and provided compiler
options.
So while marking functions as "inline" does not do much, missing the
"static" keyword will force to compiler to spell out a version of the
function for potential external callers, which actually increases the
code size (though hopefully the linker will drop the function).
Change the "inline" attribute for the mbus_configure_port() functions in
some Allwinner DRAM drivers to "static", so that the explicit version
can actually be dropped from the object file, reducing the code size.
"static inline" has a use case in header files, where it avoids a warning
if a .c file including this header does not use the particular function.
In a .c file itself "static inline" is not useful otherwise, so just use
static here as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that the PHY driver supports the H616 USB PHY, we can enable USB
support for the two H616 boards.
As the OrangePi Zero2 has a USB-C port hard-wired to peripheral mode,
let's enable USB gadget mode for port 0, so people can use fastboot,
ethernet or mass storage functionality.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that the Allwinner USB PHY driver supports the H616 quirk, let's
enable support for USB ports on that SoC.
We connect the compatible string to a new struct describing the SoCs USB
PHY properties, and unblock the PHY driver selection in Kconfig.
A later patch will enable USB support in the H616 boards' defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The H616 USB PHY is some kind of special snowflake: Only port2 works out
of the box, but all other ports need some help from this port2 to work
correctly: The CLK_BUS_PHY2 and RST_USB_PHY2 clock and reset need to be
enabled, and the SIDDQ bit in the PMU PHY control register needs to be
cleared. For this register to be accessible, CLK_BUS_ECHI2 needs to be
ungated. Don't ask ....
Follow the respective Linux patch (b45c6d80325b) and add a quirk bit,
triggering the special sequence as outlined above, for PHYs other than
PHY2: ungate this one special clock, and clear the SIDDQ bit. We also
pick the clock and reset from PHY2 and enable them as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
So far we were assigning some crude "type" (SoC name, really) to each
Allwinner USB PHY model, then guarding certain quirks based on this.
This does not only look weird, but gets more or more cumbersome to
maintain.
Remove the bogus type names altogether, instead introduce flags for each
quirk, and explicitly check for them.
This improves readability, and simplifies future extensions.
Port of Linux patch 8dd256bae653.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
At the moment we use "select" in each Allwinner SoC's Kconfig section to
include the USB PHY driver in the build. This means it cannot be disabled
via Kconfig, although USB is not really a strictly required core
functionality, and a particular board might not even include USB ports.
Rework the Kconfig part by removing the "select" lines for each SoC's
section, and instead letting it default to "y" in the PHY driver section
itself. We use "depends on !" to exclude the few SoCs we don't support
(yet). The Allwinner V3s does not enable USB (PHY) support at the moment,
even though it should work: let the PHY default to "n" to keep the
current behaviour.
Also the MUSB USB driver directly calls some functions from the PHY
driver, so let the former depend on the PHY driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
The Allwinner F1C100s implements a single USB PHY, connected to its MUSB
OTG controller. The USB PHY is of the simpler, older type (like the A10),
the only real difference is that it's indeed only one PHY.
Add a struct describing those F1C100s USB PHY properties, and connect it
to the new compatible string.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
In its of_xlate() function, the Allwinner USB PHY driver compares the
args_count variable against the number of implemented USB PHYs, although
this is the *number of arguments* to the DT phandle property. Per the DT
binding for this PHY device, this number is always one, so this check
will always fail if the particular SoC implements exactly one USB PHY.
So far this affected only the V3s (which has USB support disabled), but
the F1C100s also sports one PHY only.
Fix that check to compare args_count against exactly 1, and the args[0]
content (requested PHY number) against the number of implemented PHYs.
This fixes USB operation on the Allwinner V3s and allows to enable USB
on the Allwinner F1C100s SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Add support for writing symbols and determining the assumed position of
binaries inside a mkimage image. This is useful as an example for other
entry types which might want to do the same thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Collections can used to collect the contents of other entries into a
single entry, but they result in a single entry, with the original entries
'left behind' in their old place.
It is useful to be able to specific a set of entries ones and have it used
in multiple images, or parts of an image.
Implement this mechanism.
Signed-off-by: Simon Glass <sjg@chromium.org>
This permits implementation of a simple templating system, where a node
can be reused as a base for others.
For now this adds new subnodes after any existing ones.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix the check for the __bss_size symbol, since it may be 0. Unfortunately
there was no test coverage for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not needed since the linker script sets it up. Drop the variable
to avoid confusion.
Fix the prototype for main() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes multiple boards are built with binman and it is useful to
specify a different FDT list for each. At present this is not possible
without providing multiple values of the of-list entryarg (which is not
supported in the U-Boot build system).
Allow a fit,fdt-list-val string-list property to be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed to handle mkimage with inner section located itself in a
section.
Signed-off-by: Marek Vasut <marex@denx.de>
Use BuildSectionData() instead of ObtainContents(), add tests and a few
other minor fixes:
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the LookupAndWriteSymbols() function to return the number of
symbols written. Also add some logging for when debugging is not
enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
These boards use SPL in a mkimage entry and apparently access the symbol
containing the image position of U-Boot, but put U-Boot in another
image. This means that binman is unable to fill in the symbol correctly
in the SPL binary.
This doesn't matter at present since mkimage doesn't support symbol
writing. But with the upcoming conversion to a section, it will. So add
a property to disable symbol writing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boards don't use symbol writing but do access the symbols in SPL.
Provide an option to work around this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some section types don't have a simple _entries list. Use the GetEntries()
method in GetEntryContents() and other places to handle this.
This makes the behaviour more consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
This should be set up in the init function, to avoid a warning about a
property not set up there. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When building from source, setuptools would complain about not finding
package via its auto-discovery mechanism. Manually specify how to
locate the files, relative to the package's directory.
* tools/u_boot_pylib/pyproject.toml: New tool.setuptools.packages.find
section.
Signed-off-by: Maxim Cournoyer <maxim.cournoyer@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change the device type from "usb_mass_storage" to "usb" when
booting a script.
Before this change:
=> printenv devtype
devtype=usb_mass_storage
After this change:
=> printenv devtype
devtype=usb
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The loads and saves commands crash on the sandbox due to illegal memory
access.
For command line arguments the sandbox uses a virtual address space which
does not equal the addresses of the memory allocated with memmap(). Add the
missing address translations for the loads and saves commands.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With sandbox and sandbox64 configurations:
In file included from .../u-boot/include/test/test.h:156,
from .../u-boot/include/test/lib.h:9,
from .../u-boot/test/lib/test_crc8.c:8:
.../u-boot/arch/sandbox/include/asm/test.h: In function ‘sandbox_sdl_set_bpp’:
.../u-boot/arch/sandbox/include/asm/test.h:323:17: error: ‘ENOSYS’ undeclared (first use in this function)
323 | return -ENOSYS;
| ^~~~~~
Per Tom Rini's suggestion:
move that function prototype over to arch/sandbox/include/asm/sdl.h
and make test/dm/video.c include <asm/sdl.h>
Cc: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The behaviour of dev_read_addr_size() is surprising as it does not
handle #address-cells and #size-cells but instead hardcodes the values
based on sizeof(fdt_addr_t).
This is different from dev_read_addr_size_index() and
dev_read_addr_size_name() both of which do read the cell sizes from the
device tree.
Since dev_read_addr_size() is only used by a single driver and this
driver is broken when CONFIG_FDT_64BIT does not match the address size
in the device tree, fix the function to behave like all of the other
similarly named functions. Drop the property name argument as the only
caller passes "reg" and this is the expected property name matching the
other similarly named functions.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_bob
of_property_match_string calls of_find_property to search for the
string property.
If the device node does not exist, of_find_property returns NULL, and
of_property_match_string returns -EINVAL, which is correct.
However, if the device node exists, but the property is not found,
of_find_property still returns NULL, but it will place -FDT_ERR_NOTFOUND
in the *lenp variable.
of_property_match_string does not use the lenp parameter, thus this error
case is being lost, and treated as if the node is NULL, and returns
-EINVAL, which is incorrect.
The callers of of_property_match_string treat the error differently if
the return value is -EINVAL or -ENOENT, e.g. in dwc3 driver:
ret = generic_phy_get_by_name(dev, "usb3-phy", &phy);
if (!ret) {
ret = generic_phy_init(&phy);
if (ret)
return ret;
} else if (ret != -ENOENT && ret != -ENODATA) {
debug("could not get phy (err %d)\n", ret);
return ret;
} else {
phy.dev = NULL;
}
So the caller drivers will just consider the property missing if -ENOENT
is returned, versus the case of -EINVAL, which means something else.
To fix this situation, changed the code to call the of_find_property
with the right third argument to catch this error code and treat it
accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
It is not uncommon for some of the QEMU-based jobs to fail not because
of a code issue but rather because of a timing issue or similar problem
that is out of our control. Make use of the keywords that Azure and
GitLab provide so that we will automatically re-run these when they fail
2 times. If they fail that often it is likely we have found a real issue
to investigate.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The job to build all imx8 and imx9 platforms is currently close to, or
sometimes exceeding the allowed build time. Exclude some platforms that
are already being built under their vendor-specific job as well to
reduce the time.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently the 64bit "rk" job is close to and sometimes goes over the job
time limit. Let us rework this in to one job for "rk" and "rv" (which
are the SoC prefixes) jobs which include or exclude "rockchip" the board
vendor. This gives us two jobs of similar numbers of platforms to build
now instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Back in the day we relied a lot on Synopsys own build of the GNU tools
for ARC processors, but since then we worked hard on getting all our changes
upstream and for a couple of years now we have ARCompact (AKA ARCv1)
and ARCv2 processors supported very well in upstream GCC, Binutils, GDB etc.
And so there's no need to use Synopsys forks any longer, thus we remove
all the references to that form and use upstream components as majority
of other architectures in U-Boot.
Thanks to Tom for pointing to that left-over!
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building qemu, all required submodules (of which we need more than
just dtc) are handled automatically. Currently trying to init the
submodule the way we do results in a git failure.
Reported-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With gcc-13.1 we get a warning about enum vs int here, so correct the
declaration to match the implementation.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With gcc-13.1 we get a warning about enum vs int here, so correct the
declaration to match the implementation.
Signed-off-by: Tom Rini <trini@konsulko.com>
When building with gcc-13.1 we see that the prototype for
cvmx_pko3_sq_config_children does not match the declaration. Make these
match and correct a typo in the function's version of the docs that the
prototype did not have, as part of keeping those in-sync.
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request efi-2023-10-rc1-2
UEFI:
* test: avoid function name 'setup' in capsule tests to not treat it as
a fixture
* ensure that device paths for USB block devices are unique
* enable having multiple EFI_LOADER block devices
* use InstallMultipleProtocolInterfaces() in TCG protocol implementation to
increase UEFI compliance
On devices with multiple USB mass storage devices errors like
Path /../USB(0x0,0x0)/USB(0x1,0x0)/Ctrl(0x0)
already installed.
are seen. This is due to creating non-unique device paths. To uniquely
identify devices we must provide path nodes for all devices on the path
from the root device.
Add support for generating device path nodes for all uclasses.
Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Do not assume that the preceding device path contains a single VenHW node.
Instead use the return value of dp_fill() which provides the address of the
next node.
Fixes: 23ad52fff4 ("efi_loader: device_path: support Sandbox's "host" devices")
Fixes: 19ecced71c ("efi_loader: device path for virtio block devices")
Fixes: 272ec6b453 ("efi_loader: device_path: support blkmap devices")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
pytest 7.3.2 treats the function name 'setup' as a fixture [1].
This leads to errors like:
TypeError: setup() missing 2 required positional arguments:
'disk_img' and 'osindications'
Rename setup() to capsule_setup().
[1] How to run tests written for nose
https://docs.pytest.org/en/7.3.x/how-to/nose.html
Fixes: 482ef90aeb ("test: efi_capsule: refactor efi_capsule test")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The devnum value of the blk_desc structure starts from 0,
current efi_bl_create_block_device() function creates
two "efiblk#0" devices for the cases that blk_find_max_devnum()
returns -ENODEV and blk_find_max_devnum() returns 0(one device
found in this case).
This commit uses blk_next_free_devnum() instead of blk_find_max_devnum().
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A previous patch is removing the last consumer of efi_remove_protocol().
Switch that to static and treat it as an internal API in order to force
users install and remove protocols with the appropriate EFI functions.
It's worth noting that we still have files using efi_add_protocol(). We
should convert all these to efi_install_multiple_protocol_interfaces()
and treat efi_add_protocol() in a similar manner
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The TCG2 protocol currently adds and removes protocols with
efi_(add/remove)_protocol().
Removing protocols with efi_remove_protocol() might prove
problematic since it doesn't call DisconnectController() when
uninstalling the protocol and does not comply with the UEFI specification.
It's also beneficial for readability to have protocol installations and
removals in pairs -- IOW when efi_install_multiple_protocol_interfaces()
is called, efi_uninstall_multiple_protocol_interfaces() should be used to
remove it. So let's swap the efi_add_protocol() as well.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
- Merge in some Kconfig dependencies fixes, typo fixes, erofs update,
shell portability fix, an env save fix, better mbr+gpt support, and
some android A/B enhancements.
If a tuning command times out, the card could still be processing it,
which will cause problems for recovery. The eMMC specification section
6.6 Data transfer mode (cont’d) claims that CMD12 can be used to stop
CMD21:
"
The relationship between the various data transfer modes is summarized (see Figure 27):
- All data read commands can be aborted any time by the stop command (CMD12).
The data transfer will terminate and the Device will return to the Transfer State.
The read commands are: ... send tuning block (CMD21) ....
"
Add a function that does that.
Based on Linux commit [1] and [2].
[1] e711f0309109 ("mmc: mmc: Introduce mmc_abort_tuning()")
[2] 21adc2e45f4e ("mmc: Improve function name when aborting a tuning
cmd")
Reviewed-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message, quote relevant part of the specification.
Rename to mmc_send_stop_transmission().
Remove tuning opcode check, this is controller driver specific.
Deduplicate part of mmc_read_blocks() using this function.]
Reviewed-by: Peng Fan <peng.fan@nxp.com>
For MMC/eMMC, the MMC_CMD_STOP_TRANSMISSION response is R1 for read
transfers and R1b for write transfers per JEDEC Standard No. 84-B51
Page 126 . The response is R1b unconditionally per Physical Layer
Simplified Specification Version 9.00.
Correct the response type and add a comment about it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_SYS_REDUNDAND_ENVIRONMENT is enabled, by default env is
getting saved to redundant environment irrespective of primary env is
present or not.
It means even if primary and redundant environment are not present, by
default, env is getting stored to redundant environment. Even if primary
env is present, it is choosing to store in redudndant env.
Ideally it should look for primary env and choose to store in primary env
if it is present. If both primary and redundant env are not present then
it should save in to primary env area.
Fix the issue by making env_valid = ENV_INVALID when both the
environments are not present.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some devices keep 2 copies of the bootloader_message in the misc
partition and write each in sequence when updating. This ensures that
there is always one valid copy of the bootloader_message. Teach u-boot
to optionally try a backup bootloader_message from a specified offset if
the primary one fails its CRC check.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Forces the DOS partition type driver to be used when verifying the MBR.
This is particularly useful when using a hybrid MBR & GPT layout as
otherwise MBR verification would mostly likely fail since the GPT
partitions will be returned, even if the MBR is actually valid.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds a test suite to ensure that part_get_info_by_type works correctly
by creating a hybrid GPT/MBR partition table and reading both.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
[trini: Add this on the other sandbox configs]
Signedd-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds part_driver_get_type() API which can be used to force a specific
driver to be used when getting partition information instead of relying
on auto detection.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Improve the logging when the partition test fails so that it is clear
what went wrong, shown with actual values.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
d94d9844bc ("dm: part: Update test to use mmc2") attempted to make the
test use mmc2, but the change was incomplete in that it didn't also
change the strings that reference a specific partition. Fix these so
that the test passes again
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
If test_cat and test_xxd cannot create the required file, the test will
be skipped, but this would result in an exception being raised in the
finally block because the file didn't exist to be cleaned up. This
caused the test to be marked as failed instead of skipped.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is is sometimes desired to be able to skip decrementing the number of
tries remaining in an Android A/B boot, and instead just check which
slot will be tried later. This can commonly be be the case for platforms
that want to A/B u-boot itself, but are required to boot from a FAT MBR
partition. In these cases, u-boot must do an early check that the MBR
points to the correct A/B boot partition, and if not rewrite the MBR to
point to the correct one and reboot. Decrementing the try count in this
case is not desired because it means that each u-boot might constantly
ping-pong overwriting the MBR and rebooting until all the retries are
used up.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Set default y based on common BOOT_DEFAULTS instead of DISTRO_DEFAULTS.
No change is intended, affected options is already implied for DISTRO
and BOOTSTD due to BOOT_DEFAULTS imply DOS_PARTITION (USB_STORAGE),
EFI_PARTITION and ISO_PARTITION.
Fixes: a0c739c184 ("boot: Create a common BOOT_DEFAULTS for distro and bootstd")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
When CONFIG_CMD_MMC and CONFIG_MMC are disabled, still some compilation
errors are seen as below due to unresolved symbols.
drivers/dfu/dfu_mmc.o: in function `mmc_block_op':
drivers/dfu/dfu_mmc.c:32: undefined reference to `find_mmc_device'
drivers/dfu/dfu_mmc.c:54: undefined reference to `mmc_get_blk_desc'
drivers/dfu/dfu_mmc.c:67: undefined reference to `mmc_get_blk_desc'
drivers/dfu/dfu_mmc.c:70: undefined reference to `mmc_get_blk_desc'
drivers/dfu/dfu_mmc.o: in function `dfu_fill_entity_mmc':
drivers/dfu/dfu_mmc.c:369: undefined reference to `find_mmc_device'
drivers/dfu/dfu_mmc.c:376: undefined reference to `mmc_init'
drivers/dfu/dfu_mmc.c:403: undefined reference to `mmc_get_blk_desc'
gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-ld.bfd: line 4:
31661 Segmentation fault (core dumped) $CC --sysroot=$LIBC
--no-warn-rwx-segment "$@"
Makefile:1760: recipe for target 'u-boot' failed
make: *** [u-boot] Error 139
make: *** Deleting file 'u-boot'
Add dependency of CONFIG_MMC for CONFIG_DFU_MMC config to fix the errors.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
This patch updates erofs driver code to catch up with the latest code of
erofs_utils (commit e4939f9eaa177e05d697ace85d8dc283e25dc2ed).
LZMA will be supported in the separate patch later.
Signed-off-by: Yifan Zhao <zhaoyifan@sjtu.edu.cn>
Reviewed-by: Huang Jianan <jnhuang95@gmail.com>
Busybox sort does not handle --field-separator== , replace this
with --field-separator='=' for maximum compatibility.
Fixes: cc5a490cf4 ("Makefile: Sort u-boot-initial-env output")
Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is more convenient since it does not require a video BIOS. Enable
it for QEMU.
Also drop use of video in SPL for the 64-bit QEMU, since it not needed
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bochs is convenient with QEMU on x86 since it does not require a video
BIOS. Add a driver for it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot sets up the ACPI tables during startup. Rather than creating a
new set, install the existing ones. Create a memory-map record to cover
the tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With x86 we set up the ACPI tables on startup so they can be examined. Do
the same with sandbox, so it is consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The output is garbled when tiny printf() is used. Correct this by adding
a special case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards need to access GPIOs to determine which SDRAM is fitted to the
board, for example chromebook_link. Probe this device (if it exists) to
make sure that this works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add the required tag so that micron memory can be set up correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move from using debug() to log_debug() so that we don't have to use the
__func__ parameter and can access other logging features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The ACPI tables are special in that they are passed to EFI as a separate
piece, independent of other tables.
Also they can be spread over two areas of memory, e.g. with QEMU we end
up with tables kept in high memory as well.
Add new global_data fields to hold this information and update the bdinfo
command to show the table areas.
Move the rom_table_end variable into the loop that uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The implementation of write_tables() is confusing because it uses the
rom_table_start variable as the address pointer as it progresses.
Rename it to rom_addr to make the code clearer. Move the rom_table_end
variable into the block where it is used.
Also update logging to use the ACPI category, now that it is available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This build can be used to boot standard distro builds, since these are
mostly 64-bit these days. Enable some more options, so that all possible
EFI UUIDs are decoded, we get a proper printf() in SPL, can search
memory for tables, support the full set of standard-boot features, have
full logging and can boot from CDROM media.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To save a few bytes, replace Error with ** and try to use the same string
for multiple messages where possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When global_data is relocated, log_head moves in memory, meaning that
the items in that list point to the wrong place.
Disable logging when making the change, then reenable it afterwards, so
that logging works normally.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable the various options needed for display to work on the qemu-x86_64
board. This includes expanding the available malloc() memory in SPL,
since the PCI bus must be enumerated in order to find the video device.
It also includes enabling a bloblist, so that the video parameters can be
passed. This is placed at address 10000 but is not needed after U-Boot
proper reads the information there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In some cases the video ROM may have been enabled previously, such as by
a previous firmware stage. Use the correct address in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A hex value is expected for the VGA mode. Add a 0x prefix, since the #
construct is not supported in SPL. We don't want to add it, due to
code-size constraints.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When video is required in SPL, set this up ready for use. Ignore any
problems since it may be that video is not actually available and we
still want to continue on to U-Boot proper in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Print the banner in SPL init only if the spl_board_init() function isn't
enabled. The spl_board_init() function is in the same file, but is called
later, by board_init_r().
This avoids printing two banners, which causes tests to fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When video is set up in SPL, U-Boot proper needs to use the correct
parameters so it can write to the display.
Put these in a bloblist so they are available to U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With qemu-x86_64 we need to run the video BIOS while in 32-bit mode, i.e.
SPL. Add a Kconfig option for this, adjust the Makefile rules and use
CONFIG_IS_ENABLED() where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When running the ROM the code is not very helpful when something goes
wrong. Add a little more debugging and some logging of return values to
improve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow PCI autoconfig to be handled in SPL, so that we can set it up
correctly for boards which need to do this before U-Boot proper. This
includes qemu-x64_64 which needs to set up the video device while in
32-bit mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When scanning fails it is useful to be able to decode what went wrong. Add
some debugging for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful to see the base of the malloc region. This is visible when
debugging but not in normal usage.
Add it to the global data so that it can be shown.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
At present this leaves the stack at the pre-relocation value. This is not
ideal since we want to have U-Boot running entirely from the top of
memory.
In addition, the new global_data pointer is not actually used, since
the global_data pointer itself is relocated, then the pre-relocation value
is changed, so the effective value (after relocation) does not update.
Adjust the implementation to follow the 32-bit code more closely, with a
trampoline function which is passed the new stack and global_data pointer.
This ensures that the correct values come through even when relocating.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The CMD_EFIDEBUG option enables debugging so it is reasonable to assume
that all effects should be made to decode the dreaded UUIDs favoured by
UEFI.
Update the table to show them all when CONFIG_CMD_EFIDEBUG is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Once the ACPI tables have been set up, record their address so that it is
possible to list them with 'acpi list'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a bit more detail so it is clear that multiple devices are
supported, but only one per driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some files have an associated address. Show this with the 'qfw list'
command so that it is possible to dump the data.
Note that the reference to 'md' is for the md.rst file, not a
markdown file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some devices have multiple partition types available on the same media.
It is sometimes useful to see these to check that everything is working
correctly.
Provide a way to manually set the partition-table type, avoiding the
auto-detection process.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are useful pieces of information when debugging. The RAM top shows
where U-Boot started allocating memory from, before it relocated. The
stack pointer can be checked to ensure it is in the correct region.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Sometimes a previous bootloader has written ACPI tables. It is useful to
be able to find and list these. Add an 'acpi set' command to set the
address for these tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rather than silently hanging, show an error first. This can happen when
there is something wrong with the video BIOS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use an assembler implementation as is done for i386, so that the results
are equivalent for i386 and x86_64.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is useful information so show it with the bdinfo command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a comment for this function in the header.
Change the function (and the one after) to use __noreturn to keep
checkpatch happy.
Add docs to board_init_f_r() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The ll_boot_init() check handles the EFI case so we don't need the rest
of the code. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is always zero in the source tree, so drop it.
While we are here, add a comment to _X86EMU_env since the symbol is
actually defined twice, which can cause confusion when building.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Kconfig for this is currently inside a particular board. Move it into
the correct place and allow use in SPL, so that video can be used there
if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move MTRR-listing code into a common file so it can be used from SPL.
Update the 'mtrr' command to call it.
Use this in SPL just before adjusting the MTRRs, so we can see the state
set up by the board. Only show it when debug is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add ms so it is easier to search for tables in memory.
Expand the command-line and print buffers so that we can deal with the
very long ChromeOS command lines. (typically 700 characters).
Enable BOOTSTD_FULL to get the full set of standard-boot options.
Replace the existing manual script with 'bootflow scan', since it can
find and boot the OS.
Finally, expand the malloc() space so we can read large kernels into a
bootflow.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Drop IDE and add NVME since this is more common now.
Add ms so it is easier to search for tables in memory.
Expand the command-line and print buffers so that we can deal with the
very long ChromeOS command lines. (typically 700 characters).
Enable BOOTSTD_FULL to get the full set up standard-boot options.
Finally, expand the malloc() space so we can read large kernels into a
bootflow.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is possible to boot x86-based ChromeOS machines by parsing a table and
locating the kernel and command line. Add a bootmeth for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow reading the command line from a zimage, so that it can be recorded
in the bootflow.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a direct interface to booting a zimage, so that bootstd can call it
without going through the command-line interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some Linux parameters can be set automatically by U-Boot, if it knows the
device being used. For example, since U-Boot knows the serial console
being used, it can add parameters for earlycon and console.
Add support for this.
Note that this is an experimental feature and we will see how useful it
turns out to be. It is very handy for ChromeOS, since otherwise it is very
difficult to manually determine the UART address or port number,
particularly in a script.
Provide an example of how this is used with ChromeOS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Drop use of the distro boot script and use standard boot instead.
Moving to a text-based environment would be desirable also, but requires
additional work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We want to enable some of the more interesting bootstd features. Move SPL
up to create some room for the larger U-Boot binary. Also disable
microcode since this is not needed
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a bootflow command to update the command line more easily. This allows
changing a particular parameter rather than editing a very long strings.
It is also easier to handle with scripting.
The new 'bootflow cmdline' command allows getting and setting single
parameters.
Fix up the example output while we are here, since there are a few new
items.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Linux command line consists of a number of words with optional values.
At present U-Boot allows this to be changed using the bootargs environment
variable.
But this is quite painful, since the command line can be very long.
Add a function which can adjust a single field in the command line, so
that it is easier to make changes before booting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On x86 boards Linux uses a block of binary data to provide information
about the command line, memory map, etc. Provide a way to store this in
the bootflow so it can be passed on to the OS.
No attempt is made to generalise the code, since other archs don't need
this information. The field is present always, though, to avoid needing
accessors or #ifdefs when building code on other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The "bootargs" environment variable is used to set the command-line
arguments to pass to the OS. Use this same mechanism with bootstd as well.
When the variable is updated, it is written to the current bootflow. When
the current bootflow is updated, the environment variable is updated too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some operating systems have a command line which can be adjusted before
booting. Store this in the bootflow so it can be controlled within
U-Boot.
Fix up the example output while we are here, since there are a few new
items.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It seems better to call this a 'bootdev' since this is name used in the
documentation. The older 'Bootdevice' name is no-longer used and may cause
confusion with the 'bootdevice' environment variable.
Update throughout to use bootdev.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Many tests don't actually use the devicetree at all so there is no point
in running the tests both with livetree and flat tree. Check for this and
skip the flat tree test in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To enforce anti-rollback to any older version, dtb must be
always update manually. This should be described in the
documentation.
This commit also adds the recommendation that secure system should not
enable the fdt command because lowest-supported-version
property in device tree can be changed by fdt command.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
The main README file is the wrong place to document how different terminal
emulations can be used to access the U-Boot serial console. C-Kermit which
requires a configuration file or several commands to access the U-Boot
console may not be the preferred choice for newcomers. The provided wiki
link is invalid.
The man-pages for loadb and loads already show how to use the commands with
picocom.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We recently fixed a few issues wrt to controller handling. Add a few
test cases to cover the new code.
- return EFI_DEVICE_ERROR the first time the protocol interface of
the controller is uninstalled, after all the children have been
disconnected. This should make the drivers reconnect
- add tests to verify controllers are reconnected when uninstalling a
protocol fails
- add tests to make sure EFI_NOT_FOUND is returned if a non existent
interface is being removed
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Up to now we did not check the return value of DisconnectController.
A previous patch is fixing that taking into account what happened during
the controller disconnect. But that check takes place before our code
is trying to figure out if the interface exists to begin with. In case a
driver is not allowed to unbind -- e.g returning EFI_DEVICE_ERROR, we
will end up returning that error instead of EFI_NOT_FOUND.
Add an extra check on the top of the function to make sure the protocol
interface exists before trying to disconnect any drivers
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_uninstall_protocol() calls efi_disconnect_all_drivers() but never
checks the return value. Instead it tries to identify protocols that
are still open after closing the ones that were opened with
EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL, EFI_OPEN_PROTOCOL_GET_PROTOCOL
and EFI_OPEN_PROTOCOL_TEST_PROTOCOL.
Instead of doing that, check the return value early and exit if
disconnecting the drivers failed. Also reconnect all the drivers of
a handle if protocols are still found on the handle after disconnecting
controllers and closing the remaining protocols.
While at it fix a memory leak and properly free the opened protocol
information when closing a protocol.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_disconnect_controller() doesn't reconnect drivers in case of
failure. Reconnect the disconnected drivers properly
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The boot variables automatically generated for removable medias
should be with short form of device path without device nodes.
This is a requirement for the case that a removable media is
plugged into a different port but is still able to work with the
existing boot variables.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Rename and move bootorder and bootoption apis from cmd to lib
for re-use between eficonfig and bootmgr
Fix 'unexpected indentation' when 'make htmldocs' after functions
are moved
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Flushing kernel image after decompression was taking 113 milliseconds
with U-boot 2022.10. With U-boot 2023.01 and 2023.04, flushing
the same amount of memory takes approx 1.5 seconds. With
U-boot 2023.07-rc6, it takes 6.5 seconds.
powerpc flush_cache() function used to call WATCHDOG_RESET() after
flushing every cacheline. At that time WATCHDOG_RESET() was light
so the operation was almost seamless.
But commit 29caf9305b ("cyclic: Use schedule() instead of
WATCHDOG_RESET()") replaced WATCHDOG_RESET() by schedule() and that
started to hurt with U-boot 2022.10.
And in U-boot 2023.07-rc6 that's even worse after
commit 26e8ebcd7c ("watchdog: mpc8xxx: Make it generic").
In the meantime commit 729c1fe656 ("powerpc: introduce
CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD") gives us the opportinity to
only call schedule() every given chunk of data instead of every
cacheline. As explained in that commit there is no point in pinging
the watchdog after every cacheline flush, so lets define a sensible
default chunk size of 4k which matches to size of a page on most
powerpc platforms.
With that new default threshold, the culprit flushing performed after
kernel image decompression now takes 85 milliseconds on a powerpc 8xx.
Fixes: 29caf9305b ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Uncompressing a 1.7Mbytes FIT image on U-boot 2023.04 takes
approx 7s on a powerpc 8xx.
The same on U-boot 2023.07-rc6 takes approx 28s unless watchdog
is disabled.
During that decompression, LzmaDec_DecodeReal() calls schedule
1.6 million times, that is every 4µs in average.
In the past it used to be a call to WATCHDOG_RESET() which was
just calling hw_watchdog_reset().
But the combination of commit 29caf9305b ("cyclic: Use schedule()
instead of WATCHDOG_RESET()") and commit 26e8ebcd7c ("watchdog:
mpc8xxx: Make it generic") results in an heavier processing.
However, there is absolutely no point in calling schedule() that
often.
By moving and keeping only one call to schedule() in the main
loop the number of calls is reduced to 1.2 million which is still
too much. So add logic to only call schedule every 1024 times.
That leads to a call to schedule approx every 6ms which is still
far enough to entertain the watchdog which has a 1s timeout on
powerpc 8xx.
powerpc 8xx being one of the slowest targets we have today in
U-boot, and most other watchdogs having a timeout of one minutes
instead of one second like the 8xx, this fix should not have
negative impact on other targets.
Fixes: 29caf9305b ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead of using the hard-coded value of 0x1f, use 'TASK_TAG'
macro instead to construct the ucd_req_ptr->header.dword_0
This is in sync with what the Linux UFS driver does, i.e.
set the byte0 equal to TASK_TAG (see [1]).
Setting it to a fixed value of 0x1f is wrong as we define
TASK_TAG as 0 inside u-boot ufs framework. So, instead we
should use the macro value directly.
[1]. https://github.com/torvalds/linux/blob/master/drivers/ufs/core/ufshcd.c#L2705
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
This driver considers that a node with an empty label is the top.
But the led class has changed, if a label is not provided for a led,
the label is filed with the node name. So we update this driver
to use a wrapper to manage the top led node.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
In case of OF_SEPARATE (!OF_EMBED), the devicetree blob is placed
after _end, and fdt_find_separate() always returns _end. There is
a .bss section after _end and the section is cleared before relocation.
When GD_FLG_SKIP_RELOC is set, relocation is skipped, so the blob is
still in .bss section, but will be cleared. As a result, the devicetree
become invalid.
To avoid this issue, should relocate it regardless of GD_FLG_SKIP_RELOC
in reloc_fdt().
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The different CPSW sub-system Ethernet ports have different PHY mode
control registers. In order to allow the modes to get configured
independently only the register for the port in question must be
accessed, otherwise we would just be re-configuring the mode for port 1,
while leaving all others at their power-on defaults. Fix this issue by
adding a port-number based offset to the mode control base register
address based on the fact that the control registers for the different
ports are spaced exactly 0x4 bytes apart.
Fixes: 9d0dca1199 ("net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver")
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
While NFS is widely used in data centres, and private
networks it's quite a nuanced usecase for device firmware.
A lot of devices already disable it.
Various network protocols should really be opt in, not opt
out, because they add extra size and are potential attack
vectors from a security PoV. In the NFS case it doesn't
really make sense for a lot of devices like tables, SBCs etc.
It's also something we don't really want for SystemReady-IR
due to security concerns.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The new opt-out setting, CONFIG_ENV_MMC_PARTITION, statically sets
the MMC environment partition name. Prior to this patch, the only way
to declare this partition name was by creating a
'u-boot,mmc-env-partition' parameter in the device-tree's /config node.
This setting provides additional flexibility, particularly in cases
where accessing the device-tree is not straightforward (e.g. QEMU).
If undeclared, the device-tree's setting will be used.
Signed-off-by: Emmanuel Di Fede <emmanuel.difede@cysec.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
scmi_to_linux_errno() is set to return an appropriate errno
which corresponds to a given SCMI status code.
But the current implementation always returns the same value.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
memalign() returns a pointer which is to be freed by free(). To call
unmap_sysmem() is incorrect, furthermore it was called in a wrong scope.
Also add a check for allocation error.
Fixes: d7af2baa49 ("crypto/fsl: Fix HW accelerated hash commands")
Cc: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without CONFIG_CLK, the build fails with the following message:
LD u-boot
aarch64-none-linux-gnu-ld.bfd: drivers/firmware/scmi/scmi_agent-uclass.o: \
in function `scmi_bind_protocols':
.../drivers/firmware/scmi/scmi_agent-uclass.c:79: undefined reference to \
`_u_boot_list_2_driver_2_scmi_clock'
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
use new memory layout and change uboot load address.
open tpm, tee and more config feature
No need to reserve top memory because the reserved space
is moved to the bottom area of memory.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
To quote the author:
This series provides a means to edit board configuration in U-Boot in a
graphical manner. It supports multiple menu items and allows moving
between them and selecting items. The configuration is defined in a data
format so that code is not needed in most cases. This allows the board
configuration to be provided in the devicetree.
This is still at an early stage, since it only supports menus. Numeric
values are not supported. Most importantly it does not yet support
loading or saving the configuration selected by the user.
To try it out you can use something like:
./tools/expo.py -e test/boot/files/expo_layout.dts \
-l test/boot/files/expo_layout.dts -o cedit.dtb
./u-boot -Tl -c "cedit load hostfs - cedit.dtb; cedit run"
Use the arrow keys to move between menus, enter to open a menu, escape
to exit.
Various minor fixes and improvements are provided in this series:
- Update STB TrueType library to latest
- Support clearing part of the video display
- Support multiple livetrees loaded at runtime
- Support loading and allocating a file
- Support proper measuring of text in expo
- Support simple themes for expo
This was brought in in 2016 and a number of changes have been made since
then. There does not seem to be much change in functionality, but it is
a good idea to update from time to time.
Bring in the latest version:
5736b15 ("re-add perlin noise again")
Add a few necessary functions, with dummies in some cases. Update the tests
as there are subtle changes in rendering, perhaps not for the better.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new 'cedit' command which allows editing configuration using an
expo. The configuration items appear as menus on the display.
This is extremely basic, only supporting menus and not providing any way
to load or save the configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
The only way to create an expo at present is by calling the functions to
create each object. It is useful to have more data-driven approach, where
the objects can be specified in a suitable file format and created from
that. This makes testing easier as well.
Add support for describing an expo in a devicetree node. This allows more
complex tests to be set up, as well as providing an easier format for
users. It also provides a better basis for the upcoming configuration
editor.
Signed-off-by: Simon Glass <sjg@chromium.org>
It looks better if menus have a bit of an inset, rather than be drawn hard
up against the background. Also, menu items look better if they have a bit
of spacing between them.
Add theme options for these and implement the required changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
In 'popup' mode, the expo allows moving around the objects in a scene.
When 'enter' is pressed on a menu, it opens and the user can move around
the items in the menu.
Implement this using keypress handles and actions.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a menu is opened, it must be displayed over all other objects in
the scene, so that all its items are visible.
Handle this by drawing the menu object a second time, after all other
objects have been drawn. Draw all of the objects which are dependent
on the menu object.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a popup menu is closed it shows only the selected item. When it is
open it shows a background and all items, with a highlight that can be
moved between the items.
Add the drawing logic for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we only support a single menu, so all that can be pointed to
is the current menu item. Rename this action so that we can also add
an action for pointing to an object. This will allow cycling through
the objects in a scene.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only a single menu is supported. All items are shown and a
pointer object points to the current item.
Add support for multiple menus, one of which is highlighted, indicated
by the highlight_id property in the scene.
The highlighted menu item has a SCENEOF_POINT flag, indicating that it
is currently pointed to.
The popup menu is normally closed, in which case it shows only the
current menu item. When it is opened, it shows all items, allowing the
user to select one.
Rather than requiring the menu item to have a description, require it to
have a label. Use the label (only) for the popup menu.
With this, most of the drawing and layout logic is complete.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current implementation supports a 'pointer' object which points to
the currently highlighted menu item. We want to support highlighting the
label of the menu item instead, e.g. with inverse video. In this case we
will need to 'unhighlight' the old item and highlight the new one.
As a first step, move the pointer logic into a function. This fixes a
bug where the item is hidden when it should not be.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is a pain to manually set the fonts of all objects to be consistent.
Some spacing settings are also better set globally than by manually
positioning each object.
Add a 'theme' to the expo, to hold this information. For now it includes
only the font size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a way to set the full dimensions of objects, i.e. including the
width and height.
For menus, calculate the bounding box of all objects in the menu. Set all
labels to be the same size, so that highlighting works correct, once
implemented.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than estimating, measure the text accurately, using the new
vidconsole feature. This allows accurate placement of objects.
Signed-off-by: Simon Glass <sjg@chromium.org>
We currently have just a 'hide' property for each object. In preparation
for adding more properties, convert the struct to use a flags value,
instead of individual booleans. This is more extensible.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present objects only have a position so it is not possible to determine
the amount of space they take up on the display.
Add width and height properties, using a struct to keep all the dimensions
together.
For now this is not used. Future work will set up these new properties.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a way to set this value so that it is easy to separate the
statically allocated IDs (generated by the caller) from those
generated dynamically by expo itself.
Signed-off-by: Simon Glass <sjg@chromium.org>
For laying out text accurately it is necessary to know the width and
height of the text. Add a measure() method to the console API, so this
can be supported.
Add an implementation for truetype and a base implementation for the
normal console.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes necessary to highlight some text in a different colour.
Add an easy way to do this and then restore the original console colours.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses the private data of the video uclass, not the console uclass
(its child). Update the comment to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: a032e4b55e ("video: Move console colours to the video uclass")
This feature is different enough from bootstd that it probably deserves
its own log category. It cannot use a uclass since it is not a device.
Add a new category.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present livetree can only be used for the control FDT. It is useful
to be able to use the ofnode API for other FDTs, e.g. those used by
the upcoming configuration editor.
We already have most of the support present, and tests can be marked with
the UT_TESTF_OTHER_FDT flag to use another FDT as a special case. But
with this change, the functionality becomes more generally available.
Plumb in the require support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ensure that the block of memory used by live tree is aligned according to
the default for structures. This ensures that the root node appears at
the start of the block, so it can be used with free(), rather than being
4 bytes later in some cases.
This corrects a rather obscure bug in unflatten_device_tree().
Fixes: 8b50d526ea ("dm: Add a function to create a 'live' device tree")
Signed-off-by: Simon Glass <sjg@chromium.org>
This functionality current sits in bootstd, but it is more generally
useful. Add a function to load a file into memory, allocating it as
needed. Adjust bootstd to use this version.
Note: Tests are added in the subsequent patch which converts the 'cat'
command to use this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
The putc_xy() method is supposed to return the amount of space used. The
existing implementation erroneously adds the previous sub-pixel position
to the returned value. This spaces out the characters very slightly more
than it should. It is seldom noticeable but it does make accurate
measurement of the text impossible.
Fix this minor but long-standing bug.
Fixes: a29b012037 ("video: Add a console driver that uses TrueType fonts")
Signed-off-by: Simon Glass <sjg@chromium.org>
This should ideally be done once after all scene changes have been made.
Require an explicit call when everything is ready.
Always arrange after a key it sent, just for convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful when the background colour must be written before text
is updated, to avoid strange display artifacts.
Add a function for this, using the existing code from the truetype
console.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are various restrictions on the use of livetree:
- It is only available once the tree is unflattened, i.e. after relocation
- It is designed to be used with the control FDT
- It can (in principle) be used with other FDTs, but only if they are
unflattened first; this is not supported
Add a few checks to make sure that any tree that is created is actually
valid. Otherwise it can be confusing when nodes and properties cannot
actually be accessed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Devices do not necessarily have nodes attached to them, since they can be
created from platdata. In SPL a devicetree may in fact not exist at all.
Check the node before using it. This avoids failure when OF_CHECKS is
enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 5fc7cf8c8e ("gpio: add gpio-hog support")
Reviewed-by: Heiko Schocher <hs@denx.de>
A recent change makes test continue to run after failure. This results in
a lot of useless output and may lead to a segfault. Fix this by adding
back the 'return' statement.
Fixes: fa847bb409 ("test: Wrap assert macros in ({ ... }) and fix")
Signed-off-by: Simon Glass <sjg@chromium.org>
With recent changes to how sandbox handles reset, closing the window
currently just restarts sandbox.
Use the correct sysreset type to tell it to shut down.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is easier to deal with if it uses the existing string handling,
since we will be able to use translations, etc. in the future.
Update it to use an ID instead of a string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a pragma to deal with the code-coverage gap which drops binman down to
90% coverage.
Fixes: de65b122a2 (tools: Fall back to importlib_resources on Python 3.6)
Signed-off-by: Simon Glass <sjg@chromium.org>
This test was written for the incorrect use of assertions. Update it to
build with the previous approach, where tests fail at the first
assertion.
All assertion functions return 0 on success and non-zero on failure.
They can be nested into functions simply by declaring a function that
returns an int and using ut_assertok() to call it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
use new memory layout and change uboot load address.
open tpm, tee and more config feature
No need to reserve top memory because the reserved space
is moved to the bottom area of memory.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Use proper register base and access method to access GRF registers.
GRF registers start at a completely different base, and need special
access method, that sets the change mask in the 16 MSBs.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
If phy is not defined in DT (eg. on rk3399), generic_phy_get_by_name
will return -ENODATA. Handle that case correctly.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
pllref_clk is unused after being retrieved. fin needs to be set
to dsi->ref clock's rate for the following calculation to work.
Otherwise fin is undefined, and calculation return bogus number
based on undefined variable.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
&priv->phy is always true. Compiler warns about this loudly.
Use a propper check for phy device allocation. Without this fix
using this driver with SoC that doesn't use external phy (eg. RK3399)
doesn't work.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
These must be read from timings->flags, like other DSI HOST drivers do.
And they must not be inverted either. Low means low.
Without this fix, panel drivers that set *SYNC_LOW produce corrupted
output on screen (shifted horizontally and vertically by back porch
distance).
Signed-off-by: Ondrej Jirman <megi@xff.cz>
The driver is for panels based on the Himax HX8394 controller, such as the
HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface.
This panel is used in Pinephone Pro.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
Some callers expect to call this with NULL font name to select the
default font (eg. boot/scene.c). Without handling the NULL condition
U-Boot crashes instead of displaying a bootflow GUI menu.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
The sar-reg0 alias was left over from an earlier iteration of the
patches adding support for this board. Remove the unused alias.
Fixes: 6cc8b5db40 ("arm: mvebu: Add RD-AC5X board")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The x240 and SE240 are a series of L2+ switches from Allied Telesis.
There are a number of them in the range but as far as U-Boot is
concerned all the CPU block components are the same so there's only one
board defined.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently, a random MAC address is assigned to eth1 in Linux.
Fix this behavor by retrieving the second MAC address from the fuses.
Signed-off-by: Fabio Estevam <festevam@denx.de>
On the XEA (imx287) system the FAT file system is not used neither in
SPL nor u-boot proper.
Hence, to save ~6KiB of u-boot.img size - it has been disabled.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The XEA system (imx287 based) is not using support for EXTLINUX and VBE.
As those configuration options have been enabled by default with modern
Kconfig it is safe to explicitly disable them.
After that change the u-boot.img size has been reduced by ~16 KiB.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.
To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.
To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
The USB Power domains should not have been removed as it causes
the board to hang if the USB is started.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Several changes have been made to the device tree
in the kernel, so update that as well as the
corresponding imx8mp-u-boot.dtsi files to prevent
breaking the booting.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list. Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.
For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.
The hardware configuration (EC) is determined at runtime by
reading from the SOM EEPROM.
To support both hardware configurations (EC and non-EC), adjust/fix
the PHY reset gpios according to the hardware configuration
read at runtime from the SOM EEPROM. This adjustement is done in
U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
In case the i.MX8M Plus starts from eMMC BOOT1/BOOT2 HW partitions, the
flash.bin container is stored at offset 0 from the start, that means the
fitImage itb is at offset 0x2c0 instead of 0x300 sectors from the start.
Handle this difference in custom spl_mmc_get_uboot_raw_sector() .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Bitwise operations on signed integers are not defined,
replace them with per-call checks.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.
This also needs to occur in the SPL so enable CONFIG_SPL_BOARD_INIT and
add a void spl_board_init function which calls arch_misc_init to probe
the CAAM driver.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Update RAM Timings for 2GB RAM based on DDR Controller Configuration
Spreadsheet revision 22. Including the update of the refresh
rate to workaround errata ERR050805.
Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
The csf_spl.txt and csf_fit.txt templates contain file paths which must
be edited for the location of your NXP CST generated key files.
Streamline the process of signing an image by assigning unique var names
to these which can be expended from env variables in the csf.sh script.
The following vars are used:
SRK_TABLE - full path to SRK_1_2_3_4_table.bin
CSF_KEY - full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem
IMG_KEY - full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem
Additionally provide an example of running the csf.sh script.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The sec_in32 preprocessor is defined as follows in include/fsl_sec.h file:
When address "a" is calculated using math for ex: addition of base address and
an offset, then casting is applied only to the first address which in this
example is base address.
caam_ccbvid_reg = sec_in32(CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET)
resolves to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)CONFIG_SYS_FSL_SEC_ADDR +
CAAM_CCBVID_OFFSET)
instead it should resolve to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)(CONFIG_SYS_FSL_SEC_ADDR +
CAAM_CCBVID_OFFSET))
Thus add parenthesis around the address "a" so that however the address is
calculated, the casting is applied to the final calculated address.
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
add support for SHA-256 secure hash algorithm using the ARM v8
SHA-256 instructions for verifying image hash.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Abstract common interfaces for AHAB authentication operations.
Then share some common codes for AHAB and SPL container authentication
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If the container has image which conflicts with
spl_get_load_buffer address, there are processing failures.
Use malloc instead of spl_get_load_buffer.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
M4 image to any DDR address first. Then use the
"bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
or CM4_1, the default core id is 0 for CM4_0.
Since current M4 only supports running in TCM. The bootaux will copy
the M4 image from DDR to its TCML.
2. Implment bootaux for HIFI on QXP
command: bootaux 0x81000000 1
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The bootaux uses ulong to read private data and write to M4 TCM,
this cause problem on ARM64 platform where the ulong is 8bytes.
Fix it by using u32 to replace ulong.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current bootaux supports i.MX8M and i.MX93, but the name "_M4_"
implies that the SoCs have Cortex-M4. Actually i.MX8MM/Q use Cortex-M4,
i.MX8MN/P use Cortex-M7, i.MX93 use Cortex-M33, so use "_MCU_" in place
of "_M4_" to simplify the naming.
Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the support for loading image from secondary container set on
iMX8QM B0, iMX8QXP C0.
Using the SCFW API to get container set index, if it is the secondary
boot, get the offset from fuse and apply to offset of current container
set beginning for loading.
Also override the emmc boot partition to check secondary boot and switch
to the other boot part.
This patch is modified from NXP downstream:
imx8: Fix the fuse used by secondary container offset
imx: container: Skip container set check for ROM API
imx8: spl: Support booting from secondary container set
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Checking container header tag and version is wrong, it causes to fail
to bypass invalid container
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix below coverity issues caused by get_idx function where "-1" is
compared with uint8_t "element"
343336 Unsigned compared with neg
343337 Operands don't affect result
Additional, this function returns "-1" will cause overflow to
event string array.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Extend the RX timeout value to 10s, because when authentication is failed
the ELE needs long time (>2s for 28M image) to return the result. Print
rx wait info per 1s.
Also correct TX and RX status registers in debug.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity (CID 21143558).
When tee_shm_register returns failure, the shm_input pointer is
invalid, should not free it. Same issue also exists on registering
shm_output.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix build warning:
warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3
has type ‘u64’ {aka ‘long long unsigned int’} [-Wformat=]
printf("can't find memreg for image %d load address 0x%x, error %d\n",
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘sc_faddr_t’ {aka ‘long long unsigned int’} [-Wformat=]
debug("memreg %u 0x%lx -- 0x%lx\n", mr, start, end);
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Running a memtest in U-Boot and Linux shows that some Colibri iMX6
produce bitflips at temperatures above 60°C. This happens because the
RALAT and WALAT values on the Colibri iMX6 are too low. The problems
were introduced by commit 09dbac8174 ("mx6: ddr: Restore ralat/walat
in write level calibration") before the calibration process overwrote
the values and set them to the maximum value. With this commit, we make
sure that the RALAT and WALAT values are set to the maximum values
again. This has been proven to work for years.
Fixes: 09dbac8174 ("mx6: ddr: Restore ralat/walat in write level calibration")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T1024RDB defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the serial node descriptions similar to Linux v6.4 for the
t1024rdb board and its dependencies.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Call pci_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T1042D4RDB defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the serial node descriptions similar to Linux v6.4 for the
t1042d4rdb board and its dependencies.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Call pci_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T4240RDB defconfig.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the serial node descriptions similar to Linux v6.4 for the t4240rdb
board and its dependencies.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Call pci_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T2080RDB defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the serial node descriptions similar to Linux v6.4 for the t2080rdb
board and its dependencies.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Call pci_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for Winbond 256M-bit flash w25q256jwm.
Performed basic erase/write/readback operations on
ZynqMP zc1751+dc1 board.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If cs gpio is requested with ACTIVE_HIGH flag, it will
be pulled low(i.e. active). This is not what we expected.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
XTX changed full company name from "XTX Technology (Shenzhen) Limited
to "XTX Technology Limited" since 2020,So remove "(Shenzhen)".
Signed-off-by: Bruce Suen <bruce_suen@163.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:
sck-gpios, miso-gpios and mosi-gpios.
gpio-sck, gpio-mosi and gpio-miso are considered deprecated.
Update the bindings to suggest the recommeded properties.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:
sck-gpios, miso-gpios and mosi-gpios.
gpio-sck, gpio-mosi and gpio-miso are considered deprecated.
Currently, U-Boot only supports the deprecated properties.
Allow the soft_spi driver to support both the new and old properties.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Current code expects that SPI_TX_BYTE is single bit mode
but it is wrong. It indicates byte program mode,
not single bit mode.
If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set,
the default transfer bus width is single bit.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the bcm63xx-hsspi driver are no longer needed and this new
driver is much cleaner.
Port from linux patch:
Link: https://lore.kernel.org/r/20230209200246.141520-15-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Due to the controller limitation to keep the chip select low during the
bus idle time between the transfer, a dummy cs workaround was used when
this driver was first upstreamed to the u-boot based on linux kernel
driver. It basically picks the dummy cs as !actual_cs so typically dummy
cs is 1 when most of the case only cs 0 is used in the board design.
Then invert the polarity of both cs and tell the controller to start the
transfers using dummy cs. Assuming both cs are active low before the
inversion, effectively this keeps dummy cs high and actual cs low during
the transfer and workaround the issue.
This workaround requires that dummy cs 1 pin to is set to SPI chip
selection function in the pinmux when the transfer clock is above 25MHz.
The old chips likely have default pinmux set to chip select on the dummy
cs pin so it works but this is not case for the new Broadband BCA chips
and this workaround stop working. This is specifically an issue to
support SPI NAND and SPI NOR flash because these flash devices can
typically run at or above 100MHz.
This patch utilizes the prepend feature of the controller to combine the
multiple transfers in the same message to a single transfer when
possible. This way there is no need to keep clock low between transfers
and solve the issue without any pinmux requirement.
Multiple transfers within a SPI message may be combined into one
transfer if the following are all true:
* One or more half duplex write transfer in single bit mode
* Optional full duplex read/write at the end
* No delay and cs_change between transfers
Most of the SPI device meets this requirements such as SPI NOR, SPI NAND
flash, Broadcom SPI voice card and etc. So this change switches to the
prepend mode as the default mode. For any SPI message that does not meet
the above requirement, we switch to original dummy cs mode but limit the
clock rate to the safe 25MHz.
Port from linux patch:
Link: https://lore.kernel.org/r/20230209200246.141520-12-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Currently the driver always sets the controller to dual data bit mode
for both tx and rx data in the profile mode control register even for
single data bit transfer. Luckily the opcode is set correctly according
to SPI transfer data bit width so it does not actually cause issues.
This change fixes the problem by setting tx and rx data bit mode field
correctly according to the actual SPI transfer tx and rx data bit width.
Fixes: 29cc4368ad ("dm: spi: add BCM63xx HSSPI driver")
Port from linux patch:
Link: https://lore.kernel.org/r/20230209200246.141520-11-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
ARCH_BCMBCA was introduced to cover individual Broadcom broadband SoC
for common features and IP blocks. Use this config instead of each chip
config as the Kconfig dependency for Broadcom HSSPI driver.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Rename the flush function into pl022_spi_flush to avoid conflicting
types with previous declaration of the function in stdio.h header.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The CN9130 SoC (an ARMADA 8K type) has both a NAND Flash Controller and
a generic local bus controller (Device Bus Controller) that share common
pins.
With a board design that incorporates both a NAND flash and uses
the Device Bus (in our case for an SRAM) accessing the Device Bus device
fails unless the NfArbiterEn bit is set. Setting the bit enables
arbitration between the Device Bus and the NAND flash.
Since there is no obvious downside in enabling this for designs that
don't require arbitration, we always enable it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The NAND flash controller (NFC) on the AC5/AC5X SoC is the same as
the NFC used on other Marvell SoCs. It does have the additional
restriction of only supporting SDR timing modes up to 3.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The NF_CLK for the AC5 SoC runs at 400MHz. There's no strapping
or gating require so just add a mvebu_get_nand_clock() that
returns this value.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The AC5/AC5X SoC has a NAND flash controller. Add this to the
SoC device tree.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Update the Thecus N2350 DTS to conform with latest device-tree binding
and styles.
- Correct typo in mdio node.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Add basic config for Sipeed Lichee PI 4A board which make it capable of
booting into serial console.
Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Add support for Sipeed's Lichee Pi 4A board which based on T-HEAD's
TH1520 SoC, only minimal device tree and serial console are enabled,
so it's capable of chain booting from T-HEAD's vendor u-boot.
Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.
The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint ipi driver to
support ACLINT mswi device, by checking the per-driver data field of
the ACLINT mtimer driver to determine whether a syscon based approach
needs to be taken to get the base address of the ACLINT mswi device.
[1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.
The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint timer driver to
support ACLINT mtimer device, using a per-driver data field to hold
the mtimer offset to the base address encoded in the mtimer node.
[1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
The main difference between StarFive VisionFive 2 1.2A and 1.3B is gmac.
You can read the PCB version of the current board by
get_pcb_revision_from_eeprom(), and then dynamically configure the
difference of gmac in spl_perform_fixups() according to different PCB
versions, so that one DT and one defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of
DDR capacity includes 2G/4G/8G, a DT can not support multiple
capacities, so the capacity size information is recorded to EEPROM, when
DDR initialization required capacity size information is read from
EEPROM.
If there is no information in EEPROM, it is initialized with the default
size defined in DT.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Pull request efi-2023-07-rc7
Documentation:
* Fix links to Linux kernel documentation
UEFI:
* Fix memory leak in efidebug dh subcommand
* Fix underflow when calculating remaining variable store size
* Increase default variable store size to 64 KiB
* mkeficapsule: fix efi_firmware_management_capsule_header data type
When tagging and releasing v2023.07 I forgot to drop the -rc6 tag. For
regular use, I've made a v2023.07.01 tag, but for here we can just drop
the -rc6 tag.
Signed-off-by: Tom Rini <trini@konsulko.com>
The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard.
The GW702x SOM contains the following:
- i.MX8M Plus SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- eQoS GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 3.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW7905 Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with I2C, SPI, GPIO
- EERPOM
- PCIe clock generator
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB 3.0 HUB
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.
Signed-off-by: Adam Ford <aford173@gmail.com>
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mn_beacon.env and reference it from the defconfigs.
Signed-off-by: Adam Ford <aford173@gmail.com>
Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.
Signed-off-by: Adam Ford <aford173@gmail.com>
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mm_beacon.env and reference it from the defconfig.
Signed-off-by: Adam Ford <aford173@gmail.com>
While testing the ethernet interface on a Variscite symphony carrier
board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware
configuration), the ethernet PHY is not detected.
The ADIN1300 datasheet indicate that the "Management interface
active (t4)" state is reached at most 5ms after the reset signal is
deasserted.
The device tree in Variscite custom git repository uses the following
property:
phy-reset-post-delay = <20>;
Add a new MDIO property 'reset-deassert-us' of 20ms to have the same
delay inside the ethphy node. Adding this property fixes the problem
with the PHY detection.
Note that this SOM can also have an Atheros AR8033 PHY. In this case,
a 1ms deassert delay is sufficient. Add a comment to that effect.
Fixes: c4c1ed68c1 ("imx8mn_var_som: Add support for Variscite
VAR-SOM-MX8M-NANO board")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Select DM_ETH_PHY so that the reset-gpios property of the ethphy node
can be used.
Also select DM_PCA953X, which is needed for resetting the
ethernet PHY on the carrier board via the PCA9534 I/O expander.
Commit 4e5114daf9 ("imx8mn: synchronise device tree with linux") did
synchronise device tree with linux, which in effect removed obsolete
PHY reset properties and replaced them with new mdio DM
properties. But the commit didn't activate DM_ETH_PHY or DM_PCA953X.
Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Enable support to read and display configuration/manufacturing infos
from 4Kbit EEPROM located on SOM board.
Note: CONFIG_DISPLAY_BOARDINFO is automatically selected for ARM arch.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Getting
Found /vpu_g1@38300000 node
Modify /vpu_g1@38300000:status disabled
Found /vpu_g2@38310000 node
Modify /vpu_g2@38310000:status disabled
etc. on the console on every boot is needlessly verbose. Demote the
"Found ..." lines to debug(), which is consistent with other instances
in soc.c.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The single binary version of u-boot for XEA board is used to debrick and
factory programming.
The produced u-boot.sb is a single file, which allows having fully
operational u-boot prompt loaded with imx287 ROM.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The XEA board now supports the DM_SERIAL feature in u-boot.
The SPL is using the SPL_OF_PLATDATA - i.e. NOT SPL_DM_SERIAL to
reduce the overall size of the SPL binary.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The CONFIG_PL011 used by all other ARCH_MX28 based boards is not
supporting DM_SERIAL. Instead, other define - namely CONFIG_PL01X_SERIAL
shall be used by boards supporting DM_SERIAL.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The in-spl enabled DM serial console requires the board setup to be
able to parse SPL_OF_PLATDATA based serial driver (pl01x) for the
imx28 based XEA board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
When DM_SERIAL is enabled on mxs (i.e. imx28) platform, the console
early initialization must be postponed until the driver model is
correctly setup.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Before this change the FR_TXFF (Transmit FIFO full) bit (5 in
HW_UARTDBG_FR) has been used to assess if there is still data pending
to be sent via UART.
This approach is problematic, as it may happen that serial is in the
middle of transmission (so the TX FIFO is NOT full anymore) and this
test returns true infinitely. As a result, for example in _serial_flush()
DM serial function we are locked in endless while().
The fix here is to test explicitly if the TX FIFO is empty.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Before this change, building this driver for SPL with enabled SPL_DM_SERIAL
was problematic, as '-Wunused-const-variable=' warning was visible.
Now, the code is only considered when u-boot proper is build.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
As imx28 family of SoCs is NOT supporting the Common Clock Framework (CCF)
the 'clks' property shall NOT be enabled by default.
Without this change u-boot proper before relocation tries to bind driver
(which doesn't exists) for this device. As a result, pre-relocation DTB
parsing is finished with error and the board hangs in a very early stage
of u-boot proper boot process.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The imx287 SoC doesn't support common clock framework (CCF), so the
'clocks' property is removed to avoid early (i.e. in SPL) errors when
SPL_OF_PLATDATA is used.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The DM_SERIAL implicitly requires CONFIG_PL01X_SERIAL, which
allows support for both serial IP block versions (i.e. PL011 and
PL010).
The decision about used IP block is based on the compatible string,
when DM is used.
In the XEA, the OF_PLATDATA is used to allow usage of serial driver in
the SPL (as the size of SPL is crucial). In this case one cannot extract
the type of IP block from .data field (corresponding to compatible) and
it must be explicitly read at probe from dtoc generated, u-boot specific
property.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After enabling DM_SERIAL for XEA board, the same serial shall be used
in the SPL (with SPL_OF_PLATDATA support).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This code fixes following WARNING:
DTOC spl/dts/dt-plat.c
fsl_imx28_clkctrl: WARNING: the driver fsl_imx28_clkctrl was not found in the driver list
As imx28 doesn't yet support common clock framework, this prevents from
DTOC warnings during SPL build.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After the re-sync with Linux kernel (v6.0) of the XEA DTS
(SHA1: 7d08ddd09b) the alias
for SPI bus, to which SPI-NOR memory is connected, has changed from
'spi3' to 'spi2'.
To be in sync with current u-boot's xea dts, the default bus number
(which allows running 'sf probe' without any extra parameters given)
has been adjusted.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After the commit (SHA1: 7d08ddd09b) some
u-boot specific XEA FEC related properties have been replaced by ones
from the Linux kernel.
To be more specific - XEA board (and imx287 in general) has built L2
switch connected to FEC, which needs some special treatment.
In u-boot it is handled with 'mac0' node, whereas Linux uses dedicated
switch DTS node.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After the re-sync with Linux Kernel's DTS
(SHA1: 7d08ddd09b), the XEA's
descripion has nodes and properties, which are NOT utilized
in the u-boot.
To avoid confusion - those are deleted.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add new i.MX 8M Plus Quad SKU to ConfigBlock handling.
0070: Verdin iMX8M Plus Quad 8GB WB IT
This SKU is identical to 0066 but supporting Industrial Temperature range.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
This patch adjusts XEA's PMU setup as this board is supposed to be
mainly powered from DCDC_BATT source.
Moreover, in this HW design the VDD_4P2 is not used as well.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The IMX28 PMU (Power Management Unit) has a dedicated Linear Regulator
to produce (by default) 4.2V output - available outside the chip as
VDD_4P2.
When system is supposed to not use VDD5V as a main power source - instead
the DCDC_BATT is used; it is safe to disable this regulator.
As the in-PMU DCDC switching regulator (from which DCDC_VDDA, DCDC_VDDIO
and DCDC_VDDD are generated) can be driven from DCDC_BATT or output
of this 4P2 regulator - by disabling the latter the use of the DCDC_BATT
is forced.
To be more specific - according to NXP's AN4199 the DCDC_BATT source is
preferred (over VDD5V), as more efficient and stable source for
industrial applications.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This new Kconfig option allows disabling the in-PMU battery charging
block. This may be required when DCDC_BAT source is powered not from
battery, but from already regulated, good quality source.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source (DCDC_BAT).
This option may be set on systems, where the 5V is NOT supposed to be
in any scenario powering the system - for example on systems where
DCDC_BAT is connected to fixed and regulated 4.2V source (so the
"battery" is not present).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Update the venice board documentation to show how to install to the
various eMMC hardware partitions available as the same binary firmware
can be placed in either user/boot0/boot1 without build-time config
changes. Note that the boot offsets differ depending on the SoC and the
eMMC hardware partition.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
To allow U-Boot to fit within emmc boot partitions move the env from
just under 16MiB to just under 4MiB as some emmc devices used on venice
boards have 4MiB boot partitions. This still leaves plenty of room for
U-Boot.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.
Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.
Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Determine the U-Boot env hardware partition depending on the boot
device.
This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to adjust for
IMX8MN and IMX8MP when booting from an eMMC boot partition due
to IMX BOOTROM v2 using an SPL offset of 0 for boot partitions
and 32K for the user partition.
In order to allow the same firmware to run on both user and boot
hardware partitions adjust raw_sect dynamically at runtime.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add GPIO name lookup so that you can act on GPIO's by name vs controller
id:
Before:
u-boot=> gpio input pci_wdis#
GPIO: 'pci_wdis#' not found
Command 'gpio' failed: Error -22
After:
u-boot=> gpio input pci_wdis#
gpio: pin pci_wdis# (gpio 103) value is 1
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This is required to boot a FIT image, otherwise the caam_jr driver is
not initialized and the hash verification fails with the following
error:
Verifying Hash Integrity ... sha256dev_get_priv: null device
CAAM was not setup properly or it is faulty
Signed-off-by: Sergio Prado <sergio.prado@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Change boot device logic to also allow environment stored in fat and
in ext4 when booting from SD or eMMC.
As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at
env_get_location to use IS_ENABLED instead for all modes, returning
NOWHERE when no valid mode is found.
This solution is based on (with added SPL support):
Link: https://lore.kernel.org/all/20211020191626.3648540-1-ricardo@foundries.io/
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The imx8mm_beacon SOM has a QSPI part attached to the FSPI controller.
Update the header and spl files to support booting from NOR flash and
add imx8mm_beacon_fspi_defconfig to support this configuration.
Signed-off-by: Adam Ford <aford173@gmail.com>
In order to use the FlexSPI interface in U-Boot, configure
the alias to make spi0 point to flexspi.
With that enabled, sf probe detects the QSPI part as:
SF: Detected n25q256ax1 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
Signed-off-by: Adam Ford <aford173@gmail.com>
Debian's arm64 UEFI Secure Boot shim makes the EFI variable store run
out of space while mirroring its MOK database to variables. This can be
observed in QEMU like so:
$ tools/buildman/buildman -o build/qemu_arm64 --boards=qemu_arm64 -w
$ cd build/qemu_arm64
$ curl -L -o debian.iso \
https://cdimage.debian.org/debian-cd/current/arm64/iso-cd/debian-12.0.0-arm64-netinst.iso
$ qemu-system-aarch64 \
-nographic -bios u-boot.bin \
-machine virt -cpu cortex-a53 -m 1G -smp 2 \
-drive if=virtio,file=debian.iso,index=0,format=raw,readonly=on,media=cdrom
[...]
=> # interrupt autoboot
=> env set -e -bs -nv -rt -guid 605dab50-e046-4300-abb6-3dd810dd8b23 SHIM_VERBOSE 1
=> boot
[...]
mok.c:296:mirror_one_esl() SetVariable("MokListXRT43", ... varsz=0x4C) = Out of Resources
mok.c:452:mirror_mok_db() esd:0x7DB92D20 adj:0x30
Failed to set MokListXRT: Out of Resources
mok.c:767:mirror_one_mok_variable() mirror_mok_db("MokListXRT", datasz=17328) returned Out of Resources
mok.c:812:mirror_one_mok_variable() returning Out of Resources
Could not create MokListXRT: Out of Resources
[...]
Welcome to GRUB!
This would normally be fine as shim would continue to run grubaa64.efi,
but shim's error handling code for this case has a bug [1] that causes a
synchronous abort on at least chromebook_kevin (but apparently not on
QEMU arm64).
Double the default variable store size so the variables fit. There is a
note about this value matching PcdFlashNvStorageVariableSize when
EFI_MM_COMM_TEE is enabled, so keep the old default in that case.
[1] https://github.com/rhboot/shim/pull/577
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The efi_var_mem_free() function calculates the available size for a new
EFI variable by subtracting the occupied buffer size and the overhead
for a new variable from the maximum buffer size set in Kconfig. This
is then returned as QueryVariableInfo()'s RemainingVariableStorageSize
output.
This can underflow as the calculation is done in and processed as
unsigned integer types. Check for underflow before doing the subtraction
and return zero if there's no space.
Fixes: f1f990a8c9 ("efi_loader: memory buffer for variables")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is
selected without GPIO which ends up in compilation error:
undefined reference to `dm_gpio_set_value'
undefined reference to `dm_gpio_get_value'
undefined reference to `dm_gpio_free'
undefined reference to `gpio_request_by_name'
Signed-off-by: Michal Simek <michal.simek@amd.com>
[trini: Fix configs which had relied on these select's]
Signed-off-by: Tom Rini <trini@konsulko.com>
As implemented in the arch/arm/mach-rockchip/tpl.c file,
the CONFIG_TPL_BANNER_PRINT option will not work
if either of these options is not enabled.
Add dependency constraints to the CONFIG_TPL_BANNER_PRINT option
definition to prevent configuration problems
where option is enabled but do not take effect.
Suggested-by: Yanjie Ren <renyanjie01@gmail.com>
Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn>
CONFIG_SYS_CONSOLE_ENV_OVERWRITE is implemented in common/console.c
when "#if CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV)" is met.
It is recommended to add dependency constraints to its definition.
Suggested-by: Yanjie Ren <renyanjie01@gmail.com>
Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn>
CONFIG_CMD_SAVES is used to enable support for the "saveenv" command
and is only implemented in cmd/load.c
when "#if defined(CONFIG_CMD_LOADS)" is met.
It is recommended to add dependency constraints to its definition.
Prevents "saveenv" command from not being supported
when "CONFIG_CMD_SAVES=y CONFIG_CMD_LOADS=n".
Suggested-by: Yanjie Ren <renyanjie01@gmail.com>
Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn>
Reviewed-by: Simon Glass <sjg@chromium.org>
Docs describe 'make clean' to delete most generated files, 'make
mrproper' to delete current configuration and all generated files. This
test tries to assert it.
Idea is to search remaining files by patterns in copies of the initial
out-of-source build, which has two advantages:
- looking in an out-of-source build dir allows to tell generated source
code from committed source code
- copying is fast (compared to rebuilding each time) which allows to do
a "world clean"
Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
sandbox can generate DT overlays, but they were not cleaned.
Extend the explicit clean-files list accordingly.
Fixes: 95300f203f ("pytest: add sandbox test for "extension" command")
Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
'make clean' did not descend into arch/$ARCH/dts for arc, m68k, nios2,
sh, xtensa.
Fix it by adding the missing archs to the explicit clean-dirs list.
Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
VPL artifacts like example vpl/u-boot-vpl are currently not removed by
'make clean'.
We can clean them just as it's already done for SPL and TPL.
Fixes: f86ca5ad8f ("Introduce Verifying Program Loader (VPL)")
Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
On 'make clean', generated C files in tools/env/ and tools/boot/ are
currently not removed, but they should.
Auto-generation for shared sources was first introduced with
ad80c4a322 ("kbuild, tools: generate wrapper C sources automatically
by Makefile"). Cleanup later regressed (see Fixes:), because shared
files were moved out of lib/ and common/, but 'clean-dirs := lib common'
was not adjusted accordingly. Further, the generated
tools/env/embedded.c became a sibling to project files, which prevents
directory-wise cleanup at all.
To solve it, we establishe tools/generated/ as the sole place for
generated sources. Wrappers are now generated as
tools/generated/<orig_dirname>/<orig_filename>, and 'make clean' can
remove tools/generated/ as a whole (Linux Makefile.asm-generic headers
are cleaned similarly). This way we don't have to maintain separate
clean-files or clean-dirs entries for each single added or moved wrapper
file.
Fixes: 0649cd0d49 ("Move environment files from common/ to env/")
Fixes: 19a91f2464 ("Create a new boot/ directory")
Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
[trini: Correct mkfwupdate case]
Signed-off-by: Tom Rini <trini@konsulko.com>
The 'booti' command is unable to boot Image.gz due to the absence
of required environment variables 'kernel_comp_addr_r' and
'kernel_comp_size'.
This commit adds these variables and reorganizes the memory layout
to prevent any overlap between binaries and files.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.
This patch also updates the information about PLICSW.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
There is a problem that the rates of PLL0 and PLL1 are set incorrectly
because the postdiv1_mask value is incorrectly entered when setting
the pll clk reg. Modify postdiv1's mask value to be put correctly.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Use the latest OpenSBI v1.2 release binaries for the RISC-V CI.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The dts sync from Linux leaves mac0/ethernet1 enabled on icicle, but
U-Boot does not currently set a mac address for it. Expand on the code
which currently sets the mac for mac1/ethernet0 to optionally set the
mac address for the second ethernet.
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
for this & what is going to appear in mainline linux is going to be
incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
soc.dtsi level as they may not be possible depending on the design
programmed to the FPGA
- clock output names - there are defines for the clock indices, these
should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
is removed.
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
If we're building non FU540/FU740 SoC drivers, then the sifive-prci.o
is not needed. Only build this when CONFIG_CLK_SIFIVE_PRCI is selected.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
These seem to be missing, and trying to build ubifs without them
is causing errors due to these being missing.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add implementations of the local_irq_{save,restore} macros so that
<asm/atomic.h> can be used with riscv.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add a link from <asm/atomic.h> to the generic one to allow
things like ubifs to be built. This can be extended with
riscv AMO ops at a later date.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
OpenSBI already implements some extensions that are not ratified yet:
* Debug Console Extension (DBCN)
* System Suspend Extension (SUSP)
* Collaborative Processor Performance Control Extension (CPPC)
Allow the sbi command to display these.
Provide the FID definitions of the Debug Console Extension. We can use that
extension for an early debug console driver.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
pimg64 image pointer is dependent on ESBC_ADDR_64BIT config, which is
getting disabled, due to dependency on ESBC_HDR_LS.
ESBC_HDR_LS is required for LS-CH3 platforms.
So, removing the dependency on ESBC_HDR_LS.
Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1046afrwy defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1046ardb defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all".
In order to keep the serial nodes in sync with their representation in
the Linux dts, add these u-boot specific properties to *-u-boot.dtsi
files.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Pick up the serial node descriptions from Linux v6.3 for the ls1046ardb
and ls1046afrwy boards and their dependencies. Including the
fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include
directives to explicitly go through the C preprocessor for all boards in
the ls1046a SoC family.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1043ardb defconfigs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all".
In order to keep the serial nodes in sync with their representation in
the Linux dts, add these u-boot specific properties to *-u-boot.dtsi
files.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Pick up the serial node descriptions from Linux v6.3 for the ls1043ardb
board and its dependencies. Including the fsl,qoriq-clockgen.h and
arm-gic.h headers forces us to change the include directives to explicitly
go through the C preprocessor for all boards in the ls1043a SoC family.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Compiling on armv7 results in:
tools/renesas_spkgimage.c: In function ‘spkgimage_parse_config_line’:
tools/renesas_spkgimage.c:76:66: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 3 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
76 | "config error: unknown keyword on line %ld\n",
| ~~^
| |
| long int
| %d
77 | line_num);
| ~~~~~~~~
| |
| size_t {aka unsigned int}
The correct printf specifier for size_t is '%zu'.
Fixes: afdfcb11f9 ("tools: spkgimage: add Renesas SPKG format")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
For changing the USB OTG node status from "okay" to "disabled" more
space is needed, so call fdt_increase_size() to avoid the following
error:
```
U-Boot 2023.07-rc5-0.0.0-devel+git.580eb31199be (Jun 27 2023 - 13:39:58 +0000)
CPU: Freescale i.MX7S rev1.2 800 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 30C
Reset cause: POR
DRAM: initcall sequence 8786eafc failed at call 8781b351 (err=-3)
### ERROR ### Please RESET the board ###
```
Ideally, fdt_status_disabled() should call fdt_increase_size() internally,
so that there would be no need for manually calling it in board code.
Do it manually for now to fix the regression.
Based on the code from board/CZ.NIC/turris_omnia/turris_omnia.c.
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Toradex Colibri iMX7S
The regulator core can return different codes which are not considered
a real error for this function.
Return success in such cases.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Some devices share a regulator supply, when the first one will request
regulator disable, the second device will have it's supply cut off before
graciously shutting down. Hence there will be timeouts and other failed
operations.
Implement a reference counter mechanism similar with what is done in
Linux, to keep track of enable and disable requests, and only disable the
regulator when the last of the consumers has requested shutdown.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently, spl_end points to the __bss_end address, which
is an external RAM address instead of the end of the SPL text
section in the internal RAM.
This causes boot failures on imx6-colibri, for example:
```
Trying to boot from MMC1
SPL: Image overlaps SPL
resetting ...
```
Fix this problem by assigning spl_end to _image_binary_end, as this
symbol properly represents the end of the SPL text section.
From u-boot-spl.map:
.end
*(.__end)
0x00000000009121a4 _image_binary_end = .
Fixes: 77aed22b48 ("spl: spl_legacy: Add extra address checks")
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de> # DH i.MX6Q DHCOM PDK2
Pass _image_binary_end to make a standard way to indicate the end
of the text section in SPL.
The motivation for this is to have a uniform way to handle
the SPL boundary checks.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Pass _image_binary_end to make a standard way to indicate the end
of the text section in SPL.
The motivation for this is to have a uniform way to handle
the SPL boundary checks.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Use of CONFIG_SPL_FIT_SIGNATURE=y cause CONFIG_LEGACY_IMAGE_FORMAT=n as
default, this prevent boot scripts in legacy image format from working
and was an unintended change in the listed fixes commits:
Wrong image format for "source" command
Add CONFIG_LEGACY_IMAGE_FORMAT=y to defconfig for affected boards to
restore support for boot scripts in legacy image format.
Fixes: 3bf8e40807 ("board: rockchip: add Radxa ROCK5B Rk3588 board")
Fixes: cf777572ca ("rockchip: rockpro64: Use SDMA to boost eMMC performance")
Fixes: 6e2b8344d6 ("rockchip: rock-pi-4: Use SDMA to boost eMMC performance")
Fixes: 1bf49d5a4a ("rockchip: rk3566-radxa-cm3-io: Update defconfig")
Fixes: 703c170b40 ("rockchip: rk3568-evb: Update defconfig")
Fixes: 68000f750a ("rockchip: rk3568-rock-3a: Update defconfig")
Fixes: 6fb02589a6 ("rockchip: rk3588-evb: Update defconfig")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
GPIOD_ACTIVE_LOW is not enough to configure a GPIO as an output, we need
GPIOD_IS_OUT as well.
Fixes: b252d79b09 ("usb: dwc3: Add support to reset usb ULPI phy")
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Pull request efi-2023-07-rc6
Documentation:
* man-pages for the loads and saves commands
UEFI:
* fix implementation of allow_unaligned() for armv7 and arm11
Rename current assembler implementation of allow_unaligned() to
arm11_arch_cp15_allow_unaligned() and add it into arm11.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot, where the CPU specific
allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca3767 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
Fixes: d47a774680 ("arm: arm11: allow unaligned memory access")
Signed-off-by: Marek Vasut <marex@denx.de>
Rename current assembler implementation of allow_unaligned() to
v7_arch_cp15_allow_unaligned() and add it into armv7.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot on ARMv7a i.MX6Q, where the
CPU specific allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca3767 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
Fixes: 78f90aaeec ("arm: armv7: allow unaligned memory access")
Signed-off-by: Marek Vasut <marex@denx.de>
The HTC One X is a touchscreen-based, slate-sized smartphone
designed and manufactured by HTC that runs the Android operating
system. The One X features a 4.7" display, an Nvidia Tegra 3
quad-core chip, 1 GB of RAM and non-extendable 32 GB of internal
storage. UART-A is default debug port.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com>
Tested-by: Ion Agorria <ion@agorria.com>
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
LG X3 is a development board based on Nvidia Tegra 3 SoC
on base of which Optimus 4X HD and Optimus Vu were created.
Both smartphones feature a 4.7" and 5" panels respectively,
an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 16/32 GB
of internal storage. Optimux 4X HD additionally has a micro
SD slot.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nexus 7 is a mini tablet computer co-developed by Google and Asus
that runs the Android operating system. The Nexus 7 features a 7"
display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB
of internal storage.
This patch brings support for all 3 known ASUS/Google devices:
- Nexus 7 (2012) E1565
- Nexus 7 (2012) PM269
- Nexus 7 (2012) 3G - tilapia
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS Grouper E1565
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The ASUS Transformer T30 family are 2-in-1 detachable tablets
and AiO developed by ASUS that run the Android operating system
(TF600T runs Windows RT and P1801-T runs Android and Windows).
The T30 Transformers feature a 10.1-inch display (apart P1801-T),
an Nvidia Tegra 3 quad-core chip, 1/2 GB of RAM, and 16/32 GB of
storage. Transformers board derives from Nvidia Cardhu development
board.
This patch brings support for 7 known Transformer devices:
- ASUS Transformer Prime TF201
- ASUS Transformer Pad TF300T/TF300TG/TF300TL
- ASUS VivoTab RT TF600T (Windows RT based)
- ASUS Transformer Infinity TF700T
- ASUS Portable AiO P1801-T
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # all devices
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This is a small tool for calculation of SoC UID based on the same
Linux function. It can be further used for generation of device
unique data like mac address or exposing it as serial number.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Disabling the network related features in defconfig causes build to
fail so make them optional.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
GPIO keyboard is used on many newly upstreamed devices.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
board_mmc_get_env_part() is not called as the default implementation
of mmc_get_env_part() is used.
Fix this problem by directly calling mmc_get_env_part() instead.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Currently the PowerPC build job in Azure will hit the maximum time limit
for a build and stop. Looking at the job, the easiest path to reducing
it is to move Keymile vendor boards to their own job and exclude them
from the PowerPC one (and while at this, the ls102 job).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Currently, the imx93_evk is configured with CONFIG_ENV_IS_IN_MMC and the
chosen environment offset in the config is 0x400000. Unless the user
programs the associated fuses, this offset is the default secondary boot
image offset used by the i.MX 93 ROM bootloader. With certain
combinations of environmental variables, the CRC and beginning of the
environment can potentially falsely appear as a valid boot image
container header. If the expected "sw_version" offset within this
mistaken boot image container is greater than the primary's, the ROM
bootloader can skip booting of the primary image altogether and attempt
to boot with the content of the environment data. This will then hang
the system.
To fix this, move the environment from 0x400000 to 0x700000 reserving up
to 3 MB at 0x400000 for any actual secondary user image container.
Signed-off-by: Ken Sloat <ken.s@variscite.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Using CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y and CONFIG_OF_LIVE=y triggers
a Data Abort exception from unaligned memory access when the pinctrl
driver iterate node properties, e.g. for UART2 on RK3568.
setting mux of GPIO0-24 to 1
setting mux of GPIO0-24 to 1
"Synchronous Abort" handler, esr 0x96000021
elr: 000000000000e554 lr : 000000000000e54c
x 0: 0000000000000a5c x 1: 0000000000000a5c
x 2: 0000000000000007 x 3: 0000000000000065
x 4: 0000000000000007 x 5: 0000000000022d4e
x 6: 0000000000000a7c x 7: 00000000000227a4
x 8: 0000000000021cf0 x 9: 0000000000000a7c
x10: 0000000000021cf0 x11: 0000000000021cf0
x12: 00000000003fda1c x13: 0000000000000007
x14: 00000000003fd9ec x15: 000000000001c0ff
x16: 0000000007000000 x17: 00000000fdccd028
x18: 00000000003fde20 x19: 0000000000000018
x20: 0000000000020670 x21: 0000000000000000
x22: 00000000003fdb00 x23: 00000000003fef90
x24: 0000000000020688 x25: 0000000000000000
x26: 0000000000000001 x27: 00000000003ffc50
x28: 0000000000000000 x29: 00000000003fda60
Code: b94083e1 97ffd508 93407c01 37f81260 (f9401038)
Resetting CPU ...
Fix this by replacing the loop to access node properties with use of
ofnode_for_each_prop instead of the current ifdef.
Also continue to next prop instead of aborting at first sign of an
unknown property.
This fixes the Data Abort exception and also pinconf of e.g. pull and
drive in SPL, e.g. for UART2 on RK3568.
setting mux of GPIO0-24 to 1
setting mux of GPIO0-24 to 1
setting pull of GPIO0-24 to 5
setting mux of GPIO0-25 to 1
setting mux of GPIO0-25 to 1
setting pull of GPIO0-25 to 5
Fixes: e7ae4cf27a ("pinctrl: rockchip: Add common rockchip pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This fixes access to camera sensor over I2C during probe time in
the kernel. (Kernel will fix I/0 port voltage by itself, but the
timing depends on probe order of the drivers, so the fix can
come after the camera sensor driver already failed to probe.)
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
The support for #address-cells=2 has a loophole: if the reg is actually 0,
but the #address-cells is actually 1, like in such case below:
syscon {
#address-cells = <1>;
phy {
reg = <0 0x10>;
};
};
then the second u32 of the 'reg' is the size, not the address.
The code should check for the parent's #address-cells value, and not
assume that if the first u32 is 0, then the #address-cells is 2, and the
reg property is something like
reg = <0 0xff00 0x10>;
Fixed this by looking for the #address-cells value and retrieving the
reg address only if this is ==2.
To avoid breaking anything I also kept the check `if reg==0` as some DT's
may have a wrong #address-cells as parent and even if this commit is
correct, it might break the existing wrong device-trees.
Fixes: d538efb9ad ("phy: rockchip: inno-usb2: Add support #address_cells = 2")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In current linker script both .efi_runtime_rel and .rela.dyn sections
are of RELA type whose entry size is either 12 (RV32) or 24 (RV64).
These two are arranged as a continuous region on purpose so that the
prelink-riscv executable can fix up the PIE addresses in one loop.
However there is an 'ALIGN(8)' between these 2 sections which might
cause a gap to be inserted between these 2 sections to satisfy the
alignment requirement on RV32. This would break the assumption of
the prelink process and generate an unbootable image.
Fixes: 9a6569a043 ("riscv: Update alignment for some sections in linker scripts")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Two conflicting bootcmds were included in the environment.
Streamline to defining the bootcmd only in the env file.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
The current mechanism is unnecessarily complex. Simplify the whole mechanism
such that the entire fitImage is signed, IVT is placed at the end, followed
by CSF, and this entire bundle is also authenticated. This makes the signing
scripting far simpler.
Signed-off-by: Marek Vasut <marex@denx.de>
In case the DEBUG is enabled, these three lines warn about cast of
pointer to integer of different size, add the missing casts to fix
the warnings.
Signed-off-by: Marek Vasut <marex@denx.de>
Fixed when build xilinx_zynqmp in long directory ( >256):
| /buildarea1/testtest/wr_build/wr1023test_secureboot/test1-what/test2-what/test3-what/test4-what/test5-what/test6-what/test7-what/test8-what/test9-what/test10-what/test11-what/test12-what/build/tmp-glibc/work/xilinx_zynqmp-wrs-linux/u-boot-xlnx/1_v2023.01-xilinx-v2023.1+gitAUTOINC+40a08d69e7-r0/build/fitImage-linux: Image file name (uboot-mkimage) too long, can't create tmpfile.
| Error: Bad parameters for FIT image type
Signed-off-by: Mingli Yu <mingli.yu@windriver.com>
With some changes to our mapping files in gitdm, re-generate the last
few releases worth of statistics to correctly reflect contributions. We
only go back this far to try and find a balance between highlighting
contributions and still being reviewable.
Signed-off-by: Tom Rini <trini@konsulko.com>
The intent here was to allow ANSI codes to be disabled, since it was
proving impoosible to test operation of the menu code when it kept moving
the cursor. Unfortunately this ended up in the patch.
Correct this by enabling ANSI again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Pali Rohár <pali@kernel.org>
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Fixes: 32bab0eae5 ("menu: Make use of CLI character processing")
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reformat and rewrite the documentation for this command.
This is a complicated command, so further improvements are welcome.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bring this file into the documentation. For now it is not in the correct
format for a command, but it is valid rST. Futher work will improve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having this as an addition to the end, move this into the
main body of the spec, rewriting as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid reference to uImage which is the old format. Drop the historical
language at the top and rewrite a few other sections. Correct the
U-Boot filename which is now in the boot/ directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bring these files into the documentation.
Fix 'wtih' and 'it' typos and repeated 'could' while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this document and convert it to rST. Make minimal changes, enough
for it to build successfully.
Future patches will tidy this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a new usage/fit directory which will house information about FIT.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode"
series flash speed and mode wasn't passed to driver anymore, which
resulted in:
Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19)
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
Fix it by syncing SPI node of affected device dts with Linux kernel dts.
The changed SPI bus frequency doesn't influence stability of read/write
operations.
Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
This command is useful to power off the system from within U-Boot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom <twarren@nvidia.com>
This command is useful to power off the system from within U-Boot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom <twarren@nvidia.com>
To quote the author:
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses to
aliased (not physically present) addresses are cached and wrong size is
returned.
This was discovered while working on a TI AM625 based board where cache
is normally enabled, see commit c02712a748 ("arm: mach-k3: Enable
dcache in SPL").
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a748 ("arm: mach-k3: Enable dcache in SPL").
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the write to the HPRT register which treat W1C fields
as if they were mere RW. This leads to unintended clearing of such fields
This bug was found during the testing on Simics model. Referring to
specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
Databook (3.30a)"5.3.4.8 Host Port Control and Status Register (HPRT)", the
HPRT.PrtPwr is cleared by this mistake. In the Linux driver (contrary to
U-Boot), HPRT is always read using dwc2_read_hprt0 helper function which
clears W1C bits. So after write back those bits are zeroes.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Commands causing reset in some configs:
When bootflow scan is run, this will cause a UCLASS_BOOTDEV device to
be added as sibling of those UCLASS_BLK devices found in the search
chain defined in environment variable "boot_targets", until boot
succeeds from some device. This can happen automatically as part of
the default boot process on some boards (example: Rock Pi 4) depending
on the board configuration (DISTRO_DEFAULTS, BOOTSTD, BOOTCOMMAND,
etc.) because they have bootcmd=bootflow scan.
If boot doesn't succeed from any device, and usb is in boot_targets,
and an usb storage device is plugged to some usb port at boot time,
its UCLASS_MASS_STORAGE device will have a UCLASS_BOOTDEV device as
child, besides a UCLASS_BLK child.
If once the boot fails the user enters at the U-Boot shell prompt:
usb info
or
usb tree
The code in cmd/usb.c will eventually recurse into the UCLASS_BOOTDEV
device and pass a null usb_device pointer to usb_show_tree_graph() or
usb_show_info() (because it has no parent_priv_).
This causes a reset. The expected behaviour would be to ignore the
UCLASS_BOOTDEV device, continue listing the usb information and return
to the prompt.
Minimal test:
Another way to trigger this reset as a minimal test or on boards with
a different bootcmd would be:
- make sure "usb" is in environment variable boot_targets (might need
setenv boot_targets usb; and/or saveenv and reset), then, with a usb
storage device plugged to a usb port, run:
=> usb reset ; bootflow scan ; usb info
Solution:
Fix it (twice) by checking for null parent_priv_ and adding
UCLASS_BOOTDEV to the list of ignored class ids before the recursive
call.
This prevents the current particular problem with UCLASS_BOOTDEV, even
in case it ever gets some parent_priv_ struct which is not an
usb_device, despite being the child of a usb_device->dev. And it also
prevents possible future problems if other children are added to usb
devices that don't have parent_priv_ because they are not part of the
usb tree, just abstractions of functionality (like UCLASS_BLK and
UCLASS_BOOTDEV are now).
Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
dm_test_restore() is called after dm unit test is run.
But this function does not scan any nodes under /firmware since
it calls dm_scan_fdt().
This causes an issue. For instance, scmi_sandbox_agent device
will disappear after running 'ut dm scmi_sandbox_agent'.
So call dm_extended_scan() instead. This change will be coherent
with what dm_scan() and test_pre_run() does.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
DM_FLAG_PRE_RELOC flag is added into some drivers
by recent commits such as
1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC").
Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform
is too small, Developerbox will not boot due to lack of
heap memory.
This commit increases the size of heap memory.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Per GitHub Dependabot:
- Use setuptools 65.5.1 to avoid some DoS issue
- Use requests 2.31.0 to avoid leaking some proxy information
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At first SPI transfers, multiple chip selects can be
enabled simultaneously. This is due to chip select
polarity, which is not properly initialized for all
channels. This patch fixes the issue.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
The functions `psci_get_context_id` and `psci_get_target_pc`
are written in C, so the C compiler may clobber registers r0-r3.
Do not use these registers to save data across calls.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Use a variable (MKIMAGE_SIGN_PASSWORD) like already done for RSA to
allow the signing process to run in batch.
Signed-off-by: Stefano Babic <sbabic@denx.de>
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1
or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we
set offset to itself, and clang warns about this. Rework the logic so
that if sig is the second indicator we adjust the offset as today and if
it does not match the first indicator we return -EINVAL
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
If only FIT images are enabled and loading the FIT image fails,
spl_nor_load_image() should return an error instead of zero.
Without this patch:
>>SPL: board_init_r()
spl_init
Trying to boot from NOR
Unsupported OS image.. Jumping nevertheless..
image entry point: 0x0
With patch:
>>SPL: board_init_r()
spl_init
Trying to boot from NOR
SPL: failed to boot from all boot devices (err=-6)
.### ERROR ### Please RESET the board ###
Signed-off-by: Mario Kicherer <dev@kicherer.org>
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
[trini: Drop hunk changing disk/part.c as that breaks other users]
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
for SPL which is required to auto configure the PCIe devices.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Add kconfig options to enable NVME and PCI NVMe support in SPL
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote the author:
Now that the nvmxip block driver is merged we can add on top
of it the platform code to use GPT and FWU metadata in the
Corstone1000.
But first, push 2 fixes that are needed to make all this work:
- move nvmxip header to include
- setup fwu metadata structures as packed (we have a 32bit
writer - Secure enclave Cortex-M0 and a 64bit reader host
Cortex-A35)
Enable the newest features: nvmxip, fwu-metadata and
gpt. Commands to print the partition info, gpt info
and fwu metadata will be available.
Adjust also env boot script the address of the
bootbank with the new gpt layout, and also remove
the not needed kernel address bank0 and bank1
and retrieve function that would test the bank flag
before and now we are getting the info from the fwu
metadata.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
We need to distinguish between boot banks and from which
partition to load the kernel+initramfs to memory.
For that, fetch the boot index, fetch the correspondent
partition, calculate the correct kernel address and
then set the env variable kernel_addr with that value.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
it is expected that the firmware that runs before
u-boot somehow provide the information of the bank
for now we will fetch the info from the metadata
since the Secure enclave is the one responsible for
this information.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Move header to include to allow external code
to get the internal bdev structures to access
block device operations.
as at it, just add the UCLASS_NVMXIP string
so we get the correct output in partitions
listing.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
The fwu metadata in the metadata partitions
should/are packed to guarantee that the info is
correct in all platforms. Also the size of them
are used to calculate the crc32 and that is important
to get it right.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
First set of u-boot-atmel fixes for the 2023.07 cycle:
This small fixes set includes one init fix for scmi clocks and a missing
gpio_request for pm9g45.
serial: stm32: Fixes to avoid suprious characters
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
stm32mp: stm32prog: Add support of ENV partition type
config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
stm32: Add IWDG handling into PSCI suspend code
stm32: Fix OF_LIST on DHCOR
stm32: Add missing header for save_boot_params
stm32: Use __section(".data") with dot in the section name on DHSOM
stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
dts: stm32mp: alignment with v6.3
dts: stm32f769-disco: remove the dsi_host node
configs: stm32f746-disco: remove a useless comment
In case there is still chars from previous bootstage to transmit, wait
for TC (Transmission Complete) bit to be set which ensure that the last
data written in the USART_TDR has been transmitted out of the shift
register.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.
Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros
for video interface bus types")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Because clock devices are initialized by the SCMI server, if
CONFIG_CLK_SCMI is defined.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
The '_' character is discouraged in the node name, this patch adds the
new prefix of regulator subnode, with the '-' character, in STM32MP1 driver
to support the new naming rule in Linux kernel device trees.
It is a preliminary patch before Linux device tree synchronization
for STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change the default base for offset parsing with simple_strtoull(),
so offset in flashlayout is coded in base 10 by default, even if string
start with '0'. The Octal encoding is not supported. The base 16
is still supported when the '0x' header is detected.
This patch solves an unexpected parsing result when the address,
provided by decimal value is starting by 0, for example 0x4400 = 00017408
is a invalid with current code.
...
P 0x04 fsbl1 Binary mmc0 00017408 tf-a.stm32
....
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Avoid to ignore the OTP read/write error and transmits the error
to STM32CubeProgrammer.
Today the error is only displayed in log error:
so the user on HOST thinks the OTP operation is performed.
Reported-by: Mickael GARDET <m.gardet@overkiz.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: 75ea9e75931c ("stm32mp: stm32prog: add TEE support in stm32prog command")
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.
By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.
After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a protection in misc bsec ops for request with null size.
For example OP-TEE error occurs when get_eth_nb() return 0 in
setup_mac_address() for unknown part number because U-Boot read 0 OTPs.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The correct specifier of the section is ".data" and not "data",
use the former to place the variables in ".data" section.
Fixes: 731fd50e27 ("ARM: stm32: Implement board coding on AV96")
Fixes: 92ca0f7446 ("ARM: dts: stm32: Synchronize DDR setttings on DH SoMs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The get_stm32mp_rom_api_table() function is defined in sys_params.h ,
add the missing header to avoid compiler warning.
Fixes: dbeaca79b7 ("ARM: stm32: Factor out save_boot_params")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The ITS file used to build the images here lists three dtb files as
being used. Today, these are built by the logic that will over-build dtb
files based on SOC/etc symbols being set. To future proof this platform
and be generally correct, we list all 3 of the device trees used here in
OF_LIST.
Cc: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never
be disabled again. That includes low power states, which means that if the
IWDG is enabled, the SoC would reset itself after a while in suspend via
the IWDG. This is not desired behavior.
It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI,
and use that IRQ to wake the CPU up before the IWDG timeout is reached and
reset is triggered. This pre-timeout IRQ can be used to reload the WDT and
then suspend the CPU again every once in a while.
Implement this functionality for both IWDG1 and IWDG2 by reading out all
the unmasked IRQs, comparing the list with currently pending IRQs in GICv3:
- If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ,
wake up and let OS handle the IRQs
- If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending,
ping the respective IWDG and suspend again
This does not seem to have any adverse impact on power consumption in suspend.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove the support of the fastboot "oem format" command for STM32MP15x
boards and removed the associated env variable "partitions".
This command is not required; with fastboot tool, the GPT partition can
be handle with "flash" command in "gpt" target (=CONFIG_FASTBOOT_GPT_NAME),
for example: fastboot flash gpt gpt.bin
This patch avoids to define the GPT partitioning in U-Boot environment,
which is incompatible with planned modifications, for example to
support TF-A firmware update.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other
than 0 but it is not the case for STM32MP15 boards; it can be removed
to simplify the STM32MP15 defconfig files.
On STM32MP15x boards, we have only one USB device with instance 0,
so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with
the command "fastboot 0" and this define is not used in config files
(include/configs/stm32mp15_st_common.h).
Fixes: 4633fd51c5 ("stm32mp1: activate FASTBOOT on eMMC")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of "FWU_MDATA" partition type in flashlayout to select
the TF-A firmware update metadata partition type guid, associated to
U-Boot "system" partition type guid, FWU_MDATA_GUID introduced by
commit 2eaedc9516 ("FWU: Add FWU metadata structure and driver for
accessing metadata") and used in gpt_get_mdata_partitions() for
commit 554b38f7a5 ("FWU: Add FWU metadata access driver for GPT
partitioned block devices")
See also recommendation in FWU-PSA-A_DEN0118_1.0ALP3.pdf
4.1.2 Metadata integration with GPT
When embedded in a GPT, each metadata replica occupies a single
partition with PartitionTypeGUID = metadata_uuid.
UUID = 8a7a84a0-8387-40f6-ab41-a8b9a5a60d23
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of "ESP" partition type in flashlayout to select
the "EFI System Partition", associated to U-Boot "system"
partition type guid, PARTITION_SYSTEM_GUID =
C12A7328-F81F-11d2-BA4B-00A0C93EC93B.
This partition is the bootable partition for efi boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of "ENV" partition type in flashlayout to select
the "u-boot-env" GUID, with PARTITION_U_BOOT_ENVIRONMENT =
3de21764-95bd-54bd-a5c3-4abe786f38a8, that mean a partition
holding a U-Boot environment introduced by
commit c0364ce1c6 ("doc/README.gpt: define partition type
GUID for U-Boot environment")'
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This fixes the following run time error message:
set_dir_flags: error: gpio PIOD3 not reserved
set_dir_flags: error: gpio PIOC14 not reserved
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Disable CMD_MTDPARTS as it's no more needed and it is strongly
encouraged to avoid using this command anymore.
(see comments in ./cmd/Kconfig:2422).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove the function board_mtdparts_default and the associated file
or configs, only used by the CONFIG_SYS_MTDPARTS_RUNTIME now removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Copy the fixed partition nodes from U-Boot device tree to Linux kernel
device tree to dynamically configure the MTD partitions.
fdt_copy_fixed_partitions is only based on device tree
and replace the function fdt_fixup_mtdparts based on mtdparts variable;
the variable mtdid and mtdparts are not more required.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add partitions subnode in flash0 and nand nodes for all stm32mp157xx-ev1
boards. Update only the file stm32mp157c-ev1-*u-boot.dtsi, included by
other files stm32mp15*-ev1-*-u-boot.dtsi.
For SCMI variant of device tree used with stm32mp15_defconfig
add partitions needed by TF-A firmware update:
- metadata to save the TF-A information: 2 copy
- fip-a / fip-b: two FIP slots, used for system A/B (seamless) update
- the previous "fsbl" partition with 2 copy of TFA is replaced
by 2 partitions (only one copy in each MTD partition) to simplify
the update: no need to managed this copy on update, need to update the
two partition (skip bad block for NAND)
The offset for ENV partition are also updated in stm32mp15_defconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1
stm32mp15xx-*-scmi-u-boot.dtsi with latest patches on files
stm32mp15xx-*-u-boot.dtsi.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Motivation for this patch is to remove usage of function define
in cmd/mtdparts.c interface, based on env variables mtdids and mtdparts:
mtdparts_init() and find_dev_and_part().
See commit 938db6fe5d ("cmd: mtdparts: describe as legacy")
Now, all MTD devices are populated with their partition's information
found in DT, accessible in MTD devices. Use these information to find
the wanted partitions, no more need of find_dev_and_part() usage.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
With MTD support in driver model, the direct call of mtdparts_init
should be avoided and replaced by mtd_probe_devices.
With the modificaton when MTDIDS/MTDPARTS are empty the OF fallback
with partition describe in device tree is correctly performed,
introduced by commit dc339bf784 ("mtd: add support for parsing
partitions defined in OF").
With this patch the dependency with CONFIG_CMD_MTDPARTS is removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a new function fdt_copy_fixed_partitions to copy the fixed
partition nodes from U-Boot device tree to Linux kernel
device tree and to dynamically configure the MTD partitions.
This function fdt_copy_fixed_partitions is only based on device tree
with livetree compatible function and replace the function
fdt_fixup_mtdparts based on mtdparts variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch is a preliminary patch to use ofnode function
is fdt_support to read the U-Boot device tree with livetree
compatible functions.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Running the protocols selftest more than one times fails with
=> setenv efi_selftest 'manage protocols' && bootefi selftest
Testing EFI API implementation
Selected test: 'manage protocols'
Setting up 'manage protocols'
Setting up 'manage protocols' succeeded
Executing 'manage protocols'
Executing 'manage protocols' succeeded
Tearing down 'manage protocols'
Tearing down 'manage protocols' succeeded
Summary: 0 failures
=> bootefi selftest
Testing EFI API implementation
Selected test: 'manage protocols'
Setting up 'manage protocols'
lib/efi_selftest/efi_selftest_manageprotocols.c(88):
ERROR: InstallProtocolInterface failed
lib/efi_selftest/efi_selftest.c(89):
ERROR: Setting up 'manage protocols' failed
Tearing down 'manage protocols'
Tearing down 'manage protocols' succeeded
Summary: 1 failures
The reason is that we don't set the handles to NULL after deleting and
freeing them. As a result the subsequent protocol installation will try
to use an existing handle which we just removed that from our object list.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of discovering the ID of the device and call two different
functions for a block device or a partition, we can rewrite
efi_disk_remove() and handle the minor differences between the two
variants internally. As a results we can simplify efi_disk_remove()
a lot and get rid of the extra efi_disk_delete_raw/blk calls.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If a handle is not found, return 0 to let the device be removed.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Running the controller selftest more than one times fails with
=> setenv efi_selftest 'controllers' && bootefi selftest
Testing EFI API implementation
Selected test: 'controllers'
Setting up 'controllers'
Setting up 'controllers' succeeded
Executing 'controllers'
Executing 'controllers' succeeded
Summary: 0 failures
=> bootefi selftest
Testing EFI API implementation
Selected test: 'controllers'
Setting up 'controllers'
lib/efi_selftest/efi_selftest_controllers.c(280):
ERROR: InstallProtocolInterface failed
lib/efi_selftest/efi_selftest.c(89):
ERROR: Setting up 'controllers' failed
Summary: 1 failures
There are multiple reason for this. We don't uninstall the binding
interface from the controller handle and we don't reset the handle
pointers either. So let's uninstall all the protocols properly and
reset the handles to NULL on setup().
While at it add a forgotten check when uninstalling protocols from the
handle_controller and make sure the number of child controllers is 0
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On arm64 the its we use to generate the test FIT image has
arch = "arm";
We should use "arm64" here which is mapped to IH_ARCH_ARM64 via
uimage_arch[].
Fixes: 8391f95549 ("test/py: Create a test for launching UEFI binaries from FIT images")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On the arm64 architecture booti_setup() is called for EFI FIT images.
This function call fails because EFI images typically do not have a
kernel signature.
Check that the operating system property "os" of the image is "linux"
before invoking booti_setup().
Fixes: 487b5fa6de ("bootm: Handle kernel_noload on arm64")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Test ReinstallProtocolInterface() more rigorously.
Replacing the sole installed protocol interface must not result in deleting
the handle and creating a new one.
Check which interface is actually installed before and after
ReinstallProtocolInterface().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
lib/efi_loader/helloworld_efi.S is a generated file and shall be removed by
'make clean'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
With DM_ETH configured by default, complete the Ethernet enablement for
LS1046AFRWY by activating DM_MDIO.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Call pci_init() from board_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Describe the FMan Ethernet interfaces present on the board.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This patch targets the last remaining commands left to sync to their
latest form - mainly the mc_get_version() API.
Besides this, remove any macro which is now of no help.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Path IO APIs to their latest form, this means the layout
of each command is created based on structures which clearly describe
the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Path Soft Parser APIs to their latest form, this
means the layout of each command is created based on structures which
clearly describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Path Network Interface APIs to their latest form, this
means the layout of each command is created based on structures which
clearly describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Resource Container APIs to their latest form, this means
the layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Path MAC APIs to their latest form, this means the
layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the Data Path Buffer Pool APIs to their latest form, this means the
layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are multiple MC APIs which were added years ago but they are not
used at all in the u-boot source code. Remove all these APIs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at
different MDIO bus addresses, we must update both the kernel DTS and
u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC or
newer. Use the newly introduced get_board_rev() function to trigger a
fixup of the kernel DTS to properly match the actual PHY addresses.
All this is encapsulated in the fdt_fixup_board_phy_revc() function
which will be used in the next patch.
Use the newly fdt_fixup_board_phy_revc() function introduced to
update both kernel's DTS and u-boot's DTS.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
- Fix some issues Coverity Scan reported in IPv6, SPL EXTn support fix,
two small bootstd fixes, one Kconfig dependency fix, and fix booting
on Pinephone Pro
CID 453851 : sprintf() shouldn't copy from/to tmp
CID 436278 : DHCP6 option_len should be checked before use
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add the RAM_ROCKCHIP_LPDDR4 to fix the Pinephone Pro booting.
When the configs were updated in 26f92be07e it somehow broke
the PPP boot process so let's fix it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
CC: Jagan Teki <jagan@edgeble.ai>
CC: Kever Yang <kever.yang@rock-chips.com>
Using relative path in a /boot/extlinux/extlinux.conf file fails to load
linux kernel.
Using a /boot/extlinux/extlinux.conf file:
LABEL test
LINUX ../linux/Image
Result in following error:
Retrieving file: ../linux/Image
Skipping test for failure retrieving kernel
Boot failed (err=-14)
However, using sysboot cmd successfully load kernel using same file:
sysboot mmc 1:1 any ${scriptaddr} /boot/extlinux/extlinux.conf
Retrieving file: /boot/extlinux/../linux/Image
Fix relative path using bootmeth extlinux by supplying bootfile path
instead of subdir path in the call to pxe_setup_ctx, same as done in the
sysboot command.
Fixes: 31aefaf89a ("bootstd: Add an implementation of distro boot")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move BOOTSTD_FULL down in the file so that it can be enabled only when
BOOTSTD is enabled. This prevents a build error if BOOTSTD is disabled
but BOOTSTD_FULL is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The rtl8169 driver uses calls to dm_pci_bus_to_phys,
which are compiled under CONFIG_PCI.
Without CONFIG_PCI, this happens:
drivers/net/rtl8169.o: in function `rtl_recv_common':
drivers/net/rtl8169.c:555: undefined reference to `dm_pci_bus_to_phys'
It is only natural that this driver depends on CONFIG_PCI then.
The device does not work connected in another way anyway, and the driver
does not assume anything else at this moment.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Since commit 9905cae65e ("fs: ext4: check the minimal partition size
to mount"), a valid size needs to be provided when mounting
an ext filesystem. Fix the spl ext driver to use the parition size
instead of 0 when mounting the filesystem.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Export the already existing DPNI and DPMAC counters through the newly
added callbacks.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new option to the 'net' command which can be used to dump network
statistics.
To do this, 3 new callbacks are added to the eth_ops structure:
.get_sset_count(), .get_strings(), .get_stats(). These callbacks
have the same functions as in Linux: to return the number of counters,
the strings which describe those counters and the actual values.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The ldpaa_eth driver already had a DPMAC statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPMAC is destroyed
thus any previous counters will get lost.
As a preparation for the next patches, we add a software kept set of
DPMAC counters which will get updated before each destroy operation
takes place.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The ldpaa_eth driver already had a DPNI statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPNI is reset to its
original state, including its counters.
As a preparation for the next patches, we add a software kept set of
DPNI counters which will get updated before each reset operation takes
place.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In order to simplify code, dpni_statistics can be written as a union.
Using the raw accessors we can just loop through all the statistics from
a page without trying to access each an every one independently.
Make this change to a union.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Each MC commands has a specific predefined memory layout that gets
interpreted by the firmware. The dpmac_get_counters() API memory layout
is wrong, thus the results returned by the command are incorrect.
Fix this by updating the offset of the counter field.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently we only read the pcr updates once on test_tpm2_pcr_read().
It turns out that the tpm init sequence of force_init() which consists
of:
- tpm2 init
- tpm2 startup TPM2_SU_CLEAR
- tpm2 self_test full
- tpm2 clear TPM2_RH_LOCKOUT
also counts as an update. Running this in the console verifies the
update bump
=> tpm2 init
=> tpm2 startup TPM2_SU_CLEAR
=> tpm2 self_test full
=> tpm pcr_read 10 $loadaddr
PCR #10 content (28 known updates):
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> tpm2 clear TPM2_RH_LOCKOUT
=> tpm pcr_read 10 $loadaddr
PCR #10 content (29 known updates):
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=>
With the recent changes of replacing 'tpm2 init' with 'tpm2 autostart'
we end up always running the full init. The reason is 'tpm init'
returns -EBUSY if the tpm is already open, while 'tpm autostart' handles
ths gracefully and continues with the initialization. It's worth noting
that this won't affect the device functionality at all since
retriggering the startup sequence and selftests has no side effects.
Instead of relying on the initial value, reread the 'known updates'
just before updating the PCR to ensure we read the correct values
before testing
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of copy pasting the commands needed to start a TPM consisting
of:
- tpm init
- tpm startup TPM2_SU_CLEAR
- tpm2 self_test full
use the newly added 'autostart' which does the same thing and simplify
our python scripts
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For a TPM device to be operational we need to initialize it and
perform its startup sequence. The 'tpm init' command currently calls
tpm_init() which ends up calling the ->open() per-device callback and
performs the initial hardware configuration as well as requesting
locality 0 for the caller. There no code that currently calls
tpm_init() without following up with a tpm_startup() and tpm_self_test_full()
or tpm_continue_self_test().
So let's add a 'tpm autostart' command and call tpm_auto_start() which
leaves the device in an operational state.
It's worth noting that calling tpm_init() only, doesn't allow a someone
to use the TPM since the startup sequence is mandatory. We always
repeat the pattern of calling
- tpm_init()
- tpm_startup()
- tpm_self_test_full() or tpm_continue_self_test()
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Process errors from command via cmd_process_error() as is done on Versal.
When internal function returns different number then CMD_RET_SUCCESS(0),
CMD_RET_FAILURE(1) or CMD_RET_USAGE(-1) shell react on these errors by
throwing an error like
"exit not allowed from main input shell." that's why use
cmd_process_error() to make sure that error code is all the time correct.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d511935ba10daf95c70996fae6e6ffc374efffa0.1685618464.git.michal.simek@amd.com
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.
This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board
There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.
Codevelop-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5c1567b63d0280dacc7efba2998857c399c25358.1684312924.git.michal.simek@amd.com
Production version restarting platform version field from 0 that's why add
new calculation to be able to use different DT for these platforms.
Requested DT names for production silicons for IPP/SPP and EMU platform are
versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts.
If platform version increase numbers revision can be even higher.
As of today platform version is 2 that's why expected is rev2.2.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691e166b3cf2643d7edf482bda5500163eecb35a.1684311689.git.michal.simek@amd.com
For sf commands, when '0' length is passed for erase, update, write or
read, there might be undesired results. Ideally '0' length means nothing to
do.
So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is
passed to sf commands. Same thing applies for nand commands also.
Example:
ZynqMP> sf erase 0 0
ERROR: Invalid size 0
ZynqMP> sf write 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf read 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf update 1000 10000 0
ERROR: Invalid size 0
ZynqMP>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516115236.22458-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The function fdtdec_board_setup() is called early and adds the overlay
from ATF to the u-boot device tree. That is necessary so that u-boot
doesn't use reserved memory.
Linux also needs to know about that reserved memory so the overlay from
ATF needs to be aplied on the linux device tree as well.
This commit makes sure that the ATF overlay is applied to both device trees.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.
While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
These two properties are used by various DTs in place of
current reset-assert-us/reset-deassert-us , handle both .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The phy_connect_dev() is legacy API, now that there are no users,
make it internal to phy.c and unpublish it from headers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This patch adds 4-byte address mode support. Because traditional access
based on FIFO/shift register, it's complex to specify information like
opcode, address length, dummy bytes etc to flash. Replace the traditional
access by spi-mem layer which is essential to make 4-byte address mode
support possible.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Move strobe delay setting code into extra function and reflect the latest
setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50).
i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products)
This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
Two sets of FWU updates from Jassi Brar. First:
The patchset reduces ~400 lines of code, while keeping the functionality same and making
meta-data operations much faster (by using cached structures).
Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer instead of the common core in fwu.c (as also noted by
Ilias) that is, gpt_blk.c manages meta-data and similarly raw_mtd.c will have
to do the same when it arrives. The code could by make smaller, cleaner and
optimised.
Basic idea:
Introduce .read_mdata() and .write_mdata() in fwu_mdata_ops that simply
read/write meta-data copy. The core code takes care of integrity and redundancy
of the meta-data, as a result we can get rid of every other callback
.get_mdata() .update_mdata() .get_mdata_part_num() .read_mdata_partition()
.write_mdata_partition() and the corresponding wrapper functions thereby making
the code 100s of LOC smaller.
Get rid of fwu_check_mdata_validity() and fwu_mdata_check() which expected
underlying layer to manage and verify mdata copies.
Implement fwu_get_verified_mdata(struct fwu_mdata *mdata) public function that
reads, verifies and, if needed, fixes the meta-data copies.
Verified copy of meta-data is now cached as 'g_mdata' in fwu.c, which avoids
multiple low-level expensive read and parse calls.
gpt meta-data partition numbers are now cached in gpt_blk.c, so that we don't
have to do expensive part_get_info() and uid ops.
And second:
Introduce support for mtd backed storage for FWU feature and enable it on
Synquacer platform based DeveloperBox.
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Towards enabling FWU and supporting new firmware layout in NOR flash,
make u-boot PIC and adjust uboot env offset in flash.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
region. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a raw
MTD region.
The code is divided into core under drivers/fwu-mdata/ and some helper
functions clubbed together under lib/fwu_updates/
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
fwu_get_mdata() no more requires 'dev' argument and
fwu_check_mdata_validity() has been rendered useless and dropped.
Fix the test cases to work with aforementioned changes.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The common code can now read, verify and fix meta-data copies
while exposing one consistent structure to users.
Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num()
.read_mdata_partition() and .write_mdata_partition() and also the
corresponding wrapper functions.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Instead of each i/f having to implement their own meta-data verification
and storage, move the logic in common code. This simplifies the i/f code
much simpler and compact.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Any requirement of FWU should not require changes to bindings
of other subsystems. For example, for mtd-backed storage we
can do without requiring 'fixed-partitions' children to also
carry 'uuid', a property which is non-standard and not in the
bindings.
There exists no code yet, so we can change the fwu-mtd bindings
to contain all properties within the fwu-mdata node.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Introduce weak default board_init() in rcar-common/common.c , which
allows complete removal of ebisu.c and condor.c at the same time .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The eagle.h is now empty and only includes rcar-gen3-common.h .
Use rcar-gen3-common.h directly instead and drop eagle.h .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Pull common board initialization code from V3M Eagle board
into rcar-common/v3-common.c so it can be re-used by other
V3M/V3H boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There is no need to pull in all those headers as the board file is
basically empty. Drop them all.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There is no need to pull in all those headers as the board file is
basically empty. Drop them all.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The reset_cpu() implementation is basically the same across Gen3
SoCs and identical across Gen4 SoCs. Introduce weak default for
reset_cpu(), so that it does not have to be duplicated in every
board file again.
There is a slight difference for CA53 only systems, like E3 and D3,
which now check MIDR for CPU ID first just like the other systems,
but this is OK since the MIDR always returns CA53 core type and the
correct reset register is written.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support to identify R8A77995 r1.1 SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Marek: Slight update to commit message, spell out the SoC model]
r8a7796 cpu revision v1.2 has the same information as revision v1.1.
This patch fixes revision display at startup to "rev 1.1/1.2".
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Marek: Slight update to commit message, spell out the SoC model]
This is a remnant from when the USB controller driver managed
the reset signal itself. A patch from the very end of 2018 changed
this driver to delegate reset (and clock) management to the proper
control unit driver, but left this unused define behind.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This test covers the FMP versioning for both raw and FIT image,
and both signed and non-signed capsule update.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Current efi capsule python tests have much code duplication.
This commit creates the common function
in test/py/tests/test_efi_capsule/capsule_common.py,
aim to reduce the code size and improve maintainability.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit describe the procedure to configure lowest supported
version in the device tree for anti-rollback protection.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Current mkeficapsule tool does not provide firmware
version management. EDK II reference implementation inserts
the FMP Payload Header right before the payload.
It coutains the fw_version and lowest supported version.
This commit adds a new parameters required to generate
the FMP Payload Header for mkeficapsule tool.
'-v' indicates the firmware version.
When mkeficapsule tool is invoked without '-v' option,
FMP Payload Header is not inserted, the behavior is same as
current implementation.
The lowest supported version included in the FMP Payload Header
is not used, the value stored in the device tree is used instead.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The FMP Payload Header which EDK II capsule generation scripts
insert has a firmware version.
This commit reads the lowest supported version stored in the
device tree, then check if the firmware version in FMP payload header
of the ongoing capsule is equal or greater than the
lowest supported version. If the firmware version is lower than
lowest supported version, capsule update will not be performed.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit gets the lowest supported version from device tree,
then fills the lowest supported version in FMP->GetImageInfo().
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Current FMP->GetImageInfo() always return 0 for the firmware
version, user can not identify which firmware version is currently
running through the EFI interface.
This commit reads the "FmpStateXXXX" EFI variable, then fills the
firmware version in FMP->GetImageInfo().
Now FMP->GetImageInfo() and ESRT have the meaningful version number.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Firmware version management is not implemented in the current
FMP protocol.
EDK II reference implementation capsule generation script inserts
the FMP Payload Header right before the payload, FMP Payload Header
contains the firmware version and lowest supported version.
This commit utilizes the FMP Payload Header, reads the header and
stores the firmware version into "FmpStateXXXX" EFI non-volatile variable.
XXXX indicates the image index, since FMP protocol handles multiple
image indexes.
Note that lowest supported version included in the FMP Payload Header
is not used. If the platform uses file-based EFI variable storage,
it can be tampered. The file-based EFI variable storage is not the
right place to store the lowest supported version for anti-rollback
protection.
This change is compatible with the existing FMP implementation.
This change does not mandate the FMP Payload Header.
If no FMP Payload Header is found in the capsule file, fw_version,
lowest supported version, last attempt version and last attempt
status is 0 and this is the same behavior as existing FMP
implementation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
The number of image array entries global variable is required
to support EFI capsule update. This information is exposed as a
num_image_type_guids variable, but this information
should be included in the efi_capsule_update_info structure.
This commit adds the num_images member in the
efi_capsule_update_info structure. All board files supporting
EFI capsule update are updated.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A small late pull request for Allwinner. The main feature is just a DT
update, matching the v6.4 Linux kernel DT files. This also enables a
board (LCTech Pi F1C200s) which got its .dts file merged into Linux.
Plus a tiny typo fix from Sam.
Gitlab CI passed, briefly tested on an H616 board and the new LCTech Pi.
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.
Add a defconfig for this board, enabling the most basic features. This
uses the new 64MB memory map, which avoids the very tight memory map we
use for the 32MB F1C100s board(s).
The devicetree file is already in the tree, courtesy of the previous
Linux repo sync.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Sync the devicetree files from the official Linux kernel tree, v6.4-rc2.
This is covering both 64-bit and 32-bit Allwinner SoCs with Arm Ltd.
cores, we skip the new RISC-V bits for now, as sunxi RISC-V support
is still work in progress.
Among smaller cosmetic changes, this adds a SATA regulator node which we
need in U-Boot to get rid of hard-coded GPIOs.
Also this updates the Allwinner F1C100s DTs, enabling USB support, and
also adds the DTs for two new boards.
As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
arch/arm/dts/rk3399.dtsi has a node
usb_host0_ehci: usb@fe380000 {
compatible = "generic-ehci";
with clocks:
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
<&u2phy0>;
The first 2 refer to nodes with class UCLASS_CLK, but &u2phy0
has class UCLASS_PHY.
u2phy0: usb2phy@e450 {
compatible = "rockchip,rk3399-usb2phy";
Since clk_get_bulk() only looks for devices with UCLASS_CLK,
it fails with -ENODEV and then ehci_usb_probe() aborts.
The consequence is peripherals connected to a USB 2 port (e.g. in a
Rock Pi 4 the white port, nearer the edge) not being detected.
They're detected if CONFIG_USB_OHCI_GENERIC is selected in Kconfig,
because ohci_usb_probe() does not abort when one clk_get_by_index()
fails, but then they work in USB 1 mode.
rk3399.dtsi comes from linux and the u2phy0 was added[1] to the clock
list in:
commit b5d1c57299734f5b54035ef2e61706b83041f20c
Author: William wu <wulf@rock-chips.com>
Date: Wed Dec 21 18:41:05 2016 +0800
arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
We found that the suspend process was blocked when it run into
ehci/ohci module due to clk-480m of usb2-phy was disabled.
[...]
Suspend concerns don't apply to U-Boot, and the problem with U-Boot
failing to probe EHCI doesn't apply to linux, because in linux
rockchip_usb2phy_clk480m_register makes u2phy0 a proper clock provider
when called by rockchip_usb2phy_probe().
So I can think of a few alternative solutions:
1- Change ehci_usb_probe() to make it more similar to
ohci_usb_probe(), and survive failure to get one clock. Looks a
little harder, and I don't know whether it could break something if
it ignored a clock that was important for something else than
suspend.
2- Change rk3399.dtsi effectively reverting the linux commit
b5d1c57299734f5b54035ef2e61706b83041f20c. This dealigns the .dtsi
from linux and seems fragile at the next synchronisation.
3- Change the clock list in rk3399-u-boot.dtsi or somewhere else.
This survives .dts* sync but may survive "too much" and miss some
change from linux that we might want.
4- Enable CONFIG_USB_OHCI_GENERIC and use the ports in USB 1 mode.
This would need to be made for all boards using rk3399. In a
simple test reading one file from USB storage it gave 769.5 KiB/s
instead of 20.5 MiB/s with solution 2.
5- Trying to replicate linux and have usb2phy somehow provide a clk,
or have a separate clock device for usb2phy in addition to the phy
device.
This patch tries to implement option 5 as Marek Vasut requested in
December 5th. Options 1 and 3 didn't get through [2][3].
It just registers usb2phy as a clock driver (device_bind_driver()
didn't work but device_bind_driver_to_node() did), without any
specific operations, so that ehci-generic.c finds it and is happy. It
worked in my tests on a Rock Pi 4 B+ (rk3399).
Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/
[2] https://patchwork.ozlabs.org/project/uboot/patch/20220701185959.GC1700@begut/
[3] https://patchwork.ozlabs.org/project/uboot/patch/Y44+ayJfUlI08ptM@localhost/
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Christoph Fritz <chf.fritz@googlemail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rk3399, rk3328, rv1126
The `musb_register` function returns some ERR_PTR(...) on failure,
not NULL, so update the check here appropriately.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
According to the dm_serial_ops documentation, pending() should:
> @return number of waiting characters, 0 for none, -ve on error
And:
> It is acceptable to return 1 if an indeterminant number
> of characters is waiting.
With the current implementation, we have:
* FIFO is full -> pending() returns 0
* FIFO is partially used -> pending() returns 1
* FIFO is empty -> pending() returns 1
This is not the same as what the documentation requires.
Moreover, since [1], arm reset now flushes all console devices
(including serial) before the cpu gets reset.
Because of the flawed logic:
=> reset # user calls reset
flush() is called
_serial_flush() is called
ops->pending(dev, false) # never returns false
# board hangs indefinitely without resetting.
Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL.
[1] commit c5f4cdb8eb ("console: Use flush() before panic and reset"),
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230606-fix-meson-serial-pending-v1-1-6a54d4a01f76@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
i2c updates for v2023-07-rc4
Bugfixes:
- rockchip: De-initialize the bus after start bit failure
from Ondrej Jirman
- cdns: Fix broken retry mechanism on arbitration lost
The ubifsload command is truncating any address above 4GiB as it casts
this address to an u32, instead of using an unsigned long which most of
the other load commands do. Change this to an unsigned long to allow
loading into high memory for boards which use these areas.
Fixes the following error:
=> ubifsload 0x2100000000 /boot/Image.lzma
Loading file '/boot/Image.lzma' to addr 0x00000000...
Unhandled exception: Store/AMO access fault
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
In the current implementation, in case of I2C arbitration lost, a retry is
attempted; the message counter and pointer are reset to the original values
and the I2C xfer process is restart from the beginning.
However the message counter and message pointer are respectively
decremented and incremented by one before attempting any transfer, causing
the 1st transfer not to be actually retried (in case of a single transfer,
nothing is actually retried at all).
This patch fixes this: in case of retry, the 1st transfer is also retried.
Tested on a ZynqMP Kria board, with upstream older u-boot, but the involved
file and underlying logic seem basically the same.
Signed-off-by: Andrea Merello <andrea.merello@iit.it>
Failure can happen when i2c is used without initializing pinctrl properly,
which U-Boot happily allows in SPL. Without this fix, further I2C access would
fail, even after proper pinctrl initialization.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Pull request efi-2023-07-rc4
Documentation:
* man pages for loadb, loadx
UEFI:
* check return value of part_get_info()
* improve unit test for RegisterProtocolNotify()
Check that LocateHandleBuffer() return EFI_NOT_FOUND when called with
ByRegisterNotify and all handles already have been retrieved.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
part_get_info() may return an error code. Check it.
Update function description of dp_part_node().
Addresses-Coverity-ID: 184067 ("Unchecked return value")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In the first silicon revision of the am62x family of SoCs, the hardware
wakeup event cannot be used if software is unable to unlock the RTC
device within one second after boot. To work around this limitation
unlock RTC as soon as possible in the boot flow to maximize our chance
of linux being able to use this device.
Add the erratum i2327 workaround to initialize the RTC.
Signed-off-by: Nishanth Menon <nm@ti.com>
[bb@ti.com: rebased from 2021.01 and expanded commit and code messages]
Signed-off-by: Bryan Brattlof <bb@ti.com>
Add support for j721s2-wiz-10g device to use clock-names interface
instead of explicitly defining clock nodes within device tree node.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
ATF and OPTEE regions may be firewalled from non-secure entities.
If we still map them for non-secure A53, speculative access may happen,
which will not cause any faults and related error response will be ignored,
but it's better to not to map those regions for non-secure A53 as there
will be no actual access at all.
Create separate table as ATF region is at different locations for am64
and am62/am62a.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Add main_uart1 clocks in clk-data.c for J7200. Now,
main_uart1 clocks will be set up while booting the J7200 SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Add device data for main_uart1 in dev-data.c for J7200. Now,
main_uart1 will be powered on while booting the J7200 SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
When selecting UDA partition for booting. MMC read
mode was selected as RAW.
Due to growing/changing size of u-boot and tispl
images.
It will be better change to FS in case of UDA FS instead of
adjusting offsets with new change.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Add main_uart5 clocks in clk-data.c for J721S2. Now,
main_uart5 clocks will be set up while booting the J721S2 SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Add device data for main_uart5 in dev-data.c for J721S2. Now,
main_uart5 will be powered on while booting the J721S2 SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Add main_uart2 clocks in clk-data.c for J721E. Now,
main_uart2 clocks will be set up while booting the J721E SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Add device data for main_uart2 in dev-data.c for J721E. Now,
main_uart2 will be powered on while booting the J721E SoC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Compiling with gcc 13 results in an error:
drivers/axi/axi-emul-uclass.c:16:5: warning: conflicting types for
‘axi_sandbox_get_emul’ due to enum/integer mismatch; have
‘int(struct udevice *, ulong, enum axi_size_t, struct udevice **)’
{aka ‘int(struct udevice *, long unsigned int, enum axi_size_t,
struct udevice **)’} [-Wenum-int-mismatch]
16 | int axi_sandbox_get_emul(struct udevice *bus, ulong address,
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/axi/axi-emul-uclass.c:14:
./arch/sandbox/include/asm/axi.h:48:5: note: previous declaration of
‘axi_sandbox_get_emul’ with type ‘int(struct udevice *, ulong, uint,
struct udevice **)’ {aka ‘int(struct udevice *, long unsigned int,
unsigned int, struct udevice **)’}
48 | int axi_sandbox_get_emul(struct udevice *bus, ulong address, uint length,
| ^~~~~~~~~~~~~~~~~~~~
Adjust the header definition to match the implementation.
Define the size parameter as constant.
Fixes: 9a8bcabd8a ("axi: Add AXI sandbox driver and simple emulator")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The "Message not acknowledged" error message is missing a line feed,
leading to the console log getting garbled and joined together with
whatever the next output is in case this error happens:
"ti_sci system-controller@44043000: Message not acknowledgedAuthentication failed!"
Fix ths by adding the missing linefeed character.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
This is required for UART boot flow where u-boot.img needs to be
downloaded via YMODEM.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
K3 devices have some firewalls set up by ROM that we usually remove so
that the development is easy in HS devices.
While removing the firewalls disabling a background region before
disabling the foreground regions keeps the firewall in a state where all
the transactions will be blacklisted until all the regions are disabled.
This causes a race for some other entity trying to access that memory
region before all the firewalls are disabled and causes an exception.
Since there is no guarantee on where the background regions lie based on
ROM configurations or no guarantee if the background regions will allow
all transactions across the memory spaces, iterate the loop twice removing
the foregrounds first and then backgrounds.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
This reverts commit b8ebf24e7f.
This patch seems to be fundamentally wrong and requires a different way
on how the background firewalls should be configured so revert the patch
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
When build Xen target with Clang, the linker reports failure.
This patch adds the related info in the documentation as a known issue
and gives details for how to dismiss the building failure with Clang.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
When build U-boot with clang with using commands:
$ make HOSTCC=clang xenguest_arm64_defconfig
$ make HOSTCC=clang CROSS_COMPILE=aarch64-linux-gnu- \
CC="clang -target aarch64-linux-gnueabi" -j8
The compiler reports error:
/tmp/start-acdf31.s:330:1: error: symbol '_start' is already defined
_start:
^
Because the symbol '_start' has been defined twice, one is defined in
arch/arm/cpu/armv8/start.S, another is defined in the header
boot0-linux-kernel-header.h.
To fix building failure, this patch removes the symbol '_start' from
boot0-linux-kernel-header.h.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Buffers created through DEFINE_(CACHE_)ALIGN_BUFFER are actually
pointers to the real underlying buffer. Using sizeof(...) is
not appropriate in this case.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
As per [1], dfu_alt_info is mentioned to be as semicolon separated
string of information on each alternate and the parsing logic in
the dfu.c is based on this.
Typically, the dfu_alt_info_* is defined in .h files as preprocessor
macros with 'alt' info separated by semicolon.
But when dfu_alt_info_* is added in the environment files(.env)
the script at "scripts/env2string.awk" converts a newline to space.
Thus adding a space character after semicolon. This results in
incorrect parsing in dfu.c which is based on the information that
'alt' info are only semicolon separated.
One option is to add dfu_alt_info_* variable in .env in single line.
But there is possiblity for it to exceed the line length limit.
So update the parsing logic to remove leading space characters
before adding to the dfu list.
[1]: https://u-boot.readthedocs.io/en/latest/usage/dfu.html
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
For sf commands, when '0' length is passed for erase, update, write or
read, there might be undesired results. Ideally '0' length means nothing to
do.
So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is
passed to sf commands. Same thing applies for nand commands also.
Example:
ZynqMP> sf erase 0 0
ERROR: Invalid size 0
ZynqMP> sf write 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf read 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf update 1000 10000 0
ERROR: Invalid size 0
ZynqMP>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Currently, all in-tree .dts files (apart from some under test/ and
tools/), reside in arch/$ARCH/dts. However, in the linux kernel tree,
dts files for arm64 boards, and probably in the not too distant
future [1], arm boards as well, live in subdirectories of that.
For private forks, using a vendor or project subdirectory is also more
convenient to clearly separate private code from upstream - in the
same way that code under board/ is also split and easy to maintain.
In order to prepare for us to follow suit and do the splitting of the
in-tree .dts files, and to make life a little easier for private forks
that already place dts files not directly in arch/$ARCH/dts, change
the $(srctree)/arch/$(ARCH)/dts path to instead refer to the directory of
the .dts file being compiled. This should be a no-op for all existing
cases.
[1] https://lore.kernel.org/lkml/20220328000915.15041-1-ansuelsmth@gmail.com/
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
ARM requires a 4-byte alignment on all ARM code (though this
requirement is relaxed to 2-byte for some THUMB code) and we
should be explicit about that here.
GAS has its own fix for this[1] that forces proper alignment
on any section containing assembled instructions, but this is
not universal: Clang's and other gaslike assemblers lack this
implicit alignment. Whether or not this is considered a bug in
those assemblers, it is better to ask directly for what we want.
[1]: https://sourceware.org/bugzilla/show_bug.cgi?id=12931
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Make it a little bit easier for the user to utilize the 'size' command.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
Invoking the sandbox with
/u-boot -c ⧵0xef⧵0xbf⧵0xbd
results in a segmentation fault.
Function b_getch() retrieves a character from the input stream. This
character may be > 0x7f. If type char is signed, static_get() will
return a negative number and in parse_stream() we will use that
negative number as an index for array map[] resulting in a buffer
overflow.
Reported-by: Harry Lockyer <harry_lockyer@tutanota.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Per the fit_conf_get_node() API doc, it returns configuration node
offset when found (>=0).
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
These files should have both 'always' and 'targets' so that dependencies
are detected correctly.
When only 'always' is used, the target is built every time, although I am
not quite sure why.
Make sure each has both 'always' and 'targets' to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present two acpi files are built every time since they use a version
number from version.h
This is not necessary. Make use of the same technique as for the version
string, so that they are build only when they change.
Signed-off-by: Simon Glass <sjg@chromium.org>
These rules run on every build even if nothing has changed. The FORCE
dependency is only needed for if_changed, not for cmd. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
To quote the author:
There are two versions of get/set_unaligned, get_unaligned_be64,
put_unaligned_le64 etc in U-Boot causing confusion (and bugs).
In this patch-set, I'm trying to fix that with a single unified version of
the access macros to be used across all archs. This work is inspired by
similar changes in this Linux kernel by Arnd Bergman,
https://lore.kernel.org/lkml/20210514100106.3404011-1-arnd@kernel.org/
The get_unaligned()/put_unaligned() implementations are more
complex than necessary.
Move everything into one file and use a more compact implementation based
on packed struct access and byte swapping macros.
This patch is based on the Linux kernel commit 803f4e1eab7a
("asm-generic: simplify asm/unaligned.h") by Arnd Bergmann.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use asm/unaligned.h instead of linux/unaligned/access_ok.h for unaligned
access. This is needed on architectures that doesn't handle unaligned
accesses directly.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Powerpc configurations are apparently able to do unaligned accesses. But
in an attempt to clean up and handle unaligned accesses in the same way
we ignore that and use the common asm-generic/unaligned.h directly
instead.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
M68k essentially duplicates the content of asm-generic/unaligned.h, with
an exception for non-Coldfire configurations. Coldfire configurations
are apparently able to do unaligned accesses. But in an attempt to clean
up and handle unaligned accesses in the same way we ignore that and use
the common asm-generic/unaligned.h directly instead.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Mips essentially duplicates the content of asm-generic/unaligned.h, so use
that file directly instead.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Sh essentially duplicates the content of asm-generic/unaligned.h, so use
that file directly instead.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
As part of various code clean-ups we have on occasion missed removing
unused header files. None of these files are referenced anywhere else
at this point.
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 11232139e3 ("nds32: Remove the architecture") removed the nds32
architecture, and with it the last user of the Faraday AHB controller
header file.
Consequently remove that header file as well.
This was found because the inclusion guard was misspelled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It seems like the header inclusion guard for the Exynos pinctrl header
was misspelled.
Make the preprocessor symbol for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It seems like the header inclusion guard for some Freescale crosspoint
switch header was misspelled.
Make the preprocessor symbol for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It seems like the header inclusion guard for some Uniphier DDR PHY
header was misspelled.
Make the preprocessor symbol for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It seems like the header inclusion guards for some IMX related headers
were misspelled or got out of sync.
Make the preprocessor symbols for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This platform is currently unmaintained and untested, so remove it.
Further, as it is the only TI816X SoC example, remove related files as
well.
Signed-off-by: Tom Rini <trini@konsulko.com>
The PCIe controller on the M2 Pro/Max is different from the one
found on earlier Apple SoCs. Some registers moved and te meaning
of the bits in some other registers changed. But they are still
similar enough to handle both controllers in the same driver.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but
need a tweaked memory map. USB, NVMe, UART and WDT are working
with the existing drivers.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
K3 GP devices allows booting the secure binaries on them by bypassing
the x509 header on them.
ATF and OPTEE firewalling required the rproc_load to be called before
authentication. This change caused the failure for GP devices that
strips off the headers. The boot vector had been set before the headers
were stripped off causing the runtime stripping to fail and stripping
becoming in-effective.
Separate out the secure binary check on GP/HS devices so that the
boot_vector could be stripped before calling rproc_load. This allows
keeping the authentication later when the cluster is on along with
allowing the stripping of the binaries in case of gp devices.
Fixes: 1e00e9be62 ("arm: mach-k3: common: re-locate authentication for atf/optee")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
When booting with HS silicon, the system firmware image is 278270, which
is slightly larger than currently allocated amount.
This can cause unexpected behavior if this overlap interferes with other
things in memory, so increase this with a slightly margin added as well
to avoid any boot issues that can appear after system firmware gets
loaded.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
In non-combined boot flow for K3, all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Old Map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│ STACK │
├─────────────────────────────────────┤ 0x41c85b20
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41cf5bfc)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
New Map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│ EMPTY │
├─────────────────────────────────────┤ 0x41c81920
│ STACK │
│ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │
├─────────────────────────────────────┤ 0x41c85920
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41cf59f0)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
├─────────────────────────────────────┤ 0x41cff9fc
│ NEW MCU SCRATCHPAD │
│ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
Fixes: ab977c8b91 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[n-francis@ti.com: SRAM allocation addressing diagram]
Signed-off-by: Neha Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
When building for secure devices using non-buildman based image generation
the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned
tispl.bin file as expected.
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Add trivial driver for the MXS AUART IP. This is the other UART IP
present in i.MX23 and i.MX28, used to drive the non-DUART ports.
Signed-off-by: Marek Vasut <marex@denx.de>
Update DDR timing file generated by DDR Config Tool
1. Dynamic refresh rate is set by default
2. The 3rd freq will be 625MTS based on power and performance better than 100MTS.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To avoid using static setting for ECC enabled DDR size, switch
to calculate DDR size from DDRC setting
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The rank setting flow should be updated to support multi
fsp config.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update the DDR init flow for multi-setpoint support on i.MX93. A new
fsp_cfg struct need to be added in the timing file to store the diff
part of the DDRC and DRAM MR register for each setpoint.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add 625M bypass clock that may be used DRAM 625M
bypass mode support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the ddr timing info will be saved at the last 16KB of
the OCRAM, spl stack & bss base should be updated to avoid
conflict.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap
specification does not include the Critical Delay Difference (CDD) to
properly define the required rank-to-rank read command spacing after
executing PHY training firmware.
Following the errata workaround, at the end of data training, we get
all CDD values through the MessageBlock, then re-configure the DDRC
timing of WWT/WRT/RRT/RWT with comparing MAX CDD values.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Currently bootaux only supports to boot M33 core from TCM. Since ATF
has changed to use x2 parameter for M33 image address, update the
bootaux command to use input address, so we can support boot from
any possilbe address like TCM, DDR, Flexspi NOR.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a static u-boot config for i.MX93 low drive mode support. When
low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks,
A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals
clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet
max frequencies in low drive mode.
Also set standby voltage for buck1
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Config the A55 alt root clock to 500MHz(LD mode frequency)
by default. Normally, this clock root is only used as an
intermediate clock soure for A55 core/dsu when change the
ARM PLL frequency.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The HW_CTRL_SEL should be cleared when configuring PLL to avoid
potential glitch
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Support print reset cause. Since SRSR is not accessible from non-secure
world, so first save it to grp0, then read it in non-secure world.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There will be build error if CONFIG_SYSRESET is enabled, so guard
the reset_cpu with condition check here
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The MAC addresses are hard coded for bring up. Change it to support
reading from fuse.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
OPTEE memory region is set secure access only in ATF with configuration
to TRDC, and need to remove it from U-Boot, otherwise U-Boot and Kernel
may crash when accessing the memory
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since we might reuse some drivers for other platforms, while the drivers
have sci firmware api, so to avoid build failure add inline functions
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
The TMU used on iMX93 is IP revision 2.1 which is different with previous
revision used on iMX8MQ. So add a new FLAG V4 for this revision to
distinguish the operations.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 1a7904fdfa ("mmc: fsl_esdhc_imx: Use esdhc_soc_data
flags to set host caps") exposed the following SD card error:
U-Boot 2023.04-00652-g487e42f7bc5e (Apr 05 2023 - 22:14:21 -0300)
CPU: Freescale i.MX7D rev1.0 1000 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 35C
Reset cause: POR
Model: Freescale i.MX7 SabreSD Board
Board: i.MX7D SABRESD in non-secure mode
DRAM: 1 GiB
Core: 100 devices, 19 uclasses, devicetree: separate
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Card did not respond to voltage
select! : -110
*** Warning - No block device, using default environment
The reason of the problem, as explained by Ye Li:
"When UHS is enabled in defconfig, the usdhc1 node in imx7d-sdb.dts does
not configure pad for VSELECT, also the data pad should be set to
100Mhz/200Mhz pin states."
Apply these changes into u-boot.dtsi for now. When these changes
reach the Linux mainline imx7d-sdb, they can be dropped from u-boot.dtsi.
This fixes UHS mode on the imx7d-sdb board.
Suggested-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Stop polluting the architecture directory with driver specific code,
move it into driver where it should be. Split the code slightly so
the MX8MM/MX8MN fuse readout and programming and MX8MP fuse readout
and programming are in their separate functions, and called in case
of matching SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Use dev_(dev, ...) for all printing and debug logging, since this
already includes the device name. Drop device name where duplicate.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
It seems like the ROM log events for the iMX8M are not fully covered by
AN12853 i.MX ROMs Log Events, Rev. 0, May 2020. On iMX8M the ROM event
ID 0x82 seems to use parameter0 which stops the parsing because the end
of list is detected too early.
This patch adds ROM event ID 0x82 and skips the next word if ID 0x82 is
parsed.
Fixes: a5ee05cf71 ("ARM: imx: Pick correct eMMC boot partition from ROM log")
Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
rk3588 driver:
- Sync the reset driver with kernel code;
- Enable pcie controller and phy support;
- Enable USB controller and phy support;
Board level dts and config update:
- boost eMMC performance for some of rk3399 boards;
- boot from SPI NOR flash for rk356x boards;
- Other board level updates;
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.
=> sf probe
SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1492992 bytes read in 129 ms (11 MiB/s)
=> sf update $fileaddr 0 $filesize
device 0 offset 0x0, size 0x16c800
1300480 bytes written, 192512 bytes skipped in 11.103s, speed 137694 B/s
The BROM_BOOTSOURCE_ID value read back when booting from SPI flash does
not match the expected value of 3 (SPINOR) used by other SoCs. Instead a
value of 6 is read back, add a new enum value to handle this new
bootsource id.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
The phycore-rk3288 SPL binary is reaching the limits of 32KB very often.
Enable CONFIG_LTO to reduce the size of the SPL and make the board more
future proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
If u-boot is installed on the internal emmc, then this will
allow to boot without failure.
Signed-off-by: Wolfgang Zarre <lxdev12@zirdeon.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable pinctrl for sdhci in SPL to support loading of FIT image from SD
and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3588-rock-5b with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.
Add config option to include useful gpio cmd.
Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.
Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3588-evb with new defaults.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.
Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.
Add config options to include useful gpio and regulator cmd.
Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.
Remove CONFIG_DEBUG_UART_ANNOUNCE=y to remove debug messages.
Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Like other Rockchip SoCs, DM_RESET and DM_REGULATOR_FIXED is useful
across RK3588 platform. Select them from arch Kconfig.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 3 Model A.
Unlike prior generation SoCs the BootRom in RK3568 can read all data and
look for idbloader at 0x8000, same as on SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.
=> sf probe
SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1384448 bytes read in 119 ms (11.1 MiB/s)
=> sf update $fileaddr 0 $filesize
device 0 offset 0x0, size 0x152000
1179648 bytes written, 204800 bytes skipped in 9.901s, speed 143185 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
image from SD and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3568-rock-3a with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.
Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.
Add config option to include useful gpio cmd.
Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.
Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.
Remove the CONFIG_SPL_PMIC_RK8XX=y option, the pmic is not used in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3568-evb with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.
Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.
Add config options to include useful gpio, i2c, pmic and regulator cmd.
Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.
Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.
Add config options to enable support for the RK809 PMIC.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
image from SD and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3566-radxa-cm3-io with new defaults. Also add
missing supported mmc modes to sdhci node.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.
Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.
Add config option to include useful gpio cmd.
Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.
Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.
Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add bootph-all prop to xin24m clock node, it is referenced by cru node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use the same prop as linux to control the use of fifo or dma mode. Also
add a u-boot,spl-sfc-no-dma prop to control the same in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the PCIe 2x1l 2 device and associated combphy.
On this bus, the Rock5B has an Ethernet transceiver connected.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
[eugen.hristev@collabora.com: minor tweaks]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: add PCIe pins]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the node for PCIe 2x1l 2 device together with the corresponding
combphy.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[eugen.hristev@collabora.com: moved to -u-boot.dtsi, minor
adaptations]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: adapt to kernel node]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable CONFIG_ROCKCHIP_SPI_IMAGE to build u-boot-rockchip-spi.bin.
Define CONFIG_SYS_SPI_U_BOOT_OFFS to write u-boot.itb at the expected
offset. Enable CONFIG_LTO to reduce size of SPL so that the mkimage
output fit before the 0x60000 offset in u-boot-rockchip-spi.bin.
=> sf probe
SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1442304 bytes read in 27 ms (50.9 MiB/s)
=> sf update $fileaddr 0 $filesize
device 0 offset 0x0, size 0x160200
1421824 bytes written, 20480 bytes skipped in 9.501s, speed 155432 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the use of SDMA mode to boost eMMC performance on ROCK Pi 4.
Also add missing flags to indicate the supported MMC modes.
Using mmc read command to read 32 MiB data shows following improvement:
=> time mmc read 10000000 2000 10000
Before: time: 3.178 seconds
After: time: 0.402 seconds
This also enables CONFIG_SPL_FIT_SIGNATURE option to help discover
any possible future issue with loading TF-A into DRAM/SRAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the use of SDMA mode to boost eMMC performance on RockPro64.
Also add missing flags to indicate the supported MMC modes.
Using mmc read command to read 32 MiB data shows following improvement:
=> time mmc read 10000000 2000 10000
Before: time: 3.178 seconds
After: time: 0.402 seconds
This also enables CONFIG_SPL_FIT_SIGNATURE option to help discover
any possible future issue with loading TF-A into DRAM/SRAM.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:
## Checking hash(es) for Image atf-2 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-2' image node
spl_load_simple_fit: can't load image loadables index 1 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Add a device tree property, u-boot,spl-fifo-mode, to control when the
rockchip_sdhci driver should disable the use of DMA and fallback on PIO
mode. Same device tree property is used by the rockchip_dw_mmc driver.
In commit 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") the DMA mode was disabled using a CONFIG
option on RK3588. Revert that and instead disable DMA using the device
tree property for all RK3588 boards, also apply similar workaround for
all RK3399 boards.
Fixes: 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Quentin Schulz <foss+uboot@0leil.net> # RK3399 Puma, RK3588 Tiger
The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.
Fixes: 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Quentin Schulz <foss+uboot@0leil.net> # RK3399 Puma, RK3588 Tiger
Add support for rk3588 phy variant.
The PHY clock is fixed at 100MHz.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[kever.yang@rock-chips.com: update pcie pll parameters]
Co-developed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[eugen.hristev@collabora.com: squashed, tidy up]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for max_link_speed specified in the PCI DT binding.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[eugen.hristev@collabora.com: port to latest API, set default correctly,
align to 80 chars]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: switch to dev_read_u32_default]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.
This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")
Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.
Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
To be able to initialize the pinctrl correctly at SPL level and read
u-boot proper from SD-Card, the pinctrl must be initialized.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add initial support for the rk3588 PHY variant.
The lookup for the host-port reg inside the struct now does a do {} while()
instead of a while() {} in order to allow a first check for reg == 0.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Co-developed-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Some phys require a phy-supply property that is a phandle to a regulator
that needs to be enabled for phy operations.
Implement basic supply lookup, enable and disabling, if DM_REGULATOR is
available.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[jonas@kwiboo.se:
use regulator_set_enable_if_allowed and disable if power_on ops fails]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
To quote the author:
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.
Define SPL_USB_ETH_RNDIS symbol to make it possible to select USB
gadget ethernet support in SPL and U-Boot separately in Kconfig .
Make use of the new symbols in gadget Makefile and move the rndis.o
just below the now merged USB_ETHER symbol in Makefile.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_GADGET and related symbols. Fix typo and
rename SPL_USB_GADGET to "USB Gadget Support in SPL" .
Update the gadget Makefile to match the symbol changes.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_STORAGE and matching SYS_USB_FAT_BOOT_PARTITION .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_HOST and updates help text of both USB_HOST
and SPL_USB_HOST .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove leftover of
misuse of the env is nowhere driver as default environment.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Pull request efi-2023-07-rc3
Documentation:
* update the description of signature algorithms
UEFI:
* fix unaligned access to GUID in HII database protocol
* fix launching EFI binaries loaded via semihosting
* fix filling of file path in loaded image protocol for non-block devices
- Merge in a long-standing fix for some exynos platforms, correct a
Kconfig description, fix some env issues, fix an issue in
devfdt_get_addr_size_index_ptr and look for "panel-timings" not
"panel-timing" per upstream binding.
During refactor this seemed to have been missed.
Fixes: 65dbb128fb ("include: environment: ti: Use .env for environment variables")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
For the devfdt_get_addr_size_index_ptr() function use
map_sysmem() function as cast for the return for use in
sandbox.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
In case where a single timing resolution is implemented in the
device-tree, the property is named "panel-timing", as specify
in Linux kernel binding file:
Documentation/devicetree/bindings/display/panel/panel-common.yaml
# Display Timings
panel-timing:
description:
Most display panels are restricted to a single resolution and
require specific display timings. The panel-timing subnode expresses those
timings.
$ref: panel-timing.yaml#
display-timings:
description:
Some display panels support several resolutions with different timings.
The display-timings bindings supports specifying several timings and
optionally specifying which is the native mode.
$ref: display-timings.yaml#
Fixes: 0347cc7732 ("drivers: core: ofnode: Add panel timing decode.")
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
After converting my targets from CFG_EXTRA_ENV_SETTINGS to
CONFIG_EXTRA_ENV_TEXT as suggested by Tom, I discovered that
fw_setenv doesn't set the entire defaut environment anymore.
I tried to fix it with the below patch, but it fails qemu-x86 CI test,
see https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/16326
That's the only CI test that fails AFAICS.
Could you help with a solution ? This needs to be fixed.
Thanks
Christophe
---- >8 ----
From: Christophe Leroy <christophe.leroy@csgroup.eu>
Subject: [RFC PATCH] envtools: Fix default environment
After converting some targets from CFG_EXTRA_ENV_SETTINGS to
CONFIG_EXTRA_ENV_TEXT, default environment embedded in
fw_env tool missed all extra settings.
Commit 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in
a .env file") restricted the inclusion of the content of that
file to builds without USE_HOSTCC.
But as mentionned in commit 79fc0c5f49 ("tools/env: cross-compile
fw_printenv without setting HOSTCC"), HOSTCC and USE_HOSTCC are
kept for code re-use.
Remove the restricting so that settings included in a .env
file are also added to fw_env tool.
Fixes: 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in a .env file")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Otherwise non-ChromeOS samsung devices, like the odroid boards, are
stuck in a bootloop if CONFIG_CROS_EC is not enabled:
<...>
MMC: SAMSUNG SDHCI: 2, EXYNOS DWMMC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment
cros-ec communications failure -96
Please reset with Power+Refresh
Cannot init cros-ec device
resetting ...
Issue started after commit e44d7e73fe ("dm: core: Switch
uclass_*_device_err to use uclass_*_device_check").
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
This reverts commit a034ec06ff.
Commit 4a3ea75de4 ("Revert "mmc: sdhci: set to INT_DATA_END when
there are data"") reverted the alternative fix that was added for
Exynos 4 devices, causing an error when trying to boot from an sdcard:
<...>
Loading Environment from MMC... sdhci_send_command: Timeout for status update!
mmc fail to send stop cmd
<...>
Re-add the quirk to allow booting from sdcards again.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Make it clear that this is the SPL option to avoid potential confusion
when the description for CONFIG_SPL_VIDEO is the same as that for
CONFIG_VIDEO.
Signed-off-by: John Keeping <john@metanate.com>
- Bring in a few kbuild changes from upstream Linux to fix running the
checker (make C=1/C=2), and clean up some of the logic related to how
choose what device trees to build.
A lot of errors are encountered when building with sparse checking
activated (make C=1 or make C=2).
Many of them are fixed in Linux.
Resynchronise Makefile and include/linux/build_bug.h with Linux
kernel sources by porting the following Linux commits into u-boot:
- 6c49f359ca14 ("kbuild: disable sparse warnings about unknown attributes")
- 80591e61a0f7 ("kbuild: tell sparse about the $ARCH")
- 8788994376d8 ("linux/build_bug.h: change type to int")
- 527edbc18a70 ("build_bug.h: remove most of dummy BUILD_BUG_ON stubs for Sparse")
- c60d3b79423a ("build_bug.h: remove negative-array fallback for BUILD_BUG_ON()")
- 14e83077d55f ("include: drop pointless __compiler_offsetof indirection")
Also revert commit aa9e891c63 ("include/linux/stddef.h: avoid
'warning: preprocessor token offsetof redefined'") because the
error it creates is worse than the warning it is trying to fix.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
[Linux commit 363547d2191c]
Currently DTB Overlays (.dtbo) are build from source files with the same
extension (.dts) as the base DTs (.dtb). This may become confusing and
even lead to wrong results. For example, a composite DTB (created from a
base DTB and a set of overlays) might have the same name as one of the
overlays that create it.
Different files should be generated from differently named sources.
.dtb <-> .dts
.dtbo <-> .dtso
We do not remove the ability to compile DTBO files from .dts files here,
only add a new rule allowing the .dtso file name. The current .dts named
overlays can be renamed with time. After all have been renamed we can
remove the other rule.
[Import notes: Adapt to U-Boot by using the cmd_dtco function instead
of cmd_dtc just like the current .dts -> .dtbo rule.]
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Linux commit b8fc5b2157b1]
If dtc is rebuilt, we should rebuild .dtb files with the new dtc.
[Import notes: Back then there was no .dtbo rule in Linux's
Makefile.lib, but the current .dtbo rules in Linux also have the
$(DTC) dependency, so also add it to our .dtbo rule.]
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
The idea in 3609e1dc5f (dts: automatically build necessary .dtb
files) was fine, but the implementation was suboptimal due to some
misunderstandings on my part (and possibly defects in some defconfig
files):
- Sometimes DEFAULT_DEVICE_TREE is not included in OF_LIST or
SPL_OF_LIST
- SPL_OF_LIST is not always a subset of OF_LIST
- While SPL_OF_LIST governs the list of dtbs relevant to SPL (i.e.,
may be built into an
SPL-with-bunch-of-dtbs-to-choose-between-at-runtime), those dtbs are
not actually _built_ during the SPL build phase, i.e. when $(SPL_)
would expand to SPL_. fdtgrep runs on the artifacts produced during
the ordinary U-Boot build.
Tweak the logic so that we simply add the union of all dtbs mentioned
in either DEFAULT_DEVICE_TREE, OF_LIST and SPL_OF_LIST to dtb-y. That
should, for real, ensure that we always build all the dtbs that is
relevant to the current board, and should in turn enable us to
massively simplify arch/*/dts/Makefile.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building dtc from git causes the version number to start with a 'v'
(e.g. v1.7.0). printf then fails to parse 'v1' as a decimal value, and
prints '000700' instead of '010700'. Subsequently, the build fails,
because '000700' is less than the required '010400' version.
Signed-off-by: Martin Hundebøll <martin@geanix.com>
flash_get_size() will get the flash size from the device itself and go
through all erase regions to read protection status. However, the device
mappable region (eg: devicetree reg property) might be lower than the
device full size which means that the above cycle will result in a data
bus exception. This change fixes it by reading the 'addr_size' during
probe() and also use that as one possible upper limit.
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
- Assorted bootstd fixes and cleanups. This should fix problems with
Debian, and make script-based distributions work when BOOTMETH_DISTRO
is enabled now (as BOOTMETH_DISTRO was renamed and then reintroduced).
We cannot be sure what bootmeth a distro will need to use. Add a new
BOOTMETH_DISTRO option which collects these together. Select this from
BOOTSTD_DEFAULTS so that it is clear what is needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make BOOTMETH_EFILOADER depend on EFI_LOADER, select if EFI_LOADER]
Signed-off-by: Tom Rini <trini@konsulko.com>
We use the terms 'distro' to mean extlinux but they are not really the
same. 'Distro' could refer to any method of booting a distribution,
whereas extlinux is a particular method.
Also we sometimes use syslinux, but it is better to use the same term in
all cases.
Rename distro to syslinux and also update bootstd uses of syslinux to use
extlinux instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
In a few cases the error handling is not quite right. Make sure we
return the actual error in distro_efi_read_bootflow_file() rather than
-EINVAL. Return -IO when a file cannot be read. Also show the error name
if available.
This does not change operation, but does make it easier to diagnose
problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
The patch to relax flag requirements was not accepted[1], so we still have
to have separate bootcommands depending on CMD_BOOTFLOW_FULL.
The previous attempt at this did not work, since it used the wrong name
for the options.
Fix this and change the message to mention BOOTSTD_FULL since this affects
not just the flags, but all functionality, so is more likely what the user
wants.
Drop the useless condition on CMD_BOOTFLOW_FULL while we are here.
[1] https://patchwork.ozlabs.org/project/uboot/patch/20230329071655.1959513-2-sjg@chromium.org/
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: a91492b6e9 ("bootstd: Provide a default command")
Armbian uses a script which needs the HUSH parser. It is likely that
other distros will do the same. Enable it by default, just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Jonas Karlman <jonas@kwiboo.se>
This causes crashes on some boards, e.g. rockpro64. In any case, we
should not do it.
Check the usb_started flag to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Tom Rini <trini@konsulko.com>
This should be declared in a header file so that type-checking works
correctly.
Add a single declaration to usb.h and remove the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
If there is no partition numbered 1, we decide that there are no
partitions at all. That may not be correct, since at least one Debian
installed has just a single partition numbered 2.
Continue searching up to partition 3, just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>
* When called from efi_dp_from_name() we miss to append the filename
for non-block devices.
* expand_media_path() could be simplified by using efi_dp_from_file to
prepend the device path of the boot device.
This can be avoided by passing a device path to efi_dp_from_file() instead
of a block device descriptor and a partition number.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Improve variable name usage: Use pos instead of buf to indicate the
current position in a buffer.
* Avoid double assignment in a single code line.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_dp_from_name() has duplicate code to replace slash by backslash.
path_to_uefi() called by efi_dp_from_file() already does this.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
According to our coding style guide #ifdef should be avoided.
Use IS_ENABLED() instead.
Sort string comparisons alphabetically.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Executing an EFI binary fails for files loaded via semihosting.
Construct a dummy device path for EFI binaries loaded via semihosting.
A future complete solution may include the creation of a handle with a
simple file system protocol.
Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom reports that when building with clang we see this warning:
field guid within 'struct efi_hii_keyboard_layout' is less aligned than 'efi_guid_t' and is usually due to 'struct efi_hii_keyboard_layout' being packed, which can lead to unaligned accesses [-Wunaligned-access]
This happens because 'struct efi_hii_keyboard_layout' is defined as
packed and thus has 1-byte alignment but efi_guid_t is a type that
requires greater alignment than that.
However the EFI spec describes the EFI_GUID as
"128-bit buffer containing a unique identifier value.
Unless otherwise specified"
So convert the efi_guid_t -> u8 b[16] here and skip the alignment
requirements. Since the struct is packed to begin with, it makes no
difference on the final memory layout.
Suggested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Symbol CONFIG_EFI_SETUP_EARLY does not exist anymore.
CONFIG_FWU_MULTI_BANK_UPDATE without CONFIG_FWU_MDATA results in
lib/fwu_updates/fwu.c:49: undefined reference to `fwu_get_mdata'
Fixes: 8679405241 ("FWU: Add support for the FWU Multi Bank Update feature")
Fixes: 023d9c9393 ("efi_loader: remove CONFIG_EFI_SETUP_EARLY")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Since U-Boot supports more RSA/SHA variants, as well as ECDSA, remove
these items from the TODO list.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-Boot supports more hash and verification algorithms these days.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
As a starting point, list all currently supported Renesas boards.
For the RZ/N1 board, add details about booting and flashing.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Renesas RZ/N1 devices contain BootROM code that loads a custom SPKG
image from QSPI, NAND or USB DFU. Support this format in mkimage tool.
SPKGs can optionally be signed, however creation of signed SPKG is not
currently supported.
Example of how to use it:
tools/mkimage -n board/schneider/rzn1-snarc/spkgimage.cfg \
-T spkgimage -a 0x20040000 -e 0x20040000 \
-d u-boot.bin u-boot.bin.spkg
The config file (spkgimage.cfg in this example) contains additional
parameters such as NAND ECC settings.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support for Schneider Electric RZ/N1D and RZ/N1S boards, which
are based on the Reneasas RZ/N1 SoC devices.
The intention is to support both boards using a single defconfig, and to
handle the differences at runtime.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The RZ/N1 is a family of SoC devices from Renesas, featuring:
* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD
Add basic support for this family, modeled on the existing RZA1.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.
This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Clock driver for the Renesas RZ/N1 SoC family. This is based on
Linux kernel 6.2.y drivers/clk/renesas/r9a06g032-clocks.c as found in
commit 02693e11611e ("clk: renesas: r9a06g032: Repair grave increment error"),
with the following additional patch series applied:
https://lore.kernel.org/linux-renesas-soc/20230301215520.828455-1-ralph.siemsen@linaro.org/
Notable difference: this version avoids allocating a 'struct clk'
for each clock source, as this is problematic before relocation.
Instead, it uses the same approach as existing Renesas R-Car Gen2/3
clock drivers, using a temporary structure filled on-the-fly.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add new CONFIG_CLK_RCAR to control compilation of shared code for R-Car
clock drivers (renesas-cpg-mssr.c). Enable this for R-Car Gen2 and 3.
This is necessary so that CONFIG_CLK_RENESAS can be enabled, allowing
recursion into the drivers/clk/reneasas directory, without bringing in
the R-Car support code. The support code contains platform specific
access (TMU_BASE) which is not needed on other Renesas devices such as
RZ/N1.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Commit 2564fce7ee ("sunxi: move Cortex SMPEN setting into start.S")
added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For
platforms not using SPL boot, add the corresponding non-SPL config,
so that CONFIG_IS_ENABLED(ARMV7_SET_CORTEX_SMPEN) works as expected.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Move the TPL up a little to make room for the refcode binary blob. Also
increase the pre-relocation memory to make space for recent additions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are not used in TPL so disable the drivers to save space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This copies the cpu_call64() function to memory address and then jumps to
it. This seems to work correctly even when called from SPL, which is
running from SPI flash.
Drop the copy as it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't need to commit the SPI-flash MTRR change immediately, since it is
now done in the board_init_f_r(). Also this causes chromebook_link64 to
hang, presumably since we are still running from CAR (Cache-as-RAM) in
SPL. Coral handles this OK, perhaps since it is running from a different
memory area, but it has no effect on Coral anyway.
Drop the extra mtrr_commit() in the SPL implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function is used by U-Boot proper. It does not set up MTRRs when SPL
is enabled, but we do want this done when it is called from SPL. In fact
it is confusing to use the same function from SPL, since there are quite
a few conditions there.
All init_cache_f_r() really does is commit the MTRRs and set up the cache.
Do this in the SPL's version of this function instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the binman symbols for this, to avoid hard-coding the value. We could
use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to
obtain the offset and size through the same mechanism.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Probing LPC can cause PCI enumeration to take place, which significantly
increases pre-relocation memory usage. Also, LPC is somtimes enabled
directly by SPL.
Adjust the logic to probe the LPC only after relocation. This allows
chromebook_link64 to start up without a much larger
CONFIG_SYS_MALLOC_F_LEN value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Show the area of memory cleared for BSS, when debugging is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
SPL printf() does not normally support %#x so just use %x instead. Hex is
expected in U-Boot anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For now, just enable the fast-but-large string functions in 32-boot
U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit
builds since we only have 32-bit assembly.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The debug UART is already set up in SPL, so there is no need to do
anything here. We must provide the (empty) function though.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This adds a lot of code so that it cannot be built with the binary
blobs. It is not used on this board. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The bd82x6x_get_gpio_base() does not work if the LPC is not set up.
Probe it early to avoid this problem.
In chromebook_link64 this problem shows up as an inability to read
the GPIO straps for the memory type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'tiny' SPI nor functions have the same name as their big brothers,
which can be confusing. Use different names so it is clear which
version is in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With tiny SPI flash the erasesize is 0 which can cause a divide-by-zero
error. Check for this and return a proper error instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow symbol writing in these cases so that U-Boot can find the position
and size of U-Boot at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The original function was only called once, before relocation. The new
one is called again after relocation. This was not the intent of the
original call. Fix this by renaming and updating the calling logic.
With this, chromebook_link64 makes it through SPL.
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is useful when looking for tables in memory. Enable it for coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable support for NVMe storage devices. Update the driver to enable the
bus master bit, since coreboot does not do that automatically.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot sets up devices ready for use, but coreboot does not. Enable this
so that NVMe works OK from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes coreboot adds new tags that U-Boot does not know about. These
are silently ignored, but it is useful to at least know what we are
missing.
Add a way to collect this information. For Brya it shows:
Unimpl. 38 41 37 34 42 40
These are:
LB_TAG_PLATFORM_BLOB_VERSION
LB_TAG_ACPI_CNVS
LB_TAG_FMAP
LB_TAG_VBOOT_WORKBUF
LB_TAG_TYPE_C_INFO
LB_TAG_BOARD_CONFIG
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Turn these options on to make it easier to debug things.
Also enable dhrystone so we can get some measure of performance.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable this so that PCI devices can be used correctly without needing
to do a manual scan.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This is much more common on modern hardware, so default to using it.
This does not affect the normal UART, but does allow the debug UART to
work, since it uses serial_out_shift(), etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
When U-Boot is the second-stage bootloader, PCI is already set up. We
cannot read the regions from the device tree. There is no point anyway,
since PCI devices have already been allocated according to the regions
and it is not safe for U-Boot to make any changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: f2ebaaa9f3 ("pci: Handle failed calloc in decode_regions()")
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
When coreboot does not pass a UART in its sysinfo struct, there is no
easy way to find it out.
Since coreboot does not actually init the serial device when serial is
disabled, it is not possible to make it add this information to the
sysinfo table.
Add a way to obtain this information from the DBG2 ACPI table, which is
normally set up by coreboot.
For now this only supports a memory-mapped 16550-style UART.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present any ACPI tables created by prior-stage firmware are ignored.
It is useful to be able to view these in U-Boot.
Pick this up from the sysinfo tables and display it with the cbsysinfo
command. This allows the 'acpi list' command to work when booting from
coreboot.
Adjust the global_data condition so that acpi_start is available even if
table-generation is disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This is useful for other features. Move the function into library code
so it can be used outside just the 'acpi' command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.
Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.
Adjust the command to avoid a build error when ACPIGEN is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If U-Boot is not the first-stage bootloader the keyboard may already be
set up. Make sure to flush any data before trying to reset it. This
avoids a long timeout / hang.
Add some comments and a log category while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Avoid searching starting at 0 since this memory may not be available,
e.g. if protection against NULL-pointer access is enabled. The table
cannot be there anyway, since the first 1KB of memory was originally
used for the interrupt table and coreboot avoids it.
Start at 0x400 instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When U-Boot did not do the MP init, we don't get an actual CPU number
here. Skip printing it in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This avoids an error in converting to CONFIG_IS_ENABLED(DM_PMIC).
Many boards SPL code needs these definitions to compile, even if
the functions are not linked.
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This avoid an error with enable_sata_clock when
defined(CONFIG_SATA) is changed to CONFIG_IS_ENABLED(SATA).
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Prepare for linking setup_sata only when CONFIG_SATA/CONFIG_SPL_SATA
is defined.
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pfuze_mode_init calls pmic_reg_read which is only available from
obj-$(CONFIG_$(SPL_TPL_)DM_PMIC) += pmic-uclass.o
Prepare for conversion of defined(CONFIG_DM_PMIC) to
CONFIG_IS_ENABLED(DM_PMIC).
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function ft_board_setup calls do_fixup_by_path_string
which is only available on CONFIG_IS_ENABLED(OF_LIBFDT).
This prepares for the conversion.
ft_board_setup is only called from image-fdt which is linked by
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the use of CONFIG_IS_ENABLED in code, instead of at the preprocessor
level, these defines are still needed if OF_CONTROL is enabled.
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL environments don't need commands that they can never use.
Avoid errors with CONFIG_IS_ENABLED conversions by skipping them now.
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
would check for CONFIG_SPL_SPL_X86_32BIT_INIT for SPL builds
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Rockchip NFC driver update and dev addr pointer api update;
- use standard dr_mode for usb driver;
- rock pi boards dts update;
- Add rk3566 Anbernic boards;
- Misc fixes for drivers;
Avoid error messages when SPL,TPL,VPL build don't
have the environment options of the main build.
This is needed when defined(CONFIG_ENV_IS_IN_xxx) is changed
to CONFIG_IS_ENABLED(ENV_IS_IN_xxx).
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
The CRU is being probed with a default set of assigned clocks, which
are not implemented in the driver at all.
Hence, when clk_set_defaults is called, it fails with ENOENT.
This would not be a problem, as the CRU still handles all the required
clocks, and the assigned clocks are default configs which are preprogrammed
or not required for Uboot operations.
However, the rockchip reset driver is being bound by the same DT node
as CRU, as the reset driver has no DT node.
But, when probing the reset node, it will call again the clk_set_defaults
for the CRU node, and failing because of missing those specific clocks
in the rk3588 clock driver.
To avoid this, simply implement a basic set/get that will just return
success and the default corresponding rate for the required assigned clocks.
As those clocks were not supported in Uboot, not required for Uboot
operations, there is no need to do any different kind of initialization.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The OTG port is identified by inspecting the "dr_mode" property which is
expected to be "otg" for this port. But it will work just as well as a
device controller when dr_mode is set to "peripheral", which may be
required if the mode detection pin is not set up correctly and the
device controller needs to be programmed to override this.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Instead of duplicating the string values here, use usb_get_dr_mode() to
handle the property lookup and converting the values to an enum.
This is implemented with a switch in preparation for the next patch
which adds extra handling for peripheral mode.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
Add support for Radxa ROCK 4C+ SBC.
Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI with 1920*1080
- RK817 Audio codec
Also, an official naming convention from Radxa mention to remove
Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
Radxa ROCK Pi 4C+.
Signed-off-by: Stephen Chen <stephen@radxa.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.
because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
4SE, delete dts{,i} for ROCK Pi 4B.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Implement a resource release mechanism on failing probe.
Without this, a strange situation can happen e.g. when init port fails,
or attempting to get the PHY fails, because the gpios have been
requested first, and if the user tries to do 'pci enum' again, the
driver will fail with 'can't find reset gpios' even if the gpios are
there, just because they were blocked by a previous probe attempt.
It is only natural to release the acquired resources if the probe fails,
just for consistency if nothing else.
This way on subsequent probe attempts, the user will get the same error
message, and not something different that doesn't make sense.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The AM64x SR2.0 SK board uses "AM64B-SKEVM" as the EEPROM identifier.
This board is similar to the AM64x SKEVM except that it has a new
PMIC that will be enabled in the future and consequently could use a
different device tree file in the future.
For now we treat the board same as an AM64x SK.
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add method to remove video driver before loading u-boot proper. When
bootstage changes from SPL to u-boot proper, noo method is called to
remove video driver, and at u-boot proper if video driver is not
enabled, the video driver starts displaying garbage on the screen,
because there is no reserved space for video and the frame buffer gets
u-boot proper data written.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
To enable splash screen on AM62x at a53 SPL setup DRAM, set page table,
enable cache to allow copying of bmp image to frame buffer and display
it using splash_display.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Change splashimage which is bmp image loadaddr to 0x80200000 since stack
is situated at 0x80477660 as splash framework requires bmp image to be
present above stack.
Change splashsource to sf to support loading bmp image from ospi flash
memory.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
btrfs_read_extent_reg correctly computed the extent offset in the
BTRFS_COMPRESS_NONE case, but did not account for the 'offset - key.offset'
part correctly in the compressed case, making the function read
incorrect data.
In the case I examined, the last 4k of a file was corrupted and
contained data from a few blocks prior, e.g. reading a 10k file with a
single extent:
btrfs_file_read()
-> btrfs_read_extent_reg
(aligned part loop, until 8k)
-> read_and_truncate_page
-> btrfs_read_extent_reg
(re-reads the last extent from 8k to the end,
incorrectly reading the first 2k of data)
This can be reproduced as follow:
$ truncate -s 200M btr
$ mount btr -o compress /mnt
$ pat() { dd if=/dev/zero bs=1M count=$1 iflag=count_bytes status=none | tr '\0' "\\$2"; }
$ { pat 4K 1; pat 4K 2; pat 2K 3; } > /mnt/file
$ sync
$ filefrag -v /mnt/file
File size of /mnt/file is 10240 (3 blocks of 4096 bytes)
ext: logical_offset: physical_offset: length: expected: flags:
0: 0.. 2: 3328.. 3330: 3: last,encoded,eof
$ umount /mnt
Then in u-boot:
=> load scsi 0 2000000 file
10240 bytes read in 3 ms (3.3 MiB/s)
=> md 2001ff0
02001ff0: 02020202 02020202 02020202 02020202 ................
02002000: 01010101 01010101 01010101 01010101 ................
02002010: 01010101 01010101 01010101 01010101 ................
(02002000 onwards should contain '03' pattern but went back to 01,
start of the extent)
After patch, data is read properly:
=> md 2001ff0
02001ff0: 02020202 02020202 02020202 02020202 ................
02002000: 03030303 03030303 03030303 03030303 ................
02002010: 03030303 03030303 03030303 03030303 ................
Note that the code previously (before commit e3427184f3 ("fs: btrfs:
Implement btrfs_file_read()")) did not split that read in two, so
this is a regression even if the previous code might not have been
handling offsets correctly either (something that booted now fails to
boot)
Fixes: a26a6bedaf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Move the handler for "tlv_eeprom dev X" command to the beginning of
do_tlv_eeprom, to allow using it before issuing a "read" command for
currently selected eeprom.
Also remove the check if eeprom exists, since that can only work after
the first execution of read_eeprom triggered device lookup.
Instead accept values up to the defined array size (MAX_TLV_DEVICES).
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
When tlv eeprom does not exist, return error code instead of quietly
making up tlv structure in memory.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
has_been_read is only used as an optimization for do_tlv_eeprom.
Explicitly use and set inside this function, thus making read_eeprom
stateless.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
The Anbernic RGxx3 is a "pseudo-device" that encompasses the following
devices:
- Anbernic RG353M
- Anbernic RG353P
- Anbernic RG353V
- Anbernic RG353VS
- Anbernic RG503
The rk3566-anbernic-rgxx3.dtsi is synced with upstream Linux, but
rk3566-anbernic-rgxx3.dts is a U-Boot specific devicetree that
is used for all RGxx3 devices.
Via the board.c file, the bootloader automatically sets the correct
fdtfile, board, and board_name environment variables so that the
correct devicetree can be passed to Linux. It is also possible to
simply hard-code a single devicetree in the boot.scr file and use
that to load Linux as well.
The common specifications for each device are:
- Rockchip RK3566 SoC
- 2 external SDMMC slots
- 1 USB-C host port, 1 USB-C peripheral port
- 1 mini-HDMI output
- MIPI-DSI based display panel
- ADC controlled joysticks with a GPIO mux
- GPIO buttons
- A PWM controlled vibrator
- An ADC controlled button
All of the common features are defined in the devicetree synced from
upstream Linux.
TODO: DSI panel auto-detection for the RG353 devices (requires porting
of DSI controller driver and DSI-DPHY driver to send DSI commands to
the panel).
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
provide an EEPROM chip containing a globally unique MAC address.
Currently, this means that a randomly generated temporary MAC address
may be generated each time the device is rebooted, leading to ARP cache
issues and other confusing bugs.
Since RK3399 CPUs provide a built-in unique serial number, we can
reliably derive a locally MAC address from it by reading the
corresponding bits from the non-secure efuse block.
Enable configuration options that allow deriving a local MAC address
from the CPU serial number.
The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so fix ofnode_get_addr_size function with fdt_addr_t input to
be able to handle both sizes for stm32mp SoC in spl.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so fix some
debug strings with fdt_addr_t to be able to handle both sizes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_ptr instead of the devfdt_get_addr function in
the various files in the drivers directory that cast to a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_size_index_ptr instead of the devfdt_get_addr_size_index
function in the various files in the drivers directory that cast to
a pointer.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_index_ptr instead of the dev_read_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able
to handle both sizes. As we are there also streamline the error
response to -EINVAL on return.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Add dev_read_addr_index_ptr function with the
same functionality as dev_read_addr_index,
but instead a return pointer is given.
Use map_sysmem() function as cast for the return.
Make same fix for dev_read_addr_ptr() function.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add devfdt_get_addr_size_index_ptr function with the same
functionality as devfdt_get_addr_size_index, but instead
a return pointer is given.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Rockchip SoC rk3288 has 2 types of device trees floating around.
A 64bit reg size when synced from Linux and a 32bit for U-boot.
A pre-probe function in the syscon class driver assumes only 32bit.
For other odd reg structures the regmap must be defined in the individual
syscon driver. Store rk3288 platdata in a regmap before pre-probe
during bind.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to handel both. The
syscon class driver also makes use of the regmap_init_mem_plat()
function, but has no way of knowing the format of the
device-specific platform data. In case of odd reg structures other
then that the syscon class driver assumes the regmap must be
filled in the individual syscon driver before pre-probe.
Also fix the ARRAY_SIZE divider in the syscon class driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a base variable with uintptr_t size in the
rk_spi.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a base variable with uintptr_t size in the
rk_pwm.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a regs variable with uintptr_t size in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The MTD framework reserves 1 or 2 bytes for the bad block marker
depending on the bus size. The rockchip_nfc driver currently only
supports a 8 bit bus, but reserves standard 2 bytes for the BBM.
The first free OOB byte is therefore OOB2 at offset 2.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add flash_node to the rockchip_nfc driver chip structure in order
to find the partitions in the add_mtd_partitions_of() function.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
The MTD framework in U-boot is not identical for drivers ported
from Linux. The rockchip_nfc driver was ported with OOB ops functions
while the framework expects a layout structure per chip.
Fix by adding a structure with OOB data and remove unused functions.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
The compatible string for rk3308 has as fallback string
"rockchip,rv1108-nfc". As there is no logic in probe priority between
the SoC orientated string and the fall back, so remove the compatible
string "rockchip,rk3308-nfc" from the driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip_nfc.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Add minimal support for 8125B version.
Changes are based on the Linux driver.
Tested on Radxa Rock 5B Rk3588 board.
Connection to a laptop worked fine in 100 Mbps mode.
1000 Mbps mode is not working at the moment.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
In IPv6, the default gateway and prefix length are determined by receiving
a router advertisement as defined in -
https://www.rfc-editor.org/rfc/rfc4861.
Add support for sending router solicitation (RS) and processing router
advertisements (RA).
If the RA has prefix info option and following conditions are met, then
gatewayip6 and net_prefix_length of ip6addr env variables are initialized.
These are later consumed by IPv6 code for non-local destination IP.
- "Router Lifetime" != 0
- Prefix is NOT link-local prefix (0xfe80::/10)
- L flag is 1
- "Valid Lifetime" != 0
Timing Parameters:
- MAX_RTR_SOLICITATION_DELAY (0-1s)
- RTR_SOLICITATION_INTERVAL (4s) (min retransmit delay)
- MAX_RTR_SOLICITATIONS (3 RS transmissions)
The functionality is enabled by CONFIG_IPV6_ROUTER_DISCOVERY and invoked
automatically from net_init_loop().
Signed-off-by: Ehsan Mohandesi <emohandesi@linux.microsoft.com>
Tested-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>Reviewed-by:
Tested-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
Tested-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Sergei Antonov <saproj@gmail.com>
Recent commit 75d28899e3 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This exposed a problem
in range checking functions to identify the interface type. Though
this specific api wasn't impacted (all the RGMII definitions remained
within range), this experience should be used to never to have to face
this kind of challenge again.
While it is possible for the phy drivers to use the enums directly,
drivers such as dp83867, dp83869, marvell, micrel_ksz90x1 etc use this
api.
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Recent commit 75d28899e3 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This caused the range of
enums that this api was checking to go bad.
There aren't anymore users of phy_interface_is_sgmii, so, just drop
it. Also the protocols are so very different that it makes no sense to
provide a helper wrapper in the hope of reuse for phy drivers.
Reported-by: Tom Rini <trini@konsulko.com>
Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Suggested-by: Marek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/all/20230414103852.38705065@dellmb/
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Make following changes to unblock TCP fastboot support:
1. Implement being a TCP server support
2. Introduce dedicated TCP traffic handler (get rid of UDP signature)
3. Ensure seq_num and ack_num are respected in net_send_tcp_packet
function (make sure existing wget_cmd code is reflected with the fix)
Signed-off-by: Dmitrii Merkurev <dimorinny@google.com>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Сс: Joe Hershberger <joe.hershberger@ni.com>
Сс: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Adds commands to support DHCP and PXE with IPv6.
New configs added:
- CMD_DHCP6
- DHCP6_PXE_CLIENTARCH
- DHCP6_PXE_DHCP_OPTION
- DHCP6_ENTERPRISE_ID
New commands added (when IPv6 is enabled):
- dhcp6
- pxe get -ipv6
- pxe boot -ipv6
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Adds DHCPv6 protocol to u-boot.
Allows for address assignement with DHCPv6 4-message exchange
(SOLICIT->ADVERTISE->REQUEST->REPLY). Includes DHCPv6 options
required by RFC 8415. Also adds DHCPv6 options required
for PXE boot.
Possible enhancements:
- Duplicate address detection on DHCPv6 assigned address
- IPv6 address assignement through SLAAC
- Sending/parsing other DHCPv6 options (NTP, DNS, etc...)
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
rtl8211e_startup() is an exact copy of genphy_startup(). Use that
instead of duplicating it.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Read the phy mode of the external phy from the device tree if available
and check that it is a RGMII variant.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
NFSv1 support added by Christian Gmeiner, Thomas Rienoessl,
September 27, 2018. As of now, NFSv3 is the default choice.
if the server does not support NFSv3, we fall back to
versions 2 or 1.
Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
Without that patch it lost track to the node to scan
speed and duplex.
Patch was created by Marek Vasut, just tested by me.
Signed-off-by: Elmar Psilog <epsi@gmx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Fix "setenv gatewayip6".
Synchronize IPv6 local variables with environment variables
in netboot_update_env()
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
In the process of adopting CONFIG_DM_ETH on the DPAA2 based platforms,
interfaces which were previously defined as "xgmii" were transitioned to
be defined as "xfi" in the DTS.
See the commit below for reference:
commit 87274918f2 ("arm: dts: ls2088ardb: add DPMAC and PHY nodes")
Then Vladimir's commit replaced all occurrences of "xfi" with
"10gbase-r" in an effort to make U-Boot work with the same device tree
as Linux.
commit 77b11f7604 ("net: replace the "xfi" phy-mode with "10gbase-r"")
These changes to the phy_interface_t of an Ethernet port meant that the
mc_fixup_mac_addrs() function was no longer capable to properly fixup
the MAC addresses. The problem arises from the fact that the hardcoded
information about an interface (wriop_get_enet_if()) was no longer
matching any actual device.
For example, the function tried to search for "DPMAC1@xgmii1" by name
using eth_get_dev_by_name() when only "DPMAC1@10gbase-r" was available.
This function removes the need to rely on the hardcoded information by
iterating through all the UCLASS_ETH devices which are DPAA2 and request
a fixup for each of them.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Export the ldpaa_eth_get_dpmac_id() function so that it can be used from
other drivers, especially by fsl-mc which will need it the next patch.
Also, create a macro for the Ethernet ldpaa driver name and export it as
well.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Add a port_probe function to configure the phy. This leads to
earlier link negotiation so the port is more likely to be ready
when used.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
We don't do anything useful with the master dev, so remove the variable.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
packet tagging is not used for this driver so we do not need to
call dsa_set_tagging.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
- enable video support in SPL
- support splash screen for TI am62x
- replace #ifdef and #if with if's in bmp/splash
- add lm3533 backlight driver
- add Solomon SSD2825 DSI/LVDS bridge driver
- add Renesas R61307 and R69328 MIPI DSI panel drivers
- add tegra DC based PWM backlight driver
- add generic endeavoru (HTC One X) panel driver
When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.
In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.
Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Instead of inhibiting parameter RAM relacation, take
into account the configured one.
It means INIT_TRX command cannot be used and must be done
manually as explained in the microcode patch application note.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
In order to use QMC mode in the CPM, a SCC requires more space
in parameter RAM.
After SCC1 there is I2C parameter RAM and after SCC2 there is
SPI parameter RAM. MPC866 and MPC885 can already relocate I2C and.
SPI parameter RAM.
But in order to free space after SCC3 and SCC4, SMC1 and SMC2
need to be relocated. In order to do so, a CPM microcode patch
is required.
Binary data for that patch is copied from Linux kernel.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
MPC885 CPU has the following ERRATA:
When the USB controller is configured in Host mode, and the
SOF generation (SFTE=1 in USMOD register) is being used,
there may be false CRC error indication in other SCCs.
Although the data is received correctly, the CRC result
will be corrupted.
Add capability to load the related microcode to fix it.
The microcode binary data is copied from Linux kernel.
Other microcode will be added in following patch so make it
a Kconfig choice.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
sparse reports the following warning:
CHECK arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:29:9: warning: cast removes address space '<asn:2>' of expression
arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:30:9: warning: cast removes address space '<asn:2>' of expression
This is because of (void *) casts for using memcpy() as a substitute.
Do like other architectures, __force the cast to silence the warning
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Somehow, I managed to typo our company name in the U-Boot
and Linux kernel submissions.
Fix this and update the copyright year at the same time.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This synchronises the Linux device tree with U-Boot
(cp linux/..../fsl-ls1088a-ten64.dts uboot/..../fsl-ls1088a-ten64.dts),
as of Linux v6.2-rc5.
Missing from the U-Boot copy previously was the
Ethernet PCS definitions (required for linking with PHY in
Linux but not used by U-Boot) and various upstream
fixes and formatting changes.
The board microcontroller (which doesn't have a Linux driver)
has been moved to the -u-boot.dtsi, as well as the
spi0 quadspi alias (used by U-boot 'sf' but not valid for Linux).
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Our [U-Boot] copy of fsl-ls1088a.dtsi had all the hardware under
the top level, until the DM_SERIAL implementation recently.
In this commit, remove any remaining devices (that were in U-Boot,
but not touched by previous patches in this series) to be under /soc,
updating to their upstream (Linux) bindings.
The bindings have been copied closest to their relative positions
in the Linux version, so the eventual result is that the U-Boot
and Linux fsl-ls1088a.dtsi will be identical.
The next commit will add the hardware bindings that were not
in U-Boot.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This moves the fsl-mc device tree definition under the /soc
node, as well as adding interrupt and IOMMU definitions that
were not in U-Boot before.
There are slight differences between the two bindings
as we add a "simple-mfd" compatible to function
under U-Boot's driver model.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Synchronise the MDIO controller definitions with Linux, so
the controllers will be usable when passing U-Boot's
control FDT to Linux.
This also adds the PCS (internal controller) definitions
which are not used by U-Boot.
Caveat: The kernel definition uses "fsl,fman-memac-mdio",
as with other members of the Layerscape family, but
U-Boot uses a different driver for the DPAA2
Family devices (LS1088/LS2088/LX2160). So
we use "fsl,ls-mdio" as the first compatible string
for these devices.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Synchronise the USB device tree definition with Linux, allowing
the U-Boot control FDT to be used to boot a Linux system with
working USB.
An extra compatible string, "fsl,layerscape-dwc3" is needed
for special handling in U-Boot, so has been added to the
-u-boot.dtsi file. It might be better to add this to the
Linux source bindings.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
U-Boot's definition for the I2C controllers did not contain any
clock information. This resulted in the I2C not functioning when
the U-Boot control FDT was passed to Linux.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Move the GPIO controller definitions under the "soc" and in
the same relative position as the Linux kernel fsl-ls1088a.dtsi.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The Linux kernel fsl-ls1088a.dtsi disables (status="disabled")
all PCIe controllers by default, with the bootloader (i.e U-Boot)
enabling the appropriate controllers (specified by the board
reset control word/RCW) by FDT fixup.
However, U-Boot needs these controllers to be enabled
to be usable, which we can add in the u-boot only dtsi.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This moves the PCIe controller definitions under /soc and adopts
the same bindings (fsl,ls1088a-pcie) as Linux. Previously,
the format was different between the two versions.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
To synchronise the device tree in U-Boot with Linux, the GIC
(Interrupt Controller) and SMMU/IOMMU nodes need to be synchronised
before changing any dependent components like PCIe and DPAA2/fsl-mc.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This allows the Layerscape PCIe RC driver to use the upstream
style binding (two "reg" entries instead of four).
It is similar to the previous commit e10da1f985
("pci: layerscape: add official ls1028a binding support")
which implemented this for the LS1028A.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The top-level "memory" node does not exist in the Linux
version of the fsl-ls1088a.dtsi file. Move it to the U-Boot
"tweak" file, so we can have an identical copy of
fsl-ls1088a.dtsi between the projects in the end.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This moves the bootph-all tags that were added in commit a593c1fec5
("arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all")
into a u-boot only include.
Due to the way the U-Boot device tree "tweak" system is setup[1],
we need to have a per-board <boardname>-u-boot.dtsi, which will
include the "fsl-ls1088a-u-boot.dtsi" tweaks.
By doing so, future updates to fsl-ls1088a.dtsi from upstream
(Linux kernel) can just be copied directly into the U-Boot tree,
without worrying about any extra data local to U-Boot.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] - https://u-boot.readthedocs.io/en/latest/develop/devicetree/control.html#adding-tweaks-for-u-boot
The CONFIG_SYS_SOC, CONFIG_SYS_CPU and CONFIG_SYS_VENDOR
values are the same for the entire Layerscape family,
meaning there is no ability to create a LS1088A only
file here. But we will be adding per-board tweaks
later in any case.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The recent series "Convert LS1088A and LX2160 to DM_SERIAL"
from Ioana Ciornei provided the necessary support to enable
DM_SERIAL on the Ten64 board (LS1088A).
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This a problem I found while updating the U-Boot fsl-ls1088a.dtsi
to match the Linux version.
fdt_fixup_remove_jr did not check whether there was a "crypto"
alias in the device tree before calling more fdt_* functions,
which resulted in a crash.
Fixes: a797f274
("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Update the DDR settings to those generated using 0.6 version of
Jacinto 7 DDRSS Register Configuration tool.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Update the DDR settings to those generated using 0.9.1 version of
Jacinto 7 DDRSS Register Configuration tool.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
On K3 HS-SE devices all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721s2 was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.
Old map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│ STACK │
├─────────────────────────────────────┤ 0x41c65f20
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41c76000)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
├─────────────────────────────────────┤ (0x41c80000)
│ DM DATA │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│ EMPTY │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
New map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│ STACK │
├─────────────────────────────────────┤ 0x41c65f20
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41c76000)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
├─────────────────────────────────────┤ (0x41c80000)
│ DM DATA │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│ EMPTY │
├─────────────────────────────────────┤ SYS_K3_MCU_SCRATCHPAD_BASE
│ SCRATCHPAD │ (0x41cff9fc)
│ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Create *-u-boot.dtsi files for each target dtb of the IOT2050 series so
that we can drop the #include deviations from upstream dts[i] files
here.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
When OE is packaging a dtb file into the FIT image it names the node based
on the dtb filename. Node names can't have "/" so it is turned into "_".
We select our FIT config using the "fdtfile" env var so we don't duplicate
the board_name to fdt logic. Result is fdtfile needs mangled when used to
select a config node from OE made FIT image. Do this here.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable the CONFIG_TI_SECURE_DEVICE by default
Non-HS devices will continue to boot due to runtime device type detection.
TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62x family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.
If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.
Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
- Various typo fixes, pass -Werror to host tools builds, bdi cleanups,
fix hush and local variables, a FSL PCI fix and correct some python in
one of the tests.
Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.
At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.
For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack
For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
We do not want to merge documentation that produces Sphinx warnings.
scripts/kernel-doc uses environment variable KDOC_WERROR to determine
if warnings should be treated as errors.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.
Remove dparam and dparam16 members of struct comm_proc
PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().
This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.
Console is not available yet so remove the printfs.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This function uses the same base name as all the others in this file, so
it is not easy to run just that one test. Add a _base suffix so that it
can be run on its own.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Main U-Boot is loaded by sector number, not by partition GUID type.
Fixes: 70415e1e52 ("board: sifive: add HiFive Unmatched board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The number of the partition that U-Boot SPL loads the main U-Boot from is
defined as 2 by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2. The
partition type GUID is not used currently.
Reword the description of the boot process to make it clearer.
Fixes: 5ecf9b0b8a ("board: starfive: add StarFive VisionFive v2 board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Support for the VisionFive 2 board is not contained in the most recent
OpenSBI release (v1.2).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Guide shows incorrect usage of proftool, which is confusing. If proftool
is used w/o '-o' argument it complains like following
$ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace > trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>
s/>/-o/ fixes it and proftool outputs decoded data to trace.dat
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch drops 0x prefixes because all numbers are interpreted as HEX
by default.
Also, it fixes the mismatch between input arguments and output at 'mmc
write' example. Now it's 256 (0x100) blocks.
Signed-off-by: Alexander Shirokov <shirokovalexs@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.
tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)
Add missing space in assignment.
Fixes: a004f29464 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Freescale PCIe Root Port has PEXCSRBAR register at position of PCI BAR0.
PCIe Root Port does not have any PCIe memory, so returns zero when trying
to read from PCIe Root Port BAR0 and ignore any writes.
Signed-off-by: Pali Rohár <pali@kernel.org>
The host compiler is not failing on warnings at present, when the
-E flag is used in buildman. Add the required flag to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com>
Fix comments error in EVENT_DEBUG description:
this get usefui -> this to get useful
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix comments syntax error in event description:
creasted -> created
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix comments syntax error in SPL_LOAD_FIT_APPLY_OVERLAY description.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Map fdt_blob and new_fdt to sysmem, otherwise $fdtcontroladdr
and bdinfo output do not match and the bdinfo output address
is not a valid address accessible via sandbox memory accessors.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.
tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)
Add missing space in assignment.
Fixes: a004f29464 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The u-boot hush shell doesn’t support the unset command to clear a
variable and therefore an empty value ("c=") should be a valid value
for the set_local_var function to clear the variable. This partial
reverts commit aa72252963 ("common: cli_hush: avoid dead code") and
only checks for a `=` in the string. Additionally explicit call the
unset_local_var function to remove the variable if the value is empty.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Updates for starqltechn and other qualcomm platforms, hi3798mv200,
Broadcom Northstar, and mediatek platforms
- Drop omap5_uevm, and assorted TI platform updates
- Add MAX14526
It adds compatible "hisilicon,hi3798mv200-dw-mshc" for HC2910 SoC
Hi3798MV200 to probe this mmc driver.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
This platform is unsupported by TI and was never widely distributed. As
this is untested for a long while and missing some DM conversions,
remove it and related device tree files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Errata doc: https://www.ti.com/lit/pdf/sprz457
Errata ID i2331 CPSW: Device lockup when reading CPSW registers
Details: A device lockup can occur during the second read of any CPSW
subsystem register after any MAIN domain power on reset (POR). A MAIN
domain POR occurs using the hardware MCU_PORz signal, or via software
using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR.
After these resets, the processor and internal bus structures may get
into a state which is only recoverable with full device reset using
MCU_PORz.
Due to this errata, Ethernet boot should not be used on this device.
Workaround(s): To avoid the lockup, a warm reset should be issued after
a MAIN domain POR and before any access to the CPSW registers. The warm
reset realigns internal clocks and prevents the lockup from happening.
Workaround above errata by calling do_reset() in case of cold boot in
order to trigger warm reset. This needs enabling SYSRESET driver in R5
SPL to enable TI SCI reset driver.
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Add support to detect daughtercards (GESI Ethernet card) in-order
to set the MAC address of the main CPSW2G interface.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Update the default BOOTCOMMAND to provide an automatic and easier way
to configure ethernet PHY before loading the firmware.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Commit dafe0fbfb0 ("pinctrl: mediatek: rewrite mtk_pinconf_set and
related functions") changed the logic deciding to set R0 and R1
registers for V1 devices.
Before:
/* Also set PUPD/R0/R1 if the pin has them */
err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
if (err != -EINVAL) {
mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
}
After:
/* try pupd_r1_r0 if pullen_pullsel return error */
err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
val);
if (err)
return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
pullup, val);
Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function
always either returns 0 in case of success or -EINVAL in case any error
has occurred. Hence the logic responsible of the decision to program R0
and R1 has been inverted.
This leads to problems on BananaPi R2 (MT7623N) when booting from
SDMMC, it turns out accessing eMMC no longer works since
U-Boot 2022.07:
MT7623> mmc dev 0
Card did not respond to voltage select! : -110
The problem wasn't detected for a long time as both eMMC and SDMMC work
fine if they are used to boot from, and hence R0 and R1 were already
setup by the bootrom and/or preloader.
Fix the logic to restore the originally intended and correct behavior
and also change the descriptive comment accordingly.
Fixes: dafe0fbfb0 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Tested-By: Frank Wunderlich <frank-w@public-files.de>
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to 8.
The C7x and VPAC have been overwhelming the DSS's access to the DDR
(when it was accessing via the Non Real-Time (NRT) Queue), primarily
because their functional frequencies, and hence DDR accesses, were
significantly higher than that of DSS. This led the display to flicker
when certain edgeAI models were being run.
With the DSS traffic serviced from the RT queue, the flickering issue
has been found to be mitigated.
The am62a qos files are auto generated from the k3 resource partitioning
tool.
Section-3.1.12, "QoS Programming Guide", in the AM62A TRM[1], provides
more information about the QoS, and section-14.1, "System Interconnect
Registers", provides the register descriptions.
[1] AM62A Tech Ref Manual: https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
J721E and J7200 have same file j721e_init.c which had the firewall
configs for J721E being applied on J7200 causing the warnings. Split the
firewalls for both the boards to remove those warnings.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
The current documentation for Snapdragon based Samsung
and Qualcomm boards is vague in the sense that at one place
it mentions that u-boot can be used as a replacement for ABL
bootloader and at another it mentions that u-boot is loaded
as an Android boot image through ABL.
Fix the same.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Currently a few 'board/qualcomm/../Makefile' point to incorrect
path of sdm845 board file.
Fix the same.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
K3 devices have some firewalls set up by ROM that we usually remove so
that the development is easy in HS devices.
While removing the firewalls disabling a background region before
disabling the foreground regions keeps the firewall in a state where all
the transactions will be blacklisted until all the regions are disabled.
This causes a race for some other entity trying to access that memory
region before all the firewalls are disabled and causes an exception.
Since the background regions configured by ROM are in such a manner
that they allow all transactions, don't touch the background regions at
all.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Allow non fitImage bootflow on Field Securable (HS-FS) devices in
addition to GP, force fitImage boot only on Security enforced (HS-SE)
devices where signed images are necessary to maintain chain of trust.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
On modern Qualcomm platforms including SDM845 a GENI SE QUP IP
description is supposed to be found in board device tree nodes,
the version of the IP is used by the GENI UART driver to properly
set an oversampling divider value, which impacts UART baudrate.
The change touches dragonboard845c and starqltechn board device
tree source files, a device tree node label to "debug" UART is
renamed to 'uart9' according to the naming found in Linux.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Starting from QUP v2.5 the value of oversampling is changed from 32
to 16, keeping the old value on newer platforms results on wrong set
UART IP clock divider, thus the asked baudrate does not correspond to
the actually set with all the consequencies for a user.
The change links the driver to a new Qualcomm GENI SE QUP driver
to get its hardware version and update the oversampling value.
Deliberately the code under CONFIG_DEBUG_UART_MSM_GENI is not touched,
since a wanted baudrate can be controlled by setting a modified
CONFIG_DEBUG_UART_CLOCK build time variable.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
The name "se" is used in upstream Linux device trees and has been for
ages, long before this U-Boot-ism was introduced. Same goes for the
existing compatible. Get rid of that.
[vzapolskiy: removed a ready change in the driver]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
A compiler warns about a missing function prototype, which is valid
and fixed by converting the function into static one, also fix
interleaved local variable declarations and assignments.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Fixes: 324df15a29 ("serial: qcom: add support for GENI serial driver")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
There is only one clock supplier to the serial IP, thus getting it by
name is not needed, also note that "clock-names" property is not listed
under doc/device-tree-bindings/serial/msm-geni-serial.txt, and finally
"se-clk" clock name is invalid, if added, it shall get "se" value like
it's already described in Linux device tree documentation.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.
[vzapolskiy: extracted the driver change from a combination with dts changes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
For whatever reason, likely a driver stub was copied from another
driver, the driver contains a bunch of unnecessary and confusing
includes like watchdog.h etc., the change reduces the list.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
This change adds a Qualcomm GENI SE QUP device driver as a wrapper for
actually enabled and used serial devices found on a board.
At the moment the driver is pretty simple, its intention is to populate
childred devices and provide I/O mem read interface to them as clients,
this is needed for GENI UART driver to set up a proper clock divider
and provide the actually asked baud rate.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
This adds a simple Northstar "BRCMNS" board to be used with
the BCM4708x and BCM5301x chips.
The main intention is to use this with the D-Link DIR-890L
and DIR-885L routers for loading the kernel into RAM from
NAND memory using the BCH-1 ECC and using the separately
submitted SEAMA load command, so we are currently not adding
support for things such as networking.
The DTS file is a multiplatform NorthStar board, designed to
be usable with several NorthStar designs by avoiding any
particulars not related to the operation of U-Boot.
If other board need other ECC for example, they need to
create a separate DTS file and augment the code, but I don't
know if any other users will turn up.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The original Northstar is an ARM SoC series that comprise
BCM4709x and BCM5301x and uses a dual-core Cortex A9, the
global timer and a few other things.
This series should not be confused with North Star Plus
(NSP) which is partly supported by U-Boot already.
The SoC is well supported by the Linux kernel and OpenWrt
as it is used in many routers.
Since we currently don't need any chip-specific quirks
and can get the system up from just the device tree, a
mach-* directory doesn't even need to be added, just
some small Kconfig fragments.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
MAX14526 is a powerful extcon chip which allows detection of various
plugs like usb, mhl, uart, headset etc. This version of driver
implements support of AP-usb and CP-usb/uart paths.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new simple uclass for extcon. Currently all setup is done
in the probe. Uclass struct and ops are empty for now.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI autoconfig case for PCI_CLASS_PROCESSOR_POWERPC just prints debug
message and then calls autoconfig setup code like for any other standard
endpoint device. We do not need special debug message for it, so remove
this case and handle PCI_CLASS_PROCESSOR_POWERPC via default code path.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
For the CONFIG_PHY case, move the PHY setup before the register access.
This avoids a hang when updating the imx8mm.dtsi which moves the
USB OTG power-domains to the PHY.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Fabio Estevam <festevam@denx.de>
Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to
an env file, so do the conversion.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The bootcmd/altbootcmd mechanism is not invoked for bootmenus.
Manually compare bootcount and bootlimit to implement fallback on all
codepaths.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Defaults have changed, we do not want the bootmenu to contain EFI
options.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Currently, only the first MAC address is read from the fuses.
The second MAC address is not read and Linux assigns a random one.
To prevent this behavior, read the second MAC address from the fuses
and store it into the eth1addr environment variable so that it
can be passed to Linux.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add lockdown U-Boot env support so that only certain U-Boot environment
variables are allowed to be modified.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Instead of loading the zImage kernel and the devicetree separately, switch
to the fitImage format, which is more convenient when working with secure
boot, for example.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
GPT Partition labels are used for determining the right
root filesystem to boot from.
The U-Boot environment is configured to reside in the eMMC hardware
boot partition we are currently booted from.
This should enable a dual copy approach for upgrading the bootloader.
One can overwrite the inactive hardware partition with new bootloader
and environment and afterwards switch the eMMC boot partition for an
atomic bootloader switch.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
When performing rootfs update via swupdate, it is convenient to check the
'ustate' variable to decide whether the update succeeded or not.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Run the altbootcmd script if any step of bootcmd fails.
This ensures that always a valid image can be run.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add an altbootcmd script, which is convenient way to integrate with
swupdate and perform a roll back of the previous working version in the
case of update failure.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add automatic boot counter that increases after every
reset. After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it is
disabled if bootlimit isn't set.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands
are available.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Introduce EXTRA_BOOTPARAMS to allow passing additional parameters
to kernel command line. This is useful for debugging purposes.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
It doesn't seem appropriate for arch/SOC to use a board-level
functionality (CONFIG_OF_BOARD_FIXUP), because this prevents boards
that need to do FDT fixup from using that feature.
Also, this code is completely dead and useless (from comments by
Rasmus Villemoes on the mailing list):
- No in-tree imx8m-based board seems to set CONFIG_OF_BOARD_FIXUP
- The nodes which that function wants to disable don't even exist in
the U-Boot copy of imx8mp.dtsi.
This code was introduced in commit 35bb60787b. It seems to be some
random import of code from downstream NXP U-Boot, with a commit
message that makes no sense in upstream context.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
commit 787f04bb6a ("imx: add USB2_BOOT type") broke get_boot_device()
for IMX8 which affects booting from SDP due to boot_instance being
non-zero.
Fix this by only using boot_instance for imx8ulp and imx9.
Fixes: 787f04bb6a ("imx: add USB2_BOOT type")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add debug messages to print the real pixel clock rate, which may not be
the requested one.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add the get_lcd_clk() function to get the LCD pixel clock rate.
The patch has been tested on imx6ul platform.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.
The same Linux kernel calculations are now used to get the PLL video
rate.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Avoid a buffer overflow if assigned-clock-rates has less than two elements.
Fixes: 98bcdf1635 ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
At BDF address 00:00.0 is fictional device which PCI configuration header
is for configuring mpc85xx PCI controller itself. PCI config space of this
device has ATMU inbound registers on position of PCI BARs. Trying to do PCI
auto configuration of this device cause rewriting ATMU inbound registers.
To avoid it, do not allow overwriting registers at BARs positions. And
because this device does not have any PCI memory, return zeros when trying
to read PCI BARs config space registers. It signals to auto configuration
tool to not allocate any PCI memory for this device.
This information is taken from MPC8544E Reference Manual, sections
17.3.1.3, 17.3.1.1.1, 17.3.2 and 17.3.2.11. Available at NXP website:
https://www.nxp.com/docs/en/reference-manual/MPC8544ERM.pdf
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
which does not support access to extended PCIe registers (above 0xff),
as opposite of the PCIe driver pcie_fsl.c for the same platform.
So do not try to access extended PCIe registers as it cannot work.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.
This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
On PowerPC we should use barrier after store operation to HW register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
The "Programming Environments Manual for 32-Bit Implementations of the
PowerPC™ Architecture" says "W and G bits are not defined for IBAT
registers. Attempting to write to these bits causes boundedly-undefined
results"
The "e300 Power Architecture™ Core Family Reference Manual" says the
same: "Neither the W or G bits of the IBAT registers should be set.
Attempting to write to these bits causes boundedly-undefined results."
Remove the possibility to set those bytes.
Fixes: 30915ab95d ("mpc83xx: Migrate BATS config to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Mario Six <mario.six@gdsys.cc>
Please pull the second part of the sunxi pull request for this cycle.
Another bunch of patches that replace old-school U-Boot hacks with
proper DM based code, this time for the raw NAND flash driver, and the
USB PHY VBUS detection code. Plus two smaller patches that were sitting
in my inbox for a while.
Gitlab CI passed. In lack of some supported board with NAND flash I
couldn't really test this part, but apparently this was tested by the
reviewer. I briefly ran the branch on some boards with USB-OTG, and
this still worked.
This pull request adds support for the last CPU board from
CS GROUP France (previously CSSI).
That CPU board called CMPCPRO has a mpc8321E CPU (Family PQII PRO hence
its name) and can be plugged in place of the CMPC885 board.
In order to support that new board, the following changes are included
in this series:
- Make the mpc8xx watchdog driver more generic for reusing it
with mpc83xx
- Fix various small problems on mpc83xx platform
- Add a GPIO Driver for QE GPIOs
- Add support for mpc832x into mpc83xx SPI driver
- Refactor existing board code that will be shared with new board
- Add the new board
For the devfdt_get_addr_index_ptr() and devfdt_get_addr_size_index_ptr()
function use map_sysmem() function as cast for the return for use in
sandbox. Also fix sandbox test.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop second hunk:
Signed-off-by: Simon Glass <sjg@chromium.org>
importlib.resources became part of 3.7 only. Allow using distros with
3.6 and the importlib_resources backport.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable orig_dir cannot be used in the finally block if it has not be
assigned outside of the try block.
tools/patman/func_test.py:523:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)
tools/patman/func_test.py:691:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)
Fixes: fd70986a62 ("patman: Add a test that uses gitpython")
Fixes: be051c0c77 ("patman: Detect missing upstream in CountCommitsToBranch")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There's quite a few instances of board-specific code doing
off = fdt_path_offset(gd->fdt_blob, ...);
...
ret = uclass_get_device_by_of_offset(..., off, &dev);
looking for an eeprom or a pmic via some alias. Such code can be
simplified a little if we have a helper for directly getting a device
via device tree path (including being given as an alias).
Implement it in terms of ofnode rather than raw offsets so that this
will work whether live tree is enabled or not.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The functions uclass_find_device_by_phandle() and
uclass_get_device_by_phandle_id() both loop over a given uclass
looking for a device with a given phandle. Factor that out to a common
helper.
For now, there are no (known potential) users of the new helper
outside uclass.c, so make it static.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warning on sandbox_spl; fix code style:
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently doing 'reset' command in sandbox with tracing enabled causes
SIGSEV
```
Hit any key to stop autoboot: 0
=>
=>
=> reset
resetting ...
Segmentation fault (core dumped)
```
Tracing callback uses RAM buffer for storing tracing reports, but
state_uninit() function unmaps whole RAM, which causes SIGSEV on umapped
memory inside tracing subsystem.
Fix it by disabling tracing before unmapping memory
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing check for CONFIG_TRACE:
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/posix_types.h and
arch/sandbox/include/asm/posix_types.h should use different defines.
Add SPDX header.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building this with clang, we get a warning such as:
cmd/bootflow.c:412:27: warning: variable 'bflow' is uninitialized when used here [-Wuninitialized]
printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name);
^~~~~
And a suggestion to just initialize bflow to NULL. This would however
would be ensuring a bad dereference. Instead, looking at the function we
rework things so that when CONFIG_EXPO is not enabled (and so, no UI) we
error early and would never reach this point in the code. Simplify the
rest slightly as well while at this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given a file ../img of size 4294967296 with GPT partition table and
partitions:
=> host bind 0 ../img
=> part list host 0
Disk host-0.blk not ready
The cause is os_filesize() returning int. File sizes must use off_t.
Correct all uses of os_filesize() too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The header binman_sym.h depends on ulong typedef but does not include
types.h. This means the header must be included after including types.h
or a header that includes it.
We could include types.h but instead let's just switch from ulong
to directly using unsigned long. This removes the need for typedef'ing
it in some of the tests, so also remove those.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Function fdt_simplefb_enable_existing_node() should be static as it is not
used outside common/fdt_simplefb.c.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
vbe_simple_read_bootflow() calls vbe_simple_read_bootflow_fw()
which is only available when BOOTMETH_VBE_SIMPLE_FW is on.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid incorrect fall through:
A USB_RT_HUB request should not be treated as USB_RT_PORT.
Simplify the coding:
Avoid duplicate debug() statements.
This fixes all -Wimplicit-fallthrough warnings.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Handling of SANDBOX_FLASH_EP_OUT should never fall through to
SANDBOX_FLASH_EP_IN.
This addresses a warning shown when compiling with
-Wimplicit-fallthrough.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CSSI has another CPU board, similar to the CMPC885 board
that get plugged on the two base boards MCR3000_2G and MIAE.
That CPU board is called CMPCPRO because it has a MPC8321E CPU,
also known as Power QUICC II PRO.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
All the code used to manage the mother boards will be
common to soon to come CPU board.
Move all that code into common.c
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
On cmpc885 board, the ethernet addresses are stored in an
EEPROM that is accessed through SPI.
A 3 bytes command is sent to the chip then the content
gets read. At the time being a single block access is
performed, ignoring the first 3 bytes read.
Reword the SPI transfer to first send 3 bytes then
receive the content of the EEPROM so that there don't be
3 dummy bytes at the beginning of the buffer.
And move the function into common.c so that it can be
reused by the board that will be added in a future patch.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
In preparation of the new cssi board called cmpcpro which
we be introduce in a future patch, move common
functions into a dedicated file in a common directory.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
It is possible to use host-side USB with externally-provided VBUS. For
example, some USB OTG cables have an extra power input which powers
both the board and the USB peripheral.
To support this setup, skip enabling the VBUS switch/regulator if VBUS
voltage is already present. This behavior matches the Linux PHY driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Update boards to use the USB power supply driver, as referenced in the
device tree, instead of a virtual GPIO. This removes the need for some
DM-incompatible special cases in the GPIO driver.
The following five boards used AXP0-VBUS-DETECT in their config, but are
missing the "usb0_vbus_power-supply" property in their device tree:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
None of those five boards have the MUSB controller (USB OTG) enabled in
their device trees, so this change should not break anything for them.
Additionally, the following board intentionally omits the property
because VBUS is always enabled:
- Nintendo_NES_Classic_Edition_defconfig /
sun8i-r16-nintendo-nes-classic
The PHY driver already assumes VBUS is enabled when no detection method
is available, so again this will not cause any problems.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This driver reports the presence/absence of voltage on the PMIC's USB
VBUS pin. This information is used by the USB PHY driver. The
corresponding Linux driver uses the power supply class, which does not
exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Clocks, resets, and pinmuxes are now handled by the driver model, so the
only thing the "board" code needs to do is load the driver. This matches
the pattern used by other DM raw NAND drivers (there is no NAND uclass).
The actual board code is now only needed in SPL.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As a first step toward converting this driver to the driver model, use
the ofnode abstraction to replace direct references to the FDT blob.
Using ofnode_read_u32_index removes an extra pair of loops and makes the
allwinner,rb property optional, matching the devicetree binding.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Each chip is required to have a unique CS number ("reg" property) in the
range 0-7, so there is no need to separately count the number of chips.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently NAND clock setup is done in board code, both in SPL and in
U-Boot proper. Add the NAND clocks/resets here so they can be used by
the "full" NAND driver once it is converted to the driver model.
The bit locations are copied from the Linux CCU drivers.
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
On sunxi boards, SPL looks for U-Boot at a 32 KiB offset, unless SPL is
larger than 32 KiB, in which case U-Boot immediately follows SPL. See
the logic in spl_mmc_get_uboot_raw_sector() and spl_spi_load_image().
In two cases, the existing binman description mismatches the SPL code.
For 64-bit boards, binman would place U-Boot immediately following SPL,
even if SPL is smaller than 32 KiB. This can happen when SPL MMC support
is disabled (i.e. when booting from SPI flash).
In contrast, for 32-bit boards, binman would place U-Boot at 32 KiB,
even if SPL is larger than that. This happens because the 'offset'
property does not consider the size of previous entries.
Fix both issues by setting a minimum size for the SPL entry, which
exactly matches the logic in the SPL code. Unfortunately, this size must
be provided as a magic number, since none of the relevant config symbols
(SPL_PAD_TO, SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, and SYS_SPI_U_BOOT_OFFS)
are guaranteed to be defined in all cases.
Fixes: cfa3db602c ("sunxi: Convert 64-bit boards to use binman")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To quote the author:
Adding block storage emulation for NVM XIP flash devices.
Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
as a block storage device with read only capability.
Here NVM flash devices are devices with addressable
memory (e.g: QSPI NOR flash).
The NVM XIP block storage emulation provides the following features:
- Emulate NVM XIP raw flash as a block storage device with read only capability
- Being generic by design and can be used by any platform
- Device tree node
- Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them
- A generic NVMXIP block driver allowing to read from the XIP flash
- A generic NVMXIP Uclass driver for binding the block device
- A generic NVMXIP QSPI driver
- Implemented on top of memory-mapped IO (using readq macro)
- Enabling NVMXIP in sandbox64
- A sandbox test case
- Enabling NVMXIP in Corstone1000 platform as a use case
For more details please refer to doc/develop/driver-model/nvmxip.rst
provide a test for NVM XIP devices
The test case allows to make sure of the following:
- The NVM XIP QSPI devices are probed
- The DT entries are read correctly
- the data read from the flash by the NVMXIP block driver is correct
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
make readq return unsigned long
readq should return 64-bit data
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
add nvmxip_qspi driver under UCLASS_NVMXIP
The device associated with this driver is the parent of the blk#<id> device
nvmxip_qspi can be reused by other platforms. If the platform
has custom settings to apply before using the flash, then the platform
can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
nvmxip-blk driver. The custom driver can be implemented like nvmxip_qspi in
addition to the platform custom settings.
Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.
For more details please refer to doc/develop/driver-model/nvmxip_qspi.rst
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
add block storage emulation for NVM XIP flash devices
Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
as a block storage device with read only capability.
Here NVM flash devices are devices with addressable
memory (e.g: QSPI NOR flash).
The implementation is generic and can be used by different platforms.
Two drivers are provided as follows.
nvmxip-blk :
a generic block driver allowing to read from the XIP flash
nvmxip Uclass driver :
When a device is described in the DT and associated with
UCLASS_NVMXIP, the Uclass creates a block device and binds it with
the nvmxip-blk.
Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
To quote the author:
This code was converted to driver model a long time again but it was a
pretty rough conversion. It introduced a few minor bugs, e.g. the device
capacity is incorrect and some flags are lost (such as lba48).
This series tidies up the code and fixes these bugs. This involves quite
a bit of refactoring, so it is done one patch at a time for easier
review.
The code has quite a few unnecessary brackets and comparisons to zero,
etc. Fix these up as well as some upper-case hex values and use of 0x in
printf() strings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid the use of the function name in a few of the debug() calls, since
this causes a checkpatch warning. Convert all other calls too.
Use lower-case hex consistently.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix a longstanding bug where the LBA is calculated as the size of the
media instead of the number of blocks. This was perhaps not noticed
earlier since it prints the correct value first, before setting the wrong
value.
Drop the unnecessary blksz variable while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 68e6f221ed ("block: ide: Fix block read/write with driver model")
We only use one member of the ide_dev_desc[] array at a time and it does
not stick around outside ide_probe(). Use a single element instead.
Copy over the missing members of blk_desc at the same, since this was
missing from the previous code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 68e6f221ed ("block: ide: Fix block read/write with driver model")
Rather than having the caller fill some of this in, do it all in the
ide_ident() function, since it knows all the values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update ide_ident() to indicate whether it finds a device or not. Use
that to decide whether to create a block device for it, rather than
looking DEV_TYPE_UNKNOWN.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the code uses 'desc' as the variable name for a blk descriptor.
Change ide to do the same.
Tidy up some extra brackets and types while we are here.
Leave the code in ide_probe() alone since it is about to be refactored.
Signed-off-by: Simon Glass <sjg@chromium.org>
The two loops in this function operate on the same ide_dev_desc[] array.
Combine them to reduce duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that ide_probe() is the only caller of ide_init(), move all the code
into the probe function, so it is easier to refactor it.
Move ide_dev_desc[] into ide_probe() to, since it is the only user.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current implementation adds this information in the block device's
probe() function, which is called in the blk_probe_or_unbind() in
ide_probe().
It is simpler to do this in ide_probe() itself, since the effect is the
same. This helps to consolidate use of ide_dev_desc[] which we would like
to remove.
Use strlcpy() to keep checkpatch happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use IS_ENABLED() instead for all conditions. Add the 'lba48' flag into
struct blk_desc always, since it uses very little space. Use a bool so
the meaning is clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Change the if() to remove extra brackets and check for the positive case
first, i.e. when a device is found. Exit the loop in that case, with the
retry logic in the 'else' part.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is hard to follow as it uses #ifdef in a strange way. Adjust
it to avoid the preprocessor. Drop the special return for the non-ATAPI
case since we can rely on tries becoming 0 and exiting the loop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a 'tries' variable which starts at the number of tries we want to do,
rather than a 'retries' one that stops at either 1 or 2. This will make it
easier to refactor the code to avoid the horrible #ifdefs
Signed-off-by: Simon Glass <sjg@chromium.org>
The use of atapi_read() was incorrect dropped. Fix this so that it will
be used when needed. Use a udevice for the first argument of atapi_read()
so it is consistent with ide_read().
This requires much of the ATAPI code to be brought out from behind the
existing #ifdef. It will still be removed by the compiler if it is not
needed.
Add an atapi flag to struct blk_desc so the information can be retained.
Fixes: 145df842b4 ("dm: ide: Add support for driver-model block devices")
Fixes: d0075059e4 ("ide: Drop non-DM code for BLK")
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
These are not used from outside this file anymore. Make them static and
remove them from the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the code does ide_init() as a separate operation, then calls
device_probe() to copy over the information. We can call ide_init() from
probe just as easily.
The only difference is that using 'ide init' twice will do nothing.
However it already fails to copy over the new data in that case, so the
effect is the same. For now, unbind the block devices and remove the IDE
device, which causes the bus to be probed again. Later patches will fix
this up fully, so that all blk_desc data is copied across.
Since ide_reset() is only called from ide_init(), there is no need to init
the ide_dev_desc[] array. This is already done at the end of ide_init() so
drop this code.
The call to uclass_first_device() is now within the probe() function of
the same device, so does nothing. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It doesn't really matter if we mention things which are not present. For
example, if 'nvme' is included but the board does not support it, it just
continues with the next item in the list.
It is simpler to use the same target list for all boards, so drop the
different one for rk3399.
Signed-off-by: Simon Glass <sjg@chromium.org>
When loading a file from a block device, efiload_read_file
was using the seq_num of the device (e.g "35" of virtio_blk#35)
instead of the block device id (e.g what you get from running
the corresponding device scan command, like "virtio 0")
This cause EFI booting from these devices to fail as an
invalid device number is passed to blk_get_device_part_str:
Scanning bootdev 'virtio-blk#35.bootdev':
distro_efi_read_bootflow_file start (efi,fname=<NULL>)
distro_efi_read_bootflow_file start (efi,fname=<NULL>)
setting bootdev virtio, 35, efi/boot/bootaa64.efi, 00000000beef9a40, 170800
efi_dp_from_name calling blk_get_device_part_str
dev=virtio devnr=35 path=efi/boot/bootaa64.efi
blk_get_device_part_str (virtio,35)
blk_get_device_by_str (virtio, 35)
** Bad device specification virtio 35 **
Using default device tree: dtb/qemu-arm.dtb
No device tree available
0 efi ready virtio 1 virtio-blk#35.bootdev.par efi/boot/bootaa64.efi
** Booting bootflow 'virtio-blk#35.bootdev.part_1' with efi
blk_get_device_part_str (virtio,0:1)
blk_get_device_by_str (virtio, 0)
No UEFI binary known at beef9a40 (image buf=00000000beef9a40,addr=0000000000000000)
Boot failed (err=-22)
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when debugging is off, bootdev_find_in_blk() sometimes fails
to find a valid bootflow, e.g. with virtio. Accessing the 'blk' variable
later in the function seems to correct it.
Move the 'ret' check before the debug statement and set the block device
again aftewards, to work around this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable some messages that might provide hints, but only for
CMD_BOOTFLOW_FULL since otherwise the -l flag is not available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Use the -l flag to indicate whether to report missing uclasses.
Also try to be more helpful when no devices are found. For example, when
we see something 'scsi0' requested and nothing was found, this indicates
that there are no SCSI devices, so show a suitable message.
Move messages out of the low-level functions so that silent operation
is possible.
This means they are never reported unless BOOTSTD_FULL is enabled, since
the -l flag cannot otherwise be set.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The current EFI implementation has a strange quirk where it watches
loaded files and uses the last-loaded file to determine the device that
is being booted from.
This is confusing with bootstd, where multiple options may exist. Even
loading a device tree will cause it to go wrong. There is no API for
passing this information, since the only entry into booting an EFI image
is the 'bootefi' command.
To work around this, call efi_set_bootdev() for EFI images, if possible,
just before booting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes virtio may rely on PCI, or at least that is what the
distro_bootcmd script suggests. Add this in.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should only store the FDT filename if we were able to determine one.
Adjust the logic for this.
This corrects the case where no FDT is needed to boot, such as with EFI
using ACPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
- A few TI, mpc8379erdb and vexpress64 updates, some arm64 core updates,
test cleanups, Xen cleanups, assorted code and Kconfig cleanups (many
in preparation for using clang on ARM), psci pre-reloc fixes, enable
PCI bus mastering for ATA devices, and a gpio-uclass bugfix
If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause
issues in future command reads. This issue came to light when some flash
reads in STIG mode were coming back dirty.
Co-developed-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
OSPI controller supports all types of op variants in STIG mode,
only limitation being that the data payload should be less than
8 bytes when not using memory banks.
STIG mode is more stable for operations that send small data
payload and is more efficient than using DMA for few bytes of
memory accesses. It overcomes the limitation of minimum 4 bytes
read from flash into RAM seen in DAC mode.
Use STIG mode for all read and write operations that require
data input/output of less than 8 bytes from the flash, and thereby
support all four phases, cmd/address/dummy/data, through OSPI STIG.
Also, remove the reorder address chunk in apb_command_write since we now
setup ADDR BIT field that does the same job in a cleaner way.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
buswidth and dtr fields in spi_mem_op are only valid when the
corresponding spi_mem_op phase has a non-zero length. For example,
SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR
phase.
Fix the dtr checks in set_protocol() to ignore empty spi_mem_op
phases, as checking for dtr field in empty phase will result in
false negatives.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This patch adds fixups for s25fs512s to address the following issues
from reading SFDP:
- Non-uniform sectors by factory default. The setting needs to be
checked and assign erase hook as needed.
- Page size is wrongly advertised in SFDP.
- READ_1_1_2 (3Bh/3Ch), READ_1_1_4 (6Bh/6Ch), and PP_1_1_4 (32h/34h)
are not supported.
- Bank Address Register (BAR) is not supported.
In addition, volatile version of Quad Enable is used for safety.
Based on patch by Takahiro Kuwano with s25fs_s_post_bfpt_fixup() updated
to use 4-byte address commands instead of extended address mode and the
page_size is fixed to 256
For future use, manufacturer code should be moved out from framework
code as same as in Linux.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Family of panels used by HTC in One X. Though were used variants
at least from 3 vendors, this driver provides generic support for
all of them.
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X T30 Sony
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Sharp
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DC based PWM backlight is found on some T20 and T30 devices
(HTC One X). This backlight is controlled by Tegra DC and
is adjustable by the DC PM0 or PM1 signal.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # HTC One X T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Driver adds support for panels with Renesas R69328 IC
Currently supported compatible is:
- jdi,dx12d100vm0eaa
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
R61307 is liquid crystal driver for high-definition
amorphous silicon (a-Si) panels and is ideal for
tablets and smartphones.
Supported compatibles are:
- koe,tx13d100vm0eaa
- hitachi,tx13d100vm0eaa
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
SSD2825 is an innovative and cost-effective MIPI Bridge Chip solution
targeting high resolution smartphones. It can convert 24bit RGB
interface into 4-lane MIPI-DSI interface to drive extremely high
resolution display modules of up to 800 x 1366, while supporting AMOLED,
a-si LCD or LTPS advanced panel technologies for smartphone applications.
Bridge is wrapped in panel uClass model for wider compatibility.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This is basic lm3533 driver only with bank A and backlight cell
support.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By the time we jump to the err label, count represents the number of
gpios we've successfully requested. So by subtracting one, we fail to
free the most recently requested.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Xen core_init() is calling HVC which should be called from EL1 level that's
why do Xen initialization only when U-Boot runs in EL1.
Signed-off-by: Michal Simek <michal.simek@amd.com>
U-Boot currently implements hypervisor calls only for ARM64 that's why add
dependency on ARM64. The hardware functionality is also available on
ARMv7a, but currently not supported by U-Boot, hence it is not added to the
list of dependencies here.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Since commit de39dc7162 ("arm: armv7-a: Compile and tune for armv7-a
instead of armv5") is used -march=armv7-a option for Omap3 platforms.
With directive ".arch_extension sec" it is possible for -march=armv7-a to
directly use ARM SMC instruction.
So enable ".arch_extension sec" in Omap3 lowlevel_init.S and replace hand
assembled ".word 0xe1600071" by "SMC #1".
Since commit 51d0638650 ("arm: omap-common: add secure smc entry") same
pattern is already used in arch/arm/cpu/armv7/omap-common/lowlevel_init.S.
Signed-off-by: Pali Rohár <pali@kernel.org>
Commit aeb40f1166 ("tools: env: use /run to store lockfile") updated the
path to the lockfile but did not update the documentation to match.
Use the new path in the documentation.
Fixes: aeb40f1166 ("tools: env: use /run to store lockfile")
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The non DM code path already would enable pci bus mastering. Do the
same for the DM code path.
Fixes AHCI problems I am seeing on an Intel Apollolake device.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[trini: Use ahci_dev not dev in the calls]
Signed-off-by: Tom Rini <trini@konsulko.com>
When building with clang, we see:
board/emulation/common/qemu_dfu.c:51:24: warning: 'memset' call operates on objects of type 'char' while the size is based on a different type 'char *' [-Wsizeof-pointer-memaccess]
As we're calling memset with the length set to the size of the pointer
and not the size of the buffer. Correct this with a call of the size of
the buffer itself.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
We can only use the old U-Boot API for standalone applications when
building U-Boot with GCC as it relies upon the "gd is a register" trick
that only GCC supports. Further, rework the rest of the options so that
they are in the API menu and only visible if API support is enabled.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add weak function psci_sysreset_get_status for platform to define
their own reset status with CONFIG_SYSRESET enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
XEN config can be enabled by other platforms (even it doesn't need to make
sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also
pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires
XEN to be enabled.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sometimes when doing tests on real hardware we sometimes run in to the
case where some of these mounts haven't been fully flushed. Using the
--lazy option with umount will allow us to continue while letting the OS
handle flushing the data out still.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building with clang, it notes that sdinfo may be unused
uninitialized in some cases. This appears to be true from reading the
code, and we can simply set the variable to zero to start with and be as
correct as before.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
When building with clang we get a warning that rdaddr could be
uninitialized in one case. While this cannot functionally happen, we can
easily silence the warning.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Toolchains which do not directly support using "isb" and "dsb" directly
are no longer functionally supported in U-Boot. Furthermore, clang has
for a long time warned about using the alternate form that we were.
Update the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass
-ffixed-r9. Rather than having this logic in two places, we can do this
once in arch/arm/config.mk. Further, while gcc will ignore being passed
both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will
note that -ffixed-r9 is not used. Remove this duplication to also remove
the warning.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the case of using clang to build, and having not already enabled the
private libgcc, do not look for it, as it will not be found nor
required.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we invoke $(CPP) to make u-boot.lds we have LDPPFLAGS available to
set other required flags here. As this file is for the target and not
the host, we must ensure that CPP knows what the target architecture is.
For this, pass in $(CLANG_TARGET).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Today, only gcc has __builtin_aarch64_crc32b (clang-16 does not, for
example). Make this option depend on CC_IS_GCC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix dependencies
* Provide labels that are easier to grasp.
* Fix typo %s/whgch/which/
* Fix type %s/Is/is/
Fixes: 29784d62ed ("test: Add some tests for kconfig.h")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Default synchronous exceptions handler prints only esr and register
dump. Sometimes it requiers to see an address which caused exceptions
to understand what's going on
ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull
value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or
0x35. Same applies for EL1.
This patch adds function whivh determine current EL, gets correct FAR
register and prints it on panic.
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
The vexpress64 board family now relies on OF_CONTROL and
OF_HAS_PRIOR_STAGE, so platform-specific configuration requirements
are minimal.
The vexpress_aemv8a_semi_defconfig file defines many flags that are not
needed for a minimal boot, such as flash memory configuration.
Therefore create vexpress_fvp_defconfig which contains the minimum
configuration required to boot on an Arm v8a FVP.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
The Arm EBBR (Embedded Base Boot Requirements) require that the time
and basic networking EFI interfaces are available and working, so long
as the hardware has an RTC and network interface.
Arm FVPs typically have a memory-mapped PL031 RTC and a VIRTIO_NET
device defined in the device tree, so "imply" these in the Kconfig for
the FVP base model to simplify creating EBBR-compliant firmware.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
BASE_FVP now typically uses a devicetree provided by a prior boot stage
(typically Arm TF-A), so imply this option by default when
TARGET_VEXPRESS64_BASE_FVP is selected.
OF_HAS_PRIOR_STAGE selects OF_BOARD so this change is minor, but aligns
TARGET_VEXPRESS64_BASE_FVP with TARGET_VEXPRESS64_BASER_FVP.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Move to using .env file for setting up environment variables for am64x.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Some firewalls enabled by ROM are still left on. So some
address space is inaccessible to the bootloader. For example,
in OSPI boot mode we get an exception and the system hangs.
Therefore, disable all the firewalls left on by the ROM.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
If rev is equal to the array size, we'll access the array
one-past-the-end.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Bryan Brattlof <bb@ti.com>
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.
Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3bf38943ae
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 417a73581a
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3c433724e6
To quote the author:
These patches will use bounce buffers when VIRTIO_F_IOMMU_PLATFORM
feature is in a virtio device.
This feature can be tested with qemu with -device virtio-iommu-pci. So
that when a -device virtio-blk-pci with iommu_platform=true, it will
uses the bounce buffer instead.
When building with clang, the compiler compains with
drivers/spi/spi-synquacer.c:212:11: warning: variable 'bus_width' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
else if (priv->mode & SPI_TX_OCTAL)
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:276:11: note: uninitialized use occurs here
val |= ((bus_width >> 1) << BUS_WIDTH);
^~~~~~~~~
drivers/spi/spi-synquacer.c:212:7: note: remove the 'if' if its condition is always true
else if (priv->mode & SPI_TX_OCTAL)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:189:25: note: initialize the variable 'bus_width' to silence this warning
So initialize bus_width to 1 and add a warning if none of the configured
modes matches
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
NPCM7xx/NPCM8xx default is boot from flash.
removed set clock feature due to reliability and security.
the clock will set by bootblock or tip.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The .supports_op() callback function returns true by default after
performing driver-specific checks. Therefore the driver cannot apply
the buswidth in devicetree.
Call spi_mem_default_supports_op() helper to handle the buswidth
in devicetree.
Fixes: 358f803ae2 ("spi: Add Socionext F_OSPI SPI flash controller driver")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
in spi_mem_dtr_supports_op we have a check for allowing only even number
of bytes to be r/w. Odd bytes writing can be a concern while writing
data to a flash for example because 8 DTR mode doesn't support it.
However, reading ODD Bytes even though may not be physically possible
we can still allow for it because it will not have serious implications
on any critical registers being overwritten since they are just reads.
Cc: Vaishnav Achath <vaishnav.a@ti.com>
Cc: Pratyush Yadav <pratyush@kernel.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This should have been op->data.buswidth instead as we check for octal
bus width for the data related ops
Also add explanation for why there is checks for 8D even data bytes
Cc: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Pratyush Yadav <ptyadav@amazon.de>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for CHIP_ERASE opcode 0xc7 . This is useful in case the
entire SPI NOR is supposed to be erase at once, as is it considerably
faster than 4k sector erase and even slightly faster than 64k block
erase. The spi_nor_erase_chip() implementation is adapted from Linux
6.1.y as of commit 7d54cb2c26dad ("Linux 6.1.14") . The chip erase is
only used in case the entire MTD device is being erased, and the chip
does support this functionality.
Timing figures from W25Q128JW:
16 MiB erase using 4kiB sector erase opcode 0x20 ... 107.5s
16 MiB erase using 64kiB block erase opcode 0xd8 ... 39.1s
16 MiB erase using chip erase opcode 0xc7 .......... 38.7s
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Devices advertising the VIRTIO_F_IOMMU_PLATFORM feature require
platform-specific handling to configure their DMA transactions.
When handling virtio descriptors for such a device, use bounce
buffers to ensure that the underlying buffers are always aligned
to and padded to PAGE_SIZE in preparation for platform specific
handling at page granularity.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 1eff171e61
Reviewed-by: Simon Glass <sjg@chromium.org>
In preparation for bouncing virtio data for devices advertising the
VIRTIO_F_IOMMU_PLATFORM feature, allocate an array of bounce buffer
structures in the vring, one per descriptor.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 3e052749e7
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the attach and detach logic for manipulating vring descriptors
out into their own functions so that we can later extend these to
bounce the data for devices with VIRTIO_F_IOMMU_PLATFORM set.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: f73258a4bf
Reviewed-by: Simon Glass <sjg@chromium.org>
In preparation for explicit bouncing of virtqueue pages for devices
advertising the VIRTIO_F_IOMMU_PLATFORM feature, introduce a couple
of wrappers around virtqueue allocation and freeing operations,
ensuring that buffers are handled in terms of page-size units.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: b4bb5227d4
Reviewed-by: Simon Glass <sjg@chromium.org>
The pages backing the virtqueues for virtio PCI devices are not freed
on reset, despite the virtqueue structure being freed as part of the
driver '->priv_auto' destruction at ->remove() time.
Call virtio_pci_del_vqs() from virtio_pci_reset() to free the virtqueue
pages before freeing the virtqueue structure itself.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 5ed54ccd83
Reviewed-by: Simon Glass <sjg@chromium.org>
If we detect the VIRTIO_F_IOMMU_PLATFORM transport feature for a device,
then expose it in the device features.
Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 9693bd26bf
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid using preprocessor compilation directives and instead use simple
logical expressions for better readability since compiler will anyway
optimize out the respective code block if condition is not satisfied.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Add ospi boot media support to load splash image from OSPI memory,
add offset to read image from ospi and necessary flags defininig type
of storage and storage device.
Use CONFIG_IS_ENBALED to use the splash locations at SPL and u-boot
proper.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
To include video related global data variables and splash functions at
SPL and u-boot proper, use CONFIG_IS_ENABLED.
Replace CONFIG_CMD_BMP with CONFIG_BMP to enable splash_display function
at u-boot proper and SPL.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support splash screen at both u-boot proper and SPL use
CONFIG_IS_ENABLED and CONFIG_VAL to check for video related Kconfigs at
respective stages.
Replace CONFIG_CMD_BMP with CONFIG_BMP to enable splash_display function
at u-boot proper and SPL.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To support video driver at SPL use CONFIG_IS_ENABLED and CONFIG_VAL,
which checks for stage specific configs and thus enables video support
at respective stage.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Add rule to compile bmp.c at SPL and u-boot proper when CONFIG_SPL_BMP
and CONFIG_BMP are defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
To enable splash screen at SPL, need to compile cmd/bmp.c which also
includes bmp commands, since SPL doesn't use commands split bmp.c into
common/bmp.c which includes all bmp functions and cmd/bmp.c which only
contains bmp commands.
Add function delclaration for bmp_info in video.h.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add CONFIG_BMP and CONFIG_SPL_BMP which enable displaying bmp images at
u-boot proper and SPL.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
To enable splash screen and loading bmp from boot media, add rules to
compile splash.c and splash_source.c at SPL stage only when
CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_SPLASH_SOURCE are defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To enable TIDSS driver only at SPL stage add rule to compile the TIDSS
video driver.
CONFIG_$(SPL_)VIDEO_TIDSS will compile tidss_drv, at SPL only if
CONFIG_SPL_VIDEO_TIDSS is defined and at u-boot proper if
CONFIG_VIDEO_TIDSS is defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To enable video driver at SPL, need to compile video-uclass,
vidconsole-uclass, backlight-uclass, panel-uclass, simple-panel, add
rules to compile them at SPL and u-boot proper. To support
splash_display at SPL, need to compile video-bmp, add rule to compile at
SPL and u-boot proper.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Compile video driver at SPL using CONFIG_SPL_VIDEO.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
Add Kconfigs which enable the video driver and splash screen at SPL
stage only and not at u-boot proper. The existing Kconfigs from u-boot
proper were not used to make SPL splash screen independent to them.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Makes it possible to use e.g mcu_spi0 for custom board detection.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
For setting up the master firewalls present in the K3 SoCs, the arm64
clusters need to be powered on.
Re-locates the code for atf/optee authentication.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Configuring master firewalls require the power of the cluster to be
enabled before configuring them, change the load of rproc to configure
the gtc clocks and start the cluster along with configuring the boot
vector.
The start of rproc will only start the core.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
This matches AM64 and J721e and removes the need to forward
declare k3_spl_init(), k3_mem_init(), and check_rom_loaded_sysfw()
in sys_proto.h.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
These probably should be in some system wide header given their use.
Until then move them out of K3 sys_proto.h so we can finish cleaning
that header out.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This matches how it was done for pre-K3 TI platforms and it allows
us to move the forward declaration out of sys_proto.h.
It also removes the need for K3_BOARD_DETECT as one is free to simply
override the weak function in their board files as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This header is only used locally by K3 init files, no need to have it
up with the global mach includes. Move into local includes.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This function is the same for each device when it needs to shutdown
the R5 core. Move this to the common section and move the remaining
device specific ID list to the device hardware include.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The J7200 EVM will not include this file, this J7200 checks look
to be a copy/paste errora from j721e_evm.h, which J7200 *can* include.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The TARGET_x_R5_EVM check is already enough to limit these defines to
only the correct builds. Remove the extra outer check.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The K3 JTAG and SoC ID information is already stored in the K3 arch
hardware file, include that and use its definitions here.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This belongs in the J721e specific file as it is the only place
this is used. Any board level users should use the SOC driver.
While here, move the J721e and J7200 SoC IDs out of sys_proto.h
and into hardware.h. Use a macro borrowed from Rockchip and add
the rest of the SoC IDs for completeness and later use.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The MSMC fixup is something we do based on SoC, not based on the board.
So this fixup does not belong in the board files. Move this to the
mach-k3 common file so that it does not have to be done in each board
that uses these SoCs.
We use ft_system_setup() here instead of ft_board_setup() since it is no
longer board level. Enable OF_SYSTEM_SETUP in the configurations that use
this to keep functionality the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This reverts commit 5717294230. This
does not exist in upstream kernel.org and breaks boot on DRA7-EVMs.
Drop the same.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Several DTS files have been updated in the Linux kernel with a new
PADCONF macro replacing the IOPAD version. Sync for the same here.
Signed-off-by: Andrew Davis <afd@ti.com>
This member is used in series.MakeCcFile() so should be declared in the
Series class.
Add a declaration to silence the warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Add rk3588 evb support;
- Update pinctrl for rk3568 and rk3588;
- Update rk3288 dts;
- Update mmc support for rk3568 and rk3588;
- Add rng support for rk3588;
- Add DSI support for rk3568;
- Some other misc fixes in dts, config, driver;
- watchdog: arm_smc_wdt: add watchdog support (Lionel)
- watchdog: ftwdt010: return a previously deleted driver now ported to
DM (Sergei)
- watchdog: Add a watchdog driver for Raspberry Pi boards (Etienne)
configs:
_ Add usb_pgood_delay for ST boards
_ increase malloc size for pre-reloc for stm32mp15
_ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15
dts:
_ Add QSPI support on STM32MP13x SoC family
_ Add FMC support on STM32MP13x SoC family
drivers/machine:
_ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
_ spi: stm32_qspi: Remove useless struct stm32_qspi_flash
_ rawnand: stm32_fmc2: remove unsupported EDO mode
_ stm32mp: fix various array bounds checks
Pull request for u-boot-nand-20230422
Replaces a patch by Linus Walleij merged with pull request
u-boot-nand-20230417, with a newer version that contains fixes for tests
run by Tom Rini.
It will be replaced by a more recent version which contains fixes for
tests run by Tom Rini.
This reverts commit ff33d3c87c.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
enable commands for i2c/pmic/regulator and relevant configs.
also drop configs for unused regulators.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Using DMA to load TF-A into SRAM fails when booting from eMMC on RK3588.
## Checking hash(es) for Image atf-3 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-3' image node
spl_load_simple_fit: can't load image loadables index 2 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
Fix this by using PIO mode in SPL and limit the number of blocks used in
a single read command to avoid triggering Data End Bit Error interrupt.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip emmc devices have a similar issue to Rockchip dwmmc devices,
where performing DMA to SRAM later causes issues with suspend/resume.
Allow us to toggle SDMA in SPL for sdhci similar to ADMA support, so we
can ensure DMA is not used when loading the SRAM code.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[jonas@kwiboo.se: add Kconfig default value and fix ADMA typo]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
The device tree sdhci node reference the TMCLK_EMMC clock, add limited
support this clock to rk3588 cru driver. Fixes probe of sdhci driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add sdhci node to SPL and u-boot,spl-boot-order. Also add more supported
mmc modes and pinctrl.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for RK3588 to the rockchip sdhci driver.
Use driver data to handle differences between RK3568 and RK3588:
- Set "Receive original clock source is auto gating" for RK3588.
- Set "Receive clock source is no-inverted" only on RK3568 and "Transmit
clock source is invertion of original clock input" for RK3588.
- Use different txclk_tapnum for HS400 modes on RK3588.
- Configure the CMDOUT reg for HS400 modes for RK3588.
This is based on the mainline linux and vendor kernel driver and have
successfully been tested with rock5b-rk3588_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Adjust tap number for transmit clock, tap number and delay number for
strobe input to fix HS400 modes on RK3568.
New values have been picked from vendor kernel and u-boot and have
successfully been tested with rock-3a-rk3568_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This rearrange and remove duplicate defines to make the code cleaner.
There is no need to read vendor area1 and use an offset each time, it is
easier and clearer to just use the reg offset defined in TRM, same as
the other vendor regs.
This also removes use of the misspelled const for the RK3588 CMDOUT reg,
it will be re-added when support for RK3588 is introduced.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove empty implementations of get_phy and set_enhanced_strobe ops.
Change driver set_enhanced_strobe to return 0 in order to allow missing
implementation of the ops.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor set_ios_post ops to correctly set UHS Speed Select field values
according to TRM. Also set or unset Enhanced Strobe Enable bit and
eMMC Card present bit in set_ios_post, the Enhanced Strobe Enable bit
was never unset after switching to HS400ES mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Check return value from mmc_send_cmd and clear HOST_CONTROL2 when there
is an error. Also skip enable of interrupt signaling and remove a delay,
a delay is already happening in sdhci_send_command.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to configure clock and DLL in set_clock and config_dll ops
instead of in the set_ios_post ops.
With this change the output clock is turned off while configuring DLL
parameters, according to the design recommendations.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the set_clock and config_dll sdhci_ops. Use of these ops
will allow configuration of DLL while the output clock is disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the unneeded emmc_phy_init now that the no-inverter flag is
handled correctly after commit 2321a991bb ("rockchip: sdhci: rk3568:
bypass DLL when clk <= 52 MHz").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device private data is misused in rockchip_sdhci_of_to_plat and
rockchip_sdhci_execute_tuning.
In these functions dev_get_priv is assigned to struct sdhci_host:
struct sdhci_host *host = dev_get_priv(dev);
Instead, the sdhci host should refer to host in struct rockchip_sdhc:
struct rockchip_sdhc *priv = dev_get_priv(dev);
struct sdhci_host *host = &priv->host;
Because host is the first member in struct rockchip_sdhc this is not a
real problem, lets fix it anyway and also use priv name consistently.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Set correct UHS Mode Select field value for UHS SDR25 (50MHz) mode.
Fixes: d1c0a2200a ("mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Set High Speed Enable bit for MMC High Speed (52MHz) mode.
Fixes: f12341a952 ("mmc: sdhci: Fix HISPD bit handling")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This adds support for the TRNG found in the RK3588 SoC to the
rockchip_rng driver so that it can be used for things such as
seeding randomness to Linux.
Changes in V3:
- Moved notes from commit to cover letter.
- Added Reviewed-By tag.
Changes in V2:
- Modified Kconfig to note that the Rockchip RNG driver supports all
versions of the hardware (v1, v2, and the trng in the rk3588).
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A RK3568 device tree pmic node can reference the I2S1_MCLKOUT_TX clock
in assigned-clocks, add dummy support to set parent of this clock to the
rk3568 cru driver.
Fixes probe of pmic driver and missing regulators on affected boards,
rk3568-evb and rk3568-rock-3a.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.
Fixes: 1977d746aa ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Sync the sdmmc node from linux-next, include required nodes in SPL and
imply Kconfig options required for functional sdmmc clk in SPL and
U-Boot proper.
This make it possible for both SPL and U-Boot proper to configure sdmmc
clocks. In SPL, before TF-A is loaded, scru regs is configured, in
U-Boot proper a SCMI message is sent to TF-A.
Fixes: 95c8656b72 ("ARM: dts: rockchip: rk3588s-u-boot: Add sdmmc node")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Booting from sdmmc on RK3588 currently works because of a workaround in
the device tree, clocks are reordered so that the driver use ciu-sample
instead of ciu, and the BootRom initializes sdmmc clocks before SPL is
loaded into DRAM.
The sdmmc clocks are normally controlled by TF-A using SCMI. However,
there is a need to control these clocks in SPL, before TF-A has started.
This adds a rk3588_scru driver to control the sdmmc clocks in SPL before
TF-A has started, using scru regs. It also adds a small glue driver to
bind the scmi clock node to the rk3588_scru driver in SPL.
Fixes: 7a474df740 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.
drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
make: *** [Makefile:2043: spl/u-boot-spl] Error 2
Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add fdtoverlay_addr_r, kernel_comp_addr_r and imply use of
OF_LIBFDT_OVERLAY on RK3568 and RK3588 to support fdtoverlay
and kernel compression.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
The TF-A blobs used to boot RK3568 and RK3588 boards is based on atf
v2.3. Mainline atf v2.3 contains an issue that could lead to a crash
when it fails to parse the fdt blob being passed as the platform param.
An issue that was fixed in atf v2.4.
The vendor TF-A seem to suffer from a similar issue, and this prevents
booting when fdt blob is large enough to trigger this condition.
Fix this by implying SPL_ATF_NO_PLATFORM_PARAM to let u-boot pass a
NULL pointer instead of the fdt blob as the platform param.
This fixes booting Radxa ROCK 3A after recent sync of device tree.
Fixes: 073d911ae6 ("rockchip: rk3568-rock-3a: Sync device tree from linux")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Running U-Boot from a SD-card on ROCK 5 Model B fails to load atf using
DMA and prints debug_uart messages.
<debug_uart>
<debug_uart>
U-Boot SPL 2023.04-rc3 (Mar 12 2023 - 00:30:16 +0000)
Trying to boot from MMC1
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-1' image node
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Use fifo-mode to disable DMA in SPL, add same-as-spl to boot-order and
remove DEBUG_UART_ANNOUNCE option to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The documentation for misc_read() says:
Return: number of bytes read if OK (may be 0 if EOF), -ve on error
The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success. Fix this so that the driver
follows the usual contract for read operations.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The documentation for misc_read() says:
Return: number of bytes read if OK (may be 0 if EOF), -ve on error
The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success. Fix this so that the driver
follows the usual contract for read operations.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
misc_read() is documented to return the number of bytes read or a
negative error value. The Rockchip drivers currently do not implement
this correctly and instead return zero on success or a negative error
value.
In preparation for fixing the drivers, fix the condition here to only
error on negative values.
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for DSI Host controller on Rockchip RK3568. This driver
is heavily based on the Rockchip dw_mipi_dsi_rockchip.c driver in
Linux and the stm32_dsi.c driver in U-Boot. It should be easy to add
support for other SoCs as the only missing component from the mainline
driver is setting the VOP big or VOP little (which the rk3568 does
not have).
Driver was tested for use in sending commands to a DSI panel in order
to obtain the panel ID.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the Innosilicon DSI-DPHY driver for Rockchip SOCs.
The driver was ported from Linux and tested on a Rockchip RK3566
based device to query the panel ID via a DSI command.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
prints:
"Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"
U-Boot TPL prints:
"BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"
Add missing high row detection so that U-Boot TPL prints Row=16, same as
the Rockchip ddr init bin:
"BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"
Signed-off-by: Jonathan Liu <net147@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The GPIO V2 controller on RK3568 and RK3588 works very similar to
prior generation, main difference is the use of a write mask in the
upper 16 bits and register address offset have changed.
GPIO_VER_ID is a new register at 0x0078 that is used to determine when
the driver should use new or old register offsets and values. Earlier
generation return 0x0 from this offset.
Refactor code and add support for the GPIO V2 controller used in RK3568
and RK3588.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Currently the Rockchip rk3066a u-boot-tpl.bin file needs
to add the characters "RK30", while the other SoCs replace
the first 4 bytes. Bring this in line with the rest by
lowering CONFIG_TPL_TEXT_BASE and update rockchip.rst
instructions.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3066/rk3188 DT files from Linux.
This is the state as of linux-next v6.2-rc4.
New nfc node for MK808 rk3066a.
CRU nodes now have a clock property.
To prefend dtoc errors a fixed clock must also be
included for tpl/spl in the rk3xxx-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3188-u-boot.dtsi
for now till a better method is found.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3066a-u-boot.dtsi
for now till a better method is found.
Disable gpio6 as the driver gives an error code
on return as status.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The current divider to calculate the bank ID can change.
Given the Rockchip TRM not all gpio-banks have 32 pins per bank.
The "gpio-ranges" syntax allows multiple items with variable number
of pins. Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the pwm nodes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288 pwm nodes synced from Linux make use of PCLK_RKPWM
instead of PCLK_PWM. They have the same pclk_cpu parent,
so add PCLK_RKPWM to rk3288_clk_get_rate().
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the vop/lvds/mipi/hdmi nodes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288 edp node has a phy node in Linux with a clock
property while current U-Boot driver expects this clock
on position index 1. Move U-Boot-specific DT clock properties
to rk3288-u-boot.dtsi and partially sync the edp node.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the current rk3288.dtsi file the compatible string for
the DisplayPort(DP) node ends with "edp". The string in the
binding ends with "dp" which conflicts with "cdn-dp" as a
search term. Add "rk3288-dp" as compare string to select
vop_id.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the grf and pmu nodes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for Rockchip rk3588 variant of pinctrl.
The driver is adapted from the Linux driver.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
[eugen.hristev@collabora.com:
port to latest U-boot, bring more changes from Linux
use translated pull values table]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
ft_board_setup() should be availble for use in board files but using it
in the rk3288 machine file blocks this functionality.
ft_system_setup() is the more appropriate function to use in a machine
definition.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There is no support to initialize DRAM on RK3588 SoCs using U-Boot TPL
and instead an external TPL binary must be used to generate a bootable
u-boot-rockchip.bin image.
Enable ROCKCHIP_EXTERNAL_TPL by default for RK3588, add build steps for
RK3588 to documentation and clean up CONFIG_BINMAN_FDT options.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Jagan Teki <jagan@edgeble.ai>
rk3588 evb1 v10 is a evalution board from Rockchip, it is a dev board for
rockchip and also a reference board for board vendors.
Hardware:
SoC: RK3588
DRAM: LPDDR4X 8GB
Debug: UART2 via USB
PCIe: 3x4 *1
SATA *2
HDMI out *2
HDMI IN *1
USB2.0 Host *2
USB3.0 Host *1
Type C *1
MIPI DSI panel
dts Sync from Linux v6.2.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@edgeble.ai>
Instead of letting the compiler error out if CONFIG_ENV_IS_NOWHERE is
not selected by the user, let's just enforce it when the user builds for
Ringneck PX30 so that no check needs to be performed by the compiler and
the configuration is always valid.
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Instead of letting the compiler error out if CONFIG_ENV_IS_NOWHERE is
not selected by the user, let's just enforce it when the user builds for
Puma RK3399 so that no check needs to be performed by the compiler and
the configuration is always valid.
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
mmc->tran_speed is max clock, but currently rk3568_sdhci_set_ios_post
uses it if its != 0, regardless of mmc->clock value, and it breaks
eMMC controller.
Without this patch 'mmc dev 0; mmc dev 1; mmc dev 0' is enough for
breaking eMMC, since first initialization sets mmc->mmc_tran speed
to non-zero value (26MHz in my case), and on subsequent re-init when
mmc layer asks for 400KHz it sets 26MHz instead.
Fix it by using MAX(mmc->tran_speed, mmc->clock)
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When a structure contains a flexible array member, it is not supposed to be
included in arrays or other structs.
Quoting the C spec [0]
"Such a structure (and any union containing, possibly recursively, a
member that is such a structure) shall not be a member of a structure
or an element of an array."
IOW efi_hii_keyboard_layout should not include
struct efi_key_descriptor descriptors[]; since we use it at the
declaration of struct efi_hii_keyboard_package.
[0] https://www.dii.uchile.cl/~daespino/files/Iso_C_1999_definition.pdf
chapter 6.7.2.1
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We cannot use old_dtb in the finally block if it has not been assigned
before the try block.
test/py/tests/test_efi_fit.py:458:30:
E0601: Using variable 'old_dtb' before assignment (used-before-assignment)
Fixes: 8391f95549 ("test/py: Create a test for launching UEFI binaries from FIT images")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Without CONFIG_EFI_CAPSULE_AUTHENTICATE=y the following tests are skipped:
* test/py/tests/test_efi_capsule/test_capsule_firmware_signed_fit.py
* test/py/tests/test_efi_capsule/test_capsule_firmware_signed_raw.py
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix pylint warnings like:
* Class inherits from object
* Missing module description
* Missing class description
* First line of comment blank
* Superfluous imports
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Some sections in the linker scripts are aligned to 4 bytes, which
may cause misaligned exception on some platforms, e.g.: clearing
the bss section on 64-bit hardware if __bss_start does not start
from a naturally 8 bytes aligned address.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
U-Boot SPL is not relocable. Drop these relocation sections.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
board_init_r does not return for U-Boot SPL hence there is no need
to update the link register when jumping to board_init_r.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The codes currently skip the very first relocation entry, and have
an inaccurate comment "skip first reserved entry" indicating that
the first entry is reserved, but later it references the elements
in the first relocation entry using a minus offset.
Change to use a positive offset so that there is no need to skip
the first relocation entry.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The codes forget to call munmap() to unmap the ELF image that was
mapped by previous mmap().
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
't5' already contains relocation type so don't bother reloading it.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
The __bss_start is the source end address hence load its address
directly into register 't2' for optimization.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Since commit 409e4b5478 ("Makefile: Enforce DWARF4 output") the
whole U-Boot build switched to enforce DWARF4 output, but RISC-V
is still on its own setting. Let's switch to use U-Boot's setting.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This is the initial basic config for StarFive VisionFive v2 board. It
includes consol, Norflash, sdio, ddr etc.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Add a DM reset driver for StarFive JH7110 SoC.
Note that the register base address of reset controller is the
same with the clock controller. Therefore, there is no device
tree node alone for reset driver.It binds device node in
the clock driver
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
With some USB devices connected on USB HUB for the STMicroelectronics
boards, set the usb_pgood_delay=2 is not enough to ensure a correct
detection for all cases; but it is solved with USB_HUB_DEBOUNCE_TIMEOUT=2s.
For example, issue encountered with the USB flash disk:
ID 058f:6387 Alcor Micro Corp. Flash Drive
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In all these cases, the index on the LHS is immediately afterwards
used to access the array appearing in the ARRAY_SIZE() on the RHS - so
if that index is equal to the array size, we'll access
one-past-the-end of the array.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The early malloc usage increased so the associated defined
CONFIG_SYS_MALLOC_F_LEN need to be increased.
For example, for stm32mp15_defconfig and
stm32mp157c-dk2-scmi.dtsi, we have:
Early malloc usage: 280b8 / 80000
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently, in stm32_qspi_claim_bus(), QSPI_CR and QSPI_DCR registers
are saved in stm32_ospi_flash struct on first flash memory initialization
and restored on each flash accesses.
As the logic of spi-uclass.c changed since 'commit 741280e9ac
("spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic")'
set_speed() and set_mode() callbacks are called systematically when bus
speed or bus mode need to be updated, QSPI_CR and QSPI_DCR registers are
set accordingly.
So stm32_qspi_claim_bus() can be updated by removing QSPI_CR and QSPI_DCR
save/restore code and struct stm32_ospi_flash can be removed as well.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
For debug purpose, it should be useful to indicate the slew rate for
each pins.
Add ospeed register information for pins which are configured in
either alternate function or gpio output.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
With some USB device, the current usb_pgood_delay value is not long
enough to ensure a correct detection.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The ftwdt010 watchdog driver was deleted by
commit 11232139e3 ("nds32: Remove the architecture")
Return it to the codebase in a DM compatible form. Enable it in
sandbox_defconfig to test compilability.
Another platform using ftwdt010 will be submitted later.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This driver supports the bcm2835 watchdog found on
Raspberry Pi boards.
It is derived from the Linux driver and was tested
on two Raspberry Pi board versions (B+ and 3B+).
Signed-off-by: Etienne Dublé <etienne.duble@imag.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
- Add initial support for BPI-CM4
- Spring Cleanup of Amlogic board documentation
- add support for BananaPi M2-Pro
- add support for BananaPi M2S
- add support for Radxa Zero2
- add support for WeTek Hub and WeTek Play2
- switch LibreTech-CC v2 and WeTek Core2 to EE powerdomain
- add support for Beelink GT1 Ultimate
Pull request for u-boot-nand-20230417
The first two patches are by Frieder Schrempf who joins as a reviewer for
the SPI NAND framework and drivers.
The following 2 patches are by Linus Walleij and are taken by the series
"Add Broadcom Northstar basic support".
Bin Meng makes static a list for octeontx.
Francesco Dolcini specifies MTD partitions on command line for
colibri-{imx6ull,imx7}.
Improve documentation. Notably we remove all the board names from the
feature matrix to reduce table width. SoC types have been added to the
titles in individual board documents so readers can still correlate a
board against the features. This makes it easier to add new boards to
to the document in the future.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20230320114609.930145-2-christianshewitt@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Enable Renesas RSwitch driver, matching SERDES PHY driver and Marvell
10G ethernet PHY driver in R8A779F0 S4 Spider board configuration to
make ethernet available via the RSwitch ports.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The current shell prompt '->' interferes with CI matching on 'bdinfo'
output. When CI test.py attempts to locate memory information in the
'bdinfo' output, it matches on '->' prefix which is identical to the
shell prefix. Switch the prompt to default '=>' one to avoid this
interference.
Suggested-by: Tom Rini <trini@konsulko.com> # found the CI oddity
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This patch adds Ethernet Switch support that found on R-Car S4
(r8a779f0) SoC. This is extracted from multiple patches from
downstream BSP, with additional rework of the network device
registration.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Marek: Rework the driver to support all ports via subdrivers.
Split the driver up, add generic PHY framework support.
Generic code clean ups.]
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add Renesas Ethernet SERDES driver for R-Car S4-8 (r8a779f0).
The datasheet describes initialization procedure without any information
about registers' name/bits. So, this is all black magic to initialize
the hardware. Especially, all channels should be initialized at once.
This driver is imported and adjusted from Linux 6.3-rc1 commit:
50133cd3e8dd1 ("phy: renesas: r8a779f0-eth-serdes: Remove retry code in .init()")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use IS_ENABLED() instead of CONFIG_IS_ENABLED() to check for CONFIG_
option which is identical across all of U-Boot and xPL builds.
Fixes: 2769ddc99f ("mmc: tmio: Replace ifdeffery with IS_ENABLED/CONFIG_IS_ENABLED macros")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:
nand-ecc-algo = "bch";
nand-ecc-strength = <1>;
nand-ecc-step-size = <512>;
This is handled by the Linux kernel but U-Boot core does
not respect this. Fix it up by parsing the algorithm and
preserve the behaviour using this property to select
software BCH as far as possible.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/all/20230308212851.370939-1-linus.walleij@linaro.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add M5208EVBE board to CI. This does not use default config due to
limitations of QEMU emulation, instead the timer is switched from
DMA timer to PIT timer and RAMBAR accesses are inhibited.
Local QEMU launch command is as follows:
$ qemu-system-m68k -nographic -machine mcf5208evb -cpu m5208 -bios u-boot.bin
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
The QEMU emulation of m68k does not support RAMBAR accesses,
add Kconfig option which inhibits those accesses, so that
U-Boot can be started in m68k QEMU for CI testing purpopses
until QEMU emulation improves.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The QEMU emulation of m68k does not support DMA timer, the only
timer that is supported is the PIT timer. Implement trivial PIT
timer support for m68k.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There is an existing CONFIG_MCFTMR Kconfig symbol,
use it and drop all other instances of CFG_MCFTMR.
This duality is likely a result of bogus conversion
to Kconfig.
Fixes: 7ff7b46e6c ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The biggest change is some refactoring of the H616 DRAM driver, which
allows better fine-tuning for each board, and is the base for pending
LPDDR3 and LPDDR4 support, needed by new boards. The sun8i-emac
Ethernet driver sees some refactoring that enables it for the Allwinner
D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also
the early SPL code now supports some odd H616 SoC variant.
There are some more patches pending, that require the final review
touches and some testing, I will send a separate PR for them later.
The gitlab CI completed successfully, and I boot tested a few boards
with different SoCs, via FEL and SD card, into Linux.
- DDR Training sequence happens very fast. The speedup in boot time is
negligible by skipping the training sequence during 2nd boot or after.
So remove the check and skip.
- This change improves the robustness of DDR training. If u-boot crashed
during DDR training, the training could be left in a limbo state, where
the BootROM has recorded that it is already in a 2nd boot. The training
must be repeated in this scenario to get out of this limbo state, but due
to the check it cannot be performed.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.
For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Currently kwboot expected that sector size for SATA image is always 512
bytes. If SATA image cannot be parsed with sector size of 512 bytes, try
larger sector sizes which are power of two and up to the 32 kB. Maximal
theoretical value is 32 kB because ATA IDENTIFY command returns sector size
as 16-bit number.
Signed-off-by: Pali Rohár <pali@kernel.org>
SATA kwbimage contains offsets in block size unit, not in bytes.
Until now kwbimage expected that SATA disk always have block size of 512
bytes. But there are 4K Native SATA disks with block size of 4096 bytes.
New SATA_BLKSZ command allows to specify different block size than 512
bytes and therefore allows to generate kwbimage for disks with different
block sizes.
This change add support for generating SATA images with different block
size. Also it add support for verifying and dumping such images.
Because block size itself is not stored in SATA kwbimage, image
verification is done by checking every possible block size (it is any
power of two value between 512 and 32 kB).
Signed-off-by: Pali Rohár <pali@kernel.org>
This allows image type print_header() callback to access struct
image_tool_params *params.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk. In case of error, fallback
back to 512 bytes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk.
Signed-off-by: Pali Rohár <pali@kernel.org>
In the early days of the Allwinner A64 U-Boot support, we relied on a
vendor provided "boot0" binary to perform the DRAM initialisation. This
replaced the SPL, and required to equip the U-Boot (proper) binary with
a vendor specific header to be recognised as a valid boot0 payload.
Fortunately these days are long gone (we gained SPL and DRAM support in
early 2017!), and we never needed to use that hack on any later 64-bit
Allwinner SoC.
Since this is highly obsolete by now, remove that option from the
defconfigs of all A64 boards. We leave the code still in here for now,
since some people expressed their interest in this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.
Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).
Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.
While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Part of the code, previously known as "unknown feature", also doesn't
have constant values. They are derived from TPR0 parameter in vendor
DRAM code.
Let's move that code to separate function and introduce TPR0 parameter
here too, to ease adding new boards.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While ODT values for same memory type are similar, they are not
necessary the same. Let's parameterize them and make parameter same as
in vendor DRAM settings. That way it will be easy to introduce new board
support.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fix code style for pointer declaration. This is just cosmetic change to
avoid checkpatch errors in later commits.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().
Just to be safe, do that here too.
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.
Update the device tree here because it does not exist in Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While R40 puts the EMAC syscon register at a different address from
other variants, the relevant portion of the register's layout is the
same. Factor out the register offset so the same code can be shared
by all variants. This matches what the Linux driver does.
This change provides two benefits beyond the simplification:
- R40 boards now respect the RX delays from the devicetree
- This resolves a warning on architectures where readl/writel
expect the address to have a pointer type, not phys_addr_t.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, EMAC variants are distinguished by their identity, but this
gets unwieldy as more overlapping variants are added. Add a structure so
we can describe the individual feature differences between the variants.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
i2c updates for v2023-07-rc1
- designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property
from Rasmus Villemoes
- fix: correct I2C deblock logic from Haibo Chen
- imx_lpi2c: Fix misuse the IS_ENABLED for DM clock from Ye Li
- m68k: convert to DM from Angelo Dureghello
Add all the i2c nodes for each family, and add specific i2c
overwrites in the related board-specific dts.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
This driver is actually used for powerpc and m68k/ColdFire.
On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6,
interrupt enabled) is not set appropriately before each transfert.
As a result, the transfert hangs forever waiting for IIEN.
This patch set IIEN before each transfert, while considering this fix
as not harming powerpc arch.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
The IS_ENABLED, which does not consider SPL build, should be replaced
by CONFIG_IS_ENABLED.
For the case that we only enable DM CLK for u-boot but not in SPL, the
IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Current code use dm_gpio_get_value() to get SDA and SCL value, and the
value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal
case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So
here the logic is not correct.
And we must not use GPIOD_ACTIVE_LOW in client code include the
dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So
remove GPIOD_ACTIVE_LOW here.
Fixes: aa54192d4a ("dm: i2c: implement gpio-based I2C deblock")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Alexander Kochetkov <al.kochet@gmail.com <mailto:al.kochet@gmail.com>>
This code first figures out if there is an i2c,speeds property, if so
its size in u32s, and then reads the value into the local speeds[]
array. Both 'size' and 'speeds' are completely unused thereafter.
It's not at all clear what this is supposed to do. Of course, it could
be seen as a sanity check that the DT node does have an i2c,speeds
property with an appropriate number of elements, but for that one
wouldn't actually need to read it into speeds[]. Also, I can't find
anywhere else in the U-Boot code which makes use of values from that
property (this is is the only C code referencing "i2c,speeds"), so it
seems pointless to insist that it's there.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Numeric return values may cause strange errors line:
exit not allowed from main input shell.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mask macro PART_ACCESS_MASK filter out access bits of emmc register and
macro EXT_CSD_EXTRACT_BOOT_PART() extracts boot part bits of emmc register.
So use EXT_CSD_EXTRACT_BOOT_PART() when extracting boot partition.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The default erase command applies on erase group unit, and
simply round down to erase group size. When the start block
is not aligned to erase group size (e.g. erasing partition)
it causes unwanted erasing of the previous blocks, part of
the same erase group (e.g. owned by other logical partition,
or by the partition table itself).
To prevent this issue, a simple solution is to use TRIM as
argument of the Erase command, which is usually supported
with eMMC > 4.0, and allow to apply erase operation to write
blocks instead of erase group
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When secure/insecure TRIM operations are supported.
When used as erase command argument it applies the
erase operation to write blocks instead of erase
groups.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Pull request for efi-2023-07-rc1
Documentation:
* man-page for coninfo command
* documentation style
* switch settings for boot modes on AM62 SK
UEFI:
* avoid using deprecated HandleProtocol()
* set static attribute for non-exported functions and variables
- fix building sandbox without SDL
- improve tegra DC driver to work with panel ops and implement
native 180 degree panel rotation support
- add T30 support to tegra DC driver
- add DSI driver (based on mainline Linux one with minor
adjustments, only T30 tested)
- add get_display_timing ops to simple panel driver
- extend simple panel driver to use it for MIPI DSI panels
which do not require additional DSI commands for setup
If console multiplexing in enabled (CONFIG_CONSOLE_MUX=y), the output of
the coninfo command should show the file association (stdin, stderr,
stdout) for all devices not only the default ones.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-use simple panel driver for MIPI DSI panels
which do not require additional DSI commands
for setup.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Some cases may require passing display timings from
panel driver. To handle such cases support parsing
device tree panel node for timing subnode.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Adds support for both DSI outputs found on Tegra. Only very
minimal functionality is implemented, so advanced features
like ganged mode won't work. Driver is heavily based on
mainline Tegra DSI and re-uses much of its features.
Only T30 is supported for now but T20 support can be added
if any supported devices will be found.
Driver is wrapped as panel driver since Tegra DC driver supports
only panel drivers calls.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Internal video devices like DSI and HDMI controllers
require sending commands into DC register field.
To make this available, lets create platform data,
which is restricted to pass DC regmap only to
pre-defined devices.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra DC driver does not call panel_set_backlight, which can
result in absence of backlight on device. Fix this by calling
panel_set_backlight with BACKLIGHT_DEFAULT just after
panel_enable_backlight.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Unlike 90 and 270 degree rotation, 180 degree rotation is more
common and does not require scaling. Implement it for correct
grouper support.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Google Nexus 7 2012
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Check if panel driver has display timings and get those.
If panel driver does not pass timing, try to find timing
under rgb node for backwards compatibility.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
DISP1 clock may use PLLP, PLLC and PLLD as parents.
Instead of hardcoding, lets pass clock and its
parent from device tree. Default parent is PLLP.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Move tegra dc driver to tegra20 directory and also mention
T30 in description of the driver's config option.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
[agust: add commit description]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This is currently broken. If SDL is not installed, SANDBOX_SDL becomes
false and build errors are generated, e.g.:
test/dm/video.c:424: undefined reference to `sandbox_sdl_set_bpp'
Fix it by making the function return an error in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add board code for R8A779G0 V4H White Hawk board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
Add DTs for R8A779G0 V4H White Hawk CPU and BreakOut boards.
Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message
Rename DTs to match Linux, which has dash between white-hawk]
Add clock tables for R8A779G0 V4H SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")
There is an adjustment to the clock tables to make them easier suitable
for U-Boot, PLL2 is not treated as GEN4 PLL type PLL2_VAR, but rather a
plain PLL2. This should be sufficient until PLL2_VAR is implemented in
the clock core.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver
Treat PLL2 as non-PLL2_VAR for now]
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
Add board code for R8A779F0 S4 Spider board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.
Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
Add initial DT for R8A779F0 S4 SoC. Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
Add pinctrl tables for R8A779F0 S4 SoC.
Based on Linux next 20230228 PFC tables tables up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Use RCAR_64 Kconfig, sync with Linux next 20230228]
Add clock tables for R8A779F0 S4 SoC
Based on Linux commit 24aaff6a6ce4 ("clk: renesas: cpg-mssr: Add support
for R-Car S4-8") by Yoshihiro Shimoda and sync the tables up to Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver]
Update R-Car Gen4 support in Gen3 clock driver. This patch renames the
V3U clock parts to Gen4 and extends them by new PLL2, PLL3, PLL4, PLL6
as well as SDSRC clock which use undocumented bits so far, and RPCSRC
clock which uses its own more capable divider table. The Gen4 module
standby and reset tables are also updated.
This patch makes use of union to alias Gen3 and more extensive Gen4
PLL tables, as the driver cannot ever be instantiated on hardware
that would identify itself as both Gen3 and Gen4.
The V3U clock driver is updated to match Gen4 clock driver behavior,
it is augmented with a more extensive PLL table and a valid MODEMR
register offset.
This supersedes "clk: renesas: Introduce R-Car Gen4 CPG driver"
from Hai Pham as the R-Car Gen3 and Gen4 clock core drivers are
extremely similar. That implementation was in turn based on Linux
commit 470e3f0d0b15 ("clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver")
by Yoshihiro Shimoda .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Instead of #if and #ifdef, use IS_ENABLED and CONFIG_IS_ENABLED macros.
This improves build test coverage. The CONFIG_SPL_BUILD must remain an
ifdef, as CONFIG_SPL_STACK may not always be defined, e.g. in U-Boot
proper build. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The 64bit limitation check is compiled and optimized out on 32bit
platforms, but generates a type width warning:
drivers/mmc/tmio-common.c: In function ‘tmio_sd_addr_is_dmaable’:
drivers/mmc/tmio-common.c:376:26: warning: right shift count >= width of type [-Wshift-count-overflow]
376 | if (addr >> 32)
| ^~
Fix the warning by checking the addr type width to see whether the
shift even makes sense in the first place. The width check is also
optimized out at compile time.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add support for R-Car Gen4 SoCs into the driver.
While I2C on R-Car Gen4 does support some extra features (Slave Clock
Stretch Select), for now it is treated the same as I2C on R-Car Gen3,
which let us share the same driver.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use RCAR_64 Kconfig
Reviewed-by: Heiko Schocher <hs@denx.de>
- Make use of the semi-formal "fallthrough" mechanism, update env tools
to use /run for lockfile, add 2048 game (as a way to test console
changes), update some CONFIG option logic in Kconfig, have lmb command
show regions in use, remove some duplicate serial code, add
__gnu_thumb1_case_si code and fix m68k custodian email address.
This adds R-Car Generation 4 (Gen4) support as Renesas ARM64 SoC.
In this version, reusing R-Car Gen3 lowlevel initialize routine [1]
and R-Car Gen3 memory map tables [2] .
[1] arch/arm/mach-rmobile/lowlevel_init_gen3.S
[2] arch/arm/mach-rmobile/memmap-gen3.c
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: - Enable DTO support by default
- Sort the Kconfig lists
- Select RCAR_64 Kconfig option to pull in all the shared
Kconfig options with Gen3, and use where applicable to
deduplicate entries.
- Fix reference [2] typo in commit message
- Drop config options moved to Kconfig, rename rest to CFG_
accordingly to synchronize with upstream changes. Drop
removed CONFIG_VERY_BIG_RAM.
- Move board size limit to arch/Kconfig
- Move GICR_BASE to headers instead of common config]
Add two new callbacks matching the Linux ones. The .set_mode is used to set
PHY mode and submode, where mode is either USB, Ethernet, and so on, while
submode is e.g. for Ethernet case RGMII, RMII, and so on. The .set_speed is
used to configure link speed into the PHY. Unlike the existing configure
callback, which is used to pass arbitrary custom information to the PHY,
these two callbacks are used to pass standardized set of information to
the PHY.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Insert missing space in front of asterisk to avoid checkpatch warning.
Replace 'beeing' with 'being' as well, to fix another checkpatch warning.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case PHY is not enabled, the generic_phy_configure() implementation is
missing. Add an empty one so that the list of empty functions is complete.
Fixes: f8da8a82c5 ("generic-phy: add configure op")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Pull Marvell 10G PHY driver from Linux 6.1.y as of commit
d6d29292640d3 ("net: phy: marvell10g: select host interface configuration")
and heavily adapt to match U-Boot PHY framework. Support for
hwmon is removed as is much other functionality which could
not be tested, this results in much simpler driver which can
only bring the PHY up and set MAC type.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add MDIO PCS 2.5G and 5G speed macros from Linux 5.1.y as of commit
7fd8afa8933a0 ("net: phy: Add generic support for 2.5GBaseT and 5GBaseT")
This is used by the upcoming Marvell 10G PHY driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add phy_read_mmd_poll_timeout() from Linux 5.7.y as of commit
bd971ff0b7392 ("net: phy: introduce phy_read_mmd_poll_timeout macro")
This is used by the upcoming Marvell 10G PHY driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add phy_modify_mmd()/phy_modify_mmd_changed() from Linux 5.1.y as of commit
b8554d4f7288f ("net: phy: add register modifying helpers returning 1 on change")
This is used by the upcoming Marvell 10G PHY driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Import marvell_phy.h from Linux 5.14.y as of commit
a5de4be0aaaa6 ("net: phy: marvell10g: fix differentiation of 88X3310 from 88X3340")
and use it in marvell PHY driver instead of current ad-hoc macros.
Two of the PHY IDs are unknown to Linux, 88E1149S and 88E1680, for
those two, only sync the length of the hexadecimal number to 8 digits.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Synchronize PHY interface modes with Linux next 6.2.y commit:
0194b64578e90 ("net: phy: improve phy_read_poll_timeout")
Retain LX2160A/LX2162A PHY modes as those are not yet supported
by the Linux kernel, but isolate those with ifdeffery.
Isolate NCSI which are also not supported by Linux kernel. Note
that the ifdeffery cannot be avoided with IS_ENABLED() here due
to compilation of the entire conditional, which would fail in
case NCSI symbols are not available.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Replace PHY_INTERFACE_MODE_SFI with PHY_INTERFACE_MODE_5GBASER,
PHY_INTERFACE_MODE_10GBASER and PHY_INTERFACE_MODE_XAUI to match
Linux PHY interface modes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This mode does not seem to be well defined and used anywhere, remove support for it.
Based on discussion:
- 1000baseX does c37 AN of duplex+pause
- SGMII does AN of duplex+pause+speed, at lower speed bytes are repeated 10x/100x
- 2500baseX does not do AN, or does very different c73 AN
- SGMII 2500 behavior is unclear
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The phy_init() is now used only to perform manual relocation of PHY
driver callbacks. Wrap it in ifdeffery and only call it on systems
which still require manual relocation, i.e. m68k .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Wrap phy_drv_reloc() back into phy_init() to reduce ifdeffery,
since phy_drv_reloc() is now called only from one call site.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
The static phy_drivers list is superseded by linker list of struct phy_drivers
now that all drivers have been converted to the later. Drop the phy_drivers
list as well as list_head from struct phy_driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
This particular PHY driver is slightly more spread out across additional
source files. Since the phy_register() calls are no longer necessary, all
the registration calls across those source files is dropped. Furthermore,
the Makefile can now be updated to only compile generic TI PHY support if
matching Kconfig symbol is enabled and the ifdeffery in the generic TI PHY
driver can be dropped.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.
Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Introduce U_BOOT_PHY_DRIVER() macro which is used to add struct phy_driver
into a new linker list section containing all compiled in struct phy_driver
drivers. This is so far empty until PHY drivers are converted over to this
macro.
Iterate over both drivers registered using soon to be legacy phy_register()
as well as drivers in the new linker list when looking up a suitable PHY
driver. This way, PHY drivers can be converted over to the new macro one
driver at a time.
The relocation of callbacks for linker list based drivers now happens in
phy_init() call as the drivers are available at that point in time, and
phy_register() is not called for those drivers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Create separate function to implement manual relocation of PHY driver
functions and make use of that function. This is a preparatory patch
for introduction of PHY driver definition using linker lists.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
These struct phy_driver ... instances are local to this source code
file, staticize them. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
These struct phy_driver ... instances are local to this source code
file, staticize them. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
These struct phy_driver ... instances are local to this source code
file, staticize them. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
Add the 2048 game, a good demo of ANSI sequences and a way to waste a
little time.
Bring it it from Barebox, modified for code style.
Signed-off-by: Simon Glass <sjg@chromium.org>
Compiling with CONFIG_CMD_SCSI=y, CONFIG_SCSI results in
cmd/scsi.c:46: undefined reference to `scsi_scan'
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building with CONFIG_AHCI_PCI=y and CONFIG_SCSI_AHCI=n leads to
drivers/ata/ahci-pci.o: in function `ahci_pci_probe':
drivers/ata/ahci-pci.c:21: undefined reference to `ahci_probe_scsi_pci'
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Freescale ESPI driver (CONFIG_FSL_ESPI) relies to the MPC85xx platform
(PowerPC) through arch/powerpc/include/asm/immap_85xx.h. The driver can't
compile on another architecture/platform.
Signed-off-by: Corentin Guillevic <corentin.guillevic@smile.fr>
gcc does not understand /* FALL TROUGH */ and emits a warning:
cmd/date.c: In function ‘do_date’:
cmd/date.c:62:20: warning:
this statement may fall through [-Wimplicit-fallthrough=]
62 | if (strcmp(argv[1],"reset") == 0) {
| ^
cmd/date.c:102:9: note: here
102 | case 1: /* get date & time */
| ^~~~
Use the fallthrough macro instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When a case statement intentionally falls through we should add a comment.
Cf. -Wimplicit-fallthrough
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When building with -Wimplicit-fallthrough we get a warning
tools/fdt_add_pubkey.c:52:25: warning:
this statement may fall through [-Wimplicit-fallthrough=]
52 | print_help();
|
Explicitly declare which functions don't return.
Fixes: 30238e9961 ("tools: add fdt_add_pubkey")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
According this issue https://github.com/ppp-project/ppp/issues/339.
Eventually, the dt-utils changed lock directory to fix missing /var/lock
directory error then make dt-utils can run normally.
We also have a similar issue with these two utilities fw_printenv and
fw_setenv will failed when the directory /var/lock is non-existent.
We have a custom linux distribution built with yocto (OpenBMC) that
use systemd and it deprecated the /var/lock directory.
More discussion in systemd/systemd#15668.
Thus, we sync with community's solution for uboot/tools/env utilities:
The current location /var/lock is considered legacy (at least by systemd).
Just use /run to store the lockfile and append the usual .lock suffix.
Tested:
Verified /run/lock is now present and fw_printenv can work in OpenBMC.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Remove test on CONFIG_LMB_MEMORY_REGIONS introduced by commit
7c1860fce4 ("lmb: Fix lmb property's defination under struct lmb").
This code in lmb_init() is strange, because if CONFIG_LMB_USE_MAX_REGIONS
and CONFIG_LMB_MEMORY_REGIONS are not defined, the implicit #else is empty
and the required initialization is not done:
lmb->memory.max = ?
lmb->reserved.max = ?
But this setting is not possible:
- CONFIG_LMB_USE_MAX_REGIONS not defined
- CONFIG_LMB_MEMORY_REGIONS not defined
because CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS are
defined as soon as the CONFIG_LMB_USE_MAX_REGIONS is not defined.
This patch removes this impossible case #elif and I add some
explanation in lmb.h to explain why in the struct lmb {} the lmb
property is defined if CONFIG_LMB_MEMORY_REGIONS is NOT defined.
This patch also removes CONFIG_LMB_XXX dependency on CONFIG_LMB as these
defines are used in API file lmb.h and not only in library file.
Fixes: 5e2548c1d6 ("lmb: Fix LMB_MEMORY_REGIONS flag usage")
Reported-by: Mark Millard <marklmi@yahoo.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Michal Simek <michal.simek@amd.com>
On mpc832x, SPI can be either handled by CPU or QE.
In order to work in CPU mode, bit 17 of SPMODE has to
be set to 1, that bit is called OP.
Also, data is located at a different place than the one expected
by the driver today. In 8 bits mode with REV set, data to be
transmitted is located in the most significant byte while
received data is located in second byte. So perform the
necessary shifts.
In order to differentiate with other CPUs, a new compatible is
added for mpc832x: fsl,mpc832x-spi
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The mpc832x has GPIOs handled by the QUICC Engine.
The registers are different from the one for the
non QE mpc83xx GPIOs.
Implement a GPIO driver for those.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
gd->arch.sdhc_clk only exists when CONFIG_FSL_ESDHC is set,
so enclose it inside ifdefs.
gd->arch.qe_clk and gd->arch.brg_clk must be populated when
CONFIG_QE is set.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
At startup, some RAM is needed (for instance for stack) before
DRAM is initialised.
One way to offer such RAM, used by mpc83xx, is to lock some entries
in the cache. To do that, MMU needs to be activated.
On mpc83xx having a QUICC Engine an alternative is to user some
part of from the Multi User RAM, like done on mpc8xx for instance.
For that, the MMU is not needed.
Activating the MMU is problematic because exception vectors are not
setup yet so in case of ISI or DSI that CPU will crash and reboot.
At the time being, MMU is activated regardless.
Only activate it when locking cache entries to provide initial RAM.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
There are helpers included in soc.h
Declare them static inline so that soc.h can be
included in several places.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
According to the reference manual, the Reset Configuration
Word Low Register bits 2-3 must be set to 0b10.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Introduce a new compatible "fsl,pq2pro-wdt"
On mpc83xx, the prescaling factor is 0x10000.
Don't write the watchdog configuration register in
start.S as it can be written only once.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same
memory registers.
Refactor the driver to get the register addresses from the
device tree and use the compatible to know the prescale factor.
Calculate the watchdog setup value from the provided timeout.
Don't declare it anymore as an HW_WATCHDOG, u-boot will start
servicing the watchdog early enough.
On mpc8xx the watchdog configuration register is also used for
configuring the bus monitor. So add it as an option to the watchdog
when it is mpc8xx. When watchdog is not selected, leave the
configuration of the initial SYPCR from Kconfig.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
To quote the author:
Block maps are a way of looking at various sources of data through the
lens of a regular block device. It lets you treat devices that are not
block devices, like RAM, as if they were. It also lets you export a
slice of an existing block device, which does not have to correspond to
a partition boundary, as a new block device.
This is primarily useful because U-Boot's filesystem drivers only
operate on block devices, so a block map lets you access filesystems
wherever they might be located.
The implementation is loosely modeled on Linux's "Device Mapper"
subsystem, see the kernel documentation [1] for more information.
The primary use-cases are to access filesystem images stored in RAM, and
within FIT images stored on disk. See doc/usage/blkmap.rst for more
details.
The architecture is pluggable, so adding other types of mappings should
be quite easy.
[1]: https://docs.kernel.org/admin-guide/device-mapper/index.html
mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same
memory registers.
Rename it mpc8xxx which is the generic name used for drivers supporting
several mpc families.
The driver will be made more generic in following patch.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
8xx has CONFIG_8xx_GCLK_FREQ which is similar to
CONFIG_SYS_CLK_FREQ, and doesn't set CONFIG_SYS_CLK_FREQ.
Due to that, get_board_sys_clk() returns 0.
Remove CONFIG_8xx_GCLK_FREQ and use CONFIG_SYS_CLK_FREQ instead.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Create a distinct EFI device path for each blkmap device.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Explain block maps by going through two common use-cases.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Verify that:
- Block maps can be created and destroyed
- Mappings aren't allowed to overlap
- Multiple mappings can be attached and be read/written from/to
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a frontend for the blkmap subsystem. In addition to the common
block device operations, this allows users to create and destroy
devices, and map in memory and slices of other block devices.
With that we support two primary use-cases:
- Being able to "distro boot" from a RAM disk. I.e., from an image
where the kernel is stored in /boot of some filesystem supported
by U-Boot.
- Accessing filesystems not located on exact partition boundaries,
e.g. when a filesystem image is wrapped in an FIT image and stored
in a disk partition.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow a slice of an existing block device to be mapped to a
blkmap. This means that filesystems that are not stored at exact
partition boundaries can be accessed by remapping a slice of the
existing device to a blkmap device.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow a slice of RAM to be mapped to a blkmap. This means that RAM can
now be accessed as if it was a block device, meaning that existing
filesystem drivers can now be used to access ramdisks.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
blkmaps are loosely modeled on Linux's device mapper subsystem. The
basic idea is that you can create virtual block devices whose blocks
can be backed by a plethora of sources that are user configurable.
This change just adds the basic infrastructure for creating and
removing blkmap devices. Subsequent changes will extend this to add
support for actual mappings.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ensure that the memory destination/source addresses of block
read/write operations are mapped in before access. Currently, this is
only needed on sandbox builds.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the script loading code to recognize when script data is stored
externally from the FIT metadata (i.e., built with `mkimage -E`).
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mkbootimg tool is part of the Android project and it is
used to pack Android boot images such as boot image
and vendor_boot image.
Use the following command to run mkbootimg:
$ python3 -m mkbootimg
Add mkbootimg to the docker file
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
test_abootimg is extended to include the testing of boot images
version 4. For this, boot.img and vendor_boot.img have been
generated using mkbootimg tool with setting the header
version to 4.
This tests:
- Getting the header version using abootimg
- Extracting the load address of the dtb
- Extracting the dtb start address in RAM
Running test:
$ ./test/py/test.py --bd sandbox --build -k test_abootimg
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Enable the support for boot image header version 3 and 4
using abootimg command.
In order to use version 3 or 4:
1- Vendor boot image address should be given to abootimg cmd.
abootimg addr $1 $vendor_boot_load_addr
2- "ramdisk_addr_r" env variable (ramdisk address) should be set to host
the ramdisk : generic ramdisk + vendor ramdisk
Replace "struct andr_boot_img_hdr_v0*" by "void *" in
some functions since v3 and v4 are now supported as well.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
With vendor boot image introduced in version 3 and 4 of boot
image header, boot information is located in both boot image
and vendor boot image.
Flashing zImage is not supported for version 3 and 4 since this
requires updating vendor boot image and/or generating a new image.
Print an error message when the boot image header version is
greater than 2.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Add support for boot image version 3 and 4 in
android_image_get_dtb_img_addr().
Since the dtb is now included in vendor_boot image
instead of boot image, extract the dtb address from
vendor_boot image when a v3 or v4 is used.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
In version 3 and 4 of boot image header, the vendor specific
command line are located in vendor boot image. Thus, use
extra command line to add those cmd to bootargs.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Version 3 and 4 of boot image header introduced
vendor boot ramdisk: Please check include/android_image.h
for details.
The ramdisk is now split into a generic ramdisk in boot image
and a vendor ramdisk in vendor boot image.
Support the new vendor ramdisk.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Since boot image header version 3 and 4 introduced vendor boot image,
use the following functions to fill the generic android
structure : andr_image_data:
- android_boot_image_v3_v4_parse_hdr()
- android_vendor_boot_image_v3_v4_parse_hdr()
Update android_image_get_data() to support v3 and v4
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Introduce vendor boot image for version 3 and 4 of boot image header.
The vendor boot image will hold extra information about kernel, dtb
and ramdisk.
This is done to prepare for boot image version 3 and 4 support.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
android_image_get_dtbo() is used to get recovery DTBO via abootimg cmd.
This is not supported in boot image header v3 and v4. Thus, print an
error message when v1,v2 header version are not used.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Content print is not supported for version 3 and 4 of boot image header.
Thus, only print that content when v2 is used.
Update android_print_contents() to print an error message
when trying to print boot image header version 3 or 4 content.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Move from andr_boot_img_hdr_v0 to andr_image_data
structure to prepare for boot image header
version 3 and 4.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
andr_image_data structure is used as a global representation of
boot image header structure. Introduce this new structure to
support all boot header versions : v0,v1.v2.v3.v4 and to support
v3 and v4 while maitaining support for v0,v1,v2.
The need of using andr_image_data comes from the change of header
structure in both version 3 and 4.
Rework android_image_get_kcomp() to support this new struct.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
With the new vendor boot image introduced in versions 3 and 4
of boot image header, the header check must be done for both boot
image and vendor boot image. Thus, replace android_image_check_header()
by is_android_boot_image_header() to only refer to boot image header check.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Android introduced boot header version 3 or 4.
The header structure change with version 3 and 4 to support
the new updates such as:
- Introducing Vendor boot image: with a vendor ramdisk
- Bootconfig feature (v4)
Change andr_img_hdr struct name to maintain support for version v0,
v1 and v2 while introducing version 3 and 4.
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
- Update our CI to use clang-16 for tests. This also changes slightly
how we do linker lists so that we don't rely on undefined behavior
that lead to clang-15 and later failing to work (and in some cases
seemingly, earlier versions of clang would sometimes fail).
As this is now the stable release, move to using that now for our tests.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Per the GCC bug listed below, the way we do linker lists is relying on
undefined behavior that seems to work in gcc, but doesn't always work in
clang. Andrew suggests rewriting our start/end macros in a different way
(as implemented here, from what he said in comment 1) to avoid these
problems.
Reported-by: AdityaK <appujee@google.com>
Suggested-by: Andrew Pinski <apinski@marvell.com>
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108915
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andrew Pinski <apinski@marvell.com>
In order to prepare for slight size growth due to reworking linker list
support, enable LTO here to save more space again.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Given the number of jobs in CI we have which use python and pip install
packages, we should do this once in the Dockerfile, in order to populate
the cache. We let each job continue to create and use the virtual
environments they need to facilitate making updates to these
environments easier.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to better make use of pip caches, and also for better overall
consistency, we should use the same versions of packages in each of our
python requirements files. Update pytest to use the newer versions of
packages we use in sphinx builds.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no need for the board file to instantiate a PL01X platform
device anymore. This is all taken care of by the DM code which now will
probe the device based on the DT node.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the serial nodes of the LX2160A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that the DT nodes for the serial devices are in place for these
boards, enable DM_SERIAL in the associated configs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the serial nodes of the LS1088A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the device trees are more or less synchronized with Linux, the
only necessary changes are to enable CONFIG_DM_SERIAL and the DM_SERIAL
driver for ns16550 (ns16550.c rather than serial_ns16550.c).
ls1028aqds_tfa_lpuart_defconfig already uses DM_SERIAL for the LPUART
driver, so I didn't touch that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for Data Modul i.MX8M Plus eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR, USB.
Signed-off-by: Marek Vasut <marex@denx.de>
Add WDT reboot bindings on DH i.MX6 DHSOM to permit the platform
to reboot via WDT in U-Boot. These are custom U-Boot bindings,
hence they are placed in -u-boot.dtsi .
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Deduplicate similar DDRC configurations and LPDDR4 training patterns
by patching a single configuration.
The aim is to reduce the SPL memory footprint and simplify maintenance
of lpddr4_timing.c
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update LPDDR4 configuration and training using updated spreadsheet and
tools from NXP using data from previous spreadsheet and verified
toward datasheet:
- MX8M_Plus_LPDDR4_RPA_v9.xlsx
- mscale_ddr_tool_v3.30.exe
From:
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467
Some register values differ due to these fixes/modifications:
- corrected calculation of T_CKPDX parameter (equal to tCKCKEH for LPDDR4)
- corrected ECC related items, none of which affect normal operation
when ECC is not enabled
- corrected formula for calculation of tRTP in cell D122
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Change tRFCmin (tRFCab) from 280 ns to 380 ns to be compliant with
current and futures memories.
Fixes: 2bc2f817ce ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add support to Verdin IMX8MP V1.1B SKU which uses
MT53E1G32D2FW-046 WT:B memory.
Compared to the 8 GB memory (MT53E2G32D4NQ-046 WT:A) used on
Verdin IMX8MP V1.0A it has 16 row addresses instead of 17.
In fact, the new memory, is a 2 GB/rank memory. The 8 GB memory is a
4 GB/rank memory.
Manually tweaking Host Interface addresses vs LPDDR4 signals mapping it
is possible to have a single configuration working with both memories:
- Old configuration: HIF bit 30 -> rank, HIF bit 29 -> Row 16
- New configuration: HIF bit 29 -> rank, HIF bit 30 -> Row 16
With this change the memory space from the host processor is contiguous
for both the configurations and the correct memory size is computed
using get_ram_size() at runtime.
Support for single rank memories still works thanks to the fact
dual ranks training fails (ddr_init->ddr_cfg_phy) toward single rank
memories.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
U-Boot can be booted from NAND without SPL by prepending the DCD header to
the actual U-Boot binary. However this requires prepending 1024 bytes to
u-boot.imx (DCD + u-boot.bin).
There is already a similar target to build spl/u-boot-nand-spl.imx, add the
same option for no-SPL boot.
Tested on i.MX6ULL.
The resulting layout of u-boot-nand.imx is:
- Offset 0x0000 (0 KiB): padding
- Offset 0x0400 (1 KiB): DCD header
- Offset 0x1000 (4 KiB): u-boot.bin
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Enable SDP protocol support in SPL for DH i.MX6 DHSOM, now that those
components fit into the SPL due to LTO.
To start U-Boot via SDP upload on i.MX6 DHSOM based board, proceed as follows:
- Compile imx_usb [1] .
- Power off the i.MX6 DHSOM based board.
- Connect both USB-serial console and USB-OTG miniB ports to host PC.
- Switch board to USB boot mode.
- Power on the board.
- Verify using '$ dmesg' that a new device has been detected as follows:
New USB device found, idVendor=15a2, idProduct=0054, bcdDevice= 0.01
New USB device strings: Mfr=1, Product=2, SerialNumber=0
Product: SE Blank ARIK
Manufacturer: Freescale SemiConductor Inc
- Upload U-Boot SPL:
$ imx_usb u-boot-with-spl.imx
- Wait for SPL to come up, the following print ought to be the last on
UART console:
SDP: handle requests...
- Upload U-Boot proper:
$ imx_usb u-boot.img
[1] https://github.com/boundarydevices/imx_usb_loader.git
Signed-off-by: Marek Vasut <marex@denx.de>
The spl_board_prepare_for_boot() should be called before jump_to_image_no_args()
to perform board-specific deinitialization before jumping to the next stage.
This board-specific deinitialization can be very much anything, e.g. disable
dcache in case it was enabled, or such.
Add the missing spl_board_prepare_for_boot() call into f_sdp .
Signed-off-by: Marek Vasut <marex@denx.de>
At present this inadvertently relies on having a symlink to the correct
file from the current directory. Use the correct path to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The image size was increased but the firmware-update part was not
updated. Correct this so that VBE firmware update can succeed with
sandbox_vpl.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 85c66dc95c ("sandbox: Expand size for VPL image")
The input provided to sgdisk is in fact aimed for sfdisk. The use of
sgdisk and sfdisk, coming from different projects, is not the same.
So, this commit translates the sfdisk-formatted input into
sgdisk-compatible options. Partitions are not modified.
Signed-off-by: Corentin Guillevic <corentin.guillevic@smile.fr>
64597346 "fdt: Add -q option to fdt addr for distro_bootcmd" introduced
the -q option for fdt addr, which sets the current working fdt address
without printing any output.
baf41410 "fdt: Show a message when the working FDT changes" made the
utility function set_working_fdt_addr (in cmd/fdt.c) output a message
on each invocation, even if called via fdt addr -q, in which case its
output is now slightly noisier.
To fix this, split out set_working_fdt_addr into set_working_fdt_addr
plus the static function set_working_fdt_addr_quiet.
set_working_fdt_addr_quiet can be called by "quiet" fdt cmd logic and
set_working_fdt_addr is exported (as before) to other boot logic. The
latter calls the former.
Remove the assertion from the fdt addr test case when calling with the
-q argument.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sometimes a multi-element array is used for "gpio-ranges" property in
dts file:
qe_pio_e: gpio-controller@1460 {
......
gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
......
};
But the function pinctrl_gpio_get_pinctrl_and_offset can't handle this
case because the "index" argument passed to dev_read_phandle_with_args
is fixed to be "0". Use a loop to traverse the array to fix it.
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
The 'fdt get addr' and 'env get size' is always assumed to be hex
value, drop the prefix, and outright switch to env_set_hex(). Since
this might break existing users who depend on the existing behavior
with 0x prefix, this is a separate patch.
Revert if this breaks anything.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test_fdt_add_pubkey test which provides simple functionality test
which contains such steps:
create DTB and FIT files
add keys with fdt_add_pubkey to DTB
sign FIT image
check with fit_check_sign that keys properly added to DTB file
Signed-off-by: Roman Kopytin <Roman.Kopytin@kaspersky.com>
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
u-boot-imx-next-20230331 for next
---------------------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15819
i.MX patches queued for next:
- Conversions to DM_SERIAL
- Fixes for Toradex boards
- Gateworks Boards
- i.MX8ULP
- EQoS support / fixes, changes in boards
Ensure that a freshly written fat file with a lower case filename which
fits into the upper case 8.3 short filename is not mangeled with a tilde
and number.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Remove need of dts binding for button keyboard since it reuses
gpio-keys binding. Select gpio-keys driver if button keyboard
is selected since button keyboard can not operate on its own.
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch introduses config which allows interrupt run of usb
mass storage with any key. This is especially useful on devices
with limited input capabilities like tablets and smatphones which
have only gpio keys in direct access.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warnings after adding printf-like attribute format for
run_commandf():
warning: too many arguments for format [-Wformat-extra-args]
Signed-off-by: Evgeny Bachinin <EABachinin@sberdevices.ru>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warnings both for 32bit and 64bit architecture after adding
printf-like attribute format for run_commandf():
warning: format ‘%x’ expects argument of type ‘unsigned int’, but
argument 2 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
ret = run_commandf("fdt addr -c %08x", addr);
^
Signed-off-by: Evgeny Bachinin <EABachinin@sberdevices.ru>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fixup testcases added since patch was posted]
Signed-off-by: Tom Rini <trini@konsulko.com>
As run_commandf() is variadic version of run_command() and just a wrapper,
hence apply similar run_command's test-cases.
Let's avoid warning about empty string passing:
warning: zero-length gnu_printf format string [-Wformat-zero-length]
assert(run_commandf("") == 0);
Signed-off-by: Evgeny Bachinin <EABachinin@sberdevices.ru>
Reviewed-by: Simon Glass <sjg@chromium.org>
* vsnprintf() can truncate cmd, hence it makes no sense to launch such
command (it's broken). Moreover, it's better to signalize to the caller
about such case (for facilitating debugging or bug hunting).
* Fix kernel-doc warnings:
include/command.h:264: info: Scanning doc for run_commandf
include/command.h:268: warning: contents before sections
include/command.h:271: warning: No description found for return value
of 'run_commandf'
* Add printf-like format attribute to validate at compile-time the format
string against parameters's type.
* Fix compilation error in case of -Wall, -Werror, -Wextra:
error: variable ‘i’ set but not used [-Werror=unused-but-set-variable]
* Drop extra ret variable.
Signed-off-by: Evgeny Bachinin <EABachinin@sberdevices.ru>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adding support for Analog Devices MAX313XX series RTCs.
This is ported from the Linux driver and adapted for use in u-boot.
Notable differences are
- handling of tm_year and tm_mon differ
- clock source support is omitted
- hwmon support for the MAX31328 and MAX31343 is omitted
- rtc_ops->reset is added
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The find_closest() macro can be used to find an element in a sorted
array that is closest to an input value. Bring in this macro from
Linux v6.3-rc1-2-g8ca09d5fa354.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reduce the duplicated code slightly by using a helper function to handle
the common code.
This reduces the code size very slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
The API is more convenient to use if one doesn't have to know upfront
which gpio controller has a line with the name one is searching for,
and arrange to look that device up somehow. Or implement this loop
oneself.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
These operations are required by dm_rtc_read and
dm_bootcount_get helpers.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The deletion process handles special case for symlinks whose target are
small enough that it fits in struct ext2_inode.b.symlink. So no block had
been allocated. But the check of file type wrongly considered regular
files as symlink. So, no block was freed. So, the EXT4 partition could be
corrupted because of no free block available.
Signed-off-by: Corentin GUILLEVIC <corentin.guillevic@smile.fr>
Do not mangle lower or mixed case filenames which fit into the upper
case 8.3 short filename. This ensures FAT standard compatible short
filenames (SFN) to support systems without long filename (LFN) support
like boot roms (ex. SFN BOOT.BIN instead of BOOT~1.BIN for LFN
boot.bin).
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Adds a test for the new pci_mps command to ensure that it can set the
Maximum Payload Size (MPS) of all devices to 256 bytes in the sandbox
environment. Enables the pci_mps command in the sandbox environment so
that this test can be run.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reports the sandbox swapcase PCI Express device to support a 256 byte
Maximum Payload Size for MPS tuning tests.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable tuning of the PCI Express MPS (Maximum Payload Size) of
each device. The Maximum Read Request Size is not altered.
The SAFE method uses the largest MPS value supported by all devices in the
system for each device. This method is the same algorithm as used by Linux
pci=pcie_bus_safe.
The PEER2PEER method sets all devices to the minimal (128 byte) MPS, which
allows hot plug of devices later that might only support the minimum size,
and ensures compatibility of DMA between two devices on the bus.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
There can certainly be a lot more elements in the "revisions" (and
"names") arrays than there are gpios used to form the trinary number
we're searching for; we simply don't know the array size up-front.
Nor do we need to, because the loop body already knows to recognize
-EOVERFLOW as "not that many elements present" (and we have a test
that specifically ensures that dev_read_u32_index() returns exactly
that). So just drop the i < priv->gpio_num condition.
While in here, fix the weird placement of the default: keyword.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Instead of calling env_get(from) up to three times, just do it once,
computing the value we will put into 'to' and error out if that is
NULL (i.e. no 'from' variable and no default provided).
No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kconfig settings that are related to the API for standalone applications
should be in the API sub-menu and not on the top level.
CONFIG_STANDALONE_LOAD_ADDR is only relevant if standalone example
applications are built.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In case fitImage support is disabled, and image_locate_script() is
passed a fitImage, then the 'data' variable is used uninitialized.
Drop into the default: branch of the switch-case statement and do
not return the uninitialized data, and do not modify the return
pointer either, just print an error message.
Reported by clang build:
"
$ make HOSTCC=clang CC=clang KCFLAGS=-Werror sandbox64_defconfig && make HOSTCC=clang CC=clang KCFLAGS=-Werror
...
boot/image-board.c:1006:7: error: variable 'data' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized]
case IMAGE_FORMAT_LEGACY:
^~~~~~~~~~~~~~~~~~~
include/image.h:608:29: note: expanded from macro 'IMAGE_FORMAT_LEGACY'
^~~~
boot/image-board.c:1128:19: note: uninitialized use occurs here
*datap = (char *)data;
^~~~
boot/image-board.c:1001:11: note: initialize the variable 'data' to silence this warning
u32 *data;
^
= NULL
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The FEC interface mode is now configured in common board_interface_eth_init()
and called by FEC MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
The assigned-clock no longer have to be dropped, the clock are now
defined in clk-imx8mp.c and used by DWMAC driver to configure the
DWMAC clock. Drop the workarounds from U-Boot specific DT extras.
Signed-off-by: Marek Vasut <marex@denx.de>
Set, previously unset, CONFIG_SPL_SYS_MALLOC_F_LEN to 0x4000 whose
default value is 0x10000.
Early malloc() uses CRAM_S at 0x184000 (CFG_MALLOC_F_ADDR), this ram
area end at 0x188000.
Fixes: 2bc2f817ce ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
In order for i2c_num==4 and 5 to stay invalid for non-imx8mp SOCs, the
i2c_ccgr[] array must be sized by the number of initializers present,
not with a hard-coded 6 which would implicitly initialize the last two
elements with zeroes.
Also, the bounds check is off-by-one.
Fixes: c92c3a4453 "ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP"
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Implement common board_interface_eth_init() and call it from the FEC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Mini/Nano/Plus FEC and supersedes the current board-side
configuration of the same IOMUX GPR[1] duplicated in the board files.
Signed-off-by: Marek Vasut <marex@denx.de>
The FEC ref clock frequency on i.MX8M Mini/Nano/Plus was so far configured
via ad-hoc board code. Replace that with DM clock clk_set_rate() instead.
This way, the driver claims all its required clock and sets the ref clock
rate, without any need of architecture specific register fiddling.
Signed-off-by: Marek Vasut <marex@denx.de>
Implement common board_interface_eth_init() and call it from the DWMAC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Plus DWMAC and supersedes current board-side configuration
of the same IOMUX GPR[1] duplicated in the board files.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
With DM clock support in place, it is easy to add RMII support into the
MAC driver. The RMII cannot operate at 1000 Mbps and at 100 and 10 Mbps
the clock frequency is 50 MHz and 5 MHz instead of 25 MHz and 2.5 MHz.
The board DT requires the following adjustments to EQoS node:
phy-mode = "rmii";
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <50000000>;
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The DWMAC clock in i.MX8M Plus were so far configured via ad-hoc
architecture code. Replace that with DM clock instead. This way,
the driver claims all its required clock, enables and disables
them, and even gets the CSR clock rate and sets the TX clock rate,
without any need of architecture specific register fiddling. Drop
the architecture specific code while at it too.
The adjustment here is modeled after STM32MP15xx clock handling
in this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
The driver currently only waits for DMA_MODE SWR bit to clear itself.
This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset
before IOMUX GPR[1] content is latched into the MAC and used. Without
the proper reset, the i.MX8M Plus MAC variant does not take the value
in IOMUX GPR[1] into account, which makes it impossible e.g. to switch
interface mode from RGMII to any other.
Since proper reset is desired in general to put the block into defined
state, always assert the DMA_MODE SWR bit before waiting for the bit
to clear itself.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
This function is only used within the driver, staticize it.
Fixes: 149e80f74b ("net: dwc_eth_qos: public some functions")
Signed-off-by: Marek Vasut <marex@denx.de>
The dm_gpio_free() is never called, because for stm32, the phy_reset_gpio
pointer is never valid. This is because only tegra186 ever claims the
phy_reset_gpio, all other platforms use the PHY framework to reset the
PHY instead. Drop the dm_gpio_free() and dm_gpio_is_valid().
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The return is never triggered due to the goto just above it.
Drop it. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Move the board_interface_eth_init() into common ethernet uclass code,
since this function could be shared by multiple drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Add clock for the DWMAC EQoS block. This is used among other things
to configure the MII clock via DM CLK.
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Move i.MX auxiliary core memory base and size configuration
to defconfig where it should belong.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Update the distro config env memory layout for the Colibri iMX8X:
- kernel_comp_addr_r=0xb0000000 temporary area for uncompressing (ie FIT
images or Image.gz booted using booti)
- kernel_comp_size=0x08000000
- loadaddr=0x95400000 avoiding any reserved areas located before that
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Idea of memory layout taken from commit a9f1e35bed
("apalis-imx8: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
The following expression is used to construct the device tree name:
fdtfile=${soc}-colibri-${fdt_board}.dtb
- soc is set dynamically (either imx8qxp or imx8dx)
- fdt_board can be modified by the user (eval-v3, aster, iris/iris-v2)
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Remove obsolete SDHC related config defines. Nowadays, all SDHC related
hardware configuration comes from the device tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
This commit does remove the options argument from the console
kernel-argument as it prevents the serial driver from outputting
anything.
Do this by switchting to use the variable "setup" as it is done on other
Toradex modules.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
All Colibri iMX8X variants have 2nd RGMII on SoC, so add the address
for 2nd ethernet.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK3 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.
Signed-off-by: Marek Vasut <marex@denx.de>
Since commit 1fa43cad86 ("video: Drop references to CONFIG_VIDEO et al")
the mx51evk_video.c is no longer used.
Remove the unused file.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Since commit 1fa43cad86 ("video: Drop references to CONFIG_VIDEO et al")
the mx53loco_video.c is no longer used.
Remove the unused file.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add mmc1, which is mapped to optional on-SoM microSD socket,
to the list of distro boot command boot devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL on DH i.MX6 DHSOM to convert it to DM serial .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Now that the gwventana_emmc_defconfig is the same as the
gwventana_gw5904_defconfig we can remove the latter.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The MV88E61XX switch is used on the GW5904 which is an eMMC based board.
Adding it here allows us to remove the gwventana_gw5904_defconfig.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The ocotp driver is available for regular and SPL builds using the
(SPL_)MXC_OCOTP configuration. Also, the ocotp driver does not support
the driver model (DM) configuration.
But, for SPL builds, the SPL_MXC_OCOTP configuration depends on
SPL_MISC which implies on SPL_DM.
This commit replaces the dependency on SPL_MISC with SPL_DRIVERS_MISC.
So the only requirement is to have enabled miscellaneous drivers for
the SPL.
Signed-off-by: Jean-Marie Lemetayer <j.lemetayer@kerlink.fr>
The PHY nodes may be activated via DTO in case another SoM variant
is populated into the development kit. Do not delete the nodes.
Signed-off-by: Marek Vasut <marex@denx.de>
The i.MX8MP DHCOM SoM may come with either external RGMII PHY or
LAN8740Ai RMII PHY on the SoM attached to FEC MAC. Add pin mux
settings for both options, so that DT overlay can override these
settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin
mux settings for both options, so that DT overlay can override
these settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
The current variant of the SoM has LAN8740Ai PHY connected to EQoS
strapped to MDIO address 0 , adjust the MDIO address to match the
hardware.
Signed-off-by: Marek Vasut <marex@denx.de>
The i.MX8MP DHCOM SoM may be populated with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY attached to EQoS MAC, and either external RGMII PHY
or LAN8740Ai RMII PHY attached to FEC MAC. The SoM configuration can be
detected for each MAC by reading RX_CTL pull resistor state early on boot.
Make use of this, detect the exact PHY configuration, and patch control DT
accordingly so that the ethernet is configured correctly in U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
The DH electronics i.MX8M Plus DHCOM SoM currently supports only 4 GiB
of DRAM population option. Add another population option with 2 GiB of
DRAM. The chips used on the 2 GiB option are 2x K4F6E3S4HM-MGCJ .
Signed-off-by: Marek Vasut <marex@denx.de>
Enable LTO to reduce the size of SPL, which with multiple DRAM
calibration tables may be close to the limit.
Signed-off-by: Marek Vasut <marex@denx.de>
Make sure that the bad block table in flash is used on Colibri iMX7.
Without this configuration enabled U-Boot corrupts the bad block table
and Linux will update the table on each reboot. The corruption occurs
because if CONFIG_SYS_NAND_USE_FLASH_BBT is not set, U-boot will store
bad blocks out of band, while the Linux driver for the iMX7 will store
them in band in a bad block table.
Fixes: fd8c1fc943 ("arm: dts: imx7: colibri: add raw NAND support")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This allows to merge BOOT_FROM_MMC and BOOT_FROM_MMC_ALT constants to one
macro. And also allows to extend other BOOT_FROM_* macros for other
variants.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A385 BootROM treats strapping configuration 0x22 as SPI-NAND. So remove
incorrect definition 0x22 as SATA. SATA on A385 has configuration 0x2A.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A385 BootROM treats strapping configuration 0x3f as invalid. When booting
fails (e.g. because of invalid configuration) then BootROM fallbacks to
UART booting.
Detecting BootROM fallback to UART booting is implemented in U-Boot since
commit 2fd4284051 ("ARM: mach-mvebu: handle fall-back to UART boot").
So there is no need to define BOOT_FROM_UART_ALT constant and special
handling for it anymore, remove it.
This change effectively revers commit f3a88e2ca1 ("arm: mvebu: fix boot
from UART on ClearFog Base").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Show correct information in debug() output and use correct names for variables.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[upstream of vendor commit 19a96f7c40a8fc1d0a6546ac2418d966e5840a99]
The Clearfog devices have only one SDHC device. This is either eMMC if
it is populated on the SOM or SDHC if not. The Linux device tree assumes
the SDHC case. Detect if the device is an eMMC and fixup the device-tree
so it will be detected by Linux.
Ported from vendor repo at https://github.com/SolidRun/u-boot
Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This new clearfog_spi_defconfig file is a copy of existing
clearfog_defconfig file modified to instruct build system to generate
final kwbimage for SPI booting and to store the environment in SPI.
Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A388 Clearfog MMC is either SD Card or eMMC with different behaviour for
both. Setting the device to non-removable in the u-boot.dtsi allows both
to correctly detect the device.
Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
PCA9451A uses similar BUCKs and LDO regulators as PCA9450B/C but
has LDO2 and LDO3 removed. So reuse pca9450 PMIC and regulator driver
and add new type for PCA9451A.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The usage of DM_PMIC is preferred, so convert to it.
This also brings the benefit of causing a significant amount
of code removal.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The usage of DM_PMIC is preferred, so convert to it.
This also brings the benefit of causing a significant amount
of code removal.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
I don't have access to the mx6sxsabreauto board, so remove myself
from the MAINTAINERS entry and add Peng instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.
After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a boot regression in which the eMMC card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.
Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
The OEM Secure World Closed is not a valid lifecycle on iMX8ULP/iMX9.
So remove it from lifecycle print.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Before moving the lifecycle to OEM closed, confirm the lifecycle is
OEM open, otherwise cancel to move forward the lifecycle.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Remove legacy command definitions, change to use new ELE_xxx command
request.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Use common file ele_ahab.c for i.MX9 and iMX8ULP AHAB support, since
both of them use same sentinel ELE APIs
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add get_events API to retrieve any singular events that has occurred
since the FW has started from sentinel
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When using dual boot mode, the DDR won't be reset when APD power off
or reboot. It has possibility that obsolete fdt data existing on
fdt_addr_r address. Then even nothing in EFI partitions, the distro boot
still continue to parse fdt and get uboot crashed.
Clear the data at fdt_addr_r, so the fdt header check in above case
will not pass.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Bit0: Port 0 behavior when bandwidth maximized. Set to 1 to allow overflow
With overflow set, we see some issue that A35 may not able to get enough
bandwidth and A35 will report hrtimer takes too much time, workqueue
lockup. With overflow cleared, the issues are gone.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To resolve DCNANO underrun issue, change the DDR Port 0 arbitration
from round robin fashion to fixed priority level 1, while other ports
are not assigned any priority, so they will be serviced in round robin
fashion if there is no active request from Port 0.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
The ECC fuse on 8ULP can't be written twice. If any user did it, the
ECC value would be wrong then cause accessing problem to the fuse.
The patch will lock the ECC fuse word to avoid this problem.
For iMX9, the OTP controller automatically prevents an ECC fuse word to
be written twice. So it does not need the setting.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since new 8ULP A1 S400 FW (v0.0.8-e329b760) can support to read
more fuses: like PMU trim, Test flow/USB, GP1-5, GP8-10. Update
the u-boot driver for the new mapping.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
From Sentinel FW v0.0.9-9df0f503, the response message of get info API
is changed to add OEM SRK and some states (IMEM, CSAL, TRNG).
With old structure, we get failure from sentinel due to the buffer
size can't fit with new response message. So update the API structure
to fix the issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch is used to support DBD owner fuse changed to S400 only.
The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not
configured by S400 default setting. So these PDAC and MSC are invalid,
only DBD owner can access the corresponding resources.
We have to configure necessary PDAC and MSC for SPL before DDR
initialization.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
To clean the upower codes by aligning codes format, check err_code
and add detail bits list for the memory magic number
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The swton indicates the logic switch, magic number 0xfff80 is hard
to understand, so use macro.
Some board design may not have MIPI_CSI voltage input connected per
data sheet. In that case, the upower power on API may dead loop mu to wait
response, however there is no response. So remove MIPI_CSI here, let
linux power domain driver to runtime enable the power domain.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
At present, in cgc1_pll3_init we don't set the pll3pfd div values,
just use the default 0. But on A1 part, ROM will set PLL3 pfd1div2
to 1 and pfd2div1 to 3.
This finally causes some clocks' rate decreased, for example USDHC.
So clear the PLL3DIV_PFD dividers to get correct rate.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Some space in SRAM0 will be protected by S400 to allow RX SecPriv mode
access only for boot purpose. Since SW will reuse the SRAM0 as SCMI
buffer and SPL container loading buffer, need to reconfigure MRC3.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
To align with ARM trusted firmware's change, adjust DRAM timing
save area to new position 0x20055000. So we can release the space
since 0x2006c000 for the NOBITS region of ARM trusted firmware
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Need to add DRAM access permission for S400, as S400 needs to access
it When SPL calls image authentication
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment.
M33 will be the TRDC owner and needs to configure TRDC. A35 is the
XRDC owner, ATF will configure XRDC.
The handshake between U-boot and M33 image is used to sync TRDC and
XRDC configuration completion. Once the handshake is done, A35 and M33
can access the allowed resources in others domain.
The handshake is needed when M33 is booted or DBD_EN fused, because both
cases will enable the TRDC. If handshake is timeout, the boot will hang.
We use SIM GPR0 to pass the info from SPL to u-boot, because before the
handshake, u-boot can't access SEC SIM and FSB.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
As M33 is responsible for TRDC configuration, the settings for A35
nonsecure world access and DMA0 access are moved to M33 image.
So remove the codes to release TRDC and configure it. Just keep
the configurations for reference.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since A1 ROM has fixed the ROM API eMMC issue, we should only use
the workaround for A0.1 part. Add a SOC revision check.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since latest DTS has added multiple MU nodes, using compatible
string to find the device node is not proper. It finds the first
node with the compatible string matched even the node is disabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Move to using .env file for setting up environment variables for am65x.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62ax family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box
Enable the CONFIG_TI_SECURE_DEVICE by default
Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Move to using .env file for setting up environment variables for J721E
and J7200.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move to using .env file for setting up environment variables for J721S2.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add K3 common environment variables to .env. We retain the old-style C
environment .h files to maintain compatibility with other K3 boards that
have not moved to using .env yet.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Last use of CONFIG_SYS_GPIO1_PRELIM was removed by
commit fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349
support").
Last use of CONFIG_SYS_GPIO2_PRELIM was removed even before by
commit 6843862342 ("ppc: Remove caddy2 / vme8349 boards")
Those two items were removed from whitelist by
commit 8cca60a2cb ("Kconfig: Remove some symbols from the whitelist")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Fixes: fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349 support")
Last (incorrect) use of those CONFIG items was removed by
commit 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")
Those items are invalid and should have been removed at the
same time because lblaw[] has only 4 elements.
And they were removed from the whitelist by
commit 9c5df7a2a9 ("mpc83xx: Migrate LBLAW_* to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Fixes: 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")
Apple silicon SoCs have numerous embedded co-processors with pre-loaded
firmware. The co-processors text and data sections need to be mapped via
DART iommus controlled by the main processor. Those sections are
exported as reserved-memory. Bump CONFIG_LMB_MAX_REGIONS from 8 to 64 to
deal with the large amount of reserved-memory regions.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The WIZ acts as a wrapper for SerDes and has Lanes 0 and 2 reserved
for USB for type-C lane swap if Lane 1 and Lane 3 are linked to the
USB PHY that is integrated into the SerDes IP. The WIZ control register
has to be configured to support this lane swap feature.
The support for swapping lanes 2 and 3 is missing and therefore
add support to configure the control register to swap between
lanes 2 and 3 if PHY type is USB.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
It's possible that the Type-C plug orientation on the DIR line will be
implemented through hardware design. In that situation, there won't be
an external GPIO line available, but the driver still needs to address
this since the DT won't use the typec-dir-gpios property.
Add code to handle LN10 Type-C swap if typec-dir-gpios property is not
specified in DT.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
For non TI boards it is not possible to enable the do_board_detect()
call as TI_I2C_BOARD_DETECT is defined in board/ti/common/Kconfig.
I want to use do_board_detect() to dectect boards and properties based
on some SPI communication with a FPGA.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kconfig does not support using 'select' to select a 'choice'. A choice
can be configured by either setting the choice symbol to 'y' in a
configuration file or by setting a 'default' of the choice.
In board/ti/*/Kconfig the SOC_K3_* choice is already set to 'y' in their
corresponding configs/*_defconfig file. So remove selecting it.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
The M.2 slots of the related IOT2050 variant need to be configured
according to the plugged cards. This tries to detect the card using the
M.2 configuration pins of the B-key slot. If that fails, a U-Boot
environment variable can be set to configure manually. This variable is
write-permitted also in secure boot mode as it is not able to undermine
the integrity of the booted system.
The configuration is then applied to mux the serdes and to fix up the
device tree passed to or loaded by the bootloader. The fix-ups are
coming from device tree overlays that are embedded into the firmware
image and there also integrity protected. The OS remains free to load
a device tree to which they do not apply: U-Boot will not fail to boot
in that case.
Based on original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Add support for the M.2 board based on the iot2050 advanced board.
The board has two m.2 connectors, one is B-keyed, the other E-keyed.
The B-key slot can connect 5G/SSD devices, and E-key can be used for
WIFI/BT devices.
This variant is covered by PG2 firmware image.
Signed-off-by: chao zeng <chao.zeng@siemens.com>
[Jan: align DT to kernel, polish wording]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
User-button is controlled by the mcu domain gpio number 25.
But main0 main1 mcu domain all have gpio number 25.
To identify where the gpio is from, Using gpio controll base as the prefix
to indicate the gpio resource.
Signed-off-by: chao zeng <chao.zeng@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use external blob otpcmd.bin to replace the 0xff filled OTP programming
command block to create a firmware image that provisions the OTP on
first boot. This otpcmd.bin is generated from the customer keys using
steps described in the meta-iot2050 integration layer for the device.
Based on original patch by Baocheng Su.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
There are many ways to get a signed firmware for the IOT2050 devices,
namely for the parts under user-control. This script documents one way
of doing it, given a signing key. Augment the board documentation with
the required procedure around it.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Allows to create a public key device tree dtsi for inclusion into U-Boot
SPL and proper during first build already. This can be achieved via
CONFIG_DEVICE_TREE_INCLUDES.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Add hashes and configuration signature stubs to prepare verified boot
of main U-Boot by SPL.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Will be needed when CONFIG_ENV_WRITEABLE_LIST is enabled. The listed
variables shall remain writable, for informational purposes - they have
to be considered untrusted because the persistent U-Boot env is not
protected.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value
and this to zero by default. Users can then enable the watchdog once the
use and OS which picks it up during boot.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Anything that is not boot-env related is better kept there by now.
At this chance, also drop a stale comment from iot2050.h
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The latest version of the binary-only firmware parts come in a combined
form of FSBL and sysfw containers. This implies some layout changes to
the generated firmware image but also makes handling of artifacts much
simpler (4 files less). The env locations will not change, just the
space reserved for U-Boot will shrink from 4 to 3 MB - still plenty of
space left in practice.
Adjust configuration and documentation accordingly.
Along this change, add a new reservation for update commands of the
user-controlled OTP part. A specific userspace tool will fill it, and
the FSBL will evaluate it during boot. This reservation will use 64K of
the former sysfw section.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Refactor according to the entry `fit: Entry containing a FIT` of
document tools/binman/README.entries.
As the generator uses the device tree name for the config description,
board_fit_config_name_match requires a small adjustment as well.
Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: re-add now required CONFIG_OF_LIST, update config matching]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to different signature keys, the PG1 and the PG2 boards can no
longer use the same FSBL (tiboot3). This makes it impossible anyway to
maintaine a single flash.bin for both variants, so we can also split the
build.
A new target is added to indicates the build is for PG1 vs. PG2 boards.
Hence now the variants have separated defconfig files.
The runtime board_is_sr1() check does make no sense anymore, so remove
it and replace with build time check.
Documentation is updated accordingly. New binary artifacts are already
available via meta-iot2050.
Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: refactor config option into targets, tweak some wordings]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
While this change is correct for v2023.04 it is not correct for next
(where this is right now) nor post-v2023.04.
This reverts commit 8653e5d3b7.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order for some of the functionalities, such as the USB clocks,
to work properly we need some clocks to be properly initialised
at the very beginning of booting.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Clock setup was intended for setting clocks at boot time on SAMA7G5,
e.g. for root clocks like PLLs, that were used to feed IPs needed alive
in u-boot (e.g. Ethernet clock feed by a PLL). Export this functionality
to all at91 clocks as it may be necessary on other SoCs.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Pull request for efi-next-20230325
Documenation:
* add man-page for efi command
UEFI:
* Let EFI app call ExitBootServices() before legacy booting kernel
* Support zboot and bootm in the EFI app
* Let efi command show configuration tables
* Support booting a 64-bit kernel from 64-bit EFI app
* Allocate device-tree copy from high memory
* simplify efi_str_to_u16()
The bootefi command creates a copy of the device-tree within the first
127 MiB of memory. This may lead to overwriting previously loaded binaries
(e.g. kernel, initrd).
Linux EFI stub itself copies U-Boot's copy of the device-tree. This means
there is not restriction for U-Boot to place the device-tree copy to any
address. (Restrictions existed for 32bit ARM before Linux commit
7a1be318f579 ("ARM: 9012/1: move device tree mapping out of linear region")
for legacy booting.
Reported-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Add an option to package a kernel into the debugging script used for
EFI.
The name of the kernel must be added to the script. By default it is
assumed that the kernel is built in the /tmp/kernel directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a command (for the app and payload) to display the tables provided
by EFI. Note that for the payload the tables should always be present, so
an error message is unnecessary and would bloat the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is used with EFI_LOADER but is also useful (with some
modifications) for the EFI app and payload. Move it into a shared
file.
Show the address of the table so it can be examined if needed. Also show
the table name as unknown if necessary. Our list of GUIDs is fairly
small.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are currently only available when running with EFI_LOADER.
Expand this to include the app and payload, since it is useful to be
able to decode things there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide information about the GUIDs supplied by QEMU, so far as it is
known.
These values are used in the 'efi table' command as well as the printf
format string %sU
Signed-off-by: Simon Glass <sjg@chromium.org>
These have been disabled due to the rudimentary support available. It is
a little better now, so enable these options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When running the EFI app, we need to exit boot services before jumping
to Linux.
At some point it may be possible to jump to Linux and pass on the system
table, and:
* install the device-tree as configuration table
* use LoadImage() to load the kernel image (e.g. from memory)
* start the image with StartImage()
This should allow the Linux efistub to be used. For now, this is not
implemented.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the missing code to handle this. For a 64-bit kernel the entry
address is 0x200 bytes after the normal entry.
Rename the parameter to boot_linux_kernel() accordingly. Update the
comments to indicate that these are addresses, not pointers.
Signed-off-by: Simon Glass <sjg@chromium.org>
The U-Boot EFI app can run as a 64-bit program, so set the Kconfig
correctly in that case. Make sure it doesn't build SPL, since there is
no need to switch from 32 to 64 bit when running.
Signed-off-by: Simon Glass <sjg@chromium.org>
The incumbent function efi_alloc() is unused.
Replace dp_alloc() by a new function efi_alloc() that we can use more
widely.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
EFI device paths for block devices must be unique. If a non-unique device
path is discovered, probing of the block device fails.
Currently we use UsbClass() device path nodes. As multiple devices may
have the same vendor and product id these are non-unique. Instead we
should use Usb() device path nodes. They include the USB port on the
parent hub. Hence they are unique.
A USB storage device may contain multiple logical units. These can be
modeled as Ctrl() nodes.
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A38x BootROM has a bug which cause that BootROM loads data part of UART
image into RAM target address increased by one byte when source address
and header size stored in the image header are not same.
Workaround this bug by completely removing a gap between header and data
part of the UART image. Without gap, this BootROM bug is not triggered.
This gap can be present in SDIO or SATA image types which have aligned
start of the data part to the media sector size. With this workaround
kwboot should be able to convert and send SDIO or SATA images for UART
booting.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Sending of very small images (smaller than 128 bytes = xmodem block size)
cause out-of-bound memory read access. Fix this issue by ensuring that
hdrsz when sending image is not larger than total size of the image.
Issue was introduced in commit f8017c3779 ("tools: kwboot: Fix sending
Kirkwood v0 images"). Special case when total image is smaller than header
size aligned to multiply of xmodem size is already handled since that
commit.
Fixes: f8017c3779 ("tools: kwboot: Fix sending Kirkwood v0 images")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 7665ed2fa0 ("tools: kwboot: Fix parsing UART image without data
checksum") added fixup code to insert place for data checksum if UART image
does not have it. Together with option -B (change baudrate), kwboot
calculates this checksum. Without option -B, it inserts only place for
checksum but does not calculate it.
This commit fix above logic and calculate data checksum also when kwboot is
used without -B option.
Fixes: 7665ed2fa0 ("tools: kwboot: Fix parsing UART image without data checksum")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Ensure that UART aligned header size is always stored into kwbimage v1
header. It is needed for proper UART booting. Calculation of headersz field
was broken in commit d656f5a0ee ("tools: kwboot: Calculate real used
space in kwbimage header when calling kwboot_img_grow_hdr()") which
introduced optimization of kwboot_img_grow_hdr() function.
Fixes: d656f5a0ee ("tools: kwboot: Calculate real used space in kwbimage header when calling kwboot_img_grow_hdr()")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Armada 385 BootROM ignores low 7 bits of headersz when parsing kwbimage
header of UART type, which effectively means that headersz is rounded down
to multiply of 128 bytes. For all other image types BootROM reads and use
all bits of headersz. Therefore fill into UART type of kwbimage v1 headersz
aligned to 128 bytes.
Fixes: 2b0980c240 ("tools: kwbimage: Fill the real header size into the main header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Same change as was done for mvebu in commit 5bb2c550b1 ("arm: mvebu: Move
internal registers in arch_very_early_init() function") but for kirkwood.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_SF_DEFAULT_SPEED is used in SPL SPI to configure and probe the
flash device during DM SPI uclass probing process, if the
spi-max-frequency is not available in the DTB. Currently the max
frequency is not available, because of the probing mechanism in SPI
uclass has not been fully updated to DM.
The CONFIG_SF_DEFAULT_SPEED is set to 1Mhz if a board defconfig
does not specify it. This speed is too slow and result in a few
seconds delay while the u-boot image is loaded from flash. Based on a
survey of the device tree specifications for MVEBU boards, a sane default
value should be 10Mhz. The default of 10Mhz enables an almost
instantaneously loading of the u-boot image.
Note that this patch depends on this patch series (has been merged to
u-boot-marvell/next):
https://lists.denx.de/pipermail/u-boot/2023-March/511038.html
- RESEND: correct spelling of SF_DEFAULT_MODE
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Here we implement usb_gadget_handle_interrupts() but did not include
<linux/usb/gadget.h> so did not have the declaration correct. Fix this
and add the missing include.
Signed-off-by: Tom Rini <trini@konsulko.com>
If we're building U-Boot with LTO, we don't want to use that for
examples as it's more work than required.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We did not add a prototype for spl_mmc_get_uboot_raw_sector to
include/spl.h before, so add and document one now. Correct the incorrect
prototype in board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c and
ensure that we have spl.h where we define a non-weak
spl_mmc_get_uboot_raw_sector as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Some platforms were not including <cpu_func.h> which sets the prototype
for reset_cpu, and in turn had it set wrong. Correct these cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
With clang-15 we now get reported that in the make_flame_tree function,
neither the missing_count nor depth variables are used, only
incremenete/decremented. Remove these.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With clang-15, it is now reported that cont_img_count is unused. This is
true as the code will increment / reset this counter, but never
functionally use it. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
With clang-15 we now will get warnings such as:
warning: a function declaration without a prototype is deprecated in all
versions of C [-Wstrict-prototypes]
And it is easy enough to address this warning here, even if we would
like to stay in sync more with upstream as it's a single location.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With clang-15 we now will get warnings such as:
warning: a function declaration without a prototype is deprecated in all
versions of C [-Wstrict-prototypes]
And it is easy enough to address this warning here, as we aren't
concerned with re-syncing with an upstream.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With clang-15 we now will get warnings such as:
warning: a function declaration without a prototype is deprecated in all
versions of C [-Wstrict-prototypes]
And it is easy enough to address this warning here, as we aren't
concerned with re-syncing with an upstream.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have a number of places in the code which use the following syntax:
void func(a, b, c)
int a; /* Does a */
something_t *b; /* Pointer to b */
int c; /* Does c */
{
...
}
Which while not what we document as our coding style, this is also code
which we have imported from other projects, and would like to re-sync
with in the future. While the biggest example of this is the zlib code,
there are other places as well. For now, we will silence this warning.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To conserve bandwidth and potentially avoid rate limits, allow a local
mirror of Docker Hub to be specified globally. The default value is
unchanged.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The default behavior of Gitlab runners is to only run jobs which match
the configured tag, although there is an option to run untagged jobs
[1].
To support running the CI in more complex environments where different
types of runners may be present that support different tags, allow the
DEFAULT_TAG for all jobs in the pipeline to be set globally using an
environment variable. An empty default value is provided to retain
support for untagged runners.
[1] https://docs.gitlab.com/ee/ci/runners/configure_runners.html#use-tags-to-control-which-jobs-a-runner-can-run
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Copy build artifacts for all test.py tests, so they show up in
artifacts storage for later inspection. The test.py tests output
in CI is basically useless, but it is far more useful in the html
output for analysis and debugging.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The default pytest cache directory is in a read-only directory in Azure,
which results in a warning on the build page. Use the pytest command
line option to set the cache dir to somewhere writable.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable use of the python-azurepipelines package which provides automatic
formatting and uploading of the pytest output.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote the author:
The first patch simplies do_read somewhat by making use of an existing
helper instead of parsing the dev_part string manually. As a bonus
(and my actual motivation), it now understands dev#partname syntax -
hard-coded partition numbers are so last decade.
I also need the symmetrical operation, being able to write to a named
raw partition, and fortunately it doesn't require that many lines of
code to implement that.
There's a very minor change in the error reporting due to using
cmdtp->name to generate the new messages, but I don't think "Error
reading blocks" offers much that "read error" doesn't.
New in v2: the last three patches add documentation, ensure CMD_WRITE
is set for sandbox and adds some basic test cases for the various ways
of accessing the partitions (by number, name, or as raw offset within
the whole disk).
v3: Add Simon's R-b to patches 2, 4, 5, fixup whitespace in patch 5.
I don't want to duplicate the documentation, but I can see the value
in 'write' having its own entry in the TOC, so I added a stub
write.rst that just refers to the read.rst, which then explicitly
documents both.
Make the indent of these macro elements consistent with the
rest of this table. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.
This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/<nothing for regular SCIF>:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000
The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:
CONFIG_DEBUG_UART_ANNOUNCE=y
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Switch ifdef in sh_gpio_get_value() to IS_ENABLED() macro.
The CONFIG_RCAR_GEN3 will never have SPL counterpart, so
the IS_ENABLED() macro is the right one here. No functional
change, except for improved build test coverage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Calling old U-Boot API doesn't allow to use fixed PHY.
Searching by mask is the part of new function, after
scanning FDT for a fixed PHY definition
Fixes: e821a7bdb1 ("net: ravb: Detect PHY correctly")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Mikhail Lappo <mikhail.lappo@esrlabs.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
[Hai Pham: Drop phy_connect_dev since it's called in phy_connect]
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Use mask -1 instead of 0 to reinstate the search behavior
over all PHY addresses. Add Fixes tag, sort the tag list.]
Sort the list of "depends" symbols in ascending order.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Sort the list of "depends" symbols in ascending order.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Do not cache the single CPG MODE register bit 12, instead cache the
entire register value, and only pick the matching bit from the cached
value when core clock of type MDSEL or PE are used. Both MDSEL and PE
clock type currently define .offset field as 12 on Gen3, which means
this code will use bit 12 on Gen3 again, however there are additional
clock on Gen4 which use different bits, and having this flexibility
in place now will be useful when adding Gen4.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
There are multiple shared Kconfig options between R-Car Gen3 and Gen4.
Keep the common options in Kconfig.64 and move the R-Car Gen3 specific
options into separate Kconfig.rcar3 . The Kconfig.rcar3 contains SoC
and board list, which is limited to R-Car Gen3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Introduce common Kconfig symbol for 64bit R-Car platforms and move
common configuration options into it. This is preparatory patch to
prevent duplication of Kconfig lists later on, when Gen4 is added.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Pull the SYS_SOC Kconfig option to avoid duplication of this option
in Kconfig.{32,64,rza1} . The default value is the same, so just set
it in one location.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Switch ifdef in rmobile_get_prr() to IS_ENABLED() macro.
The CONFIG_RCAR_GEN3 will never have SPL counterpart, so
the IS_ENABLED() macro is the right one here. No functional
change, except for improved build test coverage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
U-Boot executes at EL3 is required to initalize those settings.
In other cases, they will be done by prior-stage firmware instead.
This fixes crash when U-Boot is at non-secure exception level.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
All R-Car Gen3 defconfigs present in U-Boot do enable DTO support,
enable it for all of R-Car Gen3 by default in Kconfig instead, so
that no new boards would miss this functionality.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The R-Car DTs might contains multiple /memory@* nodes from various
sources, i.e. prior firmware, u-boot itself or the OS
The duplicates are likely to happen so the messages are not meaningful
in the default setting since we have already handled that.
Reduce the message to debug level.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The read and write commands are, deliberately, implemented in the same
file, so that they stay feature-compatible (e.g. if someone implements
support for "read the full partition, however large that is", that
same syntax should also work for write). In order to ensure the
documentation for both are similarly kept in sync, and to avoid
duplication, document them both in read.rst, and add a stub write.rst
referring to read.rst.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's almost no extra code to hook up a buddy to the 'read' command. In
fact, since the command is passed its own 'struct cmd_tbl', we can use
the exact same callback, and let it figure out for itself whether it
was invoked as "read" or "write".
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Use the helper part_get_info_by_dev_and_name_or_num() for parsing a
dev[:part] string and obtaining the partition info in one go, instead
of open-coding all that.
As a bonus, this will automatically allow using the dev#partname
syntax as well, for accessing raw partitions by name.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This reverts commit 9f62a472df.
The changes here aren't quite right, and on platforms such as Raspberry
Pi where we can have both serial and video output, the change above
causes output to change. This can be seen as the hush tests we have now
fail.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The previous attempt at fixing this broke the normal usage of the -A
flag.
At present, 'buildman -A sandbox' adds the path containing the
toolchain. We can assume that this is in the path and we don't want to
set CROSS_COMPILE=/bin/
Change this to align with what MakeEnvironment() does, but only for
sandbox boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Having to use the -K option to mkimage to populate U-Boot's .dtb with the
public key while signing the kernel FIT image is often a little
awkward. In particular, when using a meta-build system such as
bitbake/Yocto, having the tasks of the kernel and U-Boot recipes
intertwined, modifying deployed artifacts and rebuilding U-Boot with
an updated .dtb is quite cumbersome. Also, in some scenarios one may
wish to build U-Boot complete with the public key(s) embedded in the
.dtb without the corresponding private keys being present on the same
build host.
So this adds a simple tool that allows one to disentangle the kernel
and U-Boot builds, by simply copy-pasting just enough of the mkimage
code to allow one to add a public key to a .dtb. When using mkimage,
some of the information is taken from the .its used to build the
kernel (algorithm and key name), so that of course needs to be
supplied on the command line.
Signed-off-by: Roman Kopytin <Roman.Kopytin@kaspersky.com>
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Add the test which provides sequence of actions:
1. create the image from binman dts
2. create public and private keys
3. add public key into dtb with fdt_add_pubkey
4. 1. sign FIT container with new sign option with extracting from
image
2. sign exact FIT container with replacing of it in image
5. check with fit_check_sign
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
Renumber test file from 277 to 280;
Move UpdateSignatures() to Entry base class;
Don't allow missing mkimage as it doesn't make sense;
Propagate --toolpath for CI;
Call mark_build_done() to avoid regenerating FIT:
Signed-off-by: Simon Glass <sjg@chromium.org>
Introduce proof of concept for binman's new option which provides sign
and replace FIT containers in binary images.
Usage as example:
from:
mkimage -G privateky -r -o sha256,rsa4096 -F fit
binman replace -i flash.bin -f fit.fit fit
to:
binman sign -i flash.bin -k privatekey -a sha256,rsa4096 -f fit.fit fit
and to this one if it's need to be extracted, signed with key and put it
back in image:
binman sign -i flash.bin -k privatekey -a sha256,rsa4096 fit
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
Add the documentation about binman sign option and providing an
example.
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
Add a section about 'binman sign' at the bottom:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add 'fdt chosen' test which works as follows:
- Create basic DT, map it to sysmem
- Apply DTO which adds single property via fragment (without address spec)
- Apply DTO which adds more properties (string, u32, empty) and a subnode,
with phandle via frament@0 and thus tests /__symbols__ node
- Apply DTO which modifies property of the previous DTO via phandle and thus
tests the /__fixups__ node
- Print modified DT, verify it contains updates from DTOs
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt chosen' test which works as follows:
- Create basic DT, map it to sysmem
- Print /chosen node, verify it is nonexistent
- Create chosen node
- Print /chosen node, verify it contains only version
- Create /chosen node with initrd entries
- Print /chosen node, verify it contains version and initrd entries
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt rsvmem' test which works as follows:
- Create custom FDT with single reserved memory (rsvmem) entry, map it to sysmem
- Add new rsvmem entry
- Delete existing older rsvmem entry
- Add new rsvmem entry again
- Always print the rsvmem list and validate it
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt memory' test which works as follows:
- Create custom FDT with /memory node, with select #*cells, map it to sysmem
- Perform memory fixup
- Read back the /memory node and validate its content
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt header' test which works as follows:
- Create basic FDT, map it to sysmem
- Print the FDT header
- Get all members of the FDT header into variable and
verify the variables contain correct data
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Merged in test: cmd: fdt: Drop unused fdt_test_header_get() fdt parameter:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add 'fdt print' and 'fdt list' test which works as follows:
- Create fuller FDT, map it to sysmem
- Print the entire FDT, parts of the FDT and select properties
- Compare output from the print or list
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'fdt get addr' is always assumed to be hex value, drop the prefix.
Since this might break existing users who depend on the existing
behavior with 0x prefix, this is a separate patch. Revert if this
breaks anything.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
In case character 0x20 (space) is used as line separator,
character 0x9 (tab) is treated end of line. Commands which
output a lot of tabs, i.e. various tree printing commands
like 'fdt print' then end up generating a lot of newlines
in the recorded output, and the recorded output is corrupted.
Use character 0x00 (NUL) as separator instead to treat the
tabs as valid part of recorded line.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop no longer needed { } around ut_assert*() functions in FDT test.
No functional change.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Wrap the assert macros in ({ ... }) so they can be safely used both as
right side argument as well as in conditionals without curly brackets
around them. In the process, find a bunch of missing semicolons, fix
them.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Now that the DT nodes for the serial devices are in place for these
boards, enable DM_SERIAL in the associated configs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the serial nodes of the LS208XA RDB/QDS boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When the first device tree description was added for the ethernet nodes,
the 2 10G ports on the LS1088ARDB were wrongly described as 'xgmii'.
Fix this by replacing the two last occurrences of 'xgmii' in the device
trees of the Layerscape DPAA2 devices.
Fixes: 68c7c008e8 ("arm: dts: ls1088ardb: add DPMAC and PHY nodes")
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The LX2160ARDB board has support for DM_ETH probed devices, which means
that we do not need to manually create an MDIO controller, register it,
create PHYs on it etc.
In order to cleanup the board file a bit, just remove this code entirely.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Pull request efi-next-20230313
UEFI:
* Improve graphics support in EFI app
Others:
* x86: Add a few more items to bdinfo
* video: Remove duplicate cursor-positioning function
* video: Clear the vidconsole rather than the video
Add these options to provide some performance measurement, see cache
status and slightly speed up the appallingly slow console.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is better to clear the console device rather than the video device,
since the console has the text display. We also need to reset the cursor
position with the console, but not with the video device.
Add a new function to handle this and update the 'cls' command to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running with video enabled, the pre-relocation output of U-Boot is
currently lost. Add a -serial flag to show it on the terminal.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible for the video driver to use a pre-allocated
frame buffer (such as is done with EFI) with the copy framebuffer. This
can be useful to speed up the display.
Adjust the implementation so that copy_size can be set to the required
size, with this being allocated if the normal framebuffer size is 0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for this to EFI in case it becomes useful. At present it just
slows things down. You can enable CONFIG_VIDEO_COPY to turn it on.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is not yet clear how to read the timer via EFI. The current value seems
much too high on a Framework laptop I tried. Adjust it to a lower
hard-coded value for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current vesa structure only provides a 32-bit value for the frame
buffer. Many modern machines use an address outside the range.
It is still useful to have this common struct, but add a separate
frame-buffer address as well.
Add a comment for vesa_setup_video_priv() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put this into a function, as we have done for the app implementation.
Comment both functions. FOr now the app still does not access it
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Microblaze and m68k are the only remaining architectures that still enable
CONFIG_NEEDS_MANUAL_RELOC by default.
Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for
quite some time, since commit d58c007498 ("microblaze: Add support for run
time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make
runtime relocation the default, as the rest of the architectures do.
Reviewed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230311173838.521804-4-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and
CONFIG_STATIC_RELA=y fails with:
tools/relocate-rela: Not supported machine type
ELF decoding failed
make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1
To fix this, convert the 32-bit codepath to use the previously added
elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched.
This commit ensures that CI doesn't fail for the next patches which enable
runtime relocation by default for microblaze.
Reviewed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230311173838.521804-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
binman x509, separate tools dir and other improvements
patman parallel patch generation
fdt fixes and tests
PyPi support for U-Boot tools
buildman reproducible builds
When using the fpga loads command, the driver is passing the AES encryption
key address is all cases. However, for the authenticated, but not encrypted
use case, there is no AES encryption key, and this value is 0.
When AES encryption is not used on the fpga bitstream, the pmufw assumes that
the AES key address is a bitstream size value like what is used by the
unsecure fpga load command.
To fix the problem, this patch checks to see if the AES key address is zero.
If the AES key address is zero, it means that AES is not being used on the
bitstream and the bitstream size should be passed instead. Thus, matching
the fpga load functionality.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also
U-Boot driver has been updated to support new compatible string that's why
it is time to remove it and deprecate it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5f ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
And a new entry type which supports generation of x509 certificates.
This uses a new 'openssl' btool with just one operation so far.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these are handled as if they are allowed to be missing, but
this is only true if the -M flag is provided. Fix this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present, 'buildman -A sandbox' adds the path containing the
toolchain at present. We can assume that this is in the path and
we don't want to set CROSS_COMPILE=/bin/ so change this to align
with what MakeEnvironment() does.
Signed-off-by: Simon Glass <sjg@chromium.org>
For large series this can take a while. Run checkpatch in parallel to
try to reduce the time. The checkpatch information is still reported in
sequential order, so a very slow patch at the start can still slow
things down. But overall this gives good results.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
This script can take ages on some series. Try to limit the time by
using threads. If a few stubborn patches remain, show progress so the
user has some idea what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
This function is quite long. Moving the handling of a commit into a
separate function. This will make it easier to do the work in parallel.
Update function comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Patman does not do this anymore, as of this commit:
7428dc14b0 ("patman: Remove the -a option")
Drop the comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Add list of missing tests for the 'fdt' command, currently
the missing sandbox tests are only 'fdt boardsetup' and
'fdt checksign' .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt bootcpu' test which works as follows:
- Create basic FDT, map it to sysmem
- Print the FDT bootcpu
- Set the FDT bootcpu and read the value back using 'fdt header get'
- Perform the previous step twice to validate bootcpu overwrite
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt rm' test which works as follows:
- Create fuller FDT, map it to sysmem
- Selectively delete nodes or properties by both path and aliases
- Verify created nodes or properties using fdt print command
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt mknode' test which works as follows:
- Create fuller FDT, map it to sysmem
- Create node either in / or subnode
- Attempt to create node over existing node, which fails
- Attempt to create subnodes in non-existing nodes or aliases
- Verify created nodes using fdt list command
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt set' test which works as follows:
- Create fuller FDT, map it to sysmem
- Set either existing property to overwrite it, or new property
- Test setting both single properties as well as string and integer arrays
- Test setting to non-existent nodes and aliases
- Verify set values using 'fdt get value'
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt get size' test which works as follows:
- Create fuller FDT, map it to sysmem
- Get size of various properties
- Get node count of available nodes
- Test non-existent nodes and properties
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt get addr' test which works as follows:
- Create fuller FDT, map it to sysmem
- Get address of various properties
- Compare addresses calculated by UT and fdt command
This test is special in that it has to go through gruesome remapping scheme
where the test calculates:
- pointer offsets of the generated FDT root and the property being tested
- map_sysmem() result of environment variable "fdtaddr" and the one set
by the test matching address of property being tested
- difference between the later and the former, to obtain offset of the
DT property from start of DT
The offsets must match in both the UT and the tested U-Boot, if they do
not, the test fails.
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt get name' test which works as follows:
- Create fuller FDT, map it to sysmem
- Get name of / node 0, 1 and /clk-test node 0
- Compare output and validate the node name
- Get name of / node 2 and /clk-test node 1
- Compare output and validate the node is not present
- Get name of / node -1 and /clk-test node -1
- Compare output and validate the node name equals node 0 name
- Check nonexistent node, verify the command errors out
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt resize' test which works as follows:
- Create simple FDT with extra size 0, map it to sysmem
- 'resize' the FDT by 0x2000 bytes
- Verify the new space has been added to the FDT
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 'fdt move' test which works as follows:
- Create simple FDT, map it to sysmem
- 'move' the FDT into new zeroed out sysmem location
- Verify newly active FDT is in the new location
- Compare both locations
The test case can be triggered using:
"
./u-boot -Dc 'ut fdt'
"
To dump the full output from commands used during test, add '-v' flag.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'fdt get value' subcommand now supports extraction of integer value
from integer arrays, add test for it, including a test for special case
unindexed integer array read, which is handled as hash and treated as a
long string instead of integer.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'fdt' command help contains the following note:
"
Dereference aliases by omitting the leading '/', e.g. fdt print ethernet0.
"
Add test for it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement function to generate internal test DT fragment and switch
the 'fdt get value' test to this instead of depending on the sandbox
DT. Rename clk-test node to test-node node. This FDT fragment will be
reused by other tests. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'fdt get' command has a 'get value' subcommand, rename the fdt_test_get()
to fdt_test_get_value() to avoid confusion about what it is testing. There is
currently no get 'get name', 'get addr', 'get size' subcommand test.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'fdt' command has a 'resize' subcommand, rename the fdt_test_resize()
to fdt_test_addr_resize() to avoid confusion about what it is testing.
There is currently no resize test.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add helper macro to test for empty lines, which is an inobvious
wrapper around ut_assert_nextline("%s", "") .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently any integer array value is set as long up-to-40 character
hexadecimal string into environment variable when extracted from an
FDT using 'fdt get value path prop index', because the support for
handling integer arrays is not implemented, and fdt_value_env_set()
code falls back into the hash handling behavior instead.
Implement this support simply by checking whether user supplied any
index. If index is set and the property length is multiple of four,
then this is an integer array, and the code would extract value at
specified index.
There is a subtle change where default index is set to -1 instead of 0.
This is OK, since the only place which checks for index to be less or
equal zero is the string array handling code in fdt_value_env_set() and
that code would work perfectly well with index -1 too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The address returned from 'fdt get addr' command must be mapped
into sysmem, as this is a working FDT. Access to this address
without mapping it would lead to crash e.g. in sandbox.
The following command triggers the crash:
"
./u-boot -Dc 'fdt addr $fdtcontroladdr ; fdt get addr var / compatible ; md $var'
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command assumed 32bit pointers so far, with 64bit pointer the
command would overwrite a piece of stack. Fix it by extending the
array size to cater for 64bit pointer, and use snprintf() to avoid
writing past the end of the array ever again.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The help text references 'addr' as an optional key start address,
but the explanation references the same as 'start', make sure they
both read as 'addr'. Also update the abbreviated 'addr' in the
explanation to 'address'.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
On case 'fdt memory' is invoked without parameters, argv[2]/argv[3]
is not valid and this command would SEGFAULT in sandbox environment.
Add missing argc test to avoid the crash and rather print usage help
message.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
On case 'fdt bootcpu' is invoked without parameters, argv[2] is not
valid and this command would SEGFAULT in sandbox environment. Add
missing argc test to avoid the crash and rather print usage help
message.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In case 'fdt rsvmem delete index' is passed a non-existent index, one
which does not exist in 'fdt rsvmem print', then the following command
triggers a print of help message for 'fdt' command instead of erroring
out:
=> fdt rsvmem delete 1234
This is because the subcommand errornously returns 'err' instead of
CMD_RET_FAILURE, fix it. Furthermore, align the number of spaces past
fdt_del_mem_rsv() and fdt_add_mem_rsv() in error message with the rest
of the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In case an FDT contains a node '/test-node@1234' , with no property
called 'noprop' in that node, the following command triggers a print
of help message for 'fdt' command instead of erroring out:
=> fdt rm /test-node@1234 noprop
This is because the subcommand errornously returns 'err' instead of
CMD_RET_FAILURE, fix it. Furthermore, align the number of spaces past
fdt_delprop() in error message with the rest of the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is perfectly valid to request an address or size of FDT property
without value, the only special case if requesting of the value of
FDT property without value. Invert the test such, that properties
without value still set the variable from 'fdt get addr/size' to
address of the property or size of the property, where the later
is 0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Import is_printable_string() implementation from DTC 1.7.0 as of
DTC commit 039a994 ("Bump version to v1.7.0") . This fixes a print
of u32 property which so far used to be printed as string by U-Boot
fdt print command.
We might see the case where the parsed property value, in this case
it is a 32-bit integer, identified as a printable string or a null byte
(concatenated strings) because of its last character happens to be:
0x00 (null character), 0xB (vertical tab character) or
0x10 (line feed character)
In this situation, if the string is identified as printable string,
it will be displayed as character instead of hex value
When the isprint() condition is true, there are two possibilities:
1) The character is ASCII character (except the first 32)
2) The character is extended ASCII character
For example,
NG property in device tree:
clock-frequency = <16640000>;
by default, would be displayed as
clock-frequency = "", "ýè";
and with this patch applied, would be displayed as
clock-frequency = <0x00fde800>;
Full investigation was done by Nam and Hai, patch reworked by Marek
to use common code from DTC.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows tests to run in parallel and speeds up some tests markedly,
particularly with binman. Add it to the requirements.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create the necessary files to build this new package.
It is not actually clear whether this is useful, since buildman has no
purpose outside U-Boot.
Move the main program into a function so that it can easily be called by
the PyPi-created script.
Signed-off-by: Simon Glass <sjg@chromium.org>
It doesn't make much sense to expose tests when dtoc is running
outside of the U-Boot git checkout. Hide the option in this case.
Fix a long line while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create the necessary files to build this new package.
This is needed for binman.
Move the main program into a function so that it can easily be called by
the PyPi-created script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this so that the directory being used is declared at the top of
the file. Use pathlib as it seems to be more modern.
Signed-off-by: Simon Glass <sjg@chromium.org>
It doesn't make much sense to expose tests when dtoc is running
outside of the U-Boot git checkout. Hide the option in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create the necessary files to build this new package.
It is not actually clear whether this is useful, since buildman has no
purpose outside U-Boot. It is included for completeness, since adding
this later would be more trouble.
Move the main program into a function so that it can easily be called by
the PyPi-created script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Using 'str' as a variable makes it impossible to use it as a type in the
same function. Fix this by using a different name.
Signed-off-by: Simon Glass <sjg@chromium.org>
It doesn't make much sense to expose tests when buildman is running
outside of the U-Boot git checkout. Hide the option in this case
Signed-off-by: Simon Glass <sjg@chromium.org>
Tests are not packaged with patman so this file will not be accessible
when installing with pip. Move the import later in the file, when we
know the file is present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a script which can package a tool for use with PyPi and the 'pip'
tool. This involves quite a few steps so is best automated. Future work
will enable use of this for some of the tools in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
The patman directory has a number of modules which are used by other tools
in U-Boot. This makes it hard to package the tools using pypi since the
common files must be copied along with the tool that uses them.
To address this, move these files into a new u_boot_pylib library. This
can be packaged separately and listed as a dependency of each tool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Unfortunately this adds a new feature to concurrencytest and it has not
made it upstream to the project[1].
Drop it for now so we can use the upstream module. Once it is applied we
can bring this functionality back.
[1] https://github.com/cgoldberg/concurrencytest
This reverts commit ebcaafcded.
Signed-off-by: Simon Glass <sjg@chromium.org>
For EFI, the distro boot scripts search in three different directories
for the .dtb file. The SOC-based filename fallback is supported only for
32-bit ARM.
Adjust the code to mirror this behaviour.
Also some boards can use a prior-stage FDT if one is not found in the
normal way. Support this and show a message in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Mark Kettenis <kettenis@openbsd.org>
Add a command-line argument for setting the tooldir, so that the default
can be overridden. Add this directory to the toolpath automatically.
Create the directory if it does not already exist.
Put the default in the argument parser instead of the class, so that it
is more obvious.
Update a few tests that expect the utility name to be provided without
any path (e.g. 'futility'), so they can accept a path, e.g.
/path/to/futility
Update the documentation and add a few tests.
Improve the help for --toolpath while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman writes tools into the ~/bin directory. This is
convenient but some may be concerned about downloading unverified
binaries and running them. Place then in a special ~/.binman-tools
directory instead.
Mention this in the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We want to be able to change this directory. Use a class member to hold
the value, since changing a constant is not good.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is quite a useful thing to use when building since it avoids small
size changes between commits. Add a -r flag for it.
Also undefine CONFIG_LOCALVERSION_AUTO since this appends the git hash
to the version string, causing every build to be slightly different.
Signed-off-by: Simon Glass <sjg@chromium.org>
This cuts down build performance considerably and is not always needed,
when checking for build errors, etc.
Add a flag to disable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes useful to see the exact 'make' command used by buildman
for a commit. Add an output file for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Entry_blob_ext contains an implementation of SetAllowFakeBlob that is
identical to the one in the base Entry class, remove it.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add an entry flag called 'preserve' to indicate that an entry should be
preserved by firmware updates. Propagate this to FMAP too.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed to download tools, but we may not need to do this. At
present binman fails to start if HOME is not set.
Use the current directory as a default to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
- video console refactoring and optimization
- support for fonts wider than 1 byte
- use named header for 8x16 font data
- support multiple fonts configuration
- move get_font_size() to truetype driver ops
- support font size configuration at runtime
- add 16x32 Terminus font from linux
- add 12x22 Sun font from linux
- add 12x22 console simple font test
- semihosting updates for arm and riscv, assorted arm64 core updates,
assorted ast2600 updates, remove some more unused code, some TI K3
defconfig and DTS updates, uniphier DTS updates, mpc83xx Kconfig
cleanup, re-add fttmr010 driver with an update to use DM.
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow font size configuration at runtime for console_simple.c
driver. This needed for unit testing different fonts.
Configuring is done by `font` command, also used for font
selection in true type console.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since multiple vidconsole drivers exists, vidconsole_get_font_size()
implementation cannot longer live in vidconsole_uclass.c file.
Move current vidconsole_get_font_size logic to truetype driver ops.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This needed for unit testing different fonts.
Configured fonts are placed in an array of fonts.
First font is selected by default upon console probe.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agust: fixed build error when bmp logo disabled]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Consistent font data header names needed to add new
fonts.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Devices with high ppi may benefit from wider fonts.
Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- move common code to vidconsole_internal.h and console_core.c
- unite probe functions
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about a few instructions, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembler.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Synchronize devicetree sources with Linux v6.2.
- Use GIC interrupt definitions
- Add reg properties in USB-glue and SoC-glue node
- Fix node names to follow the generic names list in DT specification
- Add L2 cache and AHCI nodes
- Update nand and pcie nodes
- And some trivial fixes
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.
After switching USB node, synchronization of USB node with Linux becomes
possible.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.
But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.
Remove them all.
Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
As the file spear_sdhci.c file is already removed, delete the associated
configuration CONFIG_MMC_SDHCI_SPEAR.
Fixes: c942fc925e ("mmc: spear: remove the entire spear_sdhci.c file")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As the lastest spear directories are removed, delete the associated entry
in Makefile.
Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).
Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 5d756d147e
Link: 6be9330601
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.
Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.
We keep the block mappings at level 1 for now though.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 96ad729cf4
Link: 6be9330601
The fttmr010 timer driver was deleted by
commit 29fc6f2492 ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c
Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.
This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.
[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fix checkpatch warnings, and rebased
to the upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: e3ceef4230
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.
Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <willdeacon@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some
checkpatch warnings. Rebased to upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: db5507f47f
Link: 2baf54e743
- Partial merge of a series of mine to select some framework options
that shouldn't be prompted for (and remove some unused code related to
that), and a partial merge of a series from Simon to remove some dead
code and address various CONFIG_IS_ENABLED/IS_ENABLED issues in code.
At present we compile commands into U-Boot SPL even though they cannot
be used. This wastes space. Adjust the condition to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.
Of course a better solution would be to refactor all of this to avoid
using #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
config.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This causes a build failure on mx6cuboxi with split config, since CMD_SATA
shows up as enabled in SPl (because there is no SPL_CMD_SATA).
The condition is wrong anyway, so change it to use SATA instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is used by ls1021atwr_sdcard_ifc_SECURE_BOOT with split config, but
is not needed anymore, since Ethernet migration is complete. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
We can use this feature in VPL, so add some options for it. Also fix a
typo in the SPL help while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is pretty messy at present since it relies on a SPL_SANDBOX option
that does not exist. Use the normal options instead, so that it will work
with split config.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is selected by PARTITION_UUIDS which has a separate option for SPL.
Add an SPL option for LIB_UUID also, so that we can keep them consistent.
Also add one for PARTITION_TYPE_GUID to avoid a build error in part_efi.c
which wants to call a uuid function in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we enable the sandbox I2C driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
At present we enable the sandbox RTC driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This should be checking for any SPL build. Drop the use of SPL_TPL_ since
it is not necessary and will not work with split config.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DM_RNG defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_PHY_FIXED defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE_SUPPORTED defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_MULTIPLEXER defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_FULL defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not used since time out of mind.
Drop the driver and Kconfig option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we shall set the
accurate interval according to 48Mhz for those controllers.
Note:
The first controller no need set it, but if set it, shall change
tphy's pll at the same time.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The T-PHY controller is designed to use use PLL integer mode, but
in fact use fractional mode for some ones on mt8195 by mistake,
this causes signal degradation (e.g. eye diagram test fail), fix
it by switching PLL to 26Mhz from default 48Mhz to improve signal
quality.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Prefer to make use of FIELD_PREP() macro to prepare bitfield value,
then no need local macros anymore.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Imply means you can turn off the option and expect things to work
- "it's a good idea to have X enabled" is when to use imply
- "you must have X for Y to work" is when to use select
Use "select" here.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
If this hooks is needed later, it should be added and populated for
real.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
As platforms which require this hook need this hook enabled, in order to
function, or do not need this hook, it doesn't make sense to prompt the
user. As all platforms that need this hook now select the symbol, remove
the prompt text.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function arch_early_init_r only does anything on these platforms if
we have FPGA (or SPL and SPL_FPGA) enabled, so move the logic to select
based on that.
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We need to be calling arch_early_init_r() on 64bit mvebu platforms, so
move this to a select.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
While it is true that for some Samsung platforms, we call
get_board_type() the main usage of this CONFIG switch is to enable
board_types in global data, which is then used by various platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In SPL are active memory maps set by the BootROM. Define them in cpu.h file
to the correct values. Some peripherals are not mapped at all.
Signed-off-by: Pali Rohár <pali@kernel.org>
Proper U-Boot moves SPI0 CS0 Flash mapping from 0xD4000000 to 0xF4000000
and change its size from 64 MB to 8 MB. Definitions are already in
MBUS_SPI_BASE/MBUS_SPI_SIZE macros. So define these macros also for SPL
build, use them in env_sf_get_env_addr() function and move this function
from spl.c to cpu.c to be available in Proper U-Boot too.
Signed-off-by: Pali Rohár <pali@kernel.org>
This new clearfog_sata_defconfig file is copy of existing
clearfog_defconfig file and changed to instruct build system to
generate final kwbimage for SATA booting.
This change is more readable via git option --find-copies-harder.
Signed-off-by: Pali Rohár <pali@kernel.org>
This new db-88f6820-amc_nand_defconfig file is copy of existing
db-88f6820-amc_defconfig file and changed to instruct build system to
generate final kwbimage for NAND booting. It was done by adding options:
CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND=y
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION=0x00
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
Board has Micron MT29F8G08ABACAWP chip which is SLC NAND with 4kB page size
and block size of 64 pages.
This change was only compile-tested and is useful for CI testing that
mkimage can generate valid kwbimage of NAND type.
This change is more readable via git option --find-copies-harder.
Signed-off-by: Pali Rohár <pali@kernel.org>
MVEBU_SPL_BOOT_DEVICE_SPI is for NOR flash. Either serial or parallel. Not
for general serial/SPI devices. The correct name should be BOOT_DEVICE_NOR
but name SPI is already used in mkimage config format which we do not want
to change for compatibility reasons.
MVEBU_SPL_BOOT_DEVICE_MMC is for MMC and SD compatible devices. Not for
SDIO devices. In most cases used for eMMC or SD card.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_PEX which instruct
make to generate kwbimage with PEX header. This image is used for booting
from PCI Express device which is in the Root Complex mode.
Support is very simple, SPL after finishes DDR training returns back to the
BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then start
executing U-Boot proper.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND which instruct
make to generate kwbimage with NAND header. This image is used for booting
from NAND flash (either SPI or parallel).
Support is very simple, SPL after finishes DDR training returns back to the
BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then loads and
executes U-Boot proper.
To generate correct kwbimage NAND header, it is required to set following
Kconfig options:
CONFIG_SYS_NAND_PAGE_SIZE
CONFIG_SYS_NAND_BLOCK_SIZE
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION
They are used only by make / mkimage when generating final kwbimage.
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION is a new mvebu specific Kconfig
option which is set into kwbimage NAND_BADBLK_LOCATION header field.
Signed-off-by: Pali Rohár <pali@kernel.org>
This change add support for mkimage's -s option to kwbimage format. It will
create an kwbimage with empty data part of image (data part would contain
only required 32-bit checksum). mkimage's -s option is indicated by skipcpy
flag and it is basically in conflict with mkimage's -d (datafile) option.
"Empty" kwbimage with no data can still contain headers. For example it can
contain binary executable header which is copied by BootROM into L2SRAM.
This is useful for example for small images which can do not require DDR
RAM and can be run in L2SRAM (which do not require any initialization).
Signed-off-by: Pali Rohár <pali@kernel.org>
When mkimage was instructed to skip datafile via option -s then do not try
to validate or open datafile as it does not have to exist or to be
specified via -d option.
This change allows to use -s option for skipping datafile when -d option
for datafile was not specified.
Signed-off-by: Pali Rohár <pali@kernel.org>
When asking mkimage to create a new image file and option -d is not
specified then mkimage show human unfriendly error message:
mkimage: Can't open (null): Bad address
Without debugger it is hard to debug what is the issue. Function open() is
being called with file name set to NULL. So add a check for this and if it
happens then show human readable message that option -d was not specified.
Signed-off-by: Pali Rohár <pali@kernel.org>
Marvell BootROM can execute SPI images directly from NOR (either SPI/serial
or parallel) without copying them to DDR RAM. This is know at XIP - execute
in place. To achieve that, destination address in kwbimage must be set to
0xFFFFFFFF and execute address to the offset in bytes from the beginning of
NOR memory.
Kirkwood and Dove which use kwbimage v0 format and have SPI address space
mapped to physical memory at 0xE8000000-0xEFFFFFFF by BootROM.
Armada SoCs use kwbimage v1 format and have SPI address space mapped to
physical memory at 0xD4000000-0xD7FFFFFF and Device bus address space (used
for parallel NOR) at 0xD8000000-0xDFFFFFFF.
Add support for generating XIP kwbimages by mkimage -x flag and mark xflag
as valid option in kwbimage.c.
Signed-off-by: Pali Rohár <pali@kernel.org>
Skip filling legacy_img_hdr structure for XIP images which do not use
legacy_img_hdr structure header. Adding unwanted header to other image
formats, like kwbimage cause generation of broken image.
Signed-off-by: Pali Rohár <pali@kernel.org>
Secure boot header signature is calculated from the image header with
zeroed header checksum. Calculation is done in add_secure_header_v1()
function. So after calling this function no header member except
main_hdr->checksum can be modified. Commit 2b0980c240 ("tools: kwbimage:
Fill the real header size into the main header") broke this requirement as
final header size started to be filled into main_hdr->headersz_* members
after the add_secure_header_v1() call.
Fix this issue by following steps:
- Split header size and image data offset into two variables (headersz and
*dataoff).
- Change image_headersz_v0() and add_binary_header_v1() functions to return
real (unaligned) header size instead of image data offset.
- On every place use correct variable (headersz or *dataoff)
After these steps variable headersz is correctly filled into the
main_hdr->headersz_* members and so overwriting them in the end of the
image_create_v1() function is not needed anymore. Remove those overwriting
which effectively reverts changes in problematic commit without affecting
value in main_hdr->headersz_* members and makes secure boot header
signature valid again.
Fixes: 2b0980c240 ("tools: kwbimage: Fill the real header size into the main header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Secure boot data image signature is calculated from the data image without
trailing 4-bit checksum. Commit 37cb9c15d7 ("tools: kwbimage: Simplify
aligning and calculating checksum") unintentionally broke this calculation
when it increased payloadsz variable by 4 bytes which was propagated also
into the add_secure_header_v1() function. Fix this issue by decreasing size
of buffer by 4 bytes from which is calculated secure boot data image
signature.
Fixes: 37cb9c15d7 ("tools: kwbimage: Simplify aligning and calculating checksum")
Signed-off-by: Pali Rohár <pali@kernel.org>
Variable imagesz in functions image_create_v0(), image_create_v1() and
kwbimage_set_header() stores offset to data from the beginning of the main
header. So it is not image size.
Signed-off-by: Pali Rohár <pali@kernel.org>
To make add_secure_header_v1() function more readable, call it directly
with arguments: header pointer with header size and data image pointer with
data image size. No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
For all images except SATA is data offset in bytes. For SATA it is in LBA
format (number of sectors). This is how Marvell BootROM interprets it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Use for it pretty print function: genimg_print_size(). This makes it more
human readable, like other offset and sizes printed by this tool.
Signed-off-by: Pali Rohár <pali@kernel.org>
In Dove functional specification, which use kwbimage v0, is also defined
nand block size field. So dump NAND_BLKSZ also for v0 images.
In Kirkwood functional specification, which also use kwbimage v0, this
field is not defined. So when it is zero and Kirkwood is detected, do not
dump it.
Fixes: f76ae2571f ("tools: kwbimage: Add support for dumping extended and binary v0 headers")
Signed-off-by: Pali Rohár <pali@kernel.org>
mkimage -F option (re-sign existing FIT image) signaled by fflag is not
supported by kwbimage. So mark its usage as invalid parameter.
Signed-off-by: Pali Rohár <pali@kernel.org>
Checksum for v0 image must be generated after filling all fields in the
main header. Otherwise it would be invalid.
Exactly same problem for v1 images was already fixed in the past in commit
9203c73895 ("tools: kwbimage: Fix checksum calculation for v1 images").
Fixes: 5c61710c98 ("tools: kwbimage: Properly set srcaddr in kwbimage v0")
Signed-off-by: Pali Rohár <pali@kernel.org>
kwbimage nandblocksize field is in 64 kB unit, but NAND_BLKSZ command
expects it in bytes. So do required unit conversion.
Also zero value in nandblocksize field has special meaning. When this field
is set to zero, the default block size is used. This default size is
defined by the NAND flash page size (16 KB for a 512B page or small page
NAND and 64 KB for a large page NAND flash).
Fixes: 1a8e6b63e2 ("tools: kwbimage: Dump kwbimage config file on '-p -1' option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Value 0x0 for NAND_BADBLK_LOCATION/nandbadblklocation means that BBI is on
the first or second page and value 0x1 means that BBI is on the last page.
This indicates also NAND Flash Technology, value 0x0 is SLC NAND and value
0x1 is MLC NAND.
Therefore we need to dump NAND_BADBLK_LOCATION also when it is zero.
Note that in v0 images, nandbadblklocation field overlaps with ddrinitdelay
field in one union. ddrinitdelay is used in Kirkwood and nandbadblklocation
is used in Dove. For Dove images is_v0_ext should be set, so use it to
distinguish if nandbadblklocation is available or not. In v1 images there
is always nandbadblklocation field.
Fixes: 1a8e6b63e2 ("tools: kwbimage: Dump kwbimage config file on '-p -1' option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Upper-bound for iterating for-loop over register set entries is incorrect.
Fix it byt calculating correct number of entries.
And fix also dumping the last entry DATA_DELAY, which is the last and not
first (zero).
Fixes: 1a8e6b63e2 ("tools: kwbimage: Dump kwbimage config file on '-p -1' option")
Signed-off-by: Pali Rohár <pali@kernel.org>
'secure_mode' and 'fuse_read_u64' are used only on A38x and A37xx.
Fixes: f7b0bbca2b ("cmd: mvebu/bubt: Check for A38x/A37xx OTP secure bits and secure boot")
Signed-off-by: Pali Rohár <pali@kernel.org>
For 32-bit Armada boards which use SPL we can determinate boot device from
existing MVEBU_SPL_BOOT_DEVICE_* option. For all other boards (e.g. 64-bit
Armada) default option still needs to be set manually.
Signed-off-by: Pali Rohár <pali@kernel.org>
32-bit Armada SoCs uses u-boot binary packed in kwbimage format. Name of
the image is in CONFIG_BUILD_TARGET option. So use it as a default option
in Kconfig.
Signed-off-by: Pali Rohár <pali@kernel.org>
Variable image_size contains size of the header, not size of the whole
image. Rename this variable to reflect content.
Signed-off-by: Pali Rohár <pali@kernel.org>
This change allows to load boot image from the first SATA/SCSI device
partition and burn it to board boot location (e.g. SPI-NOR). This is
particularly when storage device is not handled by U-Boot as USB mass
storage (which is already supported by bubt) but as SATA/SCSI device.
Signed-off-by: Pali Rohár <pali@kernel.org>
All 32-bit Armada SoCs and also 64-bit Armada 3720 SoC can load and boot
firmware from SATA disk. This adds support for updating firmware binary for
these SoCs. On 32-bit Armada SoC is firmware stored at sector 1 and on
Armada 3720 is stored at MBR partition 0x4d or GPT partition with type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE (Marvell Armada 3700 Boot partition).
Signed-off-by: Pali Rohár <pali@kernel.org>
Support for burning into the correct eMMC HW boot partition was broken and
removed in commit 96be2f0727 ("mvebu: bubt: Drop dead code"). Reimplement
this functionality and bring it back again.
Fixes: 96be2f0727 ("mvebu: bubt: Drop dead code")
Signed-off-by: Pali Rohár <pali@kernel.org>
Show image type and version during parsing of kwbimage.
And show reasons in error messages when parsing failed.
This can help to debug issues with invalid images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Marvell BootROM interprets execaddr of SPI/NOR XIP images as relative byte
offset from the from the beginning of the flash device. So if data image
offset and execute offset are not same then it is needed to adjust them
also in DDR RAM.
Fixes: f2c644e0b8 ("tools: kwboot: Patch destination address to DDR area for SPI image")
Signed-off-by: Pali Rohár <pali@kernel.org>
Some NOR images may be execute-in-place and do not contain DDR init code in
its kwbimage header. Such images cannot be booted over UART as BootROM
loads them to RAM. Add check that kwbimage contains DDR init code in its
header (either as binary code header or as the simple register-value set).
In some cases it is possible to load very small image into L2SRAM and when
DDR init code is not required. So check for L2SRAM load address and skip
DDR init code check in this case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Before starting parsing of kwbimage, first validate that all optional v1
headers and correct. This prevents kwboot crashes on invalid input.
Signed-off-by: Pali Rohár <pali@kernel.org>
The 32-bit data checksum in UART image is not checked by the BootROM and
also Marvell tools do not generate it.
So if data checksum stored in UART image does not match calculated checksum
from the image then treat those checksum bytes as part of the executable
image code (and not as the checksum) and for compatibility with the rest of
the code manually insert data checksum into the in-memory image after the
executable code, without overwriting it.
This should allow to boot UART images generated by Marvell tools.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add information of all available image types and where they should be
stored. Storage location offsets where documented from the disassembly of
the A385 BootROM image dump.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add reference to Avanta Boot Flow documentation, BobCat2, AlleyCat3 and
PONCat3 BootROM Firmware documentation and links to public Marvell tools:
hdrparser.c and doimage.c
Signed-off-by: Pali Rohár <pali@kernel.org>
Marvell BootROM loads MMC image from sector 0 (HW boot or data partition)
and SD image from sector 1.
So for SD card booting it is needed to not use constant CONFIG MMC options
and instead of them it is needed to define functions spl_mmc_boot_mode()
spl_mmc_get_uboot_raw_sector() which determinate offsets at SPL runtime
based on MMC or SD card.
Calculation of SD card sector expects following values:
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Signed-off-by: Pali Rohár <pali@kernel.org>
On some platforms is SYS_MMCSD_FS_BOOT_PARTITION unsupported. So allow to
completely disable MMC FS Boot support via new option SYS_MMCSD_FS_BOOT.
By default MMC FS Boot support is enabled (like it was before) except for
ARCH_MVEBU where MMC FS Boot supported is unsupported due to Marvell
BootROM limitations.
Signed-off-by: Pali Rohár <pali@kernel.org>
When eMMC boot is selected then BootROM loads kwbimage header (U-Boot SPL)
from the selected eMMC boot partition. So for eMMC boot ensure that U-Boot
SPL loads U-Boot proper (from kwbimage) also from the same selected eMMC
boot partition.
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Signed-off-by: Pali Rohár <pali@kernel.org>
BOOT_DEVICE_MMC2 and BOOT_DEVICE_MMC2_2 are representing mmc dev 1 but all
Armada SoCs have only one mmc controller. So remove references to
non-existent second mmc controller.
Fixes: f830703f42 ("arm: mvebu: Check that kwbimage blockid matches boot mode")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SATA image as number of sectors the beginning of the hard
drive, but as number of sectors relative to the main header.
Reject invalid and accept valid SATA images.
Fixes: 5a06534933 ("cmd: mvebu/bubt: Check for A38x image data checksum")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SATA image as number of sectors the beginning of the hard
drive, but as number of sectors relative to the main header.
To process SATA kwbimage and load U-Boot proper from it in the same way as
Marvell BootROM, it is needed to interpret srcaddr as relative offset to
the main header. This change fixes booting of U-Boot proper from SPL code
in SATA image.
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SATA image as number of sectors the beginning of the hard
drive, but as number of sectors relative to the main header.
To parse SATA kwbimage in the same way as Marvell BootROM, it is needed to
interpret srcaddr as relative offset to the main header. This change fixes
loading of SATA images via kwboot over UART.
Fixes: 792e423550 ("tools: kwboot: Patch source address in image header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SATA image as number of sectors the beginning of the hard
drive, but as number of sectors relative to the main header.
The main header is stored at absolute sector number 1. So do not add or
subtract it when calculating with relative offsets to the main header.
Fixes: 501a54a29c ("tools: kwbimage: Fix generation of SATA, SDIO and PCIe images")
Fixes: 5c61710c98 ("tools: kwbimage: Properly set srcaddr in kwbimage v0")
Fixes: e0c243c398 ("tools: kwbimage: Validate data checksum of v1 images")
Fixes: aa6943ca31 ("kwbimage: Add support for extracting images via dumpimage tool")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To ensure that we do not store invalid SDIO image to the boot location
(read by the Marvell BootROM), we need to check that image is valid
and srcaddr is intepreted in bytes, in the same way as it is done by
Marvell BootROM.
This fixes rejecting valid and accepting invalid SDIO images by bubt command.
Fixes: 5a06534933 ("cmd: mvebu/bubt: Check for A38x image data checksum")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To process SDIO kwbimage and load U-Boot proper from it in the same way as
Marvell BootROM, it is needed to interpret srcaddr in bytes. This change
fixes booting of U-Boot proper from SPL code stored in SDIO image.
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To parse SDIO kwbimage in the same way as Marvell BootROM, it is needed to
interpret srcaddr in bytes. This change fixes loading of SDIO images via
kwboot over UART.
Fixes: 792e423550 ("tools: kwboot: Patch source address in image header")
Signed-off-by: Pali Rohár <pali@kernel.org>
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To generate SDIO kwbimage compatible with Marvell BootROM, it is needed to
have srcaddr in bytes. This change fixes SDIO images for Armada 38x SoCs.
Fixes: 501a54a29c ("tools: kwbimage: Fix generation of SATA, SDIO and PCIe images")
Fixes: 5c61710c98 ("tools: kwbimage: Properly set srcaddr in kwbimage v0")
Fixes: e0c243c398 ("tools: kwbimage: Validate data checksum of v1 images")
Fixes: aa6943ca31 ("kwbimage: Add support for extracting images via dumpimage tool")
Signed-off-by: Pali Rohár <pali@kernel.org>
TPM auto startup and testing:
Due to U-Boot's lazy binding we always relied on command line tools to
initialize the TPM subsystem and devices. One exception is the EFI
subsystem. When compiled with TCG2 measured boot support the TPM was
automatically initialized.
However that init was not complete. The TCG specs [0] (and specifically
§12.3 Self-test modes) describe how self-tests on the device should be
performed. This PR is adding an extra API function, that can be used to
initialize the TPM2.0 properly.
Simon added the equivalent for TPM1.2 and refactored the DM tests to
include the new funtion.
[0] https://trustedcomputinggroup.org/wp-content/uploads/TPM-Rev-2.0-Part-1-Architecture-01.07-2014-03-13.pdf
Pull request for u-boot-nand-20230227
- mark reserved blocks from Ashok Reddy Soma
- backport BRCMNAND changes from Linux from Linus Walleij
- fix display of unknown raw ID from Patrice Chotard
- show reserved block in chip.erase from Michael Trimarchi
Add an implementation of this, moving the common call to tpm_init() up
into the common API implementation.
Add a test.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently there is only one test and it only works on TPM v2. Update it
to work on v1.2 as well, using a new function to pick up the required
TPM.
Update sandbox to include both a v1.2 and v2 TPM so that this works.
Split out the existing test into two pieces, one for init and one for
the v2-only report_state feature.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A prior patch adds a new API function for TPM2.0, which performs
the full startup sequence of the TPM. Add a selftest for that.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
All the TPM drivers as well as out TCG TIS API for a TPM2.0 device
return -EBUSY if the device has already been opened. Adjust
the sandbox TPM do return the same error code.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A previous commit is adding a new tpm startup functions which
initializes the TPMv2 and performs all the needed selftests.
Since the TPM selftests might be needed depending on the requested
algorithm or functional module use that instead.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
As described in [0] if a command requires use of an untested algorithm
or functional module, the TPM performs the test and then completes the
command actions.
Since we don't check for TPM_RC_NEEDS_TEST (which is the return code of
the TPM in that case) and even if we would, it would complicate our TPM
code for no apparent reason, add a wrapper function that performs both
the selftest and the startup sequence of the TPM.
It's worth noting that this is implemented on TPMv2.0. The code for
1.2 would look similar, but I don't have a device available to test.
[0]
https://trustedcomputinggroup.org/wp-content/uploads/TPM-Rev-2.0-Part-1-Architecture-01.07-2014-03-13.pdf
§12.3 Self-test modes
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
I had added this line locally, rebuild the image, but didn't ensure that
I had committed the correct version of the patch as well.
Fixes: 75b031ee4a ("Dockerfile: download binaries for Nokia RX-51")
Signed-off-by: Tom Rini <trini@konsulko.com>
The "nand chip.erase" command always printed as bad blocks even in the
case of reserved blocks. Reserved blocks are used for storing bad block
tables. The patch displays "bbt reserved" when printing reserved blocks in
"nand chip.erase" command.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
In case ID is not found in manufacturer table, the raw ID is
printed using %*phN format which is not supported by lib/vsprintf.c.
The information displayed doesn't reflect the raw ID return by the
unknown spi-nand.
Use %02x format instead, as done in spi-nor-core.c.
For example, before this patch:
ERROR: spi-nand: spi_nand flash@0: unknown raw ID f74ec040
after
ERROR: spi-nand: spi_nand flash@0: unknown raw ID 00 c2 26 03
Fixes: 0a6d6bae03 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reserved blocks are used for storing bad block tables. With "nand bad"
command, these reserved blocks are shown as bad blocks. This is leading
to confusion when compared with Linux bad blocks. Hence, display
"bbt reserved" when printing reserved blocks with "nand bad" command.
To acheive this, return 2 which represents reserved from nand_isbad_bbt()
instead of 1 in case of reserved blocks and catch it in cmd/nand.c.
"nand bad" command display's hexadecimal numbers, so add "0x" prefix.
Example log will show up as below.
ZynqMP> nand bad
Device 0 bad blocks:
0x00400000
0x16800000
0x16c00000
0x17000000
0x3d800000
0x3e400000
0xe8400000
0xff000000 (bbt reserved)
0xff400000 (bbt reserved)
0xff800000 (bbt reserved)
0xffc00000 (bbt reserved)
0x116800000
0x116c00000
0x1ff000000 (bbt reserved)
0x1ff400000 (bbt reserved)
0x1ff800000 (bbt reserved)
0x1ffc00000 (bbt reserved)
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-By: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
- Merge in changes to our Dockerfile so that we build and download ahead
of time all of the components required to run the nx51 test scripts.
This will both speed up the specific job and address failures in Azure
where the ipk files fail to download.
Now that the Dockerfile creates images which have the binaries we
require included, have CI make symlinks for them and update the existing
script to support this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Downloading files for a test may fail if the server is offline.
It is preferable to provide the files in our Docker image.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make sure the PHY subsystem is activated for the uniphier DWC3 glue
logic, as it depends on PHY implementation there.
Signed-off-by: Marek Vasut <marex@denx.de>
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add USB3 PHY driver support to control clocks and resets needed to enable
PHY. The phy_ops->init() and exit() control PHY clocks and resets only,
and clocks and resets for the controller and the parent logic are enabled
in advance.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.
The USB dm tree when using dwc3-generic is the following:
USB glue
+-- controller (need controller-reset)
+-- controller-reset (need syscon-reset)
+-- phy
The controller needs to deassert "controller-reset" in USB glue before
the controller registers are accessed. The glue needs to deassert
"syscon-reset" before the glue registers are accessed.
The glue itself doesn't have "syscon-reset", so the controller-reset
controls "syscon-reset" instead.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
In order to allow external SoC-dependent glue drivers to use dwc3-generic
functions, push the glue structures and export the functions to a header
file.
The exported structures and functions are:
- struct dwc3_glue_data
- struct dwc3_glue_ops
- dwc3_glue_bind()
- dwc3_glue_probe()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The most of devicetree has the following USB node structure.
The controller node is placed as a child node of the glue node.
Current dwc3-generic driver works on this premise.
glue {
/* glue node */
usb {
/* controller node */
};
};
However, UniPhier original devicetree has the following USB node structure.
The controller node is separately placed from the glue node.
usb {
/* controller node */
};
glue {
/* glue node */
};
In dwc_glue_bind(), this patch provides .glue_get_ctrl_dev() callback to
get such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
There are currently four disparate placement possibilities of DWC3
reference clock phandle in SoC DTs:
- in top level glue node, with generic subnode without clock (ZynqMP)
- in top level generic node, with no subnode (i.MX8MQ)
- in generic subnode, with other clock in top level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Test that:
- sandbox shows a warning when an unmigrated DT is used
- sandbox fails to run when migration is turned off
- sandbox_spl fails to build when migration is turned off
Signed-off-by: Simon Glass <sjg@chromium.org>
These should not be used anymore. Add a check to ensure they don't creek
back into U-Boot. Use bootph-... instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that Linux has accepted these tags, move U-Boot over to use them.
Tidy up the comments and formatting, making sure that VPL is mentioned
too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a CONFIG option to deal with this automatically, printing a warning
when U-Boot starts up. This can be useful if the device tree comes from
another project.
We will maintain this through the 2023.07 release, providing 6 months
for people to notice.
Signed-off-by: Simon Glass <sjg@chromium.org>
Version 4:
Acked-by: Michal Simek <michal.simek@amd.com>
U-Boot has some particular challenges with device tree and devices:
- U-Boot has multiple build phases, such as a Secondary Program Loader
(SPL) phase which typically runs in a pre-SDRAM environment where code
and data space are limited. In particular, there may not be enough
space for the full device tree blob. U-Boot uses various automated
techniques to reduce the size from perhaps 40KB to 3KB. It is not
always possible to handle these tags entirely at build time, since
U-Boot proper must have the full device tree, even though we do not
want it to process all nodes until after relocation.
- Some U-Boot phases needs to run before the clocks are properly set up,
where the CPU may be running very slowly. Therefore it is important to
bind only those devices which are actually needed in that phase
- U-Boot uses lazy initialisation for its devices, with 'bind' and
'probe' being separate steps. Even if a device is bound, it is not
actually probed until it is used. This is necessary to keep the boot
time reasonable, e.g. to under a second
The phases of U-Boot in order are: TPL, VPL, SPL, U-Boot (first
pre-relocation, then post-relocation). ALl but the last two are optional.
For the above reasons, U-Boot only includes the full device tree in the
final 'U-Boot proper' build. Even then, before relocation U-Boot only
processes nodes which are marked as being needed.
For this to work, U-Boot's driver model[1] provides a way to mark device
tree nodes as applicable for a particular phase. This works by adding a
tag to the node, e.g.:
cru: clock-controller@ff760000 {
bootph-all;
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
...
};
Here the "bootph-all" tag indicates that the node must be present in all
phases, since the clock driver is required.
There has been discussion over the years about whether this could be done
in a property instead, e.g.
options {
bootph-all = <&cru> <&gpio_a> ...;
...
};
Some problems with this:
- we need to be able to merge several such tags from different .dtsi files
since many boards have their own specific requirements
- it is hard to find and cross-reference the affected nodes
- it is more error-prone
- it requires significant tool rework in U-Boot, including fdtgrep and
the build system
- is harder (slower, more code) to process since it involves scanning
another node/property to find out what to do with a particular node
- we don't want to add phandle arguments to the above since we are
referring, e.g., to the clock device as a whole, not a paricular clock
- the of-platdata feature[2], which converts device tree to C for even
more constrained environments, would need to become aware of the
/options node
There is also the question about whether this needs to be U-Boot-specific,
or whether the tags could be generic. From what I can tell, U-Boot is the
only bootloader which seriously attempts to use a runtime device tree in
all cases. For this version, an attempt is made to name the phases in a
generic manner.
It should also be noted that the approach provided here has stood the test
of time, used in U-Boot for 8 years so far.
So add the schema for this. This will allow a major class of schema
exceptions to be dropped from the U-Boot source tree.
This has been applied upstream[3]
[1] https://u-boot.readthedocs.io/en/latest/develop/driver-model/index.html
[2] https://u-boot.readthedocs.io/en/latest/develop/driver-model/of-plat.html
[3] https://github.com/devicetree-org/dt-schema/commit/63bd847
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:42:14 -07:00
5243 changed files with 246338 additions and 81261 deletions
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
&scm_clocks {
emac_ick: emac_ick@32c {
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